dp_rx.h 57 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_peer.h"
  22. #include "dp_internal.h"
  23. #ifdef RXDMA_OPTIMIZATION
  24. #ifndef RX_DATA_BUFFER_ALIGNMENT
  25. #define RX_DATA_BUFFER_ALIGNMENT 128
  26. #endif
  27. #ifndef RX_MONITOR_BUFFER_ALIGNMENT
  28. #define RX_MONITOR_BUFFER_ALIGNMENT 128
  29. #endif
  30. #else /* RXDMA_OPTIMIZATION */
  31. #define RX_DATA_BUFFER_ALIGNMENT 4
  32. #define RX_MONITOR_BUFFER_ALIGNMENT 4
  33. #endif /* RXDMA_OPTIMIZATION */
  34. #ifdef QCA_HOST2FW_RXBUF_RING
  35. #define DP_WBM2SW_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW1_BM(sw0_bm_id)
  36. /* RBM value used for re-injecting defragmented packets into REO */
  37. #define DP_DEFRAG_RBM(sw0_bm_id) HAL_RX_BUF_RBM_SW3_BM(sw0_bm_id)
  38. #endif /* QCA_HOST2FW_RXBUF_RING */
  39. #define RX_BUFFER_RESERVATION 0
  40. #define DP_DEFAULT_NOISEFLOOR (-96)
  41. #define DP_RX_DESC_MAGIC 0xdec0de
  42. #define dp_rx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_RX, params)
  43. #define dp_rx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_RX, params)
  44. #define dp_rx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_RX, params)
  45. #define dp_rx_info(params...) \
  46. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  47. #define dp_rx_info_rl(params...) \
  48. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_RX, ## params)
  49. #define dp_rx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_RX, params)
  50. /**
  51. * enum dp_rx_desc_state
  52. *
  53. * @RX_DESC_REPLENISH: rx desc replenished
  54. * @RX_DESC_FREELIST: rx desc in freelist
  55. */
  56. enum dp_rx_desc_state {
  57. RX_DESC_REPLENISHED,
  58. RX_DESC_IN_FREELIST,
  59. };
  60. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  61. /**
  62. * struct dp_rx_desc_dbg_info
  63. *
  64. * @freelist_caller: name of the function that put the
  65. * the rx desc in freelist
  66. * @freelist_ts: timestamp when the rx desc is put in
  67. * a freelist
  68. * @replenish_caller: name of the function that last
  69. * replenished the rx desc
  70. * @replenish_ts: last replenish timestamp
  71. * @prev_nbuf: previous nbuf info
  72. * @prev_nbuf_data_addr: previous nbuf data address
  73. */
  74. struct dp_rx_desc_dbg_info {
  75. char freelist_caller[QDF_MEM_FUNC_NAME_SIZE];
  76. uint64_t freelist_ts;
  77. char replenish_caller[QDF_MEM_FUNC_NAME_SIZE];
  78. uint64_t replenish_ts;
  79. qdf_nbuf_t prev_nbuf;
  80. uint8_t *prev_nbuf_data_addr;
  81. };
  82. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  83. /**
  84. * struct dp_rx_desc
  85. *
  86. * @nbuf : VA of the "skb" posted
  87. * @rx_buf_start : VA of the original Rx buffer, before
  88. * movement of any skb->data pointer
  89. * @paddr_buf_start : PA of the original Rx buffer, before
  90. * movement of any frag pointer
  91. * @cookie : index into the sw array which holds
  92. * the sw Rx descriptors
  93. * Cookie space is 21 bits:
  94. * lower 18 bits -- index
  95. * upper 3 bits -- pool_id
  96. * @pool_id : pool Id for which this allocated.
  97. * Can only be used if there is no flow
  98. * steering
  99. * @in_use rx_desc is in use
  100. * @unmapped used to mark rx_desc an unmapped if the corresponding
  101. * nbuf is already unmapped
  102. * @in_err_state : Nbuf sanity failed for this descriptor.
  103. * @nbuf_data_addr : VA of nbuf data posted
  104. */
  105. struct dp_rx_desc {
  106. qdf_nbuf_t nbuf;
  107. uint8_t *rx_buf_start;
  108. qdf_dma_addr_t paddr_buf_start;
  109. uint32_t cookie;
  110. uint8_t pool_id;
  111. #ifdef RX_DESC_DEBUG_CHECK
  112. uint32_t magic;
  113. uint8_t *nbuf_data_addr;
  114. struct dp_rx_desc_dbg_info *dbg_info;
  115. #endif
  116. uint8_t in_use:1,
  117. unmapped:1,
  118. in_err_state:1;
  119. };
  120. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  121. #ifdef ATH_RX_PRI_SAVE
  122. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  123. (qdf_nbuf_set_priority(_nbuf, _tid))
  124. #else
  125. #define DP_RX_TID_SAVE(_nbuf, _tid)
  126. #endif
  127. /* RX Descriptor Multi Page memory alloc related */
  128. #define DP_RX_DESC_OFFSET_NUM_BITS 8
  129. #define DP_RX_DESC_PAGE_ID_NUM_BITS 8
  130. #define DP_RX_DESC_POOL_ID_NUM_BITS 4
  131. #define DP_RX_DESC_PAGE_ID_SHIFT DP_RX_DESC_OFFSET_NUM_BITS
  132. #define DP_RX_DESC_POOL_ID_SHIFT \
  133. (DP_RX_DESC_OFFSET_NUM_BITS + DP_RX_DESC_PAGE_ID_NUM_BITS)
  134. #define RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK \
  135. (((1 << DP_RX_DESC_POOL_ID_NUM_BITS) - 1) << DP_RX_DESC_POOL_ID_SHIFT)
  136. #define RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK \
  137. (((1 << DP_RX_DESC_PAGE_ID_NUM_BITS) - 1) << \
  138. DP_RX_DESC_PAGE_ID_SHIFT)
  139. #define RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK \
  140. ((1 << DP_RX_DESC_OFFSET_NUM_BITS) - 1)
  141. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(_cookie) \
  142. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_POOL_ID_MASK) >> \
  143. DP_RX_DESC_POOL_ID_SHIFT)
  144. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(_cookie) \
  145. (((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_PAGE_ID_MASK) >> \
  146. DP_RX_DESC_PAGE_ID_SHIFT)
  147. #define DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(_cookie) \
  148. ((_cookie) & RX_DESC_MULTI_PAGE_COOKIE_OFFSET_MASK)
  149. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  150. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  151. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  152. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  153. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  154. #define DP_RX_DESC_COOKIE_MAX \
  155. (RX_DESC_COOKIE_INDEX_MASK | RX_DESC_COOKIE_POOL_ID_MASK)
  156. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  157. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  158. RX_DESC_COOKIE_POOL_ID_SHIFT)
  159. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  160. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  161. RX_DESC_COOKIE_INDEX_SHIFT)
  162. #define dp_rx_add_to_free_desc_list(head, tail, new) \
  163. __dp_rx_add_to_free_desc_list(head, tail, new, __func__)
  164. #define dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  165. num_buffers, desc_list, tail) \
  166. __dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool, \
  167. num_buffers, desc_list, tail, __func__)
  168. #ifdef DP_RX_SPECIAL_FRAME_NEED
  169. /**
  170. * dp_rx_is_special_frame() - check is RX frame special needed
  171. *
  172. * @nbuf: RX skb pointer
  173. * @frame_mask: the mask for speical frame needed
  174. *
  175. * Check is RX frame wanted matched with mask
  176. *
  177. * Return: true - special frame needed, false - no
  178. */
  179. static inline
  180. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  181. {
  182. if (((frame_mask & FRAME_MASK_IPV4_ARP) &&
  183. qdf_nbuf_is_ipv4_arp_pkt(nbuf)) ||
  184. ((frame_mask & FRAME_MASK_IPV4_DHCP) &&
  185. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) ||
  186. ((frame_mask & FRAME_MASK_IPV4_EAPOL) &&
  187. qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) ||
  188. ((frame_mask & FRAME_MASK_IPV6_DHCP) &&
  189. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf)))
  190. return true;
  191. return false;
  192. }
  193. /**
  194. * dp_rx_deliver_special_frame() - Deliver the RX special frame to stack
  195. * if matches mask
  196. *
  197. * @soc: Datapath soc handler
  198. * @peer: pointer to DP peer
  199. * @nbuf: pointer to the skb of RX frame
  200. * @frame_mask: the mask for speical frame needed
  201. * @rx_tlv_hdr: start of rx tlv header
  202. *
  203. * note: Msdu_len must have been stored in QDF_NBUF_CB_RX_PKT_LEN(nbuf) and
  204. * single nbuf is expected.
  205. *
  206. * return: true - nbuf has been delivered to stack, false - not.
  207. */
  208. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  209. qdf_nbuf_t nbuf, uint32_t frame_mask,
  210. uint8_t *rx_tlv_hdr);
  211. #else
  212. static inline
  213. bool dp_rx_is_special_frame(qdf_nbuf_t nbuf, uint32_t frame_mask)
  214. {
  215. return false;
  216. }
  217. static inline
  218. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  219. qdf_nbuf_t nbuf, uint32_t frame_mask,
  220. uint8_t *rx_tlv_hdr)
  221. {
  222. return false;
  223. }
  224. #endif
  225. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  226. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  227. static inline
  228. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  229. {
  230. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  231. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  232. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  233. return false;
  234. }
  235. return true;
  236. }
  237. #else
  238. static inline
  239. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  240. {
  241. return true;
  242. }
  243. #endif
  244. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  245. /* DOC: Offset to obtain LLC hdr
  246. *
  247. * In the case of Wifi parse error
  248. * to reach LLC header from beginning
  249. * of VLAN tag we need to skip 8 bytes.
  250. * Vlan_tag(4)+length(2)+length added
  251. * by HW(2) = 8 bytes.
  252. */
  253. #define DP_SKIP_VLAN 8
  254. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  255. /**
  256. * struct dp_rx_cached_buf - rx cached buffer
  257. * @list: linked list node
  258. * @buf: skb buffer
  259. */
  260. struct dp_rx_cached_buf {
  261. qdf_list_node_t node;
  262. qdf_nbuf_t buf;
  263. };
  264. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  265. /*
  266. *dp_rx_xor_block() - xor block of data
  267. *@b: destination data block
  268. *@a: source data block
  269. *@len: length of the data to process
  270. *
  271. *Returns: None
  272. */
  273. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  274. {
  275. qdf_size_t i;
  276. for (i = 0; i < len; i++)
  277. b[i] ^= a[i];
  278. }
  279. /*
  280. *dp_rx_rotl() - rotate the bits left
  281. *@val: unsigned integer input value
  282. *@bits: number of bits
  283. *
  284. *Returns: Integer with left rotated by number of 'bits'
  285. */
  286. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  287. {
  288. return (val << bits) | (val >> (32 - bits));
  289. }
  290. /*
  291. *dp_rx_rotr() - rotate the bits right
  292. *@val: unsigned integer input value
  293. *@bits: number of bits
  294. *
  295. *Returns: Integer with right rotated by number of 'bits'
  296. */
  297. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  298. {
  299. return (val >> bits) | (val << (32 - bits));
  300. }
  301. /*
  302. * dp_set_rx_queue() - set queue_mapping in skb
  303. * @nbuf: skb
  304. * @queue_id: rx queue_id
  305. *
  306. * Return: void
  307. */
  308. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  309. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  310. {
  311. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  312. return;
  313. }
  314. #else
  315. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  316. {
  317. }
  318. #endif
  319. /*
  320. *dp_rx_xswap() - swap the bits left
  321. *@val: unsigned integer input value
  322. *
  323. *Returns: Integer with bits swapped
  324. */
  325. static inline uint32_t dp_rx_xswap(uint32_t val)
  326. {
  327. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  328. }
  329. /*
  330. *dp_rx_get_le32_split() - get little endian 32 bits split
  331. *@b0: byte 0
  332. *@b1: byte 1
  333. *@b2: byte 2
  334. *@b3: byte 3
  335. *
  336. *Returns: Integer with split little endian 32 bits
  337. */
  338. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  339. uint8_t b3)
  340. {
  341. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  342. }
  343. /*
  344. *dp_rx_get_le32() - get little endian 32 bits
  345. *@b0: byte 0
  346. *@b1: byte 1
  347. *@b2: byte 2
  348. *@b3: byte 3
  349. *
  350. *Returns: Integer with little endian 32 bits
  351. */
  352. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  353. {
  354. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  355. }
  356. /*
  357. * dp_rx_put_le32() - put little endian 32 bits
  358. * @p: destination char array
  359. * @v: source 32-bit integer
  360. *
  361. * Returns: None
  362. */
  363. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  364. {
  365. p[0] = (v) & 0xff;
  366. p[1] = (v >> 8) & 0xff;
  367. p[2] = (v >> 16) & 0xff;
  368. p[3] = (v >> 24) & 0xff;
  369. }
  370. /* Extract michal mic block of data */
  371. #define dp_rx_michael_block(l, r) \
  372. do { \
  373. r ^= dp_rx_rotl(l, 17); \
  374. l += r; \
  375. r ^= dp_rx_xswap(l); \
  376. l += r; \
  377. r ^= dp_rx_rotl(l, 3); \
  378. l += r; \
  379. r ^= dp_rx_rotr(l, 2); \
  380. l += r; \
  381. } while (0)
  382. /**
  383. * struct dp_rx_desc_list_elem_t
  384. *
  385. * @next : Next pointer to form free list
  386. * @rx_desc : DP Rx descriptor
  387. */
  388. union dp_rx_desc_list_elem_t {
  389. union dp_rx_desc_list_elem_t *next;
  390. struct dp_rx_desc rx_desc;
  391. };
  392. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  393. /**
  394. * dp_rx_desc_find() - find dp rx descriptor from page ID and offset
  395. * @page_id: Page ID
  396. * @offset: Offset of the descriptor element
  397. *
  398. * Return: RX descriptor element
  399. */
  400. union dp_rx_desc_list_elem_t *dp_rx_desc_find(uint16_t page_id, uint16_t offset,
  401. struct rx_desc_pool *rx_pool);
  402. static inline
  403. struct dp_rx_desc *dp_get_rx_desc_from_cookie(struct dp_soc *soc,
  404. struct rx_desc_pool *pool,
  405. uint32_t cookie)
  406. {
  407. uint8_t pool_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_POOL_ID(cookie);
  408. uint16_t page_id = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_PAGE_ID(cookie);
  409. uint8_t offset = DP_RX_DESC_MULTI_PAGE_COOKIE_GET_OFFSET(cookie);
  410. struct rx_desc_pool *rx_desc_pool;
  411. union dp_rx_desc_list_elem_t *rx_desc_elem;
  412. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  413. return NULL;
  414. rx_desc_pool = &pool[pool_id];
  415. rx_desc_elem = (union dp_rx_desc_list_elem_t *)
  416. (rx_desc_pool->desc_pages.cacheable_pages[page_id] +
  417. rx_desc_pool->elem_size * offset);
  418. return &rx_desc_elem->rx_desc;
  419. }
  420. /**
  421. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  422. * the Rx descriptor on Rx DMA source ring buffer
  423. * @soc: core txrx main context
  424. * @cookie: cookie used to lookup virtual address
  425. *
  426. * Return: Pointer to the Rx descriptor
  427. */
  428. static inline
  429. struct dp_rx_desc *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc,
  430. uint32_t cookie)
  431. {
  432. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_buf[0], cookie);
  433. }
  434. /**
  435. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  436. * the Rx descriptor on monitor ring buffer
  437. * @soc: core txrx main context
  438. * @cookie: cookie used to lookup virtual address
  439. *
  440. * Return: Pointer to the Rx descriptor
  441. */
  442. static inline
  443. struct dp_rx_desc *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc,
  444. uint32_t cookie)
  445. {
  446. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_mon[0], cookie);
  447. }
  448. /**
  449. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  450. * the Rx descriptor on monitor status ring buffer
  451. * @soc: core txrx main context
  452. * @cookie: cookie used to lookup virtual address
  453. *
  454. * Return: Pointer to the Rx descriptor
  455. */
  456. static inline
  457. struct dp_rx_desc *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc,
  458. uint32_t cookie)
  459. {
  460. return dp_get_rx_desc_from_cookie(soc, &soc->rx_desc_status[0], cookie);
  461. }
  462. #else
  463. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  464. uint32_t pool_size,
  465. struct rx_desc_pool *rx_desc_pool);
  466. /**
  467. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  468. * the Rx descriptor on Rx DMA source ring buffer
  469. * @soc: core txrx main context
  470. * @cookie: cookie used to lookup virtual address
  471. *
  472. * Return: void *: Virtual Address of the Rx descriptor
  473. */
  474. static inline
  475. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  476. {
  477. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  478. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  479. struct rx_desc_pool *rx_desc_pool;
  480. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  481. return NULL;
  482. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  483. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  484. return NULL;
  485. return &rx_desc_pool->array[index].rx_desc;
  486. }
  487. /**
  488. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  489. * the Rx descriptor on monitor ring buffer
  490. * @soc: core txrx main context
  491. * @cookie: cookie used to lookup virtual address
  492. *
  493. * Return: void *: Virtual Address of the Rx descriptor
  494. */
  495. static inline
  496. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  497. {
  498. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  499. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  500. /* TODO */
  501. /* Add sanity for pool_id & index */
  502. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  503. }
  504. /**
  505. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  506. * the Rx descriptor on monitor status ring buffer
  507. * @soc: core txrx main context
  508. * @cookie: cookie used to lookup virtual address
  509. *
  510. * Return: void *: Virtual Address of the Rx descriptor
  511. */
  512. static inline
  513. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  514. {
  515. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  516. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  517. /* TODO */
  518. /* Add sanity for pool_id & index */
  519. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  520. }
  521. #endif /* RX_DESC_MULTI_PAGE_ALLOC */
  522. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  523. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  524. {
  525. return vdev->ap_bridge_enabled;
  526. }
  527. #ifdef DP_RX_DESC_COOKIE_INVALIDATE
  528. static inline QDF_STATUS
  529. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  530. {
  531. if (qdf_unlikely(HAL_RX_REO_BUF_COOKIE_INVALID_GET(ring_desc)))
  532. return QDF_STATUS_E_FAILURE;
  533. HAL_RX_REO_BUF_COOKIE_INVALID_SET(ring_desc);
  534. return QDF_STATUS_SUCCESS;
  535. }
  536. /**
  537. * dp_rx_cookie_reset_invalid_bit() - Reset the invalid bit of the cookie
  538. * field in ring descriptor
  539. * @ring_desc: ring descriptor
  540. *
  541. * Return: None
  542. */
  543. static inline void
  544. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  545. {
  546. HAL_RX_REO_BUF_COOKIE_INVALID_RESET(ring_desc);
  547. }
  548. #else
  549. static inline QDF_STATUS
  550. dp_rx_cookie_check_and_invalidate(hal_ring_desc_t ring_desc)
  551. {
  552. return QDF_STATUS_SUCCESS;
  553. }
  554. static inline void
  555. dp_rx_cookie_reset_invalid_bit(hal_ring_desc_t ring_desc)
  556. {
  557. }
  558. #endif
  559. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  560. QDF_STATUS dp_rx_desc_pool_is_allocated(struct rx_desc_pool *rx_desc_pool);
  561. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  562. uint32_t pool_size,
  563. struct rx_desc_pool *rx_desc_pool);
  564. void dp_rx_desc_pool_init(struct dp_soc *soc, uint32_t pool_id,
  565. uint32_t pool_size,
  566. struct rx_desc_pool *rx_desc_pool);
  567. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  568. union dp_rx_desc_list_elem_t **local_desc_list,
  569. union dp_rx_desc_list_elem_t **tail,
  570. uint16_t pool_id,
  571. struct rx_desc_pool *rx_desc_pool);
  572. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  573. struct rx_desc_pool *rx_desc_pool,
  574. uint16_t num_descs,
  575. union dp_rx_desc_list_elem_t **desc_list,
  576. union dp_rx_desc_list_elem_t **tail);
  577. QDF_STATUS dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev);
  578. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev);
  579. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev);
  580. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev);
  581. void dp_rx_desc_pool_deinit(struct dp_soc *soc,
  582. struct rx_desc_pool *rx_desc_pool,
  583. uint32_t pool_id);
  584. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  585. QDF_STATUS dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev);
  586. void dp_rx_pdev_buffers_free(struct dp_pdev *pdev);
  587. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  588. void dp_print_napi_stats(struct dp_soc *soc);
  589. /**
  590. * dp_rx_vdev_detach() - detach vdev from dp rx
  591. * @vdev: virtual device instance
  592. *
  593. * Return: QDF_STATUS_SUCCESS: success
  594. * QDF_STATUS_E_RESOURCES: Error return
  595. */
  596. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev);
  597. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  598. uint32_t
  599. dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  600. uint8_t reo_ring_num,
  601. uint32_t quota);
  602. /**
  603. * dp_rx_err_process() - Processes error frames routed to REO error ring
  604. * @int_ctx: pointer to DP interrupt context
  605. * @soc: core txrx main context
  606. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  607. * @quota: No. of units (packets) that can be serviced in one shot.
  608. *
  609. * This function implements error processing and top level demultiplexer
  610. * for all the frames routed to REO error ring.
  611. *
  612. * Return: uint32_t: No. of elements processed
  613. */
  614. uint32_t dp_rx_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  615. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  616. /**
  617. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  618. * @int_ctx: pointer to DP interrupt context
  619. * @soc: core txrx main context
  620. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  621. * @quota: No. of units (packets) that can be serviced in one shot.
  622. *
  623. * This function implements error processing and top level demultiplexer
  624. * for all the frames routed to WBM2HOST sw release ring.
  625. *
  626. * Return: uint32_t: No. of elements processed
  627. */
  628. uint32_t
  629. dp_rx_wbm_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  630. hal_ring_handle_t hal_ring_hdl, uint32_t quota);
  631. /**
  632. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  633. * multiple nbufs.
  634. * @soc: core txrx main context
  635. * @nbuf: pointer to the first msdu of an amsdu.
  636. *
  637. * This function implements the creation of RX frag_list for cases
  638. * where an MSDU is spread across multiple nbufs.
  639. *
  640. * Return: returns the head nbuf which contains complete frag_list.
  641. */
  642. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf);
  643. /*
  644. * dp_rx_desc_nbuf_and_pool_free() - free the sw rx desc pool called during
  645. * de-initialization of wifi module.
  646. *
  647. * @soc: core txrx main context
  648. * @pool_id: pool_id which is one of 3 mac_ids
  649. * @rx_desc_pool: rx descriptor pool pointer
  650. *
  651. * Return: None
  652. */
  653. void dp_rx_desc_nbuf_and_pool_free(struct dp_soc *soc, uint32_t pool_id,
  654. struct rx_desc_pool *rx_desc_pool);
  655. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  656. /*
  657. * dp_rx_desc_nbuf_free() - free the sw rx desc nbufs called during
  658. * de-initialization of wifi module.
  659. *
  660. * @soc: core txrx main context
  661. * @pool_id: pool_id which is one of 3 mac_ids
  662. * @rx_desc_pool: rx descriptor pool pointer
  663. *
  664. * Return: None
  665. */
  666. void dp_rx_desc_nbuf_free(struct dp_soc *soc,
  667. struct rx_desc_pool *rx_desc_pool);
  668. #ifdef DP_RX_MON_MEM_FRAG
  669. /*
  670. * dp_rx_desc_frag_free() - free the sw rx desc frag called during
  671. * de-initialization of wifi module.
  672. *
  673. * @soc: core txrx main context
  674. * @rx_desc_pool: rx descriptor pool pointer
  675. *
  676. * Return: None
  677. */
  678. void dp_rx_desc_frag_free(struct dp_soc *soc,
  679. struct rx_desc_pool *rx_desc_pool);
  680. #else
  681. static inline
  682. void dp_rx_desc_frag_free(struct dp_soc *soc,
  683. struct rx_desc_pool *rx_desc_pool)
  684. {
  685. }
  686. #endif
  687. /*
  688. * dp_rx_desc_pool_free() - free the sw rx desc array called during
  689. * de-initialization of wifi module.
  690. *
  691. * @soc: core txrx main context
  692. * @rx_desc_pool: rx descriptor pool pointer
  693. *
  694. * Return: None
  695. */
  696. void dp_rx_desc_pool_free(struct dp_soc *soc,
  697. struct rx_desc_pool *rx_desc_pool);
  698. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  699. struct dp_peer *peer);
  700. #ifdef RX_DESC_LOGGING
  701. /*
  702. * dp_rx_desc_alloc_dbg_info() - Alloc memory for rx descriptor debug
  703. * structure
  704. * @rx_desc: rx descriptor pointer
  705. *
  706. * Return: None
  707. */
  708. static inline
  709. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  710. {
  711. rx_desc->dbg_info = qdf_mem_malloc(sizeof(struct dp_rx_desc_dbg_info));
  712. }
  713. /*
  714. * dp_rx_desc_free_dbg_info() - Free rx descriptor debug
  715. * structure memory
  716. * @rx_desc: rx descriptor pointer
  717. *
  718. * Return: None
  719. */
  720. static inline
  721. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  722. {
  723. qdf_mem_free(rx_desc->dbg_info);
  724. }
  725. /*
  726. * dp_rx_desc_update_dbg_info() - Update rx descriptor debug info
  727. * structure memory
  728. * @rx_desc: rx descriptor pointer
  729. *
  730. * Return: None
  731. */
  732. static
  733. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  734. const char *func_name, uint8_t flag)
  735. {
  736. struct dp_rx_desc_dbg_info *info = rx_desc->dbg_info;
  737. if (!info)
  738. return;
  739. if (flag == RX_DESC_REPLENISHED) {
  740. qdf_str_lcopy(info->replenish_caller, func_name,
  741. QDF_MEM_FUNC_NAME_SIZE);
  742. info->replenish_ts = qdf_get_log_timestamp();
  743. } else {
  744. qdf_str_lcopy(info->freelist_caller, func_name,
  745. QDF_MEM_FUNC_NAME_SIZE);
  746. info->freelist_ts = qdf_get_log_timestamp();
  747. info->prev_nbuf = rx_desc->nbuf;
  748. info->prev_nbuf_data_addr = rx_desc->nbuf_data_addr;
  749. rx_desc->nbuf_data_addr = NULL;
  750. }
  751. }
  752. #else
  753. static inline
  754. void dp_rx_desc_alloc_dbg_info(struct dp_rx_desc *rx_desc)
  755. {
  756. }
  757. static inline
  758. void dp_rx_desc_free_dbg_info(struct dp_rx_desc *rx_desc)
  759. {
  760. }
  761. static inline
  762. void dp_rx_desc_update_dbg_info(struct dp_rx_desc *rx_desc,
  763. const char *func_name, uint8_t flag)
  764. {
  765. }
  766. #endif /* RX_DESC_LOGGING */
  767. /**
  768. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  769. *
  770. * @head: pointer to the head of local free list
  771. * @tail: pointer to the tail of local free list
  772. * @new: new descriptor that is added to the free list
  773. * @func_name: caller func name
  774. *
  775. * Return: void:
  776. */
  777. static inline
  778. void __dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  779. union dp_rx_desc_list_elem_t **tail,
  780. struct dp_rx_desc *new, const char *func_name)
  781. {
  782. qdf_assert(head && new);
  783. dp_rx_desc_update_dbg_info(new, func_name, RX_DESC_IN_FREELIST);
  784. new->nbuf = NULL;
  785. new->in_use = 0;
  786. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  787. *head = (union dp_rx_desc_list_elem_t *)new;
  788. /* reset tail if head->next is NULL */
  789. if (!*tail || !(*head)->next)
  790. *tail = *head;
  791. }
  792. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  793. uint8_t mac_id);
  794. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  795. qdf_nbuf_t mpdu, bool mpdu_done, uint8_t mac_id);
  796. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
  797. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  798. void dp_2k_jump_handle(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  799. uint16_t peer_id, uint8_t tid);
  800. #define DP_RX_HEAD_APPEND(head, elem) \
  801. do { \
  802. qdf_nbuf_set_next((elem), (head)); \
  803. (head) = (elem); \
  804. } while (0)
  805. #define DP_RX_LIST_APPEND(head, tail, elem) \
  806. do { \
  807. if (!(head)) { \
  808. (head) = (elem); \
  809. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  810. } else { \
  811. qdf_nbuf_set_next((tail), (elem)); \
  812. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  813. } \
  814. (tail) = (elem); \
  815. qdf_nbuf_set_next((tail), NULL); \
  816. } while (0)
  817. #define DP_RX_MERGE_TWO_LIST(phead, ptail, chead, ctail) \
  818. do { \
  819. if (!(phead)) { \
  820. (phead) = (chead); \
  821. } else { \
  822. qdf_nbuf_set_next((ptail), (chead)); \
  823. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(phead) += \
  824. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(chead); \
  825. } \
  826. (ptail) = (ctail); \
  827. qdf_nbuf_set_next((ptail), NULL); \
  828. } while (0)
  829. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM)
  830. /*
  831. * on some third-party platform, the memory below 0x2000
  832. * is reserved for target use, so any memory allocated in this
  833. * region should not be used by host
  834. */
  835. #define MAX_RETRY 50
  836. #define DP_PHY_ADDR_RESERVED 0x2000
  837. #elif defined(BUILD_X86)
  838. /*
  839. * in M2M emulation platforms (x86) the memory below 0x50000000
  840. * is reserved for target use, so any memory allocated in this
  841. * region should not be used by host
  842. */
  843. #define MAX_RETRY 100
  844. #define DP_PHY_ADDR_RESERVED 0x50000000
  845. #endif
  846. #if defined(QCA_PADDR_CHECK_ON_3TH_PLATFORM) || defined(BUILD_X86)
  847. /**
  848. * dp_check_paddr() - check if current phy address is valid or not
  849. * @dp_soc: core txrx main context
  850. * @rx_netbuf: skb buffer
  851. * @paddr: physical address
  852. * @rx_desc_pool: struct of rx descriptor pool
  853. * check if the physical address of the nbuf->data is less
  854. * than DP_PHY_ADDR_RESERVED then free the nbuf and try
  855. * allocating new nbuf. We can try for 100 times.
  856. *
  857. * This is a temp WAR till we fix it properly.
  858. *
  859. * Return: success or failure.
  860. */
  861. static inline
  862. int dp_check_paddr(struct dp_soc *dp_soc,
  863. qdf_nbuf_t *rx_netbuf,
  864. qdf_dma_addr_t *paddr,
  865. struct rx_desc_pool *rx_desc_pool)
  866. {
  867. uint32_t nbuf_retry = 0;
  868. int32_t ret;
  869. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  870. return QDF_STATUS_SUCCESS;
  871. do {
  872. dp_debug("invalid phy addr 0x%llx, trying again",
  873. (uint64_t)(*paddr));
  874. nbuf_retry++;
  875. if ((*rx_netbuf)) {
  876. /* Not freeing buffer intentionally.
  877. * Observed that same buffer is getting
  878. * re-allocated resulting in longer load time
  879. * WMI init timeout.
  880. * This buffer is anyway not useful so skip it.
  881. *.Add such buffer to invalid list and free
  882. *.them when driver unload.
  883. **/
  884. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  885. *rx_netbuf,
  886. QDF_DMA_FROM_DEVICE,
  887. rx_desc_pool->buf_size);
  888. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  889. *rx_netbuf);
  890. }
  891. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  892. rx_desc_pool->buf_size,
  893. RX_BUFFER_RESERVATION,
  894. rx_desc_pool->buf_alignment,
  895. FALSE);
  896. if (qdf_unlikely(!(*rx_netbuf)))
  897. return QDF_STATUS_E_FAILURE;
  898. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  899. *rx_netbuf,
  900. QDF_DMA_FROM_DEVICE,
  901. rx_desc_pool->buf_size);
  902. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  903. qdf_nbuf_free(*rx_netbuf);
  904. *rx_netbuf = NULL;
  905. continue;
  906. }
  907. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  908. if (qdf_likely(*paddr > DP_PHY_ADDR_RESERVED))
  909. return QDF_STATUS_SUCCESS;
  910. } while (nbuf_retry < MAX_RETRY);
  911. if ((*rx_netbuf)) {
  912. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  913. *rx_netbuf,
  914. QDF_DMA_FROM_DEVICE,
  915. rx_desc_pool->buf_size);
  916. qdf_nbuf_queue_add(&dp_soc->invalid_buf_queue,
  917. *rx_netbuf);
  918. }
  919. return QDF_STATUS_E_FAILURE;
  920. }
  921. #else
  922. static inline
  923. int dp_check_paddr(struct dp_soc *dp_soc,
  924. qdf_nbuf_t *rx_netbuf,
  925. qdf_dma_addr_t *paddr,
  926. struct rx_desc_pool *rx_desc_pool)
  927. {
  928. return QDF_STATUS_SUCCESS;
  929. }
  930. #endif
  931. /**
  932. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  933. * the MSDU Link Descriptor
  934. * @soc: core txrx main context
  935. * @buf_info: buf_info includes cookie that is used to lookup
  936. * virtual address of link descriptor after deriving the page id
  937. * and the offset or index of the desc on the associatde page.
  938. *
  939. * This is the VA of the link descriptor, that HAL layer later uses to
  940. * retrieve the list of MSDU's for a given MPDU.
  941. *
  942. * Return: void *: Virtual Address of the Rx descriptor
  943. */
  944. static inline
  945. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  946. struct hal_buf_info *buf_info)
  947. {
  948. void *link_desc_va;
  949. struct qdf_mem_multi_page_t *pages;
  950. uint16_t page_id = LINK_DESC_COOKIE_PAGE_ID(buf_info->sw_cookie);
  951. pages = &soc->link_desc_pages;
  952. if (!pages)
  953. return NULL;
  954. if (qdf_unlikely(page_id >= pages->num_pages))
  955. return NULL;
  956. link_desc_va = pages->dma_pages[page_id].page_v_addr_start +
  957. (buf_info->paddr - pages->dma_pages[page_id].page_p_addr);
  958. return link_desc_va;
  959. }
  960. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  961. #ifdef DISABLE_EAPOL_INTRABSS_FWD
  962. #ifdef WLAN_FEATURE_11BE_MLO
  963. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  964. qdf_nbuf_t nbuf)
  965. {
  966. struct qdf_mac_addr *self_mld_mac_addr =
  967. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw;
  968. return qdf_is_macaddr_equal(self_mld_mac_addr,
  969. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  970. QDF_NBUF_DEST_MAC_OFFSET);
  971. }
  972. #else
  973. static inline bool dp_nbuf_dst_addr_is_mld_addr(struct dp_vdev *vdev,
  974. qdf_nbuf_t nbuf)
  975. {
  976. return false;
  977. }
  978. #endif
  979. static inline bool dp_nbuf_dst_addr_is_self_addr(struct dp_vdev *vdev,
  980. qdf_nbuf_t nbuf)
  981. {
  982. return qdf_is_macaddr_equal((struct qdf_mac_addr *)vdev->mac_addr.raw,
  983. (struct qdf_mac_addr *)qdf_nbuf_data(nbuf) +
  984. QDF_NBUF_DEST_MAC_OFFSET);
  985. }
  986. /*
  987. * dp_rx_intrabss_eapol_drop_check() - API For EAPOL
  988. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  989. * @soc: core txrx main context
  990. * @ta_peer: source peer entry
  991. * @rx_tlv_hdr: start address of rx tlvs
  992. * @nbuf: nbuf that has to be intrabss forwarded
  993. *
  994. * Return: true if it is forwarded else false
  995. */
  996. static inline
  997. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  998. struct dp_peer *ta_peer,
  999. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1000. {
  1001. if (qdf_unlikely(qdf_nbuf_is_ipv4_eapol_pkt(nbuf) &&
  1002. !(dp_nbuf_dst_addr_is_self_addr(ta_peer->vdev, nbuf) ||
  1003. dp_nbuf_dst_addr_is_mld_addr(ta_peer->vdev, nbuf)))) {
  1004. qdf_nbuf_free(nbuf);
  1005. DP_STATS_INC(soc, rx.err.intrabss_eapol_drop, 1);
  1006. return true;
  1007. }
  1008. return false;
  1009. }
  1010. #else /* DISABLE_EAPOL_INTRABSS_FWD */
  1011. static inline
  1012. bool dp_rx_intrabss_eapol_drop_check(struct dp_soc *soc,
  1013. struct dp_peer *ta_peer,
  1014. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf)
  1015. {
  1016. return false;
  1017. }
  1018. #endif /* DISABLE_EAPOL_INTRABSS_FWD */
  1019. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  1020. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1021. struct cdp_tid_rx_stats *tid_stats);
  1022. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_peer *ta_peer,
  1023. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1024. struct cdp_tid_rx_stats *tid_stats);
  1025. /**
  1026. * dp_rx_defrag_concat() - Concatenate the fragments
  1027. *
  1028. * @dst: destination pointer to the buffer
  1029. * @src: source pointer from where the fragment payload is to be copied
  1030. *
  1031. * Return: QDF_STATUS
  1032. */
  1033. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  1034. {
  1035. /*
  1036. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  1037. * to provide space for src, the headroom portion is copied from
  1038. * the original dst buffer to the larger new dst buffer.
  1039. * (This is needed, because the headroom of the dst buffer
  1040. * contains the rx desc.)
  1041. */
  1042. if (!qdf_nbuf_cat(dst, src)) {
  1043. /*
  1044. * qdf_nbuf_cat does not free the src memory.
  1045. * Free src nbuf before returning
  1046. * For failure case the caller takes of freeing the nbuf
  1047. */
  1048. qdf_nbuf_free(src);
  1049. return QDF_STATUS_SUCCESS;
  1050. }
  1051. return QDF_STATUS_E_DEFRAG_ERROR;
  1052. }
  1053. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1054. #ifndef FEATURE_WDS
  1055. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  1056. struct dp_peer *ta_peer, qdf_nbuf_t nbuf);
  1057. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  1058. {
  1059. return QDF_STATUS_SUCCESS;
  1060. }
  1061. static inline void
  1062. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  1063. uint8_t *rx_tlv_hdr,
  1064. struct dp_peer *ta_peer,
  1065. qdf_nbuf_t nbuf,
  1066. struct hal_rx_msdu_metadata msdu_metadata)
  1067. {
  1068. }
  1069. #endif
  1070. /*
  1071. * dp_rx_desc_dump() - dump the sw rx descriptor
  1072. *
  1073. * @rx_desc: sw rx descriptor
  1074. */
  1075. static inline void dp_rx_desc_dump(struct dp_rx_desc *rx_desc)
  1076. {
  1077. dp_info("rx_desc->nbuf: %pK, rx_desc->cookie: %d, rx_desc->pool_id: %d, rx_desc->in_use: %d, rx_desc->unmapped: %d",
  1078. rx_desc->nbuf, rx_desc->cookie, rx_desc->pool_id,
  1079. rx_desc->in_use, rx_desc->unmapped);
  1080. }
  1081. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1082. /*
  1083. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  1084. * In qwrap mode, packets originated from
  1085. * any vdev should not loopback and
  1086. * should be dropped.
  1087. * @vdev: vdev on which rx packet is received
  1088. * @nbuf: rx pkt
  1089. *
  1090. */
  1091. #if ATH_SUPPORT_WRAP
  1092. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1093. qdf_nbuf_t nbuf)
  1094. {
  1095. struct dp_vdev *psta_vdev;
  1096. struct dp_pdev *pdev = vdev->pdev;
  1097. uint8_t *data = qdf_nbuf_data(nbuf);
  1098. if (qdf_unlikely(vdev->proxysta_vdev)) {
  1099. /* In qwrap isolation mode, allow loopback packets as all
  1100. * packets go to RootAP and Loopback on the mpsta.
  1101. */
  1102. if (vdev->isolation_vdev)
  1103. return false;
  1104. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  1105. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  1106. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  1107. &data[QDF_MAC_ADDR_SIZE],
  1108. QDF_MAC_ADDR_SIZE))) {
  1109. /* Drop packet if source address is equal to
  1110. * any of the vdev addresses.
  1111. */
  1112. return true;
  1113. }
  1114. }
  1115. }
  1116. return false;
  1117. }
  1118. #else
  1119. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  1120. qdf_nbuf_t nbuf)
  1121. {
  1122. return false;
  1123. }
  1124. #endif
  1125. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1126. #if defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) ||\
  1127. defined(WLAN_SUPPORT_RX_TAG_STATISTICS) ||\
  1128. defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1129. #include "dp_rx_tag.h"
  1130. #endif
  1131. #if !defined(WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG) &&\
  1132. !defined(WLAN_SUPPORT_RX_FLOW_TAG)
  1133. /**
  1134. * dp_rx_update_protocol_tag() - Reads CCE metadata from the RX MSDU end TLV
  1135. * and set the corresponding tag in QDF packet
  1136. * @soc: core txrx main context
  1137. * @vdev: vdev on which the packet is received
  1138. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1139. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1140. * @ring_index: REO ring number, not used for error & monitor ring
  1141. * @is_reo_exception: flag to indicate if rx from REO ring or exception ring
  1142. * @is_update_stats: flag to indicate whether to update stats or not
  1143. * Return: void
  1144. */
  1145. static inline void
  1146. dp_rx_update_protocol_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1147. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  1148. uint16_t ring_index,
  1149. bool is_reo_exception, bool is_update_stats)
  1150. {
  1151. }
  1152. #endif
  1153. #ifndef WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG
  1154. /**
  1155. * dp_rx_err_cce_drop() - Reads CCE metadata from the RX MSDU end TLV
  1156. * and returns whether cce metadata matches
  1157. * @soc: core txrx main context
  1158. * @vdev: vdev on which the packet is received
  1159. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1160. * @rx_tlv_hdr: rBbase address where the RX TLVs starts
  1161. * Return: bool
  1162. */
  1163. static inline bool
  1164. dp_rx_err_cce_drop(struct dp_soc *soc, struct dp_vdev *vdev,
  1165. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  1166. {
  1167. return false;
  1168. }
  1169. #endif /* WLAN_SUPPORT_RX_PROTOCOL_TYPE_TAG */
  1170. #ifndef WLAN_SUPPORT_RX_FLOW_TAG
  1171. /**
  1172. * dp_rx_update_flow_tag() - Reads FSE metadata from the RX MSDU end TLV
  1173. * and set the corresponding tag in QDF packet
  1174. * @soc: core txrx main context
  1175. * @vdev: vdev on which the packet is received
  1176. * @nbuf: QDF pkt buffer on which the protocol tag should be set
  1177. * @rx_tlv_hdr: base address where the RX TLVs starts
  1178. * @is_update_stats: flag to indicate whether to update stats or not
  1179. *
  1180. * Return: void
  1181. */
  1182. static inline void
  1183. dp_rx_update_flow_tag(struct dp_soc *soc, struct dp_vdev *vdev,
  1184. qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr, bool update_stats)
  1185. {
  1186. }
  1187. #endif /* WLAN_SUPPORT_RX_FLOW_TAG */
  1188. /*
  1189. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  1190. * called during dp rx initialization
  1191. * and at the end of dp_rx_process.
  1192. *
  1193. * @soc: core txrx main context
  1194. * @mac_id: mac_id which is one of 3 mac_ids
  1195. * @dp_rxdma_srng: dp rxdma circular ring
  1196. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1197. * @num_req_buffers: number of buffer to be replenished
  1198. * @desc_list: list of descs if called from dp_rx_process
  1199. * or NULL during dp rx initialization or out of buffer
  1200. * interrupt.
  1201. * @tail: tail of descs list
  1202. * @func_name: name of the caller function
  1203. * Return: return success or failure
  1204. */
  1205. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  1206. struct dp_srng *dp_rxdma_srng,
  1207. struct rx_desc_pool *rx_desc_pool,
  1208. uint32_t num_req_buffers,
  1209. union dp_rx_desc_list_elem_t **desc_list,
  1210. union dp_rx_desc_list_elem_t **tail,
  1211. const char *func_name);
  1212. /*
  1213. * dp_pdev_rx_buffers_attach() - replenish rxdma ring with rx nbufs
  1214. * called during dp rx initialization
  1215. *
  1216. * @soc: core txrx main context
  1217. * @mac_id: mac_id which is one of 3 mac_ids
  1218. * @dp_rxdma_srng: dp rxdma circular ring
  1219. * @rx_desc_pool: Pointer to free Rx descriptor pool
  1220. * @num_req_buffers: number of buffer to be replenished
  1221. *
  1222. * Return: return success or failure
  1223. */
  1224. QDF_STATUS
  1225. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1226. struct dp_srng *dp_rxdma_srng,
  1227. struct rx_desc_pool *rx_desc_pool,
  1228. uint32_t num_req_buffers);
  1229. /**
  1230. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  1231. * (WBM), following error handling
  1232. *
  1233. * @soc: core DP main context
  1234. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  1235. * @buf_addr_info: void pointer to the buffer_addr_info
  1236. * @bm_action: put to idle_list or release to msdu_list
  1237. *
  1238. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1239. */
  1240. QDF_STATUS
  1241. dp_rx_link_desc_return(struct dp_soc *soc, hal_ring_desc_t ring_desc,
  1242. uint8_t bm_action);
  1243. /**
  1244. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  1245. * (WBM) by address
  1246. *
  1247. * @soc: core DP main context
  1248. * @link_desc_addr: link descriptor addr
  1249. *
  1250. * Return: QDF_STATUS_E_FAILURE for failure else QDF_STATUS_SUCCESS
  1251. */
  1252. QDF_STATUS
  1253. dp_rx_link_desc_return_by_addr(struct dp_soc *soc,
  1254. hal_buff_addrinfo_t link_desc_addr,
  1255. uint8_t bm_action);
  1256. /**
  1257. * dp_rxdma_err_process() - RxDMA error processing functionality
  1258. * @soc: core txrx main contex
  1259. * @mac_id: mac id which is one of 3 mac_ids
  1260. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1261. * @quota: No. of units (packets) that can be serviced in one shot.
  1262. *
  1263. * Return: num of buffers processed
  1264. */
  1265. uint32_t
  1266. dp_rxdma_err_process(struct dp_intr *int_ctx, struct dp_soc *soc,
  1267. uint32_t mac_id, uint32_t quota);
  1268. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1269. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  1270. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1271. uint8_t *rx_tlv_hdr);
  1272. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  1273. struct dp_peer *peer);
  1274. /*
  1275. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  1276. *
  1277. * @soc: core txrx main context
  1278. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1279. * @ring_desc: opaque pointer to the RX ring descriptor
  1280. * @rx_desc: host rx descriptor
  1281. *
  1282. * Return: void
  1283. */
  1284. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  1285. hal_ring_handle_t hal_ring_hdl,
  1286. hal_ring_desc_t ring_desc,
  1287. struct dp_rx_desc *rx_desc);
  1288. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  1289. #ifdef QCA_PEER_EXT_STATS
  1290. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1291. qdf_nbuf_t nbuf);
  1292. #endif /* QCA_PEER_EXT_STATS */
  1293. #ifdef RX_DESC_DEBUG_CHECK
  1294. /**
  1295. * dp_rx_desc_check_magic() - check the magic value in dp_rx_desc
  1296. * @rx_desc: rx descriptor pointer
  1297. *
  1298. * Return: true, if magic is correct, else false.
  1299. */
  1300. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1301. {
  1302. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC))
  1303. return false;
  1304. rx_desc->magic = 0;
  1305. return true;
  1306. }
  1307. /**
  1308. * dp_rx_desc_prep() - prepare rx desc
  1309. * @rx_desc: rx descriptor pointer to be prepared
  1310. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1311. *
  1312. * Note: assumption is that we are associating a nbuf which is mapped
  1313. *
  1314. * Return: none
  1315. */
  1316. static inline
  1317. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1318. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1319. {
  1320. rx_desc->magic = DP_RX_DESC_MAGIC;
  1321. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1322. rx_desc->unmapped = 0;
  1323. rx_desc->nbuf_data_addr = (uint8_t *)qdf_nbuf_data(rx_desc->nbuf);
  1324. }
  1325. /**
  1326. * dp_rx_desc_frag_prep() - prepare rx desc
  1327. * @rx_desc: rx descriptor pointer to be prepared
  1328. * @nbuf_frag_info_t: struct dp_rx_nbuf_frag_info *
  1329. *
  1330. * Note: assumption is that we frag address is mapped
  1331. *
  1332. * Return: none
  1333. */
  1334. #ifdef DP_RX_MON_MEM_FRAG
  1335. static inline
  1336. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1337. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1338. {
  1339. rx_desc->magic = DP_RX_DESC_MAGIC;
  1340. rx_desc->rx_buf_start =
  1341. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1342. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1343. rx_desc->unmapped = 0;
  1344. }
  1345. #else
  1346. static inline
  1347. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1348. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1349. {
  1350. }
  1351. #endif /* DP_RX_MON_MEM_FRAG */
  1352. /**
  1353. * dp_rx_desc_paddr_sanity_check() - paddr sanity for ring desc vs rx_desc
  1354. * @rx_desc: rx descriptor
  1355. * @ring_paddr: paddr obatined from the ring
  1356. *
  1357. * Returns: QDF_STATUS
  1358. */
  1359. static inline
  1360. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1361. uint64_t ring_paddr)
  1362. {
  1363. return (ring_paddr == qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1364. }
  1365. #else
  1366. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  1367. {
  1368. return true;
  1369. }
  1370. static inline
  1371. void dp_rx_desc_prep(struct dp_rx_desc *rx_desc,
  1372. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1373. {
  1374. rx_desc->nbuf = (nbuf_frag_info_t->virt_addr).nbuf;
  1375. rx_desc->unmapped = 0;
  1376. }
  1377. #ifdef DP_RX_MON_MEM_FRAG
  1378. static inline
  1379. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1380. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1381. {
  1382. rx_desc->rx_buf_start =
  1383. (uint8_t *)((nbuf_frag_info_t->virt_addr).vaddr);
  1384. rx_desc->paddr_buf_start = nbuf_frag_info_t->paddr;
  1385. rx_desc->unmapped = 0;
  1386. }
  1387. #else
  1388. static inline
  1389. void dp_rx_desc_frag_prep(struct dp_rx_desc *rx_desc,
  1390. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t)
  1391. {
  1392. }
  1393. #endif /* DP_RX_MON_MEM_FRAG */
  1394. static inline
  1395. bool dp_rx_desc_paddr_sanity_check(struct dp_rx_desc *rx_desc,
  1396. uint64_t ring_paddr)
  1397. {
  1398. return true;
  1399. }
  1400. #endif /* RX_DESC_DEBUG_CHECK */
  1401. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  1402. bool is_mon_dest_desc);
  1403. void dp_rx_process_rxdma_err(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1404. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1405. uint8_t err_code, uint8_t mac_id);
  1406. #ifndef QCA_MULTIPASS_SUPPORT
  1407. static inline
  1408. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf, uint8_t tid)
  1409. {
  1410. return false;
  1411. }
  1412. #else
  1413. bool dp_rx_multipass_process(struct dp_peer *peer, qdf_nbuf_t nbuf,
  1414. uint8_t tid);
  1415. #endif
  1416. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1417. #ifndef WLAN_RX_PKT_CAPTURE_ENH
  1418. static inline
  1419. QDF_STATUS dp_peer_set_rx_capture_enabled(struct dp_pdev *pdev,
  1420. struct dp_peer *peer_handle,
  1421. bool value, uint8_t *mac_addr)
  1422. {
  1423. return QDF_STATUS_SUCCESS;
  1424. }
  1425. #endif
  1426. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1427. /**
  1428. * dp_rx_deliver_to_stack() - deliver pkts to network stack
  1429. * Caller to hold peer refcount and check for valid peer
  1430. * @soc: soc
  1431. * @vdev: vdev
  1432. * @peer: peer
  1433. * @nbuf_head: skb list head
  1434. * @nbuf_tail: skb list tail
  1435. *
  1436. * Return: QDF_STATUS
  1437. */
  1438. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1439. struct dp_vdev *vdev,
  1440. struct dp_peer *peer,
  1441. qdf_nbuf_t nbuf_head,
  1442. qdf_nbuf_t nbuf_tail);
  1443. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1444. /**
  1445. * dp_rx_eapol_deliver_to_stack() - deliver pkts to network stack
  1446. * caller to hold peer refcount and check for valid peer
  1447. * @soc: soc
  1448. * @vdev: vdev
  1449. * @peer: peer
  1450. * @nbuf_head: skb list head
  1451. * @nbuf_tail: skb list tail
  1452. *
  1453. * return: QDF_STATUS
  1454. */
  1455. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1456. struct dp_vdev *vdev,
  1457. struct dp_peer *peer,
  1458. qdf_nbuf_t nbuf_head,
  1459. qdf_nbuf_t nbuf_tail);
  1460. #endif
  1461. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1462. #ifdef QCA_OL_RX_LOCK_LESS_ACCESS
  1463. /*
  1464. * dp_rx_ring_access_start()- Wrapper function to log access start of a hal ring
  1465. * @int_ctx: pointer to DP interrupt context
  1466. * @dp_soc - DP soc structure pointer
  1467. * @hal_ring_hdl - HAL ring handle
  1468. *
  1469. * Return: 0 on success; error on failure
  1470. */
  1471. static inline int
  1472. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1473. hal_ring_handle_t hal_ring_hdl)
  1474. {
  1475. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  1476. }
  1477. /*
  1478. * dp_rx_ring_access_end()- Wrapper function to log access end of a hal ring
  1479. * @int_ctx: pointer to DP interrupt context
  1480. * @dp_soc - DP soc structure pointer
  1481. * @hal_ring_hdl - HAL ring handle
  1482. *
  1483. * Return - None
  1484. */
  1485. static inline void
  1486. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1487. hal_ring_handle_t hal_ring_hdl)
  1488. {
  1489. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  1490. }
  1491. #else
  1492. static inline int
  1493. dp_rx_srng_access_start(struct dp_intr *int_ctx, struct dp_soc *soc,
  1494. hal_ring_handle_t hal_ring_hdl)
  1495. {
  1496. return dp_srng_access_start(int_ctx, soc, hal_ring_hdl);
  1497. }
  1498. static inline void
  1499. dp_rx_srng_access_end(struct dp_intr *int_ctx, struct dp_soc *soc,
  1500. hal_ring_handle_t hal_ring_hdl)
  1501. {
  1502. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1503. }
  1504. #endif
  1505. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1506. /*
  1507. * dp_rx_wbm_sg_list_reset() - Initialize sg list
  1508. *
  1509. * This api should be called at soc init and afterevery sg processing.
  1510. *@soc: DP SOC handle
  1511. */
  1512. static inline void dp_rx_wbm_sg_list_reset(struct dp_soc *soc)
  1513. {
  1514. if (soc) {
  1515. soc->wbm_sg_param.wbm_is_first_msdu_in_sg = false;
  1516. soc->wbm_sg_param.wbm_sg_nbuf_head = NULL;
  1517. soc->wbm_sg_param.wbm_sg_nbuf_tail = NULL;
  1518. soc->wbm_sg_param.wbm_sg_desc_msdu_len = 0;
  1519. }
  1520. }
  1521. /*
  1522. * dp_rx_wbm_sg_list_deinit() - De-initialize sg list
  1523. *
  1524. * This api should be called in down path, to avoid any leak.
  1525. *@soc: DP SOC handle
  1526. */
  1527. static inline void dp_rx_wbm_sg_list_deinit(struct dp_soc *soc)
  1528. {
  1529. if (soc) {
  1530. if (soc->wbm_sg_param.wbm_sg_nbuf_head)
  1531. qdf_nbuf_list_free(soc->wbm_sg_param.wbm_sg_nbuf_head);
  1532. dp_rx_wbm_sg_list_reset(soc);
  1533. }
  1534. }
  1535. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1536. #ifdef WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL
  1537. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1538. do { \
  1539. if (!soc->rx_buff_pool[rx_desc->pool_id].is_initialized) { \
  1540. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf); \
  1541. break; \
  1542. } \
  1543. DP_RX_LIST_APPEND(ebuf_head, ebuf_tail, rx_desc->nbuf); \
  1544. if (!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)) { \
  1545. if (!dp_rx_buffer_pool_refill(soc, ebuf_head, \
  1546. rx_desc->pool_id)) \
  1547. DP_RX_MERGE_TWO_LIST(head, tail, \
  1548. ebuf_head, ebuf_tail);\
  1549. ebuf_head = NULL; \
  1550. ebuf_tail = NULL; \
  1551. } \
  1552. } while (0)
  1553. #else
  1554. #define DP_RX_PROCESS_NBUF(soc, head, tail, ebuf_head, ebuf_tail, rx_desc) \
  1555. DP_RX_LIST_APPEND(head, tail, rx_desc->nbuf)
  1556. #endif /* WLAN_FEATURE_RX_PREALLOC_BUFFER_POOL */
  1557. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1558. /*
  1559. * dp_rx_link_desc_refill_duplicate_check() - check if link desc duplicate
  1560. to refill
  1561. * @soc: DP SOC handle
  1562. * @buf_info: the last link desc buf info
  1563. * @ring_buf_info: current buf address pointor including link desc
  1564. *
  1565. * return: none.
  1566. */
  1567. void dp_rx_link_desc_refill_duplicate_check(
  1568. struct dp_soc *soc,
  1569. struct hal_buf_info *buf_info,
  1570. hal_buff_addrinfo_t ring_buf_info);
  1571. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  1572. /**
  1573. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  1574. * @soc : dp_soc handle
  1575. * @pdev: dp_pdev handle
  1576. * @peer_id: peer_id of the peer for which completion came
  1577. * @ppdu_id: ppdu_id
  1578. * @netbuf: Buffer pointer
  1579. *
  1580. * This function is used to deliver rx packet to packet capture
  1581. */
  1582. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1583. uint16_t peer_id, uint32_t is_offload,
  1584. qdf_nbuf_t netbuf);
  1585. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1586. uint32_t is_offload);
  1587. #else
  1588. static inline void
  1589. dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  1590. uint16_t peer_id, uint32_t is_offload,
  1591. qdf_nbuf_t netbuf)
  1592. {
  1593. }
  1594. static inline void
  1595. dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1596. uint32_t is_offload)
  1597. {
  1598. }
  1599. #endif
  1600. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1601. #ifdef FEATURE_MEC
  1602. /**
  1603. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  1604. * back on same vap or a different vap.
  1605. * @soc: core DP main context
  1606. * @peer: dp peer handler
  1607. * @rx_tlv_hdr: start of the rx TLV header
  1608. * @nbuf: pkt buffer
  1609. *
  1610. * Return: bool (true if it is a looped back pkt else false)
  1611. *
  1612. */
  1613. bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1614. struct dp_peer *peer,
  1615. uint8_t *rx_tlv_hdr,
  1616. qdf_nbuf_t nbuf);
  1617. #else
  1618. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  1619. struct dp_peer *peer,
  1620. uint8_t *rx_tlv_hdr,
  1621. qdf_nbuf_t nbuf)
  1622. {
  1623. return false;
  1624. }
  1625. #endif /* FEATURE_MEC */
  1626. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1627. #ifdef RECEIVE_OFFLOAD
  1628. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1629. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt);
  1630. #else
  1631. static inline
  1632. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1633. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1634. {
  1635. }
  1636. #endif
  1637. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1638. uint8_t *rx_tlv_hdr, struct dp_peer *peer,
  1639. uint8_t ring_id,
  1640. struct cdp_tid_rx_stats *tid_stats);
  1641. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1642. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1643. hal_ring_handle_t hal_ring_hdl,
  1644. uint32_t num_entries,
  1645. bool *near_full);
  1646. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1647. void dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1648. hal_ring_desc_t ring_desc);
  1649. #else
  1650. static inline void
  1651. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1652. hal_ring_desc_t ring_desc)
  1653. {
  1654. }
  1655. #endif
  1656. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1657. #ifdef RX_DESC_SANITY_WAR
  1658. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1659. hal_ring_handle_t hal_ring_hdl,
  1660. hal_ring_desc_t ring_desc,
  1661. struct dp_rx_desc *rx_desc);
  1662. #else
  1663. static inline
  1664. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  1665. hal_ring_handle_t hal_ring_hdl,
  1666. hal_ring_desc_t ring_desc,
  1667. struct dp_rx_desc *rx_desc)
  1668. {
  1669. return QDF_STATUS_SUCCESS;
  1670. }
  1671. #endif
  1672. #ifdef DP_RX_DROP_RAW_FRM
  1673. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf);
  1674. #else
  1675. static inline
  1676. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1677. {
  1678. return false;
  1679. }
  1680. #endif
  1681. #ifdef RX_DESC_DEBUG_CHECK
  1682. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1683. hal_ring_desc_t ring_desc,
  1684. struct dp_rx_desc *rx_desc);
  1685. #else
  1686. static inline
  1687. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1688. hal_ring_desc_t ring_desc,
  1689. struct dp_rx_desc *rx_desc)
  1690. {
  1691. return QDF_STATUS_SUCCESS;
  1692. }
  1693. #endif
  1694. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1695. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1696. #else
  1697. static inline
  1698. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1699. {
  1700. }
  1701. #endif
  1702. /**
  1703. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1704. * @nbuf: pointer to the first msdu of an amsdu.
  1705. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1706. *
  1707. * The ipsumed field of the skb is set based on whether HW validated the
  1708. * IP/TCP/UDP checksum.
  1709. *
  1710. * Return: void
  1711. */
  1712. static inline
  1713. void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1714. qdf_nbuf_t nbuf,
  1715. uint8_t *rx_tlv_hdr)
  1716. {
  1717. qdf_nbuf_rx_cksum_t cksum = {0};
  1718. //TODO - Move this to ring desc api
  1719. //HAL_RX_MSDU_DESC_IP_CHKSUM_FAIL_GET
  1720. //HAL_RX_MSDU_DESC_TCP_UDP_CHKSUM_FAIL_GET
  1721. uint32_t ip_csum_err, tcp_udp_csum_er;
  1722. hal_rx_tlv_csum_err_get(pdev->soc->hal_soc, rx_tlv_hdr, &ip_csum_err,
  1723. &tcp_udp_csum_er);
  1724. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1725. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1726. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1727. } else {
  1728. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1729. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1730. }
  1731. }
  1732. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1733. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1734. static inline
  1735. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1736. int max_reap_limit)
  1737. {
  1738. bool limit_hit = false;
  1739. limit_hit =
  1740. (num_reaped >= max_reap_limit) ? true : false;
  1741. if (limit_hit)
  1742. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1743. return limit_hit;
  1744. }
  1745. static inline
  1746. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1747. {
  1748. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1749. }
  1750. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1751. {
  1752. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1753. return cfg->rx_reap_loop_pkt_limit;
  1754. }
  1755. #else
  1756. static inline
  1757. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  1758. int max_reap_limit)
  1759. {
  1760. return false;
  1761. }
  1762. static inline
  1763. bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1764. {
  1765. return false;
  1766. }
  1767. static inline int dp_rx_get_loop_pkt_limit(struct dp_soc *soc)
  1768. {
  1769. return 0;
  1770. }
  1771. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1772. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf);
  1773. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1774. /**
  1775. * dp_rx_is_list_ready() - Make different lists for 4-address
  1776. and 3-address frames
  1777. * @nbuf_head: skb list head
  1778. * @vdev: vdev
  1779. * @peer: peer
  1780. * @peer_id: peer id of new received frame
  1781. * @vdev_id: vdev_id of new received frame
  1782. *
  1783. * Return: true if peer_ids are different.
  1784. */
  1785. static inline bool
  1786. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1787. struct dp_vdev *vdev,
  1788. struct dp_peer *peer,
  1789. uint16_t peer_id,
  1790. uint8_t vdev_id)
  1791. {
  1792. if (nbuf_head && peer && (peer->peer_id != peer_id))
  1793. return true;
  1794. return false;
  1795. }
  1796. #else
  1797. static inline bool
  1798. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1799. struct dp_vdev *vdev,
  1800. struct dp_peer *peer,
  1801. uint16_t peer_id,
  1802. uint8_t vdev_id)
  1803. {
  1804. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  1805. return true;
  1806. return false;
  1807. }
  1808. #endif
  1809. #ifdef QCA_HOST2FW_RXBUF_RING
  1810. static inline uint8_t
  1811. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1812. {
  1813. return DP_DEFRAG_RBM(soc->wbm_sw0_bm_id);
  1814. }
  1815. static inline uint8_t
  1816. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1817. {
  1818. return DP_WBM2SW_RBM(soc->wbm_sw0_bm_id);
  1819. }
  1820. #else
  1821. static inline uint8_t
  1822. dp_rx_get_rx_bm_id(struct dp_soc *soc)
  1823. {
  1824. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  1825. uint8_t wbm2_sw_rx_rel_ring_id;
  1826. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  1827. return HAL_RX_BUF_RBM_SW_BM(soc->wbm_sw0_bm_id,
  1828. wbm2_sw_rx_rel_ring_id);
  1829. }
  1830. static inline uint8_t
  1831. dp_rx_get_defrag_bm_id(struct dp_soc *soc)
  1832. {
  1833. return dp_rx_get_rx_bm_id(soc);
  1834. }
  1835. #endif
  1836. static inline uint16_t
  1837. dp_rx_peer_metadata_peer_id_get(struct dp_soc *soc, uint32_t peer_metadata)
  1838. {
  1839. return soc->arch_ops.dp_rx_peer_metadata_peer_id_get(soc,
  1840. peer_metadata);
  1841. }
  1842. /**
  1843. * dp_rx_desc_pool_init_generic() - Generic Rx descriptors initialization
  1844. * @soc: SOC handle
  1845. * @rx_desc_pool: pointer to RX descriptor pool
  1846. * @pool_id: pool ID
  1847. *
  1848. * Return: None
  1849. */
  1850. QDF_STATUS dp_rx_desc_pool_init_generic(struct dp_soc *soc,
  1851. struct rx_desc_pool *rx_desc_pool,
  1852. uint32_t pool_id);
  1853. void dp_rx_desc_pool_deinit_generic(struct dp_soc *soc,
  1854. struct rx_desc_pool *rx_desc_pool,
  1855. uint32_t pool_id);
  1856. #endif /* _DP_RX_H */