dp_be_rx.c 34 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "cdp_txrx_cmn_struct.h"
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_be_rx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_be_rx.h"
  26. #include "hal_api.h"
  27. #include "hal_be_api.h"
  28. #include "qdf_nbuf.h"
  29. #ifdef MESH_MODE_SUPPORT
  30. #include "if_meta_hdr.h"
  31. #endif
  32. #include "dp_internal.h"
  33. #include "dp_ipa.h"
  34. #ifdef FEATURE_WDS
  35. #include "dp_txrx_wds.h"
  36. #endif
  37. #include "dp_hist.h"
  38. #include "dp_rx_buffer_pool.h"
  39. #ifndef AST_OFFLOAD_ENABLE
  40. static void
  41. dp_rx_wds_learn(struct dp_soc *soc,
  42. struct dp_vdev *vdev,
  43. uint8_t *rx_tlv_hdr,
  44. struct dp_peer *peer,
  45. qdf_nbuf_t nbuf,
  46. struct hal_rx_msdu_metadata msdu_metadata)
  47. {
  48. /* WDS Source Port Learning */
  49. if (qdf_likely(vdev->wds_enabled))
  50. dp_rx_wds_srcport_learn(soc,
  51. rx_tlv_hdr,
  52. peer,
  53. nbuf,
  54. msdu_metadata);
  55. }
  56. #else
  57. #ifdef QCA_SUPPORT_WDS_EXTENDED
  58. /**
  59. * dp_wds_ext_peer_learn_be() - function to send event to control
  60. * path on receiving 1st 4-address frame from backhaul.
  61. * @soc: DP soc
  62. * @ta_peer: WDS repeater peer
  63. * @rx_tlv_hdr : start address of rx tlvs
  64. *
  65. * Return: void
  66. */
  67. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  68. struct dp_peer *ta_peer,
  69. uint8_t *rx_tlv_hdr)
  70. {
  71. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  72. /* instead of checking addr4 is valid or not in per packet path
  73. * check for init bit, which will be set on reception of
  74. * first addr4 valid packet.
  75. */
  76. if (!ta_peer->vdev->wds_ext_enabled ||
  77. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &ta_peer->wds_ext.init))
  78. return;
  79. if (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc, rx_tlv_hdr)) {
  80. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  81. &ta_peer->wds_ext.init);
  82. qdf_mem_copy(wds_ext_src_mac, &ta_peer->mac_addr.raw[0],
  83. QDF_MAC_ADDR_SIZE);
  84. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  85. soc->ctrl_psoc,
  86. ta_peer->peer_id,
  87. ta_peer->vdev->vdev_id,
  88. wds_ext_src_mac);
  89. }
  90. }
  91. #else
  92. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  93. struct dp_peer *ta_peer,
  94. uint8_t *rx_tlv_hdr)
  95. {
  96. }
  97. #endif
  98. static void
  99. dp_rx_wds_learn(struct dp_soc *soc,
  100. struct dp_vdev *vdev,
  101. uint8_t *rx_tlv_hdr,
  102. struct dp_peer *ta_peer,
  103. qdf_nbuf_t nbuf,
  104. struct hal_rx_msdu_metadata msdu_metadata)
  105. {
  106. dp_wds_ext_peer_learn_be(soc, ta_peer, rx_tlv_hdr);
  107. }
  108. #endif
  109. /**
  110. * dp_rx_process_be() - Brain of the Rx processing functionality
  111. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  112. * @int_ctx: per interrupt context
  113. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  114. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  115. * @quota: No. of units (packets) that can be serviced in one shot.
  116. *
  117. * This function implements the core of Rx functionality. This is
  118. * expected to handle only non-error frames.
  119. *
  120. * Return: uint32_t: No. of elements processed
  121. */
  122. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  123. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  124. uint32_t quota)
  125. {
  126. hal_ring_desc_t ring_desc;
  127. hal_soc_handle_t hal_soc;
  128. struct dp_rx_desc *rx_desc = NULL;
  129. qdf_nbuf_t nbuf, next;
  130. bool near_full;
  131. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  132. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  133. uint32_t num_pending;
  134. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  135. uint16_t msdu_len = 0;
  136. uint16_t peer_id;
  137. uint8_t vdev_id;
  138. struct dp_peer *peer;
  139. struct dp_vdev *vdev;
  140. uint32_t pkt_len = 0;
  141. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  142. struct hal_rx_msdu_desc_info msdu_desc_info;
  143. enum hal_reo_error_status error;
  144. uint32_t peer_mdata;
  145. uint8_t *rx_tlv_hdr;
  146. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  147. uint8_t mac_id = 0;
  148. struct dp_pdev *rx_pdev;
  149. struct dp_srng *dp_rxdma_srng;
  150. struct rx_desc_pool *rx_desc_pool;
  151. struct dp_soc *soc = int_ctx->soc;
  152. uint8_t core_id = 0;
  153. struct cdp_tid_rx_stats *tid_stats;
  154. qdf_nbuf_t nbuf_head;
  155. qdf_nbuf_t nbuf_tail;
  156. qdf_nbuf_t deliver_list_head;
  157. qdf_nbuf_t deliver_list_tail;
  158. uint32_t num_rx_bufs_reaped = 0;
  159. uint32_t intr_id;
  160. struct hif_opaque_softc *scn;
  161. int32_t tid = 0;
  162. bool is_prev_msdu_last = true;
  163. uint32_t num_entries_avail = 0;
  164. uint32_t rx_ol_pkt_cnt = 0;
  165. uint32_t num_entries = 0;
  166. struct hal_rx_msdu_metadata msdu_metadata;
  167. QDF_STATUS status;
  168. qdf_nbuf_t ebuf_head;
  169. qdf_nbuf_t ebuf_tail;
  170. uint8_t pkt_capture_offload = 0;
  171. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  172. int max_reap_limit, ring_near_full;
  173. DP_HIST_INIT();
  174. qdf_assert_always(soc && hal_ring_hdl);
  175. hal_soc = soc->hal_soc;
  176. qdf_assert_always(hal_soc);
  177. scn = soc->hif_handle;
  178. hif_pm_runtime_mark_dp_rx_busy(scn);
  179. intr_id = int_ctx->dp_intr_id;
  180. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  181. more_data:
  182. /* reset local variables here to be re-used in the function */
  183. nbuf_head = NULL;
  184. nbuf_tail = NULL;
  185. deliver_list_head = NULL;
  186. deliver_list_tail = NULL;
  187. peer = NULL;
  188. vdev = NULL;
  189. num_rx_bufs_reaped = 0;
  190. ebuf_head = NULL;
  191. ebuf_tail = NULL;
  192. ring_near_full = 0;
  193. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  194. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  195. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  196. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  197. qdf_mem_zero(head, sizeof(head));
  198. qdf_mem_zero(tail, sizeof(tail));
  199. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  200. &max_reap_limit);
  201. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  202. /*
  203. * Need API to convert from hal_ring pointer to
  204. * Ring Type / Ring Id combo
  205. */
  206. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  207. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  208. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  209. goto done;
  210. }
  211. /*
  212. * start reaping the buffers from reo ring and queue
  213. * them in per vdev queue.
  214. * Process the received pkts in a different per vdev loop.
  215. */
  216. while (qdf_likely(quota &&
  217. (ring_desc = hal_srng_dst_peek(hal_soc,
  218. hal_ring_hdl)))) {
  219. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  220. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  221. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  222. soc, hal_ring_hdl, error);
  223. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  224. 1);
  225. /* Don't know how to deal with this -- assert */
  226. qdf_assert(0);
  227. }
  228. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  229. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  230. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  231. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  232. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  233. break;
  234. }
  235. rx_desc = (struct dp_rx_desc *)
  236. hal_rx_get_reo_desc_va(ring_desc);
  237. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  238. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  239. ring_desc, rx_desc);
  240. if (QDF_IS_STATUS_ERROR(status)) {
  241. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  242. qdf_assert_always(!rx_desc->unmapped);
  243. dp_ipa_reo_ctx_buf_mapping_lock(
  244. soc,
  245. reo_ring_num);
  246. dp_ipa_handle_rx_buf_smmu_mapping(
  247. soc,
  248. rx_desc->nbuf,
  249. RX_DATA_BUFFER_SIZE,
  250. false);
  251. qdf_nbuf_unmap_nbytes_single(
  252. soc->osdev,
  253. rx_desc->nbuf,
  254. QDF_DMA_FROM_DEVICE,
  255. RX_DATA_BUFFER_SIZE);
  256. rx_desc->unmapped = 1;
  257. dp_ipa_reo_ctx_buf_mapping_unlock(
  258. soc,
  259. reo_ring_num);
  260. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  261. rx_desc->pool_id);
  262. dp_rx_add_to_free_desc_list(
  263. &head[rx_desc->pool_id],
  264. &tail[rx_desc->pool_id],
  265. rx_desc);
  266. }
  267. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  268. continue;
  269. }
  270. /*
  271. * this is a unlikely scenario where the host is reaping
  272. * a descriptor which it already reaped just a while ago
  273. * but is yet to replenish it back to HW.
  274. * In this case host will dump the last 128 descriptors
  275. * including the software descriptor rx_desc and assert.
  276. */
  277. if (qdf_unlikely(!rx_desc->in_use)) {
  278. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  279. dp_info_rl("Reaping rx_desc not in use!");
  280. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  281. ring_desc, rx_desc);
  282. /* ignore duplicate RX desc and continue to process */
  283. /* Pop out the descriptor */
  284. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  285. continue;
  286. }
  287. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  288. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  289. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  290. dp_info_rl("Nbuf sanity check failure!");
  291. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  292. ring_desc, rx_desc);
  293. rx_desc->in_err_state = 1;
  294. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  295. continue;
  296. }
  297. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  298. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  299. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  300. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  301. ring_desc, rx_desc);
  302. }
  303. /* Get MPDU DESC info */
  304. hal_rx_mpdu_desc_info_get_be(ring_desc, &mpdu_desc_info);
  305. /* Get MSDU DESC info */
  306. hal_rx_msdu_desc_info_get_be(ring_desc, &msdu_desc_info);
  307. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  308. HAL_MSDU_F_MSDU_CONTINUATION)) {
  309. /* previous msdu has end bit set, so current one is
  310. * the new MPDU
  311. */
  312. if (is_prev_msdu_last) {
  313. /* Get number of entries available in HW ring */
  314. num_entries_avail =
  315. hal_srng_dst_num_valid(hal_soc,
  316. hal_ring_hdl, 1);
  317. /* For new MPDU check if we can read complete
  318. * MPDU by comparing the number of buffers
  319. * available and number of buffers needed to
  320. * reap this MPDU
  321. */
  322. if ((msdu_desc_info.msdu_len /
  323. (RX_DATA_BUFFER_SIZE -
  324. soc->rx_pkt_tlv_size) + 1) >
  325. num_entries_avail) {
  326. DP_STATS_INC(soc,
  327. rx.msdu_scatter_wait_break,
  328. 1);
  329. dp_rx_cookie_reset_invalid_bit(
  330. ring_desc);
  331. break;
  332. }
  333. is_prev_msdu_last = false;
  334. }
  335. }
  336. core_id = smp_processor_id();
  337. DP_STATS_INC(soc, rx.ring_packets[core_id][reo_ring_num], 1);
  338. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  339. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  340. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  341. HAL_MPDU_F_RAW_AMPDU))
  342. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  343. if (!is_prev_msdu_last &&
  344. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  345. is_prev_msdu_last = true;
  346. /* Pop out the descriptor*/
  347. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  348. rx_bufs_reaped[rx_desc->pool_id]++;
  349. peer_mdata = mpdu_desc_info.peer_meta_data;
  350. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  351. dp_rx_peer_metadata_peer_id_get_be(soc, peer_mdata);
  352. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  353. dp_rx_peer_metadata_vdev_id_get_be(soc, peer_mdata);
  354. /* to indicate whether this msdu is rx offload */
  355. pkt_capture_offload =
  356. DP_PEER_METADATA_OFFLOAD_GET_BE(peer_mdata);
  357. /*
  358. * save msdu flags first, last and continuation msdu in
  359. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  360. * length to nbuf->cb. This ensures the info required for
  361. * per pkt processing is always in the same cache line.
  362. * This helps in improving throughput for smaller pkt
  363. * sizes.
  364. */
  365. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  366. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  367. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  368. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  369. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  370. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  371. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  372. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  373. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  374. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  375. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  376. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  377. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_INTRA_BSS)
  378. qdf_nbuf_set_intra_bss(rx_desc->nbuf, 1);
  379. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  380. HAL_MPDU_F_QOS_CONTROL_VALID))
  381. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  382. /* set sw exception */
  383. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  384. rx_desc->nbuf,
  385. hal_rx_sw_exception_get_be(ring_desc));
  386. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  387. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  388. /*
  389. * move unmap after scattered msdu waiting break logic
  390. * in case double skb unmap happened.
  391. */
  392. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  393. dp_ipa_reo_ctx_buf_mapping_lock(soc, reo_ring_num);
  394. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  395. rx_desc_pool->buf_size,
  396. false);
  397. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  398. QDF_DMA_FROM_DEVICE,
  399. rx_desc_pool->buf_size);
  400. rx_desc->unmapped = 1;
  401. dp_ipa_reo_ctx_buf_mapping_unlock(soc, reo_ring_num);
  402. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  403. ebuf_tail, rx_desc);
  404. /*
  405. * if continuation bit is set then we have MSDU spread
  406. * across multiple buffers, let us not decrement quota
  407. * till we reap all buffers of that MSDU.
  408. */
  409. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  410. quota -= 1;
  411. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  412. &tail[rx_desc->pool_id], rx_desc);
  413. num_rx_bufs_reaped++;
  414. /*
  415. * only if complete msdu is received for scatter case,
  416. * then allow break.
  417. */
  418. if (is_prev_msdu_last &&
  419. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  420. max_reap_limit))
  421. break;
  422. }
  423. done:
  424. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  425. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  426. /*
  427. * continue with next mac_id if no pkts were reaped
  428. * from that pool
  429. */
  430. if (!rx_bufs_reaped[mac_id])
  431. continue;
  432. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  433. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  434. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  435. rx_desc_pool, rx_bufs_reaped[mac_id],
  436. &head[mac_id], &tail[mac_id]);
  437. }
  438. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  439. /* Peer can be NULL is case of LFR */
  440. if (qdf_likely(peer))
  441. vdev = NULL;
  442. /*
  443. * BIG loop where each nbuf is dequeued from global queue,
  444. * processed and queued back on a per vdev basis. These nbufs
  445. * are sent to stack as and when we run out of nbufs
  446. * or a new nbuf dequeued from global queue has a different
  447. * vdev when compared to previous nbuf.
  448. */
  449. nbuf = nbuf_head;
  450. while (nbuf) {
  451. next = nbuf->next;
  452. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  453. nbuf = next;
  454. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  455. continue;
  456. }
  457. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  458. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  459. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  460. if (dp_rx_is_list_ready(deliver_list_head, vdev, peer,
  461. peer_id, vdev_id)) {
  462. dp_rx_deliver_to_stack(soc, vdev, peer,
  463. deliver_list_head,
  464. deliver_list_tail);
  465. deliver_list_head = NULL;
  466. deliver_list_tail = NULL;
  467. }
  468. /* Get TID from struct cb->tid_val, save to tid */
  469. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  470. tid = qdf_nbuf_get_tid_val(nbuf);
  471. if (qdf_unlikely(!peer)) {
  472. peer = dp_peer_get_ref_by_id(soc, peer_id,
  473. DP_MOD_ID_RX);
  474. } else if (peer && peer->peer_id != peer_id) {
  475. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  476. peer = dp_peer_get_ref_by_id(soc, peer_id,
  477. DP_MOD_ID_RX);
  478. }
  479. if (peer) {
  480. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  481. qdf_dp_trace_set_track(nbuf, QDF_RX);
  482. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  483. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  484. QDF_NBUF_RX_PKT_DATA_TRACK;
  485. }
  486. rx_bufs_used++;
  487. if (qdf_likely(peer)) {
  488. vdev = peer->vdev;
  489. } else {
  490. nbuf->next = NULL;
  491. dp_rx_deliver_to_pkt_capture_no_peer(
  492. soc, nbuf, pkt_capture_offload);
  493. if (!pkt_capture_offload)
  494. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  495. nbuf = next;
  496. continue;
  497. }
  498. if (qdf_unlikely(!vdev)) {
  499. qdf_nbuf_free(nbuf);
  500. nbuf = next;
  501. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  502. continue;
  503. }
  504. /* when hlos tid override is enabled, save tid in
  505. * skb->priority
  506. */
  507. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  508. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  509. qdf_nbuf_set_priority(nbuf, tid);
  510. rx_pdev = vdev->pdev;
  511. DP_RX_TID_SAVE(nbuf, tid);
  512. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  513. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  514. soc->wlan_cfg_ctx)))
  515. qdf_nbuf_set_timestamp(nbuf);
  516. tid_stats =
  517. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  518. /*
  519. * Check if DMA completed -- msdu_done is the last bit
  520. * to be written
  521. */
  522. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  523. !hal_rx_attn_msdu_done_get(hal_soc,
  524. rx_tlv_hdr))) {
  525. dp_err("MSDU DONE failure");
  526. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  527. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  528. QDF_TRACE_LEVEL_INFO);
  529. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  530. qdf_nbuf_free(nbuf);
  531. qdf_assert(0);
  532. nbuf = next;
  533. continue;
  534. }
  535. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  536. /*
  537. * First IF condition:
  538. * 802.11 Fragmented pkts are reinjected to REO
  539. * HW block as SG pkts and for these pkts we only
  540. * need to pull the RX TLVS header length.
  541. * Second IF condition:
  542. * The below condition happens when an MSDU is spread
  543. * across multiple buffers. This can happen in two cases
  544. * 1. The nbuf size is smaller then the received msdu.
  545. * ex: we have set the nbuf size to 2048 during
  546. * nbuf_alloc. but we received an msdu which is
  547. * 2304 bytes in size then this msdu is spread
  548. * across 2 nbufs.
  549. *
  550. * 2. AMSDUs when RAW mode is enabled.
  551. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  552. * across 1st nbuf and 2nd nbuf and last MSDU is
  553. * spread across 2nd nbuf and 3rd nbuf.
  554. *
  555. * for these scenarios let us create a skb frag_list and
  556. * append these buffers till the last MSDU of the AMSDU
  557. * Third condition:
  558. * This is the most likely case, we receive 802.3 pkts
  559. * decapsulated by HW, here we need to set the pkt length.
  560. */
  561. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  562. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  563. bool is_mcbc, is_sa_vld, is_da_vld;
  564. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  565. rx_tlv_hdr);
  566. is_sa_vld =
  567. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  568. rx_tlv_hdr);
  569. is_da_vld =
  570. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  571. rx_tlv_hdr);
  572. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  573. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  574. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  575. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  576. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  577. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  578. nbuf = dp_rx_sg_create(soc, nbuf);
  579. next = nbuf->next;
  580. if (qdf_nbuf_is_raw_frame(nbuf)) {
  581. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  582. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  583. } else {
  584. qdf_nbuf_free(nbuf);
  585. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  586. dp_info_rl("scatter msdu len %d, dropped",
  587. msdu_len);
  588. nbuf = next;
  589. continue;
  590. }
  591. } else {
  592. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  593. pkt_len = msdu_len +
  594. msdu_metadata.l3_hdr_pad +
  595. soc->rx_pkt_tlv_size;
  596. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  597. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  598. }
  599. /*
  600. * process frame for mulitpass phrase processing
  601. */
  602. if (qdf_unlikely(vdev->multipass_en)) {
  603. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  604. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  605. qdf_nbuf_free(nbuf);
  606. nbuf = next;
  607. continue;
  608. }
  609. }
  610. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  611. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  612. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  613. /* Drop & free packet */
  614. qdf_nbuf_free(nbuf);
  615. /* Statistics */
  616. nbuf = next;
  617. continue;
  618. }
  619. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  620. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  621. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  622. rx_tlv_hdr) ==
  623. false))) {
  624. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  625. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  626. qdf_nbuf_free(nbuf);
  627. nbuf = next;
  628. continue;
  629. }
  630. /*
  631. * Drop non-EAPOL frames from unauthorized peer.
  632. */
  633. if (qdf_likely(peer) && qdf_unlikely(!peer->authorize) &&
  634. !qdf_nbuf_is_raw_frame(nbuf)) {
  635. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  636. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  637. if (!is_eapol) {
  638. DP_STATS_INC(soc,
  639. rx.err.peer_unauth_rx_pkt_drop,
  640. 1);
  641. qdf_nbuf_free(nbuf);
  642. nbuf = next;
  643. continue;
  644. }
  645. }
  646. if (soc->process_rx_status)
  647. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  648. /* Update the protocol tag in SKB based on CCE metadata */
  649. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  650. reo_ring_num, false, true);
  651. /* Update the flow tag in SKB based on FSE metadata */
  652. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  653. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  654. reo_ring_num, tid_stats);
  655. if (qdf_unlikely(vdev->mesh_vdev)) {
  656. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  657. == QDF_STATUS_SUCCESS) {
  658. dp_rx_info("%pK: mesh pkt filtered", soc);
  659. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  660. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  661. 1);
  662. qdf_nbuf_free(nbuf);
  663. nbuf = next;
  664. continue;
  665. }
  666. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  667. }
  668. if (qdf_likely(vdev->rx_decap_type ==
  669. htt_cmn_pkt_type_ethernet) &&
  670. qdf_likely(!vdev->mesh_vdev)) {
  671. dp_rx_wds_learn(soc, vdev,
  672. rx_tlv_hdr,
  673. peer,
  674. nbuf,
  675. msdu_metadata);
  676. /* Intrabss-fwd */
  677. if (dp_rx_check_ap_bridge(vdev))
  678. if (dp_rx_intrabss_fwd_be(soc, peer, rx_tlv_hdr,
  679. nbuf,
  680. msdu_metadata)) {
  681. nbuf = next;
  682. tid_stats->intrabss_cnt++;
  683. continue; /* Get next desc */
  684. }
  685. }
  686. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  687. dp_rx_update_stats(soc, nbuf);
  688. DP_RX_LIST_APPEND(deliver_list_head,
  689. deliver_list_tail,
  690. nbuf);
  691. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  692. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  693. if (qdf_unlikely(peer->in_twt))
  694. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  695. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  696. tid_stats->delivered_to_stack++;
  697. nbuf = next;
  698. }
  699. if (qdf_likely(deliver_list_head)) {
  700. if (qdf_likely(peer)) {
  701. dp_rx_deliver_to_pkt_capture(soc, vdev->pdev, peer_id,
  702. pkt_capture_offload,
  703. deliver_list_head);
  704. if (!pkt_capture_offload)
  705. dp_rx_deliver_to_stack(soc, vdev, peer,
  706. deliver_list_head,
  707. deliver_list_tail);
  708. } else {
  709. nbuf = deliver_list_head;
  710. while (nbuf) {
  711. next = nbuf->next;
  712. nbuf->next = NULL;
  713. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  714. nbuf = next;
  715. }
  716. }
  717. }
  718. if (qdf_likely(peer))
  719. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  720. /*
  721. * If we are processing in near-full condition, there are 3 scenario
  722. * 1) Ring entries has reached critical state
  723. * 2) Ring entries are still near high threshold
  724. * 3) Ring entries are below the safe level
  725. *
  726. * One more loop will move the state to normal processing and yield
  727. */
  728. if (ring_near_full && quota)
  729. goto more_data;
  730. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  731. if (quota) {
  732. num_pending =
  733. dp_rx_srng_get_num_pending(hal_soc,
  734. hal_ring_hdl,
  735. num_entries,
  736. &near_full);
  737. if (num_pending) {
  738. DP_STATS_INC(soc, rx.hp_oos2, 1);
  739. if (!hif_exec_should_yield(scn, intr_id))
  740. goto more_data;
  741. if (qdf_unlikely(near_full)) {
  742. DP_STATS_INC(soc, rx.near_full, 1);
  743. goto more_data;
  744. }
  745. }
  746. }
  747. if (vdev && vdev->osif_fisa_flush)
  748. vdev->osif_fisa_flush(soc, reo_ring_num);
  749. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  750. vdev->osif_gro_flush(vdev->osif_vdev,
  751. reo_ring_num);
  752. }
  753. }
  754. /* Update histogram statistics by looping through pdev's */
  755. DP_RX_HIST_STATS_PER_PDEV();
  756. return rx_bufs_used; /* Assume no scale factor for now */
  757. }
  758. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  759. /**
  760. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  761. * @soc: Handle to DP Soc structure
  762. * @rx_desc_pool: Rx descriptor pool handler
  763. * @pool_id: Rx descriptor pool ID
  764. *
  765. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  766. */
  767. static QDF_STATUS
  768. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  769. struct rx_desc_pool *rx_desc_pool,
  770. uint32_t pool_id)
  771. {
  772. struct dp_soc_be *be_soc;
  773. union dp_rx_desc_list_elem_t *rx_desc_elem;
  774. struct dp_spt_page_desc *page_desc;
  775. struct dp_spt_page_desc_list *page_desc_list;
  776. be_soc = dp_get_be_soc_from_dp_soc(soc);
  777. page_desc_list = &be_soc->rx_spt_page_desc[pool_id];
  778. /* allocate SPT pages from page desc pool */
  779. page_desc_list->num_spt_pages =
  780. dp_cc_spt_page_desc_alloc(be_soc,
  781. &page_desc_list->spt_page_list_head,
  782. &page_desc_list->spt_page_list_tail,
  783. rx_desc_pool->pool_size);
  784. if (!page_desc_list->num_spt_pages) {
  785. dp_err("fail to allocate cookie conversion spt pages");
  786. return QDF_STATUS_E_FAILURE;
  787. }
  788. /* put each RX Desc VA to SPT pages and get corresponding ID */
  789. page_desc = page_desc_list->spt_page_list_head;
  790. rx_desc_elem = rx_desc_pool->freelist;
  791. while (rx_desc_elem) {
  792. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  793. page_desc->avail_entry_index,
  794. &rx_desc_elem->rx_desc);
  795. rx_desc_elem->rx_desc.cookie =
  796. dp_cc_desc_id_generate(page_desc->ppt_index,
  797. page_desc->avail_entry_index);
  798. rx_desc_elem->rx_desc.pool_id = pool_id;
  799. rx_desc_elem->rx_desc.in_use = 0;
  800. rx_desc_elem = rx_desc_elem->next;
  801. page_desc->avail_entry_index++;
  802. if (page_desc->avail_entry_index >=
  803. DP_CC_SPT_PAGE_MAX_ENTRIES)
  804. page_desc = page_desc->next;
  805. }
  806. return QDF_STATUS_SUCCESS;
  807. }
  808. #else
  809. static QDF_STATUS
  810. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  811. struct rx_desc_pool *rx_desc_pool,
  812. uint32_t pool_id)
  813. {
  814. struct dp_soc_be *be_soc;
  815. struct dp_spt_page_desc *page_desc;
  816. struct dp_spt_page_desc_list *page_desc_list;
  817. int i;
  818. be_soc = dp_get_be_soc_from_dp_soc(soc);
  819. page_desc_list = &be_soc->rx_spt_page_desc[pool_id];
  820. /* allocate SPT pages from page desc pool */
  821. page_desc_list->num_spt_pages =
  822. dp_cc_spt_page_desc_alloc(
  823. be_soc,
  824. &page_desc_list->spt_page_list_head,
  825. &page_desc_list->spt_page_list_tail,
  826. rx_desc_pool->pool_size);
  827. if (!page_desc_list->num_spt_pages) {
  828. dp_err("fail to allocate cookie conversion spt pages");
  829. return QDF_STATUS_E_FAILURE;
  830. }
  831. /* put each RX Desc VA to SPT pages and get corresponding ID */
  832. page_desc = page_desc_list->spt_page_list_head;
  833. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  834. if (i == rx_desc_pool->pool_size - 1)
  835. rx_desc_pool->array[i].next = NULL;
  836. else
  837. rx_desc_pool->array[i].next =
  838. &rx_desc_pool->array[i + 1];
  839. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  840. page_desc->avail_entry_index,
  841. &rx_desc_pool->array[i].rx_desc);
  842. rx_desc_pool->array[i].rx_desc.cookie =
  843. dp_cc_desc_id_generate(page_desc->ppt_index,
  844. page_desc->avail_entry_index);
  845. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  846. rx_desc_pool->array[i].rx_desc.in_use = 0;
  847. page_desc->avail_entry_index++;
  848. if (page_desc->avail_entry_index >=
  849. DP_CC_SPT_PAGE_MAX_ENTRIES)
  850. page_desc = page_desc->next;
  851. }
  852. return QDF_STATUS_SUCCESS;
  853. }
  854. #endif
  855. static void
  856. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  857. struct rx_desc_pool *rx_desc_pool,
  858. uint32_t pool_id)
  859. {
  860. struct dp_soc_be *be_soc;
  861. struct dp_spt_page_desc *page_desc;
  862. struct dp_spt_page_desc_list *page_desc_list;
  863. be_soc = dp_get_be_soc_from_dp_soc(soc);
  864. page_desc_list = &be_soc->rx_spt_page_desc[pool_id];
  865. if (!page_desc_list->num_spt_pages) {
  866. dp_warn("page_desc_list is empty for pool_id %d", pool_id);
  867. return;
  868. }
  869. /* cleanup for each page */
  870. page_desc = page_desc_list->spt_page_list_head;
  871. while (page_desc) {
  872. page_desc->avail_entry_index = 0;
  873. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  874. page_desc = page_desc->next;
  875. }
  876. /* free pages desc back to pool */
  877. dp_cc_spt_page_desc_free(be_soc,
  878. &page_desc_list->spt_page_list_head,
  879. &page_desc_list->spt_page_list_tail,
  880. page_desc_list->num_spt_pages);
  881. page_desc_list->num_spt_pages = 0;
  882. }
  883. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  884. struct rx_desc_pool *rx_desc_pool,
  885. uint32_t pool_id)
  886. {
  887. QDF_STATUS status = QDF_STATUS_SUCCESS;
  888. /* Only regular RX buffer desc pool use HW cookie conversion */
  889. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  890. dp_info("rx_desc_buf pool init");
  891. status = dp_rx_desc_pool_init_be_cc(soc,
  892. rx_desc_pool,
  893. pool_id);
  894. } else {
  895. dp_info("non_rx_desc_buf_pool init");
  896. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool, pool_id);
  897. }
  898. return status;
  899. }
  900. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  901. struct rx_desc_pool *rx_desc_pool,
  902. uint32_t pool_id)
  903. {
  904. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  905. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  906. }
  907. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  908. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  909. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  910. void *ring_desc,
  911. struct dp_rx_desc **r_rx_desc)
  912. {
  913. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  914. /* HW cookie conversion done */
  915. *r_rx_desc = (struct dp_rx_desc *)
  916. hal_rx_wbm_get_desc_va(ring_desc);
  917. } else {
  918. /* SW do cookie conversion */
  919. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  920. *r_rx_desc = (struct dp_rx_desc *)
  921. dp_cc_desc_find(soc, cookie);
  922. }
  923. return QDF_STATUS_SUCCESS;
  924. }
  925. #else
  926. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  927. void *ring_desc,
  928. struct dp_rx_desc **r_rx_desc)
  929. {
  930. *r_rx_desc = (struct dp_rx_desc *)
  931. hal_rx_wbm_get_desc_va(ring_desc);
  932. return QDF_STATUS_SUCCESS;
  933. }
  934. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  935. #else
  936. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  937. void *ring_desc,
  938. struct dp_rx_desc **r_rx_desc)
  939. {
  940. /* SW do cookie conversion */
  941. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  942. *r_rx_desc = (struct dp_rx_desc *)
  943. dp_cc_desc_find(soc, cookie);
  944. return QDF_STATUS_SUCCESS;
  945. }
  946. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  947. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  948. uint32_t cookie)
  949. {
  950. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  951. }
  952. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  953. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  954. hal_ring_handle_t hal_ring_hdl,
  955. uint8_t reo_ring_num,
  956. uint32_t quota)
  957. {
  958. struct dp_soc *soc = int_ctx->soc;
  959. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  960. uint32_t work_done = 0;
  961. if (dp_srng_get_near_full_level(soc, rx_ring) <
  962. DP_SRNG_THRESH_NEAR_FULL)
  963. return 0;
  964. qdf_atomic_set(&rx_ring->near_full, 1);
  965. work_done++;
  966. return work_done;
  967. }
  968. #endif
  969. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  970. #ifdef INTRA_BSS_FW_OFFLOAD
  971. static bool
  972. dp_rx_intrabss_ucast_check_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  973. struct dp_peer *ta_peer,
  974. struct hal_rx_msdu_metadata *msdu_metadata)
  975. {
  976. return qdf_nbuf_is_intra_bss(nbuf);
  977. }
  978. #else
  979. static bool
  980. dp_rx_intrabss_ucast_check_be(struct dp_soc *soc, qdf_nbuf_t nbuf,
  981. struct dp_peer *ta_peer,
  982. struct hal_rx_msdu_metadata *msdu_metadata)
  983. {
  984. uint16_t da_peer_id;
  985. struct dp_peer *da_peer;
  986. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  987. return false;
  988. /* The field da_idx here holds DA peer id
  989. */
  990. da_peer_id = msdu_metadata->da_idx;
  991. /* TA peer cannot be same as peer(DA) on which AST is present
  992. * this indicates a change in topology and that AST entries
  993. * are yet to be updated.
  994. */
  995. if ((da_peer_id == ta_peer->peer_id) ||
  996. (da_peer_id == HTT_INVALID_PEER))
  997. return false;
  998. da_peer = dp_peer_get_ref_by_id(soc, da_peer_id,
  999. DP_MOD_ID_RX);
  1000. if (!da_peer)
  1001. return false;
  1002. /* If the source or destination peer in the isolation
  1003. * list then dont forward instead push to bridge stack.
  1004. */
  1005. if (dp_get_peer_isolation(ta_peer) ||
  1006. dp_get_peer_isolation(da_peer) ||
  1007. (da_peer->vdev->vdev_id != ta_peer->vdev->vdev_id)) {
  1008. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1009. return false;
  1010. }
  1011. if (da_peer->bss_peer) {
  1012. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1013. return false;
  1014. }
  1015. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  1016. return true;
  1017. }
  1018. #endif
  1019. /*
  1020. * dp_rx_intrabss_fwd_be() - API for intrabss fwd. For EAPOL
  1021. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1022. * @soc: core txrx main context
  1023. * @ta_peer: source peer entry
  1024. * @rx_tlv_hdr: start address of rx tlvs
  1025. * @nbuf: nbuf that has to be intrabss forwarded
  1026. * @msdu_metadata: msdu metadata
  1027. *
  1028. * Return: true if it is forwarded else false
  1029. */
  1030. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_peer *ta_peer,
  1031. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1032. struct hal_rx_msdu_metadata msdu_metadata)
  1033. {
  1034. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1035. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1036. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1037. tid_stats.tid_rx_stats[ring_id][tid];
  1038. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1039. * source, then clone the pkt and send the cloned pkt for
  1040. * intra BSS forwarding and original pkt up the network stack
  1041. * Note: how do we handle multicast pkts. do we forward
  1042. * all multicast pkts as is or let a higher layer module
  1043. * like igmpsnoop decide whether to forward or not with
  1044. * Mcast enhancement.
  1045. */
  1046. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer)
  1047. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1048. nbuf, tid_stats);
  1049. if (dp_rx_intrabss_ucast_check_be(soc, nbuf, ta_peer, &msdu_metadata))
  1050. return dp_rx_intrabss_ucast_fwd(soc, ta_peer, rx_tlv_hdr,
  1051. nbuf, tid_stats);
  1052. return false;
  1053. }
  1054. #endif