qmi.c 97 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  39. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  40. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  41. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  43. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  44. #define DMS_QMI_MAX_MSG_LEN SZ_256
  45. #define MAX_SHADOW_REG_RESERVED 2
  46. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  47. MAX_SHADOW_REG_RESERVED)
  48. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  49. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  50. #ifdef CONFIG_CNSS2_DEBUG
  51. static bool ignore_qmi_failure;
  52. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  53. void cnss_ignore_qmi_failure(bool ignore)
  54. {
  55. ignore_qmi_failure = ignore;
  56. }
  57. #else
  58. #define CNSS_QMI_ASSERT() do { } while (0)
  59. void cnss_ignore_qmi_failure(bool ignore) { }
  60. #endif
  61. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  62. {
  63. switch (mode) {
  64. case CNSS_MISSION:
  65. return "MISSION";
  66. case CNSS_FTM:
  67. return "FTM";
  68. case CNSS_EPPING:
  69. return "EPPING";
  70. case CNSS_WALTEST:
  71. return "WALTEST";
  72. case CNSS_OFF:
  73. return "OFF";
  74. case CNSS_CCPM:
  75. return "CCPM";
  76. case CNSS_QVIT:
  77. return "QVIT";
  78. case CNSS_CALIBRATION:
  79. return "CALIBRATION";
  80. default:
  81. return "UNKNOWN";
  82. }
  83. }
  84. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  85. struct qmi_elem_info *req_ei,
  86. struct qmi_elem_info *rsp_ei,
  87. int req_id, size_t req_len,
  88. unsigned long timeout)
  89. {
  90. struct qmi_txn txn;
  91. int ret;
  92. char *err_msg;
  93. struct qmi_response_type_v01 *resp = rsp;
  94. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  95. if (ret < 0) {
  96. err_msg = "Qmi fail: fail to init txn,";
  97. goto out;
  98. }
  99. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  100. req_len, req_ei, req);
  101. if (ret < 0) {
  102. qmi_txn_cancel(&txn);
  103. err_msg = "Qmi fail: fail to send req,";
  104. goto out;
  105. }
  106. ret = qmi_txn_wait(&txn, timeout);
  107. if (ret < 0) {
  108. err_msg = "Qmi fail: wait timeout,";
  109. goto out;
  110. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  111. err_msg = "Qmi fail: request rejected,";
  112. cnss_pr_err("Qmi fail: respons with error:%d\n",
  113. resp->error);
  114. ret = -resp->result;
  115. goto out;
  116. }
  117. cnss_pr_dbg("req %x success\n", req_id);
  118. return 0;
  119. out:
  120. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  121. return ret;
  122. }
  123. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  124. {
  125. struct wlfw_ind_register_req_msg_v01 *req;
  126. struct wlfw_ind_register_resp_msg_v01 *resp;
  127. struct qmi_txn txn;
  128. int ret = 0;
  129. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  130. plat_priv->driver_state);
  131. req = kzalloc(sizeof(*req), GFP_KERNEL);
  132. if (!req)
  133. return -ENOMEM;
  134. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  135. if (!resp) {
  136. kfree(req);
  137. return -ENOMEM;
  138. }
  139. req->client_id_valid = 1;
  140. req->client_id = WLFW_CLIENT_ID;
  141. req->request_mem_enable_valid = 1;
  142. req->request_mem_enable = 1;
  143. req->fw_mem_ready_enable_valid = 1;
  144. req->fw_mem_ready_enable = 1;
  145. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  146. req->fw_init_done_enable_valid = 1;
  147. req->fw_init_done_enable = 1;
  148. req->pin_connect_result_enable_valid = 1;
  149. req->pin_connect_result_enable = 1;
  150. req->cal_done_enable_valid = 1;
  151. req->cal_done_enable = 1;
  152. req->qdss_trace_req_mem_enable_valid = 1;
  153. req->qdss_trace_req_mem_enable = 1;
  154. req->qdss_trace_save_enable_valid = 1;
  155. req->qdss_trace_save_enable = 1;
  156. req->qdss_trace_free_enable_valid = 1;
  157. req->qdss_trace_free_enable = 1;
  158. req->respond_get_info_enable_valid = 1;
  159. req->respond_get_info_enable = 1;
  160. req->wfc_call_twt_config_enable_valid = 1;
  161. req->wfc_call_twt_config_enable = 1;
  162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  163. wlfw_ind_register_resp_msg_v01_ei, resp);
  164. if (ret < 0) {
  165. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  166. ret);
  167. goto out;
  168. }
  169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  170. QMI_WLFW_IND_REGISTER_REQ_V01,
  171. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  172. wlfw_ind_register_req_msg_v01_ei, req);
  173. if (ret < 0) {
  174. qmi_txn_cancel(&txn);
  175. cnss_pr_err("Failed to send indication register request, err: %d\n",
  176. ret);
  177. goto out;
  178. }
  179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  180. if (ret < 0) {
  181. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  182. ret);
  183. goto out;
  184. }
  185. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  186. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  187. resp->resp.result, resp->resp.error);
  188. ret = -resp->resp.result;
  189. goto out;
  190. }
  191. if (resp->fw_status_valid) {
  192. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  193. ret = -EALREADY;
  194. goto qmi_registered;
  195. }
  196. }
  197. kfree(req);
  198. kfree(resp);
  199. return 0;
  200. out:
  201. CNSS_QMI_ASSERT();
  202. qmi_registered:
  203. kfree(req);
  204. kfree(resp);
  205. return ret;
  206. }
  207. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  208. struct wlfw_host_cap_req_msg_v01 *req)
  209. {
  210. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  211. plat_priv->device_id == MANGO_DEVICE_ID) {
  212. req->mlo_capable_valid = 1;
  213. req->mlo_capable = 1;
  214. req->mlo_chip_id_valid = 1;
  215. req->mlo_chip_id = 0;
  216. req->mlo_group_id_valid = 1;
  217. req->mlo_group_id = 0;
  218. req->max_mlo_peer_valid = 1;
  219. /* Max peer number generally won't change for the same device
  220. * but needs to be synced with host driver.
  221. */
  222. req->max_mlo_peer = 32;
  223. req->mlo_num_chips_valid = 1;
  224. req->mlo_num_chips = 1;
  225. req->mlo_chip_info_valid = 1;
  226. req->mlo_chip_info[0].chip_id = 0;
  227. req->mlo_chip_info[0].num_local_links = 2;
  228. req->mlo_chip_info[0].hw_link_id[0] = 0;
  229. req->mlo_chip_info[0].hw_link_id[1] = 1;
  230. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  231. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  232. }
  233. }
  234. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  235. {
  236. struct wlfw_host_cap_req_msg_v01 *req;
  237. struct wlfw_host_cap_resp_msg_v01 *resp;
  238. struct qmi_txn txn;
  239. int ret = 0;
  240. u64 iova_start = 0, iova_size = 0,
  241. iova_ipa_start = 0, iova_ipa_size = 0;
  242. u64 feature_list = 0;
  243. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  244. plat_priv->driver_state);
  245. req = kzalloc(sizeof(*req), GFP_KERNEL);
  246. if (!req)
  247. return -ENOMEM;
  248. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  249. if (!resp) {
  250. kfree(req);
  251. return -ENOMEM;
  252. }
  253. req->num_clients_valid = 1;
  254. req->num_clients = 1;
  255. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  256. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  257. if (req->wake_msi) {
  258. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  259. req->wake_msi_valid = 1;
  260. }
  261. req->bdf_support_valid = 1;
  262. req->bdf_support = 1;
  263. req->m3_support_valid = 1;
  264. req->m3_support = 1;
  265. req->m3_cache_support_valid = 1;
  266. req->m3_cache_support = 1;
  267. req->cal_done_valid = 1;
  268. req->cal_done = plat_priv->cal_done;
  269. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  270. if (!cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  271. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  272. &iova_ipa_size)) {
  273. req->ddr_range_valid = 1;
  274. req->ddr_range[0].start = iova_start;
  275. req->ddr_range[0].size = iova_size + iova_ipa_size;
  276. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  277. req->ddr_range[0].start, req->ddr_range[0].size);
  278. }
  279. req->host_build_type_valid = 1;
  280. req->host_build_type = cnss_get_host_build_type();
  281. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  282. ret = cnss_get_feature_list(plat_priv, &feature_list);
  283. if (!ret) {
  284. req->feature_list_valid = 1;
  285. req->feature_list = feature_list;
  286. cnss_pr_dbg("Sending feature list 0x%llx\n",
  287. req->feature_list);
  288. }
  289. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  290. wlfw_host_cap_resp_msg_v01_ei, resp);
  291. if (ret < 0) {
  292. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  293. ret);
  294. goto out;
  295. }
  296. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  297. QMI_WLFW_HOST_CAP_REQ_V01,
  298. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  299. wlfw_host_cap_req_msg_v01_ei, req);
  300. if (ret < 0) {
  301. qmi_txn_cancel(&txn);
  302. cnss_pr_err("Failed to send host capability request, err: %d\n",
  303. ret);
  304. goto out;
  305. }
  306. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  307. if (ret < 0) {
  308. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  309. ret);
  310. goto out;
  311. }
  312. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  313. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  314. resp->resp.result, resp->resp.error);
  315. ret = -resp->resp.result;
  316. goto out;
  317. }
  318. kfree(req);
  319. kfree(resp);
  320. return 0;
  321. out:
  322. CNSS_QMI_ASSERT();
  323. kfree(req);
  324. kfree(resp);
  325. return ret;
  326. }
  327. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  328. {
  329. struct wlfw_respond_mem_req_msg_v01 *req;
  330. struct wlfw_respond_mem_resp_msg_v01 *resp;
  331. struct qmi_txn txn;
  332. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  333. int ret = 0, i;
  334. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  335. plat_priv->driver_state);
  336. req = kzalloc(sizeof(*req), GFP_KERNEL);
  337. if (!req)
  338. return -ENOMEM;
  339. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  340. if (!resp) {
  341. kfree(req);
  342. return -ENOMEM;
  343. }
  344. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  345. for (i = 0; i < req->mem_seg_len; i++) {
  346. if (!fw_mem[i].pa || !fw_mem[i].size) {
  347. if (fw_mem[i].type == 0) {
  348. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  349. i);
  350. ret = -EINVAL;
  351. goto out;
  352. }
  353. cnss_pr_err("Memory for FW is not available for type: %u\n",
  354. fw_mem[i].type);
  355. ret = -ENOMEM;
  356. goto out;
  357. }
  358. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  359. fw_mem[i].va, &fw_mem[i].pa,
  360. fw_mem[i].size, fw_mem[i].type);
  361. req->mem_seg[i].addr = fw_mem[i].pa;
  362. req->mem_seg[i].size = fw_mem[i].size;
  363. req->mem_seg[i].type = fw_mem[i].type;
  364. }
  365. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  366. wlfw_respond_mem_resp_msg_v01_ei, resp);
  367. if (ret < 0) {
  368. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  369. ret);
  370. goto out;
  371. }
  372. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  373. QMI_WLFW_RESPOND_MEM_REQ_V01,
  374. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  375. wlfw_respond_mem_req_msg_v01_ei, req);
  376. if (ret < 0) {
  377. qmi_txn_cancel(&txn);
  378. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  379. ret);
  380. goto out;
  381. }
  382. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  383. if (ret < 0) {
  384. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  385. ret);
  386. goto out;
  387. }
  388. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  389. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  390. resp->resp.result, resp->resp.error);
  391. ret = -resp->resp.result;
  392. goto out;
  393. }
  394. kfree(req);
  395. kfree(resp);
  396. return 0;
  397. out:
  398. CNSS_QMI_ASSERT();
  399. kfree(req);
  400. kfree(resp);
  401. return ret;
  402. }
  403. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  404. {
  405. struct wlfw_cap_req_msg_v01 *req;
  406. struct wlfw_cap_resp_msg_v01 *resp;
  407. struct qmi_txn txn;
  408. char *fw_build_timestamp;
  409. int ret = 0, i;
  410. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  411. plat_priv->driver_state);
  412. req = kzalloc(sizeof(*req), GFP_KERNEL);
  413. if (!req)
  414. return -ENOMEM;
  415. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  416. if (!resp) {
  417. kfree(req);
  418. return -ENOMEM;
  419. }
  420. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  421. wlfw_cap_resp_msg_v01_ei, resp);
  422. if (ret < 0) {
  423. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  424. ret);
  425. goto out;
  426. }
  427. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  428. QMI_WLFW_CAP_REQ_V01,
  429. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  430. wlfw_cap_req_msg_v01_ei, req);
  431. if (ret < 0) {
  432. qmi_txn_cancel(&txn);
  433. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  434. ret);
  435. goto out;
  436. }
  437. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  438. if (ret < 0) {
  439. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  440. ret);
  441. goto out;
  442. }
  443. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  444. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  445. resp->resp.result, resp->resp.error);
  446. ret = -resp->resp.result;
  447. goto out;
  448. }
  449. if (resp->chip_info_valid) {
  450. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  451. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  452. }
  453. if (resp->board_info_valid)
  454. plat_priv->board_info.board_id = resp->board_info.board_id;
  455. else
  456. plat_priv->board_info.board_id = 0xFF;
  457. if (resp->soc_info_valid)
  458. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  459. if (resp->fw_version_info_valid) {
  460. plat_priv->fw_version_info.fw_version =
  461. resp->fw_version_info.fw_version;
  462. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  463. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  464. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  465. resp->fw_version_info.fw_build_timestamp,
  466. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  467. }
  468. if (resp->fw_build_id_valid) {
  469. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  470. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  471. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  472. }
  473. if (resp->voltage_mv_valid) {
  474. plat_priv->cpr_info.voltage = resp->voltage_mv;
  475. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  476. plat_priv->cpr_info.voltage);
  477. cnss_update_cpr_info(plat_priv);
  478. }
  479. if (resp->time_freq_hz_valid) {
  480. plat_priv->device_freq_hz = resp->time_freq_hz;
  481. cnss_pr_dbg("Device frequency is %d HZ\n",
  482. plat_priv->device_freq_hz);
  483. }
  484. if (resp->otp_version_valid)
  485. plat_priv->otp_version = resp->otp_version;
  486. if (resp->dev_mem_info_valid) {
  487. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  488. plat_priv->dev_mem_info[i].start =
  489. resp->dev_mem_info[i].start;
  490. plat_priv->dev_mem_info[i].size =
  491. resp->dev_mem_info[i].size;
  492. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  493. i, plat_priv->dev_mem_info[i].start,
  494. plat_priv->dev_mem_info[i].size);
  495. }
  496. }
  497. if (resp->fw_caps_valid)
  498. plat_priv->fw_pcie_gen_switch =
  499. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  500. if (resp->hang_data_length_valid &&
  501. resp->hang_data_length &&
  502. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  503. plat_priv->hang_event_data_len = resp->hang_data_length;
  504. else
  505. plat_priv->hang_event_data_len = 0;
  506. if (resp->hang_data_addr_offset_valid)
  507. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  508. else
  509. plat_priv->hang_data_addr_offset = 0;
  510. if (resp->ol_cpr_cfg_valid)
  511. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  512. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  513. plat_priv->chip_info.chip_id,
  514. plat_priv->chip_info.chip_family,
  515. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  516. plat_priv->otp_version);
  517. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s\n",
  518. plat_priv->fw_version_info.fw_version,
  519. plat_priv->fw_version_info.fw_build_timestamp,
  520. plat_priv->fw_build_id);
  521. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  522. plat_priv->hang_event_data_len,
  523. plat_priv->hang_data_addr_offset);
  524. kfree(req);
  525. kfree(resp);
  526. return 0;
  527. out:
  528. CNSS_QMI_ASSERT();
  529. kfree(req);
  530. kfree(resp);
  531. return ret;
  532. }
  533. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  534. u32 bdf_type, char *filename,
  535. u32 filename_len)
  536. {
  537. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  538. int ret = 0;
  539. switch (bdf_type) {
  540. case CNSS_BDF_ELF:
  541. /* Board ID will be equal or less than 0xFF in GF mask case */
  542. if (plat_priv->board_info.board_id == 0xFF) {
  543. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  544. snprintf(filename_tmp, filename_len,
  545. ELF_BDF_FILE_NAME_GF);
  546. else
  547. snprintf(filename_tmp, filename_len,
  548. ELF_BDF_FILE_NAME);
  549. } else if (plat_priv->board_info.board_id < 0xFF) {
  550. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  551. snprintf(filename_tmp, filename_len,
  552. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  553. plat_priv->board_info.board_id);
  554. else
  555. snprintf(filename_tmp, filename_len,
  556. ELF_BDF_FILE_NAME_PREFIX "%02x",
  557. plat_priv->board_info.board_id);
  558. } else {
  559. snprintf(filename_tmp, filename_len,
  560. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  561. plat_priv->board_info.board_id >> 8 & 0xFF,
  562. plat_priv->board_info.board_id & 0xFF);
  563. }
  564. break;
  565. case CNSS_BDF_BIN:
  566. if (plat_priv->board_info.board_id == 0xFF) {
  567. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  568. snprintf(filename_tmp, filename_len,
  569. BIN_BDF_FILE_NAME_GF);
  570. else
  571. snprintf(filename_tmp, filename_len,
  572. BIN_BDF_FILE_NAME);
  573. } else if (plat_priv->board_info.board_id < 0xFF) {
  574. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  575. snprintf(filename_tmp, filename_len,
  576. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  577. plat_priv->board_info.board_id);
  578. else
  579. snprintf(filename_tmp, filename_len,
  580. BIN_BDF_FILE_NAME_PREFIX "%02x",
  581. plat_priv->board_info.board_id);
  582. } else {
  583. snprintf(filename_tmp, filename_len,
  584. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  585. plat_priv->board_info.board_id >> 8 & 0xFF,
  586. plat_priv->board_info.board_id & 0xFF);
  587. }
  588. break;
  589. case CNSS_BDF_REGDB:
  590. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  591. break;
  592. case CNSS_BDF_HDS:
  593. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  594. break;
  595. default:
  596. cnss_pr_err("Invalid BDF type: %d\n",
  597. plat_priv->ctrl_params.bdf_type);
  598. ret = -EINVAL;
  599. break;
  600. }
  601. if (!ret)
  602. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  603. return ret;
  604. }
  605. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  606. enum wlfw_ini_file_type_v01 file_type)
  607. {
  608. struct wlfw_ini_file_download_req_msg_v01 *req;
  609. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  610. struct qmi_txn txn;
  611. int ret = 0;
  612. const struct firmware *fw;
  613. char filename[INI_FILE_NAME_LEN] = {0};
  614. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  615. const u8 *temp;
  616. unsigned int remaining;
  617. bool backup_supported = false;
  618. cnss_pr_info("INI File %u download\n", file_type);
  619. req = kzalloc(sizeof(*req), GFP_KERNEL);
  620. if (!req)
  621. return -ENOMEM;
  622. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  623. if (!resp) {
  624. kfree(req);
  625. return -ENOMEM;
  626. }
  627. switch (file_type) {
  628. case WLFW_CONN_ROAM_INI_V01:
  629. snprintf(tmp_filename, sizeof(tmp_filename),
  630. CONN_ROAM_FILE_NAME);
  631. backup_supported = true;
  632. break;
  633. default:
  634. cnss_pr_err("Invalid file type: %u\n", file_type);
  635. ret = -EINVAL;
  636. goto err_req_fw;
  637. }
  638. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  639. /* Fetch the file */
  640. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  641. if (ret) {
  642. cnss_pr_err("Failed to get INI file %s (%d), Backup file: %s",
  643. filename, ret,
  644. backup_supported ? "Supported" : "Not Supported");
  645. if (!backup_supported)
  646. goto err_req_fw;
  647. snprintf(filename, sizeof(filename),
  648. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  649. ret = firmware_request_nowarn(&fw, filename,
  650. &plat_priv->plat_dev->dev);
  651. if (ret) {
  652. cnss_pr_err("Failed to get INI file %s (%d)", filename,
  653. ret);
  654. goto err_req_fw;
  655. }
  656. }
  657. temp = fw->data;
  658. remaining = fw->size;
  659. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  660. remaining);
  661. while (remaining) {
  662. req->file_type_valid = 1;
  663. req->file_type = file_type;
  664. req->total_size_valid = 1;
  665. req->total_size = remaining;
  666. req->seg_id_valid = 1;
  667. req->data_valid = 1;
  668. req->end_valid = 1;
  669. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  670. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  671. } else {
  672. req->data_len = remaining;
  673. req->end = 1;
  674. }
  675. memcpy(req->data, temp, req->data_len);
  676. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  677. wlfw_ini_file_download_resp_msg_v01_ei,
  678. resp);
  679. if (ret < 0) {
  680. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  681. ret);
  682. goto err;
  683. }
  684. ret = qmi_send_request
  685. (&plat_priv->qmi_wlfw, NULL, &txn,
  686. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  687. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  688. wlfw_ini_file_download_req_msg_v01_ei, req);
  689. if (ret < 0) {
  690. qmi_txn_cancel(&txn);
  691. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  692. ret);
  693. goto err;
  694. }
  695. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  696. if (ret < 0) {
  697. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  698. ret);
  699. goto err;
  700. }
  701. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  702. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  703. resp->resp.result, resp->resp.error);
  704. ret = -resp->resp.result;
  705. goto err;
  706. }
  707. remaining -= req->data_len;
  708. temp += req->data_len;
  709. req->seg_id++;
  710. }
  711. release_firmware(fw);
  712. kfree(req);
  713. kfree(resp);
  714. return 0;
  715. err:
  716. release_firmware(fw);
  717. err_req_fw:
  718. kfree(req);
  719. kfree(resp);
  720. return ret;
  721. }
  722. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  723. u32 bdf_type)
  724. {
  725. struct wlfw_bdf_download_req_msg_v01 *req;
  726. struct wlfw_bdf_download_resp_msg_v01 *resp;
  727. struct qmi_txn txn;
  728. char filename[MAX_FIRMWARE_NAME_LEN];
  729. const struct firmware *fw_entry = NULL;
  730. const u8 *temp;
  731. unsigned int remaining;
  732. int ret = 0;
  733. cnss_pr_dbg("Sending BDF download message, state: 0x%lx, type: %d\n",
  734. plat_priv->driver_state, bdf_type);
  735. req = kzalloc(sizeof(*req), GFP_KERNEL);
  736. if (!req)
  737. return -ENOMEM;
  738. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  739. if (!resp) {
  740. kfree(req);
  741. return -ENOMEM;
  742. }
  743. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  744. filename, sizeof(filename));
  745. if (ret)
  746. goto err_req_fw;
  747. if (bdf_type == CNSS_BDF_REGDB)
  748. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  749. filename);
  750. else
  751. ret = firmware_request_nowarn(&fw_entry, filename,
  752. &plat_priv->plat_dev->dev);
  753. if (ret) {
  754. cnss_pr_err("Failed to load BDF: %s, ret: %d\n", filename, ret);
  755. goto err_req_fw;
  756. }
  757. temp = fw_entry->data;
  758. remaining = fw_entry->size;
  759. cnss_pr_dbg("Downloading BDF: %s, size: %u\n", filename, remaining);
  760. while (remaining) {
  761. req->valid = 1;
  762. req->file_id_valid = 1;
  763. req->file_id = plat_priv->board_info.board_id;
  764. req->total_size_valid = 1;
  765. req->total_size = remaining;
  766. req->seg_id_valid = 1;
  767. req->data_valid = 1;
  768. req->end_valid = 1;
  769. req->bdf_type_valid = 1;
  770. req->bdf_type = bdf_type;
  771. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  772. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  773. } else {
  774. req->data_len = remaining;
  775. req->end = 1;
  776. }
  777. memcpy(req->data, temp, req->data_len);
  778. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  779. wlfw_bdf_download_resp_msg_v01_ei, resp);
  780. if (ret < 0) {
  781. cnss_pr_err("Failed to initialize txn for BDF download request, err: %d\n",
  782. ret);
  783. goto err_send;
  784. }
  785. ret = qmi_send_request
  786. (&plat_priv->qmi_wlfw, NULL, &txn,
  787. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  788. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  789. wlfw_bdf_download_req_msg_v01_ei, req);
  790. if (ret < 0) {
  791. qmi_txn_cancel(&txn);
  792. cnss_pr_err("Failed to send respond BDF download request, err: %d\n",
  793. ret);
  794. goto err_send;
  795. }
  796. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  797. if (ret < 0) {
  798. cnss_pr_err("Failed to wait for response of BDF download request, err: %d\n",
  799. ret);
  800. goto err_send;
  801. }
  802. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  803. cnss_pr_err("BDF download request failed, result: %d, err: %d\n",
  804. resp->resp.result, resp->resp.error);
  805. ret = -resp->resp.result;
  806. goto err_send;
  807. }
  808. remaining -= req->data_len;
  809. temp += req->data_len;
  810. req->seg_id++;
  811. }
  812. release_firmware(fw_entry);
  813. if (resp->host_bdf_data_valid) {
  814. /* QCA6490 enable S3E regulator for IPA configuration only */
  815. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  816. cnss_enable_int_pow_amp_vreg(plat_priv);
  817. plat_priv->cbc_file_download =
  818. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  819. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  820. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  821. plat_priv->cbc_file_download);
  822. }
  823. kfree(req);
  824. kfree(resp);
  825. return 0;
  826. err_send:
  827. release_firmware(fw_entry);
  828. err_req_fw:
  829. if (!(bdf_type == CNSS_BDF_REGDB ||
  830. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  831. ret == -EAGAIN))
  832. CNSS_QMI_ASSERT();
  833. kfree(req);
  834. kfree(resp);
  835. return ret;
  836. }
  837. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  838. {
  839. struct wlfw_m3_info_req_msg_v01 *req;
  840. struct wlfw_m3_info_resp_msg_v01 *resp;
  841. struct qmi_txn txn;
  842. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  843. int ret = 0;
  844. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  845. plat_priv->driver_state);
  846. req = kzalloc(sizeof(*req), GFP_KERNEL);
  847. if (!req)
  848. return -ENOMEM;
  849. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  850. if (!resp) {
  851. kfree(req);
  852. return -ENOMEM;
  853. }
  854. if (!m3_mem->pa || !m3_mem->size) {
  855. cnss_pr_err("Memory for M3 is not available\n");
  856. ret = -ENOMEM;
  857. goto out;
  858. }
  859. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  860. m3_mem->va, &m3_mem->pa, m3_mem->size);
  861. req->addr = plat_priv->m3_mem.pa;
  862. req->size = plat_priv->m3_mem.size;
  863. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  864. wlfw_m3_info_resp_msg_v01_ei, resp);
  865. if (ret < 0) {
  866. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  867. ret);
  868. goto out;
  869. }
  870. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  871. QMI_WLFW_M3_INFO_REQ_V01,
  872. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  873. wlfw_m3_info_req_msg_v01_ei, req);
  874. if (ret < 0) {
  875. qmi_txn_cancel(&txn);
  876. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  877. ret);
  878. goto out;
  879. }
  880. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  881. if (ret < 0) {
  882. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  883. ret);
  884. goto out;
  885. }
  886. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  887. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  888. resp->resp.result, resp->resp.error);
  889. ret = -resp->resp.result;
  890. goto out;
  891. }
  892. kfree(req);
  893. kfree(resp);
  894. return 0;
  895. out:
  896. CNSS_QMI_ASSERT();
  897. kfree(req);
  898. kfree(resp);
  899. return ret;
  900. }
  901. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  902. u8 *mac, u32 mac_len)
  903. {
  904. struct wlfw_mac_addr_req_msg_v01 req;
  905. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  906. struct qmi_txn txn;
  907. int ret;
  908. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  909. return -EINVAL;
  910. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  911. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  912. if (ret < 0) {
  913. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  914. ret);
  915. ret = -EIO;
  916. goto out;
  917. }
  918. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  919. mac, plat_priv->driver_state);
  920. memcpy(req.mac_addr, mac, mac_len);
  921. req.mac_addr_valid = 1;
  922. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  923. QMI_WLFW_MAC_ADDR_REQ_V01,
  924. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  925. wlfw_mac_addr_req_msg_v01_ei, &req);
  926. if (ret < 0) {
  927. qmi_txn_cancel(&txn);
  928. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  929. ret = -EIO;
  930. goto out;
  931. }
  932. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  933. if (ret < 0) {
  934. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  935. ret);
  936. ret = -EIO;
  937. goto out;
  938. }
  939. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  940. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  941. resp.resp.result);
  942. ret = -resp.resp.result;
  943. }
  944. out:
  945. return ret;
  946. }
  947. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  948. u32 total_size)
  949. {
  950. int ret = 0;
  951. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  952. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  953. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  954. unsigned int remaining;
  955. struct qmi_txn txn;
  956. cnss_pr_dbg("%s\n", __func__);
  957. req = kzalloc(sizeof(*req), GFP_KERNEL);
  958. if (!req)
  959. return -ENOMEM;
  960. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  961. if (!resp) {
  962. kfree(req);
  963. return -ENOMEM;
  964. }
  965. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  966. if (!p_qdss_trace_data) {
  967. ret = ENOMEM;
  968. goto end;
  969. }
  970. remaining = total_size;
  971. p_qdss_trace_data_temp = p_qdss_trace_data;
  972. while (remaining && resp->end == 0) {
  973. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  974. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  975. if (ret < 0) {
  976. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  977. ret);
  978. goto fail;
  979. }
  980. ret = qmi_send_request
  981. (&plat_priv->qmi_wlfw, NULL, &txn,
  982. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  983. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  984. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  985. if (ret < 0) {
  986. qmi_txn_cancel(&txn);
  987. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  988. ret);
  989. goto fail;
  990. }
  991. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  992. if (ret < 0) {
  993. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  994. ret);
  995. goto fail;
  996. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  997. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  998. resp->resp.result, resp->resp.error);
  999. ret = -resp->resp.result;
  1000. goto fail;
  1001. } else {
  1002. ret = 0;
  1003. }
  1004. cnss_pr_dbg("%s: response total size %d data len %d",
  1005. __func__, resp->total_size, resp->data_len);
  1006. if ((resp->total_size_valid == 1 &&
  1007. resp->total_size == total_size) &&
  1008. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1009. (resp->data_valid == 1 &&
  1010. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01)) {
  1011. memcpy(p_qdss_trace_data_temp,
  1012. resp->data, resp->data_len);
  1013. } else {
  1014. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1015. __func__,
  1016. total_size, req->seg_id,
  1017. resp->total_size_valid,
  1018. resp->total_size,
  1019. resp->seg_id_valid,
  1020. resp->seg_id,
  1021. resp->data_valid,
  1022. resp->data_len);
  1023. ret = -1;
  1024. goto fail;
  1025. }
  1026. remaining -= resp->data_len;
  1027. p_qdss_trace_data_temp += resp->data_len;
  1028. req->seg_id++;
  1029. }
  1030. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1031. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1032. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1033. total_size);
  1034. if (ret < 0) {
  1035. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1036. ret);
  1037. ret = -1;
  1038. goto fail;
  1039. }
  1040. } else {
  1041. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1042. __func__,
  1043. remaining, resp->end_valid, resp->end);
  1044. ret = -1;
  1045. goto fail;
  1046. }
  1047. fail:
  1048. kfree(p_qdss_trace_data);
  1049. end:
  1050. kfree(req);
  1051. kfree(resp);
  1052. return ret;
  1053. }
  1054. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1055. char *filename, u32 filename_len)
  1056. {
  1057. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1058. char *debug_str = QDSS_DEBUG_FILE_STR;
  1059. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1060. plat_priv->device_id == MANGO_DEVICE_ID)
  1061. debug_str = "";
  1062. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1063. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1064. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1065. else
  1066. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1067. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1068. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1069. }
  1070. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1071. {
  1072. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1073. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1074. struct qmi_txn txn;
  1075. const struct firmware *fw_entry = NULL;
  1076. const u8 *temp;
  1077. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1078. unsigned int remaining;
  1079. int ret = 0;
  1080. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1081. plat_priv->driver_state);
  1082. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1083. if (!req)
  1084. return -ENOMEM;
  1085. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1086. if (!resp) {
  1087. kfree(req);
  1088. return -ENOMEM;
  1089. }
  1090. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1091. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1092. qdss_cfg_filename);
  1093. if (ret) {
  1094. cnss_pr_dbg("Unable to load %s\n",
  1095. qdss_cfg_filename);
  1096. goto err_req_fw;
  1097. }
  1098. temp = fw_entry->data;
  1099. remaining = fw_entry->size;
  1100. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1101. qdss_cfg_filename, remaining);
  1102. while (remaining) {
  1103. req->total_size_valid = 1;
  1104. req->total_size = remaining;
  1105. req->seg_id_valid = 1;
  1106. req->data_valid = 1;
  1107. req->end_valid = 1;
  1108. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1109. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1110. } else {
  1111. req->data_len = remaining;
  1112. req->end = 1;
  1113. }
  1114. memcpy(req->data, temp, req->data_len);
  1115. ret = qmi_txn_init
  1116. (&plat_priv->qmi_wlfw, &txn,
  1117. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1118. resp);
  1119. if (ret < 0) {
  1120. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1121. ret);
  1122. goto err_send;
  1123. }
  1124. ret = qmi_send_request
  1125. (&plat_priv->qmi_wlfw, NULL, &txn,
  1126. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1127. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1128. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1129. if (ret < 0) {
  1130. qmi_txn_cancel(&txn);
  1131. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1132. ret);
  1133. goto err_send;
  1134. }
  1135. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1136. if (ret < 0) {
  1137. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1138. ret);
  1139. goto err_send;
  1140. }
  1141. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1142. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1143. resp->resp.result, resp->resp.error);
  1144. ret = -resp->resp.result;
  1145. goto err_send;
  1146. }
  1147. remaining -= req->data_len;
  1148. temp += req->data_len;
  1149. req->seg_id++;
  1150. }
  1151. release_firmware(fw_entry);
  1152. kfree(req);
  1153. kfree(resp);
  1154. return 0;
  1155. err_send:
  1156. release_firmware(fw_entry);
  1157. err_req_fw:
  1158. kfree(req);
  1159. kfree(resp);
  1160. return ret;
  1161. }
  1162. static int wlfw_send_qdss_trace_mode_req
  1163. (struct cnss_plat_data *plat_priv,
  1164. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1165. unsigned long long option)
  1166. {
  1167. int rc = 0;
  1168. int tmp = 0;
  1169. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1170. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1171. struct qmi_txn txn;
  1172. if (!plat_priv)
  1173. return -ENODEV;
  1174. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1175. if (!req)
  1176. return -ENOMEM;
  1177. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1178. if (!resp) {
  1179. kfree(req);
  1180. return -ENOMEM;
  1181. }
  1182. req->mode_valid = 1;
  1183. req->mode = mode;
  1184. req->option_valid = 1;
  1185. req->option = option;
  1186. tmp = plat_priv->hw_trc_override;
  1187. req->hw_trc_disable_override_valid = 1;
  1188. req->hw_trc_disable_override =
  1189. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1190. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1191. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1192. __func__, mode, option, req->hw_trc_disable_override);
  1193. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1194. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1195. if (rc < 0) {
  1196. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1197. rc);
  1198. goto out;
  1199. }
  1200. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1201. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1202. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1203. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1204. if (rc < 0) {
  1205. qmi_txn_cancel(&txn);
  1206. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1207. goto out;
  1208. }
  1209. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1210. if (rc < 0) {
  1211. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1212. rc);
  1213. goto out;
  1214. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1215. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1216. resp->resp.result, resp->resp.error);
  1217. rc = -resp->resp.result;
  1218. goto out;
  1219. }
  1220. kfree(resp);
  1221. kfree(req);
  1222. return rc;
  1223. out:
  1224. kfree(resp);
  1225. kfree(req);
  1226. CNSS_QMI_ASSERT();
  1227. return rc;
  1228. }
  1229. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1230. {
  1231. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1232. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1233. }
  1234. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1235. {
  1236. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1237. option);
  1238. }
  1239. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1240. enum cnss_driver_mode mode)
  1241. {
  1242. struct wlfw_wlan_mode_req_msg_v01 *req;
  1243. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1244. struct qmi_txn txn;
  1245. int ret = 0;
  1246. if (!plat_priv)
  1247. return -ENODEV;
  1248. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1249. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1250. if (mode == CNSS_OFF &&
  1251. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1252. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1253. return 0;
  1254. }
  1255. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1256. if (!req)
  1257. return -ENOMEM;
  1258. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1259. if (!resp) {
  1260. kfree(req);
  1261. return -ENOMEM;
  1262. }
  1263. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1264. req->hw_debug_valid = 1;
  1265. req->hw_debug = 0;
  1266. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1267. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1268. if (ret < 0) {
  1269. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1270. cnss_qmi_mode_to_str(mode), mode, ret);
  1271. goto out;
  1272. }
  1273. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1274. QMI_WLFW_WLAN_MODE_REQ_V01,
  1275. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1276. wlfw_wlan_mode_req_msg_v01_ei, req);
  1277. if (ret < 0) {
  1278. qmi_txn_cancel(&txn);
  1279. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1280. cnss_qmi_mode_to_str(mode), mode, ret);
  1281. goto out;
  1282. }
  1283. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1284. if (ret < 0) {
  1285. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1286. cnss_qmi_mode_to_str(mode), mode, ret);
  1287. goto out;
  1288. }
  1289. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1290. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1291. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1292. resp->resp.error);
  1293. ret = -resp->resp.result;
  1294. goto out;
  1295. }
  1296. kfree(req);
  1297. kfree(resp);
  1298. return 0;
  1299. out:
  1300. if (mode == CNSS_OFF) {
  1301. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1302. ret = 0;
  1303. } else {
  1304. CNSS_QMI_ASSERT();
  1305. }
  1306. kfree(req);
  1307. kfree(resp);
  1308. return ret;
  1309. }
  1310. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1311. struct cnss_wlan_enable_cfg *config,
  1312. const char *host_version)
  1313. {
  1314. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1315. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1316. struct qmi_txn txn;
  1317. u32 i;
  1318. int ret = 0;
  1319. if (!plat_priv)
  1320. return -ENODEV;
  1321. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1322. plat_priv->driver_state);
  1323. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1324. if (!req)
  1325. return -ENOMEM;
  1326. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1327. if (!resp) {
  1328. kfree(req);
  1329. return -ENOMEM;
  1330. }
  1331. req->host_version_valid = 1;
  1332. strlcpy(req->host_version, host_version,
  1333. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1334. req->tgt_cfg_valid = 1;
  1335. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1336. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1337. else
  1338. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1339. for (i = 0; i < req->tgt_cfg_len; i++) {
  1340. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1341. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1342. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1343. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1344. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1345. }
  1346. req->svc_cfg_valid = 1;
  1347. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1348. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1349. else
  1350. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1351. for (i = 0; i < req->svc_cfg_len; i++) {
  1352. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1353. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1354. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1355. }
  1356. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1357. plat_priv->device_id != MANGO_DEVICE_ID) {
  1358. req->shadow_reg_v2_valid = 1;
  1359. if (config->num_shadow_reg_v2_cfg >
  1360. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1361. req->shadow_reg_v2_len = QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1362. else
  1363. req->shadow_reg_v2_len = config->num_shadow_reg_v2_cfg;
  1364. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1365. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01)
  1366. * req->shadow_reg_v2_len);
  1367. } else {
  1368. req->shadow_reg_v3_valid = 1;
  1369. if (config->num_shadow_reg_v3_cfg >
  1370. MAX_NUM_SHADOW_REG_V3)
  1371. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1372. else
  1373. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1374. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1375. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1376. plat_priv->num_shadow_regs_v3);
  1377. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1378. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01)
  1379. * req->shadow_reg_v3_len);
  1380. }
  1381. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1382. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1383. if (ret < 0) {
  1384. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1385. ret);
  1386. goto out;
  1387. }
  1388. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1389. QMI_WLFW_WLAN_CFG_REQ_V01,
  1390. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1391. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1392. if (ret < 0) {
  1393. qmi_txn_cancel(&txn);
  1394. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1395. ret);
  1396. goto out;
  1397. }
  1398. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1399. if (ret < 0) {
  1400. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1401. ret);
  1402. goto out;
  1403. }
  1404. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1405. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1406. resp->resp.result, resp->resp.error);
  1407. ret = -resp->resp.result;
  1408. goto out;
  1409. }
  1410. kfree(req);
  1411. kfree(resp);
  1412. return 0;
  1413. out:
  1414. CNSS_QMI_ASSERT();
  1415. kfree(req);
  1416. kfree(resp);
  1417. return ret;
  1418. }
  1419. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1420. u32 offset, u32 mem_type,
  1421. u32 data_len, u8 *data)
  1422. {
  1423. struct wlfw_athdiag_read_req_msg_v01 *req;
  1424. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1425. struct qmi_txn txn;
  1426. int ret = 0;
  1427. if (!plat_priv)
  1428. return -ENODEV;
  1429. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1430. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1431. data, data_len);
  1432. return -EINVAL;
  1433. }
  1434. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1435. plat_priv->driver_state, offset, mem_type, data_len);
  1436. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1437. if (!req)
  1438. return -ENOMEM;
  1439. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1440. if (!resp) {
  1441. kfree(req);
  1442. return -ENOMEM;
  1443. }
  1444. req->offset = offset;
  1445. req->mem_type = mem_type;
  1446. req->data_len = data_len;
  1447. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1448. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1449. if (ret < 0) {
  1450. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1451. ret);
  1452. goto out;
  1453. }
  1454. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1455. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1456. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1457. wlfw_athdiag_read_req_msg_v01_ei, req);
  1458. if (ret < 0) {
  1459. qmi_txn_cancel(&txn);
  1460. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1461. ret);
  1462. goto out;
  1463. }
  1464. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1465. if (ret < 0) {
  1466. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1467. ret);
  1468. goto out;
  1469. }
  1470. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1471. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1472. resp->resp.result, resp->resp.error);
  1473. ret = -resp->resp.result;
  1474. goto out;
  1475. }
  1476. if (!resp->data_valid || resp->data_len != data_len) {
  1477. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1478. resp->data_valid, resp->data_len);
  1479. ret = -EINVAL;
  1480. goto out;
  1481. }
  1482. memcpy(data, resp->data, resp->data_len);
  1483. kfree(req);
  1484. kfree(resp);
  1485. return 0;
  1486. out:
  1487. kfree(req);
  1488. kfree(resp);
  1489. return ret;
  1490. }
  1491. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1492. u32 offset, u32 mem_type,
  1493. u32 data_len, u8 *data)
  1494. {
  1495. struct wlfw_athdiag_write_req_msg_v01 *req;
  1496. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1497. struct qmi_txn txn;
  1498. int ret = 0;
  1499. if (!plat_priv)
  1500. return -ENODEV;
  1501. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1502. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1503. data, data_len);
  1504. return -EINVAL;
  1505. }
  1506. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1507. plat_priv->driver_state, offset, mem_type, data_len, data);
  1508. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1509. if (!req)
  1510. return -ENOMEM;
  1511. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1512. if (!resp) {
  1513. kfree(req);
  1514. return -ENOMEM;
  1515. }
  1516. req->offset = offset;
  1517. req->mem_type = mem_type;
  1518. req->data_len = data_len;
  1519. memcpy(req->data, data, data_len);
  1520. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1521. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1522. if (ret < 0) {
  1523. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1524. ret);
  1525. goto out;
  1526. }
  1527. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1528. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1529. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1530. wlfw_athdiag_write_req_msg_v01_ei, req);
  1531. if (ret < 0) {
  1532. qmi_txn_cancel(&txn);
  1533. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1534. ret);
  1535. goto out;
  1536. }
  1537. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1538. if (ret < 0) {
  1539. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1540. ret);
  1541. goto out;
  1542. }
  1543. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1544. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1545. resp->resp.result, resp->resp.error);
  1546. ret = -resp->resp.result;
  1547. goto out;
  1548. }
  1549. kfree(req);
  1550. kfree(resp);
  1551. return 0;
  1552. out:
  1553. kfree(req);
  1554. kfree(resp);
  1555. return ret;
  1556. }
  1557. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1558. u8 fw_log_mode)
  1559. {
  1560. struct wlfw_ini_req_msg_v01 *req;
  1561. struct wlfw_ini_resp_msg_v01 *resp;
  1562. struct qmi_txn txn;
  1563. int ret = 0;
  1564. if (!plat_priv)
  1565. return -ENODEV;
  1566. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1567. plat_priv->driver_state, fw_log_mode);
  1568. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1569. if (!req)
  1570. return -ENOMEM;
  1571. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1572. if (!resp) {
  1573. kfree(req);
  1574. return -ENOMEM;
  1575. }
  1576. req->enablefwlog_valid = 1;
  1577. req->enablefwlog = fw_log_mode;
  1578. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1579. wlfw_ini_resp_msg_v01_ei, resp);
  1580. if (ret < 0) {
  1581. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1582. fw_log_mode, ret);
  1583. goto out;
  1584. }
  1585. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1586. QMI_WLFW_INI_REQ_V01,
  1587. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1588. wlfw_ini_req_msg_v01_ei, req);
  1589. if (ret < 0) {
  1590. qmi_txn_cancel(&txn);
  1591. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1592. fw_log_mode, ret);
  1593. goto out;
  1594. }
  1595. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1596. if (ret < 0) {
  1597. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1598. fw_log_mode, ret);
  1599. goto out;
  1600. }
  1601. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1602. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1603. fw_log_mode, resp->resp.result, resp->resp.error);
  1604. ret = -resp->resp.result;
  1605. goto out;
  1606. }
  1607. kfree(req);
  1608. kfree(resp);
  1609. return 0;
  1610. out:
  1611. kfree(req);
  1612. kfree(resp);
  1613. return ret;
  1614. }
  1615. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1616. {
  1617. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1618. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1619. struct qmi_txn txn;
  1620. int ret = 0;
  1621. if (!plat_priv)
  1622. return -ENODEV;
  1623. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1624. !plat_priv->fw_pcie_gen_switch) {
  1625. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1626. return 0;
  1627. }
  1628. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1629. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1630. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1631. plat_priv->pcie_gen_speed;
  1632. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1633. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1634. if (ret < 0) {
  1635. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1636. ret);
  1637. goto out;
  1638. }
  1639. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1640. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1641. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1642. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1643. if (ret < 0) {
  1644. qmi_txn_cancel(&txn);
  1645. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1646. goto out;
  1647. }
  1648. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1649. if (ret < 0) {
  1650. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1651. ret);
  1652. goto out;
  1653. }
  1654. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1655. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1656. plat_priv->pcie_gen_speed, resp.resp.result,
  1657. resp.resp.error);
  1658. ret = -resp.resp.result;
  1659. }
  1660. out:
  1661. /* Reset PCIE Gen speed after one time use */
  1662. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1663. return ret;
  1664. }
  1665. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1666. {
  1667. struct wlfw_antenna_switch_req_msg_v01 *req;
  1668. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1669. struct qmi_txn txn;
  1670. int ret = 0;
  1671. if (!plat_priv)
  1672. return -ENODEV;
  1673. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1674. plat_priv->driver_state);
  1675. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1676. if (!req)
  1677. return -ENOMEM;
  1678. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1679. if (!resp) {
  1680. kfree(req);
  1681. return -ENOMEM;
  1682. }
  1683. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1684. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1685. if (ret < 0) {
  1686. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1687. ret);
  1688. goto out;
  1689. }
  1690. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1691. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1692. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1693. wlfw_antenna_switch_req_msg_v01_ei, req);
  1694. if (ret < 0) {
  1695. qmi_txn_cancel(&txn);
  1696. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1697. ret);
  1698. goto out;
  1699. }
  1700. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1701. if (ret < 0) {
  1702. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1703. ret);
  1704. goto out;
  1705. }
  1706. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1707. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1708. resp->resp.result, resp->resp.error);
  1709. ret = -resp->resp.result;
  1710. goto out;
  1711. }
  1712. if (resp->antenna_valid)
  1713. plat_priv->antenna = resp->antenna;
  1714. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1715. resp->antenna_valid, resp->antenna);
  1716. kfree(req);
  1717. kfree(resp);
  1718. return 0;
  1719. out:
  1720. kfree(req);
  1721. kfree(resp);
  1722. return ret;
  1723. }
  1724. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1725. {
  1726. struct wlfw_antenna_grant_req_msg_v01 *req;
  1727. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1728. struct qmi_txn txn;
  1729. int ret = 0;
  1730. if (!plat_priv)
  1731. return -ENODEV;
  1732. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1733. plat_priv->driver_state, plat_priv->grant);
  1734. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1735. if (!req)
  1736. return -ENOMEM;
  1737. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1738. if (!resp) {
  1739. kfree(req);
  1740. return -ENOMEM;
  1741. }
  1742. req->grant_valid = 1;
  1743. req->grant = plat_priv->grant;
  1744. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1745. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1746. if (ret < 0) {
  1747. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1748. ret);
  1749. goto out;
  1750. }
  1751. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1752. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1753. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1754. wlfw_antenna_grant_req_msg_v01_ei, req);
  1755. if (ret < 0) {
  1756. qmi_txn_cancel(&txn);
  1757. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1758. ret);
  1759. goto out;
  1760. }
  1761. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1762. if (ret < 0) {
  1763. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1764. ret);
  1765. goto out;
  1766. }
  1767. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1768. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1769. resp->resp.result, resp->resp.error);
  1770. ret = -resp->resp.result;
  1771. goto out;
  1772. }
  1773. kfree(req);
  1774. kfree(resp);
  1775. return 0;
  1776. out:
  1777. kfree(req);
  1778. kfree(resp);
  1779. return ret;
  1780. }
  1781. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1782. {
  1783. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1784. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1785. struct qmi_txn txn;
  1786. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1787. int ret = 0;
  1788. int i;
  1789. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1790. plat_priv->driver_state);
  1791. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1792. if (!req)
  1793. return -ENOMEM;
  1794. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1795. if (!resp) {
  1796. kfree(req);
  1797. return -ENOMEM;
  1798. }
  1799. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1800. for (i = 0; i < req->mem_seg_len; i++) {
  1801. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1802. qdss_mem[i].va, &qdss_mem[i].pa,
  1803. qdss_mem[i].size, qdss_mem[i].type);
  1804. req->mem_seg[i].addr = qdss_mem[i].pa;
  1805. req->mem_seg[i].size = qdss_mem[i].size;
  1806. req->mem_seg[i].type = qdss_mem[i].type;
  1807. }
  1808. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1809. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1810. if (ret < 0) {
  1811. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1812. ret);
  1813. goto out;
  1814. }
  1815. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1816. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1817. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1818. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1819. if (ret < 0) {
  1820. qmi_txn_cancel(&txn);
  1821. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1822. ret);
  1823. goto out;
  1824. }
  1825. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1826. if (ret < 0) {
  1827. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1828. ret);
  1829. goto out;
  1830. }
  1831. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1832. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  1833. resp->resp.result, resp->resp.error);
  1834. ret = -resp->resp.result;
  1835. goto out;
  1836. }
  1837. kfree(req);
  1838. kfree(resp);
  1839. return 0;
  1840. out:
  1841. kfree(req);
  1842. kfree(resp);
  1843. return ret;
  1844. }
  1845. static int cnss_wlfw_wfc_call_status_send_sync
  1846. (struct cnss_plat_data *plat_priv,
  1847. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  1848. {
  1849. struct wlfw_wfc_call_status_req_msg_v01 *req;
  1850. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  1851. struct qmi_txn txn;
  1852. int ret = 0;
  1853. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1854. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  1855. return -EINVAL;
  1856. }
  1857. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1858. if (!req)
  1859. return -ENOMEM;
  1860. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1861. if (!resp) {
  1862. kfree(req);
  1863. return -ENOMEM;
  1864. }
  1865. /**
  1866. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  1867. * But in r2 update QMI structure is expanded and as an effect qmi
  1868. * decoded structures have padding. Thus we cannot use buffer design.
  1869. * For backward compatibility for r1 design copy only wfc_call_active
  1870. * value in hex buffer.
  1871. */
  1872. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  1873. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  1874. /* wfc_call_active is mandatory in IMS indication */
  1875. req->wfc_call_active_valid = 1;
  1876. req->wfc_call_active = ind_msg->wfc_call_active;
  1877. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  1878. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  1879. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  1880. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  1881. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  1882. req->twt_ims_start = ind_msg->twt_ims_start;
  1883. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  1884. req->twt_ims_int = ind_msg->twt_ims_int;
  1885. req->media_quality_valid = ind_msg->media_quality_valid;
  1886. req->media_quality =
  1887. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  1888. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  1889. plat_priv->driver_state);
  1890. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1891. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  1892. if (ret < 0) {
  1893. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  1894. ret);
  1895. goto out;
  1896. }
  1897. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1898. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  1899. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  1900. wlfw_wfc_call_status_req_msg_v01_ei, req);
  1901. if (ret < 0) {
  1902. qmi_txn_cancel(&txn);
  1903. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  1904. ret);
  1905. goto out;
  1906. }
  1907. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1908. if (ret < 0) {
  1909. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  1910. ret);
  1911. goto out;
  1912. }
  1913. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1914. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  1915. resp->resp.result, resp->resp.error);
  1916. ret = -resp->resp.result;
  1917. goto out;
  1918. }
  1919. ret = 0;
  1920. out:
  1921. kfree(req);
  1922. kfree(resp);
  1923. return ret;
  1924. }
  1925. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  1926. {
  1927. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  1928. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  1929. struct qmi_txn txn;
  1930. int ret = 0;
  1931. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  1932. plat_priv->dynamic_feature,
  1933. plat_priv->driver_state);
  1934. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1935. if (!req)
  1936. return -ENOMEM;
  1937. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1938. if (!resp) {
  1939. kfree(req);
  1940. return -ENOMEM;
  1941. }
  1942. req->mask_valid = 1;
  1943. req->mask = plat_priv->dynamic_feature;
  1944. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1945. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  1946. if (ret < 0) {
  1947. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  1948. ret);
  1949. goto out;
  1950. }
  1951. ret = qmi_send_request
  1952. (&plat_priv->qmi_wlfw, NULL, &txn,
  1953. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  1954. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  1955. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  1956. if (ret < 0) {
  1957. qmi_txn_cancel(&txn);
  1958. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  1959. ret);
  1960. goto out;
  1961. }
  1962. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1963. if (ret < 0) {
  1964. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  1965. ret);
  1966. goto out;
  1967. }
  1968. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1969. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  1970. resp->resp.result, resp->resp.error);
  1971. ret = -resp->resp.result;
  1972. goto out;
  1973. }
  1974. out:
  1975. kfree(req);
  1976. kfree(resp);
  1977. return ret;
  1978. }
  1979. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  1980. void *cmd, int cmd_len)
  1981. {
  1982. struct wlfw_get_info_req_msg_v01 *req;
  1983. struct wlfw_get_info_resp_msg_v01 *resp;
  1984. struct qmi_txn txn;
  1985. int ret = 0;
  1986. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  1987. type, cmd_len, plat_priv->driver_state);
  1988. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  1989. return -EINVAL;
  1990. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1991. if (!req)
  1992. return -ENOMEM;
  1993. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1994. if (!resp) {
  1995. kfree(req);
  1996. return -ENOMEM;
  1997. }
  1998. req->type = type;
  1999. req->data_len = cmd_len;
  2000. memcpy(req->data, cmd, req->data_len);
  2001. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2002. wlfw_get_info_resp_msg_v01_ei, resp);
  2003. if (ret < 0) {
  2004. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2005. ret);
  2006. goto out;
  2007. }
  2008. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2009. QMI_WLFW_GET_INFO_REQ_V01,
  2010. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2011. wlfw_get_info_req_msg_v01_ei, req);
  2012. if (ret < 0) {
  2013. qmi_txn_cancel(&txn);
  2014. cnss_pr_err("Failed to send get info request, err: %d\n",
  2015. ret);
  2016. goto out;
  2017. }
  2018. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2019. if (ret < 0) {
  2020. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2021. ret);
  2022. goto out;
  2023. }
  2024. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2025. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2026. resp->resp.result, resp->resp.error);
  2027. ret = -resp->resp.result;
  2028. goto out;
  2029. }
  2030. kfree(req);
  2031. kfree(resp);
  2032. return 0;
  2033. out:
  2034. kfree(req);
  2035. kfree(resp);
  2036. return ret;
  2037. }
  2038. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2039. {
  2040. return QMI_WLFW_TIMEOUT_MS;
  2041. }
  2042. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2043. struct sockaddr_qrtr *sq,
  2044. struct qmi_txn *txn, const void *data)
  2045. {
  2046. struct cnss_plat_data *plat_priv =
  2047. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2048. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2049. int i;
  2050. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2051. if (!txn) {
  2052. cnss_pr_err("Spurious indication\n");
  2053. return;
  2054. }
  2055. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2056. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2057. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2058. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2059. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2060. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2061. if (plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2062. plat_priv->fw_mem[i].attrs |=
  2063. DMA_ATTR_FORCE_CONTIGUOUS;
  2064. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2065. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2066. }
  2067. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2068. 0, NULL);
  2069. }
  2070. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2071. struct sockaddr_qrtr *sq,
  2072. struct qmi_txn *txn, const void *data)
  2073. {
  2074. struct cnss_plat_data *plat_priv =
  2075. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2076. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2077. if (!txn) {
  2078. cnss_pr_err("Spurious indication\n");
  2079. return;
  2080. }
  2081. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2082. 0, NULL);
  2083. }
  2084. /**
  2085. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2086. *
  2087. * This event is not required for HST/ HSP as FW calibration done is
  2088. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2089. */
  2090. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2091. struct sockaddr_qrtr *sq,
  2092. struct qmi_txn *txn, const void *data)
  2093. {
  2094. struct cnss_plat_data *plat_priv =
  2095. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2096. struct cnss_cal_info *cal_info;
  2097. if (!txn) {
  2098. cnss_pr_err("Spurious indication\n");
  2099. return;
  2100. }
  2101. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2102. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2103. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2104. return;
  2105. }
  2106. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2107. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2108. if (!cal_info)
  2109. return;
  2110. cal_info->cal_status = CNSS_CAL_DONE;
  2111. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2112. 0, cal_info);
  2113. }
  2114. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2115. struct sockaddr_qrtr *sq,
  2116. struct qmi_txn *txn, const void *data)
  2117. {
  2118. struct cnss_plat_data *plat_priv =
  2119. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2120. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2121. if (!txn) {
  2122. cnss_pr_err("Spurious indication\n");
  2123. return;
  2124. }
  2125. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2126. }
  2127. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2128. struct sockaddr_qrtr *sq,
  2129. struct qmi_txn *txn, const void *data)
  2130. {
  2131. struct cnss_plat_data *plat_priv =
  2132. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2133. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2134. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2135. if (!txn) {
  2136. cnss_pr_err("Spurious indication\n");
  2137. return;
  2138. }
  2139. if (ind_msg->pwr_pin_result_valid)
  2140. plat_priv->pin_result.fw_pwr_pin_result =
  2141. ind_msg->pwr_pin_result;
  2142. if (ind_msg->phy_io_pin_result_valid)
  2143. plat_priv->pin_result.fw_phy_io_pin_result =
  2144. ind_msg->phy_io_pin_result;
  2145. if (ind_msg->rf_pin_result_valid)
  2146. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2147. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2148. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2149. ind_msg->rf_pin_result);
  2150. }
  2151. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2152. u32 cal_file_download_size)
  2153. {
  2154. struct wlfw_cal_report_req_msg_v01 req = {0};
  2155. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2156. struct qmi_txn txn;
  2157. int ret = 0;
  2158. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2159. cal_file_download_size, plat_priv->driver_state);
  2160. req.cal_file_download_size_valid = 1;
  2161. req.cal_file_download_size = cal_file_download_size;
  2162. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2163. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2164. if (ret < 0) {
  2165. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2166. ret);
  2167. goto out;
  2168. }
  2169. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2170. QMI_WLFW_CAL_REPORT_REQ_V01,
  2171. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2172. wlfw_cal_report_req_msg_v01_ei, &req);
  2173. if (ret < 0) {
  2174. qmi_txn_cancel(&txn);
  2175. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2176. ret);
  2177. goto out;
  2178. }
  2179. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2180. if (ret < 0) {
  2181. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2182. ret);
  2183. goto out;
  2184. }
  2185. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2186. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2187. resp.resp.result, resp.resp.error);
  2188. ret = -resp.resp.result;
  2189. goto out;
  2190. }
  2191. out:
  2192. return ret;
  2193. }
  2194. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2195. struct sockaddr_qrtr *sq,
  2196. struct qmi_txn *txn, const void *data)
  2197. {
  2198. struct cnss_plat_data *plat_priv =
  2199. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2200. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2201. struct cnss_cal_info *cal_info;
  2202. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2203. ind->cal_file_upload_size);
  2204. cnss_pr_info("Calibration took %d ms\n",
  2205. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2206. if (!txn) {
  2207. cnss_pr_err("Spurious indication\n");
  2208. return;
  2209. }
  2210. if (ind->cal_file_upload_size_valid)
  2211. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2212. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2213. if (!cal_info)
  2214. return;
  2215. cal_info->cal_status = CNSS_CAL_DONE;
  2216. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2217. 0, cal_info);
  2218. }
  2219. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2220. struct sockaddr_qrtr *sq,
  2221. struct qmi_txn *txn,
  2222. const void *data)
  2223. {
  2224. struct cnss_plat_data *plat_priv =
  2225. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2226. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2227. int i;
  2228. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2229. if (!txn) {
  2230. cnss_pr_err("Spurious indication\n");
  2231. return;
  2232. }
  2233. if (plat_priv->qdss_mem_seg_len) {
  2234. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2235. plat_priv->qdss_mem_seg_len);
  2236. return;
  2237. }
  2238. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2239. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2240. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2241. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2242. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2243. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2244. }
  2245. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2246. 0, NULL);
  2247. }
  2248. /**
  2249. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2250. *
  2251. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2252. * fw memory segment for dumping to file system. Only one type of mem can be
  2253. * saved per indication and is provided in mem seg index 0.
  2254. *
  2255. * Return: None
  2256. */
  2257. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2258. struct sockaddr_qrtr *sq,
  2259. struct qmi_txn *txn,
  2260. const void *data)
  2261. {
  2262. struct cnss_plat_data *plat_priv =
  2263. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2264. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2265. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2266. int i = 0;
  2267. if (!txn || !data) {
  2268. cnss_pr_err("Spurious indication\n");
  2269. return;
  2270. }
  2271. cnss_pr_dbg("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2272. ind_msg->source, ind_msg->mem_seg_valid,
  2273. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2274. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2275. if (!event_data)
  2276. return;
  2277. event_data->mem_type = ind_msg->mem_seg[0].type;
  2278. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2279. event_data->total_size = ind_msg->total_size;
  2280. if (ind_msg->mem_seg_valid) {
  2281. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2282. cnss_pr_err("Invalid seg len indication\n");
  2283. goto free_event_data;
  2284. }
  2285. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2286. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2287. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2288. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2289. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2290. goto free_event_data;
  2291. }
  2292. cnss_pr_dbg("seg-%d: addr 0x%llx size 0x%x\n",
  2293. i, ind_msg->mem_seg[i].addr,
  2294. ind_msg->mem_seg[i].size);
  2295. }
  2296. }
  2297. if (ind_msg->file_name_valid)
  2298. strlcpy(event_data->file_name, ind_msg->file_name,
  2299. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2300. if (ind_msg->source == 1) {
  2301. if (!ind_msg->file_name_valid)
  2302. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2303. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2304. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2305. 0, event_data);
  2306. } else {
  2307. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2308. if (!ind_msg->file_name_valid)
  2309. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2310. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2311. } else {
  2312. if (!ind_msg->file_name_valid)
  2313. strlcpy(event_data->file_name, "fw_mem_dump",
  2314. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2315. }
  2316. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2317. 0, event_data);
  2318. }
  2319. return;
  2320. free_event_data:
  2321. kfree(event_data);
  2322. }
  2323. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2324. struct sockaddr_qrtr *sq,
  2325. struct qmi_txn *txn,
  2326. const void *data)
  2327. {
  2328. struct cnss_plat_data *plat_priv =
  2329. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2330. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2331. 0, NULL);
  2332. }
  2333. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2334. struct sockaddr_qrtr *sq,
  2335. struct qmi_txn *txn,
  2336. const void *data)
  2337. {
  2338. struct cnss_plat_data *plat_priv =
  2339. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2340. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2341. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2342. if (!txn) {
  2343. cnss_pr_err("Spurious indication\n");
  2344. return;
  2345. }
  2346. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2347. ind_msg->data_len, ind_msg->type,
  2348. ind_msg->is_last, ind_msg->seq_no);
  2349. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2350. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2351. (void *)ind_msg->data,
  2352. ind_msg->data_len);
  2353. }
  2354. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2355. (struct cnss_plat_data *plat_priv,
  2356. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2357. {
  2358. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2359. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2360. struct qmi_txn txn;
  2361. int ret = 0;
  2362. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2363. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2364. return -EINVAL;
  2365. }
  2366. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2367. if (!req)
  2368. return -ENOMEM;
  2369. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2370. if (!resp) {
  2371. kfree(req);
  2372. return -ENOMEM;
  2373. }
  2374. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2375. req->twt_sta_start = ind_msg->twt_sta_start;
  2376. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2377. req->twt_sta_int = ind_msg->twt_sta_int;
  2378. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2379. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2380. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2381. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2382. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2383. req->twt_sta_dl = req->twt_sta_dl;
  2384. req->twt_sta_config_changed_valid =
  2385. ind_msg->twt_sta_config_changed_valid;
  2386. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2387. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2388. plat_priv->driver_state);
  2389. ret =
  2390. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2391. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2392. resp);
  2393. if (ret < 0) {
  2394. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2395. ret);
  2396. goto out;
  2397. }
  2398. ret =
  2399. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2400. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2401. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2402. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2403. if (ret < 0) {
  2404. qmi_txn_cancel(&txn);
  2405. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2406. goto out;
  2407. }
  2408. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2409. if (ret < 0) {
  2410. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2411. goto out;
  2412. }
  2413. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2414. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2415. resp->resp.result, resp->resp.error);
  2416. ret = -resp->resp.result;
  2417. goto out;
  2418. }
  2419. ret = 0;
  2420. out:
  2421. kfree(req);
  2422. kfree(resp);
  2423. return ret;
  2424. }
  2425. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2426. void *data)
  2427. {
  2428. int ret;
  2429. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2430. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2431. kfree(data);
  2432. return ret;
  2433. }
  2434. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2435. struct sockaddr_qrtr *sq,
  2436. struct qmi_txn *txn,
  2437. const void *data)
  2438. {
  2439. struct cnss_plat_data *plat_priv =
  2440. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2441. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2442. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2443. if (!txn) {
  2444. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2445. return;
  2446. }
  2447. if (!ind_msg) {
  2448. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2449. return;
  2450. }
  2451. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2452. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2453. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2454. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2455. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2456. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2457. ind_msg->twt_sta_config_changed_valid,
  2458. ind_msg->twt_sta_config_changed);
  2459. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2460. if (!event_data)
  2461. return;
  2462. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2463. event_data);
  2464. }
  2465. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2466. {
  2467. .type = QMI_INDICATION,
  2468. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2469. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2470. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2471. .fn = cnss_wlfw_request_mem_ind_cb
  2472. },
  2473. {
  2474. .type = QMI_INDICATION,
  2475. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2476. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2477. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2478. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2479. },
  2480. {
  2481. .type = QMI_INDICATION,
  2482. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2483. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2484. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2485. .fn = cnss_wlfw_fw_ready_ind_cb
  2486. },
  2487. {
  2488. .type = QMI_INDICATION,
  2489. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2490. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2491. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2492. .fn = cnss_wlfw_fw_init_done_ind_cb
  2493. },
  2494. {
  2495. .type = QMI_INDICATION,
  2496. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2497. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2498. .decoded_size =
  2499. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2500. .fn = cnss_wlfw_pin_result_ind_cb
  2501. },
  2502. {
  2503. .type = QMI_INDICATION,
  2504. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2505. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2506. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2507. .fn = cnss_wlfw_cal_done_ind_cb
  2508. },
  2509. {
  2510. .type = QMI_INDICATION,
  2511. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2512. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2513. .decoded_size =
  2514. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2515. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2516. },
  2517. {
  2518. .type = QMI_INDICATION,
  2519. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2520. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2521. .decoded_size =
  2522. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2523. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2524. },
  2525. {
  2526. .type = QMI_INDICATION,
  2527. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2528. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2529. .decoded_size =
  2530. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2531. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2532. },
  2533. {
  2534. .type = QMI_INDICATION,
  2535. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2536. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2537. .decoded_size =
  2538. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2539. .fn = cnss_wlfw_respond_get_info_ind_cb
  2540. },
  2541. {
  2542. .type = QMI_INDICATION,
  2543. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2544. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2545. .decoded_size =
  2546. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2547. .fn = cnss_wlfw_process_twt_cfg_ind
  2548. },
  2549. {}
  2550. };
  2551. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2552. void *data)
  2553. {
  2554. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2555. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2556. struct sockaddr_qrtr sq = { 0 };
  2557. int ret = 0;
  2558. if (!event_data)
  2559. return -EINVAL;
  2560. sq.sq_family = AF_QIPCRTR;
  2561. sq.sq_node = event_data->node;
  2562. sq.sq_port = event_data->port;
  2563. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2564. sizeof(sq), 0);
  2565. if (ret < 0) {
  2566. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2567. goto out;
  2568. }
  2569. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2570. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2571. plat_priv->driver_state);
  2572. kfree(data);
  2573. return 0;
  2574. out:
  2575. CNSS_QMI_ASSERT();
  2576. kfree(data);
  2577. return ret;
  2578. }
  2579. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2580. {
  2581. int ret = 0;
  2582. if (!plat_priv)
  2583. return -ENODEV;
  2584. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2585. cnss_pr_err("Unexpected WLFW server arrive\n");
  2586. CNSS_ASSERT(0);
  2587. return -EINVAL;
  2588. }
  2589. cnss_ignore_qmi_failure(false);
  2590. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2591. if (ret < 0)
  2592. goto out;
  2593. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2594. if (ret < 0) {
  2595. if (ret == -EALREADY)
  2596. ret = 0;
  2597. goto out;
  2598. }
  2599. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2600. if (ret < 0)
  2601. goto out;
  2602. return 0;
  2603. out:
  2604. return ret;
  2605. }
  2606. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2607. {
  2608. int ret;
  2609. if (!plat_priv)
  2610. return -ENODEV;
  2611. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2612. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2613. plat_priv->driver_state);
  2614. cnss_qmi_deinit(plat_priv);
  2615. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2616. ret = cnss_qmi_init(plat_priv);
  2617. if (ret < 0) {
  2618. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2619. CNSS_ASSERT(0);
  2620. }
  2621. return 0;
  2622. }
  2623. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2624. struct qmi_service *service)
  2625. {
  2626. struct cnss_plat_data *plat_priv =
  2627. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2628. struct cnss_qmi_event_server_arrive_data *event_data;
  2629. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2630. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2631. plat_priv->driver_state);
  2632. return 0;
  2633. }
  2634. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2635. service->node, service->port);
  2636. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2637. if (!event_data)
  2638. return -ENOMEM;
  2639. event_data->node = service->node;
  2640. event_data->port = service->port;
  2641. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2642. 0, event_data);
  2643. return 0;
  2644. }
  2645. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2646. struct qmi_service *service)
  2647. {
  2648. struct cnss_plat_data *plat_priv =
  2649. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2650. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2651. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2652. plat_priv->driver_state);
  2653. return;
  2654. }
  2655. cnss_pr_dbg("WLFW server exiting\n");
  2656. if (plat_priv) {
  2657. cnss_ignore_qmi_failure(true);
  2658. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2659. }
  2660. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2661. 0, NULL);
  2662. }
  2663. static struct qmi_ops qmi_wlfw_ops = {
  2664. .new_server = wlfw_new_server,
  2665. .del_server = wlfw_del_server,
  2666. };
  2667. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2668. {
  2669. int ret = 0;
  2670. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2671. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2672. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2673. if (ret < 0) {
  2674. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2675. ret);
  2676. goto out;
  2677. }
  2678. ret = qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2679. WLFW_SERVICE_VERS_V01, WLFW_SERVICE_INS_ID_V01);
  2680. if (ret < 0)
  2681. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2682. out:
  2683. return ret;
  2684. }
  2685. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2686. {
  2687. qmi_handle_release(&plat_priv->qmi_wlfw);
  2688. }
  2689. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2690. {
  2691. struct dms_get_mac_address_req_msg_v01 req;
  2692. struct dms_get_mac_address_resp_msg_v01 resp;
  2693. struct qmi_txn txn;
  2694. int ret = 0;
  2695. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2696. cnss_pr_err("DMS QMI connection not established\n");
  2697. return -EINVAL;
  2698. }
  2699. cnss_pr_dbg("Requesting DMS MAC address");
  2700. memset(&resp, 0, sizeof(resp));
  2701. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2702. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2703. if (ret < 0) {
  2704. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2705. ret);
  2706. goto out;
  2707. }
  2708. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2709. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2710. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2711. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2712. dms_get_mac_address_req_msg_v01_ei, &req);
  2713. if (ret < 0) {
  2714. qmi_txn_cancel(&txn);
  2715. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2716. ret);
  2717. goto out;
  2718. }
  2719. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2720. if (ret < 0) {
  2721. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2722. ret);
  2723. goto out;
  2724. }
  2725. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2726. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2727. resp.resp.result, resp.resp.error);
  2728. ret = -resp.resp.result;
  2729. goto out;
  2730. }
  2731. if (!resp.mac_address_valid ||
  2732. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2733. cnss_pr_err("Invalid MAC address received from DMS\n");
  2734. plat_priv->dms.mac_valid = false;
  2735. goto out;
  2736. }
  2737. plat_priv->dms.mac_valid = true;
  2738. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2739. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2740. out:
  2741. return ret;
  2742. }
  2743. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2744. unsigned int node, unsigned int port)
  2745. {
  2746. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2747. struct sockaddr_qrtr sq = {0};
  2748. int ret = 0;
  2749. sq.sq_family = AF_QIPCRTR;
  2750. sq.sq_node = node;
  2751. sq.sq_port = port;
  2752. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  2753. sizeof(sq), 0);
  2754. if (ret < 0) {
  2755. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  2756. node, port);
  2757. goto out;
  2758. }
  2759. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2760. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  2761. plat_priv->driver_state);
  2762. out:
  2763. return ret;
  2764. }
  2765. static int dms_new_server(struct qmi_handle *qmi_dms,
  2766. struct qmi_service *service)
  2767. {
  2768. struct cnss_plat_data *plat_priv =
  2769. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2770. if (!service)
  2771. return -EINVAL;
  2772. return cnss_dms_connect_to_server(plat_priv, service->node,
  2773. service->port);
  2774. }
  2775. static void dms_del_server(struct qmi_handle *qmi_dms,
  2776. struct qmi_service *service)
  2777. {
  2778. struct cnss_plat_data *plat_priv =
  2779. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  2780. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  2781. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  2782. plat_priv->driver_state);
  2783. }
  2784. static struct qmi_ops qmi_dms_ops = {
  2785. .new_server = dms_new_server,
  2786. .del_server = dms_del_server,
  2787. };
  2788. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  2789. {
  2790. int ret = 0;
  2791. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  2792. &qmi_dms_ops, NULL);
  2793. if (ret < 0) {
  2794. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  2795. goto out;
  2796. }
  2797. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  2798. DMS_SERVICE_VERS_V01, 0);
  2799. if (ret < 0)
  2800. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  2801. out:
  2802. return ret;
  2803. }
  2804. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  2805. {
  2806. qmi_handle_release(&plat_priv->qmi_dms);
  2807. }
  2808. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  2809. {
  2810. int ret;
  2811. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  2812. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  2813. struct qmi_txn txn;
  2814. if (!plat_priv)
  2815. return -ENODEV;
  2816. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  2817. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2818. if (!req)
  2819. return -ENOMEM;
  2820. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2821. if (!resp) {
  2822. kfree(req);
  2823. return -ENOMEM;
  2824. }
  2825. req->antenna = plat_priv->antenna;
  2826. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2827. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  2828. if (ret < 0) {
  2829. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  2830. ret);
  2831. goto out;
  2832. }
  2833. ret = qmi_send_request
  2834. (&plat_priv->coex_qmi, NULL, &txn,
  2835. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  2836. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  2837. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  2838. if (ret < 0) {
  2839. qmi_txn_cancel(&txn);
  2840. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  2841. ret);
  2842. goto out;
  2843. }
  2844. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2845. if (ret < 0) {
  2846. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  2847. ret);
  2848. goto out;
  2849. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2850. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  2851. resp->resp.result, resp->resp.error);
  2852. ret = -resp->resp.result;
  2853. goto out;
  2854. }
  2855. if (resp->grant_valid)
  2856. plat_priv->grant = resp->grant;
  2857. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  2858. kfree(resp);
  2859. kfree(req);
  2860. return 0;
  2861. out:
  2862. kfree(resp);
  2863. kfree(req);
  2864. return ret;
  2865. }
  2866. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  2867. {
  2868. int ret;
  2869. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  2870. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  2871. struct qmi_txn txn;
  2872. if (!plat_priv)
  2873. return -ENODEV;
  2874. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  2875. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2876. if (!req)
  2877. return -ENOMEM;
  2878. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2879. if (!resp) {
  2880. kfree(req);
  2881. return -ENOMEM;
  2882. }
  2883. req->antenna = plat_priv->antenna;
  2884. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  2885. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  2886. if (ret < 0) {
  2887. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  2888. ret);
  2889. goto out;
  2890. }
  2891. ret = qmi_send_request
  2892. (&plat_priv->coex_qmi, NULL, &txn,
  2893. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  2894. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  2895. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  2896. if (ret < 0) {
  2897. qmi_txn_cancel(&txn);
  2898. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  2899. ret);
  2900. goto out;
  2901. }
  2902. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  2903. if (ret < 0) {
  2904. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  2905. ret);
  2906. goto out;
  2907. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2908. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  2909. resp->resp.result, resp->resp.error);
  2910. ret = -resp->resp.result;
  2911. goto out;
  2912. }
  2913. kfree(resp);
  2914. kfree(req);
  2915. return 0;
  2916. out:
  2917. kfree(resp);
  2918. kfree(req);
  2919. return ret;
  2920. }
  2921. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  2922. {
  2923. int ret;
  2924. struct wlfw_subsys_restart_level_req_msg_v01 req;
  2925. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  2926. u8 pcss_enabled;
  2927. if (!plat_priv)
  2928. return -ENODEV;
  2929. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2930. cnss_pr_err("Can't send pcss cmd before fw ready\n");
  2931. return -EINVAL;
  2932. }
  2933. pcss_enabled = plat_priv->recovery_pcss_enabled;
  2934. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  2935. req.restart_level_type_valid = 1;
  2936. req.restart_level_type = pcss_enabled;
  2937. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  2938. wlfw_subsys_restart_level_req_msg_v01_ei,
  2939. wlfw_subsys_restart_level_resp_msg_v01_ei,
  2940. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  2941. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  2942. QMI_WLFW_TIMEOUT_JF);
  2943. return ret;
  2944. }
  2945. static int coex_new_server(struct qmi_handle *qmi,
  2946. struct qmi_service *service)
  2947. {
  2948. struct cnss_plat_data *plat_priv =
  2949. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2950. struct sockaddr_qrtr sq = { 0 };
  2951. int ret = 0;
  2952. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  2953. service->node, service->port);
  2954. sq.sq_family = AF_QIPCRTR;
  2955. sq.sq_node = service->node;
  2956. sq.sq_port = service->port;
  2957. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  2958. if (ret < 0) {
  2959. cnss_pr_err("Fail to connect to remote service port\n");
  2960. return ret;
  2961. }
  2962. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2963. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  2964. plat_priv->driver_state);
  2965. return 0;
  2966. }
  2967. static void coex_del_server(struct qmi_handle *qmi,
  2968. struct qmi_service *service)
  2969. {
  2970. struct cnss_plat_data *plat_priv =
  2971. container_of(qmi, struct cnss_plat_data, coex_qmi);
  2972. cnss_pr_dbg("COEX server exit\n");
  2973. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  2974. }
  2975. static struct qmi_ops coex_qmi_ops = {
  2976. .new_server = coex_new_server,
  2977. .del_server = coex_del_server,
  2978. };
  2979. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  2980. { int ret;
  2981. ret = qmi_handle_init(&plat_priv->coex_qmi,
  2982. COEX_SERVICE_MAX_MSG_LEN,
  2983. &coex_qmi_ops, NULL);
  2984. if (ret < 0)
  2985. return ret;
  2986. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  2987. COEX_SERVICE_VERS_V01, 0);
  2988. return ret;
  2989. }
  2990. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  2991. {
  2992. qmi_handle_release(&plat_priv->coex_qmi);
  2993. }
  2994. /* IMS Service */
  2995. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  2996. {
  2997. int ret;
  2998. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  2999. struct qmi_txn *txn;
  3000. if (!plat_priv)
  3001. return -ENODEV;
  3002. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3003. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3004. if (!req)
  3005. return -ENOMEM;
  3006. req->wfc_call_status_valid = 1;
  3007. req->wfc_call_status = 1;
  3008. txn = &plat_priv->txn;
  3009. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3010. if (ret < 0) {
  3011. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3012. ret);
  3013. goto out;
  3014. }
  3015. ret = qmi_send_request
  3016. (&plat_priv->ims_qmi, NULL, txn,
  3017. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3018. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3019. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3020. if (ret < 0) {
  3021. qmi_txn_cancel(txn);
  3022. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3023. ret);
  3024. goto out;
  3025. }
  3026. kfree(req);
  3027. return 0;
  3028. out:
  3029. kfree(req);
  3030. return ret;
  3031. }
  3032. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3033. struct sockaddr_qrtr *sq,
  3034. struct qmi_txn *txn,
  3035. const void *data)
  3036. {
  3037. const
  3038. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3039. data;
  3040. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3041. if (!txn) {
  3042. cnss_pr_err("spurious response\n");
  3043. return;
  3044. }
  3045. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3046. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3047. resp->resp.result, resp->resp.error);
  3048. txn->result = -resp->resp.result;
  3049. }
  3050. }
  3051. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3052. void *data)
  3053. {
  3054. int ret;
  3055. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3056. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3057. kfree(data);
  3058. return ret;
  3059. }
  3060. static void
  3061. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3062. struct sockaddr_qrtr *sq,
  3063. struct qmi_txn *txn, const void *data)
  3064. {
  3065. struct cnss_plat_data *plat_priv =
  3066. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3067. const
  3068. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3069. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3070. if (!txn) {
  3071. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3072. return;
  3073. }
  3074. if (!ind_msg) {
  3075. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3076. return;
  3077. }
  3078. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3079. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3080. ind_msg->all_wfc_calls_held,
  3081. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3082. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3083. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3084. ind_msg->media_quality_valid, ind_msg->media_quality);
  3085. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3086. if (!event_data)
  3087. return;
  3088. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3089. 0, event_data);
  3090. }
  3091. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3092. {
  3093. .type = QMI_RESPONSE,
  3094. .msg_id =
  3095. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3096. .ei =
  3097. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3098. .decoded_size = sizeof(struct
  3099. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3100. .fn = ims_subscribe_for_indication_resp_cb
  3101. },
  3102. {
  3103. .type = QMI_INDICATION,
  3104. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3105. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3106. .decoded_size =
  3107. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3108. .fn = cnss_ims_process_wfc_call_ind_cb
  3109. },
  3110. {}
  3111. };
  3112. static int ims_new_server(struct qmi_handle *qmi,
  3113. struct qmi_service *service)
  3114. {
  3115. struct cnss_plat_data *plat_priv =
  3116. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3117. struct sockaddr_qrtr sq = { 0 };
  3118. int ret = 0;
  3119. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3120. service->node, service->port);
  3121. sq.sq_family = AF_QIPCRTR;
  3122. sq.sq_node = service->node;
  3123. sq.sq_port = service->port;
  3124. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3125. if (ret < 0) {
  3126. cnss_pr_err("Fail to connect to remote service port\n");
  3127. return ret;
  3128. }
  3129. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3130. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3131. plat_priv->driver_state);
  3132. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3133. return ret;
  3134. }
  3135. static void ims_del_server(struct qmi_handle *qmi,
  3136. struct qmi_service *service)
  3137. {
  3138. struct cnss_plat_data *plat_priv =
  3139. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3140. cnss_pr_dbg("IMS server exit\n");
  3141. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3142. }
  3143. static struct qmi_ops ims_qmi_ops = {
  3144. .new_server = ims_new_server,
  3145. .del_server = ims_del_server,
  3146. };
  3147. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3148. { int ret;
  3149. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3150. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3151. &ims_qmi_ops, qmi_ims_msg_handlers);
  3152. if (ret < 0)
  3153. return ret;
  3154. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3155. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3156. return ret;
  3157. }
  3158. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3159. {
  3160. qmi_handle_release(&plat_priv->ims_qmi);
  3161. }