4ac9875071
Add the HW header files for QCA6750 CRs-fixed: 2600285 Change-Id: I6a4f68765970cfbd8630a7c5f6173e2c034c5a81
548 regels
16 KiB
C
548 regels
16 KiB
C
/*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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//
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// DO NOT EDIT! This file is automatically generated
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// These definitions are tied to a particular hardware layout
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#ifndef _RX_MSDU_DETAILS_H_
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#define _RX_MSDU_DETAILS_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "buffer_addr_info.h"
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#include "rx_msdu_desc_info.h"
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0-1 struct buffer_addr_info buffer_addr_info_details;
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// 2-3 struct rx_msdu_desc_info rx_msdu_desc_info_details;
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_RX_MSDU_DETAILS 4
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struct rx_msdu_details {
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struct buffer_addr_info buffer_addr_info_details;
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struct rx_msdu_desc_info rx_msdu_desc_info_details;
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};
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/*
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struct buffer_addr_info buffer_addr_info_details
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Consumer: REO/SW
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Producer: RXDMA
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Details of the physical address of the buffer containing
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an MSDU (or entire MPDU)
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struct rx_msdu_desc_info rx_msdu_desc_info_details
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Consumer: REO/SW
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Producer: RXDMA
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General information related to the MSDU that should be
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passed on from RXDMA all the way to to the REO destination
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ring.
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*/
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/* EXTERNAL REFERENCE : struct buffer_addr_info buffer_addr_info_details */
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/* Description RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0
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Address (lower 32 bits) of the MSDU buffer OR
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MSDU_EXTENSION descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET 0x00000000
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#define RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_LSB 0
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#define RX_MSDU_DETAILS_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_MASK 0xffffffff
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/* Description RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32
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Address (upper 8 bits) of the MSDU buffer OR
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MSDU_EXTENSION descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_OFFSET 0x00000004
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_LSB 0
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_39_32_MASK 0x000000ff
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/* Description RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER
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Consumer: WBM
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Producer: SW/FW
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In case of 'NULL' pointer, this field is set to 0
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Indicates to which buffer manager the buffer OR
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MSDU_EXTENSION descriptor OR link descriptor that is being
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pointed to shall be returned after the frame has been
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processed. It is used by WBM for routing purposes.
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<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
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to the WMB buffer idle list
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<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
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returned to the WMB idle link descriptor idle list
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<enum 2 FW_BM> This buffer shall be returned to the FW
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<enum 3 SW0_BM> This buffer shall be returned to the SW,
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ring 0
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<enum 4 SW1_BM> This buffer shall be returned to the SW,
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ring 1
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<enum 5 SW2_BM> This buffer shall be returned to the SW,
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ring 2
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<enum 6 SW3_BM> This buffer shall be returned to the SW,
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ring 3
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<enum 7 SW4_BM> This buffer shall be returned to the SW,
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ring 4
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<legal all>
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*/
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_LSB 8
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_RETURN_BUFFER_MANAGER_MASK 0x00000700
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/* Description RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE
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Cookie field exclusively used by SW.
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In case of 'NULL' pointer, this field is set to 0
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HW ignores the contents, accept that it passes the
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programmed value on to other descriptors together with the
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physical address
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Field can be used by SW to for example associate the
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buffers physical address with the virtual address
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The bit definitions as used by SW are within SW HLD
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specification
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NOTE:
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The three most significant bits can have a special
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meaning in case this struct is embedded in a TX_MPDU_DETAILS
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STRUCT, and field transmit_bw_restriction is set
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In case of NON punctured transmission:
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Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
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Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
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In case of punctured transmission:
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Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
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Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
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Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
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Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
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Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
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Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
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Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
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Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
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Note: a punctured transmission is indicated by the
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presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
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TLV
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<legal all>
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*/
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_OFFSET 0x00000004
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_LSB 11
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#define RX_MSDU_DETAILS_1_BUFFER_ADDR_INFO_DETAILS_SW_BUFFER_COOKIE_MASK 0xfffff800
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/* EXTERNAL REFERENCE : struct rx_msdu_desc_info rx_msdu_desc_info_details */
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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<enum 0 Not_first_msdu> This is not the first MSDU in
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the MPDU.
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<enum 1 first_msdu> This MSDU is the first one in the
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MPDU.
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG
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Consumer: WBM/REO/SW/FW
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Producer: RXDMA
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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<enum 0 Not_last_msdu> There are more MSDUs linked to
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this MSDU that belongs to this MPDU
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<enum 1 Last_msdu> this MSDU is the last one in the
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MPDU. This setting is only allowed in combination with
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'Msdu_continuation' set to 0. This implies that when an msdu
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is spread out over multiple buffers and thus
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msdu_continuation is set, only for the very last buffer of
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the msdu, can the 'last_msdu_in_mpdu_flag' be set.
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When both first_msdu_in_mpdu_flag and
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last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
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belongs to only contains a single MSDU.
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION
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When set, this MSDU buffer was not able to hold the
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entire MSDU. The next buffer will therefor contain
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additional information related to this MSDU.
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH
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Parsed from RX_MSDU_START TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the First
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buffer used by MSDU.
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Full MSDU length in bytes after decapsulation.
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This field is still valid for MPDU frames without
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A-MSDU. It still represents MSDU length after decapsulation
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Or in case of RAW MPDUs, it indicates the length of the
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entire MPDU (without FCS field)
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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The ID of the REO exit ring where the MSDU frame shall
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push after (MPDU level) reordering has finished.
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<enum 0 reo_destination_tcl> Reo will push the frame
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into the REO2TCL ring
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<enum 1 reo_destination_sw1> Reo will push the frame
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into the REO2SW1 ring
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<enum 2 reo_destination_sw2> Reo will push the frame
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into the REO2SW2 ring
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<enum 3 reo_destination_sw3> Reo will push the frame
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into the REO2SW3 ring
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<enum 4 reo_destination_sw4> Reo will push the frame
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into the REO2SW4 ring
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<enum 5 reo_destination_release> Reo will push the frame
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into the REO_release ring
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<enum 6 reo_destination_fw> Reo will push the frame into
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the REO2FW ring
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<enum 7 reo_destination_sw5> Reo will push the frame
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into the REO2SW5 ring (REO remaps this in chips without
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REO2SW5 ring, e.g. Pine)
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<enum 8 reo_destination_sw6> Reo will push the frame
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into the REO2SW6 ring (REO remaps this in chips without
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REO2SW6 ring, e.g. Pine)
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<enum 9 reo_destination_9> REO remaps this <enum 10
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reo_destination_10> REO remaps this
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<enum 11 reo_destination_11> REO remaps this
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<enum 12 reo_destination_12> REO remaps this <enum 13
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reo_destination_13> REO remaps this
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<enum 14 reo_destination_14> REO remaps this
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<enum 15 reo_destination_15> REO remaps this
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<enum 16 reo_destination_16> REO remaps this
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<enum 17 reo_destination_17> REO remaps this
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<enum 18 reo_destination_18> REO remaps this
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<enum 19 reo_destination_19> REO remaps this
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<enum 20 reo_destination_20> REO remaps this
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<enum 21 reo_destination_21> REO remaps this
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<enum 22 reo_destination_22> REO remaps this
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<enum 23 reo_destination_23> REO remaps this
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<enum 24 reo_destination_24> REO remaps this
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<enum 25 reo_destination_25> REO remaps this
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<enum 26 reo_destination_26> REO remaps this
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<enum 27 reo_destination_27> REO remaps this
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<enum 28 reo_destination_28> REO remaps this
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<enum 29 reo_destination_29> REO remaps this
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<enum 30 reo_destination_30> REO remaps this
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<enum 31 reo_destination_31> REO remaps this
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 17
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x003e0000
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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When set, REO shall drop this MSDU and not forward it to
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any other ring...
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 22
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00400000
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates that OLE found a valid SA entry for this MSDU
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 23
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00800000
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates an unsuccessful MAC source address search due
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to the expiring of the search timer for this MSDU
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 24
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x01000000
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates that OLE found a valid DA entry for this MSDU
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 25
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x02000000
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC
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Field Only valid if da_is_valid is set
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Indicates the DA address was a Multicast of Broadcast
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address for this MSDU
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 26
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x04000000
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates an unsuccessful MAC destination address search
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due to the expiring of the search timer for this MSDU
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<legal all>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 27
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x08000000
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/* Description RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A
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<legal 0>
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*/
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000008
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_LSB 28
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#define RX_MSDU_DETAILS_2_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xf0000000
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/* Description RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A
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<legal 0>
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*/
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#define RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_OFFSET 0x0000000c
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#define RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_LSB 0
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#define RX_MSDU_DETAILS_3_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_MASK 0xffffffff
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#endif // _RX_MSDU_DETAILS_H_
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