36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
1048 rader
41 KiB
C
1048 rader
41 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _WBM_RELEASE_RING_TX_H_
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#define _WBM_RELEASE_RING_TX_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "tx_rate_stats_info.h"
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#include "buffer_addr_info.h"
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#define NUM_OF_DWORDS_WBM_RELEASE_RING_TX 8
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struct wbm_release_ring_tx {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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struct buffer_addr_info released_buff_or_desc_addr_info;
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uint32_t release_source_module : 3, // [2:0]
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bm_action : 3, // [5:3]
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buffer_or_desc_type : 3, // [8:6]
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first_msdu_index : 4, // [12:9]
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tqm_release_reason : 4, // [16:13]
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rbm_override_valid : 1, // [17:17]
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rbm_override : 4, // [21:18]
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reserved_2a : 7, // [28:22]
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cache_id : 1, // [29:29]
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cookie_conversion_status : 1, // [30:30]
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wbm_internal_error : 1; // [31:31]
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uint32_t tqm_status_number : 24, // [23:0]
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transmit_count : 7, // [30:24]
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sw_release_details_valid : 1; // [31:31]
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uint32_t ack_frame_rssi : 8, // [7:0]
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first_msdu : 1, // [8:8]
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last_msdu : 1, // [9:9]
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fw_tx_notify_frame : 3, // [12:10]
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buffer_timestamp : 19; // [31:13]
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struct tx_rate_stats_info tx_rate_stats;
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uint32_t sw_peer_id : 16, // [15:0]
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tid : 4, // [19:16]
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tqm_status_number_31_24 : 8, // [27:20]
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looping_count : 4; // [31:28]
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#else
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struct buffer_addr_info released_buff_or_desc_addr_info;
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uint32_t wbm_internal_error : 1, // [31:31]
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cookie_conversion_status : 1, // [30:30]
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cache_id : 1, // [29:29]
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reserved_2a : 7, // [28:22]
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rbm_override : 4, // [21:18]
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rbm_override_valid : 1, // [17:17]
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tqm_release_reason : 4, // [16:13]
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first_msdu_index : 4, // [12:9]
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buffer_or_desc_type : 3, // [8:6]
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bm_action : 3, // [5:3]
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release_source_module : 3; // [2:0]
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uint32_t sw_release_details_valid : 1, // [31:31]
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transmit_count : 7, // [30:24]
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tqm_status_number : 24; // [23:0]
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uint32_t buffer_timestamp : 19, // [31:13]
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fw_tx_notify_frame : 3, // [12:10]
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last_msdu : 1, // [9:9]
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first_msdu : 1, // [8:8]
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ack_frame_rssi : 8; // [7:0]
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struct tx_rate_stats_info tx_rate_stats;
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uint32_t looping_count : 4, // [31:28]
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tqm_status_number_31_24 : 8, // [27:20]
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tid : 4, // [19:16]
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sw_peer_id : 16; // [15:0]
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#endif
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};
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/* Description RELEASED_BUFF_OR_DESC_ADDR_INFO
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Consumer: WBM/SW/FW
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Producer: SW/TQM/RXDMA/REO/SWITCH
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Details of the physical address of the buffer or link descriptor
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that is being released. Note that within this descriptor,
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WBM will look at the 'owner' of the released buffer/descriptor
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and forward it to SW/FW is WBM is not the owner.
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*/
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/* Description BUFFER_ADDR_31_0
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Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION
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descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
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/* Description BUFFER_ADDR_39_32
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Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION
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descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
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/* Description RETURN_BUFFER_MANAGER
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Consumer: WBM
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Producer: SW/FW
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In case of 'NULL' pointer, this field is set to 0
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Indicates to which buffer manager the buffer OR MSDU_EXTENSION
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descriptor OR link descriptor that is being pointed to
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shall be returned after the frame has been processed. It
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is used by WBM for routing purposes.
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<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
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to the WMB buffer idle list
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<enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned
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to the WBM idle link descriptor idle list, where the chip
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0 WBM is chosen in case of a multi-chip config
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<enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned
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to the chip 1 WBM idle link descriptor idle list
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<enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned
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to the chip 2 WBM idle link descriptor idle list
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<enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be
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returned to chip 3 WBM idle link descriptor idle list
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<enum 4 FW_BM> This buffer shall be returned to the FW
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<enum 5 SW0_BM> This buffer shall be returned to the SW,
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ring 0
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<enum 6 SW1_BM> This buffer shall be returned to the SW,
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ring 1
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<enum 7 SW2_BM> This buffer shall be returned to the SW,
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ring 2
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<enum 8 SW3_BM> This buffer shall be returned to the SW,
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ring 3
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<enum 9 SW4_BM> This buffer shall be returned to the SW,
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ring 4
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<enum 10 SW5_BM> This buffer shall be returned to the SW,
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ring 5
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<enum 11 SW6_BM> This buffer shall be returned to the SW,
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ring 6
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<legal 0-12>
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*/
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
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/* Description SW_BUFFER_COOKIE
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Cookie field exclusively used by SW.
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In case of 'NULL' pointer, this field is set to 0
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HW ignores the contents, accept that it passes the programmed
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value on to other descriptors together with the physical
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address
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Field can be used by SW to for example associate the buffers
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physical address with the virtual address
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The bit definitions as used by SW are within SW HLD specification
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NOTE1:
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The three most significant bits can have a special meaning
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in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
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and field transmit_bw_restriction is set
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In case of NON punctured transmission:
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Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only
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Sw_buffer_cookie[19:18] = 2'b11: reserved
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In case of punctured transmission:
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Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only
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Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only
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Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only
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Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only
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Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only
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Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only
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Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only
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Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only
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Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only
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Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only
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Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only
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Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only
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Sw_buffer_cookie[19:18] = 2'b11: reserved
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Note: a punctured transmission is indicated by the presence
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of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV
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<legal all>
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*/
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
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#define WBM_RELEASE_RING_TX_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
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/* Description RELEASE_SOURCE_MODULE
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Indicates which module initiated the release of this buffer
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or descriptor
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<enum 1 release_source_RXDMA> DO NOT USE
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<enum 2 release_source_REO> DO NOT USE
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<enum 5 release_source_FW_RX> DO NOT USE
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<enum 4 release_source_SW_RX> DO NOT USE
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<enum 0 release_source_TQM> TQM released this buffer or
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descriptor
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<enum 3 release_source_FW_TX> FW released this buffer or
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descriptor
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<enum 6 release_source_SW_TX> SW released this buffer or
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descriptor
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<legal 0-6>
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*/
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#define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_OFFSET 0x00000008
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#define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_LSB 0
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#define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_MSB 2
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#define WBM_RELEASE_RING_TX_RELEASE_SOURCE_MODULE_MASK 0x00000007
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/* Description BM_ACTION
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Consumer: WBM/SW/FW
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Producer: SW/TQM/RXDMA/REO/SWITCH
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Field only valid when the field return_buffer_manager in
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the Released_buff_or_desc_addr_info indicates:
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WBM_IDLE_BUF_LIST or
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WBM_IDLE_DESC_LIST
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An MSDU extension descriptor shall never be marked as WBM
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being the 'owner', and thus WBM will forward it to FW/SW
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<enum 0 Put_in_idle_list> Put the buffer or descriptor back
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in the idle list. In case of MSDU or MDPU link descriptor,
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BM does not need to check to release any individual MSDU
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buffers
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<enum 1 release_msdu_list > This BM action can only be used
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in combination with buffer_or_desc_type being msdu_link_descriptor.
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Field first_msdu_index points out which MSDU pointer in
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the MSDU link descriptor is the first of an MPDU that is
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released.
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BM shall release all the MSDU buffers linked to this first
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MSDU buffer pointer. All related MSDU buffer pointer entries
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shall be set to value 0, which represents the 'NULL" pointer.
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When all MSDU buffer pointers in the MSDU link descriptor
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are 'NULL', the MSDU link descriptor itself shall also
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be released.
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<enum 2 Put_in_idle_list_expanded> CURRENTLY NOT IMPLEMENTED....
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Put the buffer or descriptor back in the idle list. Only
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valid in combination with buffer_or_desc_type indicating
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MDPU_link_descriptor.
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BM shall release the MPDU link descriptor as well as all
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MSDUs that are linked to the MPDUs in this descriptor.
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<legal 0-2>
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*/
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#define WBM_RELEASE_RING_TX_BM_ACTION_OFFSET 0x00000008
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#define WBM_RELEASE_RING_TX_BM_ACTION_LSB 3
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#define WBM_RELEASE_RING_TX_BM_ACTION_MSB 5
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#define WBM_RELEASE_RING_TX_BM_ACTION_MASK 0x00000038
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/* Description BUFFER_OR_DESC_TYPE
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Consumer: WBM/SW/FW
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Producer: SW/TQM/RXDMA/REO/SWITCH
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Field only valid when WBM is marked as the return_buffer_manager
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in the Released_Buffer_address_info
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Indicates that type of buffer or descriptor is being released
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<enum 0 MSDU_rel_buffer> The address points to an MSDU buffer
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<enum 1 msdu_link_descriptor> The address points to an TX
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MSDU link descriptor
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<enum 2 mpdu_link_descriptor> The address points to an MPDU
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link descriptor
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<enum 3 msdu_ext_descriptor > The address points to an MSDU
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extension descriptor.
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In case BM finds this one in a release ring, it passes it
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on to FW...
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<enum 4 queue_ext_descriptor> The address points to an TQM
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queue extension descriptor. WBM should treat this is the
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same way as a link descriptor. That is, put the 128 byte
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buffer back in the link buffer idle list.
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<legal 0-4>
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*/
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#define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_OFFSET 0x00000008
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#define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_LSB 6
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#define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_MSB 8
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#define WBM_RELEASE_RING_TX_BUFFER_OR_DESC_TYPE_MASK 0x000001c0
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/* Description FIRST_MSDU_INDEX
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Consumer: WBM/SW/FW
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Producer: SW/TQM/RXDMA/REO/SWITCH
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Field only valid for the bm_action release_msdu_list.
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The index of the first MSDU in an MSDU link descriptor all
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belonging to the same MPDU.
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<legal 0-6>
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*/
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#define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_OFFSET 0x00000008
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#define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_LSB 9
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#define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_MSB 12
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#define WBM_RELEASE_RING_TX_FIRST_MSDU_INDEX_MASK 0x00001e00
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/* Description TQM_RELEASE_REASON
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Consumer: WBM/SW/FW
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Producer: TQM
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Field only valid when Release_source_module is set to release_source_TQM
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(rr = Release Reason)
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<enum 0 tqm_rr_frame_acked> frame is removed because an
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ACK of BA for it was received
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<enum 1 tqm_rr_rem_cmd_rem> frame is removed because a remove
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command of type "Remove_mpdus" initiated by SW
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<enum 2 tqm_rr_rem_cmd_tx> frame is removed because a remove
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command of type "Remove_transmitted_mpdus" initiated by
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SW
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<enum 3 tqm_rr_rem_cmd_notx> frame is removed because a
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remove command of type "Remove_untransmitted_mpdus" initiated
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by SW
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<enum 4 tqm_rr_rem_cmd_aged> frame is removed because a
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remove command of type "Remove_aged_mpdus" or "Remove_aged_msdus"
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initiated by SW
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<enum 5 tqm_fw_reason1> frame is removed because a remove
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command where fw indicated that remove reason is fw_reason1
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<enum 6 tqm_fw_reason2> frame is removed because a remove
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command where fw indicated that remove reason is fw_reason1
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<enum 7 tqm_fw_reason3> frame is removed because a remove
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command where fw indicated that remove reason is fw_reason1
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<enum 8 tqm_rr_rem_cmd_disable_queue> frame is removed because
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a remove command of type "remove_mpdus_and_disable_queue"
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or "remove_msdus_and_disable_flow" initiated by SW
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<enum 9 tqm_rr_rem_cmd_till_nonmatching> frame is removed
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because remove command of type "remove_till_nonmatching_mpdu"
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initiated by SW
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<enum 10 tqm_rr_drop_threshold> frame is dropped at TQM
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entrance due to one of slow/medium/hard drop threshold criteria
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<enum 11 tqm_rr_link_desc_unavailable> frame is dropped
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at TQM entrance due to the WBM2TQM_LINK_RING having fewer
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descriptors than a threshold programmed in TQM
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<enum 12 tqm_rr_drop_or_invalid_msdu> frame is dropped at
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TQM entrance due to 'TQM_Drop_frame' being set or "null"
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MSDU flow pointer or MSDU flow pointer 'Flow_valid' being
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zero or MSDU length being zero
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<enum 13 tqm_rr_multicast_drop> frame is dropped at TQM
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entrance due to 'TQM_Drop_frame' being set with 'TCL_drop_reason'
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set to TCL_multicast_drop_for_vdev.
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<enum 14 tqm_rr_vdev_mismatch_drop> frame is dropped at
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TQM entrance due to 'TQM_Drop_frame' being set with 'TCL_drop_reason'
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set to TCL_vdev_id_mismatch_drop.
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Waikiki v1 and Hamilton v2 used value 12 for this.
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<legal 0-14>
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*/
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#define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_OFFSET 0x00000008
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#define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_LSB 13
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#define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_MSB 16
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#define WBM_RELEASE_RING_TX_TQM_RELEASE_REASON_MASK 0x0001e000
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/* Description RBM_OVERRIDE_VALID
|
|
|
|
This is set to 0 for Tx cases not involving reinjection,
|
|
and set to 1 for TQM release cases requiring FW reinjection
|
|
(HastingsPrime FR54309).
|
|
|
|
When set to 1, WBM releases the MSDU buffers to FW and overrides
|
|
the tx_rate_stats field with words 2 and 3 of the 'TX_MSDU_DETAILS'
|
|
structure, for FW reinjection of these MSDUs (HastingsPrime
|
|
FR54309).
|
|
|
|
<legal 0-1>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_OFFSET 0x00000008
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_LSB 17
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_MSB 17
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_VALID_MASK 0x00020000
|
|
|
|
|
|
/* Description RBM_OVERRIDE
|
|
|
|
Field only valid when rbm_override_valid = 1
|
|
|
|
WBM releases the MSDU buffers to FW and overrides the tx_rate_stats
|
|
field with words 2 and 3 of the 'TX_MSDU_DETAILS' structure,
|
|
for FW reinjection of these MSDUs (HastingsPrime FR54309).
|
|
|
|
|
|
In Beryllium, rbm_override gives the 'return_buffer_manager'
|
|
and whence the WBM output ring corresponding to the FW reinjection
|
|
path.
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_OFFSET 0x00000008
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_LSB 18
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_MSB 21
|
|
#define WBM_RELEASE_RING_TX_RBM_OVERRIDE_MASK 0x003c0000
|
|
|
|
|
|
/* Description RESERVED_2A
|
|
|
|
<legal 0>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_RESERVED_2A_OFFSET 0x00000008
|
|
#define WBM_RELEASE_RING_TX_RESERVED_2A_LSB 22
|
|
#define WBM_RELEASE_RING_TX_RESERVED_2A_MSB 28
|
|
#define WBM_RELEASE_RING_TX_RESERVED_2A_MASK 0x1fc00000
|
|
|
|
|
|
/* Description CACHE_ID
|
|
|
|
To improve WBM performance, out-of-order completions may
|
|
be allowed to process multiple MPDUs in parallel.
|
|
|
|
The MSDUs released from each cache would be in order so 'First_msdu'
|
|
and this field together can be used by SW to reorder the
|
|
completions back to the original order by keeping all MSDUs
|
|
of an MPDU from one cache together before switching to
|
|
the next MPDU (from either cache).
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_CACHE_ID_OFFSET 0x00000008
|
|
#define WBM_RELEASE_RING_TX_CACHE_ID_LSB 29
|
|
#define WBM_RELEASE_RING_TX_CACHE_ID_MSB 29
|
|
#define WBM_RELEASE_RING_TX_CACHE_ID_MASK 0x20000000
|
|
|
|
|
|
/* Description COOKIE_CONVERSION_STATUS
|
|
|
|
0: 'Sw_buffer_cookie' not converted to 'Buffer_virt_addr'
|
|
|
|
1: 'Sw_buffer_cookie' coverted to 'Buffer_virt_addr'
|
|
<legal 0>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_OFFSET 0x00000008
|
|
#define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_LSB 30
|
|
#define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_MSB 30
|
|
#define WBM_RELEASE_RING_TX_COOKIE_CONVERSION_STATUS_MASK 0x40000000
|
|
|
|
|
|
/* Description WBM_INTERNAL_ERROR
|
|
|
|
Can only be set by WBM.
|
|
|
|
Is set when WBM got a buffer pointer but the action was
|
|
to push it to the idle link descriptor ring or do link related
|
|
activity
|
|
OR
|
|
Is set when WBM got a link buffer pointer but the action
|
|
was to push it to the buffer descriptor ring
|
|
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_OFFSET 0x00000008
|
|
#define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_LSB 31
|
|
#define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_MSB 31
|
|
#define WBM_RELEASE_RING_TX_WBM_INTERNAL_ERROR_MASK 0x80000000
|
|
|
|
|
|
/* Description TQM_STATUS_NUMBER
|
|
|
|
Field only valid when Release_source_module is set to release_source_TQM
|
|
|
|
|
|
The value in this field is equal to value of the 'TQM_CMD_Number'
|
|
field from the TQM command or the 'TQM_add_cmd_Number' field
|
|
from the TQM entrance ring descriptor LSB 24-bits.
|
|
|
|
This field helps to correlate the statuses with the TQM
|
|
commands.
|
|
|
|
NOTE that SW could program this number to be equal to the
|
|
PPDU_ID number in case direct correlation with the PPDU
|
|
ID is desired
|
|
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_OFFSET 0x0000000c
|
|
#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_LSB 0
|
|
#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_MSB 23
|
|
#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_MASK 0x00ffffff
|
|
|
|
|
|
/* Description TRANSMIT_COUNT
|
|
|
|
Field only valid when Release_source_module is set to release_source_TQM
|
|
|
|
|
|
The number of times this frame has been transmitted
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_OFFSET 0x0000000c
|
|
#define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_LSB 24
|
|
#define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_MSB 30
|
|
#define WBM_RELEASE_RING_TX_TRANSMIT_COUNT_MASK 0x7f000000
|
|
|
|
|
|
/* Description SW_RELEASE_DETAILS_VALID
|
|
|
|
Consumer: SW
|
|
Producer: WBM
|
|
|
|
When set, some WBM specific release info for SW is valid.
|
|
|
|
This is set when WMB got a 'release_msdu_list' command from
|
|
TQM and the return buffer manager is not WMB. WBM will
|
|
then de-aggregate all the MSDUs and pass them one at a time
|
|
on to the 'buffer owner'
|
|
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_OFFSET 0x0000000c
|
|
#define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_LSB 31
|
|
#define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_MSB 31
|
|
#define WBM_RELEASE_RING_TX_SW_RELEASE_DETAILS_VALID_MASK 0x80000000
|
|
|
|
|
|
/* Description ACK_FRAME_RSSI
|
|
|
|
This field is only valid when the source is TQM.
|
|
|
|
If this frame is removed as the result of the reception
|
|
of an ACK or BA, this field indicates the RSSI of the received
|
|
ACK or BA frame.
|
|
|
|
When the frame is removed as result of a direct remove command
|
|
from the SW, this field is set to 0x0 (which is never
|
|
a valid value when real RSSI is available)
|
|
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_OFFSET 0x00000010
|
|
#define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_LSB 0
|
|
#define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_MSB 7
|
|
#define WBM_RELEASE_RING_TX_ACK_FRAME_RSSI_MASK 0x000000ff
|
|
|
|
|
|
/* Description FIRST_MSDU
|
|
|
|
Field only valid when SW_release_details_valid is set.
|
|
|
|
Consumer: SW
|
|
Producer: WBM
|
|
|
|
When set, this MSDU is the first MSDU pointed to in the 'release_msdu_list'
|
|
command.
|
|
|
|
First_msdu ≠ last_msdu indicates the MSDU was part of
|
|
an A-MSDU.
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_FIRST_MSDU_OFFSET 0x00000010
|
|
#define WBM_RELEASE_RING_TX_FIRST_MSDU_LSB 8
|
|
#define WBM_RELEASE_RING_TX_FIRST_MSDU_MSB 8
|
|
#define WBM_RELEASE_RING_TX_FIRST_MSDU_MASK 0x00000100
|
|
|
|
|
|
/* Description LAST_MSDU
|
|
|
|
Field only valid when SW_release_details_valid is set.
|
|
|
|
Consumer: SW
|
|
Producer: WBM
|
|
|
|
When set, this MSDU is the last MSDU pointed to in the 'release_msdu_list'
|
|
command.
|
|
|
|
First_msdu ≠ last_msdu indicates the MSDU was part of
|
|
an A-MSDU.
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_LAST_MSDU_OFFSET 0x00000010
|
|
#define WBM_RELEASE_RING_TX_LAST_MSDU_LSB 9
|
|
#define WBM_RELEASE_RING_TX_LAST_MSDU_MSB 9
|
|
#define WBM_RELEASE_RING_TX_LAST_MSDU_MASK 0x00000200
|
|
|
|
|
|
/* Description FW_TX_NOTIFY_FRAME
|
|
|
|
Field only valid when SW_release_details_valid is set.
|
|
|
|
Consumer: SW
|
|
Producer: WBM
|
|
|
|
This is the FW_tx_notify_frame field from the TX_MSDU_DETAILS
|
|
for this frame from the MSDU link descriptor
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_OFFSET 0x00000010
|
|
#define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_LSB 10
|
|
#define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_MSB 12
|
|
#define WBM_RELEASE_RING_TX_FW_TX_NOTIFY_FRAME_MASK 0x00001c00
|
|
|
|
|
|
/* Description BUFFER_TIMESTAMP
|
|
|
|
Field only valid when SW_release_details_valid is set.
|
|
|
|
Consumer: SW
|
|
Producer: WBM
|
|
|
|
This is the Buffer_timestamp field from the TX_MSDU_DETAILS
|
|
for this frame from the MSDU link descriptor.
|
|
|
|
Timestamp in units determined by the UMCMN 'TX_TIMESTAMP_RESOLUTION_SELECT'
|
|
register
|
|
|
|
Waikiki v1 and Hamilton used units of 1024 µs.
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_OFFSET 0x00000010
|
|
#define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_LSB 13
|
|
#define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_MSB 31
|
|
#define WBM_RELEASE_RING_TX_BUFFER_TIMESTAMP_MASK 0xffffe000
|
|
|
|
|
|
/* Description TX_RATE_STATS
|
|
|
|
Consumer: TQM/SW
|
|
Producer: SW/SCH(from TXPCU, PDG) /WBM (from RXDMA)
|
|
|
|
Details for command execution tracking purposes.
|
|
*/
|
|
|
|
|
|
/* Description TX_RATE_STATS_INFO_VALID
|
|
|
|
When set all other fields in this STRUCT contain valid info.
|
|
|
|
|
|
When clear, none of the other fields contain valid info.
|
|
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_LSB 0
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MSB 0
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MASK 0x00000001
|
|
|
|
|
|
/* Description TRANSMIT_BW
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Indicates the BW of the upcoming transmission that shall
|
|
likely start in about 3 -4 us on the medium
|
|
|
|
<enum 0 20_mhz>20 Mhz BW
|
|
<enum 1 40_mhz>40 Mhz BW
|
|
<enum 2 80_mhz>80 Mhz BW
|
|
<enum 3 160_mhz>160 Mhz BW
|
|
<enum 4 320_mhz>320 Mhz BW
|
|
<enum 5 240_mhz>240 Mhz BW
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_LSB 1
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_MSB 3
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_BW_MASK 0x0000000e
|
|
|
|
|
|
/* Description TRANSMIT_PKT_TYPE
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Field filled in by PDG.
|
|
Not valid when in SW transmit mode
|
|
|
|
The packet type
|
|
<enum 0 dot11a>802.11a PPDU type
|
|
<enum 1 dot11b>802.11b PPDU type
|
|
<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
|
|
<enum 3 dot11ac>802.11ac PPDU type
|
|
<enum 4 dot11ax>802.11ax PPDU type
|
|
<enum 5 dot11ba>802.11ba (WUR) PPDU type
|
|
<enum 6 dot11be>802.11be PPDU type
|
|
<enum 7 dot11az>802.11az (ranging) PPDU type
|
|
<enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
|
|
& aborted)
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_LSB 4
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MSB 7
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MASK 0x000000f0
|
|
|
|
|
|
/* Description TRANSMIT_STBC
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Field filled in by PDG.
|
|
Not valid when in SW transmit mode
|
|
|
|
When set, STBC transmission rate was used.
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_LSB 8
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_MSB 8
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_STBC_MASK 0x00000100
|
|
|
|
|
|
/* Description TRANSMIT_LDPC
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Field filled in by PDG.
|
|
Not valid when in SW transmit mode
|
|
|
|
When set, use LDPC transmission rates
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_LSB 9
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_MSB 9
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_LDPC_MASK 0x00000200
|
|
|
|
|
|
/* Description TRANSMIT_SGI
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Field filled in by PDG.
|
|
Not valid when in SW transmit mode
|
|
|
|
Specify the right GI for HE-Ranging NDPs (11az)/Short NDP.
|
|
|
|
|
|
<enum 0 0_8_us_sgi > Legacy normal GI. Can also be used
|
|
for HE
|
|
<enum 1 0_4_us_sgi > Legacy short GI. Can also be used
|
|
for HE
|
|
<enum 2 1_6_us_sgi > HE related GI
|
|
<enum 3 3_2_us_sgi > HE related GI
|
|
<legal 0 - 3>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_LSB 10
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_MSB 11
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_SGI_MASK 0x00000c00
|
|
|
|
|
|
/* Description TRANSMIT_MCS
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Field filled in by PDG.
|
|
Not valid when in SW transmit mode
|
|
|
|
For details, refer to MCS_TYPE description
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_LSB 12
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_MSB 15
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TRANSMIT_MCS_MASK 0x0000f000
|
|
|
|
|
|
/* Description OFDMA_TRANSMISSION
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Field filled in by PDG.
|
|
|
|
Set when the transmission was an OFDMA transmission (DL
|
|
or UL).
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_LSB 16
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_MSB 16
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_OFDMA_TRANSMISSION_MASK 0x00010000
|
|
|
|
|
|
/* Description TONES_IN_RU
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Field filled in by PDG.
|
|
Not valid when in SW transmit mode
|
|
|
|
The number of tones in the RU used.
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_LSB 17
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_MSB 28
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_TONES_IN_RU_MASK 0x1ffe0000
|
|
|
|
|
|
/* Description RESERVED_0A
|
|
|
|
<legal 0>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_RESERVED_0A_OFFSET 0x00000014
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_RESERVED_0A_LSB 29
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_RESERVED_0A_MSB 31
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_RESERVED_0A_MASK 0xe0000000
|
|
|
|
|
|
/* Description PPDU_TRANSMISSION_TSF
|
|
|
|
Field only valid when Tx_rate_stats_info_valid is set
|
|
|
|
Based on a HWSCH configuration register setting, this field
|
|
either contains:
|
|
|
|
Lower 32 bits of the TSF, snapshot of this value when transmission
|
|
of the PPDU containing the frame finished.
|
|
OR
|
|
Lower 32 bits of the TSF, snapshot of this value when transmission
|
|
of the PPDU containing the frame started
|
|
|
|
<legal all>
|
|
*/
|
|
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_OFFSET 0x00000018
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_LSB 0
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MSB 31
|
|
#define WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MASK 0xffffffff
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/* Description SW_PEER_ID
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Field only valid when Release_source_module is set to release_source_TQM
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1) Release of msdu buffer due to drop_frame = 1. Flow is
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not fetched and hence sw_peer_id and tid = 0
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buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason
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= e_num 1 tqm_rr_rem_cmd_rem
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2) Release of msdu buffer due to Flow is not fetched and
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hence sw_peer_id and tid = 0
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buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason
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= e_num 1 tqm_rr_rem_cmd_rem
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3) Release of msdu link due to remove_mpdu or acked_mpdu
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command.
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buffer_or_desc_type = e_num1 msdu_link_descriptortqm_release_reason
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can be:e_num 1 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx
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e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged (this
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e_num is used for REMOVE_MPDU as well as REMOVE_MSDU).
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Sw_peer_id from the TX_MSDU_FLOW descriptor or TX_MPDU_QUEUE
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descriptor
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<legal all>
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*/
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#define WBM_RELEASE_RING_TX_SW_PEER_ID_OFFSET 0x0000001c
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#define WBM_RELEASE_RING_TX_SW_PEER_ID_LSB 0
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#define WBM_RELEASE_RING_TX_SW_PEER_ID_MSB 15
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#define WBM_RELEASE_RING_TX_SW_PEER_ID_MASK 0x0000ffff
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/* Description TID
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Field only valid when Release_source_module is set to release_source_TQM
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1) Release of msdu buffer due to drop_frame = 1. Flow is
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not fetched and hence sw_peer_id and tid = 0
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buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason
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= e_num 1 tqm_rr_rem_cmd_rem
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2) Release of msdu buffer due to Flow is not fetched and
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hence sw_peer_id and tid = 0
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buffer_or_desc_type = e_num 0 MSDU_rel_buffertqm_release_reason
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= e_num 1 tqm_rr_rem_cmd_rem
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3) Release of msdu link due to remove_mpdu or acked_mpdu
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command.
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buffer_or_desc_type = e_num1 msdu_link_descriptortqm_release_reason
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can be:e_num 1 tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx
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e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged (this
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e_num is used for REMOVE_MPDU as well as REMOVE_MSDU).
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This field represents the TID from the TX_MSDU_FLOW descriptor
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or TX_MPDU_QUEUE descriptor
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<legal all>
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*/
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#define WBM_RELEASE_RING_TX_TID_OFFSET 0x0000001c
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#define WBM_RELEASE_RING_TX_TID_LSB 16
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#define WBM_RELEASE_RING_TX_TID_MSB 19
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#define WBM_RELEASE_RING_TX_TID_MASK 0x000f0000
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/* Description TQM_STATUS_NUMBER_31_24
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Field only valid when Release_source_module is set to release_source_TQM
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The value in this field is equal to value of the 'TQM_CMD_Number'
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field from the TQM command or the 'TQM_add_cmd_Number' field
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from the TQM entrance ring descriptor MSB 8-bits.
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This field helps to correlate the statuses with the TQM
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commands.
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<legal all>
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*/
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#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_OFFSET 0x0000001c
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#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_LSB 20
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#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_MSB 27
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#define WBM_RELEASE_RING_TX_TQM_STATUS_NUMBER_31_24_MASK 0x0ff00000
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/* Description LOOPING_COUNT
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Consumer: WBM/SW/FW
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Producer: SW/TQM/RXDMA/REO/SWITCH
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If WBM_internal_error is set, this descriptor is sent to
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the dedicated 'WBM_ERROR_RELEASE' ring and Looping_count
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is used to indicate an error code.
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The values reported are documented further in the WBM MLD
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doc.
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If WBM_internal_error is not set, the following holds.
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A count value that indicates the number of times the producer
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of entries into the Buffer Manager Ring has looped around
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the ring.
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At initialization time, this value is set to 0. On the first
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loop, this value is set to 1. After the max value is reached
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allowed by the number of bits for this field, the count
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value continues with 0 again.
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In case SW is the consumer of the ring entries, it can use
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this field to figure out up to where the producer of entries
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has created new entries. This eliminates the need to check
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where the "head pointer' of the ring is located once the
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SW starts processing an interrupt indicating that new entries
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have been put into this ring...
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Also note that SW if it wants only needs to look at the
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LSB bit of this count value.
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<legal all>
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*/
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#define WBM_RELEASE_RING_TX_LOOPING_COUNT_OFFSET 0x0000001c
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#define WBM_RELEASE_RING_TX_LOOPING_COUNT_LSB 28
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#define WBM_RELEASE_RING_TX_LOOPING_COUNT_MSB 31
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#define WBM_RELEASE_RING_TX_LOOPING_COUNT_MASK 0xf0000000
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#endif // WBM_RELEASE_RING_TX
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