36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
421 rader
16 KiB
C
421 rader
16 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _WBM_RELEASE_RING_H_
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#define _WBM_RELEASE_RING_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "buffer_addr_info.h"
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#define NUM_OF_DWORDS_WBM_RELEASE_RING 8
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struct wbm_release_ring {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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struct buffer_addr_info released_buff_or_desc_addr_info;
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uint32_t release_source_module : 3, // [2:0]
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reserved_2a : 3, // [5:3]
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buffer_or_desc_type : 3, // [8:6]
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reserved_2b : 22, // [30:9]
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wbm_internal_error : 1; // [31:31]
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uint32_t reserved_3a : 32; // [31:0]
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uint32_t reserved_4a : 32; // [31:0]
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uint32_t reserved_5a : 32; // [31:0]
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uint32_t reserved_6a : 32; // [31:0]
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uint32_t reserved_7a : 28, // [27:0]
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looping_count : 4; // [31:28]
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#else
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struct buffer_addr_info released_buff_or_desc_addr_info;
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uint32_t wbm_internal_error : 1, // [31:31]
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reserved_2b : 22, // [30:9]
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buffer_or_desc_type : 3, // [8:6]
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reserved_2a : 3, // [5:3]
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release_source_module : 3; // [2:0]
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uint32_t reserved_3a : 32; // [31:0]
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uint32_t reserved_4a : 32; // [31:0]
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uint32_t reserved_5a : 32; // [31:0]
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uint32_t reserved_6a : 32; // [31:0]
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uint32_t looping_count : 4, // [31:28]
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reserved_7a : 28; // [27:0]
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#endif
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};
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/* Description RELEASED_BUFF_OR_DESC_ADDR_INFO
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DO NOT USE. This may be a 'BUFFER_ADDR_INFO' structure or
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a 64-bit virtual address.
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*/
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/* Description BUFFER_ADDR_31_0
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Address (lower 32 bits) of the MSDU buffer OR MSDU_EXTENSION
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descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
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/* Description BUFFER_ADDR_39_32
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Address (upper 8 bits) of the MSDU buffer OR MSDU_EXTENSION
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descriptor OR Link Descriptor
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In case of 'NULL' pointer, this field is set to 0
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<legal all>
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*/
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
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/* Description RETURN_BUFFER_MANAGER
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Consumer: WBM
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Producer: SW/FW
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In case of 'NULL' pointer, this field is set to 0
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Indicates to which buffer manager the buffer OR MSDU_EXTENSION
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descriptor OR link descriptor that is being pointed to
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shall be returned after the frame has been processed. It
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is used by WBM for routing purposes.
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<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
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to the WMB buffer idle list
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<enum 1 WBM_CHIP0_IDLE_DESC_LIST> This buffer shall be returned
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to the WBM idle link descriptor idle list, where the chip
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0 WBM is chosen in case of a multi-chip config
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<enum 2 WBM_CHIP1_IDLE_DESC_LIST> This buffer shall be returned
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to the chip 1 WBM idle link descriptor idle list
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<enum 3 WBM_CHIP2_IDLE_DESC_LIST> This buffer shall be returned
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to the chip 2 WBM idle link descriptor idle list
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<enum 12 WBM_CHIP3_IDLE_DESC_LIST> This buffer shall be
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returned to chip 3 WBM idle link descriptor idle list
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<enum 4 FW_BM> This buffer shall be returned to the FW
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<enum 5 SW0_BM> This buffer shall be returned to the SW,
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ring 0
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<enum 6 SW1_BM> This buffer shall be returned to the SW,
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ring 1
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<enum 7 SW2_BM> This buffer shall be returned to the SW,
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ring 2
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<enum 8 SW3_BM> This buffer shall be returned to the SW,
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ring 3
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<enum 9 SW4_BM> This buffer shall be returned to the SW,
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ring 4
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<enum 10 SW5_BM> This buffer shall be returned to the SW,
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ring 5
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<enum 11 SW6_BM> This buffer shall be returned to the SW,
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ring 6
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<legal 0-12>
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*/
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
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/* Description SW_BUFFER_COOKIE
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Cookie field exclusively used by SW.
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In case of 'NULL' pointer, this field is set to 0
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HW ignores the contents, accept that it passes the programmed
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value on to other descriptors together with the physical
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address
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Field can be used by SW to for example associate the buffers
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physical address with the virtual address
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The bit definitions as used by SW are within SW HLD specification
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NOTE1:
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The three most significant bits can have a special meaning
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in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
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and field transmit_bw_restriction is set
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In case of NON punctured transmission:
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Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only
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Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only
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Sw_buffer_cookie[19:18] = 2'b11: reserved
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In case of punctured transmission:
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Sw_buffer_cookie[19:16] = 4'b0000: pattern 0 only
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Sw_buffer_cookie[19:16] = 4'b0001: pattern 1 only
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Sw_buffer_cookie[19:16] = 4'b0010: pattern 2 only
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Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only
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Sw_buffer_cookie[19:16] = 4'b0100: pattern 4 only
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Sw_buffer_cookie[19:16] = 4'b0101: pattern 5 only
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Sw_buffer_cookie[19:16] = 4'b0110: pattern 6 only
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Sw_buffer_cookie[19:16] = 4'b0111: pattern 7 only
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Sw_buffer_cookie[19:16] = 4'b1000: pattern 8 only
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Sw_buffer_cookie[19:16] = 4'b1001: pattern 9 only
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Sw_buffer_cookie[19:16] = 4'b1010: pattern 10 only
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Sw_buffer_cookie[19:16] = 4'b1011: pattern 11 only
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Sw_buffer_cookie[19:18] = 2'b11: reserved
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Note: a punctured transmission is indicated by the presence
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of TLV TX_PUNCTURE_SETUP embedded in the scheduler TLV
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<legal all>
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*/
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
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#define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
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/* Description RELEASE_SOURCE_MODULE
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Indicates which module initiated the release of this buffer
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or descriptor
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<enum 1 release_source_RXDMA> RXDMA released this buffer
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or descriptor
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<enum 2 release_source_REO> REO released this buffer or
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descriptor
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<enum 5 release_source_FW_RX> FW released this buffer or
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descriptor
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<enum 4 release_source_SW_RX> SW released this buffer or
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descriptor
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<enum 0 release_source_TQM> DO NOT USE
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<enum 3 release_source_FW_TX> DO NOT USE
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<enum 6 release_source_SW_TX> DO NOT USE
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<legal 0-6>
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*/
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#define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_OFFSET 0x00000008
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#define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_LSB 0
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#define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MSB 2
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#define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MASK 0x00000007
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/* Description RESERVED_2A
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This could be different fields depending on the structure.
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<legal all>
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*/
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#define WBM_RELEASE_RING_RESERVED_2A_OFFSET 0x00000008
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#define WBM_RELEASE_RING_RESERVED_2A_LSB 3
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#define WBM_RELEASE_RING_RESERVED_2A_MSB 5
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#define WBM_RELEASE_RING_RESERVED_2A_MASK 0x00000038
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/* Description BUFFER_OR_DESC_TYPE
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Consumer: WBM/SW/FW
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Producer: SW/TQM/RXDMA/REO/SWITCH
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Field only valid when WBM is marked as the return_buffer_manager
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in the Released_Buffer_address_info
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Indicates that type of buffer or descriptor is being released
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<enum 0 MSDU_rel_buffer> The address points to an MSDU buffer
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<enum 1 msdu_link_descriptor> The address points to an TX
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MSDU link descriptor
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<enum 2 mpdu_link_descriptor> The address points to an MPDU
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link descriptor
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<enum 3 msdu_ext_descriptor > The address points to an MSDU
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extension descriptor.
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In case BM finds this one in a release ring, it passes it
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on to FW...
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<enum 4 queue_ext_descriptor> The address points to an TQM
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queue extension descriptor. WBM should treat this is the
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same way as a link descriptor. That is, put the 128 byte
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buffer back in the link buffer idle list.
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TODO: Any restrictions?
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<legal 0-4>
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*/
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#define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_OFFSET 0x00000008
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#define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_LSB 6
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#define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MSB 8
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#define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MASK 0x000001c0
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/* Description RESERVED_2B
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This could be different fields depending on the structure.
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<legal all>
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*/
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#define WBM_RELEASE_RING_RESERVED_2B_OFFSET 0x00000008
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#define WBM_RELEASE_RING_RESERVED_2B_LSB 9
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#define WBM_RELEASE_RING_RESERVED_2B_MSB 30
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#define WBM_RELEASE_RING_RESERVED_2B_MASK 0x7ffffe00
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/* Description WBM_INTERNAL_ERROR
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Can only be set by WBM.
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Is set when WBM got a buffer pointer but the action was
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to push it to the idle link descriptor ring or do link related
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activity
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OR
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Is set when WBM got a link buffer pointer but the action
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was to push it to the buffer descriptor ring
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<legal all>
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*/
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#define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_OFFSET 0x00000008
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#define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_LSB 31
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#define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_MSB 31
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#define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_MASK 0x80000000
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/* Description RESERVED_3A
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This could be different fields depending on the structure.
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<legal all>
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*/
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#define WBM_RELEASE_RING_RESERVED_3A_OFFSET 0x0000000c
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#define WBM_RELEASE_RING_RESERVED_3A_LSB 0
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#define WBM_RELEASE_RING_RESERVED_3A_MSB 31
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#define WBM_RELEASE_RING_RESERVED_3A_MASK 0xffffffff
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/* Description RESERVED_4A
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This could be different fields depending on the structure.
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<legal all>
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*/
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#define WBM_RELEASE_RING_RESERVED_4A_OFFSET 0x00000010
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#define WBM_RELEASE_RING_RESERVED_4A_LSB 0
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#define WBM_RELEASE_RING_RESERVED_4A_MSB 31
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#define WBM_RELEASE_RING_RESERVED_4A_MASK 0xffffffff
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/* Description RESERVED_5A
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This could be different fields depending on the structure.
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<legal all>
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*/
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#define WBM_RELEASE_RING_RESERVED_5A_OFFSET 0x00000014
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#define WBM_RELEASE_RING_RESERVED_5A_LSB 0
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#define WBM_RELEASE_RING_RESERVED_5A_MSB 31
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#define WBM_RELEASE_RING_RESERVED_5A_MASK 0xffffffff
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/* Description RESERVED_6A
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This could be different fields depending on the structure.
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<legal all>
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*/
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#define WBM_RELEASE_RING_RESERVED_6A_OFFSET 0x00000018
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#define WBM_RELEASE_RING_RESERVED_6A_LSB 0
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#define WBM_RELEASE_RING_RESERVED_6A_MSB 31
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#define WBM_RELEASE_RING_RESERVED_6A_MASK 0xffffffff
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/* Description RESERVED_7A
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This could be different fields depending on the structure.
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<legal all>
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*/
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#define WBM_RELEASE_RING_RESERVED_7A_OFFSET 0x0000001c
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#define WBM_RELEASE_RING_RESERVED_7A_LSB 0
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#define WBM_RELEASE_RING_RESERVED_7A_MSB 27
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#define WBM_RELEASE_RING_RESERVED_7A_MASK 0x0fffffff
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/* Description LOOPING_COUNT
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Consumer: WBM/SW/FW
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Producer: SW/TQM/RXDMA/REO/SWITCH
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If WBM_internal_error is set, this descriptor is sent to
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the dedicated 'WBM_ERROR_RELEASE' ring and Looping_count
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is used to indicate an error code.
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The values reported are documented further in the WBM MLD
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doc.
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If WBM_internal_error is not set, the following holds.
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A count value that indicates the number of times the producer
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of entries into the Buffer Manager Ring has looped around
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the ring.
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At initialization time, this value is set to 0. On the first
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loop, this value is set to 1. After the max value is reached
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allowed by the number of bits for this field, the count
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value continues with 0 again.
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In case SW is the consumer of the ring entries, it can use
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this field to figure out up to where the producer of entries
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has created new entries. This eliminates the need to check
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where the "head pointer' of the ring is located once the
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SW starts processing an interrupt indicating that new entries
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have been put into this ring...
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Also note that SW if it wants only needs to look at the
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LSB bit of this count value.
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<legal all>
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*/
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#define WBM_RELEASE_RING_LOOPING_COUNT_OFFSET 0x0000001c
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#define WBM_RELEASE_RING_LOOPING_COUNT_LSB 28
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#define WBM_RELEASE_RING_LOOPING_COUNT_MSB 31
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#define WBM_RELEASE_RING_LOOPING_COUNT_MASK 0xf0000000
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#endif // WBM_RELEASE_RING
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