36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
233 linhas
9.5 KiB
C
233 linhas
9.5 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
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#define _RX_RXPCU_CLASSIFICATION_OVERVIEW_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_DWORDS_RX_RXPCU_CLASSIFICATION_OVERVIEW 1
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struct rx_rxpcu_classification_overview {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t filter_pass_mpdus : 1, // [0:0]
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filter_pass_mpdus_fcs_ok : 1, // [1:1]
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monitor_direct_mpdus : 1, // [2:2]
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monitor_direct_mpdus_fcs_ok : 1, // [3:3]
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monitor_other_mpdus : 1, // [4:4]
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monitor_other_mpdus_fcs_ok : 1, // [5:5]
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phyrx_abort_received : 1, // [6:6]
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filter_pass_monitor_ovrd_mpdus : 1, // [7:7]
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filter_pass_monitor_ovrd_mpdus_fcs_ok : 1, // [8:8]
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reserved_0 : 7, // [15:9]
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phy_ppdu_id : 16; // [31:16]
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#else
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uint32_t phy_ppdu_id : 16, // [31:16]
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reserved_0 : 7, // [15:9]
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filter_pass_monitor_ovrd_mpdus_fcs_ok : 1, // [8:8]
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filter_pass_monitor_ovrd_mpdus : 1, // [7:7]
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phyrx_abort_received : 1, // [6:6]
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monitor_other_mpdus_fcs_ok : 1, // [5:5]
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monitor_other_mpdus : 1, // [4:4]
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monitor_direct_mpdus_fcs_ok : 1, // [3:3]
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monitor_direct_mpdus : 1, // [2:2]
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filter_pass_mpdus_fcs_ok : 1, // [1:1]
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filter_pass_mpdus : 1; // [0:0]
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#endif
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};
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/* Description FILTER_PASS_MPDUS
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When set, at least one Filter Pass MPDU has been received.
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FCS might or might not have been passing.
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_LSB 0
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_MSB 0
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_MASK 0x00000001
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/* Description FILTER_PASS_MPDUS_FCS_OK
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When set, at least one Filter Pass MPDU has been received
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that has a correct FCS.
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_FCS_OK_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_FCS_OK_LSB 1
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_FCS_OK_MSB 1
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MPDUS_FCS_OK_MASK 0x00000002
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/* Description MONITOR_DIRECT_MPDUS
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When set, at least one Monitor Direct MPDU has been received.
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FCS might or might not have been passing
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_LSB 2
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_MSB 2
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_MASK 0x00000004
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/* Description MONITOR_DIRECT_MPDUS_FCS_OK
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When set, at least one Monitor Direct MPDU has been received
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that has a correct FCS.
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_FCS_OK_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_FCS_OK_LSB 3
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_FCS_OK_MSB 3
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_DIRECT_MPDUS_FCS_OK_MASK 0x00000008
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/* Description MONITOR_OTHER_MPDUS
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When set, at least one Monitor Direct MPDU has been received.
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FCS might or might not have been passing.
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_LSB 4
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_MSB 4
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_MASK 0x00000010
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/* Description MONITOR_OTHER_MPDUS_FCS_OK
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When set, at least one Monitor Direct MPDU has been received
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that has a correct FCS.
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_FCS_OK_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_FCS_OK_LSB 5
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_FCS_OK_MSB 5
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_MONITOR_OTHER_MPDUS_FCS_OK_MASK 0x00000020
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/* Description PHYRX_ABORT_RECEIVED
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When set, PPDU reception was aborted by the PHY
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHYRX_ABORT_RECEIVED_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHYRX_ABORT_RECEIVED_LSB 6
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHYRX_ABORT_RECEIVED_MSB 6
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHYRX_ABORT_RECEIVED_MASK 0x00000040
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/* Description FILTER_PASS_MONITOR_OVRD_MPDUS
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When set, at least one 'Filter Pass Monitor Override' MPDU
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has been received. FCS might or might not have been passing.
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_LSB 7
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_MSB 7
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_MASK 0x00000080
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/* Description FILTER_PASS_MONITOR_OVRD_MPDUS_FCS_OK
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When set, at least one 'Filter Pass Monitor Override' MPDU
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has been received that has a correct FCS.
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For MU UL, in TLVs RX_PPDU_END and RX_PPDU_END_STATUS_DONE,
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this field is the "OR of all the users.
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_FCS_OK_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_FCS_OK_LSB 8
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_FCS_OK_MSB 8
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_FILTER_PASS_MONITOR_OVRD_MPDUS_FCS_OK_MASK 0x00000100
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/* Description RESERVED_0
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<legal 0>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_RESERVED_0_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_RESERVED_0_LSB 9
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_RESERVED_0_MSB 15
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_RESERVED_0_MASK 0x0000fe00
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/* Description PHY_PPDU_ID
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A ppdu counter value that PHY increments for every PPDU
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received. The counter value wraps around
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<legal all>
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*/
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHY_PPDU_ID_OFFSET 0x00000000
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHY_PPDU_ID_LSB 16
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHY_PPDU_ID_MSB 31
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#define RX_RXPCU_CLASSIFICATION_OVERVIEW_PHY_PPDU_ID_MASK 0xffff0000
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#endif // RX_RXPCU_CLASSIFICATION_OVERVIEW
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