36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
218 lines
8.2 KiB
C
218 lines
8.2 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _PHYRX_L_SIG_A_H_
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#define _PHYRX_L_SIG_A_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "l_sig_a_info.h"
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#define NUM_OF_DWORDS_PHYRX_L_SIG_A 2
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#define NUM_OF_QWORDS_PHYRX_L_SIG_A 1
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struct phyrx_l_sig_a {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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struct l_sig_a_info phyrx_l_sig_a_info_details;
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uint32_t tlv64_padding : 32; // [31:0]
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#else
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struct l_sig_a_info phyrx_l_sig_a_info_details;
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uint32_t tlv64_padding : 32; // [31:0]
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#endif
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};
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/* Description PHYRX_L_SIG_A_INFO_DETAILS
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See detailed description of the STRUCT
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*/
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/* Description RATE
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This format is originally defined for OFDM as a 4 bit field
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but the 5th bit was added to indicate 11b formatted frames.
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In the standard bit [4] is specified as reserved. For
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11b frames this L-SIG is transformed in the PHY into the
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11b preamble format. The following are the rates:
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<enum 8 ofdm_48_mbps> 64-QAM 2/3 (48 Mbps)
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<enum 9 ofdm_24_mbps> 16-QAM 1/2 (24 Mbps)
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<enum 10 ofdm_12_mbps> QPSK 1/2 (12 Mbps)
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<enum 11 ofdm_6_mbps> BPSK 1/2 (6 Mbps)
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<enum 12 ofdm_54_mbps> 64-QAM 3/4 (54 Mbps)
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<enum 13 ofdm_36_mbps> 16-QAM 3/4 (36 Mbps)
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<enum 14 ofdm_18_mbps> QPSK 1/2 (18 Mbps)
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<enum 15 ofdm_9_mbps> BPSK 3/4 (9 Mbps)
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<legal 8-15>
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_LSB 0
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MSB 3
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_MASK 0x000000000000000f
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/* Description LSIG_RESERVED
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Reserved: Should be set to 0 by the MAC and ignored by the
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PHY
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<legal 0>
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_LSB 4
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MSB 4
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LSIG_RESERVED_MASK 0x0000000000000010
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/* Description LENGTH
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The length indicates the number of octets in this MPDU.
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Note that when using mixed mode .11n preamble or .11ac/.11ax/.11ba/.11be
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this length provides the spoofed length for the PPDU.
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This length provides part of the information (viz. PPDU
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duration) to derive the actually PSDU length. For legacy
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OFDM and 11B frames the maximum length is 4095.
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<legal all>
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_LSB 5
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MSB 16
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_LENGTH_MASK 0x000000000001ffe0
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/* Description PARITY
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11a/n/ac TX: This field provides even parity over the first
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18 bits of the signal field which means that the sum of
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1s in the signal field will always be even on transmission.
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The value of the field is computed by the MAC.
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11a/n/ac RX: this field contains the received parity field
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from the L-SIG symbol for the current packet.
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<legal 0-1>
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_LSB 17
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MSB 17
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PARITY_MASK 0x0000000000020000
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/* Description TAIL
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The 6 bits of tail is always set to 0 is used to flush the
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BCC encoder and decoder. <legal 0>
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_LSB 18
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MSB 23
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_TAIL_MASK 0x0000000000fc0000
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/* Description PKT_TYPE
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Only used on the RX side.
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Note: This is not really part of L-SIG
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Packet type:
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<enum 0 dot11a>802.11a PPDU type
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<enum 1 dot11b>802.11b PPDU type
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<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
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<enum 3 dot11ac>802.11ac PPDU type
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<enum 4 dot11ax>802.11ax PPDU type
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<enum 5 dot11ba>802.11ba (WUR) PPDU type
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<enum 6 dot11be>802.11be PPDU type
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<enum 7 dot11az>802.11az (ranging) PPDU type
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<enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported
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& aborted)
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_LSB 24
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MSB 27
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_PKT_TYPE_MASK 0x000000000f000000
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/* Description CAPTURED_IMPLICIT_SOUNDING
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Only used on the RX side.
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Note: This is not really part of L-SIG
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This indicates that the PHY has captured implicit sounding.
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_LSB 28
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MSB 28
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_CAPTURED_IMPLICIT_SOUNDING_MASK 0x0000000010000000
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/* Description RESERVED
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Reserved: Should be set to 0 by the transmitting MAC and
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ignored by the PHY <legal 0>
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_LSB 29
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MSB 30
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RESERVED_MASK 0x0000000060000000
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/* Description RX_INTEGRITY_CHECK_PASSED
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TX side: Set to 0
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RX side: Set to 1 if PHY determines the L-SIG integrity
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check has passed, else set to 0
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<legal all>
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*/
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 31
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 31
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#define PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x0000000080000000
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/* Description TLV64_PADDING
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Automatic DWORD padding inserted while converting TLV32
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to TLV64 for 64 bit ARCH
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<legal 0>
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*/
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#define PHYRX_L_SIG_A_TLV64_PADDING_OFFSET 0x0000000000000000
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#define PHYRX_L_SIG_A_TLV64_PADDING_LSB 32
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#define PHYRX_L_SIG_A_TLV64_PADDING_MSB 63
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#define PHYRX_L_SIG_A_TLV64_PADDING_MASK 0xffffffff00000000
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#endif // PHYRX_L_SIG_A
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