36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
133 wiersze
4.6 KiB
C
133 wiersze
4.6 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _MACTX_VHT_SIG_B_SU20_H_
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#define _MACTX_VHT_SIG_B_SU20_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "vht_sig_b_su20_info.h"
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#define NUM_OF_DWORDS_MACTX_VHT_SIG_B_SU20 2
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#define NUM_OF_QWORDS_MACTX_VHT_SIG_B_SU20 1
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struct mactx_vht_sig_b_su20 {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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struct vht_sig_b_su20_info mactx_vht_sig_b_su20_info_details;
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uint32_t tlv64_padding : 32; // [31:0]
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#else
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struct vht_sig_b_su20_info mactx_vht_sig_b_su20_info_details;
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uint32_t tlv64_padding : 32; // [31:0]
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#endif
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};
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/* Description MACTX_VHT_SIG_B_SU20_INFO_DETAILS
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See detailed description of the STRUCT
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*/
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/* Description LENGTH
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VHT-SIG-B Length (in units of 4 octets) = ceiling (LENGTH/4)
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<legal all>
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*/
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_OFFSET 0x0000000000000000
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_LSB 0
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_MSB 16
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_LENGTH_MASK 0x000000000001ffff
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/* Description VHTB_RESERVED
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Reserved: Set to all ones for non-NDP frames and ignored
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on receive
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<legal 2,7>
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*/
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_OFFSET 0x0000000000000000
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_LSB 17
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_MSB 19
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_VHTB_RESERVED_MASK 0x00000000000e0000
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/* Description TAIL
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Used to terminate the trellis of the convolutional decoder.
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Set to 0. <legal 0>
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*/
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_LSB 20
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_MSB 25
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_TAIL_MASK 0x0000000003f00000
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/* Description RESERVED
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Not part of VHT-SIG-B.
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Reserved: Set to 0 and ignored on receive <legal 0>
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*/
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_OFFSET 0x0000000000000000
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_LSB 26
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_MSB 30
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RESERVED_MASK 0x000000007c000000
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/* Description RX_NDP
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Not part of VHT-SIG-B.
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Used to identify received NDP frame
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<legal 0,1>
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*/
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_OFFSET 0x0000000000000000
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_LSB 31
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_MSB 31
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#define MACTX_VHT_SIG_B_SU20_MACTX_VHT_SIG_B_SU20_INFO_DETAILS_RX_NDP_MASK 0x0000000080000000
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/* Description TLV64_PADDING
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Automatic DWORD padding inserted while converting TLV32
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to TLV64 for 64 bit ARCH
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<legal 0>
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*/
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#define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_OFFSET 0x0000000000000000
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#define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_LSB 32
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#define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_MSB 63
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#define MACTX_VHT_SIG_B_SU20_TLV64_PADDING_MASK 0xffffffff00000000
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#endif // MACTX_VHT_SIG_B_SU20
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