36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
507 行
18 KiB
C
507 行
18 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _MACTX_HE_SIG_A_SU_H_
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#define _MACTX_HE_SIG_A_SU_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "he_sig_a_su_info.h"
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#define NUM_OF_DWORDS_MACTX_HE_SIG_A_SU 2
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#define NUM_OF_QWORDS_MACTX_HE_SIG_A_SU 1
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struct mactx_he_sig_a_su {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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struct he_sig_a_su_info mactx_he_sig_a_su_info_details;
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#else
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struct he_sig_a_su_info mactx_he_sig_a_su_info_details;
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#endif
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};
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/* Description MACTX_HE_SIG_A_SU_INFO_DETAILS
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See detailed description of the STRUCT
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*/
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/* Description FORMAT_INDICATION
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<enum 0 HE_SIGA_FORMAT_HE_TRIG>
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<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_LSB 0
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MSB 0
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MASK 0x0000000000000001
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/* Description BEAM_CHANGE
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Indicates whether spatial mapping is changed between legacy
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and HE portion of preamble. If not, channel estimation
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can include legacy preamble to improve accuracy
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_LSB 1
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MSB 1
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MASK 0x0000000000000002
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/* Description DL_UL_FLAG
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Differentiates between DL and UL transmission
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<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
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<enum 1 DL_UL_FLAG_IS_UL>
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_LSB 2
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MSB 2
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MASK 0x0000000000000004
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/* Description TRANSMIT_MCS
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Indicates the data MCS
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Field Used by MAC HW
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_LSB 3
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MSB 6
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MASK 0x0000000000000078
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/* Description DCM
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Indicates whether dual sub-carrier modulation is applied
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0: No DCM
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1:DCM
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_LSB 7
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_MSB 7
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DCM_MASK 0x0000000000000080
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/* Description BSS_COLOR_ID
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BSS color ID
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Field Used by MAC HW
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_LSB 8
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MSB 13
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MASK 0x0000000000003f00
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/* Description RESERVED_0A
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Note: spec indicates this shall be set to 1
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<legal 1>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_LSB 14
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MSB 14
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MASK 0x0000000000004000
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/* Description SPATIAL_REUSE
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Spatial reuse
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For 20MHz one SR field corresponding to entire 20MHz (other
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3 fields indicate identical values)
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For 40MHz two SR fields for each 20MHz (other 2 fields indicate
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identical values)
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For 80MHz four SR fields for each 20MHz
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For 160MHz four SR fields for each 40MHz
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_LSB 15
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MSB 18
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MASK 0x0000000000078000
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/* Description TRANSMIT_BW
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Bandwidth of the PPDU.
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For HE SU PPDU
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<enum 0 HE_SIG_A_BW20> 20 Mhz
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<enum 1 HE_SIG_A_BW40> 40 Mhz
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<enum 2 HE_SIG_A_BW80> 80 Mhz
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<enum 3 HE_SIG_A_BW160> 160 MHz or 80+80 MHz
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For HE Extended Range SU PPDU
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Set to 0 for 242-tone RU
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Set to 1 for right 106-tone RU within
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the primary 20 MHz
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On RX side, Field Used by MAC HW
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_LSB 19
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MSB 20
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MASK 0x0000000000180000
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/* Description CP_LTF_SIZE
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Indicates the CP and HE-LTF type
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<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
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<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
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<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
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<enum 3 FourX_LTF_0_8CP_3_2CP>
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When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
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When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
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In this scenario, Neither DCM nor STBC is applied to HE
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data field.
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NOTE:
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If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
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0 = 1xLTF + 0.4 usec
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1 = 2xLTF + 0.4 usec
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2~3 = Reserved
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_LSB 21
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MSB 22
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MASK 0x0000000000600000
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/* Description NSTS
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Indicates number of streams used for the SU transmission
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For HE SU PPDU
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Set to n for n+1 space time stream,
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where n = 0, 1, 2,.....,7.
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For HE Extended Range PPDU
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Set to 0 for 1 space time stream.
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Value 1 is TBD
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Values 2 - 7 are reserved
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_LSB 23
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MSB 25
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MASK 0x0000000003800000
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/* Description RESERVED_0B
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<legal 0>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_LSB 26
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MSB 31
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MASK 0x00000000fc000000
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/* Description TXOP_DURATION
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Indicates the remaining time in the current TXOP
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Field Used by MAC HW
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_LSB 32
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MSB 38
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MASK 0x0000007f00000000
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/* Description CODING
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Distinguishes between BCC and LDPC coding.
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0: BCC
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1: LDPC
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_LSB 39
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_MSB 39
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CODING_MASK 0x0000008000000000
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/* Description LDPC_EXTRA_SYMBOL
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If LDPC,
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0: LDPC extra symbol not present
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1: LDPC extra symbol present
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Else
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Set to 1
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 40
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MSB 40
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x0000010000000000
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/* Description STBC
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Indicates whether STBC is applied
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0: No STBC
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1: STBC
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_LSB 41
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_MSB 41
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_STBC_MASK 0x0000020000000000
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/* Description TXBF
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Indicates whether beamforming is applied
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0: No beamforming
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1: beamforming
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_LSB 42
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MSB 42
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MASK 0x0000040000000000
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/* Description PACKET_EXTENSION_A_FACTOR
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Common trigger info
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the packet extension duration of the trigger-based PPDU
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response with these two bits indicating the "a-factor"
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<enum 0 a_factor_4>
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<enum 1 a_factor_1>
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<enum 2 a_factor_2>
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<enum 3 a_factor_3>
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 43
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MSB 44
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x0000180000000000
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/* Description PACKET_EXTENSION_PE_DISAMBIGUITY
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Common trigger info
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the packet extension duration of the trigger-based PPDU
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response with this bit indicating the PE-Disambiguity
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 45
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MSB 45
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x0000200000000000
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/* Description RESERVED_1A
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Note: per standard, set to 1
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<legal 1>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_LSB 46
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MSB 46
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MASK 0x0000400000000000
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/* Description DOPPLER_INDICATION
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0: No Doppler support
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1: Doppler support
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_LSB 47
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MSB 47
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x0000800000000000
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/* Description CRC
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CRC for HE-SIG-A contents.
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<legal all>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_LSB 48
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_MSB 51
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_CRC_MASK 0x000f000000000000
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/* Description TAIL
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<legal 0>
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*/
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_OFFSET 0x0000000000000000
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_LSB 52
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MSB 57
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MASK 0x03f0000000000000
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/* Description DOT11AX_SU_EXTENDED
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|
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TX side:
|
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Set to 0
|
|
|
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RX side:
|
|
On RX side, evaluated by MAC HW. This is the only way for
|
|
MAC RX to know that this was an HE_SIG_A_SU received in
|
|
'extended' format
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When set, the 11ax frame is of the extended range format
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|
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<legal all>
|
|
*/
|
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|
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000000
|
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_LSB 58
|
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#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MSB 58
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MASK 0x0400000000000000
|
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|
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/* Description DOT11AX_EXT_RU_SIZE
|
|
|
|
TX side:
|
|
Set to 0
|
|
|
|
RX side:
|
|
Field only contains valid info when dot11ax_su_extended
|
|
is set.
|
|
|
|
On RX side, evaluated by MAC HW. This is the only way for
|
|
MAC RX to know what the number of based RUs was in this
|
|
extended range reception. It is used by the MAC to determine
|
|
the RU size for the response...
|
|
|
|
<enum 0 EXT_RU_26>
|
|
<enum 1 EXT_RU_52>
|
|
<enum 2 EXT_RU_106>
|
|
<enum 3 EXT_RU_242><legal 0-3>
|
|
*/
|
|
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000000
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_LSB 59
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MSB 61
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MASK 0x3800000000000000
|
|
|
|
|
|
/* Description RX_NDP
|
|
|
|
TX side:
|
|
Set to 0
|
|
|
|
RX side:Valid on RX side only, and looked at by MAC HW
|
|
|
|
When set, PHY has received (expected) NDP frame
|
|
<legal all>
|
|
*/
|
|
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_OFFSET 0x0000000000000000
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_LSB 62
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MSB 62
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MASK 0x4000000000000000
|
|
|
|
|
|
/* Description RX_INTEGRITY_CHECK_PASSED
|
|
|
|
TX side: Set to 0
|
|
RX side: Set to 1 if PHY determines the HE-SIG-A CRC check
|
|
has passed, else set to 0
|
|
|
|
<legal all>
|
|
*/
|
|
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63
|
|
#define MACTX_HE_SIG_A_SU_MACTX_HE_SIG_A_SU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000
|
|
|
|
|
|
|
|
#endif // MACTX_HE_SIG_A_SU
|