36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
108 行
4.0 KiB
C
108 行
4.0 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _L_SIG_B_INFO_H_
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#define _L_SIG_B_INFO_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_DWORDS_L_SIG_B_INFO 1
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struct l_sig_b_info {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t rate : 4, // [3:0]
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length : 12, // [15:4]
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reserved : 15, // [30:16]
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rx_integrity_check_passed : 1; // [31:31]
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#else
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uint32_t rx_integrity_check_passed : 1, // [31:31]
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reserved : 15, // [30:16]
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length : 12, // [15:4]
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rate : 4; // [3:0]
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#endif
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};
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/* Description RATE
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<enum 1 dsss_1_mpbs_long> DSSS 1 Mbps long
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<enum 2 dsss_2_mbps_long> DSSS 2 Mbps long
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<enum 3 cck_5_5_mbps_long> CCK 5.5 Mbps long
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<enum 4 cck_11_mbps_long> CCK 11 Mbps long
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<enum 5 dsss_2_mbps_short> DSSS 2 Mbps short
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<enum 6 cck_5_5_mbps_short> CCK 5.5 Mbps short
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<enum 7 cck_11_mbps_short> CCK 11 Mbps short
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<legal 1-7>
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*/
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#define L_SIG_B_INFO_RATE_OFFSET 0x00000000
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#define L_SIG_B_INFO_RATE_LSB 0
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#define L_SIG_B_INFO_RATE_MSB 3
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#define L_SIG_B_INFO_RATE_MASK 0x0000000f
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/* Description LENGTH
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The length indicates the number of octets in this MPDU.
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<legal all>
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*/
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#define L_SIG_B_INFO_LENGTH_OFFSET 0x00000000
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#define L_SIG_B_INFO_LENGTH_LSB 4
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#define L_SIG_B_INFO_LENGTH_MSB 15
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#define L_SIG_B_INFO_LENGTH_MASK 0x0000fff0
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/* Description RESERVED
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Reserved: Should be set to 0 by the transmitting MAC and
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ignored by the PHY <legal 0>
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*/
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#define L_SIG_B_INFO_RESERVED_OFFSET 0x00000000
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#define L_SIG_B_INFO_RESERVED_LSB 16
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#define L_SIG_B_INFO_RESERVED_MSB 30
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#define L_SIG_B_INFO_RESERVED_MASK 0x7fff0000
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/* Description RX_INTEGRITY_CHECK_PASSED
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TX side: Set to 0
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RX side: Set to 1 if PHY determines the .11b PHY header
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CRC check has passed, else set to 0
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<legal all>
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*/
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000
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#endif // L_SIG_B_INFO
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