36637cf177
Added ipq5332 target header files under qca5332 to make fw-api project compatible to host. Change-Id: Iee6b3f2a809f31e62b45a0f6e9a7cbb66e070fa0
384 baris
16 KiB
C
384 baris
16 KiB
C
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/* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _COEX_RX_STATUS_H_
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#define _COEX_RX_STATUS_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_DWORDS_COEX_RX_STATUS 2
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#define NUM_OF_QWORDS_COEX_RX_STATUS 1
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struct coex_rx_status {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t rx_mac_frame_status : 2, // [1:0]
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rx_with_tx_response : 1, // [2:2]
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rx_rate : 5, // [7:3]
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rx_bw : 3, // [10:8]
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single_mpdu : 1, // [11:11]
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filter_status : 1, // [12:12]
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ampdu : 1, // [13:13]
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directed : 1, // [14:14]
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reserved_0 : 1, // [15:15]
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rx_nss : 3, // [18:16]
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rx_rssi : 8, // [26:19]
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rx_type : 3, // [29:27]
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retry_bit_setting : 1, // [30:30]
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more_data_bit_setting : 1; // [31:31]
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uint32_t remain_rx_packet_time : 16, // [15:0]
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rx_remaining_fes_time : 16; // [31:16]
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#else
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uint32_t more_data_bit_setting : 1, // [31:31]
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retry_bit_setting : 1, // [30:30]
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rx_type : 3, // [29:27]
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rx_rssi : 8, // [26:19]
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rx_nss : 3, // [18:16]
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reserved_0 : 1, // [15:15]
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directed : 1, // [14:14]
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ampdu : 1, // [13:13]
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filter_status : 1, // [12:12]
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single_mpdu : 1, // [11:11]
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rx_bw : 3, // [10:8]
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rx_rate : 5, // [7:3]
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rx_with_tx_response : 1, // [2:2]
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rx_mac_frame_status : 2; // [1:0]
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uint32_t rx_remaining_fes_time : 16, // [31:16]
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remain_rx_packet_time : 16; // [15:0]
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#endif
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};
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/* Description RX_MAC_FRAME_STATUS
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RXPCU send this bit as 1 when it receives the begin of a
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frame from PHY, and it passes the address filter. RXPCUsend
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this bit as 0 when the frame ends. (on/off bit)
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<enum 0 ppdu_start> start of PPDU reception.
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For SU: Generated the first time the MPDU header passes
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the address filter and is destined to this STA.
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For MU: Generated the first time the MPDU header from any
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user passes the address filter and is destined to this
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STA.
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<enum 1 first_mpdu_FCS_pass> message only sent in case
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of A-MPDU reception.
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For SU: first time the FCS of an MPDU passes (and frame
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is destined to this device)
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For MU: first time the FCS of any MPDU passes (and frame
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is destined to this device)
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<enum 2 ppdu_end> receive of PPDU frame reception has
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finished
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<enum 3 ppdu_end_due_to_phy_nap> receive of PPDU frame reception
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has finished as it has been aborted due to PHY NAP generation
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<legal all>
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*/
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#define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_LSB 0
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#define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MSB 1
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#define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MASK 0x0000000000000003
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/* Description RX_WITH_TX_RESPONSE
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Field only valid when rx_mac_frame_status is first_mpdu_FCS_pass
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or ppdu_end.
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For SU: RXPCU set this bit to indicate it is expecting the
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TX to send a response after the receive.
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For MU: RXPCU set this bit to indicate it is expecting that
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at least for one of the users a response after the reception
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needs to be generated.
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<legal all>
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*/
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#define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_LSB 2
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#define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MSB 2
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#define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MASK 0x0000000000000004
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/* Description RX_RATE
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For SU: RXPCU send the current receive rate at the beginning
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of receive when rate is available from PHY.
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For MU: RXPCU to use the current receive rate from the first
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USER that triggers this TLV to be generated.
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Field is always valid
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<legal all>
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*/
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#define COEX_RX_STATUS_RX_RATE_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_RATE_LSB 3
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#define COEX_RX_STATUS_RX_RATE_MSB 7
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#define COEX_RX_STATUS_RX_RATE_MASK 0x00000000000000f8
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/* Description RX_BW
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Actual RX bandwidth. Not SU or MU dependent.
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RXPCU send the current receive rate at the beginning of
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receive. This information is from PHY.
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Field is always valid
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<enum 0 20_mhz>20 Mhz BW
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<enum 1 40_mhz>40 Mhz BW
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<enum 2 80_mhz>80 Mhz BW
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<enum 3 160_mhz>160 Mhz BW
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<enum 4 320_mhz>320 Mhz BW
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<enum 5 240_mhz>240 Mhz BW
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*/
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#define COEX_RX_STATUS_RX_BW_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_BW_LSB 8
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#define COEX_RX_STATUS_RX_BW_MSB 10
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#define COEX_RX_STATUS_RX_BW_MASK 0x0000000000000700
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/* Description SINGLE_MPDU
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For SU: Once set the Received frame is a single MPDU. This
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can be a non-AMPDU reception or A-MPDU reception but with
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an EOF bit set (VHT single AMPDU).
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For MU: RXPCU to base this on the first USER that triggers
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this TLV to be generated.
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<legal all>
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*/
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#define COEX_RX_STATUS_SINGLE_MPDU_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_SINGLE_MPDU_LSB 11
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#define COEX_RX_STATUS_SINGLE_MPDU_MSB 11
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#define COEX_RX_STATUS_SINGLE_MPDU_MASK 0x0000000000000800
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/* Description FILTER_STATUS
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1: LMAC is interested in receiving the full packet and forward
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it to downstream modules. 0: LMAC is not interested in
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receiving the packet.
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In HastingsPrime based on the register bit 'COEX_RX_STATUS_NOFILTERIN,'
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Rx PCU will send this TLV for filtered-out packets as well,
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with appropriate info in the fields filter_status, AMPDU
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and Directed. Otherwise, and in other chips, this TLV is
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sent only for packets filtered in, with these fields set
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to zero.
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<legal all>
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*/
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#define COEX_RX_STATUS_FILTER_STATUS_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_FILTER_STATUS_LSB 12
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#define COEX_RX_STATUS_FILTER_STATUS_MSB 12
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#define COEX_RX_STATUS_FILTER_STATUS_MASK 0x0000000000001000
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/* Description AMPDU
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1: Indicates received frame is an AMPDU0: indicates received
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frames in not an AMPDU
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In HastingsPrime based on the register bit 'COEX_RX_STATUS_NOFILTERIN,'
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Rx PCU will send this TLV for filtered-out packets as well,
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with appropriate info in the fields filter_status, AMPDU
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and Directed. Otherwise, and in other chips, this TLV is
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sent only for packets filtered in, with these fields set
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to zero.
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<legal all>
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*/
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#define COEX_RX_STATUS_AMPDU_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_AMPDU_LSB 13
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#define COEX_RX_STATUS_AMPDU_MSB 13
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#define COEX_RX_STATUS_AMPDU_MASK 0x0000000000002000
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/* Description DIRECTED
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1: indicates AD1 matches our Receiver address0: indicates
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AD1 does not match our Receiver address
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In HastingsPrime based on the register bit 'COEX_RX_STATUS_NOFILTERIN,'
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Rx PCU will send this TLV for filtered-out packets as well,
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with appropriate info in the fields filter_status, AMPDU
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and Directed. Otherwise, and in other chips, this TLV is
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sent only for packets filtered in, with these fields set
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to zero.
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<legal all>
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*/
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#define COEX_RX_STATUS_DIRECTED_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_DIRECTED_LSB 14
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#define COEX_RX_STATUS_DIRECTED_MSB 14
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#define COEX_RX_STATUS_DIRECTED_MASK 0x0000000000004000
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/* Description RESERVED_0
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<legal 0>
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*/
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#define COEX_RX_STATUS_RESERVED_0_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RESERVED_0_LSB 15
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#define COEX_RX_STATUS_RESERVED_0_MSB 15
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#define COEX_RX_STATUS_RESERVED_0_MASK 0x0000000000008000
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/* Description RX_NSS
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For SU: Number of spatial streams in the reception. Field
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is always valid
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For MU: RXPCU to base this on the first USER that triggers
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this TLV to be generated.
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<enum 0 1_spatial_stream>Single spatial stream
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<enum 1 2_spatial_streams>2 spatial streams
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<enum 2 3_spatial_streams>3 spatial streams
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<enum 3 4_spatial_streams>4 spatial streams
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<enum 4 5_spatial_streams>5 spatial streams
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<enum 5 6_spatial_streams>6 spatial streams
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<enum 6 7_spatial_streams>7 spatial streams
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<enum 7 8_spatial_streams>8 spatial streams
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*/
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#define COEX_RX_STATUS_RX_NSS_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_NSS_LSB 16
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#define COEX_RX_STATUS_RX_NSS_MSB 18
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#define COEX_RX_STATUS_RX_NSS_MASK 0x0000000000070000
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/* Description RX_RSSI
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RXPCU send the current receive RSSI (from the PHYRX_RSSI_LEGACY
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TLV) at the beginning of reception. This is information
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is from PHY and is not SU or MU dependent.
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Field is always valid
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<legal all>
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*/
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#define COEX_RX_STATUS_RX_RSSI_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_RSSI_LSB 19
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#define COEX_RX_STATUS_RX_RSSI_MSB 26
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#define COEX_RX_STATUS_RX_RSSI_MASK 0x0000000007f80000
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/* Description RX_TYPE
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For SU: RXPCU send the current receive packet type. Field
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is always valid.This info is from MAC.
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For MU: RXPCU to base this on the first USER that triggers
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this TLV to be generated.
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<enum 0 data >
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<enum 1 management>
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<enum 2 beacon>
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<enum 3 control> For reception of RTS frame
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<enum 4 control_response> For reception of CTS, ACK
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or BA frames
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<enum 5 others>
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<legal 0-5>
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*/
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#define COEX_RX_STATUS_RX_TYPE_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_TYPE_LSB 27
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#define COEX_RX_STATUS_RX_TYPE_MSB 29
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#define COEX_RX_STATUS_RX_TYPE_MASK 0x0000000038000000
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/* Description RETRY_BIT_SETTING
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For SU: Value of the retry bit in the frame control field
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of the first MPDU MAC header that passes the RxPCU frame
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filter
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For MU: RXPCU to base this on the first USER that triggers
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this TLV to be generated.
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<legal all>
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*/
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#define COEX_RX_STATUS_RETRY_BIT_SETTING_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RETRY_BIT_SETTING_LSB 30
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#define COEX_RX_STATUS_RETRY_BIT_SETTING_MSB 30
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#define COEX_RX_STATUS_RETRY_BIT_SETTING_MASK 0x0000000040000000
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/* Description MORE_DATA_BIT_SETTING
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For SU: Value of the more data bit in the frame control
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field of the first MPDU MAC header that passes the RxPCU
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frame filter
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For MU: RXPCU to base this on the first USER that triggers
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this TLV to be generated.
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<legal all>
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*/
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#define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_LSB 31
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#define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MSB 31
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#define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MASK 0x0000000080000000
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/* Description REMAIN_RX_PACKET_TIME
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HWSCH sends current remaining rx PPDU frame time. This time
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covers the entire rx_frame. This information is not in
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the L-SIG and we expect to get it from PHY at the start
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of the reception.
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This is not SU or MU dependent.
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<legal all>
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*/
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#define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_LSB 32
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#define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MSB 47
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#define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MASK 0x0000ffff00000000
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/* Description RX_REMAINING_FES_TIME
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RXPCU sends the remaining time FES time the moment a frame
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with proper FCS is received. The time indicated is the
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remaining rx packet time with the duration field value added.
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As long as no frame with valid FCS is received, this field
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should be set equal to 'remain_rx_packet_time'
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This is not SU or MU dependent.
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<legal all>
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*/
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#define COEX_RX_STATUS_RX_REMAINING_FES_TIME_OFFSET 0x0000000000000000
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#define COEX_RX_STATUS_RX_REMAINING_FES_TIME_LSB 48
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#define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MSB 63
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#define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MASK 0xffff000000000000
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#endif // COEX_RX_STATUS
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