84c021cfef
Add the E3 release HW header files for QCA5018 Change-Id: Iab5b1cedf7b72f391adc4ebe57a4376a9c1c4239
841 lines
24 KiB
C
841 lines
24 KiB
C
/*
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* Copyright (c) 2020, The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _RX_MSDU_DESC_INFO_H_
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#define _RX_MSDU_DESC_INFO_H_
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#if !defined(__ASSEMBLER__)
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#endif
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0 first_msdu_in_mpdu_flag[0], last_msdu_in_mpdu_flag[1], msdu_continuation[2], msdu_length[16:3], reo_destination_indication[21:17], msdu_drop[22], sa_is_valid[23], sa_idx_timeout[24], da_is_valid[25], da_is_mcbc[26], da_idx_timeout[27], l3_header_padding_msb[28], tcp_udp_chksum_fail[29], ip_chksum_fail[30], raw_mpdu[31]
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// 1 sa_idx_or_sw_peer_id_14_0[14:0], mpdu_ast_idx_or_sw_peer_id_14_0[29:15], fr_ds[30], to_ds[31]
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 2
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struct rx_msdu_desc_info {
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uint32_t first_msdu_in_mpdu_flag : 1, //[0]
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last_msdu_in_mpdu_flag : 1, //[1]
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msdu_continuation : 1, //[2]
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msdu_length : 14, //[16:3]
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reo_destination_indication : 5, //[21:17]
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msdu_drop : 1, //[22]
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sa_is_valid : 1, //[23]
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sa_idx_timeout : 1, //[24]
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da_is_valid : 1, //[25]
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da_is_mcbc : 1, //[26]
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da_idx_timeout : 1, //[27]
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l3_header_padding_msb : 1, //[28]
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tcp_udp_chksum_fail : 1, //[29]
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ip_chksum_fail : 1, //[30]
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raw_mpdu : 1; //[31]
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uint32_t sa_idx_or_sw_peer_id_14_0 : 15, //[14:0]
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mpdu_ast_idx_or_sw_peer_id_14_0 : 15, //[29:15]
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fr_ds : 1, //[30]
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to_ds : 1; //[31]
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};
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/*
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first_msdu_in_mpdu_flag
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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<enum 0 Not_first_msdu> This is not the first MSDU in
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the MPDU.
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<enum 1 first_msdu> This MSDU is the first one in the
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MPDU.
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<legal all>
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last_msdu_in_mpdu_flag
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Consumer: WBM/REO/SW/FW
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Producer: RXDMA
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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<enum 0 Not_last_msdu> There are more MSDUs linked to
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this MSDU that belongs to this MPDU
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<enum 1 Last_msdu> this MSDU is the last one in the
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MPDU. This setting is only allowed in combination with
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'Msdu_continuation' set to 0. This implies that when an msdu
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is spread out over multiple buffers and thus
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msdu_continuation is set, only for the very last buffer of
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the msdu, can the 'last_msdu_in_mpdu_flag' be set.
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When both first_msdu_in_mpdu_flag and
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last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
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belongs to only contains a single MSDU.
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<legal all>
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msdu_continuation
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When set, this MSDU buffer was not able to hold the
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entire MSDU. The next buffer will therefor contain
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additional information related to this MSDU.
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<legal all>
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msdu_length
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Parsed from RX_MSDU_START TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the First
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buffer used by MSDU.
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Full MSDU length in bytes after decapsulation.
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This field is still valid for MPDU frames without
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A-MSDU. It still represents MSDU length after decapsulation
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Or in case of RAW MPDUs, it indicates the length of the
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entire MPDU (without FCS field)
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<legal all>
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reo_destination_indication
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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The ID of the REO exit ring where the MSDU frame shall
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push after (MPDU level) reordering has finished.
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<enum 0 reo_destination_tcl> Reo will push the frame
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into the REO2TCL ring
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<enum 1 reo_destination_sw1> Reo will push the frame
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into the REO2SW1 ring
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<enum 2 reo_destination_sw2> Reo will push the frame
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into the REO2SW2 ring
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<enum 3 reo_destination_sw3> Reo will push the frame
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into the REO2SW3 ring
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<enum 4 reo_destination_sw4> Reo will push the frame
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into the REO2SW4 ring
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<enum 5 reo_destination_release> Reo will push the frame
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into the REO_release ring
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<enum 6 reo_destination_fw> Reo will push the frame into
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the REO2FW ring
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<enum 7 reo_destination_sw5> Reo will push the frame
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into the REO2SW5 ring (REO remaps this in chips without
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REO2SW5 ring, e.g. Pine)
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<enum 8 reo_destination_sw6> Reo will push the frame
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into the REO2SW6 ring (REO remaps this in chips without
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REO2SW6 ring, e.g. Pine)
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<enum 9 reo_destination_9> REO remaps this <enum 10
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reo_destination_10> REO remaps this
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<enum 11 reo_destination_11> REO remaps this
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<enum 12 reo_destination_12> REO remaps this <enum 13
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reo_destination_13> REO remaps this
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<enum 14 reo_destination_14> REO remaps this
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<enum 15 reo_destination_15> REO remaps this
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<enum 16 reo_destination_16> REO remaps this
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<enum 17 reo_destination_17> REO remaps this
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<enum 18 reo_destination_18> REO remaps this
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<enum 19 reo_destination_19> REO remaps this
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<enum 20 reo_destination_20> REO remaps this
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<enum 21 reo_destination_21> REO remaps this
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<enum 22 reo_destination_22> REO remaps this
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<enum 23 reo_destination_23> REO remaps this
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<enum 24 reo_destination_24> REO remaps this
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<enum 25 reo_destination_25> REO remaps this
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<enum 26 reo_destination_26> REO remaps this
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<enum 27 reo_destination_27> REO remaps this
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<enum 28 reo_destination_28> REO remaps this
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<enum 29 reo_destination_29> REO remaps this
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<enum 30 reo_destination_30> REO remaps this
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<enum 31 reo_destination_31> REO remaps this
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<legal all>
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msdu_drop
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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When set, REO shall drop this MSDU and not forward it to
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any other ring...
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<legal all>
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sa_is_valid
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates that OLE found a valid SA entry for this MSDU
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<legal all>
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sa_idx_timeout
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates an unsuccessful MAC source address search due
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to the expiring of the search timer for this MSDU
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<legal all>
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da_is_valid
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates that OLE found a valid DA entry for this MSDU
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<legal all>
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da_is_mcbc
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Field Only valid if da_is_valid is set
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Indicates the DA address was a Multicast of Broadcast
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address for this MSDU
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<legal all>
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da_idx_timeout
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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Indicates an unsuccessful MAC destination address search
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due to the expiring of the search timer for this MSDU
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<legal all>
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l3_header_padding_msb
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Passed on from 'RX_MSDU_END' TLV (only the MSB is
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reported as the LSB is always zero)
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Number of bytes padded to make sure that the L3 header
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will always start of a Dword boundary
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<legal all>
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tcp_udp_chksum_fail
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Passed on from 'RX_ATTENTION' TLV
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Indicates that the computed checksum did not match the
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checksum in the TCP/UDP header.
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<legal all>
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ip_chksum_fail
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Passed on from 'RX_ATTENTION' TLV
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Indicates that the computed checksum did not match the
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checksum in the IP header.
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<legal all>
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raw_mpdu
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Passed on from 'RX_MPDU_INFO' structure in
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'RX_MPDU_START' TLV
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Set to 1 by RXOLE when it has not performed any 802.11
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to Ethernet/Natvie WiFi header conversion on this MPDU.
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<legal all>
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sa_idx_or_sw_peer_id_14_0
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Passed on from 'RX_MSDU_END' TLV (one MSB is omitted)
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Based on a register configuration in RXDMA, this field
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will contain:
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The offset in the address search table which matches the
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MAC source address
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OR
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'sw_peer_id' from the address search entry corresponding
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to the source address of the MSDU
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<legal all>
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mpdu_ast_idx_or_sw_peer_id_14_0
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Passed on from 'RX_MPDU_INFO' structure in
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'RX_MPDU_START' TLV (one MSB is omitted)
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Based on a register configuration in RXDMA, this field
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will contain:
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The index of the address search entry corresponding to
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this MPDU (a value of 0xFFFF indicates an invalid AST index,
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meaning that no AST entry was found or no AST search was
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performed)
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OR:
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'sw_peer_id' from the address search entry corresponding
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to this MPDU (in case of ndp or phy_err or
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AST_based_lookup_valid == 0, this field will be set to 0)
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<legal all>
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fr_ds
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Passed on from 'RX_MPDU_INFO' structure in
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'RX_MPDU_START' TLV
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Set if the 'from DS' bit is set in the frame control.
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<legal all>
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to_ds
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Passed on from 'RX_MPDU_INFO' structure in
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'RX_MPDU_START' TLV
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Set if the 'to DS' bit is set in the frame control.
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<legal all>
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*/
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/* Description RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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<enum 0 Not_first_msdu> This is not the first MSDU in
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the MPDU.
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<enum 1 first_msdu> This MSDU is the first one in the
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MPDU.
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<legal all>
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*/
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#define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
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#define RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
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/* Description RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG
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Consumer: WBM/REO/SW/FW
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Producer: RXDMA
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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<enum 0 Not_last_msdu> There are more MSDUs linked to
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this MSDU that belongs to this MPDU
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<enum 1 Last_msdu> this MSDU is the last one in the
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MPDU. This setting is only allowed in combination with
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'Msdu_continuation' set to 0. This implies that when an msdu
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is spread out over multiple buffers and thus
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msdu_continuation is set, only for the very last buffer of
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the msdu, can the 'last_msdu_in_mpdu_flag' be set.
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When both first_msdu_in_mpdu_flag and
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last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
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belongs to only contains a single MSDU.
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<legal all>
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*/
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#define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_LSB 1
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#define RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
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/* Description RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION
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When set, this MSDU buffer was not able to hold the
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entire MSDU. The next buffer will therefor contain
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additional information related to this MSDU.
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<legal all>
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*/
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#define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB 2
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#define RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK 0x00000004
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/* Description RX_MSDU_DESC_INFO_0_MSDU_LENGTH
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Parsed from RX_MSDU_START TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the First
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buffer used by MSDU.
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Full MSDU length in bytes after decapsulation.
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This field is still valid for MPDU frames without
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A-MSDU. It still represents MSDU length after decapsulation
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Or in case of RAW MPDUs, it indicates the length of the
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entire MPDU (without FCS field)
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<legal all>
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*/
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#define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_LSB 3
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#define RX_MSDU_DESC_INFO_0_MSDU_LENGTH_MASK 0x0001fff8
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/* Description RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
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over multiple buffers, this field will be valid in the Last
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buffer used by the MSDU
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The ID of the REO exit ring where the MSDU frame shall
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push after (MPDU level) reordering has finished.
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<enum 0 reo_destination_tcl> Reo will push the frame
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into the REO2TCL ring
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<enum 1 reo_destination_sw1> Reo will push the frame
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into the REO2SW1 ring
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<enum 2 reo_destination_sw2> Reo will push the frame
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into the REO2SW2 ring
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<enum 3 reo_destination_sw3> Reo will push the frame
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into the REO2SW3 ring
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<enum 4 reo_destination_sw4> Reo will push the frame
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into the REO2SW4 ring
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<enum 5 reo_destination_release> Reo will push the frame
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into the REO_release ring
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<enum 6 reo_destination_fw> Reo will push the frame into
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the REO2FW ring
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<enum 7 reo_destination_sw5> Reo will push the frame
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into the REO2SW5 ring (REO remaps this in chips without
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REO2SW5 ring, e.g. Pine)
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<enum 8 reo_destination_sw6> Reo will push the frame
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into the REO2SW6 ring (REO remaps this in chips without
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REO2SW6 ring, e.g. Pine)
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<enum 9 reo_destination_9> REO remaps this <enum 10
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reo_destination_10> REO remaps this
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<enum 11 reo_destination_11> REO remaps this
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<enum 12 reo_destination_12> REO remaps this <enum 13
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reo_destination_13> REO remaps this
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<enum 14 reo_destination_14> REO remaps this
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<enum 15 reo_destination_15> REO remaps this
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<enum 16 reo_destination_16> REO remaps this
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<enum 17 reo_destination_17> REO remaps this
|
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<enum 18 reo_destination_18> REO remaps this
|
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<enum 19 reo_destination_19> REO remaps this
|
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<enum 20 reo_destination_20> REO remaps this
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<enum 21 reo_destination_21> REO remaps this
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<enum 22 reo_destination_22> REO remaps this
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<enum 23 reo_destination_23> REO remaps this
|
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<enum 24 reo_destination_24> REO remaps this
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<enum 25 reo_destination_25> REO remaps this
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<enum 26 reo_destination_26> REO remaps this
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<enum 27 reo_destination_27> REO remaps this
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<enum 28 reo_destination_28> REO remaps this
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<enum 29 reo_destination_29> REO remaps this
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<enum 30 reo_destination_30> REO remaps this
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<enum 31 reo_destination_31> REO remaps this
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<legal all>
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*/
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#define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB 17
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#define RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK 0x003e0000
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/* Description RX_MSDU_DESC_INFO_0_MSDU_DROP
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|
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
|
|
over multiple buffers, this field will be valid in the Last
|
|
buffer used by the MSDU
|
|
|
|
|
|
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When set, REO shall drop this MSDU and not forward it to
|
|
any other ring...
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|
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<legal all>
|
|
*/
|
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#define RX_MSDU_DESC_INFO_0_MSDU_DROP_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_0_MSDU_DROP_LSB 22
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#define RX_MSDU_DESC_INFO_0_MSDU_DROP_MASK 0x00400000
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/* Description RX_MSDU_DESC_INFO_0_SA_IS_VALID
|
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|
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Parsed from RX_MSDU_END TLV . In the case MSDU spans
|
|
over multiple buffers, this field will be valid in the Last
|
|
buffer used by the MSDU
|
|
|
|
|
|
|
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Indicates that OLE found a valid SA entry for this MSDU
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_SA_IS_VALID_LSB 23
|
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#define RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK 0x00800000
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|
|
|
/* Description RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT
|
|
|
|
Parsed from RX_MSDU_END TLV . In the case MSDU spans
|
|
over multiple buffers, this field will be valid in the Last
|
|
buffer used by the MSDU
|
|
|
|
|
|
|
|
Indicates an unsuccessful MAC source address search due
|
|
to the expiring of the search timer for this MSDU
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_LSB 24
|
|
#define RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK 0x01000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_0_DA_IS_VALID
|
|
|
|
Parsed from RX_MSDU_END TLV . In the case MSDU spans
|
|
over multiple buffers, this field will be valid in the Last
|
|
buffer used by the MSDU
|
|
|
|
|
|
|
|
Indicates that OLE found a valid DA entry for this MSDU
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_DA_IS_VALID_LSB 25
|
|
#define RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK 0x02000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_0_DA_IS_MCBC
|
|
|
|
Field Only valid if da_is_valid is set
|
|
|
|
|
|
|
|
Indicates the DA address was a Multicast of Broadcast
|
|
address for this MSDU
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_LSB 26
|
|
#define RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK 0x04000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT
|
|
|
|
Parsed from RX_MSDU_END TLV . In the case MSDU spans
|
|
over multiple buffers, this field will be valid in the Last
|
|
buffer used by the MSDU
|
|
|
|
|
|
|
|
Indicates an unsuccessful MAC destination address search
|
|
due to the expiring of the search timer for this MSDU
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_LSB 27
|
|
#define RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK 0x08000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB
|
|
|
|
Passed on from 'RX_MSDU_END' TLV (only the MSB is
|
|
reported as the LSB is always zero)
|
|
|
|
Number of bytes padded to make sure that the L3 header
|
|
will always start of a Dword boundary
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB_LSB 28
|
|
#define RX_MSDU_DESC_INFO_0_L3_HEADER_PADDING_MSB_MASK 0x10000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL
|
|
|
|
Passed on from 'RX_ATTENTION' TLV
|
|
|
|
Indicates that the computed checksum did not match the
|
|
checksum in the TCP/UDP header.
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL_LSB 29
|
|
#define RX_MSDU_DESC_INFO_0_TCP_UDP_CHKSUM_FAIL_MASK 0x20000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL
|
|
|
|
Passed on from 'RX_ATTENTION' TLV
|
|
|
|
Indicates that the computed checksum did not match the
|
|
checksum in the IP header.
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL_LSB 30
|
|
#define RX_MSDU_DESC_INFO_0_IP_CHKSUM_FAIL_MASK 0x40000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_0_RAW_MPDU
|
|
|
|
Passed on from 'RX_MPDU_INFO' structure in
|
|
'RX_MPDU_START' TLV
|
|
|
|
Set to 1 by RXOLE when it has not performed any 802.11
|
|
to Ethernet/Natvie WiFi header conversion on this MPDU.
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_0_RAW_MPDU_OFFSET 0x00000000
|
|
#define RX_MSDU_DESC_INFO_0_RAW_MPDU_LSB 31
|
|
#define RX_MSDU_DESC_INFO_0_RAW_MPDU_MASK 0x80000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0
|
|
|
|
Passed on from 'RX_MSDU_END' TLV (one MSB is omitted)
|
|
|
|
Based on a register configuration in RXDMA, this field
|
|
will contain:
|
|
|
|
The offset in the address search table which matches the
|
|
MAC source address
|
|
|
|
OR
|
|
|
|
|
|
|
|
'sw_peer_id' from the address search entry corresponding
|
|
to the source address of the MSDU
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0_OFFSET 0x00000004
|
|
#define RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0_LSB 0
|
|
#define RX_MSDU_DESC_INFO_1_SA_IDX_OR_SW_PEER_ID_14_0_MASK 0x00007fff
|
|
|
|
/* Description RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0
|
|
|
|
Passed on from 'RX_MPDU_INFO' structure in
|
|
'RX_MPDU_START' TLV (one MSB is omitted)
|
|
|
|
|
|
|
|
Based on a register configuration in RXDMA, this field
|
|
will contain:
|
|
|
|
The index of the address search entry corresponding to
|
|
this MPDU (a value of 0xFFFF indicates an invalid AST index,
|
|
meaning that no AST entry was found or no AST search was
|
|
performed)
|
|
|
|
|
|
|
|
OR:
|
|
|
|
|
|
|
|
'sw_peer_id' from the address search entry corresponding
|
|
to this MPDU (in case of ndp or phy_err or
|
|
AST_based_lookup_valid == 0, this field will be set to 0)
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0_OFFSET 0x00000004
|
|
#define RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0_LSB 15
|
|
#define RX_MSDU_DESC_INFO_1_MPDU_AST_IDX_OR_SW_PEER_ID_14_0_MASK 0x3fff8000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_1_FR_DS
|
|
|
|
Passed on from 'RX_MPDU_INFO' structure in
|
|
'RX_MPDU_START' TLV
|
|
|
|
Set if the 'from DS' bit is set in the frame control.
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_1_FR_DS_OFFSET 0x00000004
|
|
#define RX_MSDU_DESC_INFO_1_FR_DS_LSB 30
|
|
#define RX_MSDU_DESC_INFO_1_FR_DS_MASK 0x40000000
|
|
|
|
/* Description RX_MSDU_DESC_INFO_1_TO_DS
|
|
|
|
Passed on from 'RX_MPDU_INFO' structure in
|
|
'RX_MPDU_START' TLV
|
|
|
|
Set if the 'to DS' bit is set in the frame control.
|
|
|
|
<legal all>
|
|
*/
|
|
#define RX_MSDU_DESC_INFO_1_TO_DS_OFFSET 0x00000004
|
|
#define RX_MSDU_DESC_INFO_1_TO_DS_LSB 31
|
|
#define RX_MSDU_DESC_INFO_1_TO_DS_MASK 0x80000000
|
|
|
|
|
|
#endif // _RX_MSDU_DESC_INFO_H_
|