sde_plane.c 128 KB

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  1. /*
  2. * Copyright (C) 2014-2020 The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
  19. #include <linux/debugfs.h>
  20. #include <linux/dma-buf.h>
  21. #include <drm/sde_drm.h>
  22. #include <drm/msm_drm_pp.h>
  23. #include "msm_prop.h"
  24. #include "msm_drv.h"
  25. #include "sde_kms.h"
  26. #include "sde_fence.h"
  27. #include "sde_formats.h"
  28. #include "sde_hw_sspp.h"
  29. #include "sde_hw_catalog_format.h"
  30. #include "sde_trace.h"
  31. #include "sde_crtc.h"
  32. #include "sde_vbif.h"
  33. #include "sde_plane.h"
  34. #include "sde_color_processing.h"
  35. #define SDE_DEBUG_PLANE(pl, fmt, ...) SDE_DEBUG("plane%d " fmt,\
  36. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  37. #define SDE_ERROR_PLANE(pl, fmt, ...) SDE_ERROR("plane%d " fmt,\
  38. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  39. #define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
  40. #define PHASE_STEP_SHIFT 21
  41. #define PHASE_STEP_UNIT_SCALE ((int) (1 << PHASE_STEP_SHIFT))
  42. #define PHASE_RESIDUAL 15
  43. #define SHARP_STRENGTH_DEFAULT 32
  44. #define SHARP_EDGE_THR_DEFAULT 112
  45. #define SHARP_SMOOTH_THR_DEFAULT 8
  46. #define SHARP_NOISE_THR_DEFAULT 2
  47. #define SDE_NAME_SIZE 12
  48. #define SDE_PLANE_COLOR_FILL_FLAG BIT(31)
  49. #define TIME_MULTIPLEX_RECT(r0, r1, buffer_lines) \
  50. ((r0).y >= ((r1).y + (r1).h + buffer_lines))
  51. /* multirect rect index */
  52. enum {
  53. R0,
  54. R1,
  55. R_MAX
  56. };
  57. #define SDE_QSEED_DEFAULT_DYN_EXP 0x0
  58. #define DEFAULT_REFRESH_RATE 60
  59. /**
  60. * enum sde_plane_qos - Different qos configurations for each pipe
  61. *
  62. * @SDE_PLANE_QOS_VBLANK_CTRL: Setup VBLANK qos for the pipe.
  63. * @SDE_PLANE_QOS_VBLANK_AMORTIZE: Enables Amortization within pipe.
  64. * this configuration is mutually exclusive from VBLANK_CTRL.
  65. * @SDE_PLANE_QOS_PANIC_CTRL: Setup panic for the pipe.
  66. */
  67. enum sde_plane_qos {
  68. SDE_PLANE_QOS_VBLANK_CTRL = BIT(0),
  69. SDE_PLANE_QOS_VBLANK_AMORTIZE = BIT(1),
  70. SDE_PLANE_QOS_PANIC_CTRL = BIT(2),
  71. };
  72. /*
  73. * struct sde_plane - local sde plane structure
  74. * @aspace: address space pointer
  75. * @csc_cfg: Decoded user configuration for csc
  76. * @csc_usr_ptr: Points to csc_cfg if valid user config available
  77. * @csc_ptr: Points to sde_csc_cfg structure to use for current
  78. * @mplane_list: List of multirect planes of the same pipe
  79. * @catalog: Points to sde catalog structure
  80. * @revalidate: force revalidation of all the plane properties
  81. * @xin_halt_forced_clk: whether or not clocks were forced on for xin halt
  82. * @blob_rot_caps: Pointer to rotator capability blob
  83. */
  84. struct sde_plane {
  85. struct drm_plane base;
  86. struct mutex lock;
  87. enum sde_sspp pipe;
  88. uint32_t features; /* capabilities from catalog */
  89. uint32_t perf_features; /* perf capabilities from catalog */
  90. uint32_t nformats;
  91. uint32_t formats[64];
  92. struct sde_hw_pipe *pipe_hw;
  93. struct sde_hw_pipe_cfg pipe_cfg;
  94. struct sde_hw_sharp_cfg sharp_cfg;
  95. struct sde_hw_pipe_qos_cfg pipe_qos_cfg;
  96. struct sde_vbif_set_qos_params cached_qos_params;
  97. uint32_t color_fill;
  98. bool is_error;
  99. bool is_rt_pipe;
  100. bool is_virtual;
  101. struct list_head mplane_list;
  102. struct sde_mdss_cfg *catalog;
  103. bool revalidate;
  104. bool xin_halt_forced_clk;
  105. struct sde_csc_cfg csc_cfg;
  106. struct sde_csc_cfg *csc_usr_ptr;
  107. struct sde_csc_cfg *csc_ptr;
  108. const struct sde_sspp_sub_blks *pipe_sblk;
  109. char pipe_name[SDE_NAME_SIZE];
  110. struct msm_property_info property_info;
  111. struct msm_property_data property_data[PLANE_PROP_COUNT];
  112. struct drm_property_blob *blob_info;
  113. struct drm_property_blob *blob_rot_caps;
  114. /* debugfs related stuff */
  115. struct dentry *debugfs_root;
  116. bool debugfs_default_scale;
  117. };
  118. #define to_sde_plane(x) container_of(x, struct sde_plane, base)
  119. static int plane_prop_array[PLANE_PROP_COUNT] = {SDE_PLANE_DIRTY_ALL};
  120. static struct sde_kms *_sde_plane_get_kms(struct drm_plane *plane)
  121. {
  122. struct msm_drm_private *priv;
  123. if (!plane || !plane->dev)
  124. return NULL;
  125. priv = plane->dev->dev_private;
  126. if (!priv)
  127. return NULL;
  128. return to_sde_kms(priv->kms);
  129. }
  130. static struct sde_hw_ctl *_sde_plane_get_hw_ctl(const struct drm_plane *plane)
  131. {
  132. struct drm_plane_state *pstate = NULL;
  133. struct drm_crtc *drm_crtc = NULL;
  134. struct sde_crtc *sde_crtc = NULL;
  135. struct sde_crtc_mixer *mixer = NULL;
  136. struct sde_hw_ctl *ctl = NULL;
  137. if (!plane) {
  138. DRM_ERROR("Invalid plane %pK\n", plane);
  139. return NULL;
  140. }
  141. pstate = plane->state;
  142. if (!pstate) {
  143. DRM_ERROR("Invalid plane state %pK\n", pstate);
  144. return NULL;
  145. }
  146. drm_crtc = pstate->crtc;
  147. if (!drm_crtc) {
  148. DRM_ERROR("Invalid drm_crtc %pK\n", drm_crtc);
  149. return NULL;
  150. }
  151. sde_crtc = to_sde_crtc(drm_crtc);
  152. if (!sde_crtc) {
  153. DRM_ERROR("invalid sde_crtc %pK\n", sde_crtc);
  154. return NULL;
  155. }
  156. /* it will always return the first mixer and single CTL */
  157. mixer = sde_crtc->mixers;
  158. if (!mixer) {
  159. DRM_ERROR("invalid mixer %pK\n", mixer);
  160. return NULL;
  161. }
  162. ctl = mixer->hw_ctl;
  163. if (!mixer) {
  164. DRM_ERROR("invalid ctl %pK\n", ctl);
  165. return NULL;
  166. }
  167. return ctl;
  168. }
  169. static bool sde_plane_enabled(const struct drm_plane_state *state)
  170. {
  171. return state && state->fb && state->crtc;
  172. }
  173. bool sde_plane_is_sec_ui_allowed(struct drm_plane *plane)
  174. {
  175. struct sde_plane *psde;
  176. if (!plane)
  177. return false;
  178. psde = to_sde_plane(plane);
  179. return !(psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI));
  180. }
  181. void sde_plane_setup_src_split_order(struct drm_plane *plane,
  182. enum sde_sspp_multirect_index rect_mode, bool enable)
  183. {
  184. struct sde_plane *psde;
  185. if (!plane)
  186. return;
  187. psde = to_sde_plane(plane);
  188. if (psde->pipe_hw->ops.set_src_split_order)
  189. psde->pipe_hw->ops.set_src_split_order(psde->pipe_hw,
  190. rect_mode, enable);
  191. }
  192. /**
  193. * _sde_plane_calc_fill_level - calculate fill level of the given source format
  194. * @plane: Pointer to drm plane
  195. * @fmt: Pointer to source buffer format
  196. * @src_wdith: width of source buffer
  197. * Return: fill level corresponding to the source buffer/format or 0 if error
  198. */
  199. static inline int _sde_plane_calc_fill_level(struct drm_plane *plane,
  200. const struct sde_format *fmt, u32 src_width)
  201. {
  202. struct sde_plane *psde, *tmp;
  203. struct sde_plane_state *pstate;
  204. u32 fixed_buff_size;
  205. u32 total_fl;
  206. u32 hflip_bytes;
  207. u32 unused_space;
  208. if (!plane || !fmt || !plane->state || !src_width || !fmt->bpp) {
  209. SDE_ERROR("invalid arguments\n");
  210. return 0;
  211. }
  212. psde = to_sde_plane(plane);
  213. if (psde->perf_features & BIT(SDE_PERF_SSPP_QOS_FL_NOCALC))
  214. return 0;
  215. pstate = to_sde_plane_state(plane->state);
  216. fixed_buff_size = psde->pipe_sblk->pixel_ram_size;
  217. list_for_each_entry(tmp, &psde->mplane_list, mplane_list) {
  218. if (!sde_plane_enabled(tmp->base.state))
  219. continue;
  220. SDE_DEBUG("plane%d/%d src_width:%d/%d\n",
  221. psde->base.base.id, tmp->base.base.id,
  222. src_width, tmp->pipe_cfg.src_rect.w);
  223. src_width = max_t(u32, src_width, tmp->pipe_cfg.src_rect.w);
  224. }
  225. if ((pstate->rotation & DRM_MODE_REFLECT_X) &&
  226. SDE_FORMAT_IS_LINEAR(fmt))
  227. hflip_bytes = (src_width + 32) * fmt->bpp;
  228. else
  229. hflip_bytes = 0;
  230. if (fmt->fetch_planes == SDE_PLANE_PSEUDO_PLANAR) {
  231. unused_space = 23 * 128;
  232. if (fmt->chroma_sample == SDE_CHROMA_420) {
  233. /* NV12 */
  234. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  235. unused_space) / ((src_width + 32) * fmt->bpp);
  236. } else {
  237. /* non NV12 */
  238. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  239. unused_space) * 2 / ((src_width + 32) *
  240. fmt->bpp);
  241. }
  242. } else {
  243. unused_space = 6 * 128;
  244. if (pstate->multirect_mode == SDE_SSPP_MULTIRECT_PARALLEL) {
  245. total_fl = (fixed_buff_size / 2 - hflip_bytes -
  246. unused_space) * 2 / ((src_width + 32) *
  247. fmt->bpp);
  248. } else {
  249. total_fl = (fixed_buff_size - hflip_bytes -
  250. unused_space) * 2 / ((src_width + 32) *
  251. fmt->bpp);
  252. }
  253. }
  254. SDE_DEBUG("plane%u: pnum:%d fmt: %4.4s w:%u hf:%d us:%d fl:%u\n",
  255. plane->base.id, psde->pipe - SSPP_VIG0,
  256. (char *)&fmt->base.pixel_format,
  257. src_width, hflip_bytes, unused_space, total_fl);
  258. return total_fl;
  259. }
  260. /**
  261. * _sde_plane_get_qos_lut - get LUT mapping based on fill level
  262. * @tbl: Pointer to LUT table
  263. * @total_fl: fill level
  264. * Return: LUT setting corresponding to the fill level
  265. */
  266. static u64 _sde_plane_get_qos_lut(const struct sde_qos_lut_tbl *tbl,
  267. u32 total_fl)
  268. {
  269. int i;
  270. if (!tbl || !tbl->nentry || !tbl->entries)
  271. return 0;
  272. for (i = 0; i < tbl->nentry; i++)
  273. if (total_fl <= tbl->entries[i].fl)
  274. return tbl->entries[i].lut;
  275. /* if last fl is zero, use as default */
  276. if (!tbl->entries[i-1].fl)
  277. return tbl->entries[i-1].lut;
  278. return 0;
  279. }
  280. /**
  281. * _sde_plane_set_qos_lut - set QoS LUT of the given plane
  282. * @plane: Pointer to drm plane
  283. * @fb: Pointer to framebuffer associated with the given plane
  284. */
  285. static void _sde_plane_set_qos_lut(struct drm_plane *plane,
  286. struct drm_framebuffer *fb)
  287. {
  288. struct sde_plane *psde;
  289. const struct sde_format *fmt = NULL;
  290. u64 qos_lut;
  291. u32 total_fl = 0, lut_usage;
  292. if (!plane || !fb) {
  293. SDE_ERROR("invalid arguments plane %d fb %d\n",
  294. !plane, !fb);
  295. return;
  296. }
  297. psde = to_sde_plane(plane);
  298. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  299. SDE_ERROR("invalid arguments\n");
  300. return;
  301. } else if (!psde->pipe_hw->ops.setup_creq_lut) {
  302. return;
  303. }
  304. if (!psde->is_rt_pipe) {
  305. lut_usage = SDE_QOS_LUT_USAGE_NRT;
  306. } else {
  307. fmt = sde_get_sde_format_ext(
  308. fb->format->format,
  309. fb->modifier);
  310. total_fl = _sde_plane_calc_fill_level(plane, fmt,
  311. psde->pipe_cfg.src_rect.w);
  312. if (fmt && SDE_FORMAT_IS_LINEAR(fmt))
  313. lut_usage = SDE_QOS_LUT_USAGE_LINEAR;
  314. else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  315. psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))
  316. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE_QSEED;
  317. else
  318. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE;
  319. }
  320. qos_lut = _sde_plane_get_qos_lut(
  321. &psde->catalog->perf.qos_lut_tbl[lut_usage], total_fl);
  322. psde->pipe_qos_cfg.creq_lut = qos_lut;
  323. trace_sde_perf_set_qos_luts(psde->pipe - SSPP_VIG0,
  324. (fmt) ? fmt->base.pixel_format : 0,
  325. psde->is_rt_pipe, total_fl, qos_lut, lut_usage);
  326. SDE_DEBUG("plane%u: pnum:%d fmt: %4.4s rt:%d fl:%u lut:0x%llx\n",
  327. plane->base.id,
  328. psde->pipe - SSPP_VIG0,
  329. fmt ? (char *)&fmt->base.pixel_format : NULL,
  330. psde->is_rt_pipe, total_fl, qos_lut);
  331. psde->pipe_hw->ops.setup_creq_lut(psde->pipe_hw, &psde->pipe_qos_cfg);
  332. }
  333. /**
  334. * _sde_plane_set_panic_lut - set danger/safe LUT of the given plane
  335. * @plane: Pointer to drm plane
  336. * @fb: Pointer to framebuffer associated with the given plane
  337. */
  338. static void _sde_plane_set_danger_lut(struct drm_plane *plane,
  339. struct drm_framebuffer *fb)
  340. {
  341. struct sde_plane *psde;
  342. const struct sde_format *fmt = NULL;
  343. u32 danger_lut, safe_lut;
  344. u32 total_fl = 0, lut_usage;
  345. if (!plane || !fb) {
  346. SDE_ERROR("invalid arguments\n");
  347. return;
  348. }
  349. psde = to_sde_plane(plane);
  350. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  351. SDE_ERROR("invalid arguments\n");
  352. return;
  353. } else if (!psde->pipe_hw->ops.setup_danger_safe_lut) {
  354. return;
  355. }
  356. if (!psde->is_rt_pipe) {
  357. danger_lut = psde->catalog->perf.danger_lut_tbl
  358. [SDE_QOS_LUT_USAGE_NRT];
  359. lut_usage = SDE_QOS_LUT_USAGE_NRT;
  360. } else {
  361. fmt = sde_get_sde_format_ext(
  362. fb->format->format,
  363. fb->modifier);
  364. total_fl = _sde_plane_calc_fill_level(plane, fmt,
  365. psde->pipe_cfg.src_rect.w);
  366. if (fmt && SDE_FORMAT_IS_LINEAR(fmt)) {
  367. danger_lut = psde->catalog->perf.danger_lut_tbl
  368. [SDE_QOS_LUT_USAGE_LINEAR];
  369. lut_usage = SDE_QOS_LUT_USAGE_LINEAR;
  370. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  371. danger_lut = psde->catalog->perf.danger_lut_tbl
  372. [SDE_QOS_LUT_USAGE_MACROTILE_QSEED];
  373. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE_QSEED;
  374. } else {
  375. danger_lut = psde->catalog->perf.danger_lut_tbl
  376. [SDE_QOS_LUT_USAGE_MACROTILE];
  377. lut_usage = SDE_QOS_LUT_USAGE_MACROTILE;
  378. }
  379. }
  380. safe_lut = (u32) _sde_plane_get_qos_lut(
  381. &psde->catalog->perf.sfe_lut_tbl[lut_usage], total_fl);
  382. psde->pipe_qos_cfg.danger_lut = danger_lut;
  383. psde->pipe_qos_cfg.safe_lut = safe_lut;
  384. trace_sde_perf_set_danger_luts(psde->pipe - SSPP_VIG0,
  385. (fmt) ? fmt->base.pixel_format : 0,
  386. (fmt) ? fmt->fetch_mode : 0,
  387. psde->pipe_qos_cfg.danger_lut,
  388. psde->pipe_qos_cfg.safe_lut);
  389. SDE_DEBUG("plane%u: pnum:%d fmt:%4.4s mode:%d fl:%d luts[0x%x,0x%x]\n",
  390. plane->base.id,
  391. psde->pipe - SSPP_VIG0,
  392. fmt ? (char *)&fmt->base.pixel_format : NULL,
  393. fmt ? fmt->fetch_mode : -1, total_fl,
  394. psde->pipe_qos_cfg.danger_lut,
  395. psde->pipe_qos_cfg.safe_lut);
  396. psde->pipe_hw->ops.setup_danger_safe_lut(psde->pipe_hw,
  397. &psde->pipe_qos_cfg);
  398. }
  399. /**
  400. * _sde_plane_set_qos_ctrl - set QoS control of the given plane
  401. * @plane: Pointer to drm plane
  402. * @enable: true to enable QoS control
  403. * @flags: QoS control mode (enum sde_plane_qos)
  404. */
  405. static void _sde_plane_set_qos_ctrl(struct drm_plane *plane,
  406. bool enable, u32 flags)
  407. {
  408. struct sde_plane *psde;
  409. if (!plane) {
  410. SDE_ERROR("invalid arguments\n");
  411. return;
  412. }
  413. psde = to_sde_plane(plane);
  414. if (!psde->pipe_hw || !psde->pipe_sblk) {
  415. SDE_ERROR("invalid arguments\n");
  416. return;
  417. } else if (!psde->pipe_hw->ops.setup_qos_ctrl) {
  418. return;
  419. }
  420. if (flags & SDE_PLANE_QOS_VBLANK_CTRL) {
  421. psde->pipe_qos_cfg.creq_vblank = psde->pipe_sblk->creq_vblank;
  422. psde->pipe_qos_cfg.danger_vblank =
  423. psde->pipe_sblk->danger_vblank;
  424. psde->pipe_qos_cfg.vblank_en = enable;
  425. }
  426. if (flags & SDE_PLANE_QOS_VBLANK_AMORTIZE) {
  427. /* this feature overrules previous VBLANK_CTRL */
  428. psde->pipe_qos_cfg.vblank_en = false;
  429. psde->pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
  430. }
  431. if (flags & SDE_PLANE_QOS_PANIC_CTRL)
  432. psde->pipe_qos_cfg.danger_safe_en = enable;
  433. if (!psde->is_rt_pipe) {
  434. psde->pipe_qos_cfg.vblank_en = false;
  435. psde->pipe_qos_cfg.danger_safe_en = false;
  436. }
  437. SDE_DEBUG("plane%u: pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n",
  438. plane->base.id,
  439. psde->pipe - SSPP_VIG0,
  440. psde->pipe_qos_cfg.danger_safe_en,
  441. psde->pipe_qos_cfg.vblank_en,
  442. psde->pipe_qos_cfg.creq_vblank,
  443. psde->pipe_qos_cfg.danger_vblank,
  444. psde->is_rt_pipe);
  445. psde->pipe_hw->ops.setup_qos_ctrl(psde->pipe_hw,
  446. &psde->pipe_qos_cfg);
  447. }
  448. void sde_plane_set_revalidate(struct drm_plane *plane, bool enable)
  449. {
  450. struct sde_plane *psde;
  451. if (!plane)
  452. return;
  453. psde = to_sde_plane(plane);
  454. psde->revalidate = enable;
  455. }
  456. int sde_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
  457. {
  458. struct sde_plane *psde;
  459. int rc;
  460. if (!plane) {
  461. SDE_ERROR("invalid arguments\n");
  462. return -EINVAL;
  463. }
  464. psde = to_sde_plane(plane);
  465. if (!psde->is_rt_pipe)
  466. goto end;
  467. rc = pm_runtime_get_sync(plane->dev->dev);
  468. if (rc < 0) {
  469. SDE_ERROR("failed to enable power resource %d\n", rc);
  470. SDE_EVT32(rc, SDE_EVTLOG_ERROR);
  471. return rc;
  472. }
  473. _sde_plane_set_qos_ctrl(plane, enable, SDE_PLANE_QOS_PANIC_CTRL);
  474. pm_runtime_put_sync(plane->dev->dev);
  475. end:
  476. return 0;
  477. }
  478. /**
  479. * _sde_plane_set_ot_limit - set OT limit for the given plane
  480. * @plane: Pointer to drm plane
  481. * @crtc: Pointer to drm crtc
  482. */
  483. static void _sde_plane_set_ot_limit(struct drm_plane *plane,
  484. struct drm_crtc *crtc)
  485. {
  486. struct sde_plane *psde;
  487. struct sde_vbif_set_ot_params ot_params;
  488. struct msm_drm_private *priv;
  489. struct sde_kms *sde_kms;
  490. if (!plane || !plane->dev || !crtc) {
  491. SDE_ERROR("invalid arguments plane %d crtc %d\n",
  492. !plane, !crtc);
  493. return;
  494. }
  495. priv = plane->dev->dev_private;
  496. if (!priv || !priv->kms) {
  497. SDE_ERROR("invalid KMS reference\n");
  498. return;
  499. }
  500. sde_kms = to_sde_kms(priv->kms);
  501. psde = to_sde_plane(plane);
  502. if (!psde->pipe_hw) {
  503. SDE_ERROR("invalid pipe reference\n");
  504. return;
  505. }
  506. memset(&ot_params, 0, sizeof(ot_params));
  507. ot_params.xin_id = psde->pipe_hw->cap->xin_id;
  508. ot_params.num = psde->pipe_hw->idx - SSPP_NONE;
  509. ot_params.width = psde->pipe_cfg.src_rect.w;
  510. ot_params.height = psde->pipe_cfg.src_rect.h;
  511. ot_params.is_wfd = !psde->is_rt_pipe;
  512. ot_params.frame_rate = crtc->mode.vrefresh;
  513. ot_params.vbif_idx = VBIF_RT;
  514. ot_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  515. ot_params.rd = true;
  516. sde_vbif_set_ot_limit(sde_kms, &ot_params);
  517. }
  518. /**
  519. * _sde_plane_set_vbif_qos - set vbif QoS for the given plane
  520. * @plane: Pointer to drm plane
  521. * @force: Force update of vbif QoS
  522. */
  523. static void _sde_plane_set_qos_remap(struct drm_plane *plane, bool force)
  524. {
  525. struct sde_plane *psde;
  526. struct sde_vbif_set_qos_params qos_params;
  527. struct msm_drm_private *priv;
  528. struct sde_kms *sde_kms;
  529. if (!plane || !plane->dev) {
  530. SDE_ERROR("invalid arguments\n");
  531. return;
  532. }
  533. priv = plane->dev->dev_private;
  534. if (!priv || !priv->kms) {
  535. SDE_ERROR("invalid KMS reference\n");
  536. return;
  537. }
  538. sde_kms = to_sde_kms(priv->kms);
  539. psde = to_sde_plane(plane);
  540. if (!psde->pipe_hw) {
  541. SDE_ERROR("invalid pipe reference\n");
  542. return;
  543. }
  544. memset(&qos_params, 0, sizeof(qos_params));
  545. qos_params.vbif_idx = VBIF_RT;
  546. qos_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  547. qos_params.xin_id = psde->pipe_hw->cap->xin_id;
  548. qos_params.num = psde->pipe_hw->idx - SSPP_VIG0;
  549. qos_params.client_type = psde->is_rt_pipe ?
  550. VBIF_RT_CLIENT : VBIF_NRT_CLIENT;
  551. if (!force && !memcmp(&qos_params, &psde->cached_qos_params,
  552. sizeof(struct sde_vbif_set_qos_params))) {
  553. return;
  554. }
  555. SDE_DEBUG("changes in vbif QoS parameters, remap it\n");
  556. memcpy(&psde->cached_qos_params, &qos_params,
  557. sizeof(struct sde_vbif_set_qos_params));
  558. SDE_DEBUG("plane%d pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
  559. plane->base.id, qos_params.num,
  560. qos_params.vbif_idx,
  561. qos_params.xin_id, qos_params.client_type,
  562. qos_params.clk_ctrl);
  563. sde_vbif_set_qos_remap(sde_kms, &qos_params);
  564. }
  565. /**
  566. * _sde_plane_set_ts_prefill - set prefill with traffic shaper
  567. * @plane: Pointer to drm plane
  568. * @pstate: Pointer to sde plane state
  569. */
  570. static void _sde_plane_set_ts_prefill(struct drm_plane *plane,
  571. struct sde_plane_state *pstate)
  572. {
  573. struct sde_plane *psde;
  574. struct sde_hw_pipe_ts_cfg cfg;
  575. struct msm_drm_private *priv;
  576. struct sde_kms *sde_kms;
  577. if (!plane || !plane->dev) {
  578. SDE_ERROR("invalid arguments");
  579. return;
  580. }
  581. priv = plane->dev->dev_private;
  582. if (!priv || !priv->kms) {
  583. SDE_ERROR("invalid KMS reference\n");
  584. return;
  585. }
  586. sde_kms = to_sde_kms(priv->kms);
  587. psde = to_sde_plane(plane);
  588. if (!psde->pipe_hw) {
  589. SDE_ERROR("invalid pipe reference\n");
  590. return;
  591. }
  592. if (!psde->pipe_hw || !psde->pipe_hw->ops.setup_ts_prefill)
  593. return;
  594. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_VBLANK_AMORTIZE);
  595. memset(&cfg, 0, sizeof(cfg));
  596. cfg.size = sde_plane_get_property(pstate,
  597. PLANE_PROP_PREFILL_SIZE);
  598. cfg.time = sde_plane_get_property(pstate,
  599. PLANE_PROP_PREFILL_TIME);
  600. SDE_DEBUG("plane%d size:%llu time:%llu\n",
  601. plane->base.id, cfg.size, cfg.time);
  602. SDE_EVT32_VERBOSE(DRMID(plane), cfg.size, cfg.time);
  603. psde->pipe_hw->ops.setup_ts_prefill(psde->pipe_hw, &cfg,
  604. pstate->multirect_index);
  605. }
  606. /* helper to update a state's input fence pointer from the property */
  607. static void _sde_plane_set_input_fence(struct sde_plane *psde,
  608. struct sde_plane_state *pstate, uint64_t fd)
  609. {
  610. if (!psde || !pstate) {
  611. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  612. !psde, !pstate);
  613. return;
  614. }
  615. /* clear previous reference */
  616. if (pstate->input_fence)
  617. sde_sync_put(pstate->input_fence);
  618. /* get fence pointer for later */
  619. if (fd == 0)
  620. pstate->input_fence = NULL;
  621. else
  622. pstate->input_fence = sde_sync_get(fd);
  623. SDE_DEBUG_PLANE(psde, "0x%llX\n", fd);
  624. }
  625. int sde_plane_wait_input_fence(struct drm_plane *plane, uint32_t wait_ms)
  626. {
  627. struct sde_plane *psde;
  628. struct sde_plane_state *pstate;
  629. uint32_t prefix;
  630. void *input_fence;
  631. int ret = -EINVAL;
  632. signed long rc;
  633. if (!plane) {
  634. SDE_ERROR("invalid plane\n");
  635. } else if (!plane->state) {
  636. SDE_ERROR_PLANE(to_sde_plane(plane), "invalid state\n");
  637. } else {
  638. psde = to_sde_plane(plane);
  639. pstate = to_sde_plane_state(plane->state);
  640. input_fence = pstate->input_fence;
  641. if (input_fence) {
  642. prefix = sde_sync_get_name_prefix(input_fence);
  643. rc = sde_sync_wait(input_fence, wait_ms);
  644. switch (rc) {
  645. case 0:
  646. SDE_ERROR_PLANE(psde, "%ums timeout on %08X fd %d\n",
  647. wait_ms, prefix, sde_plane_get_property(pstate,
  648. PLANE_PROP_INPUT_FENCE));
  649. psde->is_error = true;
  650. sde_kms_timeline_status(plane->dev);
  651. ret = -ETIMEDOUT;
  652. break;
  653. case -ERESTARTSYS:
  654. SDE_ERROR_PLANE(psde,
  655. "%ums wait interrupted on %08X\n",
  656. wait_ms, prefix);
  657. psde->is_error = true;
  658. ret = -ERESTARTSYS;
  659. break;
  660. case -EINVAL:
  661. SDE_ERROR_PLANE(psde,
  662. "invalid fence param for %08X\n",
  663. prefix);
  664. psde->is_error = true;
  665. ret = -EINVAL;
  666. break;
  667. default:
  668. SDE_DEBUG_PLANE(psde, "signaled\n");
  669. ret = 0;
  670. break;
  671. }
  672. SDE_EVT32_VERBOSE(DRMID(plane), -ret, prefix);
  673. } else {
  674. ret = 0;
  675. }
  676. }
  677. return ret;
  678. }
  679. /**
  680. * _sde_plane_get_aspace: gets the address space based on the
  681. * fb_translation mode property
  682. */
  683. static int _sde_plane_get_aspace(
  684. struct sde_plane *psde,
  685. struct sde_plane_state *pstate,
  686. struct msm_gem_address_space **aspace)
  687. {
  688. struct sde_kms *kms;
  689. int mode;
  690. if (!psde || !pstate || !aspace) {
  691. SDE_ERROR("invalid parameters\n");
  692. return -EINVAL;
  693. }
  694. kms = _sde_plane_get_kms(&psde->base);
  695. if (!kms) {
  696. SDE_ERROR("invalid kms\n");
  697. return -EINVAL;
  698. }
  699. mode = sde_plane_get_property(pstate,
  700. PLANE_PROP_FB_TRANSLATION_MODE);
  701. switch (mode) {
  702. case SDE_DRM_FB_NON_SEC:
  703. *aspace = kms->aspace[MSM_SMMU_DOMAIN_UNSECURE];
  704. if (!aspace)
  705. return -EINVAL;
  706. break;
  707. case SDE_DRM_FB_SEC:
  708. *aspace = kms->aspace[MSM_SMMU_DOMAIN_SECURE];
  709. if (!aspace)
  710. return -EINVAL;
  711. break;
  712. case SDE_DRM_FB_SEC_DIR_TRANS:
  713. *aspace = NULL;
  714. break;
  715. default:
  716. SDE_ERROR("invalid fb_translation mode:%d\n", mode);
  717. return -EFAULT;
  718. }
  719. return 0;
  720. }
  721. static inline void _sde_plane_set_scanout(struct drm_plane *plane,
  722. struct sde_plane_state *pstate,
  723. struct sde_hw_pipe_cfg *pipe_cfg,
  724. struct drm_framebuffer *fb)
  725. {
  726. struct sde_plane *psde;
  727. struct msm_gem_address_space *aspace = NULL;
  728. int ret, mode;
  729. bool secure = false;
  730. if (!plane || !pstate || !pipe_cfg || !fb) {
  731. SDE_ERROR(
  732. "invalid arg(s), plane %d state %d cfg %d fb %d\n",
  733. !plane, !pstate, !pipe_cfg, !fb);
  734. return;
  735. }
  736. psde = to_sde_plane(plane);
  737. if (!psde->pipe_hw) {
  738. SDE_ERROR_PLANE(psde, "invalid pipe_hw\n");
  739. return;
  740. }
  741. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  742. if (ret) {
  743. SDE_ERROR_PLANE(psde, "Failed to get aspace %d\n", ret);
  744. return;
  745. }
  746. /*
  747. * framebuffer prepare is deferred for prepare_fb calls that
  748. * happen during the transition from secure to non-secure.
  749. * Handle the prepare at this point for such cases. This can be
  750. * expected for one or two frames during the transition.
  751. */
  752. if (aspace && pstate->defer_prepare_fb) {
  753. SDE_EVT32(DRMID(plane), psde->pipe, aspace->domain_attached);
  754. ret = msm_framebuffer_prepare(fb, pstate->aspace);
  755. if (ret) {
  756. SDE_ERROR_PLANE(psde,
  757. "failed to prepare framebuffer %d\n", ret);
  758. return;
  759. }
  760. pstate->defer_prepare_fb = false;
  761. }
  762. mode = sde_plane_get_property(pstate, PLANE_PROP_FB_TRANSLATION_MODE);
  763. if ((mode == SDE_DRM_FB_SEC) || (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  764. secure = true;
  765. ret = sde_format_populate_layout(aspace, fb, &pipe_cfg->layout);
  766. if (ret == -EAGAIN)
  767. SDE_DEBUG_PLANE(psde, "not updating same src addrs\n");
  768. else if (ret) {
  769. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  770. /*
  771. * Force solid fill color on error. This is to prevent
  772. * smmu faults during secure session transition.
  773. */
  774. psde->is_error = true;
  775. } else if (psde->pipe_hw->ops.setup_sourceaddress) {
  776. SDE_EVT32_VERBOSE(psde->pipe_hw->idx,
  777. pipe_cfg->layout.width,
  778. pipe_cfg->layout.height,
  779. pipe_cfg->layout.plane_addr[0],
  780. pipe_cfg->layout.plane_size[0],
  781. pipe_cfg->layout.plane_addr[1],
  782. pipe_cfg->layout.plane_size[1],
  783. pipe_cfg->layout.plane_addr[2],
  784. pipe_cfg->layout.plane_size[2],
  785. pipe_cfg->layout.plane_addr[3],
  786. pipe_cfg->layout.plane_size[3],
  787. pstate->multirect_index,
  788. secure);
  789. psde->pipe_hw->ops.setup_sourceaddress(psde->pipe_hw, pipe_cfg,
  790. pstate->multirect_index);
  791. }
  792. }
  793. static int _sde_plane_setup_scaler3_lut(struct sde_plane *psde,
  794. struct sde_plane_state *pstate)
  795. {
  796. struct sde_hw_scaler3_cfg *cfg;
  797. int ret = 0;
  798. if (!psde || !pstate) {
  799. SDE_ERROR("invalid args\n");
  800. return -EINVAL;
  801. }
  802. cfg = &pstate->scaler3_cfg;
  803. cfg->dir_lut = msm_property_get_blob(
  804. &psde->property_info,
  805. &pstate->property_state, &cfg->dir_len,
  806. PLANE_PROP_SCALER_LUT_ED);
  807. cfg->cir_lut = msm_property_get_blob(
  808. &psde->property_info,
  809. &pstate->property_state, &cfg->cir_len,
  810. PLANE_PROP_SCALER_LUT_CIR);
  811. cfg->sep_lut = msm_property_get_blob(
  812. &psde->property_info,
  813. &pstate->property_state, &cfg->sep_len,
  814. PLANE_PROP_SCALER_LUT_SEP);
  815. if (!cfg->dir_lut || !cfg->cir_lut || !cfg->sep_lut)
  816. ret = -ENODATA;
  817. return ret;
  818. }
  819. static int _sde_plane_setup_scaler3lite_lut(struct sde_plane *psde,
  820. struct sde_plane_state *pstate)
  821. {
  822. struct sde_hw_scaler3_cfg *cfg;
  823. cfg = &pstate->scaler3_cfg;
  824. cfg->sep_lut = msm_property_get_blob(
  825. &psde->property_info,
  826. &pstate->property_state, &cfg->sep_len,
  827. PLANE_PROP_SCALER_LUT_SEP);
  828. return cfg->sep_lut ? 0 : -ENODATA;
  829. }
  830. static void _sde_plane_setup_scaler3(struct sde_plane *psde,
  831. struct sde_plane_state *pstate, const struct sde_format *fmt,
  832. uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
  833. {
  834. uint32_t decimated, i, src_w, src_h, dst_w, dst_h;
  835. struct sde_hw_scaler3_cfg *scale_cfg;
  836. if (!psde || !pstate || !fmt ||
  837. !chroma_subsmpl_h || !chroma_subsmpl_v) {
  838. SDE_ERROR("psde %d pstate %d fmt %d smp_h %d smp_v %d\n",
  839. !!psde, !!pstate, !!fmt, chroma_subsmpl_h,
  840. chroma_subsmpl_v);
  841. return;
  842. }
  843. scale_cfg = &pstate->scaler3_cfg;
  844. src_w = psde->pipe_cfg.src_rect.w;
  845. src_h = psde->pipe_cfg.src_rect.h;
  846. dst_w = psde->pipe_cfg.dst_rect.w;
  847. dst_h = psde->pipe_cfg.dst_rect.h;
  848. memset(scale_cfg, 0, sizeof(*scale_cfg));
  849. memset(&pstate->pixel_ext, 0, sizeof(struct sde_hw_pixel_ext));
  850. /*
  851. * For inline rotation cases, scaler config is post-rotation,
  852. * so swap the dimensions here. However, pixel extension will
  853. * need pre-rotation settings, this will be corrected below
  854. * when calculating pixel extension settings.
  855. */
  856. if (pstate->rotation & DRM_MODE_ROTATE_90)
  857. swap(src_w, src_h);
  858. decimated = DECIMATED_DIMENSION(src_w,
  859. psde->pipe_cfg.horz_decimation);
  860. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] =
  861. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_w);
  862. decimated = DECIMATED_DIMENSION(src_h,
  863. psde->pipe_cfg.vert_decimation);
  864. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] =
  865. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_h);
  866. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2] =
  867. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] / chroma_subsmpl_v;
  868. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2] =
  869. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] / chroma_subsmpl_h;
  870. scale_cfg->phase_step_x[SDE_SSPP_COMP_2] =
  871. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2];
  872. scale_cfg->phase_step_y[SDE_SSPP_COMP_2] =
  873. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2];
  874. scale_cfg->phase_step_x[SDE_SSPP_COMP_3] =
  875. scale_cfg->phase_step_x[SDE_SSPP_COMP_0];
  876. scale_cfg->phase_step_y[SDE_SSPP_COMP_3] =
  877. scale_cfg->phase_step_y[SDE_SSPP_COMP_0];
  878. for (i = 0; i < SDE_MAX_PLANES; i++) {
  879. scale_cfg->src_width[i] = DECIMATED_DIMENSION(src_w,
  880. psde->pipe_cfg.horz_decimation);
  881. scale_cfg->src_height[i] = DECIMATED_DIMENSION(src_h,
  882. psde->pipe_cfg.vert_decimation);
  883. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2) {
  884. scale_cfg->src_width[i] /= chroma_subsmpl_h;
  885. scale_cfg->src_height[i] /= chroma_subsmpl_v;
  886. }
  887. scale_cfg->preload_x[i] = psde->pipe_sblk->scaler_blk.h_preload;
  888. scale_cfg->preload_y[i] = psde->pipe_sblk->scaler_blk.v_preload;
  889. /* For pixel extension we need the pre-rotated orientation */
  890. if (pstate->rotation & DRM_MODE_ROTATE_90) {
  891. pstate->pixel_ext.num_ext_pxls_top[i] =
  892. scale_cfg->src_width[i];
  893. pstate->pixel_ext.num_ext_pxls_left[i] =
  894. scale_cfg->src_height[i];
  895. } else {
  896. pstate->pixel_ext.num_ext_pxls_top[i] =
  897. scale_cfg->src_height[i];
  898. pstate->pixel_ext.num_ext_pxls_left[i] =
  899. scale_cfg->src_width[i];
  900. }
  901. }
  902. if ((!(SDE_FORMAT_IS_YUV(fmt)) && (src_h == dst_h)
  903. && (src_w == dst_w)) || pstate->multirect_mode)
  904. return;
  905. SDE_DEBUG_PLANE(psde,
  906. "setting bilinear: src:%dx%d dst:%dx%d chroma:%dx%d fmt:%x\n",
  907. src_w, src_h, dst_w, dst_h,
  908. chroma_subsmpl_v, chroma_subsmpl_h,
  909. fmt->base.pixel_format);
  910. scale_cfg->dst_width = dst_w;
  911. scale_cfg->dst_height = dst_h;
  912. scale_cfg->y_rgb_filter_cfg = SDE_SCALE_BIL;
  913. scale_cfg->uv_filter_cfg = SDE_SCALE_BIL;
  914. scale_cfg->alpha_filter_cfg = SDE_SCALE_ALPHA_BIL;
  915. scale_cfg->lut_flag = 0;
  916. scale_cfg->blend_cfg = 1;
  917. scale_cfg->enable = 1;
  918. scale_cfg->dyn_exp_disabled = SDE_QSEED_DEFAULT_DYN_EXP;
  919. }
  920. /**
  921. * _sde_plane_setup_scaler2 - determine default scaler phase steps/filter type
  922. * @psde: Pointer to SDE plane object
  923. * @src: Source size
  924. * @dst: Destination size
  925. * @phase_steps: Pointer to output array for phase steps
  926. * @filter: Pointer to output array for filter type
  927. * @fmt: Pointer to format definition
  928. * @chroma_subsampling: Subsampling amount for chroma channel
  929. *
  930. * Returns: 0 on success
  931. */
  932. static int _sde_plane_setup_scaler2(struct sde_plane *psde,
  933. uint32_t src, uint32_t dst, uint32_t *phase_steps,
  934. enum sde_hw_filter *filter, const struct sde_format *fmt,
  935. uint32_t chroma_subsampling)
  936. {
  937. if (!psde || !phase_steps || !filter || !fmt) {
  938. SDE_ERROR(
  939. "invalid arg(s), plane %d phase %d filter %d fmt %d\n",
  940. !psde, !phase_steps, !filter, !fmt);
  941. return -EINVAL;
  942. }
  943. /* calculate phase steps, leave init phase as zero */
  944. phase_steps[SDE_SSPP_COMP_0] =
  945. mult_frac(1 << PHASE_STEP_SHIFT, src, dst);
  946. phase_steps[SDE_SSPP_COMP_1_2] =
  947. phase_steps[SDE_SSPP_COMP_0] / chroma_subsampling;
  948. phase_steps[SDE_SSPP_COMP_2] = phase_steps[SDE_SSPP_COMP_1_2];
  949. phase_steps[SDE_SSPP_COMP_3] = phase_steps[SDE_SSPP_COMP_0];
  950. /* calculate scaler config, if necessary */
  951. if (SDE_FORMAT_IS_YUV(fmt) || src != dst) {
  952. filter[SDE_SSPP_COMP_3] =
  953. (src <= dst) ? SDE_SCALE_FILTER_BIL :
  954. SDE_SCALE_FILTER_PCMN;
  955. if (SDE_FORMAT_IS_YUV(fmt)) {
  956. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_CA;
  957. filter[SDE_SSPP_COMP_1_2] = filter[SDE_SSPP_COMP_3];
  958. } else {
  959. filter[SDE_SSPP_COMP_0] = filter[SDE_SSPP_COMP_3];
  960. filter[SDE_SSPP_COMP_1_2] =
  961. SDE_SCALE_FILTER_NEAREST;
  962. }
  963. } else {
  964. /* disable scaler */
  965. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_MAX;
  966. filter[SDE_SSPP_COMP_1_2] = SDE_SCALE_FILTER_MAX;
  967. filter[SDE_SSPP_COMP_3] = SDE_SCALE_FILTER_MAX;
  968. }
  969. return 0;
  970. }
  971. /**
  972. * _sde_plane_setup_pixel_ext - determine default pixel extension values
  973. * @psde: Pointer to SDE plane object
  974. * @src: Source size
  975. * @dst: Destination size
  976. * @decimated_src: Source size after decimation, if any
  977. * @phase_steps: Pointer to output array for phase steps
  978. * @out_src: Output array for pixel extension values
  979. * @out_edge1: Output array for pixel extension first edge
  980. * @out_edge2: Output array for pixel extension second edge
  981. * @filter: Pointer to array for filter type
  982. * @fmt: Pointer to format definition
  983. * @chroma_subsampling: Subsampling amount for chroma channel
  984. * @post_compare: Whether to chroma subsampled source size for comparisions
  985. */
  986. static void _sde_plane_setup_pixel_ext(struct sde_plane *psde,
  987. uint32_t src, uint32_t dst, uint32_t decimated_src,
  988. uint32_t *phase_steps, uint32_t *out_src, int *out_edge1,
  989. int *out_edge2, enum sde_hw_filter *filter,
  990. const struct sde_format *fmt, uint32_t chroma_subsampling,
  991. bool post_compare)
  992. {
  993. int64_t edge1, edge2, caf;
  994. uint32_t src_work;
  995. int i, tmp;
  996. if (psde && phase_steps && out_src && out_edge1 &&
  997. out_edge2 && filter && fmt) {
  998. /* handle CAF for YUV formats */
  999. if (SDE_FORMAT_IS_YUV(fmt) && *filter == SDE_SCALE_FILTER_CA)
  1000. caf = PHASE_STEP_UNIT_SCALE;
  1001. else
  1002. caf = 0;
  1003. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1004. src_work = decimated_src;
  1005. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2)
  1006. src_work /= chroma_subsampling;
  1007. if (post_compare)
  1008. src = src_work;
  1009. if (!SDE_FORMAT_IS_YUV(fmt) && (src == dst)) {
  1010. /* unity */
  1011. edge1 = 0;
  1012. edge2 = 0;
  1013. } else if (dst >= src) {
  1014. /* upscale */
  1015. edge1 = (1 << PHASE_RESIDUAL);
  1016. edge1 -= caf;
  1017. edge2 = (1 << PHASE_RESIDUAL);
  1018. edge2 += (dst - 1) * *(phase_steps + i);
  1019. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  1020. edge2 += caf;
  1021. edge2 = -(edge2);
  1022. } else {
  1023. /* downscale */
  1024. edge1 = 0;
  1025. edge2 = (dst - 1) * *(phase_steps + i);
  1026. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  1027. edge2 += *(phase_steps + i);
  1028. edge2 = -(edge2);
  1029. }
  1030. /* only enable CAF for luma plane */
  1031. caf = 0;
  1032. /* populate output arrays */
  1033. *(out_src + i) = src_work;
  1034. /* edge updates taken from __pxl_extn_helper */
  1035. if (edge1 >= 0) {
  1036. tmp = (uint32_t)edge1;
  1037. tmp >>= PHASE_STEP_SHIFT;
  1038. *(out_edge1 + i) = -tmp;
  1039. } else {
  1040. tmp = (uint32_t)(-edge1);
  1041. *(out_edge1 + i) =
  1042. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  1043. PHASE_STEP_SHIFT;
  1044. }
  1045. if (edge2 >= 0) {
  1046. tmp = (uint32_t)edge2;
  1047. tmp >>= PHASE_STEP_SHIFT;
  1048. *(out_edge2 + i) = -tmp;
  1049. } else {
  1050. tmp = (uint32_t)(-edge2);
  1051. *(out_edge2 + i) =
  1052. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  1053. PHASE_STEP_SHIFT;
  1054. }
  1055. }
  1056. }
  1057. }
  1058. static inline void _sde_plane_setup_csc(struct sde_plane *psde)
  1059. {
  1060. static const struct sde_csc_cfg sde_csc_YUV2RGB_601L = {
  1061. {
  1062. /* S15.16 format */
  1063. 0x00012A00, 0x00000000, 0x00019880,
  1064. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  1065. 0x00012A00, 0x00020480, 0x00000000,
  1066. },
  1067. /* signed bias */
  1068. { 0xfff0, 0xff80, 0xff80,},
  1069. { 0x0, 0x0, 0x0,},
  1070. /* unsigned clamp */
  1071. { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
  1072. { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,},
  1073. };
  1074. static const struct sde_csc_cfg sde_csc10_YUV2RGB_601L = {
  1075. {
  1076. /* S15.16 format */
  1077. 0x00012A00, 0x00000000, 0x00019880,
  1078. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  1079. 0x00012A00, 0x00020480, 0x00000000,
  1080. },
  1081. /* signed bias */
  1082. { 0xffc0, 0xfe00, 0xfe00,},
  1083. { 0x0, 0x0, 0x0,},
  1084. /* unsigned clamp */
  1085. { 0x40, 0x3ac, 0x40, 0x3c0, 0x40, 0x3c0,},
  1086. { 0x00, 0x3ff, 0x00, 0x3ff, 0x00, 0x3ff,},
  1087. };
  1088. if (!psde) {
  1089. SDE_ERROR("invalid plane\n");
  1090. return;
  1091. }
  1092. /* revert to kernel default if override not available */
  1093. if (psde->csc_usr_ptr)
  1094. psde->csc_ptr = psde->csc_usr_ptr;
  1095. else if (BIT(SDE_SSPP_CSC_10BIT) & psde->features)
  1096. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc10_YUV2RGB_601L;
  1097. else
  1098. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc_YUV2RGB_601L;
  1099. SDE_DEBUG_PLANE(psde, "using 0x%X 0x%X 0x%X...\n",
  1100. psde->csc_ptr->csc_mv[0],
  1101. psde->csc_ptr->csc_mv[1],
  1102. psde->csc_ptr->csc_mv[2]);
  1103. }
  1104. static void sde_color_process_plane_setup(struct drm_plane *plane)
  1105. {
  1106. struct sde_plane *psde;
  1107. struct sde_plane_state *pstate;
  1108. uint32_t hue, saturation, value, contrast;
  1109. struct drm_msm_memcol *memcol = NULL;
  1110. struct drm_msm_3d_gamut *vig_gamut = NULL;
  1111. struct drm_msm_igc_lut *igc = NULL;
  1112. struct drm_msm_pgc_lut *gc = NULL;
  1113. size_t memcol_sz = 0, size = 0;
  1114. struct sde_hw_cp_cfg hw_cfg = {};
  1115. struct sde_hw_ctl *ctl = _sde_plane_get_hw_ctl(plane);
  1116. psde = to_sde_plane(plane);
  1117. pstate = to_sde_plane_state(plane->state);
  1118. hue = (uint32_t) sde_plane_get_property(pstate, PLANE_PROP_HUE_ADJUST);
  1119. if (psde->pipe_hw->ops.setup_pa_hue)
  1120. psde->pipe_hw->ops.setup_pa_hue(psde->pipe_hw, &hue);
  1121. saturation = (uint32_t) sde_plane_get_property(pstate,
  1122. PLANE_PROP_SATURATION_ADJUST);
  1123. if (psde->pipe_hw->ops.setup_pa_sat)
  1124. psde->pipe_hw->ops.setup_pa_sat(psde->pipe_hw, &saturation);
  1125. value = (uint32_t) sde_plane_get_property(pstate,
  1126. PLANE_PROP_VALUE_ADJUST);
  1127. if (psde->pipe_hw->ops.setup_pa_val)
  1128. psde->pipe_hw->ops.setup_pa_val(psde->pipe_hw, &value);
  1129. contrast = (uint32_t) sde_plane_get_property(pstate,
  1130. PLANE_PROP_CONTRAST_ADJUST);
  1131. if (psde->pipe_hw->ops.setup_pa_cont)
  1132. psde->pipe_hw->ops.setup_pa_cont(psde->pipe_hw, &contrast);
  1133. if (psde->pipe_hw->ops.setup_pa_memcolor) {
  1134. /* Skin memory color setup */
  1135. memcol = msm_property_get_blob(&psde->property_info,
  1136. &pstate->property_state,
  1137. &memcol_sz,
  1138. PLANE_PROP_SKIN_COLOR);
  1139. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1140. MEMCOLOR_SKIN, memcol);
  1141. /* Sky memory color setup */
  1142. memcol = msm_property_get_blob(&psde->property_info,
  1143. &pstate->property_state,
  1144. &memcol_sz,
  1145. PLANE_PROP_SKY_COLOR);
  1146. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1147. MEMCOLOR_SKY, memcol);
  1148. /* Foliage memory color setup */
  1149. memcol = msm_property_get_blob(&psde->property_info,
  1150. &pstate->property_state,
  1151. &memcol_sz,
  1152. PLANE_PROP_FOLIAGE_COLOR);
  1153. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1154. MEMCOLOR_FOLIAGE, memcol);
  1155. }
  1156. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_GAMUT &&
  1157. psde->pipe_hw->ops.setup_vig_gamut) {
  1158. vig_gamut = msm_property_get_blob(&psde->property_info,
  1159. &pstate->property_state,
  1160. &size,
  1161. PLANE_PROP_VIG_GAMUT);
  1162. hw_cfg.last_feature = 0;
  1163. hw_cfg.ctl = ctl;
  1164. hw_cfg.len = sizeof(struct drm_msm_3d_gamut);
  1165. hw_cfg.payload = vig_gamut;
  1166. psde->pipe_hw->ops.setup_vig_gamut(psde->pipe_hw, &hw_cfg);
  1167. }
  1168. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_IGC &&
  1169. psde->pipe_hw->ops.setup_vig_igc) {
  1170. igc = msm_property_get_blob(&psde->property_info,
  1171. &pstate->property_state,
  1172. &size,
  1173. PLANE_PROP_VIG_IGC);
  1174. hw_cfg.last_feature = 0;
  1175. hw_cfg.ctl = ctl;
  1176. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1177. hw_cfg.payload = igc;
  1178. psde->pipe_hw->ops.setup_vig_igc(psde->pipe_hw, &hw_cfg);
  1179. }
  1180. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_IGC &&
  1181. psde->pipe_hw->ops.setup_dma_igc) {
  1182. igc = msm_property_get_blob(&psde->property_info,
  1183. &pstate->property_state,
  1184. &size,
  1185. PLANE_PROP_DMA_IGC);
  1186. hw_cfg.last_feature = 0;
  1187. hw_cfg.ctl = ctl;
  1188. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1189. hw_cfg.payload = igc;
  1190. psde->pipe_hw->ops.setup_dma_igc(psde->pipe_hw, &hw_cfg,
  1191. pstate->multirect_index);
  1192. }
  1193. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_GC &&
  1194. psde->pipe_hw->ops.setup_dma_gc) {
  1195. gc = msm_property_get_blob(&psde->property_info,
  1196. &pstate->property_state,
  1197. &size,
  1198. PLANE_PROP_DMA_GC);
  1199. hw_cfg.last_feature = 0;
  1200. hw_cfg.ctl = ctl;
  1201. hw_cfg.len = sizeof(struct drm_msm_pgc_lut);
  1202. hw_cfg.payload = gc;
  1203. psde->pipe_hw->ops.setup_dma_gc(psde->pipe_hw, &hw_cfg,
  1204. pstate->multirect_index);
  1205. }
  1206. }
  1207. static void _sde_plane_setup_scaler(struct sde_plane *psde,
  1208. struct sde_plane_state *pstate,
  1209. const struct sde_format *fmt, bool color_fill)
  1210. {
  1211. struct sde_hw_pixel_ext *pe;
  1212. uint32_t chroma_subsmpl_h, chroma_subsmpl_v;
  1213. const struct drm_format_info *info = drm_format_info(fmt->base.pixel_format);
  1214. if (!psde || !fmt || !pstate) {
  1215. SDE_ERROR("invalid arg(s), plane %d fmt %d state %d\n",
  1216. !psde, !fmt, !pstate);
  1217. return;
  1218. }
  1219. pe = &pstate->pixel_ext;
  1220. psde->pipe_cfg.horz_decimation =
  1221. sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  1222. psde->pipe_cfg.vert_decimation =
  1223. sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  1224. /* don't chroma subsample if decimating */
  1225. chroma_subsmpl_h = psde->pipe_cfg.horz_decimation ? 1 : info->hsub;
  1226. chroma_subsmpl_v = psde->pipe_cfg.vert_decimation ? 1 : info->vsub;
  1227. /* update scaler */
  1228. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  1229. (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))) {
  1230. int rc = -EINVAL;
  1231. if (!color_fill && !psde->debugfs_default_scale)
  1232. rc = is_qseed3_rev_qseed3lite(psde->pipe_hw->catalog) ?
  1233. _sde_plane_setup_scaler3lite_lut(psde, pstate) :
  1234. _sde_plane_setup_scaler3_lut(psde, pstate);
  1235. if (rc || pstate->scaler_check_state !=
  1236. SDE_PLANE_SCLCHECK_SCALER_V2) {
  1237. SDE_EVT32_VERBOSE(DRMID(&psde->base), color_fill,
  1238. pstate->scaler_check_state,
  1239. psde->debugfs_default_scale, rc,
  1240. psde->pipe_cfg.src_rect.w,
  1241. psde->pipe_cfg.src_rect.h,
  1242. psde->pipe_cfg.dst_rect.w,
  1243. psde->pipe_cfg.dst_rect.h,
  1244. pstate->multirect_mode);
  1245. /* calculate default config for QSEED3 */
  1246. _sde_plane_setup_scaler3(psde, pstate, fmt,
  1247. chroma_subsmpl_h, chroma_subsmpl_v);
  1248. }
  1249. } else if (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V1 ||
  1250. color_fill || psde->debugfs_default_scale) {
  1251. uint32_t deci_dim, i;
  1252. /* calculate default configuration for QSEED2 */
  1253. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  1254. SDE_DEBUG_PLANE(psde, "default config\n");
  1255. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.w,
  1256. psde->pipe_cfg.horz_decimation);
  1257. _sde_plane_setup_scaler2(psde,
  1258. deci_dim,
  1259. psde->pipe_cfg.dst_rect.w,
  1260. pe->phase_step_x,
  1261. pe->horz_filter, fmt, chroma_subsmpl_h);
  1262. if (SDE_FORMAT_IS_YUV(fmt))
  1263. deci_dim &= ~0x1;
  1264. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.w,
  1265. psde->pipe_cfg.dst_rect.w, deci_dim,
  1266. pe->phase_step_x,
  1267. pe->roi_w,
  1268. pe->num_ext_pxls_left,
  1269. pe->num_ext_pxls_right, pe->horz_filter, fmt,
  1270. chroma_subsmpl_h, 0);
  1271. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.h,
  1272. psde->pipe_cfg.vert_decimation);
  1273. _sde_plane_setup_scaler2(psde,
  1274. deci_dim,
  1275. psde->pipe_cfg.dst_rect.h,
  1276. pe->phase_step_y,
  1277. pe->vert_filter, fmt, chroma_subsmpl_v);
  1278. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.h,
  1279. psde->pipe_cfg.dst_rect.h, deci_dim,
  1280. pe->phase_step_y,
  1281. pe->roi_h,
  1282. pe->num_ext_pxls_top,
  1283. pe->num_ext_pxls_btm, pe->vert_filter, fmt,
  1284. chroma_subsmpl_v, 1);
  1285. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1286. if (pe->num_ext_pxls_left[i] >= 0)
  1287. pe->left_rpt[i] = pe->num_ext_pxls_left[i];
  1288. else
  1289. pe->left_ftch[i] = pe->num_ext_pxls_left[i];
  1290. if (pe->num_ext_pxls_right[i] >= 0)
  1291. pe->right_rpt[i] = pe->num_ext_pxls_right[i];
  1292. else
  1293. pe->right_ftch[i] = pe->num_ext_pxls_right[i];
  1294. if (pe->num_ext_pxls_top[i] >= 0)
  1295. pe->top_rpt[i] = pe->num_ext_pxls_top[i];
  1296. else
  1297. pe->top_ftch[i] = pe->num_ext_pxls_top[i];
  1298. if (pe->num_ext_pxls_btm[i] >= 0)
  1299. pe->btm_rpt[i] = pe->num_ext_pxls_btm[i];
  1300. else
  1301. pe->btm_ftch[i] = pe->num_ext_pxls_btm[i];
  1302. }
  1303. }
  1304. if (psde->pipe_hw->ops.setup_pre_downscale)
  1305. psde->pipe_hw->ops.setup_pre_downscale(psde->pipe_hw,
  1306. &pstate->pre_down);
  1307. }
  1308. /**
  1309. * _sde_plane_color_fill - enables color fill on plane
  1310. * @psde: Pointer to SDE plane object
  1311. * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
  1312. * @alpha: 8-bit fill alpha value, 255 selects 100% alpha
  1313. * Returns: 0 on success
  1314. */
  1315. static int _sde_plane_color_fill(struct sde_plane *psde,
  1316. uint32_t color, uint32_t alpha)
  1317. {
  1318. const struct sde_format *fmt;
  1319. const struct drm_plane *plane;
  1320. struct sde_plane_state *pstate;
  1321. bool blend_enable = true;
  1322. if (!psde || !psde->base.state) {
  1323. SDE_ERROR("invalid plane\n");
  1324. return -EINVAL;
  1325. }
  1326. if (!psde->pipe_hw) {
  1327. SDE_ERROR_PLANE(psde, "invalid plane h/w pointer\n");
  1328. return -EINVAL;
  1329. }
  1330. plane = &psde->base;
  1331. pstate = to_sde_plane_state(plane->state);
  1332. SDE_DEBUG_PLANE(psde, "\n");
  1333. /*
  1334. * select fill format to match user property expectation,
  1335. * h/w only supports RGB variants
  1336. */
  1337. fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888);
  1338. blend_enable = (SDE_DRM_BLEND_OP_OPAQUE !=
  1339. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP));
  1340. /* update sspp */
  1341. if (fmt && psde->pipe_hw->ops.setup_solidfill) {
  1342. psde->pipe_hw->ops.setup_solidfill(psde->pipe_hw,
  1343. (color & 0xFFFFFF) | ((alpha & 0xFF) << 24),
  1344. pstate->multirect_index);
  1345. /* override scaler/decimation if solid fill */
  1346. psde->pipe_cfg.src_rect.x = 0;
  1347. psde->pipe_cfg.src_rect.y = 0;
  1348. psde->pipe_cfg.src_rect.w = psde->pipe_cfg.dst_rect.w;
  1349. psde->pipe_cfg.src_rect.h = psde->pipe_cfg.dst_rect.h;
  1350. _sde_plane_setup_scaler(psde, pstate, fmt, true);
  1351. if (psde->pipe_hw->ops.setup_format)
  1352. psde->pipe_hw->ops.setup_format(psde->pipe_hw,
  1353. fmt, blend_enable,
  1354. SDE_SSPP_SOLID_FILL,
  1355. pstate->multirect_index);
  1356. if (psde->pipe_hw->ops.setup_rects)
  1357. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  1358. &psde->pipe_cfg,
  1359. pstate->multirect_index);
  1360. if (psde->pipe_hw->ops.setup_pe)
  1361. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  1362. &pstate->pixel_ext);
  1363. if (psde->pipe_hw->ops.setup_scaler &&
  1364. pstate->multirect_index != SDE_SSPP_RECT_1) {
  1365. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  1366. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  1367. &psde->pipe_cfg, &pstate->pixel_ext,
  1368. &pstate->scaler3_cfg);
  1369. }
  1370. }
  1371. return 0;
  1372. }
  1373. /**
  1374. * sde_plane_rot_atomic_check - verify rotator update of the given state
  1375. * @plane: Pointer to drm plane
  1376. * @state: Pointer to drm plane state to be validated
  1377. * return: 0 if success; error code otherwise
  1378. */
  1379. static int sde_plane_rot_atomic_check(struct drm_plane *plane,
  1380. struct drm_plane_state *state)
  1381. {
  1382. struct sde_plane *psde;
  1383. struct sde_plane_state *pstate, *old_pstate;
  1384. int ret = 0;
  1385. u32 rotation;
  1386. if (!plane || !state) {
  1387. SDE_ERROR("invalid plane/state\n");
  1388. return -EINVAL;
  1389. }
  1390. psde = to_sde_plane(plane);
  1391. pstate = to_sde_plane_state(state);
  1392. old_pstate = to_sde_plane_state(plane->state);
  1393. /* check inline rotation and simplify the transform */
  1394. rotation = drm_rotation_simplify(
  1395. state->rotation,
  1396. DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1397. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1398. if ((rotation & DRM_MODE_ROTATE_180) ||
  1399. (rotation & DRM_MODE_ROTATE_270)) {
  1400. SDE_ERROR_PLANE(psde,
  1401. "invalid rotation transform must be simplified 0x%x\n",
  1402. rotation);
  1403. ret = -EINVAL;
  1404. goto exit;
  1405. }
  1406. if (rotation & DRM_MODE_ROTATE_90) {
  1407. struct msm_drm_private *priv = plane->dev->dev_private;
  1408. struct sde_kms *sde_kms;
  1409. const struct msm_format *msm_fmt;
  1410. const struct sde_format *fmt;
  1411. struct sde_rect src;
  1412. bool q16_data = true;
  1413. POPULATE_RECT(&src, state->src_x, state->src_y,
  1414. state->src_w, state->src_h, q16_data);
  1415. /*
  1416. * DRM framework expects rotation flag in counter-clockwise
  1417. * direction and the HW expects in clockwise direction.
  1418. * Flip the flags to match with HW.
  1419. */
  1420. rotation ^= (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1421. if (!psde->pipe_sblk->in_rot_maxdwnscale_rt_num ||
  1422. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom ||
  1423. !psde->pipe_sblk->in_rot_maxdwnscale_nrt ||
  1424. !psde->pipe_sblk->in_rot_maxheight ||
  1425. !psde->pipe_sblk->in_rot_format_list ||
  1426. !(psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT))) {
  1427. SDE_ERROR_PLANE(psde,
  1428. "wrong config rt:%d/%d nrt:%d fmt:%d h:%d 0x%x\n",
  1429. !psde->pipe_sblk->in_rot_maxdwnscale_rt_num,
  1430. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom,
  1431. !psde->pipe_sblk->in_rot_maxdwnscale_nrt,
  1432. !psde->pipe_sblk->in_rot_format_list,
  1433. !psde->pipe_sblk->in_rot_maxheight,
  1434. psde->features);
  1435. ret = -EINVAL;
  1436. goto exit;
  1437. }
  1438. /* check for valid height */
  1439. if (src.h > psde->pipe_sblk->in_rot_maxheight) {
  1440. SDE_ERROR_PLANE(psde,
  1441. "invalid height for inline rot:%d max:%d\n",
  1442. src.h, psde->pipe_sblk->in_rot_maxheight);
  1443. ret = -EINVAL;
  1444. goto exit;
  1445. }
  1446. if (!sde_plane_enabled(state))
  1447. goto exit;
  1448. /* check for valid formats supported by inline rot */
  1449. sde_kms = to_sde_kms(priv->kms);
  1450. msm_fmt = msm_framebuffer_format(state->fb);
  1451. fmt = to_sde_format(msm_fmt);
  1452. ret = sde_format_validate_fmt(&sde_kms->base, fmt,
  1453. psde->pipe_sblk->in_rot_format_list);
  1454. }
  1455. exit:
  1456. pstate->rotation = rotation;
  1457. return ret;
  1458. }
  1459. static bool _sde_plane_halt_requests(struct drm_plane *plane,
  1460. uint32_t xin_id, bool halt_forced_clk, bool enable)
  1461. {
  1462. struct sde_plane *psde;
  1463. struct msm_drm_private *priv;
  1464. struct sde_vbif_set_xin_halt_params halt_params;
  1465. if (!plane || !plane->dev) {
  1466. SDE_ERROR("invalid arguments\n");
  1467. return false;
  1468. }
  1469. psde = to_sde_plane(plane);
  1470. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1471. SDE_ERROR("invalid pipe reference\n");
  1472. return false;
  1473. }
  1474. priv = plane->dev->dev_private;
  1475. if (!priv || !priv->kms) {
  1476. SDE_ERROR("invalid KMS reference\n");
  1477. return false;
  1478. }
  1479. memset(&halt_params, 0, sizeof(halt_params));
  1480. halt_params.vbif_idx = VBIF_RT;
  1481. halt_params.xin_id = xin_id;
  1482. halt_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1483. halt_params.forced_on = halt_forced_clk;
  1484. halt_params.enable = enable;
  1485. return sde_vbif_set_xin_halt(to_sde_kms(priv->kms), &halt_params);
  1486. }
  1487. void sde_plane_halt_requests(struct drm_plane *plane, bool enable)
  1488. {
  1489. struct sde_plane *psde;
  1490. if (!plane) {
  1491. SDE_ERROR("invalid plane\n");
  1492. return;
  1493. }
  1494. psde = to_sde_plane(plane);
  1495. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1496. SDE_ERROR("invalid pipe reference\n");
  1497. return;
  1498. }
  1499. SDE_EVT32(DRMID(plane), psde->xin_halt_forced_clk, enable);
  1500. psde->xin_halt_forced_clk =
  1501. _sde_plane_halt_requests(plane, psde->pipe_hw->cap->xin_id,
  1502. psde->xin_halt_forced_clk, enable);
  1503. }
  1504. void sde_plane_secure_ctrl_xin_client(struct drm_plane *plane,
  1505. struct drm_crtc *crtc)
  1506. {
  1507. struct sde_plane *psde;
  1508. if (!plane || !crtc) {
  1509. SDE_ERROR("invalid plane/crtc\n");
  1510. return;
  1511. }
  1512. psde = to_sde_plane(plane);
  1513. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  1514. return;
  1515. /* do all VBIF programming for the sec-ui allowed SSPP */
  1516. _sde_plane_set_qos_remap(plane, true);
  1517. _sde_plane_set_ot_limit(plane, crtc);
  1518. }
  1519. /**
  1520. * sde_plane_rot_install_properties - install plane rotator properties
  1521. * @plane: Pointer to drm plane
  1522. * @catalog: Pointer to mdss configuration
  1523. * return: none
  1524. */
  1525. static void sde_plane_rot_install_properties(struct drm_plane *plane,
  1526. struct sde_mdss_cfg *catalog)
  1527. {
  1528. struct sde_plane *psde = to_sde_plane(plane);
  1529. unsigned long supported_rotations = DRM_MODE_ROTATE_0 |
  1530. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;
  1531. int ret = 0;
  1532. if (!plane || !psde) {
  1533. SDE_ERROR("invalid plane\n");
  1534. return;
  1535. } else if (!catalog) {
  1536. SDE_ERROR("invalid catalog\n");
  1537. return;
  1538. }
  1539. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT))
  1540. supported_rotations |= DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1541. DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;
  1542. ret = drm_plane_create_rotation_property(plane,
  1543. DRM_MODE_ROTATE_0, supported_rotations);
  1544. if (ret) {
  1545. DRM_ERROR("create rotation property failed: %d\n", ret);
  1546. return;
  1547. }
  1548. }
  1549. void sde_plane_clear_multirect(const struct drm_plane_state *drm_state)
  1550. {
  1551. struct sde_plane_state *pstate;
  1552. if (!drm_state)
  1553. return;
  1554. pstate = to_sde_plane_state(drm_state);
  1555. pstate->multirect_index = SDE_SSPP_RECT_SOLO;
  1556. pstate->multirect_mode = SDE_SSPP_MULTIRECT_NONE;
  1557. }
  1558. /**
  1559. * multi_rect validate API allows to validate only R0 and R1 RECT
  1560. * passing for each plane. Client of this API must not pass multiple
  1561. * plane which are not sharing same XIN client. Such calls will fail
  1562. * even though kernel client is passing valid multirect configuration.
  1563. */
  1564. int sde_plane_validate_multirect_v2(struct sde_multirect_plane_states *plane)
  1565. {
  1566. struct sde_plane_state *pstate[R_MAX];
  1567. const struct drm_plane_state *drm_state[R_MAX];
  1568. struct sde_rect src[R_MAX], dst[R_MAX];
  1569. struct sde_plane *sde_plane[R_MAX];
  1570. const struct sde_format *fmt[R_MAX];
  1571. int xin_id[R_MAX];
  1572. bool q16_data = true;
  1573. int i, j, buffer_lines, width_threshold[R_MAX];
  1574. unsigned int max_tile_height = 1;
  1575. bool parallel_fetch_qualified = true;
  1576. enum sde_sspp_multirect_mode mode = SDE_SSPP_MULTIRECT_NONE;
  1577. const struct msm_format *msm_fmt;
  1578. bool const_alpha_enable = true;
  1579. for (i = 0; i < R_MAX; i++) {
  1580. drm_state[i] = i ? plane->r1 : plane->r0;
  1581. if (!drm_state[i]) {
  1582. SDE_ERROR("drm plane state is NULL\n");
  1583. return -EINVAL;
  1584. }
  1585. pstate[i] = to_sde_plane_state(drm_state[i]);
  1586. sde_plane[i] = to_sde_plane(drm_state[i]->plane);
  1587. xin_id[i] = sde_plane[i]->pipe_hw->cap->xin_id;
  1588. for (j = 0; j < i; j++) {
  1589. if (xin_id[i] != xin_id[j]) {
  1590. SDE_ERROR_PLANE(sde_plane[i],
  1591. "invalid multirect validate call base:%d xin_id:%d curr:%d xin:%d\n",
  1592. j, xin_id[j], i, xin_id[i]);
  1593. return -EINVAL;
  1594. }
  1595. }
  1596. msm_fmt = msm_framebuffer_format(drm_state[i]->fb);
  1597. if (!msm_fmt) {
  1598. SDE_ERROR_PLANE(sde_plane[i], "null fb\n");
  1599. return -EINVAL;
  1600. }
  1601. fmt[i] = to_sde_format(msm_fmt);
  1602. if (SDE_FORMAT_IS_UBWC(fmt[i]) &&
  1603. (fmt[i]->tile_height > max_tile_height))
  1604. max_tile_height = fmt[i]->tile_height;
  1605. POPULATE_RECT(&src[i], drm_state[i]->src_x, drm_state[i]->src_y,
  1606. drm_state[i]->src_w, drm_state[i]->src_h, q16_data);
  1607. POPULATE_RECT(&dst[i], drm_state[i]->crtc_x,
  1608. drm_state[i]->crtc_y, drm_state[i]->crtc_w,
  1609. drm_state[i]->crtc_h, !q16_data);
  1610. if (src[i].w != dst[i].w || src[i].h != dst[i].h) {
  1611. SDE_ERROR_PLANE(sde_plane[i],
  1612. "scaling is not supported in multirect mode\n");
  1613. return -EINVAL;
  1614. }
  1615. if (SDE_FORMAT_IS_YUV(fmt[i])) {
  1616. SDE_ERROR_PLANE(sde_plane[i],
  1617. "Unsupported format for multirect mode\n");
  1618. return -EINVAL;
  1619. }
  1620. /**
  1621. * SSPP PD_MEM is split half - one for each RECT.
  1622. * Tiled formats need 5 lines of buffering while fetching
  1623. * whereas linear formats need only 2 lines.
  1624. * So we cannot support more than half of the supported SSPP
  1625. * width for tiled formats.
  1626. */
  1627. width_threshold[i] = sde_plane[i]->pipe_sblk->maxlinewidth;
  1628. if (SDE_FORMAT_IS_UBWC(fmt[i]))
  1629. width_threshold[i] /= 2;
  1630. if (parallel_fetch_qualified && src[i].w > width_threshold[i])
  1631. parallel_fetch_qualified = false;
  1632. if (sde_plane[i]->is_virtual)
  1633. mode = sde_plane_get_property(pstate[i],
  1634. PLANE_PROP_MULTIRECT_MODE);
  1635. if (pstate[i]->const_alpha_en != const_alpha_enable)
  1636. const_alpha_enable = false;
  1637. }
  1638. buffer_lines = 2 * max_tile_height;
  1639. /**
  1640. * fallback to driver mode selection logic if client is using
  1641. * multirect plane without setting property.
  1642. *
  1643. * validate multirect mode configuration based on rectangle
  1644. */
  1645. switch (mode) {
  1646. case SDE_SSPP_MULTIRECT_NONE:
  1647. if (parallel_fetch_qualified)
  1648. mode = SDE_SSPP_MULTIRECT_PARALLEL;
  1649. else if (TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) ||
  1650. TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines))
  1651. mode = SDE_SSPP_MULTIRECT_TIME_MX;
  1652. else
  1653. SDE_ERROR(
  1654. "planes(%d - %d) multirect mode selection fail\n",
  1655. drm_state[R0]->plane->base.id,
  1656. drm_state[R1]->plane->base.id);
  1657. break;
  1658. case SDE_SSPP_MULTIRECT_PARALLEL:
  1659. if (!parallel_fetch_qualified) {
  1660. SDE_ERROR("R0 plane:%d width_threshold:%d src_w:%d\n",
  1661. drm_state[R0]->plane->base.id,
  1662. width_threshold[R0], src[R0].w);
  1663. SDE_ERROR("R1 plane:%d width_threshold:%d src_w:%d\n",
  1664. drm_state[R1]->plane->base.id,
  1665. width_threshold[R1], src[R1].w);
  1666. SDE_ERROR("parallel fetch not qualified\n");
  1667. mode = SDE_SSPP_MULTIRECT_NONE;
  1668. }
  1669. break;
  1670. case SDE_SSPP_MULTIRECT_TIME_MX:
  1671. if (!TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) &&
  1672. !TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines)) {
  1673. SDE_ERROR(
  1674. "buffer_lines:%d R0 plane:%d dst_y:%d dst_h:%d\n",
  1675. buffer_lines, drm_state[R0]->plane->base.id,
  1676. dst[R0].y, dst[R0].h);
  1677. SDE_ERROR(
  1678. "buffer_lines:%d R1 plane:%d dst_y:%d dst_h:%d\n",
  1679. buffer_lines, drm_state[R1]->plane->base.id,
  1680. dst[R1].y, dst[R1].h);
  1681. SDE_ERROR("time multiplexed fetch not qualified\n");
  1682. mode = SDE_SSPP_MULTIRECT_NONE;
  1683. }
  1684. break;
  1685. default:
  1686. SDE_ERROR("bad mode:%d selection\n", mode);
  1687. mode = SDE_SSPP_MULTIRECT_NONE;
  1688. break;
  1689. }
  1690. for (i = 0; i < R_MAX; i++) {
  1691. pstate[i]->multirect_mode = mode;
  1692. pstate[i]->const_alpha_en = const_alpha_enable;
  1693. }
  1694. if (mode == SDE_SSPP_MULTIRECT_NONE)
  1695. return -EINVAL;
  1696. if (sde_plane[R0]->is_virtual) {
  1697. pstate[R0]->multirect_index = SDE_SSPP_RECT_1;
  1698. pstate[R1]->multirect_index = SDE_SSPP_RECT_0;
  1699. } else {
  1700. pstate[R0]->multirect_index = SDE_SSPP_RECT_0;
  1701. pstate[R1]->multirect_index = SDE_SSPP_RECT_1;
  1702. }
  1703. SDE_DEBUG_PLANE(sde_plane[R0], "R0: %d - %d\n",
  1704. pstate[R0]->multirect_mode, pstate[R0]->multirect_index);
  1705. SDE_DEBUG_PLANE(sde_plane[R1], "R1: %d - %d\n",
  1706. pstate[R1]->multirect_mode, pstate[R1]->multirect_index);
  1707. return 0;
  1708. }
  1709. /**
  1710. * sde_plane_ctl_flush - set/clear control flush bitmask for the given plane
  1711. * @plane: Pointer to drm plane structure
  1712. * @ctl: Pointer to hardware control driver
  1713. * @set: set if true else clear
  1714. */
  1715. void sde_plane_ctl_flush(struct drm_plane *plane, struct sde_hw_ctl *ctl,
  1716. bool set)
  1717. {
  1718. if (!plane || !ctl) {
  1719. SDE_ERROR("invalid parameters\n");
  1720. return;
  1721. }
  1722. if (!ctl->ops.update_bitmask_sspp) {
  1723. SDE_ERROR("invalid ops\n");
  1724. return;
  1725. }
  1726. ctl->ops.update_bitmask_sspp(ctl, sde_plane_pipe(plane), set);
  1727. }
  1728. static int sde_plane_prepare_fb(struct drm_plane *plane,
  1729. struct drm_plane_state *new_state)
  1730. {
  1731. struct drm_framebuffer *fb = new_state->fb;
  1732. struct sde_plane *psde = to_sde_plane(plane);
  1733. struct sde_plane_state *pstate = to_sde_plane_state(new_state);
  1734. struct sde_hw_fmt_layout layout;
  1735. struct msm_gem_address_space *aspace;
  1736. int ret;
  1737. if (!fb)
  1738. return 0;
  1739. SDE_DEBUG_PLANE(psde, "FB[%u]\n", fb->base.id);
  1740. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  1741. if (ret) {
  1742. SDE_ERROR_PLANE(psde, "Failed to get aspace\n");
  1743. return ret;
  1744. }
  1745. /* cache aspace */
  1746. pstate->aspace = aspace;
  1747. /*
  1748. * when transitioning from secure to non-secure,
  1749. * plane->prepare_fb happens before the commit. In such case,
  1750. * defer the prepare_fb and handled it late, during the commit
  1751. * after attaching the domains as part of the transition
  1752. */
  1753. pstate->defer_prepare_fb = (aspace && !aspace->domain_attached) ?
  1754. true : false;
  1755. if (pstate->defer_prepare_fb) {
  1756. SDE_EVT32(DRMID(plane), psde->pipe);
  1757. SDE_DEBUG_PLANE(psde,
  1758. "domain not attached, prepare_fb handled later\n");
  1759. return 0;
  1760. }
  1761. if (pstate->aspace && fb) {
  1762. ret = msm_framebuffer_prepare(fb,
  1763. pstate->aspace);
  1764. if (ret) {
  1765. SDE_ERROR("failed to prepare framebuffer\n");
  1766. return ret;
  1767. }
  1768. }
  1769. /* validate framebuffer layout before commit */
  1770. ret = sde_format_populate_layout(pstate->aspace,
  1771. fb, &layout);
  1772. if (ret) {
  1773. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  1774. return ret;
  1775. }
  1776. return 0;
  1777. }
  1778. /**
  1779. * _sde_plane_fetch_halt - halts vbif transactions for a plane
  1780. * @plane: Pointer to plane
  1781. * Returns: 0 on success
  1782. */
  1783. static int _sde_plane_fetch_halt(struct drm_plane *plane)
  1784. {
  1785. struct sde_plane *psde;
  1786. int xin_id;
  1787. enum sde_clk_ctrl_type clk_ctrl;
  1788. struct msm_drm_private *priv;
  1789. struct sde_kms *sde_kms;
  1790. psde = to_sde_plane(plane);
  1791. if (!plane || !plane->dev || !psde->pipe_hw) {
  1792. SDE_ERROR("invalid arguments\n");
  1793. return -EINVAL;
  1794. }
  1795. priv = plane->dev->dev_private;
  1796. if (!priv || !priv->kms) {
  1797. SDE_ERROR("invalid KMS reference\n");
  1798. return -EINVAL;
  1799. }
  1800. sde_kms = to_sde_kms(priv->kms);
  1801. clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1802. xin_id = psde->pipe_hw->cap->xin_id;
  1803. SDE_DEBUG_PLANE(psde, "pipe:%d xin_id:%d clk_ctrl:%d\n",
  1804. psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1805. SDE_EVT32_VERBOSE(psde, psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1806. return sde_vbif_halt_plane_xin(sde_kms, xin_id, clk_ctrl);
  1807. }
  1808. static void sde_plane_cleanup_fb(struct drm_plane *plane,
  1809. struct drm_plane_state *old_state)
  1810. {
  1811. struct sde_plane *psde = to_sde_plane(plane);
  1812. struct sde_plane_state *old_pstate;
  1813. int ret;
  1814. if (!old_state || !old_state->fb || !plane || !plane->state)
  1815. return;
  1816. old_pstate = to_sde_plane_state(old_state);
  1817. SDE_DEBUG_PLANE(psde, "FB[%u]\n", old_state->fb->base.id);
  1818. /*
  1819. * plane->state gets populated for next frame after swap_state. If
  1820. * plane->state->crtc pointer is not populated then it is not used in
  1821. * the next frame, hence making it an unused plane.
  1822. */
  1823. if ((plane->state->crtc == NULL) && !psde->is_virtual) {
  1824. SDE_DEBUG_PLANE(psde, "unused pipe:%u\n",
  1825. psde->pipe - SSPP_VIG0);
  1826. /* halt this plane now */
  1827. ret = pm_runtime_get_sync(plane->dev->dev);
  1828. if (ret < 0) {
  1829. SDE_ERROR("power resource enable failed with %d", ret);
  1830. SDE_EVT32(ret, SDE_EVTLOG_ERROR);
  1831. return;
  1832. }
  1833. ret = _sde_plane_fetch_halt(plane);
  1834. if (ret) {
  1835. SDE_ERROR_PLANE(psde,
  1836. "unused pipe %u halt failed\n",
  1837. psde->pipe - SSPP_VIG0);
  1838. SDE_EVT32(DRMID(plane), psde->pipe - SSPP_VIG0,
  1839. ret, SDE_EVTLOG_ERROR);
  1840. }
  1841. pm_runtime_put_sync(plane->dev->dev);
  1842. }
  1843. msm_framebuffer_cleanup(old_state->fb, old_pstate->aspace);
  1844. }
  1845. static void _sde_plane_sspp_atomic_check_mode_changed(struct sde_plane *psde,
  1846. struct drm_plane_state *state,
  1847. struct drm_plane_state *old_state)
  1848. {
  1849. struct sde_plane_state *pstate = to_sde_plane_state(state);
  1850. struct sde_plane_state *old_pstate = to_sde_plane_state(old_state);
  1851. struct drm_framebuffer *fb, *old_fb;
  1852. /* no need to check it again */
  1853. if (pstate->dirty == SDE_PLANE_DIRTY_ALL)
  1854. return;
  1855. if (!sde_plane_enabled(state) || !sde_plane_enabled(old_state)
  1856. || psde->is_error) {
  1857. SDE_DEBUG_PLANE(psde,
  1858. "enabling/disabling full modeset required\n");
  1859. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1860. } else if (to_sde_plane_state(old_state)->pending) {
  1861. SDE_DEBUG_PLANE(psde, "still pending\n");
  1862. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1863. } else if (pstate->multirect_index != old_pstate->multirect_index ||
  1864. pstate->multirect_mode != old_pstate->multirect_mode) {
  1865. SDE_DEBUG_PLANE(psde, "multirect config updated\n");
  1866. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1867. } else if (state->src_w != old_state->src_w ||
  1868. state->src_h != old_state->src_h ||
  1869. state->src_x != old_state->src_x ||
  1870. state->src_y != old_state->src_y) {
  1871. SDE_DEBUG_PLANE(psde, "src rect updated\n");
  1872. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1873. } else if (state->crtc_w != old_state->crtc_w ||
  1874. state->crtc_h != old_state->crtc_h ||
  1875. state->crtc_x != old_state->crtc_x ||
  1876. state->crtc_y != old_state->crtc_y) {
  1877. SDE_DEBUG_PLANE(psde, "crtc rect updated\n");
  1878. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1879. } else if (pstate->excl_rect.w != old_pstate->excl_rect.w ||
  1880. pstate->excl_rect.h != old_pstate->excl_rect.h ||
  1881. pstate->excl_rect.x != old_pstate->excl_rect.x ||
  1882. pstate->excl_rect.y != old_pstate->excl_rect.y) {
  1883. SDE_DEBUG_PLANE(psde, "excl_rect updated\n");
  1884. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1885. } else if (pstate->rotation != old_pstate->rotation) {
  1886. SDE_DEBUG_PLANE(psde, "rotation updated 0x%x->0x%x\n",
  1887. pstate->rotation, old_pstate->rotation);
  1888. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT;
  1889. }
  1890. fb = state->fb;
  1891. old_fb = old_state->fb;
  1892. if (!fb || !old_fb) {
  1893. SDE_DEBUG_PLANE(psde, "can't compare fb handles\n");
  1894. } else if ((fb->format->format != old_fb->format->format) ||
  1895. pstate->const_alpha_en != old_pstate->const_alpha_en) {
  1896. SDE_DEBUG_PLANE(psde, "format change\n");
  1897. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT | SDE_PLANE_DIRTY_RECTS;
  1898. } else {
  1899. uint64_t new_mod = fb->modifier;
  1900. uint64_t old_mod = old_fb->modifier;
  1901. uint32_t *new_pitches = fb->pitches;
  1902. uint32_t *old_pitches = old_fb->pitches;
  1903. uint32_t *new_offset = fb->offsets;
  1904. uint32_t *old_offset = old_fb->offsets;
  1905. int i;
  1906. if (new_mod != old_mod) {
  1907. SDE_DEBUG_PLANE(psde,
  1908. "format modifiers change new_mode:%llu old_mode:%llu\n",
  1909. new_mod, old_mod);
  1910. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1911. SDE_PLANE_DIRTY_RECTS;
  1912. }
  1913. for (i = 0; i < ARRAY_SIZE(fb->pitches); i++) {
  1914. if (new_pitches[i] != old_pitches[i]) {
  1915. SDE_DEBUG_PLANE(psde,
  1916. "pitches change plane:%d old_pitches:%u new_pitches:%u\n",
  1917. i, old_pitches[i], new_pitches[i]);
  1918. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1919. break;
  1920. }
  1921. }
  1922. for (i = 0; i < ARRAY_SIZE(fb->offsets); i++) {
  1923. if (new_offset[i] != old_offset[i]) {
  1924. SDE_DEBUG_PLANE(psde,
  1925. "offset change plane:%d old_offset:%u new_offset:%u\n",
  1926. i, old_offset[i], new_offset[i]);
  1927. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1928. SDE_PLANE_DIRTY_RECTS;
  1929. break;
  1930. }
  1931. }
  1932. }
  1933. }
  1934. int sde_plane_validate_src_addr(struct drm_plane *plane,
  1935. unsigned long base_addr, u32 size)
  1936. {
  1937. int ret = -EINVAL;
  1938. u32 addr;
  1939. struct sde_plane *psde = to_sde_plane(plane);
  1940. if (!psde || !base_addr || !size) {
  1941. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1942. return ret;
  1943. }
  1944. if (psde->pipe_hw && psde->pipe_hw->ops.get_sourceaddress) {
  1945. addr = psde->pipe_hw->ops.get_sourceaddress(psde->pipe_hw,
  1946. is_sde_plane_virtual(plane));
  1947. if ((addr >= base_addr) && (addr < (base_addr + size)))
  1948. ret = 0;
  1949. }
  1950. return ret;
  1951. }
  1952. static inline bool _sde_plane_is_pre_downscale_enabled(
  1953. struct sde_hw_inline_pre_downscale_cfg *pre_down)
  1954. {
  1955. return pre_down->pre_downscale_x_0 || pre_down->pre_downscale_y_0;
  1956. }
  1957. static int _sde_plane_validate_scaler_v2(struct sde_plane *psde,
  1958. struct sde_plane_state *pstate,
  1959. const struct sde_format *fmt,
  1960. uint32_t img_w, uint32_t img_h,
  1961. uint32_t src_w, uint32_t src_h,
  1962. uint32_t deci_w, uint32_t deci_h)
  1963. {
  1964. struct sde_hw_inline_pre_downscale_cfg *pd_cfg;
  1965. bool pre_down_en;
  1966. int i;
  1967. if (!psde || !pstate || !fmt) {
  1968. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1969. return -EINVAL;
  1970. }
  1971. if (psde->debugfs_default_scale ||
  1972. (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2 &&
  1973. pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2_CHECK))
  1974. return 0;
  1975. pd_cfg = &pstate->pre_down;
  1976. pre_down_en = _sde_plane_is_pre_downscale_enabled(pd_cfg);
  1977. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_INVALID;
  1978. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1979. uint32_t hor_req_pixels, hor_fetch_pixels;
  1980. uint32_t vert_req_pixels, vert_fetch_pixels;
  1981. uint32_t src_w_tmp, src_h_tmp;
  1982. uint32_t scaler_w, scaler_h;
  1983. uint32_t pre_down_ratio_x = 1, pre_down_ratio_y = 1;
  1984. bool rot;
  1985. /* re-use color plane 1's config for plane 2 */
  1986. if (i == 2)
  1987. continue;
  1988. if (pre_down_en) {
  1989. if (i == 0 && pd_cfg->pre_downscale_x_0)
  1990. pre_down_ratio_x = pd_cfg->pre_downscale_x_0;
  1991. if (i == 0 && pd_cfg->pre_downscale_y_0)
  1992. pre_down_ratio_y = pd_cfg->pre_downscale_y_0;
  1993. if ((i == 1 || i == 2) && pd_cfg->pre_downscale_x_1)
  1994. pre_down_ratio_x = pd_cfg->pre_downscale_x_1;
  1995. if ((i == 1 || i == 2) && pd_cfg->pre_downscale_y_1)
  1996. pre_down_ratio_y = pd_cfg->pre_downscale_y_1;
  1997. SDE_DEBUG_PLANE(psde, "pre_down[%d]: x:%d, y:%d\n",
  1998. i, pre_down_ratio_x, pre_down_ratio_y);
  1999. }
  2000. src_w_tmp = src_w;
  2001. src_h_tmp = src_h;
  2002. /*
  2003. * For chroma plane, width is half for the following sub sampled
  2004. * formats. Except in case of decimation, where hardware avoids
  2005. * 1 line of decimation instead of downsampling.
  2006. */
  2007. if (i == 1) {
  2008. if (!deci_w &&
  2009. (fmt->chroma_sample == SDE_CHROMA_420 ||
  2010. fmt->chroma_sample == SDE_CHROMA_H2V1))
  2011. src_w_tmp >>= 1;
  2012. if (!deci_h &&
  2013. (fmt->chroma_sample == SDE_CHROMA_420 ||
  2014. fmt->chroma_sample == SDE_CHROMA_H1V2))
  2015. src_h_tmp >>= 1;
  2016. }
  2017. hor_req_pixels = pstate->pixel_ext.roi_w[i];
  2018. vert_req_pixels = pstate->pixel_ext.roi_h[i];
  2019. hor_fetch_pixels = DECIMATED_DIMENSION(src_w_tmp +
  2020. (int8_t)(pstate->pixel_ext.left_ftch[i] & 0xFF) +
  2021. (int8_t)(pstate->pixel_ext.right_ftch[i] & 0xFF),
  2022. deci_w);
  2023. vert_fetch_pixels = DECIMATED_DIMENSION(src_h_tmp +
  2024. (int8_t)(pstate->pixel_ext.top_ftch[i] & 0xFF) +
  2025. (int8_t)(pstate->pixel_ext.btm_ftch[i] & 0xFF),
  2026. deci_h);
  2027. if ((hor_req_pixels != hor_fetch_pixels) ||
  2028. (hor_fetch_pixels > img_w) ||
  2029. (vert_req_pixels != vert_fetch_pixels) ||
  2030. (vert_fetch_pixels > img_h)) {
  2031. SDE_ERROR_PLANE(psde,
  2032. "req %d/%d, fetch %d/%d, src %dx%d\n",
  2033. hor_req_pixels, vert_req_pixels,
  2034. hor_fetch_pixels, vert_fetch_pixels,
  2035. img_w, img_h);
  2036. return -EINVAL;
  2037. }
  2038. /*
  2039. * swap the scaler src width & height for inline-rotation 90
  2040. * comparison with Pixel-Extension, as PE is based on
  2041. * pre-rotation and QSEED is based on post-rotation
  2042. */
  2043. rot = pstate->rotation & DRM_MODE_ROTATE_90;
  2044. scaler_w = rot ? pstate->scaler3_cfg.src_height[i]
  2045. : pstate->scaler3_cfg.src_width[i];
  2046. scaler_h = rot ? pstate->scaler3_cfg.src_width[i]
  2047. : pstate->scaler3_cfg.src_height[i];
  2048. /*
  2049. * Alpha plane can only be scaled using bilinear or pixel
  2050. * repeat/drop, src_width and src_height are only specified
  2051. * for Y and UV plane
  2052. */
  2053. if (i != 3 && (hor_req_pixels / pre_down_ratio_x != scaler_w ||
  2054. vert_req_pixels / pre_down_ratio_y !=
  2055. scaler_h)) {
  2056. SDE_ERROR_PLANE(psde,
  2057. "roi[%d] roi:%dx%d scaler:%dx%d src:%dx%d rot:%d pd:%d/%d\n",
  2058. i, pstate->pixel_ext.roi_w[i],
  2059. pstate->pixel_ext.roi_h[i], scaler_w, scaler_h,
  2060. src_w, src_h, rot, pre_down_ratio_x, pre_down_ratio_y);
  2061. return -EINVAL;
  2062. }
  2063. /*
  2064. * SSPP fetch , unpack output and QSEED3 input lines need
  2065. * to match for Y plane
  2066. */
  2067. if (i == 0 &&
  2068. (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2069. BIT(SDE_DRM_DEINTERLACE)) &&
  2070. ((pstate->scaler3_cfg.src_height[i] != (src_h/2)) ||
  2071. (pstate->pixel_ext.roi_h[i] != (src_h/2)))) {
  2072. SDE_ERROR_PLANE(psde,
  2073. "de-interlace fail roi[%d] %d/%d, src %dx%d, src %dx%d\n",
  2074. i, pstate->pixel_ext.roi_w[i],
  2075. pstate->pixel_ext.roi_h[i],
  2076. pstate->scaler3_cfg.src_width[i],
  2077. pstate->scaler3_cfg.src_height[i],
  2078. src_w, src_h);
  2079. return -EINVAL;
  2080. }
  2081. }
  2082. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2;
  2083. return 0;
  2084. }
  2085. static int _sde_atomic_check_pre_downscale(struct sde_plane *psde,
  2086. struct sde_plane_state *pstate, struct sde_rect *dst,
  2087. u32 scaler_src_w, u32 scaler_src_h)
  2088. {
  2089. int ret = 0;
  2090. u32 min_ratio_numer, min_ratio_denom;
  2091. min_ratio_numer = psde->pipe_sblk->in_rot_minpredwnscale_num;
  2092. min_ratio_denom = psde->pipe_sblk->in_rot_minpredwnscale_denom;
  2093. if (!(psde->features & BIT(SDE_SSPP_PREDOWNSCALE))) {
  2094. SDE_ERROR_PLANE(psde,
  2095. "hw does not support pre-downscaler: 0x%x\n",
  2096. psde->features);
  2097. ret = -EINVAL;
  2098. } else if (!min_ratio_numer || !min_ratio_denom) {
  2099. SDE_ERROR_PLANE(psde,
  2100. "min downscale ratio not set! %u / %u\n",
  2101. min_ratio_numer, min_ratio_denom);
  2102. ret = -EINVAL;
  2103. } else if ((scaler_src_w < mult_frac(dst->w, min_ratio_numer,
  2104. min_ratio_denom)) || (scaler_src_h < mult_frac(
  2105. dst->h, min_ratio_numer, min_ratio_denom))) {
  2106. SDE_ERROR_PLANE(psde,
  2107. "failed min downscale check %ux%u->%ux%u, %u/%u\n",
  2108. scaler_src_w, scaler_src_h, dst->w, dst->h,
  2109. min_ratio_numer, min_ratio_denom);
  2110. ret = -EINVAL;
  2111. }
  2112. return ret;
  2113. }
  2114. static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state,
  2115. struct sde_plane *psde, const struct sde_format *fmt,
  2116. struct sde_plane_state *pstate, struct sde_rect *src,
  2117. struct sde_rect *dst, u32 width, u32 height)
  2118. {
  2119. int ret = 0;
  2120. uint32_t deci_w, deci_h, src_deci_w, src_deci_h;
  2121. uint32_t scaler_src_w, scaler_src_h;
  2122. uint32_t max_downscale_num, max_downscale_denom;
  2123. uint32_t max_upscale, max_linewidth;
  2124. bool inline_rotation, rt_client, pre_down_en = false;
  2125. struct drm_crtc *crtc;
  2126. struct drm_crtc_state *new_cstate;
  2127. if (!state || !state->state || !state->crtc) {
  2128. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  2129. return -EINVAL;
  2130. }
  2131. deci_w = sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  2132. deci_h = sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  2133. src_deci_w = DECIMATED_DIMENSION(src->w, deci_w);
  2134. src_deci_h = DECIMATED_DIMENSION(src->h, deci_h);
  2135. /* with inline rotator, the source of the scaler is post-rotated */
  2136. inline_rotation = pstate->rotation & DRM_MODE_ROTATE_90 ? true : false;
  2137. if (inline_rotation) {
  2138. scaler_src_w = src_deci_h;
  2139. scaler_src_h = src_deci_w;
  2140. } else {
  2141. scaler_src_w = src_deci_w;
  2142. scaler_src_h = src_deci_h;
  2143. }
  2144. max_upscale = psde->pipe_sblk->maxupscale;
  2145. max_linewidth = psde->pipe_sblk->maxlinewidth;
  2146. if (psde->features & BIT(SDE_SSPP_PREDOWNSCALE))
  2147. pre_down_en = _sde_plane_is_pre_downscale_enabled(
  2148. &pstate->pre_down);
  2149. crtc = state->crtc;
  2150. new_cstate = drm_atomic_get_new_crtc_state(state->state, crtc);
  2151. rt_client = sde_crtc_is_rt_client(crtc, new_cstate);
  2152. max_downscale_num = psde->pipe_sblk->maxdwnscale;
  2153. max_downscale_denom = 1;
  2154. /* inline rotation RT clients have a different max downscaling limit */
  2155. if (inline_rotation) {
  2156. if (rt_client && !pre_down_en) {
  2157. max_downscale_num =
  2158. psde->pipe_sblk->in_rot_minpredwnscale_num;
  2159. max_downscale_denom =
  2160. psde->pipe_sblk->in_rot_minpredwnscale_denom;
  2161. } else if (rt_client) {
  2162. max_downscale_num =
  2163. psde->pipe_sblk->in_rot_maxdwnscale_rt_num;
  2164. max_downscale_denom =
  2165. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom;
  2166. } else {
  2167. max_downscale_num =
  2168. psde->pipe_sblk->in_rot_maxdwnscale_nrt;
  2169. }
  2170. }
  2171. /* decimation validation */
  2172. if ((deci_w || deci_h)
  2173. && ((deci_w > psde->pipe_sblk->maxhdeciexp)
  2174. || (deci_h > psde->pipe_sblk->maxvdeciexp))) {
  2175. SDE_ERROR_PLANE(psde, "too much decimation requested\n");
  2176. ret = -EINVAL;
  2177. } else if ((deci_w || deci_h)
  2178. && (fmt->fetch_mode != SDE_FETCH_LINEAR)) {
  2179. SDE_ERROR_PLANE(psde, "decimation requires linear fetch\n");
  2180. ret = -EINVAL;
  2181. } else if (!(psde->features & SDE_SSPP_SCALER) &&
  2182. ((src->w != dst->w) || (src->h != dst->h))) {
  2183. SDE_ERROR_PLANE(psde,
  2184. "pipe doesn't support scaling %ux%u->%ux%u\n",
  2185. src->w, src->h, dst->w, dst->h);
  2186. ret = -EINVAL;
  2187. /* check decimated source width */
  2188. } else if (src_deci_w > max_linewidth) {
  2189. SDE_ERROR_PLANE(psde,
  2190. "invalid src w:%u, deci w:%u, line w:%u\n",
  2191. src->w, src_deci_w, max_linewidth);
  2192. ret = -E2BIG;
  2193. /* check max scaler capability */
  2194. } else if (((scaler_src_w * max_upscale) < dst->w) ||
  2195. ((scaler_src_h * max_upscale) < dst->h) ||
  2196. (((dst->w * max_downscale_num) / max_downscale_denom)
  2197. < scaler_src_w) ||
  2198. (((dst->h * max_downscale_num) / max_downscale_denom)
  2199. < scaler_src_h)) {
  2200. SDE_ERROR_PLANE(psde,
  2201. "too much scaling %ux%u->%ux%u rot:%d dwn:%d/%d\n",
  2202. scaler_src_w, scaler_src_h, dst->w, dst->h,
  2203. inline_rotation, max_downscale_num,
  2204. max_downscale_denom);
  2205. ret = -E2BIG;
  2206. /* check inline pre-downscale support */
  2207. } else if (inline_rotation && pre_down_en &&
  2208. _sde_atomic_check_pre_downscale(psde, pstate, dst,
  2209. scaler_src_w, scaler_src_h)) {
  2210. ret = -EINVAL;
  2211. /* QSEED validation */
  2212. } else if (_sde_plane_validate_scaler_v2(psde, pstate, fmt,
  2213. width, height, src->w, src->h,
  2214. deci_w, deci_h)) {
  2215. ret = -EINVAL;
  2216. }
  2217. return ret;
  2218. }
  2219. static int _sde_atomic_check_excl_rect(struct sde_plane *psde,
  2220. struct sde_plane_state *pstate, struct sde_rect *src,
  2221. const struct sde_format *fmt, int ret)
  2222. {
  2223. /* check excl rect configs */
  2224. if (!ret && pstate->excl_rect.w && pstate->excl_rect.h) {
  2225. struct sde_rect intersect;
  2226. /*
  2227. * Check exclusion rect against src rect.
  2228. * it must intersect with source rect.
  2229. */
  2230. sde_kms_rect_intersect(src, &pstate->excl_rect, &intersect);
  2231. if (intersect.w != pstate->excl_rect.w ||
  2232. intersect.h != pstate->excl_rect.h ||
  2233. SDE_FORMAT_IS_YUV(fmt)) {
  2234. SDE_ERROR_PLANE(psde,
  2235. "invalid excl_rect:{%d,%d,%d,%d} src:{%d,%d,%d,%d}, fmt: %4.4s\n",
  2236. pstate->excl_rect.x, pstate->excl_rect.y,
  2237. pstate->excl_rect.w, pstate->excl_rect.h,
  2238. src->x, src->y, src->w, src->h,
  2239. (char *)&fmt->base.pixel_format);
  2240. ret = -EINVAL;
  2241. }
  2242. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  2243. pstate->excl_rect.x, pstate->excl_rect.y,
  2244. pstate->excl_rect.w, pstate->excl_rect.h);
  2245. }
  2246. return ret;
  2247. }
  2248. static int sde_plane_sspp_atomic_check(struct drm_plane *plane,
  2249. struct drm_plane_state *state)
  2250. {
  2251. int ret = 0;
  2252. struct sde_plane *psde;
  2253. struct sde_plane_state *pstate;
  2254. const struct msm_format *msm_fmt;
  2255. const struct sde_format *fmt;
  2256. struct sde_rect src, dst;
  2257. uint32_t min_src_size;
  2258. bool q16_data = true;
  2259. struct drm_framebuffer *fb;
  2260. u32 width;
  2261. u32 height;
  2262. psde = to_sde_plane(plane);
  2263. pstate = to_sde_plane_state(state);
  2264. if (!psde->pipe_sblk) {
  2265. SDE_ERROR_PLANE(psde, "invalid catalog\n");
  2266. return -EINVAL;
  2267. }
  2268. /* src values are in Q16 fixed point, convert to integer */
  2269. POPULATE_RECT(&src, state->src_x, state->src_y,
  2270. state->src_w, state->src_h, q16_data);
  2271. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y, state->crtc_w,
  2272. state->crtc_h, !q16_data);
  2273. SDE_DEBUG_PLANE(psde, "check %d -> %d\n",
  2274. sde_plane_enabled(plane->state), sde_plane_enabled(state));
  2275. if (!sde_plane_enabled(state))
  2276. goto modeset_update;
  2277. fb = state->fb;
  2278. width = fb ? state->fb->width : 0x0;
  2279. height = fb ? state->fb->height : 0x0;
  2280. SDE_DEBUG("plane%d sspp:%x/%dx%d/%4.4s/%llx\n",
  2281. plane->base.id,
  2282. pstate->rotation,
  2283. width, height,
  2284. fb ? (char *) &state->fb->format->format : 0x0,
  2285. fb ? state->fb->modifier : 0x0);
  2286. SDE_DEBUG("src:%dx%d %d,%d crtc:%dx%d+%d+%d\n",
  2287. state->src_w >> 16, state->src_h >> 16,
  2288. state->src_x >> 16, state->src_y >> 16,
  2289. state->crtc_w, state->crtc_h,
  2290. state->crtc_x, state->crtc_y);
  2291. msm_fmt = msm_framebuffer_format(fb);
  2292. fmt = to_sde_format(msm_fmt);
  2293. min_src_size = SDE_FORMAT_IS_YUV(fmt) ? 2 : 1;
  2294. if (SDE_FORMAT_IS_YUV(fmt) &&
  2295. (!(psde->features & SDE_SSPP_SCALER) ||
  2296. !(psde->features & (BIT(SDE_SSPP_CSC)
  2297. | BIT(SDE_SSPP_CSC_10BIT))))) {
  2298. SDE_ERROR_PLANE(psde,
  2299. "plane doesn't have scaler/csc for yuv\n");
  2300. ret = -EINVAL;
  2301. /* check src bounds */
  2302. } else if (width > MAX_IMG_WIDTH ||
  2303. height > MAX_IMG_HEIGHT ||
  2304. src.w < min_src_size || src.h < min_src_size ||
  2305. CHECK_LAYER_BOUNDS(src.x, src.w, width) ||
  2306. CHECK_LAYER_BOUNDS(src.y, src.h, height)) {
  2307. SDE_ERROR_PLANE(psde, "invalid source %u, %u, %ux%u\n",
  2308. src.x, src.y, src.w, src.h);
  2309. ret = -E2BIG;
  2310. /* valid yuv image */
  2311. } else if (SDE_FORMAT_IS_YUV(fmt) && ((src.x & 0x1) || (src.y & 0x1) ||
  2312. (src.w & 0x1) || (src.h & 0x1))) {
  2313. SDE_ERROR_PLANE(psde, "invalid yuv source %u, %u, %ux%u\n",
  2314. src.x, src.y, src.w, src.h);
  2315. ret = -EINVAL;
  2316. /* min dst support */
  2317. } else if (dst.w < 0x1 || dst.h < 0x1) {
  2318. SDE_ERROR_PLANE(psde, "invalid dest rect %u, %u, %ux%u\n",
  2319. dst.x, dst.y, dst.w, dst.h);
  2320. ret = -EINVAL;
  2321. }
  2322. if (ret)
  2323. return ret;
  2324. ret = _sde_atomic_check_decimation_scaler(state, psde, fmt, pstate,
  2325. &src, &dst, width, height);
  2326. if (ret)
  2327. return ret;
  2328. ret = _sde_atomic_check_excl_rect(psde, pstate,
  2329. &src, fmt, ret);
  2330. if (ret)
  2331. return ret;
  2332. pstate->const_alpha_en = fmt->alpha_enable &&
  2333. (SDE_DRM_BLEND_OP_OPAQUE !=
  2334. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)) &&
  2335. (pstate->stage != SDE_STAGE_0);
  2336. modeset_update:
  2337. if (!ret)
  2338. _sde_plane_sspp_atomic_check_mode_changed(psde,
  2339. state, plane->state);
  2340. return ret;
  2341. }
  2342. static int sde_plane_atomic_check(struct drm_plane *plane,
  2343. struct drm_plane_state *state)
  2344. {
  2345. int ret = 0;
  2346. struct sde_plane *psde;
  2347. struct sde_plane_state *pstate;
  2348. if (!plane || !state) {
  2349. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  2350. !plane, !state);
  2351. ret = -EINVAL;
  2352. goto exit;
  2353. }
  2354. psde = to_sde_plane(plane);
  2355. pstate = to_sde_plane_state(state);
  2356. SDE_DEBUG_PLANE(psde, "\n");
  2357. ret = sde_plane_rot_atomic_check(plane, state);
  2358. if (ret)
  2359. goto exit;
  2360. ret = sde_plane_sspp_atomic_check(plane, state);
  2361. exit:
  2362. return ret;
  2363. }
  2364. void sde_plane_flush(struct drm_plane *plane)
  2365. {
  2366. struct sde_plane *psde;
  2367. struct sde_plane_state *pstate;
  2368. if (!plane || !plane->state) {
  2369. SDE_ERROR("invalid plane\n");
  2370. return;
  2371. }
  2372. psde = to_sde_plane(plane);
  2373. pstate = to_sde_plane_state(plane->state);
  2374. /*
  2375. * These updates have to be done immediately before the plane flush
  2376. * timing, and may not be moved to the atomic_update/mode_set functions.
  2377. */
  2378. if (psde->is_error)
  2379. /* force white frame with 100% alpha pipe output on error */
  2380. _sde_plane_color_fill(psde, 0xFFFFFF, 0xFF);
  2381. else if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG)
  2382. /* force 100% alpha */
  2383. _sde_plane_color_fill(psde, psde->color_fill, 0xFF);
  2384. else if (psde->pipe_hw && psde->csc_ptr && psde->pipe_hw->ops.setup_csc)
  2385. psde->pipe_hw->ops.setup_csc(psde->pipe_hw, psde->csc_ptr);
  2386. /* flag h/w flush complete */
  2387. if (plane->state)
  2388. pstate->pending = false;
  2389. }
  2390. /**
  2391. * sde_plane_set_error: enable/disable error condition
  2392. * @plane: pointer to drm_plane structure
  2393. */
  2394. void sde_plane_set_error(struct drm_plane *plane, bool error)
  2395. {
  2396. struct sde_plane *psde;
  2397. if (!plane)
  2398. return;
  2399. psde = to_sde_plane(plane);
  2400. psde->is_error = error;
  2401. }
  2402. static void _sde_plane_sspp_setup_sys_cache(struct sde_plane *psde,
  2403. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2404. {
  2405. if (!psde->pipe_hw->ops.setup_sys_cache ||
  2406. !(psde->perf_features & BIT(SDE_PERF_SSPP_SYS_CACHE)))
  2407. return;
  2408. SDE_DEBUG("features:0x%x rotation:0x%x\n",
  2409. psde->features, pstate->rotation);
  2410. if ((pstate->rotation & DRM_MODE_ROTATE_90) &&
  2411. sde_format_is_tp10_ubwc(fmt)) {
  2412. pstate->sc_cfg.rd_en = true;
  2413. pstate->sc_cfg.rd_scid =
  2414. psde->pipe_sblk->llcc_scid;
  2415. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2416. SSPP_SYS_CACHE_SCID;
  2417. } else {
  2418. pstate->sc_cfg.rd_en = false;
  2419. pstate->sc_cfg.rd_scid = 0x0;
  2420. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2421. SSPP_SYS_CACHE_SCID;
  2422. }
  2423. psde->pipe_hw->ops.setup_sys_cache(
  2424. psde->pipe_hw, &pstate->sc_cfg);
  2425. }
  2426. static void _sde_plane_map_prop_to_dirty_bits(void)
  2427. {
  2428. plane_prop_array[PLANE_PROP_SCALER_V1] =
  2429. plane_prop_array[PLANE_PROP_SCALER_V2] =
  2430. plane_prop_array[PLANE_PROP_SCALER_LUT_ED] =
  2431. plane_prop_array[PLANE_PROP_SCALER_LUT_CIR] =
  2432. plane_prop_array[PLANE_PROP_SCALER_LUT_SEP] =
  2433. plane_prop_array[PLANE_PROP_H_DECIMATE] =
  2434. plane_prop_array[PLANE_PROP_V_DECIMATE] =
  2435. plane_prop_array[PLANE_PROP_SRC_CONFIG] =
  2436. plane_prop_array[PLANE_PROP_ZPOS] =
  2437. plane_prop_array[PLANE_PROP_EXCL_RECT_V1] =
  2438. SDE_PLANE_DIRTY_RECTS;
  2439. plane_prop_array[PLANE_PROP_CSC_V1] =
  2440. plane_prop_array[PLANE_PROP_CSC_DMA_V1] =
  2441. plane_prop_array[PLANE_PROP_INVERSE_PMA] =
  2442. SDE_PLANE_DIRTY_FORMAT;
  2443. plane_prop_array[PLANE_PROP_MULTIRECT_MODE] =
  2444. plane_prop_array[PLANE_PROP_COLOR_FILL] =
  2445. SDE_PLANE_DIRTY_ALL;
  2446. /* no special action required */
  2447. plane_prop_array[PLANE_PROP_INFO] =
  2448. plane_prop_array[PLANE_PROP_ALPHA] =
  2449. plane_prop_array[PLANE_PROP_INPUT_FENCE] =
  2450. plane_prop_array[PLANE_PROP_BLEND_OP] = 0;
  2451. plane_prop_array[PLANE_PROP_FB_TRANSLATION_MODE] =
  2452. SDE_PLANE_DIRTY_FB_TRANSLATION_MODE;
  2453. plane_prop_array[PLANE_PROP_PREFILL_SIZE] =
  2454. plane_prop_array[PLANE_PROP_PREFILL_TIME] =
  2455. SDE_PLANE_DIRTY_PERF;
  2456. plane_prop_array[PLANE_PROP_VIG_GAMUT] = SDE_PLANE_DIRTY_VIG_GAMUT;
  2457. plane_prop_array[PLANE_PROP_VIG_IGC] = SDE_PLANE_DIRTY_VIG_IGC;
  2458. plane_prop_array[PLANE_PROP_DMA_IGC] = SDE_PLANE_DIRTY_DMA_IGC;
  2459. plane_prop_array[PLANE_PROP_DMA_GC] = SDE_PLANE_DIRTY_DMA_GC;
  2460. plane_prop_array[PLANE_PROP_SKIN_COLOR] =
  2461. plane_prop_array[PLANE_PROP_SKY_COLOR] =
  2462. plane_prop_array[PLANE_PROP_FOLIAGE_COLOR] =
  2463. plane_prop_array[PLANE_PROP_HUE_ADJUST] =
  2464. plane_prop_array[PLANE_PROP_SATURATION_ADJUST] =
  2465. plane_prop_array[PLANE_PROP_VALUE_ADJUST] =
  2466. plane_prop_array[PLANE_PROP_CONTRAST_ADJUST] =
  2467. SDE_PLANE_DIRTY_ALL;
  2468. }
  2469. static inline bool _sde_plane_allow_uidle(struct sde_plane *psde,
  2470. struct sde_rect *src, struct sde_rect *dst)
  2471. {
  2472. u32 max_downscale = psde->catalog->uidle_cfg.max_dwnscale;
  2473. u32 downscale = (src->h * 1000)/dst->h;
  2474. return (downscale > max_downscale) ? false : true;
  2475. }
  2476. static void _sde_plane_setup_uidle(struct drm_crtc *crtc,
  2477. struct sde_plane *psde, struct sde_plane_state *pstate,
  2478. struct sde_rect *src, struct sde_rect *dst)
  2479. {
  2480. struct sde_hw_pipe_uidle_cfg cfg;
  2481. u32 line_time = sde_get_linetime(&crtc->mode); /* nS */
  2482. u32 fal1_target_idle_time_ns =
  2483. psde->catalog->uidle_cfg.fal1_target_idle_time * 1000; /* nS */
  2484. u32 fal10_target_idle_time_ns =
  2485. psde->catalog->uidle_cfg.fal10_target_idle_time * 1000; /* nS */
  2486. u32 fal10_threshold =
  2487. psde->catalog->uidle_cfg.fal10_threshold; /* uS */
  2488. if (line_time && fal10_threshold && fal10_target_idle_time_ns &&
  2489. fal1_target_idle_time_ns) {
  2490. cfg.enable = _sde_plane_allow_uidle(psde, src, dst);
  2491. cfg.fal10_threshold = fal10_threshold;
  2492. cfg.fal10_exit_threshold = fal10_threshold + 2;
  2493. cfg.fal1_threshold = 1 +
  2494. (fal1_target_idle_time_ns*1000/line_time*2)/1000;
  2495. cfg.fal_allowed_threshold = fal10_threshold +
  2496. (fal10_target_idle_time_ns*1000/line_time*2)/1000;
  2497. } else {
  2498. SDE_ERROR("invalid settings, will disable UIDLE %d %d %d %d\n",
  2499. line_time, fal10_threshold, fal10_target_idle_time_ns,
  2500. fal1_target_idle_time_ns);
  2501. memset(&cfg, 0, sizeof(struct sde_hw_pipe_uidle_cfg));
  2502. }
  2503. SDE_DEBUG_PLANE(psde,
  2504. "tholds: fal10=%d fal10_exit=%d fal1=%d fal_allowed=%d\n",
  2505. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2506. cfg.fal1_threshold, cfg.fal_allowed_threshold);
  2507. SDE_DEBUG_PLANE(psde,
  2508. "times: line:%d fal1_idle:%d fal10_idle:%d dwnscale:%d\n",
  2509. line_time, fal1_target_idle_time_ns,
  2510. fal10_target_idle_time_ns,
  2511. psde->catalog->uidle_cfg.max_dwnscale);
  2512. SDE_EVT32_VERBOSE(cfg.enable,
  2513. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2514. cfg.fal1_threshold, cfg.fal_allowed_threshold,
  2515. psde->catalog->uidle_cfg.max_dwnscale);
  2516. psde->pipe_hw->ops.setup_uidle(
  2517. psde->pipe_hw, &cfg,
  2518. pstate->multirect_index);
  2519. }
  2520. static void _sde_plane_update_secure_session(struct sde_plane *psde,
  2521. struct sde_plane_state *pstate)
  2522. {
  2523. bool enable = false;
  2524. int mode = sde_plane_get_property(pstate,
  2525. PLANE_PROP_FB_TRANSLATION_MODE);
  2526. if ((mode == SDE_DRM_FB_SEC) ||
  2527. (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  2528. enable = true;
  2529. /* update secure session flag */
  2530. psde->pipe_hw->ops.setup_secure_address(psde->pipe_hw,
  2531. pstate->multirect_index,
  2532. enable);
  2533. }
  2534. static void _sde_plane_update_roi_config(struct drm_plane *plane,
  2535. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2536. {
  2537. const struct sde_format *fmt;
  2538. const struct msm_format *msm_fmt;
  2539. struct sde_plane *psde;
  2540. struct drm_plane_state *state;
  2541. struct sde_plane_state *pstate;
  2542. struct sde_rect src, dst;
  2543. const struct sde_rect *crtc_roi;
  2544. bool q16_data = true;
  2545. int idx;
  2546. psde = to_sde_plane(plane);
  2547. state = plane->state;
  2548. pstate = to_sde_plane_state(state);
  2549. msm_fmt = msm_framebuffer_format(fb);
  2550. if (!msm_fmt) {
  2551. SDE_ERROR("crtc%d plane%d: null format\n",
  2552. DRMID(crtc), DRMID(plane));
  2553. return;
  2554. }
  2555. fmt = to_sde_format(msm_fmt);
  2556. POPULATE_RECT(&src, state->src_x, state->src_y,
  2557. state->src_w, state->src_h, q16_data);
  2558. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y,
  2559. state->crtc_w, state->crtc_h, !q16_data);
  2560. SDE_DEBUG_PLANE(psde,
  2561. "FB[%u] %u,%u,%ux%u->crtc%u %d,%d,%ux%u, %4.4s ubwc %d\n",
  2562. fb->base.id, src.x, src.y, src.w, src.h,
  2563. crtc->base.id, dst.x, dst.y, dst.w, dst.h,
  2564. (char *)&fmt->base.pixel_format,
  2565. SDE_FORMAT_IS_UBWC(fmt));
  2566. if (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2567. BIT(SDE_DRM_DEINTERLACE)) {
  2568. SDE_DEBUG_PLANE(psde, "deinterlace\n");
  2569. for (idx = 0; idx < SDE_MAX_PLANES; ++idx)
  2570. psde->pipe_cfg.layout.plane_pitch[idx] <<= 1;
  2571. src.h /= 2;
  2572. src.y = DIV_ROUND_UP(src.y, 2);
  2573. src.y &= ~0x1;
  2574. }
  2575. /*
  2576. * adjust layer mixer position of the sspp in the presence
  2577. * of a partial update to the active lm origin
  2578. */
  2579. sde_crtc_get_crtc_roi(crtc->state, &crtc_roi);
  2580. dst.x -= crtc_roi->x;
  2581. dst.y -= crtc_roi->y;
  2582. /* check for UIDLE */
  2583. if (psde->pipe_hw->ops.setup_uidle)
  2584. _sde_plane_setup_uidle(crtc, psde, pstate, &src, &dst);
  2585. psde->pipe_cfg.src_rect = src;
  2586. psde->pipe_cfg.dst_rect = dst;
  2587. _sde_plane_setup_scaler(psde, pstate, fmt, false);
  2588. /* check for color fill */
  2589. psde->color_fill = (uint32_t)sde_plane_get_property(pstate,
  2590. PLANE_PROP_COLOR_FILL);
  2591. if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG) {
  2592. /* skip remaining processing on color fill */
  2593. pstate->dirty = 0x0;
  2594. } else if (psde->pipe_hw->ops.setup_rects) {
  2595. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  2596. &psde->pipe_cfg,
  2597. pstate->multirect_index);
  2598. }
  2599. if (psde->pipe_hw->ops.setup_pe &&
  2600. (pstate->multirect_index != SDE_SSPP_RECT_1))
  2601. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  2602. &pstate->pixel_ext);
  2603. /**
  2604. * when programmed in multirect mode, scalar block will be
  2605. * bypassed. Still we need to update alpha and bitwidth
  2606. * ONLY for RECT0
  2607. */
  2608. if (psde->pipe_hw->ops.setup_scaler &&
  2609. pstate->multirect_index != SDE_SSPP_RECT_1) {
  2610. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  2611. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  2612. &psde->pipe_cfg, &pstate->pixel_ext,
  2613. &pstate->scaler3_cfg);
  2614. }
  2615. /* update excl rect */
  2616. if (psde->pipe_hw->ops.setup_excl_rect)
  2617. psde->pipe_hw->ops.setup_excl_rect(psde->pipe_hw,
  2618. &pstate->excl_rect,
  2619. pstate->multirect_index);
  2620. if (psde->pipe_hw->ops.setup_multirect)
  2621. psde->pipe_hw->ops.setup_multirect(
  2622. psde->pipe_hw,
  2623. pstate->multirect_index,
  2624. pstate->multirect_mode);
  2625. }
  2626. static void _sde_plane_update_format_and_rects(struct sde_plane *psde,
  2627. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2628. {
  2629. uint32_t src_flags = 0;
  2630. SDE_DEBUG_PLANE(psde, "rotation 0x%X\n", pstate->rotation);
  2631. if (pstate->rotation & DRM_MODE_REFLECT_X)
  2632. src_flags |= SDE_SSPP_FLIP_LR;
  2633. if (pstate->rotation & DRM_MODE_REFLECT_Y)
  2634. src_flags |= SDE_SSPP_FLIP_UD;
  2635. if (pstate->rotation & DRM_MODE_ROTATE_90)
  2636. src_flags |= SDE_SSPP_ROT_90;
  2637. /* update format */
  2638. psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt,
  2639. pstate->const_alpha_en, src_flags,
  2640. pstate->multirect_index);
  2641. if (psde->pipe_hw->ops.setup_cdp) {
  2642. struct sde_hw_pipe_cdp_cfg *cdp_cfg = &pstate->cdp_cfg;
  2643. memset(cdp_cfg, 0, sizeof(struct sde_hw_pipe_cdp_cfg));
  2644. cdp_cfg->enable = psde->catalog->perf.cdp_cfg
  2645. [SDE_PERF_CDP_USAGE_RT].rd_enable;
  2646. cdp_cfg->ubwc_meta_enable =
  2647. SDE_FORMAT_IS_UBWC(fmt);
  2648. cdp_cfg->tile_amortize_enable =
  2649. SDE_FORMAT_IS_UBWC(fmt) ||
  2650. SDE_FORMAT_IS_TILE(fmt);
  2651. cdp_cfg->preload_ahead = SDE_WB_CDP_PRELOAD_AHEAD_64;
  2652. psde->pipe_hw->ops.setup_cdp(psde->pipe_hw, cdp_cfg,
  2653. pstate->multirect_index);
  2654. }
  2655. _sde_plane_sspp_setup_sys_cache(psde, pstate, fmt);
  2656. /* update csc */
  2657. if (SDE_FORMAT_IS_YUV(fmt))
  2658. _sde_plane_setup_csc(psde);
  2659. else
  2660. psde->csc_ptr = 0;
  2661. if (psde->pipe_hw->ops.setup_inverse_pma) {
  2662. uint32_t pma_mode = 0;
  2663. if (fmt->alpha_enable)
  2664. pma_mode = (uint32_t) sde_plane_get_property(
  2665. pstate, PLANE_PROP_INVERSE_PMA);
  2666. psde->pipe_hw->ops.setup_inverse_pma(psde->pipe_hw,
  2667. pstate->multirect_index, pma_mode);
  2668. }
  2669. if (psde->pipe_hw->ops.setup_dgm_csc)
  2670. psde->pipe_hw->ops.setup_dgm_csc(psde->pipe_hw,
  2671. pstate->multirect_index, psde->csc_usr_ptr);
  2672. }
  2673. static void _sde_plane_update_sharpening(struct sde_plane *psde)
  2674. {
  2675. psde->sharp_cfg.strength = SHARP_STRENGTH_DEFAULT;
  2676. psde->sharp_cfg.edge_thr = SHARP_EDGE_THR_DEFAULT;
  2677. psde->sharp_cfg.smooth_thr = SHARP_SMOOTH_THR_DEFAULT;
  2678. psde->sharp_cfg.noise_thr = SHARP_NOISE_THR_DEFAULT;
  2679. psde->pipe_hw->ops.setup_sharpening(psde->pipe_hw,
  2680. &psde->sharp_cfg);
  2681. }
  2682. static void _sde_plane_update_properties(struct drm_plane *plane,
  2683. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2684. {
  2685. uint32_t nplanes;
  2686. const struct msm_format *msm_fmt;
  2687. const struct sde_format *fmt;
  2688. struct sde_plane *psde;
  2689. struct drm_plane_state *state;
  2690. struct sde_plane_state *pstate;
  2691. psde = to_sde_plane(plane);
  2692. state = plane->state;
  2693. pstate = to_sde_plane_state(state);
  2694. if (!pstate) {
  2695. SDE_ERROR("invalid plane state for plane%d\n", DRMID(plane));
  2696. return;
  2697. }
  2698. msm_fmt = msm_framebuffer_format(fb);
  2699. if (!msm_fmt) {
  2700. SDE_ERROR("crtc%d plane%d: null format\n",
  2701. DRMID(crtc), DRMID(plane));
  2702. return;
  2703. }
  2704. fmt = to_sde_format(msm_fmt);
  2705. nplanes = fmt->num_planes;
  2706. /* update secure session flag */
  2707. if (pstate->dirty & SDE_PLANE_DIRTY_FB_TRANSLATION_MODE)
  2708. _sde_plane_update_secure_session(psde, pstate);
  2709. /* update roi config */
  2710. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2711. _sde_plane_update_roi_config(plane, crtc, fb);
  2712. if ((pstate->dirty & SDE_PLANE_DIRTY_FORMAT ||
  2713. pstate->dirty & SDE_PLANE_DIRTY_RECTS) &&
  2714. psde->pipe_hw->ops.setup_format)
  2715. _sde_plane_update_format_and_rects(psde, pstate, fmt);
  2716. sde_color_process_plane_setup(plane);
  2717. /* update sharpening */
  2718. if ((pstate->dirty & SDE_PLANE_DIRTY_SHARPEN) &&
  2719. psde->pipe_hw->ops.setup_sharpening)
  2720. _sde_plane_update_sharpening(psde);
  2721. _sde_plane_set_qos_lut(plane, fb);
  2722. _sde_plane_set_danger_lut(plane, fb);
  2723. if (plane->type != DRM_PLANE_TYPE_CURSOR) {
  2724. _sde_plane_set_qos_ctrl(plane, true, SDE_PLANE_QOS_PANIC_CTRL);
  2725. _sde_plane_set_ot_limit(plane, crtc);
  2726. if (pstate->dirty & SDE_PLANE_DIRTY_PERF)
  2727. _sde_plane_set_ts_prefill(plane, pstate);
  2728. }
  2729. if ((pstate->dirty & SDE_PLANE_DIRTY_ALL) == SDE_PLANE_DIRTY_ALL)
  2730. _sde_plane_set_qos_remap(plane, true);
  2731. else
  2732. _sde_plane_set_qos_remap(plane, false);
  2733. /* clear dirty */
  2734. pstate->dirty = 0x0;
  2735. }
  2736. static int sde_plane_sspp_atomic_update(struct drm_plane *plane,
  2737. struct drm_plane_state *old_state)
  2738. {
  2739. struct sde_plane *psde;
  2740. struct drm_plane_state *state;
  2741. struct sde_plane_state *pstate;
  2742. struct sde_plane_state *old_pstate;
  2743. struct drm_crtc *crtc;
  2744. struct drm_framebuffer *fb;
  2745. int idx;
  2746. int dirty_prop_flag;
  2747. if (!plane) {
  2748. SDE_ERROR("invalid plane\n");
  2749. return -EINVAL;
  2750. } else if (!plane->state) {
  2751. SDE_ERROR("invalid plane state\n");
  2752. return -EINVAL;
  2753. } else if (!old_state) {
  2754. SDE_ERROR("invalid old state\n");
  2755. return -EINVAL;
  2756. }
  2757. psde = to_sde_plane(plane);
  2758. state = plane->state;
  2759. pstate = to_sde_plane_state(state);
  2760. old_pstate = to_sde_plane_state(old_state);
  2761. crtc = state->crtc;
  2762. fb = state->fb;
  2763. if (!crtc || !fb) {
  2764. SDE_ERROR_PLANE(psde, "invalid crtc %d or fb %d\n",
  2765. !crtc, !fb);
  2766. return -EINVAL;
  2767. }
  2768. SDE_DEBUG(
  2769. "plane%d sspp:%dx%d/%4.4s/%llx/%dx%d+%d+%d/%x crtc:%dx%d+%d+%d\n",
  2770. plane->base.id,
  2771. state->fb->width, state->fb->height,
  2772. (char *) &state->fb->format->format,
  2773. state->fb->modifier,
  2774. state->src_w >> 16, state->src_h >> 16,
  2775. state->src_x >> 16, state->src_y >> 16,
  2776. pstate->rotation,
  2777. state->crtc_w, state->crtc_h,
  2778. state->crtc_x, state->crtc_y);
  2779. /* force reprogramming of all the parameters, if the flag is set */
  2780. if (psde->revalidate) {
  2781. SDE_DEBUG("plane:%d - reconfigure all the parameters\n",
  2782. plane->base.id);
  2783. pstate->dirty = SDE_PLANE_DIRTY_ALL | SDE_PLANE_DIRTY_CP;
  2784. psde->revalidate = false;
  2785. }
  2786. /* determine what needs to be refreshed */
  2787. mutex_lock(&psde->property_info.property_lock);
  2788. while ((idx = msm_property_pop_dirty(&psde->property_info,
  2789. &pstate->property_state)) >= 0) {
  2790. dirty_prop_flag = plane_prop_array[idx];
  2791. pstate->dirty |= dirty_prop_flag;
  2792. }
  2793. mutex_unlock(&psde->property_info.property_lock);
  2794. /**
  2795. * since plane_atomic_check is invoked before crtc_atomic_check
  2796. * in the commit sequence, all the parameters for updating the
  2797. * plane dirty flag will not be available during
  2798. * plane_atomic_check as some features params are updated
  2799. * in crtc_atomic_check (eg.:sDMA). So check for mode_change
  2800. * before sspp update.
  2801. */
  2802. _sde_plane_sspp_atomic_check_mode_changed(psde, state,
  2803. old_state);
  2804. /* re-program the output rects always if partial update roi changed */
  2805. if (sde_crtc_is_crtc_roi_dirty(crtc->state))
  2806. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  2807. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2808. memset(&(psde->pipe_cfg), 0, sizeof(struct sde_hw_pipe_cfg));
  2809. _sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb);
  2810. /* early out if nothing dirty */
  2811. if (!pstate->dirty)
  2812. return 0;
  2813. pstate->pending = true;
  2814. psde->is_rt_pipe = sde_crtc_is_rt_client(crtc, crtc->state);
  2815. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  2816. _sde_plane_update_properties(plane, crtc, fb);
  2817. return 0;
  2818. }
  2819. static void _sde_plane_atomic_disable(struct drm_plane *plane,
  2820. struct drm_plane_state *old_state)
  2821. {
  2822. struct sde_plane *psde;
  2823. struct drm_plane_state *state;
  2824. struct sde_plane_state *pstate;
  2825. if (!plane) {
  2826. SDE_ERROR("invalid plane\n");
  2827. return;
  2828. } else if (!plane->state) {
  2829. SDE_ERROR("invalid plane state\n");
  2830. return;
  2831. } else if (!old_state) {
  2832. SDE_ERROR("invalid old state\n");
  2833. return;
  2834. }
  2835. psde = to_sde_plane(plane);
  2836. state = plane->state;
  2837. pstate = to_sde_plane_state(state);
  2838. SDE_EVT32(DRMID(plane), is_sde_plane_virtual(plane),
  2839. pstate->multirect_mode);
  2840. pstate->pending = true;
  2841. if (is_sde_plane_virtual(plane) &&
  2842. psde->pipe_hw && psde->pipe_hw->ops.setup_multirect)
  2843. psde->pipe_hw->ops.setup_multirect(psde->pipe_hw,
  2844. SDE_SSPP_RECT_SOLO, SDE_SSPP_MULTIRECT_NONE);
  2845. }
  2846. static void sde_plane_atomic_update(struct drm_plane *plane,
  2847. struct drm_plane_state *old_state)
  2848. {
  2849. struct sde_plane *psde;
  2850. struct drm_plane_state *state;
  2851. if (!plane) {
  2852. SDE_ERROR("invalid plane\n");
  2853. return;
  2854. } else if (!plane->state) {
  2855. SDE_ERROR("invalid plane state\n");
  2856. return;
  2857. }
  2858. psde = to_sde_plane(plane);
  2859. psde->is_error = false;
  2860. state = plane->state;
  2861. SDE_DEBUG_PLANE(psde, "\n");
  2862. if (!sde_plane_enabled(state)) {
  2863. _sde_plane_atomic_disable(plane, old_state);
  2864. } else {
  2865. int ret;
  2866. ret = sde_plane_sspp_atomic_update(plane, old_state);
  2867. /* atomic_check should have ensured that this doesn't fail */
  2868. WARN_ON(ret < 0);
  2869. }
  2870. }
  2871. void sde_plane_restore(struct drm_plane *plane)
  2872. {
  2873. struct sde_plane *psde;
  2874. if (!plane || !plane->state) {
  2875. SDE_ERROR("invalid plane\n");
  2876. return;
  2877. }
  2878. psde = to_sde_plane(plane);
  2879. /*
  2880. * Revalidate is only true here if idle PC occurred and
  2881. * there is no plane state update in current commit cycle.
  2882. */
  2883. if (!psde->revalidate)
  2884. return;
  2885. SDE_DEBUG_PLANE(psde, "\n");
  2886. /* last plane state is same as current state */
  2887. sde_plane_atomic_update(plane, plane->state);
  2888. }
  2889. bool sde_plane_is_cache_required(struct drm_plane *plane)
  2890. {
  2891. struct sde_plane_state *pstate;
  2892. if (!plane || !plane->state) {
  2893. SDE_ERROR("invalid plane\n");
  2894. return false;
  2895. }
  2896. pstate = to_sde_plane_state(plane->state);
  2897. /* check if llcc is required for the plane */
  2898. if (pstate->sc_cfg.rd_en)
  2899. return true;
  2900. else
  2901. return false;
  2902. }
  2903. static void _sde_plane_install_non_master_properties(struct sde_plane *psde)
  2904. {
  2905. char feature_name[256];
  2906. if (psde->pipe_sblk->maxhdeciexp) {
  2907. msm_property_install_range(&psde->property_info,
  2908. "h_decimate", 0x0, 0,
  2909. psde->pipe_sblk->maxhdeciexp, 0,
  2910. PLANE_PROP_H_DECIMATE);
  2911. }
  2912. if (psde->pipe_sblk->maxvdeciexp) {
  2913. msm_property_install_range(&psde->property_info,
  2914. "v_decimate", 0x0, 0,
  2915. psde->pipe_sblk->maxvdeciexp, 0,
  2916. PLANE_PROP_V_DECIMATE);
  2917. }
  2918. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  2919. msm_property_install_range(
  2920. &psde->property_info, "scaler_v2",
  2921. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2922. msm_property_install_blob(&psde->property_info,
  2923. "lut_ed", 0, PLANE_PROP_SCALER_LUT_ED);
  2924. msm_property_install_blob(&psde->property_info,
  2925. "lut_cir", 0,
  2926. PLANE_PROP_SCALER_LUT_CIR);
  2927. msm_property_install_blob(&psde->property_info,
  2928. "lut_sep", 0,
  2929. PLANE_PROP_SCALER_LUT_SEP);
  2930. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE)) {
  2931. msm_property_install_range(
  2932. &psde->property_info, "scaler_v2",
  2933. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2934. msm_property_install_blob(&psde->property_info,
  2935. "lut_sep", 0,
  2936. PLANE_PROP_SCALER_LUT_SEP);
  2937. } else if (psde->features & SDE_SSPP_SCALER) {
  2938. msm_property_install_range(
  2939. &psde->property_info, "scaler_v1", 0x0,
  2940. 0, ~0, 0, PLANE_PROP_SCALER_V1);
  2941. }
  2942. if (psde->features & BIT(SDE_SSPP_CSC) ||
  2943. psde->features & BIT(SDE_SSPP_CSC_10BIT))
  2944. msm_property_install_volatile_range(
  2945. &psde->property_info, "csc_v1", 0x0,
  2946. 0, ~0, 0, PLANE_PROP_CSC_V1);
  2947. if (psde->features & BIT(SDE_SSPP_HSIC)) {
  2948. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2949. "SDE_SSPP_HUE_V",
  2950. psde->pipe_sblk->hsic_blk.version >> 16);
  2951. msm_property_install_range(&psde->property_info,
  2952. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2953. PLANE_PROP_HUE_ADJUST);
  2954. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2955. "SDE_SSPP_SATURATION_V",
  2956. psde->pipe_sblk->hsic_blk.version >> 16);
  2957. msm_property_install_range(&psde->property_info,
  2958. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2959. PLANE_PROP_SATURATION_ADJUST);
  2960. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2961. "SDE_SSPP_VALUE_V",
  2962. psde->pipe_sblk->hsic_blk.version >> 16);
  2963. msm_property_install_range(&psde->property_info,
  2964. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2965. PLANE_PROP_VALUE_ADJUST);
  2966. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2967. "SDE_SSPP_CONTRAST_V",
  2968. psde->pipe_sblk->hsic_blk.version >> 16);
  2969. msm_property_install_range(&psde->property_info,
  2970. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2971. PLANE_PROP_CONTRAST_ADJUST);
  2972. }
  2973. }
  2974. /* helper to install properties which are common to planes and crtcs */
  2975. static void _sde_plane_install_properties(struct drm_plane *plane,
  2976. struct sde_mdss_cfg *catalog, u32 master_plane_id)
  2977. {
  2978. static const struct drm_prop_enum_list e_blend_op[] = {
  2979. {SDE_DRM_BLEND_OP_NOT_DEFINED, "not_defined"},
  2980. {SDE_DRM_BLEND_OP_OPAQUE, "opaque"},
  2981. {SDE_DRM_BLEND_OP_PREMULTIPLIED, "premultiplied"},
  2982. {SDE_DRM_BLEND_OP_COVERAGE, "coverage"}
  2983. };
  2984. static const struct drm_prop_enum_list e_src_config[] = {
  2985. {SDE_DRM_DEINTERLACE, "deinterlace"}
  2986. };
  2987. static const struct drm_prop_enum_list e_fb_translation_mode[] = {
  2988. {SDE_DRM_FB_NON_SEC, "non_sec"},
  2989. {SDE_DRM_FB_SEC, "sec"},
  2990. {SDE_DRM_FB_NON_SEC_DIR_TRANS, "non_sec_direct_translation"},
  2991. {SDE_DRM_FB_SEC_DIR_TRANS, "sec_direct_translation"},
  2992. };
  2993. static const struct drm_prop_enum_list e_multirect_mode[] = {
  2994. {SDE_SSPP_MULTIRECT_NONE, "none"},
  2995. {SDE_SSPP_MULTIRECT_PARALLEL, "parallel"},
  2996. {SDE_SSPP_MULTIRECT_TIME_MX, "serial"},
  2997. };
  2998. const struct sde_format_extended *format_list;
  2999. struct sde_kms_info *info;
  3000. struct sde_plane *psde = to_sde_plane(plane);
  3001. int zpos_max = 255;
  3002. int zpos_def = 0;
  3003. char feature_name[256];
  3004. if (!plane || !psde) {
  3005. SDE_ERROR("invalid plane\n");
  3006. return;
  3007. } else if (!psde->pipe_hw || !psde->pipe_sblk) {
  3008. SDE_ERROR("invalid plane, pipe_hw %d pipe_sblk %d\n",
  3009. !psde->pipe_hw, !psde->pipe_sblk);
  3010. return;
  3011. } else if (!catalog) {
  3012. SDE_ERROR("invalid catalog\n");
  3013. return;
  3014. }
  3015. psde->catalog = catalog;
  3016. if (sde_is_custom_client()) {
  3017. if (catalog->mixer_count &&
  3018. catalog->mixer[0].sblk->maxblendstages) {
  3019. zpos_max = catalog->mixer[0].sblk->maxblendstages - 1;
  3020. if (zpos_max > SDE_STAGE_MAX - SDE_STAGE_0 - 1)
  3021. zpos_max = SDE_STAGE_MAX - SDE_STAGE_0 - 1;
  3022. }
  3023. } else if (plane->type != DRM_PLANE_TYPE_PRIMARY) {
  3024. /* reserve zpos == 0 for primary planes */
  3025. zpos_def = drm_plane_index(plane) + 1;
  3026. }
  3027. msm_property_install_range(&psde->property_info, "zpos",
  3028. 0x0, 0, zpos_max, zpos_def, PLANE_PROP_ZPOS);
  3029. msm_property_install_range(&psde->property_info, "alpha",
  3030. 0x0, 0, 255, 255, PLANE_PROP_ALPHA);
  3031. /* linux default file descriptor range on each process */
  3032. msm_property_install_range(&psde->property_info, "input_fence",
  3033. 0x0, 0, INR_OPEN_MAX, 0, PLANE_PROP_INPUT_FENCE);
  3034. if (!master_plane_id)
  3035. _sde_plane_install_non_master_properties(psde);
  3036. if (psde->features & BIT(SDE_SSPP_EXCL_RECT))
  3037. msm_property_install_volatile_range(&psde->property_info,
  3038. "excl_rect_v1", 0x0, 0, ~0, 0, PLANE_PROP_EXCL_RECT_V1);
  3039. sde_plane_rot_install_properties(plane, catalog);
  3040. msm_property_install_enum(&psde->property_info, "blend_op", 0x0, 0,
  3041. e_blend_op, ARRAY_SIZE(e_blend_op), PLANE_PROP_BLEND_OP);
  3042. msm_property_install_enum(&psde->property_info, "src_config", 0x0, 1,
  3043. e_src_config, ARRAY_SIZE(e_src_config), PLANE_PROP_SRC_CONFIG);
  3044. if (psde->pipe_hw->ops.setup_solidfill)
  3045. msm_property_install_range(&psde->property_info, "color_fill",
  3046. 0, 0, 0xFFFFFFFF, 0, PLANE_PROP_COLOR_FILL);
  3047. msm_property_install_range(&psde->property_info,
  3048. "prefill_size", 0x0, 0, ~0, 0,
  3049. PLANE_PROP_PREFILL_SIZE);
  3050. msm_property_install_range(&psde->property_info,
  3051. "prefill_time", 0x0, 0, ~0, 0,
  3052. PLANE_PROP_PREFILL_TIME);
  3053. info = kzalloc(sizeof(struct sde_kms_info), GFP_KERNEL);
  3054. if (!info) {
  3055. SDE_ERROR("failed to allocate info memory\n");
  3056. return;
  3057. }
  3058. msm_property_install_blob(&psde->property_info, "capabilities",
  3059. DRM_MODE_PROP_IMMUTABLE, PLANE_PROP_INFO);
  3060. sde_kms_info_reset(info);
  3061. if (!master_plane_id) {
  3062. format_list = psde->pipe_sblk->format_list;
  3063. } else {
  3064. format_list = psde->pipe_sblk->virt_format_list;
  3065. sde_kms_info_add_keyint(info, "primary_smart_plane_id",
  3066. master_plane_id);
  3067. msm_property_install_enum(&psde->property_info,
  3068. "multirect_mode", 0x0, 0, e_multirect_mode,
  3069. ARRAY_SIZE(e_multirect_mode),
  3070. PLANE_PROP_MULTIRECT_MODE);
  3071. }
  3072. if (format_list) {
  3073. sde_kms_info_start(info, "pixel_formats");
  3074. while (format_list->fourcc_format) {
  3075. sde_kms_info_append_format(info,
  3076. format_list->fourcc_format,
  3077. format_list->modifier);
  3078. ++format_list;
  3079. }
  3080. sde_kms_info_stop(info);
  3081. }
  3082. if (psde->pipe_hw && psde->pipe_hw->ops.get_scaler_ver)
  3083. sde_kms_info_add_keyint(info, "scaler_step_ver",
  3084. psde->pipe_hw->ops.get_scaler_ver(psde->pipe_hw));
  3085. sde_kms_info_add_keyint(info, "max_linewidth",
  3086. psde->pipe_sblk->maxlinewidth);
  3087. sde_kms_info_add_keyint(info, "max_upscale",
  3088. psde->pipe_sblk->maxupscale);
  3089. sde_kms_info_add_keyint(info, "max_downscale",
  3090. psde->pipe_sblk->maxdwnscale);
  3091. sde_kms_info_add_keyint(info, "max_horizontal_deci",
  3092. psde->pipe_sblk->maxhdeciexp);
  3093. sde_kms_info_add_keyint(info, "max_vertical_deci",
  3094. psde->pipe_sblk->maxvdeciexp);
  3095. sde_kms_info_add_keyint(info, "max_per_pipe_bw",
  3096. psde->pipe_sblk->max_per_pipe_bw * 1000LL);
  3097. sde_kms_info_add_keyint(info, "max_per_pipe_bw_high",
  3098. psde->pipe_sblk->max_per_pipe_bw_high * 1000LL);
  3099. if ((!master_plane_id &&
  3100. (psde->features & BIT(SDE_SSPP_INVERSE_PMA))) ||
  3101. (psde->features & BIT(SDE_SSPP_DGM_INVERSE_PMA))) {
  3102. msm_property_install_range(&psde->property_info,
  3103. "inverse_pma", 0x0, 0, 1, 0, PLANE_PROP_INVERSE_PMA);
  3104. sde_kms_info_add_keyint(info, "inverse_pma", 1);
  3105. }
  3106. if (psde->features & BIT(SDE_SSPP_DGM_CSC)) {
  3107. msm_property_install_volatile_range(
  3108. &psde->property_info, "csc_dma_v1", 0x0,
  3109. 0, ~0, 0, PLANE_PROP_CSC_DMA_V1);
  3110. sde_kms_info_add_keyint(info, "csc_dma_v1", 1);
  3111. }
  3112. if (psde->features & BIT(SDE_SSPP_SEC_UI_ALLOWED))
  3113. sde_kms_info_add_keyint(info, "sec_ui_allowed", 1);
  3114. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  3115. sde_kms_info_add_keyint(info, "block_sec_ui", 1);
  3116. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT)) {
  3117. const struct sde_format_extended *inline_rot_fmt_list;
  3118. sde_kms_info_add_keyint(info, "true_inline_rot_rev",
  3119. catalog->true_inline_rot_rev);
  3120. sde_kms_info_add_keyint(info,
  3121. "true_inline_dwnscale_rt",
  3122. (int) (psde->pipe_sblk->in_rot_maxdwnscale_rt_num /
  3123. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom));
  3124. sde_kms_info_add_keyint(info,
  3125. "true_inline_dwnscale_rt_numerator",
  3126. psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3127. sde_kms_info_add_keyint(info,
  3128. "true_inline_dwnscale_rt_denominator",
  3129. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3130. sde_kms_info_add_keyint(info, "true_inline_dwnscale_nrt",
  3131. psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3132. sde_kms_info_add_keyint(info, "true_inline_max_height",
  3133. psde->pipe_sblk->in_rot_maxheight);
  3134. inline_rot_fmt_list = psde->pipe_sblk->in_rot_format_list;
  3135. if (inline_rot_fmt_list) {
  3136. sde_kms_info_start(info, "inline_rot_pixel_formats");
  3137. while (inline_rot_fmt_list->fourcc_format) {
  3138. sde_kms_info_append_format(info,
  3139. inline_rot_fmt_list->fourcc_format,
  3140. inline_rot_fmt_list->modifier);
  3141. ++inline_rot_fmt_list;
  3142. }
  3143. sde_kms_info_stop(info);
  3144. }
  3145. }
  3146. msm_property_set_blob(&psde->property_info, &psde->blob_info,
  3147. info->data, SDE_KMS_INFO_DATALEN(info),
  3148. PLANE_PROP_INFO);
  3149. kfree(info);
  3150. if (psde->features & BIT(SDE_SSPP_MEMCOLOR)) {
  3151. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3152. "SDE_SSPP_SKIN_COLOR_V",
  3153. psde->pipe_sblk->memcolor_blk.version >> 16);
  3154. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3155. PLANE_PROP_SKIN_COLOR);
  3156. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3157. "SDE_SSPP_SKY_COLOR_V",
  3158. psde->pipe_sblk->memcolor_blk.version >> 16);
  3159. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3160. PLANE_PROP_SKY_COLOR);
  3161. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3162. "SDE_SSPP_FOLIAGE_COLOR_V",
  3163. psde->pipe_sblk->memcolor_blk.version >> 16);
  3164. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3165. PLANE_PROP_FOLIAGE_COLOR);
  3166. }
  3167. if (psde->features & BIT(SDE_SSPP_VIG_GAMUT)) {
  3168. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3169. "SDE_VIG_3D_LUT_GAMUT_V",
  3170. psde->pipe_sblk->gamut_blk.version >> 16);
  3171. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3172. PLANE_PROP_VIG_GAMUT);
  3173. }
  3174. if (psde->features & BIT(SDE_SSPP_VIG_IGC)) {
  3175. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3176. "SDE_VIG_1D_LUT_IGC_V",
  3177. psde->pipe_sblk->igc_blk[0].version >> 16);
  3178. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3179. PLANE_PROP_VIG_IGC);
  3180. }
  3181. if (psde->features & BIT(SDE_SSPP_DMA_IGC)) {
  3182. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3183. "SDE_DGM_1D_LUT_IGC_V",
  3184. psde->pipe_sblk->igc_blk[0].version >> 16);
  3185. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3186. PLANE_PROP_DMA_IGC);
  3187. }
  3188. if (psde->features & BIT(SDE_SSPP_DMA_GC)) {
  3189. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3190. "SDE_DGM_1D_LUT_GC_V",
  3191. psde->pipe_sblk->gc_blk[0].version >> 16);
  3192. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3193. PLANE_PROP_DMA_GC);
  3194. }
  3195. msm_property_install_enum(&psde->property_info, "fb_translation_mode",
  3196. 0x0,
  3197. 0, e_fb_translation_mode,
  3198. ARRAY_SIZE(e_fb_translation_mode),
  3199. PLANE_PROP_FB_TRANSLATION_MODE);
  3200. }
  3201. static inline void _sde_plane_set_csc_v1(struct sde_plane *psde,
  3202. void __user *usr_ptr)
  3203. {
  3204. struct sde_drm_csc_v1 csc_v1;
  3205. int i;
  3206. if (!psde) {
  3207. SDE_ERROR("invalid plane\n");
  3208. return;
  3209. }
  3210. psde->csc_usr_ptr = NULL;
  3211. if (!usr_ptr) {
  3212. SDE_DEBUG_PLANE(psde, "csc data removed\n");
  3213. return;
  3214. }
  3215. if (copy_from_user(&csc_v1, usr_ptr, sizeof(csc_v1))) {
  3216. SDE_ERROR_PLANE(psde, "failed to copy csc data\n");
  3217. return;
  3218. }
  3219. /* populate from user space */
  3220. for (i = 0; i < SDE_CSC_MATRIX_COEFF_SIZE; ++i)
  3221. psde->csc_cfg.csc_mv[i] = csc_v1.ctm_coeff[i] >> 16;
  3222. for (i = 0; i < SDE_CSC_BIAS_SIZE; ++i) {
  3223. psde->csc_cfg.csc_pre_bv[i] = csc_v1.pre_bias[i];
  3224. psde->csc_cfg.csc_post_bv[i] = csc_v1.post_bias[i];
  3225. }
  3226. for (i = 0; i < SDE_CSC_CLAMP_SIZE; ++i) {
  3227. psde->csc_cfg.csc_pre_lv[i] = csc_v1.pre_clamp[i];
  3228. psde->csc_cfg.csc_post_lv[i] = csc_v1.post_clamp[i];
  3229. }
  3230. psde->csc_usr_ptr = &psde->csc_cfg;
  3231. }
  3232. static inline void _sde_plane_set_scaler_v1(struct sde_plane *psde,
  3233. struct sde_plane_state *pstate, void __user *usr)
  3234. {
  3235. struct sde_drm_scaler_v1 scale_v1;
  3236. struct sde_hw_pixel_ext *pe;
  3237. int i;
  3238. if (!psde || !pstate) {
  3239. SDE_ERROR("invalid argument(s)\n");
  3240. return;
  3241. }
  3242. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3243. if (!usr) {
  3244. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3245. return;
  3246. }
  3247. if (copy_from_user(&scale_v1, usr, sizeof(scale_v1))) {
  3248. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3249. return;
  3250. }
  3251. /* force property to be dirty, even if the pointer didn't change */
  3252. msm_property_set_dirty(&psde->property_info,
  3253. &pstate->property_state, PLANE_PROP_SCALER_V1);
  3254. /* populate from user space */
  3255. pe = &pstate->pixel_ext;
  3256. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3257. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3258. pe->init_phase_x[i] = scale_v1.init_phase_x[i];
  3259. pe->phase_step_x[i] = scale_v1.phase_step_x[i];
  3260. pe->init_phase_y[i] = scale_v1.init_phase_y[i];
  3261. pe->phase_step_y[i] = scale_v1.phase_step_y[i];
  3262. pe->horz_filter[i] = scale_v1.horz_filter[i];
  3263. pe->vert_filter[i] = scale_v1.vert_filter[i];
  3264. }
  3265. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3266. pe->left_ftch[i] = scale_v1.pe.left_ftch[i];
  3267. pe->right_ftch[i] = scale_v1.pe.right_ftch[i];
  3268. pe->left_rpt[i] = scale_v1.pe.left_rpt[i];
  3269. pe->right_rpt[i] = scale_v1.pe.right_rpt[i];
  3270. pe->roi_w[i] = scale_v1.pe.num_ext_pxls_lr[i];
  3271. pe->top_ftch[i] = scale_v1.pe.top_ftch[i];
  3272. pe->btm_ftch[i] = scale_v1.pe.btm_ftch[i];
  3273. pe->top_rpt[i] = scale_v1.pe.top_rpt[i];
  3274. pe->btm_rpt[i] = scale_v1.pe.btm_rpt[i];
  3275. pe->roi_h[i] = scale_v1.pe.num_ext_pxls_tb[i];
  3276. }
  3277. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V1;
  3278. SDE_EVT32_VERBOSE(DRMID(&psde->base));
  3279. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3280. }
  3281. static void _sde_plane_clear_predownscale_settings(
  3282. struct sde_plane_state *pstate)
  3283. {
  3284. pstate->pre_down.pre_downscale_x_0 = 0;
  3285. pstate->pre_down.pre_downscale_x_1 = 0;
  3286. pstate->pre_down.pre_downscale_y_0 = 0;
  3287. pstate->pre_down.pre_downscale_y_1 = 0;
  3288. }
  3289. static inline void _sde_plane_set_scaler_v2(struct sde_plane *psde,
  3290. struct sde_plane_state *pstate, void __user *usr)
  3291. {
  3292. struct sde_drm_scaler_v2 scale_v2;
  3293. struct sde_hw_pixel_ext *pe;
  3294. int i;
  3295. struct sde_hw_scaler3_cfg *cfg;
  3296. struct sde_hw_inline_pre_downscale_cfg *pd_cfg;
  3297. if (!psde || !pstate) {
  3298. SDE_ERROR("invalid argument(s)\n");
  3299. return;
  3300. }
  3301. cfg = &pstate->scaler3_cfg;
  3302. pd_cfg = &pstate->pre_down;
  3303. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3304. if (!usr) {
  3305. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3306. cfg->enable = 0;
  3307. _sde_plane_clear_predownscale_settings(pstate);
  3308. goto end;
  3309. }
  3310. if (copy_from_user(&scale_v2, usr, sizeof(scale_v2))) {
  3311. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3312. return;
  3313. }
  3314. /* detach/ignore user data if 'disabled' */
  3315. if (!scale_v2.enable) {
  3316. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3317. cfg->enable = 0;
  3318. _sde_plane_clear_predownscale_settings(pstate);
  3319. goto end;
  3320. }
  3321. /* populate from user space */
  3322. sde_set_scaler_v2(cfg, &scale_v2);
  3323. if (psde->features & BIT(SDE_SSPP_PREDOWNSCALE)) {
  3324. pd_cfg->pre_downscale_x_0 = scale_v2.pre_downscale_x_0;
  3325. pd_cfg->pre_downscale_x_1 = scale_v2.pre_downscale_x_1;
  3326. pd_cfg->pre_downscale_y_0 = scale_v2.pre_downscale_y_0;
  3327. pd_cfg->pre_downscale_y_1 = scale_v2.pre_downscale_y_1;
  3328. }
  3329. pe = &pstate->pixel_ext;
  3330. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3331. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3332. pe->left_ftch[i] = scale_v2.pe.left_ftch[i];
  3333. pe->right_ftch[i] = scale_v2.pe.right_ftch[i];
  3334. pe->left_rpt[i] = scale_v2.pe.left_rpt[i];
  3335. pe->right_rpt[i] = scale_v2.pe.right_rpt[i];
  3336. pe->roi_w[i] = scale_v2.pe.num_ext_pxls_lr[i];
  3337. pe->top_ftch[i] = scale_v2.pe.top_ftch[i];
  3338. pe->btm_ftch[i] = scale_v2.pe.btm_ftch[i];
  3339. pe->top_rpt[i] = scale_v2.pe.top_rpt[i];
  3340. pe->btm_rpt[i] = scale_v2.pe.btm_rpt[i];
  3341. pe->roi_h[i] = scale_v2.pe.num_ext_pxls_tb[i];
  3342. }
  3343. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2_CHECK;
  3344. end:
  3345. /* force property to be dirty, even if the pointer didn't change */
  3346. msm_property_set_dirty(&psde->property_info,
  3347. &pstate->property_state, PLANE_PROP_SCALER_V2);
  3348. SDE_EVT32_VERBOSE(DRMID(&psde->base), cfg->enable, cfg->de.enable,
  3349. cfg->src_width[0], cfg->src_height[0],
  3350. cfg->dst_width, cfg->dst_height);
  3351. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3352. }
  3353. static void _sde_plane_set_excl_rect_v1(struct sde_plane *psde,
  3354. struct sde_plane_state *pstate, void __user *usr_ptr)
  3355. {
  3356. struct drm_clip_rect excl_rect_v1;
  3357. if (!psde || !pstate) {
  3358. SDE_ERROR("invalid argument(s)\n");
  3359. return;
  3360. }
  3361. if (!usr_ptr) {
  3362. memset(&pstate->excl_rect, 0, sizeof(pstate->excl_rect));
  3363. SDE_DEBUG_PLANE(psde, "excl_rect data cleared\n");
  3364. return;
  3365. }
  3366. if (copy_from_user(&excl_rect_v1, usr_ptr, sizeof(excl_rect_v1))) {
  3367. SDE_ERROR_PLANE(psde, "failed to copy excl_rect data\n");
  3368. return;
  3369. }
  3370. /* populate from user space */
  3371. pstate->excl_rect.x = excl_rect_v1.x1;
  3372. pstate->excl_rect.y = excl_rect_v1.y1;
  3373. pstate->excl_rect.w = excl_rect_v1.x2 - excl_rect_v1.x1;
  3374. pstate->excl_rect.h = excl_rect_v1.y2 - excl_rect_v1.y1;
  3375. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  3376. pstate->excl_rect.x, pstate->excl_rect.y,
  3377. pstate->excl_rect.w, pstate->excl_rect.h);
  3378. }
  3379. static int sde_plane_atomic_set_property(struct drm_plane *plane,
  3380. struct drm_plane_state *state, struct drm_property *property,
  3381. uint64_t val)
  3382. {
  3383. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3384. struct sde_plane_state *pstate;
  3385. int idx, ret = -EINVAL;
  3386. SDE_DEBUG_PLANE(psde, "\n");
  3387. if (!plane) {
  3388. SDE_ERROR("invalid plane\n");
  3389. } else if (!state) {
  3390. SDE_ERROR_PLANE(psde, "invalid state\n");
  3391. } else {
  3392. pstate = to_sde_plane_state(state);
  3393. ret = msm_property_atomic_set(&psde->property_info,
  3394. &pstate->property_state, property, val);
  3395. if (!ret) {
  3396. idx = msm_property_index(&psde->property_info,
  3397. property);
  3398. switch (idx) {
  3399. case PLANE_PROP_INPUT_FENCE:
  3400. _sde_plane_set_input_fence(psde, pstate, val);
  3401. break;
  3402. case PLANE_PROP_CSC_V1:
  3403. case PLANE_PROP_CSC_DMA_V1:
  3404. _sde_plane_set_csc_v1(psde, (void __user *)val);
  3405. break;
  3406. case PLANE_PROP_SCALER_V1:
  3407. _sde_plane_set_scaler_v1(psde, pstate,
  3408. (void *)(uintptr_t)val);
  3409. break;
  3410. case PLANE_PROP_SCALER_V2:
  3411. _sde_plane_set_scaler_v2(psde, pstate,
  3412. (void *)(uintptr_t)val);
  3413. break;
  3414. case PLANE_PROP_EXCL_RECT_V1:
  3415. _sde_plane_set_excl_rect_v1(psde, pstate,
  3416. (void *)(uintptr_t)val);
  3417. break;
  3418. default:
  3419. /* nothing to do */
  3420. break;
  3421. }
  3422. }
  3423. }
  3424. SDE_DEBUG_PLANE(psde, "%s[%d] <= 0x%llx ret=%d\n",
  3425. property->name, property->base.id, val, ret);
  3426. return ret;
  3427. }
  3428. static int sde_plane_atomic_get_property(struct drm_plane *plane,
  3429. const struct drm_plane_state *state,
  3430. struct drm_property *property, uint64_t *val)
  3431. {
  3432. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3433. struct sde_plane_state *pstate;
  3434. int ret = -EINVAL;
  3435. if (!plane) {
  3436. SDE_ERROR("invalid plane\n");
  3437. } else if (!state) {
  3438. SDE_ERROR("invalid state\n");
  3439. } else {
  3440. SDE_DEBUG_PLANE(psde, "\n");
  3441. pstate = to_sde_plane_state(state);
  3442. ret = msm_property_atomic_get(&psde->property_info,
  3443. &pstate->property_state, property, val);
  3444. }
  3445. return ret;
  3446. }
  3447. int sde_plane_helper_reset_custom_properties(struct drm_plane *plane,
  3448. struct drm_plane_state *plane_state)
  3449. {
  3450. struct sde_plane *psde;
  3451. struct sde_plane_state *pstate;
  3452. struct drm_property *drm_prop;
  3453. enum msm_mdp_plane_property prop_idx;
  3454. if (!plane || !plane_state) {
  3455. SDE_ERROR("invalid params\n");
  3456. return -EINVAL;
  3457. }
  3458. psde = to_sde_plane(plane);
  3459. pstate = to_sde_plane_state(plane_state);
  3460. for (prop_idx = 0; prop_idx < PLANE_PROP_COUNT; prop_idx++) {
  3461. uint64_t val = pstate->property_values[prop_idx].value;
  3462. uint64_t def;
  3463. int ret;
  3464. drm_prop = msm_property_index_to_drm_property(
  3465. &psde->property_info, prop_idx);
  3466. if (!drm_prop) {
  3467. /* not all props will be installed, based on caps */
  3468. SDE_DEBUG_PLANE(psde, "invalid property index %d\n",
  3469. prop_idx);
  3470. continue;
  3471. }
  3472. def = msm_property_get_default(&psde->property_info, prop_idx);
  3473. if (val == def)
  3474. continue;
  3475. SDE_DEBUG_PLANE(psde, "set prop %s idx %d from %llu to %llu\n",
  3476. drm_prop->name, prop_idx, val, def);
  3477. ret = sde_plane_atomic_set_property(plane, plane_state,
  3478. drm_prop, def);
  3479. if (ret) {
  3480. SDE_ERROR_PLANE(psde,
  3481. "set property failed, idx %d ret %d\n",
  3482. prop_idx, ret);
  3483. continue;
  3484. }
  3485. }
  3486. return 0;
  3487. }
  3488. static void sde_plane_destroy(struct drm_plane *plane)
  3489. {
  3490. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3491. SDE_DEBUG_PLANE(psde, "\n");
  3492. if (psde) {
  3493. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  3494. if (psde->blob_info)
  3495. drm_property_blob_put(psde->blob_info);
  3496. msm_property_destroy(&psde->property_info);
  3497. mutex_destroy(&psde->lock);
  3498. /* this will destroy the states as well */
  3499. drm_plane_cleanup(plane);
  3500. if (psde->pipe_hw)
  3501. sde_hw_sspp_destroy(psde->pipe_hw);
  3502. kfree(psde);
  3503. }
  3504. }
  3505. static void sde_plane_destroy_state(struct drm_plane *plane,
  3506. struct drm_plane_state *state)
  3507. {
  3508. struct sde_plane *psde;
  3509. struct sde_plane_state *pstate;
  3510. if (!plane || !state) {
  3511. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  3512. !plane, !state);
  3513. return;
  3514. }
  3515. psde = to_sde_plane(plane);
  3516. pstate = to_sde_plane_state(state);
  3517. SDE_DEBUG_PLANE(psde, "\n");
  3518. /* remove ref count for frame buffers */
  3519. if (state->fb)
  3520. drm_framebuffer_put(state->fb);
  3521. /* remove ref count for fence */
  3522. if (pstate->input_fence)
  3523. sde_sync_put(pstate->input_fence);
  3524. /* destroy value helper */
  3525. msm_property_destroy_state(&psde->property_info, pstate,
  3526. &pstate->property_state);
  3527. }
  3528. static struct drm_plane_state *
  3529. sde_plane_duplicate_state(struct drm_plane *plane)
  3530. {
  3531. struct sde_plane *psde;
  3532. struct sde_plane_state *pstate;
  3533. struct sde_plane_state *old_state;
  3534. struct drm_property *drm_prop;
  3535. uint64_t input_fence_default;
  3536. if (!plane) {
  3537. SDE_ERROR("invalid plane\n");
  3538. return NULL;
  3539. } else if (!plane->state) {
  3540. SDE_ERROR("invalid plane state\n");
  3541. return NULL;
  3542. }
  3543. old_state = to_sde_plane_state(plane->state);
  3544. psde = to_sde_plane(plane);
  3545. pstate = msm_property_alloc_state(&psde->property_info);
  3546. if (!pstate) {
  3547. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3548. return NULL;
  3549. }
  3550. SDE_DEBUG_PLANE(psde, "\n");
  3551. /* duplicate value helper */
  3552. msm_property_duplicate_state(&psde->property_info, old_state, pstate,
  3553. &pstate->property_state, pstate->property_values);
  3554. /* clear out any input fence */
  3555. pstate->input_fence = 0;
  3556. input_fence_default = msm_property_get_default(
  3557. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3558. drm_prop = msm_property_index_to_drm_property(
  3559. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3560. if (msm_property_atomic_set(&psde->property_info,
  3561. &pstate->property_state, drm_prop,
  3562. input_fence_default))
  3563. SDE_DEBUG_PLANE(psde,
  3564. "error clearing duplicated input fence\n");
  3565. pstate->dirty = 0x0;
  3566. pstate->pending = false;
  3567. __drm_atomic_helper_plane_duplicate_state(plane, &pstate->base);
  3568. return &pstate->base;
  3569. }
  3570. static void sde_plane_reset(struct drm_plane *plane)
  3571. {
  3572. struct sde_plane *psde;
  3573. struct sde_plane_state *pstate;
  3574. if (!plane) {
  3575. SDE_ERROR("invalid plane\n");
  3576. return;
  3577. }
  3578. psde = to_sde_plane(plane);
  3579. SDE_DEBUG_PLANE(psde, "\n");
  3580. if (plane->state && !sde_crtc_is_reset_required(plane->state->crtc)) {
  3581. SDE_DEBUG_PLANE(psde, "avoid reset for plane\n");
  3582. return;
  3583. }
  3584. /* remove previous state, if present */
  3585. if (plane->state) {
  3586. sde_plane_destroy_state(plane, plane->state);
  3587. plane->state = 0;
  3588. }
  3589. pstate = msm_property_alloc_state(&psde->property_info);
  3590. if (!pstate) {
  3591. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3592. return;
  3593. }
  3594. /* reset value helper */
  3595. msm_property_reset_state(&psde->property_info, pstate,
  3596. &pstate->property_state,
  3597. pstate->property_values);
  3598. pstate->base.plane = plane;
  3599. plane->state = &pstate->base;
  3600. }
  3601. u32 sde_plane_get_ubwc_error(struct drm_plane *plane)
  3602. {
  3603. u32 ubwc_error = 0;
  3604. struct sde_plane *psde;
  3605. if (!plane) {
  3606. SDE_ERROR("invalid plane\n");
  3607. return 0;
  3608. }
  3609. psde = to_sde_plane(plane);
  3610. if (!psde->is_virtual && psde->pipe_hw->ops.get_ubwc_error)
  3611. ubwc_error = psde->pipe_hw->ops.get_ubwc_error(psde->pipe_hw);
  3612. return ubwc_error;
  3613. }
  3614. void sde_plane_clear_ubwc_error(struct drm_plane *plane)
  3615. {
  3616. struct sde_plane *psde;
  3617. if (!plane) {
  3618. SDE_ERROR("invalid plane\n");
  3619. return;
  3620. }
  3621. psde = to_sde_plane(plane);
  3622. if (psde->pipe_hw->ops.clear_ubwc_error)
  3623. psde->pipe_hw->ops.clear_ubwc_error(psde->pipe_hw);
  3624. }
  3625. #ifdef CONFIG_DEBUG_FS
  3626. static ssize_t _sde_plane_danger_read(struct file *file,
  3627. char __user *buff, size_t count, loff_t *ppos)
  3628. {
  3629. struct sde_kms *kms = file->private_data;
  3630. struct sde_mdss_cfg *cfg = kms->catalog;
  3631. int len = 0;
  3632. char buf[40] = {'\0'};
  3633. if (!cfg)
  3634. return -ENODEV;
  3635. if (*ppos)
  3636. return 0; /* the end */
  3637. len = snprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl);
  3638. if (len < 0 || len >= sizeof(buf))
  3639. return 0;
  3640. if ((count < sizeof(buf)) || copy_to_user(buff, buf, len))
  3641. return -EFAULT;
  3642. *ppos += len; /* increase offset */
  3643. return len;
  3644. }
  3645. static void _sde_plane_set_danger_state(struct sde_kms *kms, bool enable)
  3646. {
  3647. struct drm_plane *plane;
  3648. drm_for_each_plane(plane, kms->dev) {
  3649. if (plane->fb && plane->state) {
  3650. sde_plane_danger_signal_ctrl(plane, enable);
  3651. SDE_DEBUG("plane:%d img:%dx%d ",
  3652. plane->base.id, plane->fb->width,
  3653. plane->fb->height);
  3654. SDE_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n",
  3655. plane->state->src_x >> 16,
  3656. plane->state->src_y >> 16,
  3657. plane->state->src_w >> 16,
  3658. plane->state->src_h >> 16,
  3659. plane->state->crtc_x, plane->state->crtc_y,
  3660. plane->state->crtc_w, plane->state->crtc_h);
  3661. } else {
  3662. SDE_DEBUG("Inactive plane:%d\n", plane->base.id);
  3663. }
  3664. }
  3665. }
  3666. static ssize_t _sde_plane_danger_write(struct file *file,
  3667. const char __user *user_buf, size_t count, loff_t *ppos)
  3668. {
  3669. struct sde_kms *kms = file->private_data;
  3670. struct sde_mdss_cfg *cfg = kms->catalog;
  3671. int disable_panic;
  3672. char buf[10];
  3673. if (!cfg)
  3674. return -EFAULT;
  3675. if (count >= sizeof(buf))
  3676. return -EFAULT;
  3677. if (copy_from_user(buf, user_buf, count))
  3678. return -EFAULT;
  3679. buf[count] = 0; /* end of string */
  3680. if (kstrtoint(buf, 0, &disable_panic))
  3681. return -EFAULT;
  3682. if (disable_panic) {
  3683. /* Disable panic signal for all active pipes */
  3684. SDE_DEBUG("Disabling danger:\n");
  3685. _sde_plane_set_danger_state(kms, false);
  3686. kms->has_danger_ctrl = false;
  3687. } else {
  3688. /* Enable panic signal for all active pipes */
  3689. SDE_DEBUG("Enabling danger:\n");
  3690. kms->has_danger_ctrl = true;
  3691. _sde_plane_set_danger_state(kms, true);
  3692. }
  3693. return count;
  3694. }
  3695. static const struct file_operations sde_plane_danger_enable = {
  3696. .open = simple_open,
  3697. .read = _sde_plane_danger_read,
  3698. .write = _sde_plane_danger_write,
  3699. };
  3700. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3701. {
  3702. struct sde_plane *psde;
  3703. struct sde_kms *kms;
  3704. struct msm_drm_private *priv;
  3705. const struct sde_sspp_sub_blks *sblk = 0;
  3706. const struct sde_sspp_cfg *cfg = 0;
  3707. if (!plane || !plane->dev) {
  3708. SDE_ERROR("invalid arguments\n");
  3709. return -EINVAL;
  3710. }
  3711. priv = plane->dev->dev_private;
  3712. if (!priv || !priv->kms) {
  3713. SDE_ERROR("invalid KMS reference\n");
  3714. return -EINVAL;
  3715. }
  3716. kms = to_sde_kms(priv->kms);
  3717. psde = to_sde_plane(plane);
  3718. if (psde && psde->pipe_hw)
  3719. cfg = psde->pipe_hw->cap;
  3720. if (cfg)
  3721. sblk = cfg->sblk;
  3722. if (!sblk)
  3723. return 0;
  3724. /* create overall sub-directory for the pipe */
  3725. psde->debugfs_root =
  3726. debugfs_create_dir(psde->pipe_name,
  3727. plane->dev->primary->debugfs_root);
  3728. if (!psde->debugfs_root)
  3729. return -ENOMEM;
  3730. /* don't error check these */
  3731. debugfs_create_x32("features", 0400,
  3732. psde->debugfs_root, &psde->features);
  3733. if (cfg->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  3734. cfg->features & BIT(SDE_SSPP_SCALER_QSEED3LITE) ||
  3735. cfg->features & BIT(SDE_SSPP_SCALER_QSEED2))
  3736. debugfs_create_bool("default_scaling",
  3737. 0600,
  3738. psde->debugfs_root,
  3739. &psde->debugfs_default_scale);
  3740. if (cfg->features & BIT(SDE_SSPP_TRUE_INLINE_ROT)) {
  3741. debugfs_create_u32("in_rot_max_downscale_rt_num",
  3742. 0600,
  3743. psde->debugfs_root,
  3744. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3745. debugfs_create_u32("in_rot_max_downscale_rt_denom",
  3746. 0600,
  3747. psde->debugfs_root,
  3748. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3749. debugfs_create_u32("in_rot_max_downscale_nrt",
  3750. 0600,
  3751. psde->debugfs_root,
  3752. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3753. debugfs_create_u32("in_rot_max_height",
  3754. 0600,
  3755. psde->debugfs_root,
  3756. (u32 *) &psde->pipe_sblk->in_rot_maxheight);
  3757. }
  3758. debugfs_create_u32("xin_id",
  3759. 0400,
  3760. psde->debugfs_root,
  3761. (u32 *) &cfg->xin_id);
  3762. debugfs_create_x32("creq_vblank",
  3763. 0600,
  3764. psde->debugfs_root,
  3765. (u32 *) &sblk->creq_vblank);
  3766. debugfs_create_x32("danger_vblank",
  3767. 0600,
  3768. psde->debugfs_root,
  3769. (u32 *) &sblk->danger_vblank);
  3770. debugfs_create_file("disable_danger",
  3771. 0600,
  3772. psde->debugfs_root,
  3773. kms, &sde_plane_danger_enable);
  3774. return 0;
  3775. }
  3776. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3777. {
  3778. struct sde_plane *psde;
  3779. if (!plane)
  3780. return;
  3781. psde = to_sde_plane(plane);
  3782. debugfs_remove_recursive(psde->debugfs_root);
  3783. }
  3784. #else
  3785. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3786. {
  3787. return 0;
  3788. }
  3789. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3790. {
  3791. }
  3792. #endif
  3793. static int sde_plane_late_register(struct drm_plane *plane)
  3794. {
  3795. return _sde_plane_init_debugfs(plane);
  3796. }
  3797. static void sde_plane_early_unregister(struct drm_plane *plane)
  3798. {
  3799. _sde_plane_destroy_debugfs(plane);
  3800. }
  3801. static const struct drm_plane_funcs sde_plane_funcs = {
  3802. .update_plane = drm_atomic_helper_update_plane,
  3803. .disable_plane = drm_atomic_helper_disable_plane,
  3804. .destroy = sde_plane_destroy,
  3805. .atomic_set_property = sde_plane_atomic_set_property,
  3806. .atomic_get_property = sde_plane_atomic_get_property,
  3807. .reset = sde_plane_reset,
  3808. .atomic_duplicate_state = sde_plane_duplicate_state,
  3809. .atomic_destroy_state = sde_plane_destroy_state,
  3810. .late_register = sde_plane_late_register,
  3811. .early_unregister = sde_plane_early_unregister,
  3812. };
  3813. static const struct drm_plane_helper_funcs sde_plane_helper_funcs = {
  3814. .prepare_fb = sde_plane_prepare_fb,
  3815. .cleanup_fb = sde_plane_cleanup_fb,
  3816. .atomic_check = sde_plane_atomic_check,
  3817. .atomic_update = sde_plane_atomic_update,
  3818. };
  3819. enum sde_sspp sde_plane_pipe(struct drm_plane *plane)
  3820. {
  3821. return plane ? to_sde_plane(plane)->pipe : SSPP_NONE;
  3822. }
  3823. bool is_sde_plane_virtual(struct drm_plane *plane)
  3824. {
  3825. return plane ? to_sde_plane(plane)->is_virtual : false;
  3826. }
  3827. /* initialize plane */
  3828. struct drm_plane *sde_plane_init(struct drm_device *dev,
  3829. uint32_t pipe, bool primary_plane,
  3830. unsigned long possible_crtcs, u32 master_plane_id)
  3831. {
  3832. struct drm_plane *plane = NULL, *master_plane = NULL;
  3833. const struct sde_format_extended *format_list;
  3834. struct sde_plane *psde;
  3835. struct msm_drm_private *priv;
  3836. struct sde_kms *kms;
  3837. enum drm_plane_type type;
  3838. int ret = -EINVAL;
  3839. if (!dev) {
  3840. SDE_ERROR("[%u]device is NULL\n", pipe);
  3841. goto exit;
  3842. }
  3843. priv = dev->dev_private;
  3844. if (!priv) {
  3845. SDE_ERROR("[%u]private data is NULL\n", pipe);
  3846. goto exit;
  3847. }
  3848. if (!priv->kms) {
  3849. SDE_ERROR("[%u]invalid KMS reference\n", pipe);
  3850. goto exit;
  3851. }
  3852. kms = to_sde_kms(priv->kms);
  3853. if (!kms->catalog) {
  3854. SDE_ERROR("[%u]invalid catalog reference\n", pipe);
  3855. goto exit;
  3856. }
  3857. /* create and zero local structure */
  3858. psde = kzalloc(sizeof(*psde), GFP_KERNEL);
  3859. if (!psde) {
  3860. SDE_ERROR("[%u]failed to allocate local plane struct\n", pipe);
  3861. ret = -ENOMEM;
  3862. goto exit;
  3863. }
  3864. /* cache local stuff for later */
  3865. plane = &psde->base;
  3866. psde->pipe = pipe;
  3867. psde->is_virtual = (master_plane_id != 0);
  3868. INIT_LIST_HEAD(&psde->mplane_list);
  3869. master_plane = drm_plane_find(dev, NULL, master_plane_id);
  3870. if (master_plane) {
  3871. struct sde_plane *mpsde = to_sde_plane(master_plane);
  3872. list_add_tail(&psde->mplane_list, &mpsde->mplane_list);
  3873. }
  3874. /* initialize underlying h/w driver */
  3875. psde->pipe_hw = sde_hw_sspp_init(pipe, kms->mmio, kms->catalog,
  3876. master_plane_id != 0);
  3877. if (IS_ERR(psde->pipe_hw)) {
  3878. SDE_ERROR("[%u]SSPP init failed\n", pipe);
  3879. ret = PTR_ERR(psde->pipe_hw);
  3880. goto clean_plane;
  3881. } else if (!psde->pipe_hw->cap || !psde->pipe_hw->cap->sblk) {
  3882. SDE_ERROR("[%u]SSPP init returned invalid cfg\n", pipe);
  3883. goto clean_sspp;
  3884. }
  3885. /* cache features mask for later */
  3886. psde->features = psde->pipe_hw->cap->features;
  3887. psde->perf_features = psde->pipe_hw->cap->perf_features;
  3888. psde->pipe_sblk = psde->pipe_hw->cap->sblk;
  3889. if (!psde->pipe_sblk) {
  3890. SDE_ERROR("[%u]invalid sblk\n", pipe);
  3891. goto clean_sspp;
  3892. }
  3893. if (!master_plane_id)
  3894. format_list = psde->pipe_sblk->format_list;
  3895. else
  3896. format_list = psde->pipe_sblk->virt_format_list;
  3897. psde->nformats = sde_populate_formats(format_list,
  3898. psde->formats,
  3899. 0,
  3900. ARRAY_SIZE(psde->formats));
  3901. if (!psde->nformats) {
  3902. SDE_ERROR("[%u]no valid formats for plane\n", pipe);
  3903. goto clean_sspp;
  3904. }
  3905. if (psde->features & BIT(SDE_SSPP_CURSOR))
  3906. type = DRM_PLANE_TYPE_CURSOR;
  3907. else if (primary_plane)
  3908. type = DRM_PLANE_TYPE_PRIMARY;
  3909. else
  3910. type = DRM_PLANE_TYPE_OVERLAY;
  3911. ret = drm_universal_plane_init(dev, plane, 0xff, &sde_plane_funcs,
  3912. psde->formats, psde->nformats,
  3913. NULL, type, NULL);
  3914. if (ret)
  3915. goto clean_sspp;
  3916. /* Populate static array of plane property flags */
  3917. _sde_plane_map_prop_to_dirty_bits();
  3918. /* success! finalize initialization */
  3919. drm_plane_helper_add(plane, &sde_plane_helper_funcs);
  3920. msm_property_init(&psde->property_info, &plane->base, dev,
  3921. priv->plane_property, psde->property_data,
  3922. PLANE_PROP_COUNT, PLANE_PROP_BLOBCOUNT,
  3923. sizeof(struct sde_plane_state));
  3924. _sde_plane_install_properties(plane, kms->catalog, master_plane_id);
  3925. /* save user friendly pipe name for later */
  3926. snprintf(psde->pipe_name, SDE_NAME_SIZE, "plane%u", plane->base.id);
  3927. mutex_init(&psde->lock);
  3928. SDE_DEBUG("%s created for pipe:%u id:%u virtual:%u\n", psde->pipe_name,
  3929. pipe, plane->base.id, master_plane_id);
  3930. return plane;
  3931. clean_sspp:
  3932. if (psde && psde->pipe_hw)
  3933. sde_hw_sspp_destroy(psde->pipe_hw);
  3934. clean_plane:
  3935. kfree(psde);
  3936. exit:
  3937. return ERR_PTR(ret);
  3938. }