htt_stats.h 430 KB

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  1. /*
  2. * Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. /**
  20. * @file htt_stats.h
  21. *
  22. * @details the public header file of HTT STATS
  23. */
  24. #ifndef __HTT_STATS_H__
  25. #define __HTT_STATS_H__
  26. #include <htt_deps.h> /* A_UINT32 */
  27. #include <htt_common.h>
  28. #include <htt.h> /* HTT stats TLV struct def and tag defs */
  29. /**
  30. * htt_dbg_ext_stats_type -
  31. * The base structure for each of the stats_type is only for reference
  32. * Host should use this information to know the type of TLVs to expect
  33. * for a particular stats type.
  34. *
  35. * Max supported stats :- 256.
  36. */
  37. enum htt_dbg_ext_stats_type {
  38. /** HTT_DBG_EXT_STATS_RESET
  39. * PARAM:
  40. * - config_param0 : start_offset (stats type)
  41. * - config_param1 : stats bmask from start offset
  42. * - config_param2 : stats bmask from start offset + 32
  43. * - config_param3 : stats bmask from start offset + 64
  44. * RESP MSG:
  45. * - No response sent.
  46. */
  47. HTT_DBG_EXT_STATS_RESET = 0,
  48. /** HTT_DBG_EXT_STATS_PDEV_TX
  49. * PARAMS:
  50. * - No Params
  51. * RESP MSG:
  52. * - htt_tx_pdev_stats_t
  53. */
  54. HTT_DBG_EXT_STATS_PDEV_TX = 1,
  55. /** HTT_DBG_EXT_STATS_PDEV_RX
  56. * PARAMS:
  57. * - No Params
  58. * RESP MSG:
  59. * - htt_rx_pdev_stats_t
  60. */
  61. HTT_DBG_EXT_STATS_PDEV_RX = 2,
  62. /** HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  63. * PARAMS:
  64. * - config_param0: [Bit31: Bit0] HWQ mask
  65. * RESP MSG:
  66. * - htt_tx_hwq_stats_t
  67. */
  68. HTT_DBG_EXT_STATS_PDEV_TX_HWQ = 3,
  69. /** HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  70. * PARAMS:
  71. * - config_param0: [Bit31: Bit0] TXQ mask
  72. * RESP MSG:
  73. * - htt_stats_tx_sched_t
  74. */
  75. HTT_DBG_EXT_STATS_PDEV_TX_SCHED = 4,
  76. /** HTT_DBG_EXT_STATS_PDEV_ERROR
  77. * PARAMS:
  78. * - No Params
  79. * RESP MSG:
  80. * - htt_hw_err_stats_t
  81. */
  82. HTT_DBG_EXT_STATS_PDEV_ERROR = 5,
  83. /** HTT_DBG_EXT_STATS_PDEV_TQM
  84. * PARAMS:
  85. * - No Params
  86. * RESP MSG:
  87. * - htt_tx_tqm_pdev_stats_t
  88. */
  89. HTT_DBG_EXT_STATS_PDEV_TQM = 6,
  90. /** HTT_DBG_EXT_STATS_TQM_CMDQ
  91. * PARAMS:
  92. * - config_param0:
  93. * [Bit15: Bit0 ] cmdq id :if 0xFFFF print all cmdq's
  94. * [Bit31: Bit16] reserved
  95. * RESP MSG:
  96. * - htt_tx_tqm_cmdq_stats_t
  97. */
  98. HTT_DBG_EXT_STATS_TQM_CMDQ = 7,
  99. /** HTT_DBG_EXT_STATS_TX_DE_INFO
  100. * PARAMS:
  101. * - No Params
  102. * RESP MSG:
  103. * - htt_tx_de_stats_t
  104. */
  105. HTT_DBG_EXT_STATS_TX_DE_INFO = 8,
  106. /** HTT_DBG_EXT_STATS_PDEV_TX_RATE
  107. * PARAMS:
  108. * - No Params
  109. * RESP MSG:
  110. * - htt_tx_pdev_rate_stats_t
  111. */
  112. HTT_DBG_EXT_STATS_PDEV_TX_RATE = 9,
  113. /** HTT_DBG_EXT_STATS_PDEV_RX_RATE
  114. * PARAMS:
  115. * - No Params
  116. * RESP MSG:
  117. * - htt_rx_pdev_rate_stats_t
  118. */
  119. HTT_DBG_EXT_STATS_PDEV_RX_RATE = 10,
  120. /** HTT_DBG_EXT_STATS_PEER_INFO
  121. * PARAMS:
  122. * - config_param0:
  123. * [Bit0] - [0] for sw_peer_id, [1] for mac_addr based request
  124. * [Bit15 : Bit 1] htt_peer_stats_req_mode_t
  125. * [Bit31 : Bit16] sw_peer_id
  126. * config_param1:
  127. * peer_stats_req_type_mask:32 (enum htt_peer_stats_tlv_enum)
  128. * 0 bit htt_peer_stats_cmn_tlv
  129. * 1 bit htt_peer_details_tlv
  130. * 2 bit htt_tx_peer_rate_stats_tlv
  131. * 3 bit htt_rx_peer_rate_stats_tlv
  132. * 4 bit htt_tx_tid_stats_tlv/htt_tx_tid_stats_v1_tlv
  133. * 5 bit htt_rx_tid_stats_tlv
  134. * 6 bit htt_msdu_flow_stats_tlv
  135. * 7 bit htt_peer_sched_stats_tlv
  136. * 8 bit htt_peer_ax_ofdma_stats_tlv
  137. * 9 bit htt_peer_be_ofdma_stats_tlv
  138. * - config_param2: [Bit31 : Bit0] mac_addr31to0
  139. * - config_param3: [Bit15 : Bit0] mac_addr47to32
  140. * [Bit 16] If this bit is set, reset per peer stats
  141. * of corresponding tlv indicated by config
  142. * param 1.
  143. * HTT_DBG_EXT_PEER_STATS_RESET_GET will be
  144. * used to get this bit position.
  145. * WMI_SERVICE_PER_PEER_HTT_STATS_RESET
  146. * indicates that FW supports per peer HTT
  147. * stats reset.
  148. * [Bit31 : Bit17] reserved
  149. * RESP MSG:
  150. * - htt_peer_stats_t
  151. */
  152. HTT_DBG_EXT_STATS_PEER_INFO = 11,
  153. /** HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  154. * PARAMS:
  155. * - No Params
  156. * RESP MSG:
  157. * - htt_tx_pdev_selfgen_stats_t
  158. */
  159. HTT_DBG_EXT_STATS_TX_SELFGEN_INFO = 12,
  160. /** HTT_DBG_EXT_STATS_TX_MU_HWQ
  161. * PARAMS:
  162. * - config_param0: [Bit31: Bit0] HWQ mask
  163. * RESP MSG:
  164. * - htt_tx_hwq_mu_mimo_stats_t
  165. */
  166. HTT_DBG_EXT_STATS_TX_MU_HWQ = 13,
  167. /** HTT_DBG_EXT_STATS_RING_IF_INFO
  168. * PARAMS:
  169. * - config_param0:
  170. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  171. * [Bit31: Bit16] reserved
  172. * RESP MSG:
  173. * - htt_ring_if_stats_t
  174. */
  175. HTT_DBG_EXT_STATS_RING_IF_INFO = 14,
  176. /** HTT_DBG_EXT_STATS_SRNG_INFO
  177. * PARAMS:
  178. * - config_param0:
  179. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  180. * [Bit31: Bit16] reserved
  181. * - No Params
  182. * RESP MSG:
  183. * - htt_sring_stats_t
  184. */
  185. HTT_DBG_EXT_STATS_SRNG_INFO = 15,
  186. /** HTT_DBG_EXT_STATS_SFM_INFO
  187. * PARAMS:
  188. * - No Params
  189. * RESP MSG:
  190. * - htt_sfm_stats_t
  191. */
  192. HTT_DBG_EXT_STATS_SFM_INFO = 16,
  193. /** HTT_DBG_EXT_STATS_PDEV_TX_MU
  194. * PARAMS:
  195. * - No Params
  196. * RESP MSG:
  197. * - htt_tx_pdev_mu_mimo_stats_t
  198. */
  199. HTT_DBG_EXT_STATS_PDEV_TX_MU = 17,
  200. /** HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  201. * PARAMS:
  202. * - config_param0:
  203. * [Bit7 : Bit0] vdev_id:8
  204. * note:0xFF to get all active peers based on pdev_mask.
  205. * [Bit31 : Bit8] rsvd:24
  206. * RESP MSG:
  207. * - htt_active_peer_details_list_t
  208. */
  209. HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST = 18,
  210. /** HTT_DBG_EXT_STATS_PDEV_CCA_STATS
  211. * PARAMS:
  212. * - config_param0:
  213. * [Bit0] - Clear bit0 to read 1sec,100ms & cumulative CCA stats.
  214. * Set bit0 to 1 to read 1sec interval histogram.
  215. * [Bit1] - 100ms interval histogram
  216. * [Bit3] - Cumulative CCA stats
  217. * RESP MSG:
  218. * - htt_pdev_cca_stats_t
  219. */
  220. HTT_DBG_EXT_STATS_PDEV_CCA_STATS = 19,
  221. /** HTT_DBG_EXT_STATS_TWT_SESSIONS
  222. * PARAMS:
  223. * - config_param0:
  224. * No params
  225. * RESP MSG:
  226. * - htt_pdev_twt_sessions_stats_t
  227. */
  228. HTT_DBG_EXT_STATS_TWT_SESSIONS = 20,
  229. /** HTT_DBG_EXT_STATS_REO_CNTS
  230. * PARAMS:
  231. * - config_param0:
  232. * No params
  233. * RESP MSG:
  234. * - htt_soc_reo_resource_stats_t
  235. */
  236. HTT_DBG_EXT_STATS_REO_RESOURCE_STATS = 21,
  237. /** HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  238. * PARAMS:
  239. * - config_param0:
  240. * [Bit0] vdev_id_set:1
  241. * set to 1 if vdev_id is set and vdev stats are requested.
  242. * set to 0 if pdev_stats sounding stats are requested.
  243. * [Bit8 : Bit1] vdev_id:8
  244. * note:0xFF to get all active vdevs based on pdev_mask.
  245. * [Bit31 : Bit9] rsvd:22
  246. *
  247. * RESP MSG:
  248. * - htt_tx_sounding_stats_t
  249. */
  250. HTT_DBG_EXT_STATS_TX_SOUNDING_INFO = 22,
  251. /** HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS
  252. * PARAMS:
  253. * - config_param0:
  254. * No params
  255. * RESP MSG:
  256. * - htt_pdev_obss_pd_stats_t
  257. */
  258. HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
  259. /** HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS
  260. * PARAMS:
  261. * - config_param0:
  262. * No params
  263. * RESP MSG:
  264. * - htt_stats_ring_backpressure_stats_t
  265. */
  266. HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS = 24,
  267. /** HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  268. * PARAMS:
  269. *
  270. * RESP MSG:
  271. * - htt_soc_latency_prof_t
  272. */
  273. HTT_DBG_EXT_STATS_LATENCY_PROF_STATS = 25,
  274. /** HTT_DBG_EXT_STATS_PDEV_UL_TRIGGER
  275. * PARAMS:
  276. * - No Params
  277. * RESP MSG:
  278. * - htt_rx_pdev_ul_trig_stats_t
  279. */
  280. HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS = 26,
  281. /** HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS = 27
  282. * PARAMS:
  283. * - No Params
  284. * RESP MSG:
  285. * - htt_rx_pdev_ul_mumimo_trig_stats_t
  286. */
  287. HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS = 27,
  288. /** HTT_DBG_EXT_STATS_FSE_RX
  289. * PARAMS:
  290. * - No Params
  291. * RESP MSG:
  292. * - htt_rx_fse_stats_t
  293. */
  294. HTT_DBG_EXT_STATS_FSE_RX = 28,
  295. /** HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS
  296. * PARAMS:
  297. * - config_param0: [Bit0] : [1] for mac_addr based request
  298. * - config_param1: [Bit31 : Bit0] mac_addr31to0
  299. * - config_param2: [Bit15 : Bit0] mac_addr47to32
  300. * RESP MSG:
  301. * - htt_ctrl_path_txrx_stats_t
  302. */
  303. HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS = 29,
  304. /** HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT
  305. * PARAMS:
  306. * - No Params
  307. * RESP MSG:
  308. * - htt_rx_pdev_rate_ext_stats_t
  309. */
  310. HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT = 30,
  311. /** HTT_DBG_EXT_STATS_PDEV_TX_RATE_TXBF
  312. * PARAMS:
  313. * - No Params
  314. * RESP MSG:
  315. * - htt_tx_pdev_txbf_rate_stats_t
  316. */
  317. HTT_DBG_EXT_STATS_PDEV_TX_RATE_TXBF = 31,
  318. /** HTT_DBG_EXT_STATS_TXBF_OFDMA
  319. */
  320. HTT_DBG_EXT_STATS_TXBF_OFDMA = 32,
  321. /** HTT_DBG_EXT_STA_11AX_UL_STATS
  322. * PARAMS:
  323. * - No Params
  324. * RESP MSG:
  325. * - htt_sta_11ax_ul_stats
  326. */
  327. HTT_DBG_EXT_STA_11AX_UL_STATS = 33,
  328. /** HTT_DBG_EXT_VDEV_RTT_RESP_STATS
  329. * PARAMS:
  330. * - config_param0:
  331. * [Bit7 : Bit0] vdev_id:8
  332. * [Bit31 : Bit8] rsvd:24
  333. * RESP MSG:
  334. * -
  335. */
  336. HTT_DBG_EXT_VDEV_RTT_RESP_STATS = 34,
  337. /** HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS
  338. * PARAMS:
  339. * - No Params
  340. * RESP MSG:
  341. * - htt_pktlog_and_htt_ring_stats_t
  342. */
  343. HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS = 35,
  344. /** HTT_DBG_EXT_STATS_DLPAGER_STATS
  345. * PARAMS:
  346. *
  347. * RESP MSG:
  348. * - htt_dlpager_stats_t
  349. */
  350. HTT_DBG_EXT_STATS_DLPAGER_STATS = 36,
  351. /** HTT_DBG_EXT_PHY_COUNTERS_AND_PHY_STATS
  352. * PARAMS:
  353. * - No Params
  354. * RESP MSG:
  355. * - htt_phy_counters_and_phy_stats_t
  356. */
  357. HTT_DBG_EXT_PHY_COUNTERS_AND_PHY_STATS = 37,
  358. /** HTT_DBG_EXT_VDEVS_TXRX_STATS
  359. * PARAMS:
  360. * - No Params
  361. * RESP MSG:
  362. * - htt_vdevs_txrx_stats_t
  363. */
  364. HTT_DBG_EXT_VDEVS_TXRX_STATS = 38,
  365. HTT_DBG_EXT_VDEV_RTT_INITIATOR_STATS = 39,
  366. /** HTT_DBG_EXT_PDEV_PER_STATS
  367. * PARAMS:
  368. * - No Params
  369. * RESP MSG:
  370. * - htt_tx_pdev_per_stats_t
  371. */
  372. HTT_DBG_EXT_PDEV_PER_STATS = 40,
  373. HTT_DBG_EXT_AST_ENTRIES = 41,
  374. /** HTT_DBG_EXT_RX_RING_STATS
  375. * PARAMS:
  376. * - No Params
  377. * RESP MSG:
  378. * - htt_rx_fw_ring_stats_tlv_v
  379. */
  380. HTT_DBG_EXT_RX_RING_STATS = 42,
  381. /** HTT_STRM_GEN_MPDUS_STATS, HTT_STRM_GEN_MPDUS_DETAILS_STATS
  382. * PARAMS:
  383. * - No params
  384. * RESP MSG: HTT_T2H STREAMING_STATS_IND (not EXT_STATS_CONF)
  385. * - HTT_STRM_GEN_MPDUS_STATS:
  386. * htt_stats_strm_gen_mpdus_tlv_t
  387. * - HTT_STRM_GEN_MPDUS_DETAILS_STATS:
  388. * htt_stats_strm_gen_mpdus_details_tlv_t
  389. */
  390. HTT_STRM_GEN_MPDUS_STATS = 43,
  391. HTT_STRM_GEN_MPDUS_DETAILS_STATS = 44,
  392. /** HTT_DBG_SOC_ERROR_STATS
  393. * PARAMS:
  394. * - No Params
  395. * RESP MSG:
  396. * - htt_dmac_reset_stats_tlv
  397. */
  398. HTT_DBG_SOC_ERROR_STATS = 45,
  399. /** HTT_DBG_PDEV_PUNCTURE_STATS
  400. * PARAMS:
  401. * - param 0: enum from htt_tx_pdev_puncture_stats_upload_t, indicating
  402. * the stats to upload
  403. * RESP MSG:
  404. * - one or more htt_pdev_puncture_stats_tlv, depending on param 0
  405. */
  406. HTT_DBG_PDEV_PUNCTURE_STATS = 46,
  407. /** HTT_DBG_EXT_STATS_ML_PEERS_INFO
  408. * PARAMS:
  409. * - param 0:
  410. * Bit 0 -> HTT_ML_PEER_DETAILS_TLV always enabled by default
  411. * Bit 1 -> HTT_ML_PEER_EXT_DETAILS_TLV will be uploaded when
  412. * this bit is set
  413. * Bit 2 -> HTT_ML_LINK_INFO_TLV will be uploaded when this bit is set
  414. * RESP MSG:
  415. * - htt_ml_peer_stats_t
  416. */
  417. HTT_DBG_EXT_STATS_ML_PEERS_INFO = 47,
  418. /** HTT_DBG_ODD_MANDATORY_STATS
  419. * params:
  420. * None
  421. * Response MSG:
  422. * htt_odd_mandatory_pdev_stats_tlv
  423. */
  424. HTT_DBG_ODD_MANDATORY_STATS = 48,
  425. /** HTT_DBG_PDEV_SCHED_ALGO_STATS
  426. * PARAMS:
  427. * - No Params
  428. * RESP MSG:
  429. * - htt_pdev_sched_algo_ofdma_stats_tlv
  430. */
  431. HTT_DBG_PDEV_SCHED_ALGO_STATS = 49,
  432. /** HTT_DBG_ODD_MANDATORY_MUMIMO_STATS
  433. * params:
  434. * None
  435. * Response MSG:
  436. * htt_odd_mandatory_mumimo_pdev_stats_tlv
  437. */
  438. HTT_DBG_ODD_MANDATORY_MUMIMO_STATS = 50,
  439. /** HTT_DBG_ODD_MANDATORY_MUOFDMA_STATS
  440. * params:
  441. * None
  442. * Response MSG:
  443. * htt_odd_mandatory_muofdma_pdev_stats_tlv
  444. */
  445. HTT_DBG_ODD_MANDATORY_MUOFDMA_STATS = 51,
  446. /** HTT_DBG_EXT_PHY_PROF_CAL_STATS
  447. * params:
  448. * None
  449. * Response MSG:
  450. * htt_stats_latency_prof_cal_data_tlv
  451. */
  452. HTT_DBG_EXT_PHY_PROF_CAL_STATS = 52,
  453. /** HTT_DBG_EXT_STATS_PDEV_BW_MGR
  454. * PARAMS:
  455. * - No Params
  456. * RESP MSG:
  457. * - htt_pdev_bw_mgr_stats_t
  458. */
  459. HTT_DBG_EXT_STATS_PDEV_BW_MGR = 53,
  460. /** HTT_DBG_PDEV_MBSSID_CTRL_FRAME_STATS
  461. * PARAMS:
  462. * - No Params
  463. * RESP MSG:
  464. * - htt_pdev_mbssid_ctrl_frame_stats
  465. */
  466. HTT_DBG_PDEV_MBSSID_CTRL_FRAME_STATS = 54,
  467. /** HTT_DBG_SOC_SSR_STATS
  468. * Used for non-MLO UMAC recovery stats.
  469. * PARAMS:
  470. * - No Params
  471. * RESP MSG:
  472. * - htt_umac_ssr_stats_tlv
  473. */
  474. HTT_DBG_SOC_SSR_STATS = 55,
  475. /** HTT_DBG_MLO_UMAC_SSR_STATS
  476. * Used for MLO UMAC recovery stats.
  477. * PARAMS:
  478. * - No Params
  479. * RESP MSG:
  480. * - htt_mlo_umac_ssr_stats_tlv
  481. */
  482. HTT_DBG_MLO_UMAC_SSR_STATS = 56,
  483. /** HTT_DBG_PDEV_TDMA_STATS
  484. * PARAMS:
  485. * - No Params
  486. * RESP MSG:
  487. * - htt_pdev_tdma_stats_tlv
  488. */
  489. HTT_DBG_PDEV_TDMA_STATS = 57,
  490. /** HTT_DBG_CODEL_STATS
  491. * PARAMS:
  492. * - No Params
  493. * RESP MSG:
  494. * - htt_codel_svc_class_stats_tlv
  495. * - htt_codel_msduq_stats_tlv
  496. */
  497. HTT_DBG_CODEL_STATS = 58,
  498. /** HTT_DBG_ODD_PDEV_BE_TX_MU_OFDMA_STATS
  499. * PARAMS:
  500. * - No Params
  501. * RESP MSG:
  502. * - htt_tx_pdev_mpdu_stats_tlv
  503. */
  504. HTT_DBG_ODD_PDEV_BE_TX_MU_OFDMA_STATS = 59,
  505. /** HTT_DBG_EXT_STATS_PDEV_UL_TRIGGER
  506. * PARAMS:
  507. * - No Params
  508. * RESP MSG:
  509. * - htt_rx_pdev_be_ul_ofdma_user_stats_tlv
  510. */
  511. HTT_DBG_ODD_UL_BE_OFDMA_STATS = 60,
  512. /** HTT_DBG_ODD_BE_TXBF_OFDMA_STATS
  513. */
  514. HTT_DBG_ODD_BE_TXBF_OFDMA_STATS = 61,
  515. /** HTT_DBG_ODD_STATS_PDEV_BE_UL_MUMIMO_TRIG_STATS
  516. * PARAMS:
  517. * - No Params
  518. * RESP MSG:
  519. * - htt_rx_pdev_be_ul_ofdma_user_stats_tlv
  520. */
  521. HTT_DBG_ODD_STATS_PDEV_BE_UL_MUMIMO_TRIG_STATS = 62,
  522. /** HTT_DBG_MLO_SCHED_STATS
  523. * PARAMS:
  524. * - No Params
  525. * RESP MSG:
  526. * - htt_pdev_mlo_sched_stats_tlv
  527. */
  528. HTT_DBG_MLO_SCHED_STATS = 63,
  529. /** HTT_DBG_PDEV_MLO_IPC_STATS
  530. * PARAMS:
  531. * - No Params
  532. * RESP MSG:
  533. * - htt_pdev_mlo_ipc_stats_tlv
  534. */
  535. HTT_DBG_PDEV_MLO_IPC_STATS = 64,
  536. /** HTT_DBG_EXT_PDEV_RTT_RESP_STATS
  537. * PARAMS:
  538. * - No Params
  539. * RESP MSG:
  540. * - htt_stats_pdev_rtt_resp_stats_tlv
  541. * - htt_stats_pdev_rtt_hw_stats_tlv
  542. * - htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv
  543. * - htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv
  544. */
  545. HTT_DBG_EXT_PDEV_RTT_RESP_STATS = 65,
  546. /** HTT_DBG_EXT_PDEV_RTT_INITIATOR_STATS
  547. * PARAMS:
  548. * - No Params
  549. * RESP MSG:
  550. * - htt_stats_pdev_rtt_init_stats_tlv
  551. * - htt_stats_pdev_rtt_hw_stats_tlv
  552. */
  553. HTT_DBG_EXT_PDEV_RTT_INITIATOR_STATS = 66,
  554. /* keep this last */
  555. HTT_DBG_NUM_EXT_STATS = 256,
  556. };
  557. /*
  558. * Macros to get/set the bit field in config param[3] that indicates to
  559. * clear corresponding per peer stats specified by config param 1
  560. */
  561. #define HTT_DBG_EXT_PEER_STATS_RESET_M 0x00010000
  562. #define HTT_DBG_EXT_PEER_STATS_RESET_S 16
  563. #define HTT_DBG_EXT_PEER_STATS_RESET_GET(_var) \
  564. (((_var) & HTT_DBG_EXT_PEER_STATS_RESET_M) >> \
  565. HTT_DBG_EXT_PEER_STATS_RESET_S)
  566. #define HTT_DBG_EXT_PEER_STATS_RESET_SET(_var, _val) \
  567. do { \
  568. HTT_CHECK_SET_VAL(HTT_DBG_EXT_PEER_STATS_RESET, _val); \
  569. ((_var) |= ((_val) << HTT_DBG_EXT_PEER_STATS_RESET_S)); \
  570. } while (0)
  571. #define HTT_STATS_SUBTYPE_MAX 16
  572. /* htt_mu_stats_upload_t
  573. * Enumerations for specifying whether to upload all MU stats in response to
  574. * HTT_DBG_EXT_STATS_PDEV_TX_MU, or if not all, then which subset.
  575. */
  576. typedef enum {
  577. /* HTT_UPLOAD_MU_STATS: upload all MU stats:
  578. * UL MU-MIMO + DL MU-MIMO + UL MU-OFDMA + DL MU-OFDMA
  579. * (note: included OFDMA stats are limited to 11ax)
  580. */
  581. HTT_UPLOAD_MU_STATS,
  582. /* HTT_UPLOAD_MU_MIMO_STATS: upload UL MU-MIMO + DL MU-MIMO stats */
  583. HTT_UPLOAD_MU_MIMO_STATS,
  584. /* HTT_UPLOAD_MU_OFDMA_STATS:
  585. * upload UL MU-OFDMA + DL MU-OFDMA stats (note: 11ax only stats)
  586. */
  587. HTT_UPLOAD_MU_OFDMA_STATS,
  588. HTT_UPLOAD_DL_MU_MIMO_STATS,
  589. HTT_UPLOAD_UL_MU_MIMO_STATS,
  590. /* HTT_UPLOAD_DL_MU_OFDMA_STATS:
  591. * upload DL MU-OFDMA stats (note: 11ax only stats)
  592. */
  593. HTT_UPLOAD_DL_MU_OFDMA_STATS,
  594. /* HTT_UPLOAD_UL_MU_OFDMA_STATS:
  595. * upload UL MU-OFDMA stats (note: 11ax only stats)
  596. */
  597. HTT_UPLOAD_UL_MU_OFDMA_STATS,
  598. /*
  599. * Upload BE UL MU-OFDMA + BE DL MU-OFDMA stats,
  600. * TLV: htt_tx_pdev_dl_be_mu_ofdma_sch_stats_tlv and
  601. * htt_tx_pdev_ul_be_mu_ofdma_sch_stats_tlv
  602. */
  603. HTT_UPLOAD_BE_MU_OFDMA_STATS,
  604. /*
  605. * Upload BE DL MU-OFDMA
  606. * TLV: htt_tx_pdev_dl_be_mu_ofdma_sch_stats_tlv
  607. */
  608. HTT_UPLOAD_BE_DL_MU_OFDMA_STATS,
  609. /*
  610. * Upload BE UL MU-OFDMA
  611. * TLV: htt_tx_pdev_ul_be_mu_ofdma_sch_stats_tlv
  612. */
  613. HTT_UPLOAD_BE_UL_MU_OFDMA_STATS,
  614. } htt_mu_stats_upload_t;
  615. /* htt_tx_rate_stats_upload_t
  616. * Enumerations for specifying which stats to upload in response to
  617. * HTT_DBG_EXT_STATS_PDEV_TX_RATE.
  618. */
  619. typedef enum {
  620. /* 11abgn, 11ac, and 11ax TX stats, and a few 11be SU stats
  621. *
  622. * TLV: htt_tx_pdev_rate_stats_tlv
  623. */
  624. HTT_TX_RATE_STATS_DEFAULT,
  625. /*
  626. * Upload 11be OFDMA TX stats
  627. *
  628. * TLV: htt_tx_pdev_rate_stats_be_ofdma_tlv
  629. */
  630. HTT_TX_RATE_STATS_UPLOAD_11BE_OFDMA,
  631. } htt_tx_rate_stats_upload_t;
  632. /* htt_rx_ul_trigger_stats_upload_t
  633. * Enumerations for specifying which stats to upload in response to
  634. * HTT_DBG_EXT_STATS_PDEV_TX_RATE.
  635. */
  636. typedef enum {
  637. /* Upload 11ax UL OFDMA RX Trigger stats
  638. *
  639. * TLV: htt_rx_pdev_ul_trigger_stats_tlv
  640. */
  641. HTT_RX_UL_TRIGGER_STATS_UPLOAD_11AX_OFDMA,
  642. /*
  643. * Upload 11be UL OFDMA RX Trigger stats
  644. *
  645. * TLV: htt_rx_pdev_be_ul_trigger_stats_tlv
  646. */
  647. HTT_RX_UL_TRIGGER_STATS_UPLOAD_11BE_OFDMA,
  648. } htt_rx_ul_trigger_stats_upload_t;
  649. /*
  650. * The htt_rx_ul_mumimo_trigger_stats_upload_t enum values are
  651. * provided by the host as one of the config param elements in
  652. * the HTT_H2T EXT_STATS_REQ message, for stats type ==
  653. * HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS.
  654. */
  655. typedef enum {
  656. /*
  657. * Upload 11ax UL MUMIMO RX Trigger stats
  658. * TLV: htt_rx_pdev_ul_mumimo_trig_stats_tlv
  659. */
  660. HTT_RX_UL_MUMIMO_TRIGGER_STATS_UPLOAD_11AX,
  661. /*
  662. * Upload 11be UL MUMIMO RX Trigger stats
  663. * TLV: htt_rx_pdev_ul_mumimo_trig_be_stats_tlv
  664. */
  665. HTT_RX_UL_MUMIMO_TRIGGER_STATS_UPLOAD_11BE,
  666. } htt_rx_ul_mumimo_trigger_stats_upload_t;
  667. /* htt_tx_pdev_txbf_ofdma_stats_upload_t
  668. * Enumerations for specifying which stats to upload in response to
  669. * HTT_DBG_EXT_STATS_TXBF_OFDMA.
  670. */
  671. typedef enum {
  672. /* upload 11ax TXBF OFDMA stats
  673. *
  674. * TLV: htt_tx_pdev_ax_txbf_ofdma_stats_t
  675. */
  676. HTT_UPLOAD_AX_TXBF_OFDMA_STATS,
  677. /*
  678. * Upload 11be TXBF OFDMA stats
  679. *
  680. * TLV: htt_tx_pdev_be_txbf_ofdma_stats_t
  681. */
  682. HTT_UPLOAD_BE_TXBF_OFDMA_STATS,
  683. } htt_tx_pdev_txbf_ofdma_stats_upload_t;
  684. /* htt_tx_pdev_puncture_stats_upload_t
  685. * Enumerations for specifying which stats to upload in response to
  686. * HTT_DBG_PDEV_PUNCTURE_STATS.
  687. */
  688. typedef enum {
  689. /* upload puncture stats for all supported modes, both TX and RX */
  690. HTT_UPLOAD_PUNCTURE_STATS_ALL,
  691. /* upload puncture stats for all supported TX modes */
  692. HTT_UPLOAD_PUNCTURE_STATS_TX,
  693. /* upload puncture stats for all supported RX modes */
  694. HTT_UPLOAD_PUNCTURE_STATS_RX,
  695. } htt_tx_pdev_puncture_stats_upload_t;
  696. #define HTT_STATS_MAX_STRING_SZ32 4
  697. #define HTT_STATS_MACID_INVALID 0xff
  698. #define HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS 10
  699. #define HTT_TX_HWQ_MAX_CMD_RESULT_STATS 13
  700. #define HTT_TX_HWQ_MAX_CMD_STALL_STATS 5
  701. #define HTT_TX_HWQ_MAX_FES_RESULT_STATS 10
  702. #define HTT_PDEV_STATS_PPDU_DUR_HIST_BINS 16
  703. #define HTT_PDEV_STATS_PPDU_DUR_HIST_INTERVAL_US 250
  704. typedef enum {
  705. HTT_STATS_TX_PDEV_NO_DATA_UNDERRUN = 0,
  706. HTT_STATS_TX_PDEV_DATA_UNDERRUN_BETWEEN_MPDU = 1,
  707. HTT_STATS_TX_PDEV_DATA_UNDERRUN_WITHIN_MPDU = 2,
  708. HTT_TX_PDEV_MAX_URRN_STATS = 3,
  709. } htt_tx_pdev_underrun_enum;
  710. #define HTT_TX_PDEV_MAX_FLUSH_REASON_STATS 150
  711. #define HTT_TX_PDEV_MAX_SIFS_BURST_STATS 9
  712. #define HTT_TX_PDEV_MAX_SIFS_BURST_HIST_STATS 10
  713. #define HTT_TX_PDEV_MAX_PHY_ERR_STATS 18
  714. /* HTT_TX_PDEV_SCHED_TX_MODE_MAX:
  715. * DEPRECATED - num sched tx mode max is 8
  716. */
  717. #define HTT_TX_PDEV_SCHED_TX_MODE_MAX 4
  718. #define HTT_TX_PDEV_NUM_SCHED_ORDER_LOG 20
  719. #define HTT_RX_STATS_REFILL_MAX_RING 4
  720. #define HTT_RX_STATS_RXDMA_MAX_ERR 16
  721. #define HTT_RX_STATS_FW_DROP_REASON_MAX 16
  722. /* Bytes stored in little endian order */
  723. /* Length should be multiple of DWORD */
  724. typedef struct {
  725. htt_tlv_hdr_t tlv_hdr;
  726. A_UINT32 data[1]; /* Can be variable length */
  727. } htt_stats_string_tlv;
  728. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_M 0x000000ff
  729. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_S 0
  730. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_GET(_var) \
  731. (((_var) & HTT_TX_PDEV_STATS_CMN_MAC_ID_M) >> \
  732. HTT_TX_PDEV_STATS_CMN_MAC_ID_S)
  733. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_SET(_var, _val) \
  734. do { \
  735. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_CMN_MAC_ID, _val); \
  736. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_CMN_MAC_ID_S)); \
  737. } while (0)
  738. /* == TX PDEV STATS == */
  739. typedef struct {
  740. htt_tlv_hdr_t tlv_hdr;
  741. /**
  742. * BIT [ 7 : 0] :- mac_id
  743. * BIT [31 : 8] :- reserved
  744. */
  745. A_UINT32 mac_id__word;
  746. /** Num PPDUs queued to HW */
  747. A_UINT32 hw_queued;
  748. /** Num PPDUs reaped from HW */
  749. A_UINT32 hw_reaped;
  750. /** Num underruns */
  751. A_UINT32 underrun;
  752. /** Num HW Paused counter */
  753. A_UINT32 hw_paused;
  754. /** Num HW flush counter */
  755. A_UINT32 hw_flush;
  756. /** Num HW filtered counter */
  757. A_UINT32 hw_filt;
  758. /** Num PPDUs cleaned up in TX abort */
  759. A_UINT32 tx_abort;
  760. /** Num MPDUs requeued by SW */
  761. A_UINT32 mpdu_requed;
  762. /** excessive retries */
  763. A_UINT32 tx_xretry;
  764. /** Last used data hw rate code */
  765. A_UINT32 data_rc;
  766. /** frames dropped due to excessive SW retries */
  767. A_UINT32 mpdu_dropped_xretry;
  768. /** illegal rate phy errors */
  769. A_UINT32 illgl_rate_phy_err;
  770. /** wal pdev continuous xretry */
  771. A_UINT32 cont_xretry;
  772. /** wal pdev tx timeout */
  773. A_UINT32 tx_timeout;
  774. /** wal pdev resets */
  775. A_UINT32 pdev_resets;
  776. /** PHY/BB underrun */
  777. A_UINT32 phy_underrun;
  778. /** MPDU is more than txop limit */
  779. A_UINT32 txop_ovf;
  780. /** Number of Sequences posted */
  781. A_UINT32 seq_posted;
  782. /** Number of Sequences failed queueing */
  783. A_UINT32 seq_failed_queueing;
  784. /** Number of Sequences completed */
  785. A_UINT32 seq_completed;
  786. /** Number of Sequences restarted */
  787. A_UINT32 seq_restarted;
  788. /** Number of MU Sequences posted */
  789. A_UINT32 mu_seq_posted;
  790. /** Number of time HW ring is paused between seq switch within ISR */
  791. A_UINT32 seq_switch_hw_paused;
  792. /** Number of times seq continuation in DSR */
  793. A_UINT32 next_seq_posted_dsr;
  794. /** Number of times seq continuation in ISR */
  795. A_UINT32 seq_posted_isr;
  796. /** Number of seq_ctrl cached. */
  797. A_UINT32 seq_ctrl_cached;
  798. /** Number of MPDUs successfully transmitted */
  799. A_UINT32 mpdu_count_tqm;
  800. /** Number of MSDUs successfully transmitted */
  801. A_UINT32 msdu_count_tqm;
  802. /** Number of MPDUs dropped */
  803. A_UINT32 mpdu_removed_tqm;
  804. /** Number of MSDUs dropped */
  805. A_UINT32 msdu_removed_tqm;
  806. /** Num MPDUs flushed by SW, HWPAUSED, SW TXABORT (Reset,channel change) */
  807. A_UINT32 mpdus_sw_flush;
  808. /** Num MPDUs filtered by HW, all filter condition (TTL expired) */
  809. A_UINT32 mpdus_hw_filter;
  810. /**
  811. * Num MPDUs truncated by PDG
  812. * (TXOP, TBTT, PPDU_duration based on rate, dyn_bw)
  813. */
  814. A_UINT32 mpdus_truncated;
  815. /** Num MPDUs that was tried but didn't receive ACK or BA */
  816. A_UINT32 mpdus_ack_failed;
  817. /** Num MPDUs that was dropped due to expiry (MSDU TTL) */
  818. A_UINT32 mpdus_expired;
  819. /** Num MPDUs that was retried within seq_ctrl (MGMT/LEGACY) */
  820. A_UINT32 mpdus_seq_hw_retry;
  821. /** Num of TQM acked cmds processed */
  822. A_UINT32 ack_tlv_proc;
  823. /** coex_abort_mpdu_cnt valid */
  824. A_UINT32 coex_abort_mpdu_cnt_valid;
  825. /** coex_abort_mpdu_cnt from TX FES stats */
  826. A_UINT32 coex_abort_mpdu_cnt;
  827. /**
  828. * Number of total PPDUs
  829. * (DATA, MGMT, excludes selfgen) tried over the air (OTA)
  830. */
  831. A_UINT32 num_total_ppdus_tried_ota;
  832. /** Number of data PPDUs tried over the air (OTA) */
  833. A_UINT32 num_data_ppdus_tried_ota;
  834. /** Num Local control/mgmt frames (MSDUs) queued */
  835. A_UINT32 local_ctrl_mgmt_enqued;
  836. /**
  837. * Num Local control/mgmt frames (MSDUs) done
  838. * It includes all local ctrl/mgmt completions
  839. * (acked, no ack, flush, TTL, etc)
  840. */
  841. A_UINT32 local_ctrl_mgmt_freed;
  842. /** Num Local data frames (MSDUs) queued */
  843. A_UINT32 local_data_enqued;
  844. /**
  845. * Num Local data frames (MSDUs) done
  846. * It includes all local data completions
  847. * (acked, no ack, flush, TTL, etc)
  848. */
  849. A_UINT32 local_data_freed;
  850. /** Num MPDUs tried by SW */
  851. A_UINT32 mpdu_tried;
  852. /** Num of waiting seq posted in ISR completion handler */
  853. A_UINT32 isr_wait_seq_posted;
  854. A_UINT32 tx_active_dur_us_low;
  855. A_UINT32 tx_active_dur_us_high;
  856. /** Number of MPDUs dropped after max retries */
  857. A_UINT32 remove_mpdus_max_retries;
  858. /** Num HTT cookies dispatched */
  859. A_UINT32 comp_delivered;
  860. /** successful ppdu transmissions */
  861. A_UINT32 ppdu_ok;
  862. /** Scheduler self triggers */
  863. A_UINT32 self_triggers;
  864. /** FES duration of last tx data PPDU in us (sch_eval_end - ppdu_start) */
  865. A_UINT32 tx_time_dur_data;
  866. /** Num of times sequence terminated due to ppdu duration < burst limit */
  867. A_UINT32 seq_qdepth_repost_stop;
  868. /** Num of times MU sequence terminated due to MSDUs reaching threshold */
  869. A_UINT32 mu_seq_min_msdu_repost_stop;
  870. /** Num of times SU sequence terminated due to MSDUs reaching threshold */
  871. A_UINT32 seq_min_msdu_repost_stop;
  872. /** Num of times sequence terminated due to no TXOP available */
  873. A_UINT32 seq_txop_repost_stop;
  874. /** Num of times the next sequence got cancelled */
  875. A_UINT32 next_seq_cancel;
  876. /** Num of times fes offset was misaligned */
  877. A_UINT32 fes_offsets_err_cnt;
  878. /** Num of times peer denylisted for MU-MIMO transmission */
  879. A_UINT32 num_mu_peer_blacklisted;
  880. /** Num of times mu_ofdma seq posted */
  881. A_UINT32 mu_ofdma_seq_posted;
  882. /** Num of times UL MU MIMO seq posted */
  883. A_UINT32 ul_mumimo_seq_posted;
  884. /** Num of times UL OFDMA seq posted */
  885. A_UINT32 ul_ofdma_seq_posted;
  886. /** Num of times Thermal module suspended scheduler */
  887. A_UINT32 thermal_suspend_cnt;
  888. /** Num of times DFS module suspended scheduler */
  889. A_UINT32 dfs_suspend_cnt;
  890. /** Num of times TX abort module suspended scheduler */
  891. A_UINT32 tx_abort_suspend_cnt;
  892. /**
  893. * This field is a target-specific bit mask of suspended PPDU tx queues.
  894. * Since the bit mask definition is different for different targets,
  895. * this field is not meant for general use, but rather for debugging use.
  896. */
  897. A_UINT32 tgt_specific_opaque_txq_suspend_info;
  898. /**
  899. * Last SCHEDULER suspend reason
  900. * 1 -> Thermal Module
  901. * 2 -> DFS Module
  902. * 3 -> Tx Abort Module
  903. */
  904. A_UINT32 last_suspend_reason;
  905. /** Num of dynamic mimo ps dlmumimo sequences posted */
  906. A_UINT32 num_dyn_mimo_ps_dlmumimo_sequences;
  907. /** Num of times su bf sequences are denylisted */
  908. A_UINT32 num_su_txbf_denylisted;
  909. /** pdev uptime in microseconds **/
  910. A_UINT32 pdev_up_time_us_low;
  911. A_UINT32 pdev_up_time_us_high;
  912. /** count of ofdma sequences flushed */
  913. A_UINT32 ofdma_seq_flush;
  914. } htt_stats_tx_pdev_cmn_tlv;
  915. /* preserve old name alias for new name consistent with the tag name */
  916. typedef htt_stats_tx_pdev_cmn_tlv htt_tx_pdev_stats_cmn_tlv;
  917. #define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  918. /* NOTE: Variable length TLV, use length spec to infer array size */
  919. typedef struct {
  920. htt_tlv_hdr_t tlv_hdr;
  921. A_UINT32 urrn_stats[1]; /* HTT_TX_PDEV_MAX_URRN_STATS */
  922. } htt_stats_tx_pdev_underrun_tlv;
  923. /* preserve old name alias for new name consistent with the tag name */
  924. typedef htt_stats_tx_pdev_underrun_tlv htt_tx_pdev_stats_urrn_tlv_v;
  925. #define HTT_TX_PDEV_STATS_FLUSH_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  926. /* NOTE: Variable length TLV, use length spec to infer array size */
  927. typedef struct {
  928. htt_tlv_hdr_t tlv_hdr;
  929. A_UINT32 flush_errs[1]; /* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
  930. } htt_stats_tx_pdev_flush_tlv;
  931. /* preserve old name alias for new name consistent with the tag name */
  932. typedef htt_stats_tx_pdev_flush_tlv htt_tx_pdev_stats_flush_tlv_v;
  933. #define HTT_TX_PDEV_STATS_MLO_ABORT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  934. /* NOTE: Variable length TLV, use length spec to infer array size */
  935. typedef struct {
  936. htt_tlv_hdr_t tlv_hdr;
  937. A_UINT32 mlo_abort_cnt[1]; /* HTT_TX_PDEV_MAX_MLO_ABORT_REASON_STATS */
  938. } htt_stats_tx_pdev_mlo_abort_tlv;
  939. /* preserve old name alias for new name consistent with the tag name */
  940. typedef htt_stats_tx_pdev_mlo_abort_tlv htt_tx_pdev_stats_mlo_abort_tlv_v;
  941. #define HTT_TX_PDEV_STATS_MLO_TXOP_ABORT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  942. /* NOTE: Variable length TLV, use length spec to infer array size */
  943. typedef struct {
  944. htt_tlv_hdr_t tlv_hdr;
  945. A_UINT32 mlo_txop_abort_cnt[1]; /* HTT_TX_PDEV_MAX_MLO_ABORT_REASON_STATS */
  946. } htt_stats_tx_pdev_mlo_txop_abort_tlv;
  947. /* preserve old name alias for new name consistent with the tag name */
  948. typedef htt_stats_tx_pdev_mlo_txop_abort_tlv
  949. htt_tx_pdev_stats_mlo_txop_abort_tlv_v;
  950. #define HTT_TX_PDEV_STATS_SIFS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  951. /* NOTE: Variable length TLV, use length spec to infer array size */
  952. typedef struct {
  953. htt_tlv_hdr_t tlv_hdr;
  954. A_UINT32 sifs_status[1]; /* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
  955. } htt_stats_tx_pdev_sifs_tlv;
  956. /* preserve old name alias for new name consistent with the tag name */
  957. typedef htt_stats_tx_pdev_sifs_tlv htt_tx_pdev_stats_sifs_tlv_v;
  958. #define HTT_TX_PDEV_STATS_PHY_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  959. /* NOTE: Variable length TLV, use length spec to infer array size */
  960. typedef struct {
  961. htt_tlv_hdr_t tlv_hdr;
  962. A_UINT32 phy_errs[1]; /* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
  963. } htt_stats_tx_pdev_phy_err_tlv;
  964. /* preserve old name alias for new name consistent with the tag name */
  965. typedef htt_stats_tx_pdev_phy_err_tlv htt_tx_pdev_stats_phy_err_tlv_v;
  966. /*
  967. * Each array in the below struct has 16 elements, to cover the 16 possible
  968. * values for the CW and AIFS parameters. Each element within the array
  969. * stores the counter indicating how many transmissions have occurred with
  970. * that particular value for the MU EDCA parameter in question.
  971. */
  972. #define HTT_STATS_MUEDCA_VALUE_MAX 16
  973. typedef struct { /* DEPRECATED */
  974. htt_tlv_hdr_t tlv_hdr;
  975. A_UINT32 aifs[HTT_NUM_AC_WMM][HTT_STATS_MUEDCA_VALUE_MAX];
  976. A_UINT32 cw_min[HTT_NUM_AC_WMM][HTT_STATS_MUEDCA_VALUE_MAX];
  977. A_UINT32 cw_max[HTT_NUM_AC_WMM][HTT_STATS_MUEDCA_VALUE_MAX];
  978. } htt_stats_tx_pdev_muedca_params_stats_tlv;
  979. /* preserve old name alias for new name consistent with the tag name */
  980. typedef htt_stats_tx_pdev_muedca_params_stats_tlv
  981. htt_tx_pdev_muedca_params_stats_tlv_v;
  982. typedef struct {
  983. htt_tlv_hdr_t tlv_hdr;
  984. A_UINT32 relaxed_mu_edca[HTT_NUM_AC_WMM];
  985. A_UINT32 mumimo_aggressive_mu_edca[HTT_NUM_AC_WMM];
  986. A_UINT32 mumimo_relaxed_mu_edca[HTT_NUM_AC_WMM];
  987. A_UINT32 muofdma_aggressive_mu_edca[HTT_NUM_AC_WMM];
  988. A_UINT32 muofdma_relaxed_mu_edca[HTT_NUM_AC_WMM];
  989. A_UINT32 latency_mu_edca[HTT_NUM_AC_WMM];
  990. A_UINT32 psd_boost_mu_edca[HTT_NUM_AC_WMM];
  991. } htt_stats_tx_pdev_mu_edca_params_stats_tlv;
  992. /* preserve old name alias for new name consistent with the tag name */
  993. typedef htt_stats_tx_pdev_mu_edca_params_stats_tlv
  994. htt_tx_pdev_mu_edca_params_stats_tlv_v;
  995. typedef struct {
  996. htt_tlv_hdr_t tlv_hdr;
  997. A_UINT32 ul_mumimo_less_aggressive[HTT_NUM_AC_WMM];
  998. A_UINT32 ul_mumimo_medium_aggressive[HTT_NUM_AC_WMM];
  999. A_UINT32 ul_mumimo_highly_aggressive[HTT_NUM_AC_WMM];
  1000. A_UINT32 ul_mumimo_default_relaxed[HTT_NUM_AC_WMM];
  1001. A_UINT32 ul_muofdma_less_aggressive[HTT_NUM_AC_WMM];
  1002. A_UINT32 ul_muofdma_medium_aggressive[HTT_NUM_AC_WMM];
  1003. A_UINT32 ul_muofdma_highly_aggressive[HTT_NUM_AC_WMM];
  1004. A_UINT32 ul_muofdma_default_relaxed[HTT_NUM_AC_WMM];
  1005. } htt_stats_tx_pdev_ap_edca_params_stats_tlv;
  1006. /* preserve old name alias for new name consistent with the tag name */
  1007. typedef htt_stats_tx_pdev_ap_edca_params_stats_tlv
  1008. htt_tx_pdev_ap_edca_params_stats_tlv_v;
  1009. #define HTT_TX_PDEV_SIFS_BURST_HIST_STATS 10
  1010. #define HTT_TX_PDEV_STATS_SIFS_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1011. /* NOTE: Variable length TLV, use length spec to infer array size */
  1012. typedef struct {
  1013. htt_tlv_hdr_t tlv_hdr;
  1014. A_UINT32 sifs_hist_status[1]; /* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
  1015. } htt_stats_tx_pdev_sifs_hist_tlv;
  1016. /* preserve old name alias for new name consistent with the tag name */
  1017. typedef htt_stats_tx_pdev_sifs_hist_tlv htt_tx_pdev_stats_sifs_hist_tlv_v;
  1018. typedef struct {
  1019. htt_tlv_hdr_t tlv_hdr;
  1020. A_UINT32 num_data_ppdus_legacy_su;
  1021. A_UINT32 num_data_ppdus_ac_su;
  1022. A_UINT32 num_data_ppdus_ax_su;
  1023. A_UINT32 num_data_ppdus_ac_su_txbf;
  1024. A_UINT32 num_data_ppdus_ax_su_txbf;
  1025. } htt_stats_tx_pdev_tx_ppdu_stats_tlv;
  1026. /* preserve old name alias for new name consistent with the tag name */
  1027. typedef htt_stats_tx_pdev_tx_ppdu_stats_tlv
  1028. htt_tx_pdev_stats_tx_ppdu_stats_tlv_v;
  1029. typedef enum {
  1030. HTT_TX_WAL_ISR_SCHED_SUCCESS,
  1031. HTT_TX_WAL_ISR_SCHED_FILTER,
  1032. HTT_TX_WAL_ISR_SCHED_RESP_TIMEOUT,
  1033. HTT_TX_WAL_ISR_SCHED_RATES_EXHAUSTED,
  1034. HTT_TX_WAL_ISR_SCHED_DATA_EXHAUSTED,
  1035. HTT_TX_WAL_ISR_SCHED_SEQ_ABORT,
  1036. HTT_TX_WAL_ISR_SCHED_NOTIFY_FRAME_ENCOUNTERED,
  1037. HTT_TX_WAL_ISR_SCHED_COMPLETION,
  1038. HTT_TX_WAL_ISR_SCHED_IN_PROGRESS,
  1039. } htt_tx_wal_tx_isr_sched_status;
  1040. /* [0]- nr4 , [1]- nr8 */
  1041. #define HTT_STATS_NUM_NR_BINS 2
  1042. /* Termination status stated in htt_tx_wal_tx_isr_sched_status */
  1043. #define HTT_STATS_MAX_NUM_SCHED_STATUS 9
  1044. #define HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST 10
  1045. #define HTT_STATS_MAX_NUM_SCHED_STATUS_WORDS \
  1046. (HTT_STATS_NUM_NR_BINS * HTT_STATS_MAX_NUM_SCHED_STATUS)
  1047. #define HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS \
  1048. (HTT_STATS_NUM_NR_BINS * HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST)
  1049. typedef enum {
  1050. HTT_STATS_HWMODE_AC = 0,
  1051. HTT_STATS_HWMODE_AX = 1,
  1052. HTT_STATS_HWMODE_BE = 2,
  1053. } htt_stats_hw_mode;
  1054. typedef struct {
  1055. htt_tlv_hdr_t tlv_hdr;
  1056. A_UINT32 hw_mode; /* HTT_STATS_HWMODE_xx */
  1057. A_UINT32 mu_mimo_num_seq_term_status[HTT_STATS_MAX_NUM_SCHED_STATUS_WORDS];
  1058. A_UINT32 mu_mimo_num_ppdu_completed_per_burst[HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS];
  1059. A_UINT32 mu_mimo_num_seq_posted[HTT_STATS_NUM_NR_BINS];
  1060. A_UINT32 mu_mimo_num_ppdu_posted_per_burst[HTT_STATS_MAX_NUM_MU_PPDU_PER_BURST_WORDS];
  1061. } htt_stats_mu_ppdu_dist_tlv;
  1062. /* preserve old name alias for new name consistent with the tag name */
  1063. typedef htt_stats_mu_ppdu_dist_tlv htt_pdev_mu_ppdu_dist_tlv_v;
  1064. #define HTT_TX_PDEV_STATS_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1065. /* NOTE: Variable length TLV, use length spec to infer array size .
  1066. *
  1067. * Tried_mpdu_cnt_hist is the histogram of MPDUs tries per HWQ.
  1068. * The tries here is the count of the MPDUS within a PPDU that the
  1069. * HW had attempted to transmit on air, for the HWSCH Schedule
  1070. * command submitted by FW.It is not the retry attempts.
  1071. * The histogram bins are 0-29, 30-59, 60-89 and so on. The are
  1072. * 10 bins in this histogram. They are defined in FW using the
  1073. * following macros
  1074. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  1075. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  1076. *
  1077. */
  1078. typedef struct {
  1079. htt_tlv_hdr_t tlv_hdr;
  1080. A_UINT32 hist_bin_size;
  1081. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_PDEV_TRIED_MPDU_CNT_HIST */
  1082. } htt_stats_tx_pdev_tried_mpdu_cnt_hist_tlv;
  1083. /* preserve old name alias for new name consistent with the tag name */
  1084. typedef htt_stats_tx_pdev_tried_mpdu_cnt_hist_tlv
  1085. htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v;
  1086. typedef struct {
  1087. htt_tlv_hdr_t tlv_hdr;
  1088. /* Num MGMT MPDU transmitted by the target */
  1089. A_UINT32 fw_tx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  1090. } htt_stats_pdev_ctrl_path_tx_stats_tlv;
  1091. /* preserve old name alias for new name consistent with the tag name */
  1092. typedef htt_stats_pdev_ctrl_path_tx_stats_tlv htt_pdev_ctrl_path_tx_stats_tlv_v;
  1093. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_TX
  1094. * TLV_TAGS:
  1095. * - HTT_STATS_TX_PDEV_CMN_TAG
  1096. * - HTT_STATS_TX_PDEV_URRN_TAG
  1097. * - HTT_STATS_TX_PDEV_SIFS_TAG
  1098. * - HTT_STATS_TX_PDEV_FLUSH_TAG
  1099. * - HTT_STATS_TX_PDEV_PHY_ERR_TAG
  1100. * - HTT_STATS_TX_PDEV_SIFS_HIST_TAG
  1101. * - HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG
  1102. * - HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG
  1103. * - HTT_STATS_PDEV_CTRL_PATH_TX_STATS_TAG
  1104. * - HTT_STATS_MU_PPDU_DIST_TAG
  1105. */
  1106. /* NOTE:
  1107. * This structure is for documentation, and cannot be safely used directly.
  1108. * Instead, use the constituent TLV structures to fill/parse.
  1109. */
  1110. typedef struct _htt_tx_pdev_stats {
  1111. htt_stats_tx_pdev_cmn_tlv cmn_tlv;
  1112. htt_stats_tx_pdev_underrun_tlv underrun_tlv;
  1113. htt_stats_tx_pdev_sifs_tlv sifs_tlv;
  1114. htt_stats_tx_pdev_flush_tlv flush_tlv;
  1115. htt_stats_tx_pdev_phy_err_tlv phy_err_tlv;
  1116. htt_stats_tx_pdev_sifs_hist_tlv sifs_hist_tlv;
  1117. htt_stats_tx_pdev_tx_ppdu_stats_tlv tx_su_tlv;
  1118. htt_stats_tx_pdev_tried_mpdu_cnt_hist_tlv tried_mpdu_cnt_hist_tlv;
  1119. htt_stats_pdev_ctrl_path_tx_stats_tlv ctrl_path_tx_tlv;
  1120. htt_stats_mu_ppdu_dist_tlv mu_ppdu_dist_tlv;
  1121. } htt_tx_pdev_stats_t;
  1122. /* == SOC ERROR STATS == */
  1123. /* =============== PDEV ERROR STATS ============== */
  1124. #define HTT_STATS_MAX_HW_INTR_NAME_LEN 8
  1125. typedef struct {
  1126. htt_tlv_hdr_t tlv_hdr;
  1127. /* Stored as little endian */
  1128. A_UINT8 hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN];
  1129. A_UINT32 mask;
  1130. A_UINT32 count;
  1131. } htt_stats_hw_intr_misc_tlv;
  1132. /* preserve old name alias for new name consistent with the tag name */
  1133. typedef htt_stats_hw_intr_misc_tlv htt_hw_stats_intr_misc_tlv;
  1134. #define HTT_STATS_MAX_HW_MODULE_NAME_LEN 8
  1135. typedef struct {
  1136. htt_tlv_hdr_t tlv_hdr;
  1137. /* Stored as little endian */
  1138. A_UINT8 hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN];
  1139. A_UINT32 count;
  1140. } htt_stats_hw_wd_timeout_tlv;
  1141. /* preserve old name alias for new name consistent with the tag name */
  1142. typedef htt_stats_hw_wd_timeout_tlv htt_hw_stats_wd_timeout_tlv;
  1143. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_M 0x000000ff
  1144. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_S 0
  1145. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_GET(_var) \
  1146. (((_var) & HTT_HW_STATS_PDEV_ERRS_MAC_ID_M) >> \
  1147. HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)
  1148. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_SET(_var, _val) \
  1149. do { \
  1150. HTT_CHECK_SET_VAL(HTT_HW_STATS_PDEV_ERRS_MAC_ID, _val); \
  1151. ((_var) |= ((_val) << HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)); \
  1152. } while (0)
  1153. typedef struct {
  1154. htt_tlv_hdr_t tlv_hdr;
  1155. /* BIT [ 7 : 0] :- mac_id
  1156. * BIT [31 : 8] :- reserved
  1157. */
  1158. A_UINT32 mac_id__word;
  1159. A_UINT32 tx_abort;
  1160. A_UINT32 tx_abort_fail_count;
  1161. A_UINT32 rx_abort;
  1162. A_UINT32 rx_abort_fail_count;
  1163. A_UINT32 warm_reset;
  1164. A_UINT32 cold_reset;
  1165. A_UINT32 tx_flush;
  1166. A_UINT32 tx_glb_reset;
  1167. A_UINT32 tx_txq_reset;
  1168. A_UINT32 rx_timeout_reset;
  1169. A_UINT32 mac_cold_reset_restore_cal;
  1170. A_UINT32 mac_cold_reset;
  1171. A_UINT32 mac_warm_reset;
  1172. A_UINT32 mac_only_reset;
  1173. A_UINT32 phy_warm_reset;
  1174. A_UINT32 phy_warm_reset_ucode_trig;
  1175. A_UINT32 mac_warm_reset_restore_cal;
  1176. A_UINT32 mac_sfm_reset;
  1177. A_UINT32 phy_warm_reset_m3_ssr;
  1178. A_UINT32 phy_warm_reset_reason_phy_m3;
  1179. A_UINT32 phy_warm_reset_reason_tx_hw_stuck;
  1180. A_UINT32 phy_warm_reset_reason_num_cca_rx_frame_stuck;
  1181. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_rx_busy;
  1182. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_mac_hang;
  1183. A_UINT32 phy_warm_reset_reason_mac_reset_converted_phy_reset;
  1184. A_UINT32 wal_rx_recovery_rst_mac_hang_count;
  1185. A_UINT32 wal_rx_recovery_rst_known_sig_count;
  1186. A_UINT32 wal_rx_recovery_rst_no_rx_count;
  1187. A_UINT32 wal_rx_recovery_rst_no_rx_consecutive_count;
  1188. A_UINT32 wal_rx_recovery_rst_rx_busy_count;
  1189. A_UINT32 wal_rx_recovery_rst_phy_mac_hang_count;
  1190. A_UINT32 rx_flush_cnt; /* Num rx flush issued */
  1191. A_UINT32 phy_warm_reset_reason_tx_lifetime_expiry_cca_stuck;
  1192. A_UINT32 phy_warm_reset_reason_tx_consecutive_flush9_war;
  1193. A_UINT32 phy_warm_reset_reason_tx_hwsch_reset_war;
  1194. A_UINT32 phy_warm_reset_reason_hwsch_wdog_or_cca_wdog_war;
  1195. A_UINT32 fw_rx_rings_reset;
  1196. /**
  1197. * Num of iterations rx leak prevention successfully done.
  1198. */
  1199. A_UINT32 rx_dest_drain_rx_descs_leak_prevention_done;
  1200. /**
  1201. * Num of rx descs successfully saved by rx leak prevention.
  1202. */
  1203. A_UINT32 rx_dest_drain_rx_descs_saved_cnt;
  1204. /*
  1205. * Stats to debug reason Rx leak prevention
  1206. * was not required to be kicked in.
  1207. */
  1208. A_UINT32 rx_dest_drain_rxdma2reo_leak_detected;
  1209. A_UINT32 rx_dest_drain_rxdma2fw_leak_detected;
  1210. A_UINT32 rx_dest_drain_rxdma2wbm_leak_detected;
  1211. A_UINT32 rx_dest_drain_rxdma1_2sw_leak_detected;
  1212. A_UINT32 rx_dest_drain_rx_drain_ok_mac_idle;
  1213. A_UINT32 rx_dest_drain_ok_mac_not_idle;
  1214. A_UINT32 rx_dest_drain_prerequisite_invld;
  1215. A_UINT32 rx_dest_drain_skip_for_non_lmac_reset;
  1216. A_UINT32 rx_dest_drain_hw_fifo_not_empty_post_drain_wait;
  1217. } htt_stats_hw_pdev_errs_tlv;
  1218. /* preserve old name alias for new name consistent with the tag name */
  1219. typedef htt_stats_hw_pdev_errs_tlv htt_hw_stats_pdev_errs_tlv;
  1220. typedef struct {
  1221. htt_tlv_hdr_t tlv_hdr;
  1222. /* BIT [ 7 : 0] :- mac_id
  1223. * BIT [31 : 8] :- reserved
  1224. */
  1225. A_UINT32 mac_id__word;
  1226. A_UINT32 last_unpause_ppdu_id;
  1227. A_UINT32 hwsch_unpause_wait_tqm_write;
  1228. A_UINT32 hwsch_dummy_tlv_skipped;
  1229. A_UINT32 hwsch_misaligned_offset_received;
  1230. A_UINT32 hwsch_reset_count;
  1231. A_UINT32 hwsch_dev_reset_war;
  1232. A_UINT32 hwsch_delayed_pause;
  1233. A_UINT32 hwsch_long_delayed_pause;
  1234. A_UINT32 sch_rx_ppdu_no_response;
  1235. A_UINT32 sch_selfgen_response;
  1236. A_UINT32 sch_rx_sifs_resp_trigger;
  1237. } htt_stats_whal_tx_tlv;
  1238. /* preserve old name alias for new name consistent with the tag name */
  1239. typedef htt_stats_whal_tx_tlv htt_hw_stats_whal_tx_tlv;
  1240. typedef struct {
  1241. htt_tlv_hdr_t tlv_hdr;
  1242. A_UINT32 wsib_event_watchdog_timeout;
  1243. A_UINT32 wsib_event_slave_tlv_length_error;
  1244. A_UINT32 wsib_event_slave_parity_error;
  1245. A_UINT32 wsib_event_slave_direct_message;
  1246. A_UINT32 wsib_event_slave_backpressure_error;
  1247. A_UINT32 wsib_event_master_tlv_length_error;
  1248. } htt_stats_whal_wsi_tlv;
  1249. typedef struct {
  1250. htt_tlv_hdr_t tlv_hdr;
  1251. /**
  1252. * BIT [ 7 : 0] :- mac_id
  1253. * BIT [31 : 8] :- reserved
  1254. */
  1255. union {
  1256. struct {
  1257. A_UINT32 mac_id: 8,
  1258. reserved: 24;
  1259. };
  1260. A_UINT32 mac_id__word;
  1261. };
  1262. /**
  1263. * hw_wars is a variable-length array, with each element counting
  1264. * the number of occurrences of the corresponding type of HW WAR.
  1265. * That is, hw_wars[0] indicates how many times HW WAR 0 occurred,
  1266. * hw_wars[1] indicates how many times HW WAR 1 occurred, etc.
  1267. * The target has an internal HW WAR mapping that it uses to keep
  1268. * track of which HW WAR is WAR 0, which HW WAR is WAR 1, etc.
  1269. */
  1270. A_UINT32 hw_wars[1/*or more*/];
  1271. } htt_stats_hw_war_tlv;
  1272. /* preserve old name alias for new name consistent with the tag name */
  1273. typedef htt_stats_hw_war_tlv htt_hw_war_stats_tlv;
  1274. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_ERROR
  1275. * TLV_TAGS:
  1276. * - HTT_STATS_HW_PDEV_ERRS_TAG
  1277. * - HTT_STATS_HW_INTR_MISC_TAG (multiple)
  1278. * - HTT_STATS_HW_WD_TIMEOUT_TAG (multiple)
  1279. * - HTT_STATS_WHAL_TX_TAG
  1280. * - HTT_STATS_HW_WAR_TAG
  1281. */
  1282. /* NOTE:
  1283. * This structure is for documentation, and cannot be safely used directly.
  1284. * Instead, use the constituent TLV structures to fill/parse.
  1285. */
  1286. typedef struct _htt_pdev_err_stats {
  1287. htt_stats_hw_pdev_errs_tlv pdev_errs;
  1288. htt_stats_hw_intr_misc_tlv misc_stats[1];
  1289. htt_stats_hw_wd_timeout_tlv wd_timeout[1];
  1290. htt_stats_whal_tx_tlv whal_tx_stats;
  1291. htt_stats_hw_war_tlv hw_war;
  1292. } htt_hw_err_stats_t;
  1293. /* ============ PEER STATS ============ */
  1294. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M 0x0000ffff
  1295. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S 0
  1296. #define HTT_MSDU_FLOW_STATS_TID_NUM_M 0x000f0000
  1297. #define HTT_MSDU_FLOW_STATS_TID_NUM_S 16
  1298. #define HTT_MSDU_FLOW_STATS_DROP_M 0x00100000
  1299. #define HTT_MSDU_FLOW_STATS_DROP_S 20
  1300. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_GET(_var) \
  1301. (((_var) & HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M) >> \
  1302. HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)
  1303. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_SET(_var, _val) \
  1304. do { \
  1305. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TX_FLOW_NUM, _val); \
  1306. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)); \
  1307. } while (0)
  1308. #define HTT_MSDU_FLOW_STATS_TID_NUM_GET(_var) \
  1309. (((_var) & HTT_MSDU_FLOW_STATS_TID_NUM_M) >> \
  1310. HTT_MSDU_FLOW_STATS_TID_NUM_S)
  1311. #define HTT_MSDU_FLOW_STATS_TID_NUM_SET(_var, _val) \
  1312. do { \
  1313. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TID_NUM, _val); \
  1314. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TID_NUM_S)); \
  1315. } while (0)
  1316. #define HTT_MSDU_FLOW_STATS_DROP_GET(_var) \
  1317. (((_var) & HTT_MSDU_FLOW_STATS_DROP_M) >> \
  1318. HTT_MSDU_FLOW_STATS_DROP_S)
  1319. #define HTT_MSDU_FLOW_STATS_DROP_SET(_var, _val) \
  1320. do { \
  1321. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_DROP, _val); \
  1322. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_DROP_S)); \
  1323. } while (0)
  1324. typedef struct _htt_msdu_flow_stats_tlv {
  1325. htt_tlv_hdr_t tlv_hdr;
  1326. A_UINT32 last_update_timestamp;
  1327. A_UINT32 last_add_timestamp;
  1328. A_UINT32 last_remove_timestamp;
  1329. A_UINT32 total_processed_msdu_count;
  1330. A_UINT32 cur_msdu_count_in_flowq;
  1331. /** This will help to find which peer_id is stuck state */
  1332. A_UINT32 sw_peer_id;
  1333. /**
  1334. * BIT [15 : 0] :- tx_flow_number
  1335. * BIT [19 : 16] :- tid_num
  1336. * BIT [20 : 20] :- drop_rule
  1337. * BIT [31 : 21] :- reserved
  1338. */
  1339. A_UINT32 tx_flow_no__tid_num__drop_rule;
  1340. A_UINT32 last_cycle_enqueue_count;
  1341. A_UINT32 last_cycle_dequeue_count;
  1342. A_UINT32 last_cycle_drop_count;
  1343. /**
  1344. * BIT [15 : 0] :- current_drop_th
  1345. * BIT [31 : 16] :- reserved
  1346. */
  1347. A_UINT32 current_drop_th;
  1348. } htt_stats_peer_msdu_flowq_tlv;
  1349. /* preserve old name alias for new name consistent with the tag name */
  1350. typedef htt_stats_peer_msdu_flowq_tlv htt_msdu_flow_stats_tlv;
  1351. #define MAX_HTT_TID_NAME 8
  1352. /* DWORD sw_peer_id__tid_num */
  1353. #define HTT_TX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  1354. #define HTT_TX_TID_STATS_SW_PEER_ID_S 0
  1355. #define HTT_TX_TID_STATS_TID_NUM_M 0xffff0000
  1356. #define HTT_TX_TID_STATS_TID_NUM_S 16
  1357. #define HTT_TX_TID_STATS_SW_PEER_ID_GET(_var) \
  1358. (((_var) & HTT_TX_TID_STATS_SW_PEER_ID_M) >> \
  1359. HTT_TX_TID_STATS_SW_PEER_ID_S)
  1360. #define HTT_TX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  1361. do { \
  1362. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_SW_PEER_ID, _val); \
  1363. ((_var) |= ((_val) << HTT_TX_TID_STATS_SW_PEER_ID_S)); \
  1364. } while (0)
  1365. #define HTT_TX_TID_STATS_TID_NUM_GET(_var) \
  1366. (((_var) & HTT_TX_TID_STATS_TID_NUM_M) >> \
  1367. HTT_TX_TID_STATS_TID_NUM_S)
  1368. #define HTT_TX_TID_STATS_TID_NUM_SET(_var, _val) \
  1369. do { \
  1370. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_TID_NUM, _val); \
  1371. ((_var) |= ((_val) << HTT_TX_TID_STATS_TID_NUM_S)); \
  1372. } while (0)
  1373. /* DWORD num_sched_pending__num_ppdu_in_hwq */
  1374. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_M 0x000000ff
  1375. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_S 0
  1376. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M 0x0000ff00
  1377. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S 8
  1378. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_GET(_var) \
  1379. (((_var) & HTT_TX_TID_STATS_NUM_SCHED_PENDING_M) >> \
  1380. HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)
  1381. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_SET(_var, _val) \
  1382. do { \
  1383. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_SCHED_PENDING, _val); \
  1384. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)); \
  1385. } while (0)
  1386. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_GET(_var) \
  1387. (((_var) & HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M) >> \
  1388. HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)
  1389. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_SET(_var, _val) \
  1390. do { \
  1391. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ, _val); \
  1392. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)); \
  1393. } while (0)
  1394. /* Tidq stats */
  1395. typedef struct _htt_tx_tid_stats_tlv {
  1396. htt_tlv_hdr_t tlv_hdr;
  1397. /** Stored as little endian */
  1398. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  1399. /**
  1400. * BIT [15 : 0] :- sw_peer_id
  1401. * BIT [31 : 16] :- tid_num
  1402. */
  1403. A_UINT32 sw_peer_id__tid_num;
  1404. /**
  1405. * BIT [ 7 : 0] :- num_sched_pending
  1406. * BIT [15 : 8] :- num_ppdu_in_hwq
  1407. * BIT [31 : 16] :- reserved
  1408. */
  1409. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  1410. A_UINT32 tid_flags;
  1411. /** per tid # of hw_queued ppdu */
  1412. A_UINT32 hw_queued;
  1413. /** number of per tid successful PPDU */
  1414. A_UINT32 hw_reaped;
  1415. /** per tid Num MPDUs filtered by HW */
  1416. A_UINT32 mpdus_hw_filter;
  1417. A_UINT32 qdepth_bytes;
  1418. A_UINT32 qdepth_num_msdu;
  1419. A_UINT32 qdepth_num_mpdu;
  1420. A_UINT32 last_scheduled_tsmp;
  1421. A_UINT32 pause_module_id;
  1422. A_UINT32 block_module_id;
  1423. /** tid tx airtime in sec */
  1424. A_UINT32 tid_tx_airtime;
  1425. } htt_stats_tx_tid_details_tlv;
  1426. /* preserve old name alias for new name consistent with the tag name */
  1427. typedef htt_stats_tx_tid_details_tlv htt_tx_tid_stats_tlv;
  1428. /* Tidq stats */
  1429. typedef struct _htt_tx_tid_stats_v1_tlv {
  1430. htt_tlv_hdr_t tlv_hdr;
  1431. /** Stored as little endian */
  1432. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  1433. /**
  1434. * BIT [15 : 0] :- sw_peer_id
  1435. * BIT [31 : 16] :- tid_num
  1436. */
  1437. A_UINT32 sw_peer_id__tid_num;
  1438. /**
  1439. * BIT [ 7 : 0] :- num_sched_pending
  1440. * BIT [15 : 8] :- num_ppdu_in_hwq
  1441. * BIT [31 : 16] :- reserved
  1442. */
  1443. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  1444. A_UINT32 tid_flags;
  1445. /** Max qdepth in bytes reached by this tid */
  1446. A_UINT32 max_qdepth_bytes;
  1447. /** number of msdus qdepth reached max */
  1448. A_UINT32 max_qdepth_n_msdus;
  1449. A_UINT32 rsvd;
  1450. A_UINT32 qdepth_bytes;
  1451. A_UINT32 qdepth_num_msdu;
  1452. A_UINT32 qdepth_num_mpdu;
  1453. A_UINT32 last_scheduled_tsmp;
  1454. A_UINT32 pause_module_id;
  1455. A_UINT32 block_module_id;
  1456. /** tid tx airtime in sec */
  1457. A_UINT32 tid_tx_airtime;
  1458. A_UINT32 allow_n_flags;
  1459. /**
  1460. * BIT [15 : 0] :- sendn_frms_allowed
  1461. * BIT [31 : 16] :- reserved
  1462. */
  1463. A_UINT32 sendn_frms_allowed;
  1464. /*
  1465. * tid_ext_flags, tid_ext2_flags, and tid_flush_reason are opaque fields
  1466. * that cannot be interpreted by the host.
  1467. * They are only for off-line debug.
  1468. */
  1469. A_UINT32 tid_ext_flags;
  1470. A_UINT32 tid_ext2_flags;
  1471. A_UINT32 tid_flush_reason;
  1472. A_UINT32 mlo_flush_tqm_status_pending_low;
  1473. A_UINT32 mlo_flush_tqm_status_pending_high;
  1474. A_UINT32 mlo_flush_partner_info_low;
  1475. A_UINT32 mlo_flush_partner_info_high;
  1476. A_UINT32 mlo_flush_initator_info_low;
  1477. A_UINT32 mlo_flush_initator_info_high;
  1478. /*
  1479. * head_msdu_tqm_timestamp_us:
  1480. * MSDU enqueue timestamp (TQM reference timestamp) for the MSDU
  1481. * at the head of the MPDU queue
  1482. * head_msdu_tqm_latency_us:
  1483. * The age of the MSDU that is at the head of the MPDU queue,
  1484. * i.e. the delta between the current TQM time and the MSDU's
  1485. * enqueue timestamp.
  1486. */
  1487. A_UINT32 head_msdu_tqm_timestamp_us;
  1488. A_UINT32 head_msdu_tqm_latency_us;
  1489. } htt_stats_tx_tid_details_v1_tlv;
  1490. /* preserve old name alias for new name consistent with the tag name */
  1491. typedef htt_stats_tx_tid_details_v1_tlv htt_tx_tid_stats_v1_tlv;
  1492. #define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  1493. #define HTT_RX_TID_STATS_SW_PEER_ID_S 0
  1494. #define HTT_RX_TID_STATS_TID_NUM_M 0xffff0000
  1495. #define HTT_RX_TID_STATS_TID_NUM_S 16
  1496. #define HTT_RX_TID_STATS_SW_PEER_ID_GET(_var) \
  1497. (((_var) & HTT_RX_TID_STATS_SW_PEER_ID_M) >> \
  1498. HTT_RX_TID_STATS_SW_PEER_ID_S)
  1499. #define HTT_RX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  1500. do { \
  1501. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_SW_PEER_ID, _val); \
  1502. ((_var) |= ((_val) << HTT_RX_TID_STATS_SW_PEER_ID_S)); \
  1503. } while (0)
  1504. #define HTT_RX_TID_STATS_TID_NUM_GET(_var) \
  1505. (((_var) & HTT_RX_TID_STATS_TID_NUM_M) >> \
  1506. HTT_RX_TID_STATS_TID_NUM_S)
  1507. #define HTT_RX_TID_STATS_TID_NUM_SET(_var, _val) \
  1508. do { \
  1509. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_TID_NUM, _val); \
  1510. ((_var) |= ((_val) << HTT_RX_TID_STATS_TID_NUM_S)); \
  1511. } while (0)
  1512. typedef struct _htt_rx_tid_stats_tlv {
  1513. htt_tlv_hdr_t tlv_hdr;
  1514. /**
  1515. * BIT [15 : 0] : sw_peer_id
  1516. * BIT [31 : 16] : tid_num
  1517. */
  1518. A_UINT32 sw_peer_id__tid_num;
  1519. /** Stored as little endian */
  1520. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  1521. /**
  1522. * dup_in_reorder not collected per tid for now,
  1523. * as there is no wal_peer back ptr in data rx peer.
  1524. */
  1525. A_UINT32 dup_in_reorder;
  1526. A_UINT32 dup_past_outside_window;
  1527. A_UINT32 dup_past_within_window;
  1528. /** Number of per tid MSDUs with flag of decrypt_err */
  1529. A_UINT32 rxdesc_err_decrypt;
  1530. /** tid rx airtime in sec */
  1531. A_UINT32 tid_rx_airtime;
  1532. } htt_stats_rx_tid_details_tlv;
  1533. /* preserve old name alias for new name consistent with the tag name */
  1534. typedef htt_stats_rx_tid_details_tlv htt_rx_tid_stats_tlv;
  1535. #define HTT_MAX_COUNTER_NAME 8
  1536. typedef struct {
  1537. htt_tlv_hdr_t tlv_hdr;
  1538. /** Stored as little endian */
  1539. A_UINT8 counter_name[HTT_MAX_COUNTER_NAME];
  1540. A_UINT32 count;
  1541. } htt_stats_counter_name_tlv;
  1542. /* preserve old name alias for new name consistent with the tag name */
  1543. typedef htt_stats_counter_name_tlv htt_counter_tlv;
  1544. typedef struct {
  1545. htt_tlv_hdr_t tlv_hdr;
  1546. /** Number of rx PPDU */
  1547. A_UINT32 ppdu_cnt;
  1548. /** Number of rx MPDU */
  1549. A_UINT32 mpdu_cnt;
  1550. /** Number of rx MSDU */
  1551. A_UINT32 msdu_cnt;
  1552. /** pause bitmap */
  1553. A_UINT32 pause_bitmap;
  1554. /** block bitmap */
  1555. A_UINT32 block_bitmap;
  1556. /** current timestamp */
  1557. A_UINT32 current_timestamp;
  1558. /** Peer cumulative tx airtime in sec */
  1559. A_UINT32 peer_tx_airtime;
  1560. /** Peer cumulative rx airtime in sec */
  1561. A_UINT32 peer_rx_airtime;
  1562. /** Peer current rssi in dBm */
  1563. A_INT32 rssi;
  1564. /** Total enqueued, dequeued and dropped MSDU's for peer */
  1565. A_UINT32 peer_enqueued_count_low;
  1566. A_UINT32 peer_enqueued_count_high;
  1567. A_UINT32 peer_dequeued_count_low;
  1568. A_UINT32 peer_dequeued_count_high;
  1569. A_UINT32 peer_dropped_count_low;
  1570. A_UINT32 peer_dropped_count_high;
  1571. /** Total ppdu transmitted bytes for peer: includes MAC header overhead */
  1572. A_UINT32 ppdu_transmitted_bytes_low;
  1573. A_UINT32 ppdu_transmitted_bytes_high;
  1574. A_UINT32 peer_ttl_removed_count;
  1575. /**
  1576. * inactive_time
  1577. * Running duration of the time since last tx/rx activity by this peer,
  1578. * units = seconds.
  1579. * If the peer is currently active, this inactive_time will be 0x0.
  1580. */
  1581. A_UINT32 inactive_time;
  1582. /** Number of MPDUs dropped after max retries */
  1583. A_UINT32 remove_mpdus_max_retries;
  1584. } htt_stats_peer_stats_cmn_tlv;
  1585. /* preserve old name alias for new name consistent with the tag name */
  1586. typedef htt_stats_peer_stats_cmn_tlv htt_peer_stats_cmn_tlv;
  1587. #define HTT_PEER_DETAILS_ML_PEER_OFFSET_BYTES 32
  1588. #define HTT_PEER_DETAILS_ML_PEER_OFFSET_DWORD 8
  1589. #define HTT_PEER_DETAILS_ML_PEER_ID_VALID_M 0x00000001
  1590. #define HTT_PEER_DETAILS_ML_PEER_ID_VALID_S 0
  1591. #define HTT_PEER_DETAILS_ML_PEER_ID_M 0x00001ffe
  1592. #define HTT_PEER_DETAILS_ML_PEER_ID_S 1
  1593. #define HTT_PEER_DETAILS_LINK_IDX_M 0x001fe000
  1594. #define HTT_PEER_DETAILS_LINK_IDX_S 13
  1595. #define HTT_PEER_DETAILS_USE_PPE_M 0x00200000
  1596. #define HTT_PEER_DETAILS_USE_PPE_S 21
  1597. #define HTT_PEER_DETAILS_SRC_INFO_M 0x00000fff
  1598. #define HTT_PEER_DETAILS_SRC_INFO_S 0
  1599. #define HTT_PEER_DETAILS_SET(word, httsym, val) \
  1600. do { \
  1601. HTT_CHECK_SET_VAL(HTT_PEER_DETAILS_ ## httsym, val); \
  1602. (word) |= ((val) << HTT_PEER_DETAILS_ ## httsym ## _S); \
  1603. } while(0)
  1604. #define HTT_PEER_DETAILS_GET(word, httsym) \
  1605. (((word) & HTT_PEER_DETAILS_ ## httsym ## _M) >> HTT_PEER_DETAILS_ ## httsym ## _S)
  1606. typedef struct {
  1607. htt_tlv_hdr_t tlv_hdr;
  1608. /** This enum type of HTT_PEER_TYPE */
  1609. A_UINT32 peer_type;
  1610. A_UINT32 sw_peer_id;
  1611. /**
  1612. * BIT [7 : 0] :- vdev_id
  1613. * BIT [15 : 8] :- pdev_id
  1614. * BIT [31 : 16] :- ast_indx
  1615. */
  1616. A_UINT32 vdev_pdev_ast_idx;
  1617. htt_mac_addr mac_addr;
  1618. A_UINT32 peer_flags;
  1619. A_UINT32 qpeer_flags;
  1620. /* Dword 8 */
  1621. A_UINT32 ml_peer_id_valid : 1, /* [0:0] */
  1622. ml_peer_id : 12, /* [12:1] */
  1623. link_idx : 8, /* [20:13] */
  1624. use_ppe : 1, /* [21:21] */
  1625. rsvd0 : 10; /* [31:22] */
  1626. /* Dword 9 */
  1627. A_UINT32 src_info : 12, /* [11:0] */
  1628. rsvd1 : 20; /* [31:12] */
  1629. } htt_stats_peer_details_tlv;
  1630. /* preserve old name alias for new name consistent with the tag name */
  1631. typedef htt_stats_peer_details_tlv htt_peer_details_tlv;
  1632. typedef struct {
  1633. htt_tlv_hdr_t tlv_hdr;
  1634. A_UINT32 sw_peer_id;
  1635. A_UINT32 ast_index;
  1636. htt_mac_addr mac_addr;
  1637. A_UINT32
  1638. pdev_id : 2,
  1639. vdev_id : 8,
  1640. next_hop : 1,
  1641. mcast : 1,
  1642. monitor_direct : 1,
  1643. mesh_sta : 1,
  1644. mec : 1,
  1645. intra_bss : 1,
  1646. chip_id : 2,
  1647. ml_peer_id : 13,
  1648. on_chip : 1;
  1649. A_UINT32
  1650. tx_monitor_override_sta : 1,
  1651. rx_monitor_override_sta : 1,
  1652. reserved1 : 30;
  1653. } htt_stats_ast_entry_tlv;
  1654. /* preserve old name alias for new name consistent with the tag name */
  1655. typedef htt_stats_ast_entry_tlv htt_ast_entry_tlv;
  1656. typedef enum {
  1657. HTT_STATS_DIRECTION_TX,
  1658. HTT_STATS_DIRECTION_RX,
  1659. } HTT_STATS_DIRECTION;
  1660. typedef enum {
  1661. HTT_STATS_PPDU_TYPE_MODE_SU,
  1662. HTT_STATS_PPDU_TYPE_DL_MU_MIMO,
  1663. HTT_STATS_PPDU_TYPE_UL_MU_MIMO,
  1664. HTT_STATS_PPDU_TYPE_DL_MU_OFDMA,
  1665. HTT_STATS_PPDU_TYPE_UL_MU_OFDMA,
  1666. } HTT_STATS_PPDU_TYPE;
  1667. typedef enum {
  1668. HTT_STATS_PREAM_OFDM,
  1669. HTT_STATS_PREAM_CCK,
  1670. HTT_STATS_PREAM_HT,
  1671. HTT_STATS_PREAM_VHT,
  1672. HTT_STATS_PREAM_HE,
  1673. HTT_STATS_PREAM_EHT,
  1674. HTT_STATS_PREAM_RSVD1,
  1675. HTT_STATS_PREAM_COUNT,
  1676. } HTT_STATS_PREAM_TYPE;
  1677. #define HTT_TX_PEER_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  1678. #define HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  1679. /* HTT_TX_PEER_STATS_NUM_GI_COUNTERS:
  1680. * GI Index 0: WHAL_GI_800
  1681. * GI Index 1: WHAL_GI_400
  1682. * GI Index 2: WHAL_GI_1600
  1683. * GI Index 3: WHAL_GI_3200
  1684. */
  1685. #define HTT_TX_PEER_STATS_NUM_GI_COUNTERS 4
  1686. #define HTT_TX_PEER_STATS_NUM_DCM_COUNTERS 5
  1687. /* HTT_TX_PEER_STATS_NUM_BW_COUNTERS:
  1688. * bw index 0: rssi_pri20_chain0
  1689. * bw index 1: rssi_ext20_chain0
  1690. * bw index 2: rssi_ext40_low20_chain0
  1691. * bw index 3: rssi_ext40_high20_chain0
  1692. */
  1693. #define HTT_TX_PEER_STATS_NUM_BW_COUNTERS 4
  1694. /* HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS:
  1695. * bw index 4 (bw ext index 0): rssi_ext80_low20_chain0
  1696. * bw index 5 (bw ext index 1): rssi_ext80_low_high20_chain0
  1697. * bw index 6 (bw ext index 2): rssi_ext80_high_low20_chain0
  1698. * bw index 7 (bw ext index 3): rssi_ext80_high20_chain0
  1699. */
  1700. #define HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS 4
  1701. #define HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS 4
  1702. /* HTT_RX STATS_NUM_BW_EXT_2_COUNTERS:
  1703. * bw index 8 (bw ext_2 index 0): rssi_ext160_0_chainX
  1704. * bw index 9 (bw ext_2 index 1): rssi_ext160_1_chainX
  1705. * bw index 10 (bw ext_2 index 2): rssi_ext160_2_chainX
  1706. * bw index 11 (bw ext_2 index 3): rssi_ext160_3_chainX
  1707. * bw index 12 (bw ext_2 index 4): rssi_ext160_4_chainX
  1708. * bw index 13 (bw ext_2 index 5): rssi_ext160_5_chainX
  1709. * bw index 14 (bw ext_2 index 6): rssi_ext160_6_chainX
  1710. * bw index 15 (bw ext_2 index 7): rssi_ext160_7_chainX
  1711. */
  1712. #define HTT_RX_PDEV_STATS_NUM_BW_EXT_2_COUNTERS 8
  1713. #define HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1714. #define HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1715. #define HTT_TX_PEER_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  1716. typedef struct _htt_tx_peer_rate_stats_tlv {
  1717. htt_tlv_hdr_t tlv_hdr;
  1718. /** Number of tx LDPC packets */
  1719. A_UINT32 tx_ldpc;
  1720. /** Number of tx RTS packets */
  1721. A_UINT32 rts_cnt;
  1722. /** RSSI value of last ack packet (units = dB above noise floor) */
  1723. A_UINT32 ack_rssi;
  1724. A_UINT32 tx_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1725. A_UINT32 tx_su_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1726. A_UINT32 tx_mu_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1727. /**
  1728. * element 0,1, ...7 -> NSS 1,2, ...8
  1729. */
  1730. A_UINT32 tx_nss[HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS];
  1731. /**
  1732. * element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz
  1733. */
  1734. A_UINT32 tx_bw[HTT_TX_PEER_STATS_NUM_BW_COUNTERS];
  1735. A_UINT32 tx_stbc[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1736. A_UINT32 tx_pream[HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1737. /**
  1738. * Counters to track number of tx packets in each GI
  1739. * (400us, 800us, 1600us & 3200us) in each mcs (0-11)
  1740. */
  1741. A_UINT32 tx_gi[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1742. /** Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  1743. A_UINT32 tx_dcm[HTT_TX_PEER_STATS_NUM_DCM_COUNTERS];
  1744. /** Stats for MCS 12/13 */
  1745. A_UINT32 tx_mcs_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1746. A_UINT32 tx_su_mcs_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1747. A_UINT32 tx_mu_mcs_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1748. A_UINT32 tx_stbc_ext[HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1749. A_UINT32 tx_gi_ext[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1750. A_UINT32 reduced_tx_bw[HTT_TX_PEER_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PEER_STATS_NUM_BW_COUNTERS];
  1751. A_UINT32 tx_bw_320mhz;
  1752. } htt_stats_peer_tx_rate_stats_tlv;
  1753. /* preserve old name alias for new name consistent with the tag name */
  1754. typedef htt_stats_peer_tx_rate_stats_tlv htt_tx_peer_rate_stats_tlv;
  1755. #define HTT_RX_PEER_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  1756. #define HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  1757. #define HTT_RX_PEER_STATS_NUM_GI_COUNTERS 4
  1758. #define HTT_RX_PEER_STATS_NUM_DCM_COUNTERS 5
  1759. #define HTT_RX_PEER_STATS_NUM_BW_COUNTERS 4
  1760. #define HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1761. #define HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1762. #define HTT_RX_PEER_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  1763. typedef struct _htt_rx_peer_rate_stats_tlv {
  1764. htt_tlv_hdr_t tlv_hdr;
  1765. A_UINT32 nsts;
  1766. /** Number of rx LDPC packets */
  1767. A_UINT32 rx_ldpc;
  1768. /** Number of rx RTS packets */
  1769. A_UINT32 rts_cnt;
  1770. /** units = dB above noise floor */
  1771. A_UINT32 rssi_mgmt;
  1772. /** units = dB above noise floor */
  1773. A_UINT32 rssi_data;
  1774. /** units = dB above noise floor */
  1775. A_UINT32 rssi_comb;
  1776. A_UINT32 rx_mcs[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1777. /**
  1778. * element 0,1, ...7 -> NSS 1,2, ...8
  1779. */
  1780. A_UINT32 rx_nss[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS];
  1781. A_UINT32 rx_dcm[HTT_RX_PEER_STATS_NUM_DCM_COUNTERS];
  1782. A_UINT32 rx_stbc[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1783. /**
  1784. * element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz
  1785. */
  1786. A_UINT32 rx_bw[HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1787. A_UINT32 rx_pream[HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1788. /** units = dB above noise floor */
  1789. A_UINT8 rssi_chain[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1790. /** Counters to track number of rx packets in each GI in each mcs (0-11) */
  1791. A_UINT32 rx_gi[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1792. A_UINT32 rx_ulofdma_non_data_ppdu; /** PPDU level */
  1793. A_UINT32 rx_ulofdma_data_ppdu; /** PPDU level */
  1794. A_UINT32 rx_ulofdma_mpdu_ok; /** MPDU level */
  1795. A_UINT32 rx_ulofdma_mpdu_fail; /** MPDU level */
  1796. A_INT8 rx_ul_fd_rssi[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* dBm unit */
  1797. /* per_chain_rssi_pkt_type:
  1798. * This field shows what type of rx frame the per-chain RSSI was computed
  1799. * on, by recording the frame type and sub-type as bit-fields within this
  1800. * field:
  1801. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  1802. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  1803. * BIT [31 : 8] :- Reserved
  1804. */
  1805. A_UINT32 per_chain_rssi_pkt_type;
  1806. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1807. /** PPDU level */
  1808. A_UINT32 rx_ulmumimo_non_data_ppdu;
  1809. /** PPDU level */
  1810. A_UINT32 rx_ulmumimo_data_ppdu;
  1811. /** MPDU level */
  1812. A_UINT32 rx_ulmumimo_mpdu_ok;
  1813. /** mpdu level */
  1814. A_UINT32 rx_ulmumimo_mpdu_fail;
  1815. /** units = dB above noise floor */
  1816. A_UINT8 rssi_chain_ext[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS];
  1817. /** Stats for MCS 12/13 */
  1818. A_UINT32 rx_mcs_ext[HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1819. A_UINT32 rx_stbc_ext[HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1820. A_UINT32 rx_gi_ext[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_EXTRA_MCS_COUNTERS];
  1821. A_UINT32 reduced_rx_bw[HTT_RX_PEER_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1822. A_INT8 rx_per_chain_rssi_in_dbm_ext[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_EXT_COUNTERS];
  1823. } htt_stats_peer_rx_rate_stats_tlv;
  1824. /* preserve old name alias for new name consistent with the tag name */
  1825. typedef htt_stats_peer_rx_rate_stats_tlv htt_rx_peer_rate_stats_tlv;
  1826. typedef enum {
  1827. HTT_PEER_STATS_REQ_MODE_NO_QUERY,
  1828. HTT_PEER_STATS_REQ_MODE_QUERY_TQM,
  1829. HTT_PEER_STATS_REQ_MODE_FLUSH_TQM,
  1830. } htt_peer_stats_req_mode_t;
  1831. typedef enum {
  1832. HTT_PEER_STATS_CMN_TLV = 0,
  1833. HTT_PEER_DETAILS_TLV = 1,
  1834. HTT_TX_PEER_RATE_STATS_TLV = 2,
  1835. HTT_RX_PEER_RATE_STATS_TLV = 3,
  1836. HTT_TX_TID_STATS_TLV = 4,
  1837. HTT_RX_TID_STATS_TLV = 5,
  1838. HTT_MSDU_FLOW_STATS_TLV = 6,
  1839. HTT_PEER_SCHED_STATS_TLV = 7,
  1840. HTT_PEER_AX_OFDMA_STATS_TLV = 8,
  1841. HTT_PEER_BE_OFDMA_STATS_TLV = 9,
  1842. HTT_PEER_STATS_MAX_TLV = 31,
  1843. } htt_peer_stats_tlv_enum;
  1844. typedef struct {
  1845. htt_tlv_hdr_t tlv_hdr;
  1846. A_UINT32 peer_id;
  1847. /** Num of DL schedules for peer */
  1848. A_UINT32 num_sched_dl;
  1849. /** Num od UL schedules for peer */
  1850. A_UINT32 num_sched_ul;
  1851. /** Peer TX time */
  1852. A_UINT32 peer_tx_active_dur_us_low;
  1853. A_UINT32 peer_tx_active_dur_us_high;
  1854. /** Peer RX time */
  1855. A_UINT32 peer_rx_active_dur_us_low;
  1856. A_UINT32 peer_rx_active_dur_us_high;
  1857. A_UINT32 peer_curr_rate_kbps;
  1858. } htt_stats_peer_sched_stats_tlv;
  1859. /* preserve old name alias for new name consistent with the tag name */
  1860. typedef htt_stats_peer_sched_stats_tlv htt_peer_sched_stats_tlv;
  1861. typedef struct {
  1862. htt_tlv_hdr_t tlv_hdr;
  1863. A_UINT32 peer_id;
  1864. A_UINT32 ax_basic_trig_count;
  1865. A_UINT32 ax_basic_trig_err;
  1866. A_UINT32 ax_bsr_trig_count;
  1867. A_UINT32 ax_bsr_trig_err;
  1868. A_UINT32 ax_mu_bar_trig_count;
  1869. A_UINT32 ax_mu_bar_trig_err;
  1870. A_UINT32 ax_basic_trig_with_per;
  1871. A_UINT32 ax_bsr_trig_with_per;
  1872. A_UINT32 ax_mu_bar_trig_with_per;
  1873. /* is_airtime_large_for_dl_ofdma, is_airtime_large_for_ul_ofdma
  1874. * These fields contain 2 counters each. The first element in each
  1875. * array counts how many times the airtime is short enough to use
  1876. * OFDMA, and the second element in each array counts how many times the
  1877. * airtime is too large to select OFDMA for the PPDUs involving the peer.
  1878. */
  1879. A_UINT32 is_airtime_large_for_dl_ofdma[2];
  1880. A_UINT32 is_airtime_large_for_ul_ofdma[2];
  1881. /* Last updated value of DL and UL queue depths for each peer per AC */
  1882. A_UINT32 last_updated_dl_qdepth[HTT_NUM_AC_WMM];
  1883. A_UINT32 last_updated_ul_qdepth[HTT_NUM_AC_WMM];
  1884. /* Per peer Manual 11ax UL OFDMA trigger and trigger error counts */
  1885. A_UINT32 ax_manual_ulofdma_trig_count;
  1886. A_UINT32 ax_manual_ulofdma_trig_err_count;
  1887. } htt_stats_peer_ax_ofdma_stats_tlv;
  1888. /* preserve old name alias for new name consistent with the tag name */
  1889. typedef htt_stats_peer_ax_ofdma_stats_tlv htt_peer_ax_ofdma_stats_tlv;
  1890. typedef struct {
  1891. htt_tlv_hdr_t tlv_hdr;
  1892. A_UINT32 peer_id;
  1893. /* Per peer Manual 11be UL OFDMA trigger and trigger error counts */
  1894. A_UINT32 be_manual_ulofdma_trig_count;
  1895. A_UINT32 be_manual_ulofdma_trig_err_count;
  1896. } htt_stats_peer_be_ofdma_stats_tlv;
  1897. /* preserve old name alias for new name consistent with the tag name */
  1898. typedef htt_stats_peer_be_ofdma_stats_tlv htt_peer_be_ofdma_stats_tlv;
  1899. /* config_param0 */
  1900. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_M 0x00000001
  1901. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_S 0
  1902. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_GET(_var) \
  1903. (((_var) & HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_M) >> \
  1904. HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_S)
  1905. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_SET(_var, _val) \
  1906. do { \
  1907. HTT_CHECK_SET_VAL(HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR, _val); \
  1908. ((_var) |= ((_val) << HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_S)); \
  1909. } while (0)
  1910. /* DEPRECATED
  1911. * The old IS_peer_MAC_ADDR_SET macro name is being retained for now,
  1912. * as an alias for the corrected macro name.
  1913. * If/when all references to the old name are removed, the definition of
  1914. * the old name will also be removed.
  1915. */
  1916. #define HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_peer_MAC_ADDR_SET HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS_IS_MAC_ADDR_SET
  1917. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M 0x00000001
  1918. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S 0
  1919. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_M 0x0000FFFE
  1920. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_S 1
  1921. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M 0xFFFF0000
  1922. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S 16
  1923. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(_var, _val) \
  1924. do { \
  1925. HTT_CHECK_SET_VAL(HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR, _val); \
  1926. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)); \
  1927. } while (0)
  1928. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_GET(_var) \
  1929. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M) >> \
  1930. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)
  1931. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_GET(_var) \
  1932. (((_var) & HTT_DBG_EXT_STATS_PEER_REQ_MODE_M) >> \
  1933. HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)
  1934. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_SET(_var, _val) \
  1935. do { \
  1936. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)); \
  1937. } while (0)
  1938. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_GET(_var) \
  1939. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M) >> \
  1940. HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)
  1941. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_SET(_var, _val) \
  1942. do { \
  1943. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)); \
  1944. } while (0)
  1945. /* STATS_TYPE : HTT_DBG_EXT_STATS_PEER_INFO
  1946. * TLV_TAGS:
  1947. * - HTT_STATS_PEER_STATS_CMN_TAG
  1948. * - HTT_STATS_PEER_DETAILS_TAG
  1949. * - HTT_STATS_PEER_TX_RATE_STATS_TAG
  1950. * - HTT_STATS_PEER_RX_RATE_STATS_TAG
  1951. * - HTT_STATS_TX_TID_DETAILS_TAG (multiple) (deprecated, so 0 elements in updated systems)
  1952. * - HTT_STATS_RX_TID_DETAILS_TAG (multiple)
  1953. * - HTT_STATS_PEER_MSDU_FLOWQ_TAG (multiple)
  1954. * - HTT_STATS_TX_TID_DETAILS_V1_TAG (multiple)
  1955. * - HTT_STATS_PEER_SCHED_STATS_TAG
  1956. * - HTT_STATS_PEER_AX_OFDMA_STATS_TAG
  1957. */
  1958. /* NOTE:
  1959. * This structure is for documentation, and cannot be safely used directly.
  1960. * Instead, use the constituent TLV structures to fill/parse.
  1961. */
  1962. typedef struct _htt_peer_stats {
  1963. htt_stats_peer_stats_cmn_tlv cmn_tlv;
  1964. htt_stats_peer_details_tlv peer_details;
  1965. /* from g_rate_info_stats */
  1966. htt_stats_peer_tx_rate_stats_tlv tx_rate;
  1967. htt_stats_peer_rx_rate_stats_tlv rx_rate;
  1968. htt_stats_tx_tid_details_tlv tx_tid_stats[1];
  1969. htt_stats_rx_tid_details_tlv rx_tid_stats[1];
  1970. htt_stats_peer_msdu_flowq_tlv msdu_flowq[1];
  1971. htt_stats_tx_tid_details_v1_tlv tx_tid_stats_v1[1];
  1972. htt_stats_peer_sched_stats_tlv peer_sched_stats;
  1973. htt_stats_peer_ax_ofdma_stats_tlv ax_ofdma_stats;
  1974. htt_stats_peer_be_ofdma_stats_tlv be_ofdma_stats;
  1975. } htt_peer_stats_t;
  1976. /* =========== ACTIVE PEER LIST ========== */
  1977. /* STATS_TYPE: HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  1978. * TLV_TAGS:
  1979. * - HTT_STATS_PEER_DETAILS_TAG
  1980. */
  1981. /* NOTE:
  1982. * This structure is for documentation, and cannot be safely used directly.
  1983. * Instead, use the constituent TLV structures to fill/parse.
  1984. */
  1985. typedef struct {
  1986. htt_stats_peer_details_tlv peer_details[1];
  1987. } htt_active_peer_details_list_t;
  1988. /* =========== MUMIMO HWQ stats =========== */
  1989. /* MU MIMO stats per hwQ */
  1990. typedef struct {
  1991. htt_tlv_hdr_t tlv_hdr;
  1992. /** number of MU MIMO schedules posted to HW */
  1993. A_UINT32 mu_mimo_sch_posted;
  1994. /** number of MU MIMO schedules failed to post */
  1995. A_UINT32 mu_mimo_sch_failed;
  1996. /** number of MU MIMO PPDUs posted to HW */
  1997. A_UINT32 mu_mimo_ppdu_posted;
  1998. } htt_stats_tx_hwq_mumimo_sch_stats_tlv;
  1999. /* preserve old name alias for new name consistent with the tag name */
  2000. typedef htt_stats_tx_hwq_mumimo_sch_stats_tlv htt_tx_hwq_mu_mimo_sch_stats_tlv;
  2001. typedef struct {
  2002. htt_tlv_hdr_t tlv_hdr;
  2003. /** 11AC DL MU MIMO number of mpdus queued to HW, per user */
  2004. A_UINT32 mu_mimo_mpdus_queued_usr;
  2005. /** 11AC DL MU MIMO number of mpdus tried over the air, per user */
  2006. A_UINT32 mu_mimo_mpdus_tried_usr;
  2007. /** 11AC DL MU MIMO number of mpdus failed acknowledgement, per user */
  2008. A_UINT32 mu_mimo_mpdus_failed_usr;
  2009. /** 11AC DL MU MIMO number of mpdus re-queued to HW, per user */
  2010. A_UINT32 mu_mimo_mpdus_requeued_usr;
  2011. /** 11AC DL MU MIMO BA not received, per user */
  2012. A_UINT32 mu_mimo_err_no_ba_usr;
  2013. /** 11AC DL MU MIMO mpdu underrun encountered, per user */
  2014. A_UINT32 mu_mimo_mpdu_underrun_usr;
  2015. /** 11AC DL MU MIMO ampdu underrun encountered, per user */
  2016. A_UINT32 mu_mimo_ampdu_underrun_usr;
  2017. } htt_stats_tx_hwq_mumimo_mpdu_stats_tlv;
  2018. /* preserve old name alias for new name consistent with the tag name */
  2019. typedef htt_stats_tx_hwq_mumimo_mpdu_stats_tlv
  2020. htt_tx_hwq_mu_mimo_mpdu_stats_tlv;
  2021. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M 0x000000ff
  2022. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S 0
  2023. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M 0x0000ff00
  2024. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S 8
  2025. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_GET(_var) \
  2026. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M) >> \
  2027. HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)
  2028. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_SET(_var, _val) \
  2029. do { \
  2030. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID, _val); \
  2031. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)); \
  2032. } while (0)
  2033. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_GET(_var) \
  2034. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M) >> \
  2035. HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)
  2036. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_SET(_var, _val) \
  2037. do { \
  2038. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID, _val); \
  2039. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)); \
  2040. } while (0)
  2041. typedef struct {
  2042. htt_tlv_hdr_t tlv_hdr;
  2043. /**
  2044. * BIT [ 7 : 0] :- mac_id
  2045. * BIT [15 : 8] :- hwq_id
  2046. * BIT [31 : 16] :- reserved
  2047. */
  2048. A_UINT32 mac_id__hwq_id__word;
  2049. } htt_stats_tx_hwq_mumimo_cmn_stats_tlv;
  2050. /* preserve old name alias for new name consistent with the tag name */
  2051. typedef htt_stats_tx_hwq_mumimo_cmn_stats_tlv htt_tx_hwq_mu_mimo_cmn_stats_tlv;
  2052. /* NOTE:
  2053. * This structure is for documentation, and cannot be safely used directly.
  2054. * Instead, use the constituent TLV structures to fill/parse.
  2055. */
  2056. typedef struct {
  2057. struct {
  2058. htt_stats_tx_hwq_mumimo_cmn_stats_tlv cmn_tlv;
  2059. /** WAL_TX_STATS_MAX_GROUP_SIZE */
  2060. htt_stats_tx_hwq_mumimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1];
  2061. /** WAL_TX_STATS_TX_MAX_NUM_USERS */
  2062. htt_stats_tx_hwq_mumimo_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1];
  2063. } hwq[1];
  2064. } htt_tx_hwq_mu_mimo_stats_t;
  2065. /* == TX HWQ STATS == */
  2066. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_M 0x000000ff
  2067. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_S 0
  2068. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_M 0x0000ff00
  2069. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_S 8
  2070. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_GET(_var) \
  2071. (((_var) & HTT_TX_HWQ_STATS_CMN_MAC_ID_M) >> \
  2072. HTT_TX_HWQ_STATS_CMN_MAC_ID_S)
  2073. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_SET(_var, _val) \
  2074. do { \
  2075. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_MAC_ID, _val); \
  2076. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_MAC_ID_S)); \
  2077. } while (0)
  2078. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_GET(_var) \
  2079. (((_var) & HTT_TX_HWQ_STATS_CMN_HWQ_ID_M) >> \
  2080. HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)
  2081. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_SET(_var, _val) \
  2082. do { \
  2083. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_HWQ_ID, _val); \
  2084. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)); \
  2085. } while (0)
  2086. typedef struct {
  2087. htt_tlv_hdr_t tlv_hdr;
  2088. /**
  2089. * BIT [ 7 : 0] :- mac_id
  2090. * BIT [15 : 8] :- hwq_id
  2091. * BIT [31 : 16] :- reserved
  2092. */
  2093. A_UINT32 mac_id__hwq_id__word;
  2094. /*--- PPDU level stats */
  2095. /** Number of times ack is failed for the PPDU scheduled on this txQ */
  2096. A_UINT32 xretry;
  2097. /** Number of times sched cmd status reported mpdu underrun */
  2098. A_UINT32 underrun_cnt;
  2099. /** Number of times sched cmd is flushed */
  2100. A_UINT32 flush_cnt;
  2101. /** Number of times sched cmd is filtered */
  2102. A_UINT32 filt_cnt;
  2103. /** Number of times HWSCH uploaded null mpdu bitmap */
  2104. A_UINT32 null_mpdu_bmap;
  2105. /**
  2106. * Number of times user ack or BA TLV is not seen on FES ring
  2107. * where it is expected to be
  2108. */
  2109. A_UINT32 user_ack_failure;
  2110. /** Number of times TQM processed ack TLV received from HWSCH */
  2111. A_UINT32 ack_tlv_proc;
  2112. /** Cache latest processed scheduler ID received from ack BA TLV */
  2113. A_UINT32 sched_id_proc;
  2114. /** Number of times TxPCU reported MPDUs transmitted for a user is zero */
  2115. A_UINT32 null_mpdu_tx_count;
  2116. /**
  2117. * Number of times SW did not see any MPDU info bitmap TLV
  2118. * on FES status ring
  2119. */
  2120. A_UINT32 mpdu_bmap_not_recvd;
  2121. /*--- Selfgen stats per hwQ */
  2122. /** Number of SU/MU BAR frames posted to hwQ */
  2123. A_UINT32 num_bar;
  2124. /** Number of RTS frames posted to hwQ */
  2125. A_UINT32 rts;
  2126. /** Number of cts2self frames posted to hwQ */
  2127. A_UINT32 cts2self;
  2128. /** Number of qos null frames posted to hwQ */
  2129. A_UINT32 qos_null;
  2130. /*--- MPDU level stats */
  2131. /** mpdus tried Tx by HWSCH/TQM */
  2132. A_UINT32 mpdu_tried_cnt;
  2133. /** mpdus queued to HWSCH */
  2134. A_UINT32 mpdu_queued_cnt;
  2135. /** mpdus tried but ack was not received */
  2136. A_UINT32 mpdu_ack_fail_cnt;
  2137. /** This will include sched cmd flush and time based discard */
  2138. A_UINT32 mpdu_filt_cnt;
  2139. /** Number of MPDUs for which ACK was successful but no Tx happened */
  2140. A_UINT32 false_mpdu_ack_count;
  2141. /** Number of times txq timeout happened */
  2142. A_UINT32 txq_timeout;
  2143. } htt_stats_tx_hwq_cmn_tlv;
  2144. /* preserve old name alias for new name consistent with the tag name */
  2145. typedef htt_stats_tx_hwq_cmn_tlv htt_tx_hwq_stats_cmn_tlv;
  2146. #define HTT_TX_HWQ_DIFS_LATENCY_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) + /* hist_intvl */ \
  2147. (sizeof(A_UINT32) * (_num_elems)))
  2148. /* NOTE: Variable length TLV, use length spec to infer array size */
  2149. typedef struct {
  2150. htt_tlv_hdr_t tlv_hdr;
  2151. A_UINT32 hist_intvl;
  2152. /** histogram of ppdu post to hwsch - > cmd status received */
  2153. A_UINT32 difs_latency_hist[1]; /* HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS */
  2154. } htt_stats_tx_hwq_difs_latency_tlv;
  2155. /* preserve old name alias for new name consistent with the tag name */
  2156. typedef htt_stats_tx_hwq_difs_latency_tlv htt_tx_hwq_difs_latency_stats_tlv_v;
  2157. #define HTT_TX_HWQ_CMD_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2158. /* NOTE: Variable length TLV, use length spec to infer array size */
  2159. typedef struct {
  2160. htt_tlv_hdr_t tlv_hdr;
  2161. /** Histogram of sched cmd result */
  2162. A_UINT32 cmd_result[1]; /* HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
  2163. } htt_stats_tx_hwq_cmd_result_tlv;
  2164. /* preserve old name alias for new name consistent with the tag name */
  2165. typedef htt_stats_tx_hwq_cmd_result_tlv htt_tx_hwq_cmd_result_stats_tlv_v;
  2166. #define HTT_TX_HWQ_CMD_STALL_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2167. /* NOTE: Variable length TLV, use length spec to infer array size */
  2168. typedef struct {
  2169. htt_tlv_hdr_t tlv_hdr;
  2170. /** Histogram of various pause conitions */
  2171. A_UINT32 cmd_stall_status[1]; /* HTT_TX_HWQ_MAX_CMD_STALL_STATS */
  2172. } htt_stats_tx_hwq_cmd_stall_tlv;
  2173. /* preserve old name alias for new name consistent with the tag name */
  2174. typedef htt_stats_tx_hwq_cmd_stall_tlv htt_tx_hwq_cmd_stall_stats_tlv_v;
  2175. #define HTT_TX_HWQ_FES_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2176. /* NOTE: Variable length TLV, use length spec to infer array size */
  2177. typedef struct {
  2178. htt_tlv_hdr_t tlv_hdr;
  2179. /** Histogram of number of user fes result */
  2180. A_UINT32 fes_result[1]; /* HTT_TX_HWQ_MAX_FES_RESULT_STATS */
  2181. } htt_stats_tx_hwq_fes_status_tlv;
  2182. /* preserve old name alias for new name consistent with the tag name */
  2183. typedef htt_stats_tx_hwq_fes_status_tlv htt_tx_hwq_fes_result_stats_tlv_v;
  2184. #define HTT_TX_HWQ_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2185. /* NOTE: Variable length TLV, use length spec to infer array size
  2186. *
  2187. * The hwq_tried_mpdu_cnt_hist is a histogram of MPDUs tries per HWQ.
  2188. * The tries here is the count of the MPDUS within a PPDU that the HW
  2189. * had attempted to transmit on air, for the HWSCH Schedule command
  2190. * submitted by FW in this HWQ .It is not the retry attempts. The
  2191. * histogram bins are 0-29, 30-59, 60-89 and so on. The are 10 bins
  2192. * in this histogram.
  2193. * they are defined in FW using the following macros
  2194. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  2195. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  2196. *
  2197. * */
  2198. typedef struct {
  2199. htt_tlv_hdr_t tlv_hdr;
  2200. A_UINT32 hist_bin_size;
  2201. /** Histogram of number of mpdus on tried mpdu */
  2202. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_HWQ_TRIED_MPDU_CNT_HIST */
  2203. } htt_stats_tx_hwq_tried_mpdu_cnt_hist_tlv;
  2204. /* preserve old name alias for new name consistent with the tag name */
  2205. typedef htt_stats_tx_hwq_tried_mpdu_cnt_hist_tlv
  2206. htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v;
  2207. #define HTT_TX_HWQ_TXOP_USED_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2208. /* NOTE: Variable length TLV, use length spec to infer array size
  2209. *
  2210. * The txop_used_cnt_hist is the histogram of txop per burst. After
  2211. * completing the burst, we identify the txop used in the burst and
  2212. * incr the corresponding bin.
  2213. * Each bin represents 1ms & we have 10 bins in this histogram.
  2214. * they are defined in FW using the following macros
  2215. * #define WAL_MAX_TXOP_USED_CNT_HISTOGRAM 10
  2216. * #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
  2217. *
  2218. * */
  2219. typedef struct {
  2220. htt_tlv_hdr_t tlv_hdr;
  2221. /** Histogram of txop used cnt */
  2222. A_UINT32 txop_used_cnt_hist[1]; /* HTT_TX_HWQ_TXOP_USED_CNT_HIST */
  2223. } htt_stats_tx_hwq_txop_used_cnt_hist_tlv;
  2224. /* preserve old name alias for new name consistent with the tag name */
  2225. typedef htt_stats_tx_hwq_txop_used_cnt_hist_tlv
  2226. htt_tx_hwq_txop_used_cnt_hist_tlv_v;
  2227. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  2228. * TLV_TAGS:
  2229. * - HTT_STATS_STRING_TAG
  2230. * - HTT_STATS_TX_HWQ_CMN_TAG
  2231. * - HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG
  2232. * - HTT_STATS_TX_HWQ_CMD_RESULT_TAG
  2233. * - HTT_STATS_TX_HWQ_CMD_STALL_TAG
  2234. * - HTT_STATS_TX_HWQ_FES_STATUS_TAG
  2235. * - HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG
  2236. * - HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG
  2237. */
  2238. /* NOTE:
  2239. * This structure is for documentation, and cannot be safely used directly.
  2240. * Instead, use the constituent TLV structures to fill/parse.
  2241. * General HWQ stats Mechanism:
  2242. * Once the host request for the stats, FW fill all the HWQ TAGS in a buffer
  2243. * for all the HWQ requested. & the FW send the buffer to host. In the
  2244. * buffer the HWQ ID is filled in mac_id__hwq_id, thus identifying each
  2245. * HWQ distinctly.
  2246. */
  2247. typedef struct _htt_tx_hwq_stats {
  2248. htt_stats_string_tlv hwq_str_tlv;
  2249. htt_stats_tx_hwq_cmn_tlv cmn_tlv;
  2250. htt_stats_tx_hwq_difs_latency_tlv difs_tlv;
  2251. htt_stats_tx_hwq_cmd_result_tlv cmd_result_tlv;
  2252. htt_stats_tx_hwq_cmd_stall_tlv cmd_stall_tlv;
  2253. htt_stats_tx_hwq_fes_status_tlv fes_stats_tlv;
  2254. htt_stats_tx_hwq_tried_mpdu_cnt_hist_tlv tried_mpdu_tlv;
  2255. htt_stats_tx_hwq_txop_used_cnt_hist_tlv txop_used_tlv;
  2256. } htt_tx_hwq_stats_t;
  2257. /* == TX SELFGEN STATS == */
  2258. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M 0x000000ff
  2259. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S 0
  2260. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_GET(_var) \
  2261. (((_var) & HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M) >> \
  2262. HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)
  2263. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_SET(_var, _val) \
  2264. do { \
  2265. HTT_CHECK_SET_VAL(HTT_TX_SELFGEN_CMN_STATS_MAC_ID, _val); \
  2266. ((_var) |= ((_val) << HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)); \
  2267. } while (0)
  2268. typedef enum {
  2269. HTT_TXERR_NONE,
  2270. HTT_TXERR_RESP, /* response timeout, mismatch,
  2271. * BW mismatch, mimo ctrl mismatch,
  2272. * CRC error.. */
  2273. HTT_TXERR_FILT, /* blocked by tx filtering */
  2274. HTT_TXERR_FIFO, /* fifo, misc errors in HW */
  2275. HTT_TXERR_SWABORT, /* software initialted abort (TX_ABORT) */
  2276. HTT_TXERR_RESERVED1,
  2277. HTT_TXERR_RESERVED2,
  2278. HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS = 7,
  2279. HTT_TXERR_INVALID = 0xff,
  2280. } htt_tx_err_status_t;
  2281. /* Matching enum for htt_tx_selfgen_sch_tsflag_error_stats */
  2282. typedef enum {
  2283. HTT_TX_SELFGEN_SCH_TSFLAG_FLUSH_RCVD_ERR,
  2284. HTT_TX_SELFGEN_SCH_TSFLAG_FILT_SCHED_CMD_ERR,
  2285. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_MISMATCH_ERR,
  2286. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_MIMO_CTRL_MISMATCH_ERR,
  2287. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_BW_MISMATCH_ERR,
  2288. HTT_TX_SELFGEN_SCH_TSFLAG_RETRY_COUNT_FAIL_ERR,
  2289. HTT_TX_SELFGEN_SCH_TSFLAG_RESP_TOO_LATE_RECEIVED_ERR,
  2290. HTT_TX_SELFGEN_SCH_TSFLAG_SIFS_STALL_NO_NEXT_CMD_ERR,
  2291. HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS = 8,
  2292. HTT_TX_SELFGEN_SCH_TSFLAG_ERROR_STATS_VALID = 8
  2293. } htt_tx_selfgen_sch_tsflag_error_stats;
  2294. typedef enum {
  2295. HTT_TX_MUMIMO_GRP_VALID,
  2296. HTT_TX_MUMIMO_GRP_INVALID_NUM_MU_USERS_EXCEEDED_MU_MAX_USERS,
  2297. HTT_TX_MUMIMO_GRP_INVALID_SCHED_ALGO_NOT_MU_COMPATIBLE_GID,
  2298. HTT_TX_MUMIMO_GRP_INVALID_NON_PRIMARY_GRP,
  2299. HTT_TX_MUMIMO_GRP_INVALID_ZERO_CANDIDATES,
  2300. HTT_TX_MUMIMO_GRP_INVALID_MORE_CANDIDATES,
  2301. HTT_TX_MUMIMO_GRP_INVALID_GROUP_SIZE_EXCEED_NSS,
  2302. HTT_TX_MUMIMO_GRP_INVALID_GROUP_INELIGIBLE,
  2303. HTT_TX_MUMIMO_GRP_INVALID,
  2304. HTT_TX_MUMIMO_GRP_INVALID_GROUP_EFF_MU_TPUT_OMBPS,
  2305. HTT_TX_MUMIMO_GRP_INVALID_MAX_REASON_CODE,
  2306. } htt_tx_mumimo_grp_invalid_reason_code_stats;
  2307. #define HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS 4
  2308. #define HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS 8
  2309. #define HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS 8
  2310. #define HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS 74
  2311. #define HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS 8
  2312. #define HTT_STATS_MAX_MUMIMO_GRP_SZ 8
  2313. /*
  2314. * Each bin represents a 300 mbps throughput
  2315. * [0] - 0-300mbps; [1] - 300-600mbps [2] - 600-900mbps; [3] - 900-1200mbps; [4] - 1200-1500mbps
  2316. * [5] - 1500-1800mbps; [6] - 1800-2100mbps; [7] - 2100-2400mbps; [8] - 2400-2700mbps; [9] - >=2700mbps
  2317. */
  2318. #define HTT_STATS_MUMIMO_TPUT_NUM_BINS 10
  2319. #define HTT_STATS_MAX_INVALID_REASON_CODE \
  2320. HTT_TX_MUMIMO_GRP_INVALID_MAX_REASON_CODE
  2321. /* Reasons stated in htt_tx_mumimo_grp_invalid_reason_code_stats */
  2322. #define HTT_TX_NUM_MUMIMO_GRP_INVALID_WORDS \
  2323. (HTT_STATS_MAX_MUMIMO_GRP_SZ * HTT_STATS_MAX_INVALID_REASON_CODE)
  2324. #define HTT_MAX_NUM_SBT_INTR 4
  2325. typedef struct {
  2326. htt_tlv_hdr_t tlv_hdr;
  2327. /*
  2328. * BIT [ 7 : 0] :- mac_id
  2329. * BIT [31 : 8] :- reserved
  2330. */
  2331. A_UINT32 mac_id__word;
  2332. /** BAR sent out for SU transmission */
  2333. A_UINT32 su_bar;
  2334. /** SW generated RTS frame sent */
  2335. A_UINT32 rts;
  2336. /** SW generated CTS-to-self frame sent */
  2337. A_UINT32 cts2self;
  2338. /** SW generated QOS NULL frame sent */
  2339. A_UINT32 qos_null;
  2340. /** BAR sent for MU user 1 */
  2341. A_UINT32 delayed_bar_1;
  2342. /** BAR sent for MU user 2 */
  2343. A_UINT32 delayed_bar_2;
  2344. /** BAR sent for MU user 3 */
  2345. A_UINT32 delayed_bar_3;
  2346. /** BAR sent for MU user 4 */
  2347. A_UINT32 delayed_bar_4;
  2348. /** BAR sent for MU user 5 */
  2349. A_UINT32 delayed_bar_5;
  2350. /** BAR sent for MU user 6 */
  2351. A_UINT32 delayed_bar_6;
  2352. /** BAR sent for MU user 7 */
  2353. A_UINT32 delayed_bar_7;
  2354. A_UINT32 bar_with_tqm_head_seq_num;
  2355. A_UINT32 bar_with_tid_seq_num;
  2356. /** SW generated RTS frame queued to the HW */
  2357. A_UINT32 su_sw_rts_queued;
  2358. /** SW generated RTS frame sent over the air */
  2359. A_UINT32 su_sw_rts_tried;
  2360. /** SW generated RTS frame completed with error */
  2361. A_UINT32 su_sw_rts_err;
  2362. /** SW generated RTS frame flushed */
  2363. A_UINT32 su_sw_rts_flushed;
  2364. /** CTS (RTS response) received in different BW */
  2365. A_UINT32 su_sw_rts_rcvd_cts_diff_bw;
  2366. /* START DEPRECATED FIELDS */
  2367. /** 11AX HE MU Combined Freq. BSRP Trigger frame sent over the air */
  2368. A_UINT32 combined_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2369. /** 11AX HE MU Combined Freq. BSRP Trigger completed with error(s) */
  2370. A_UINT32 combined_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2371. /** 11AX HE MU Standalone Freq. BSRP Trigger frame sent over the air */
  2372. A_UINT32 standalone_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2373. /** 11AX HE MU Standalone Freq. BSRP Trigger completed with error(s) */
  2374. A_UINT32 standalone_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2375. /* END DEPRECATED FIELDS */
  2376. /** smart_basic_trig_sch_histogram:
  2377. * Count how many times the interval between predictive basic triggers
  2378. * sent to a given STA based on analysis of that STA's traffic patterns
  2379. * is within a given range:
  2380. *
  2381. * smart_basic_trig_sch_histogram[0]: SBT interval <= 10 ms
  2382. * smart_basic_trig_sch_histogram[1]: 10 ms < SBT interval <= 20 ms
  2383. * smart_basic_trig_sch_histogram[2]: 20 ms < SBT interval <= 30 ms
  2384. * smart_basic_trig_sch_histogram[3]: 30 ms < SBT interval <= 40 ms
  2385. *
  2386. * (Smart basic triggers are only used with intervals <= 40 ms.)
  2387. */
  2388. A_UINT32 smart_basic_trig_sch_histogram[HTT_MAX_NUM_SBT_INTR];
  2389. } htt_stats_tx_selfgen_cmn_stats_tlv;
  2390. /* preserve old name alias for new name consistent with the tag name */
  2391. typedef htt_stats_tx_selfgen_cmn_stats_tlv htt_tx_selfgen_cmn_stats_tlv;
  2392. typedef struct {
  2393. htt_tlv_hdr_t tlv_hdr;
  2394. /** 11AC VHT SU NDPA frame sent over the air */
  2395. A_UINT32 ac_su_ndpa;
  2396. /** 11AC VHT SU NDP frame sent over the air */
  2397. A_UINT32 ac_su_ndp;
  2398. /** 11AC VHT MU MIMO NDPA frame sent over the air */
  2399. A_UINT32 ac_mu_mimo_ndpa;
  2400. /** 11AC VHT MU MIMO NDP frame sent over the air */
  2401. A_UINT32 ac_mu_mimo_ndp;
  2402. /** 11AC VHT MU MIMO BR-POLL for user 1 sent over the air */
  2403. A_UINT32 ac_mu_mimo_brpoll_1;
  2404. /** 11AC VHT MU MIMO BR-POLL for user 2 sent over the air */
  2405. A_UINT32 ac_mu_mimo_brpoll_2;
  2406. /** 11AC VHT MU MIMO BR-POLL for user 3 sent over the air */
  2407. A_UINT32 ac_mu_mimo_brpoll_3;
  2408. /** 11AC VHT SU NDPA frame queued to the HW */
  2409. A_UINT32 ac_su_ndpa_queued;
  2410. /** 11AC VHT SU NDP frame queued to the HW */
  2411. A_UINT32 ac_su_ndp_queued;
  2412. /** 11AC VHT MU MIMO NDPA frame queued to the HW */
  2413. A_UINT32 ac_mu_mimo_ndpa_queued;
  2414. /** 11AC VHT MU MIMO NDP frame queued to the HW */
  2415. A_UINT32 ac_mu_mimo_ndp_queued;
  2416. /** 11AC VHT MU MIMO BR-POLL for user 1 frame queued to the HW */
  2417. A_UINT32 ac_mu_mimo_brpoll_1_queued;
  2418. /** 11AC VHT MU MIMO BR-POLL for user 2 frame queued to the HW */
  2419. A_UINT32 ac_mu_mimo_brpoll_2_queued;
  2420. /** 11AC VHT MU MIMO BR-POLL for user 3 frame queued to the HW */
  2421. A_UINT32 ac_mu_mimo_brpoll_3_queued;
  2422. } htt_stats_tx_selfgen_ac_stats_tlv;
  2423. /* preserve old name alias for new name consistent with the tag name */
  2424. typedef htt_stats_tx_selfgen_ac_stats_tlv htt_tx_selfgen_ac_stats_tlv;
  2425. typedef struct {
  2426. htt_tlv_hdr_t tlv_hdr;
  2427. /** 11AX HE SU NDPA frame sent over the air */
  2428. A_UINT32 ax_su_ndpa;
  2429. /** 11AX HE NDP frame sent over the air */
  2430. A_UINT32 ax_su_ndp;
  2431. /** 11AX HE MU MIMO NDPA frame sent over the air */
  2432. A_UINT32 ax_mu_mimo_ndpa;
  2433. /** 11AX HE MU MIMO NDP frame sent over the air */
  2434. A_UINT32 ax_mu_mimo_ndp;
  2435. union {
  2436. struct {
  2437. /* deprecated old names */
  2438. A_UINT32 ax_mu_mimo_brpoll_1;
  2439. A_UINT32 ax_mu_mimo_brpoll_2;
  2440. A_UINT32 ax_mu_mimo_brpoll_3;
  2441. A_UINT32 ax_mu_mimo_brpoll_4;
  2442. A_UINT32 ax_mu_mimo_brpoll_5;
  2443. A_UINT32 ax_mu_mimo_brpoll_6;
  2444. A_UINT32 ax_mu_mimo_brpoll_7;
  2445. };
  2446. /** 11AX HE MU BR-POLL frame for users 1 - 7 sent over the air */
  2447. A_UINT32 ax_mu_mimo_brpoll[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  2448. };
  2449. /** 11AX HE MU Basic Trigger frame sent over the air */
  2450. A_UINT32 ax_basic_trigger;
  2451. /** 11AX HE MU BSRP Trigger frame sent over the air */
  2452. A_UINT32 ax_bsr_trigger;
  2453. /** 11AX HE MU BAR Trigger frame sent over the air */
  2454. A_UINT32 ax_mu_bar_trigger;
  2455. /** 11AX HE MU RTS Trigger frame sent over the air */
  2456. A_UINT32 ax_mu_rts_trigger;
  2457. /** 11AX HE MU UL-MUMIMO Trigger frame sent over the air */
  2458. A_UINT32 ax_ulmumimo_trigger;
  2459. /** 11AX HE SU NDPA frame queued to the HW */
  2460. A_UINT32 ax_su_ndpa_queued;
  2461. /** 11AX HE SU NDP frame queued to the HW */
  2462. A_UINT32 ax_su_ndp_queued;
  2463. /** 11AX HE MU MIMO NDPA frame queued to the HW */
  2464. A_UINT32 ax_mu_mimo_ndpa_queued;
  2465. /** 11AX HE MU MIMO NDP frame queued to the HW */
  2466. A_UINT32 ax_mu_mimo_ndp_queued;
  2467. /** 11AX HE MU BR-POLL frame for users 1 - 7 queued to the HW */
  2468. A_UINT32 ax_mu_mimo_brpoll_queued[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  2469. /**
  2470. * 11AX HE UL-MUMIMO Trigger frame for users 0 - 7
  2471. * successfully sent over the air
  2472. */
  2473. A_UINT32 ax_ul_mumimo_trigger[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  2474. /** 11AX HE MU Combined Freq. BSRP Trigger frame sent over the air */
  2475. A_UINT32 combined_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2476. /** 11AX HE MU Combined Freq. BSRP Trigger completed with error(s) */
  2477. A_UINT32 combined_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2478. /** 11AX HE MU Standalone Freq. BSRP Trigger frame sent over the air */
  2479. A_UINT32 standalone_ax_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2480. /** 11AX HE MU Standalone Freq. BSRP Trigger completed with error(s) */
  2481. A_UINT32 standalone_ax_bsr_trigger_err[HTT_NUM_AC_WMM];
  2482. /** 11AX HE Manual Single-User UL OFDMA Trigger frame sent over the air */
  2483. A_UINT32 manual_ax_su_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2484. /** 11AX HE Manual Single-User UL OFDMA Trigger completed with error(s) */
  2485. A_UINT32 manual_ax_su_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2486. /** 11AX HE Manual Multi-User UL OFDMA Trigger frame sent over the air */
  2487. A_UINT32 manual_ax_mu_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2488. /** 11AX HE Manual Multi-User UL OFDMA Trigger completed with error(s) */
  2489. A_UINT32 manual_ax_mu_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2490. /** 11AX HE UL OFDMA Basic Trigger frames per AC */
  2491. A_UINT32 ax_basic_trigger_per_ac[HTT_NUM_AC_WMM];
  2492. /** 11AX HE UL OFDMA Basic Trigger frames per AC completed with error(s) */
  2493. A_UINT32 ax_basic_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2494. /** 11AX HE MU-BAR Trigger frames per AC */
  2495. A_UINT32 ax_mu_bar_trigger_per_ac[HTT_NUM_AC_WMM];
  2496. /** 11AX HE MU-BAR Trigger frames per AC completed with error(s) */
  2497. A_UINT32 ax_mu_bar_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2498. } htt_stats_tx_selfgen_ax_stats_tlv;
  2499. /* preserve old name alias for new name consistent with the tag name */
  2500. typedef htt_stats_tx_selfgen_ax_stats_tlv htt_tx_selfgen_ax_stats_tlv;
  2501. typedef struct {
  2502. htt_tlv_hdr_t tlv_hdr;
  2503. /** 11be EHT SU NDPA frame sent over the air */
  2504. A_UINT32 be_su_ndpa;
  2505. /** 11be EHT NDP frame sent over the air */
  2506. A_UINT32 be_su_ndp;
  2507. /** 11be EHT MU MIMO NDPA frame sent over the air */
  2508. A_UINT32 be_mu_mimo_ndpa;
  2509. /** 11be EHT MU MIMO NDP frame sent over theT air */
  2510. A_UINT32 be_mu_mimo_ndp;
  2511. /** 11be EHT MU BR-POLL frame for users 1 - 7 sent over the air */
  2512. A_UINT32 be_mu_mimo_brpoll[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  2513. /** 11be EHT MU Basic Trigger frame sent over the air */
  2514. A_UINT32 be_basic_trigger;
  2515. /** 11be EHT MU BSRP Trigger frame sent over the air */
  2516. A_UINT32 be_bsr_trigger;
  2517. /** 11be EHT MU BAR Trigger frame sent over the air */
  2518. A_UINT32 be_mu_bar_trigger;
  2519. /** 11be EHT MU RTS Trigger frame sent over the air */
  2520. A_UINT32 be_mu_rts_trigger;
  2521. /** 11be EHT MU UL-MUMIMO Trigger frame sent over the air */
  2522. A_UINT32 be_ulmumimo_trigger;
  2523. /** 11be EHT SU NDPA frame queued to the HW */
  2524. A_UINT32 be_su_ndpa_queued;
  2525. /** 11be EHT SU NDP frame queued to the HW */
  2526. A_UINT32 be_su_ndp_queued;
  2527. /** 11be EHT MU MIMO NDPA frame queued to the HW */
  2528. A_UINT32 be_mu_mimo_ndpa_queued;
  2529. /** 11be EHT MU MIMO NDP frame queued to the HW */
  2530. A_UINT32 be_mu_mimo_ndp_queued;
  2531. /** 11be EHT MU BR-POLL frame for users 1 - 7 queued to the HW */
  2532. A_UINT32 be_mu_mimo_brpoll_queued[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  2533. /**
  2534. * 11be EHT UL-MUMIMO Trigger frame for users 0 - 7
  2535. * successfully sent over the air
  2536. */
  2537. A_UINT32 be_ul_mumimo_trigger[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  2538. /** 11BE EHT MU Combined Freq. BSRP Trigger frame sent over the air */
  2539. A_UINT32 combined_be_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2540. /** 11BE EHT MU Combined Freq. BSRP Trigger completed with error(s) */
  2541. A_UINT32 combined_be_bsr_trigger_err[HTT_NUM_AC_WMM];
  2542. /** 11BE EHT MU Standalone Freq. BSRP Trigger frame sent over the air */
  2543. A_UINT32 standalone_be_bsr_trigger_tried[HTT_NUM_AC_WMM];
  2544. /** 11BE EHT MU Standalone Freq. BSRP Trigger completed with error(s) */
  2545. A_UINT32 standalone_be_bsr_trigger_err[HTT_NUM_AC_WMM];
  2546. /** 11BE EHT Manual Single-User UL OFDMA Trigger frame sent over the air */
  2547. A_UINT32 manual_be_su_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2548. /** 11BE EHT Manual Single-User UL OFDMA Trigger completed with error(s) */
  2549. A_UINT32 manual_be_su_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2550. /** 11BE EHT Manual Multi-User UL OFDMA Trigger frame sent over the air */
  2551. A_UINT32 manual_be_mu_ulofdma_basic_trigger[HTT_NUM_AC_WMM];
  2552. /** 11BE EHT Manual Multi-User UL OFDMA Trigger completed with error(s) */
  2553. A_UINT32 manual_be_mu_ulofdma_basic_trigger_err[HTT_NUM_AC_WMM];
  2554. /** 11BE EHT UL OFDMA Basic Trigger frames per AC */
  2555. A_UINT32 be_basic_trigger_per_ac[HTT_NUM_AC_WMM];
  2556. /** 11BE EHT UL OFDMA Basic Trigger frames per AC completed with error(s) */
  2557. A_UINT32 be_basic_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2558. /** 11BE EHT MU-BAR Trigger frames per AC */
  2559. A_UINT32 be_mu_bar_trigger_per_ac[HTT_NUM_AC_WMM];
  2560. /** 11BE EHT MU-BAR Trigger frames per AC completed with error(s) */
  2561. A_UINT32 be_mu_bar_trigger_errors_per_ac[HTT_NUM_AC_WMM];
  2562. } htt_stats_tx_selfgen_be_stats_tlv;
  2563. /* preserve old name alias for new name consistent with the tag name */
  2564. typedef htt_stats_tx_selfgen_be_stats_tlv htt_tx_selfgen_be_stats_tlv;
  2565. typedef struct { /* DEPRECATED */
  2566. htt_tlv_hdr_t tlv_hdr;
  2567. /** 11AX HE OFDMA NDPA frame queued to the HW */
  2568. A_UINT32 ax_ofdma_ndpa_queued[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2569. /** 11AX HE OFDMA NDPA frame sent over the air */
  2570. A_UINT32 ax_ofdma_ndpa_tried[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2571. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2572. A_UINT32 ax_ofdma_ndpa_flushed[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2573. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2574. A_UINT32 ax_ofdma_ndpa_err[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2575. } htt_stats_txbf_ofdma_ndpa_stats_tlv;
  2576. /* preserve old name alias for new name consistent with the tag name */
  2577. typedef htt_stats_txbf_ofdma_ndpa_stats_tlv htt_txbf_ofdma_ndpa_stats_tlv;
  2578. typedef struct { /* DEPRECATED */
  2579. htt_tlv_hdr_t tlv_hdr;
  2580. /** 11AX HE OFDMA NDP frame queued to the HW */
  2581. A_UINT32 ax_ofdma_ndp_queued[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2582. /** 11AX HE OFDMA NDPA frame sent over the air */
  2583. A_UINT32 ax_ofdma_ndp_tried[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2584. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2585. A_UINT32 ax_ofdma_ndp_flushed[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2586. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2587. A_UINT32 ax_ofdma_ndp_err[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2588. } htt_stats_txbf_ofdma_ndp_stats_tlv;
  2589. /* preserve old name alias for new name consistent with the tag name */
  2590. typedef htt_stats_txbf_ofdma_ndp_stats_tlv htt_txbf_ofdma_ndp_stats_tlv;
  2591. typedef struct { /* DEPRECATED */
  2592. htt_tlv_hdr_t tlv_hdr;
  2593. /** 11AX HE OFDMA MU BRPOLL frame queued to the HW */
  2594. A_UINT32 ax_ofdma_brpoll_queued[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2595. /** 11AX HE OFDMA MU BRPOLL frame sent over the air */
  2596. A_UINT32 ax_ofdma_brpoll_tried[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2597. /** 11AX HE OFDMA MU BRPOLL frame flushed by HW */
  2598. A_UINT32 ax_ofdma_brpoll_flushed[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2599. /** 11AX HE OFDMA MU BRPOLL frame completed with error(s) */
  2600. A_UINT32 ax_ofdma_brp_err[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2601. /**
  2602. * Number of CBF(s) received when 11AX HE OFDMA MU BRPOLL frame
  2603. * completed with error(s)
  2604. */
  2605. A_UINT32 ax_ofdma_brp_err_num_cbf_rcvd[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS+1];
  2606. } htt_stats_txbf_ofdma_brp_stats_tlv;
  2607. /* preserve old name alias for new name consistent with the tag name */
  2608. typedef htt_stats_txbf_ofdma_brp_stats_tlv htt_txbf_ofdma_brp_stats_tlv;
  2609. typedef struct { /* DEPRECATED */
  2610. htt_tlv_hdr_t tlv_hdr;
  2611. /**
  2612. * 11AX HE OFDMA PPDUs that were sent over the air with steering
  2613. * (TXBF + OFDMA)
  2614. */
  2615. A_UINT32 ax_ofdma_num_ppdu_steer[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2616. /** 11AX HE OFDMA PPDUs that were sent over the air in open loop */
  2617. A_UINT32 ax_ofdma_num_ppdu_ol[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2618. /**
  2619. * 11AX HE OFDMA number of users for which CBF prefetch was initiated
  2620. * to PHY HW during TX
  2621. */
  2622. A_UINT32 ax_ofdma_num_usrs_prefetch[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2623. /**
  2624. * 11AX HE OFDMA number of users for which sounding was initiated
  2625. * during TX
  2626. */
  2627. A_UINT32 ax_ofdma_num_usrs_sound[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2628. /** 11AX HE OFDMA number of users for which sounding was forced during TX */
  2629. A_UINT32 ax_ofdma_num_usrs_force_sound[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  2630. } htt_stats_txbf_ofdma_steer_stats_tlv;
  2631. /* preserve old name alias for new name consistent with the tag name */
  2632. typedef htt_stats_txbf_ofdma_steer_stats_tlv htt_txbf_ofdma_steer_stats_tlv;
  2633. /* Note:
  2634. * This struct htt_tx_pdev_txbf_ofdma_stats_t and all its constituent
  2635. * struct TLVs are deprecated, due to the need for restructuring these
  2636. * stats into a variable length array
  2637. */
  2638. typedef struct { /* DEPRECATED */
  2639. htt_stats_txbf_ofdma_ndpa_stats_tlv ofdma_ndpa_tlv;
  2640. htt_stats_txbf_ofdma_ndp_stats_tlv ofdma_ndp_tlv;
  2641. htt_stats_txbf_ofdma_brp_stats_tlv ofdma_brp_tlv;
  2642. htt_stats_txbf_ofdma_steer_stats_tlv ofdma_steer_tlv;
  2643. } htt_tx_pdev_txbf_ofdma_stats_t;
  2644. typedef struct {
  2645. /** 11AX HE OFDMA NDPA frame queued to the HW */
  2646. A_UINT32 ax_ofdma_ndpa_queued;
  2647. /** 11AX HE OFDMA NDPA frame sent over the air */
  2648. A_UINT32 ax_ofdma_ndpa_tried;
  2649. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2650. A_UINT32 ax_ofdma_ndpa_flushed;
  2651. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2652. A_UINT32 ax_ofdma_ndpa_err;
  2653. } htt_txbf_ofdma_ax_ndpa_stats_elem_t;
  2654. typedef struct {
  2655. htt_tlv_hdr_t tlv_hdr;
  2656. /**
  2657. * This field is populated with the num of elems in the ax_ndpa[]
  2658. * variable length array.
  2659. */
  2660. A_UINT32 num_elems_ax_ndpa_arr;
  2661. /**
  2662. * This field will be filled by target with value of
  2663. * sizeof(htt_txbf_ofdma_ax_ndpa_stats_elem_t).
  2664. * This is for allowing host to infer how much data target has provided,
  2665. * even if it using different version of the struct def than what target
  2666. * had used.
  2667. */
  2668. A_UINT32 arr_elem_size_ax_ndpa;
  2669. htt_txbf_ofdma_ax_ndpa_stats_elem_t ax_ndpa[1]; /* variable length */
  2670. } htt_stats_txbf_ofdma_ax_ndpa_stats_tlv;
  2671. /* preserve old name alias for new name consistent with the tag name */
  2672. typedef htt_stats_txbf_ofdma_ax_ndpa_stats_tlv htt_txbf_ofdma_ax_ndpa_stats_tlv;
  2673. typedef struct {
  2674. /** 11AX HE OFDMA NDP frame queued to the HW */
  2675. A_UINT32 ax_ofdma_ndp_queued;
  2676. /** 11AX HE OFDMA NDPA frame sent over the air */
  2677. A_UINT32 ax_ofdma_ndp_tried;
  2678. /** 11AX HE OFDMA NDPA frame flushed by HW */
  2679. A_UINT32 ax_ofdma_ndp_flushed;
  2680. /** 11AX HE OFDMA NDPA frame completed with error(s) */
  2681. A_UINT32 ax_ofdma_ndp_err;
  2682. } htt_txbf_ofdma_ax_ndp_stats_elem_t;
  2683. typedef struct {
  2684. htt_tlv_hdr_t tlv_hdr;
  2685. /**
  2686. * This field is populated with the num of elems in the the ax_ndp[]
  2687. * variable length array.
  2688. */
  2689. A_UINT32 num_elems_ax_ndp_arr;
  2690. /**
  2691. * This field will be filled by target with value of
  2692. * sizeof(htt_txbf_ofdma_ax_ndp_stats_elem_t).
  2693. * This is for allowing host to infer how much data target has provided,
  2694. * even if it using different version of the struct def than what target
  2695. * had used.
  2696. */
  2697. A_UINT32 arr_elem_size_ax_ndp;
  2698. htt_txbf_ofdma_ax_ndp_stats_elem_t ax_ndp[1]; /* variable length */
  2699. } htt_stats_txbf_ofdma_ax_ndp_stats_tlv;
  2700. /* preserve old name alias for new name consistent with the tag name */
  2701. typedef htt_stats_txbf_ofdma_ax_ndp_stats_tlv htt_txbf_ofdma_ax_ndp_stats_tlv;
  2702. typedef struct {
  2703. /** 11AX HE OFDMA MU BRPOLL frame queued to the HW */
  2704. A_UINT32 ax_ofdma_brpoll_queued;
  2705. /** 11AX HE OFDMA MU BRPOLL frame sent over the air */
  2706. A_UINT32 ax_ofdma_brpoll_tried;
  2707. /** 11AX HE OFDMA MU BRPOLL frame flushed by HW */
  2708. A_UINT32 ax_ofdma_brpoll_flushed;
  2709. /** 11AX HE OFDMA MU BRPOLL frame completed with error(s) */
  2710. A_UINT32 ax_ofdma_brp_err;
  2711. /**
  2712. * Number of CBF(s) received when 11AX HE OFDMA MU BRPOLL frame
  2713. * completed with error(s)
  2714. */
  2715. A_UINT32 ax_ofdma_brp_err_num_cbf_rcvd;
  2716. } htt_txbf_ofdma_ax_brp_stats_elem_t;
  2717. typedef struct {
  2718. htt_tlv_hdr_t tlv_hdr;
  2719. /**
  2720. * This field is populated with the num of elems in the the ax_brp[]
  2721. * variable length array.
  2722. */
  2723. A_UINT32 num_elems_ax_brp_arr;
  2724. /**
  2725. * This field will be filled by target with value of
  2726. * sizeof(htt_txbf_ofdma_ax_brp_stats_elem_t).
  2727. * This is for allowing host to infer how much data target has provided,
  2728. * even if it using different version of the struct than what target
  2729. * had used.
  2730. */
  2731. A_UINT32 arr_elem_size_ax_brp;
  2732. htt_txbf_ofdma_ax_brp_stats_elem_t ax_brp[1]; /* variable length */
  2733. } htt_stats_txbf_ofdma_ax_brp_stats_tlv;
  2734. /* preserve old name alias for new name consistent with the tag name */
  2735. typedef htt_stats_txbf_ofdma_ax_brp_stats_tlv htt_txbf_ofdma_ax_brp_stats_tlv;
  2736. typedef struct {
  2737. /**
  2738. * 11AX HE OFDMA PPDUs that were sent over the air with steering
  2739. * (TXBF + OFDMA)
  2740. */
  2741. A_UINT32 ax_ofdma_num_ppdu_steer;
  2742. /** 11AX HE OFDMA PPDUs that were sent over the air in open loop */
  2743. A_UINT32 ax_ofdma_num_ppdu_ol;
  2744. /**
  2745. * 11AX HE OFDMA number of users for which CBF prefetch was initiated
  2746. * to PHY HW during TX
  2747. */
  2748. A_UINT32 ax_ofdma_num_usrs_prefetch;
  2749. /**
  2750. * 11AX HE OFDMA number of users for which sounding was initiated
  2751. * during TX
  2752. */
  2753. A_UINT32 ax_ofdma_num_usrs_sound;
  2754. /** 11AX HE OFDMA number of users for which sounding was forced during TX */
  2755. A_UINT32 ax_ofdma_num_usrs_force_sound;
  2756. } htt_txbf_ofdma_ax_steer_stats_elem_t;
  2757. typedef struct {
  2758. htt_tlv_hdr_t tlv_hdr;
  2759. /**
  2760. * This field is populated with the num of elems in the ax_steer[]
  2761. * variable length array.
  2762. */
  2763. A_UINT32 num_elems_ax_steer_arr;
  2764. /**
  2765. * This field will be filled by target with value of
  2766. * sizeof(htt_txbf_ofdma_ax_steer_stats_elem_t).
  2767. * This is for allowing host to infer how much data target has provided,
  2768. * even if it using different version of the struct than what target
  2769. * had used.
  2770. */
  2771. A_UINT32 arr_elem_size_ax_steer;
  2772. htt_txbf_ofdma_ax_steer_stats_elem_t ax_steer[1]; /* variable length */
  2773. } htt_stats_txbf_ofdma_ax_steer_stats_tlv;
  2774. /* preserve old name alias for new name consistent with the tag name */
  2775. typedef htt_stats_txbf_ofdma_ax_steer_stats_tlv
  2776. htt_txbf_ofdma_ax_steer_stats_tlv;
  2777. typedef struct {
  2778. htt_tlv_hdr_t tlv_hdr;
  2779. /* 11AX HE OFDMA MPDUs tried in rbo steering */
  2780. A_UINT32 ax_ofdma_rbo_steer_mpdus_tried;
  2781. /* 11AX HE OFDMA MPDUs failed in rbo steering */
  2782. A_UINT32 ax_ofdma_rbo_steer_mpdus_failed;
  2783. /* 11AX HE OFDMA MPDUs tried in sifs steering */
  2784. A_UINT32 ax_ofdma_sifs_steer_mpdus_tried;
  2785. /* 11AX HE OFDMA MPDUs failed in sifs steering */
  2786. A_UINT32 ax_ofdma_sifs_steer_mpdus_failed;
  2787. } htt_stats_txbf_ofdma_ax_steer_mpdu_stats_tlv;
  2788. /* preserve old name alias for new name consistent with the tag name */
  2789. typedef htt_stats_txbf_ofdma_ax_steer_mpdu_stats_tlv
  2790. htt_txbf_ofdma_ax_steer_mpdu_stats_tlv;
  2791. typedef struct {
  2792. /** 11BE EHT OFDMA NDPA frame queued to the HW */
  2793. A_UINT32 be_ofdma_ndpa_queued;
  2794. /** 11BE EHT OFDMA NDPA frame sent over the air */
  2795. A_UINT32 be_ofdma_ndpa_tried;
  2796. /** 11BE EHT OFDMA NDPA frame flushed by HW */
  2797. A_UINT32 be_ofdma_ndpa_flushed;
  2798. /** 11BE EHT OFDMA NDPA frame completed with error(s) */
  2799. A_UINT32 be_ofdma_ndpa_err;
  2800. } htt_txbf_ofdma_be_ndpa_stats_elem_t;
  2801. typedef struct {
  2802. htt_tlv_hdr_t tlv_hdr;
  2803. /**
  2804. * This field is populated with the num of elems in the be_ndpa[]
  2805. * variable length array.
  2806. */
  2807. A_UINT32 num_elems_be_ndpa_arr;
  2808. /**
  2809. * This field will be filled by target with value of
  2810. * sizeof(htt_txbf_ofdma_be_ndpa_stats_elem_t).
  2811. * This is for allowing host to infer how much data target has provided,
  2812. * even if it using different version of the struct than what target
  2813. * had used.
  2814. */
  2815. A_UINT32 arr_elem_size_be_ndpa;
  2816. htt_txbf_ofdma_be_ndpa_stats_elem_t be_ndpa[1]; /* variable length */
  2817. } htt_stats_txbf_ofdma_be_ndpa_stats_tlv;
  2818. /* preserve old name alias for new name consistent with the tag name */
  2819. typedef htt_stats_txbf_ofdma_be_ndpa_stats_tlv htt_txbf_ofdma_be_ndpa_stats_tlv;
  2820. typedef struct {
  2821. /** 11BE EHT OFDMA NDP frame queued to the HW */
  2822. A_UINT32 be_ofdma_ndp_queued;
  2823. /** 11BE EHT OFDMA NDPA frame sent over the air */
  2824. A_UINT32 be_ofdma_ndp_tried;
  2825. /** 11BE EHT OFDMA NDPA frame flushed by HW */
  2826. A_UINT32 be_ofdma_ndp_flushed;
  2827. /** 11BE EHT OFDMA NDPA frame completed with error(s) */
  2828. A_UINT32 be_ofdma_ndp_err;
  2829. } htt_txbf_ofdma_be_ndp_stats_elem_t;
  2830. typedef struct {
  2831. htt_tlv_hdr_t tlv_hdr;
  2832. /**
  2833. * This field is populated with the num of elems in the be_ndp[]
  2834. * variable length array.
  2835. */
  2836. A_UINT32 num_elems_be_ndp_arr;
  2837. /**
  2838. * This field will be filled by target with value of
  2839. * sizeof(htt_txbf_ofdma_be_ndp_stats_elem_t).
  2840. * This is for allowing host to infer how much data target has provided,
  2841. * even if it using different version of the struct than what target
  2842. * had used.
  2843. */
  2844. A_UINT32 arr_elem_size_be_ndp;
  2845. htt_txbf_ofdma_be_ndp_stats_elem_t be_ndp[1]; /* variable length */
  2846. } htt_stats_txbf_ofdma_be_ndp_stats_tlv;
  2847. /* preserve old name alias for new name consistent with the tag name */
  2848. typedef htt_stats_txbf_ofdma_be_ndp_stats_tlv htt_txbf_ofdma_be_ndp_stats_tlv;
  2849. typedef struct {
  2850. /** 11BE EHT OFDMA MU BRPOLL frame queued to the HW */
  2851. A_UINT32 be_ofdma_brpoll_queued;
  2852. /** 11BE EHT OFDMA MU BRPOLL frame sent over the air */
  2853. A_UINT32 be_ofdma_brpoll_tried;
  2854. /** 11BE EHT OFDMA MU BRPOLL frame flushed by HW */
  2855. A_UINT32 be_ofdma_brpoll_flushed;
  2856. /** 11BE EHT OFDMA MU BRPOLL frame completed with error(s) */
  2857. A_UINT32 be_ofdma_brp_err;
  2858. /**
  2859. * Number of CBF(s) received when 11BE EHT OFDMA MU BRPOLL frame
  2860. * completed with error(s)
  2861. */
  2862. A_UINT32 be_ofdma_brp_err_num_cbf_rcvd;
  2863. } htt_txbf_ofdma_be_brp_stats_elem_t;
  2864. typedef struct {
  2865. htt_tlv_hdr_t tlv_hdr;
  2866. /**
  2867. * This field is populated with the num of elems in the be_brp[]
  2868. * variable length array.
  2869. */
  2870. A_UINT32 num_elems_be_brp_arr;
  2871. /**
  2872. * This field will be filled by target with value of
  2873. * sizeof(htt_txbf_ofdma_be_brp_stats_elem_t).
  2874. * This is for allowing host to infer how much data target has provided,
  2875. * even if it using different version of the struct than what target
  2876. * had used
  2877. */
  2878. A_UINT32 arr_elem_size_be_brp;
  2879. htt_txbf_ofdma_be_brp_stats_elem_t be_brp[1]; /* variable length */
  2880. } htt_stats_txbf_ofdma_be_brp_stats_tlv;
  2881. /* preserve old name alias for new name consistent with the tag name */
  2882. typedef htt_stats_txbf_ofdma_be_brp_stats_tlv htt_txbf_ofdma_be_brp_stats_tlv;
  2883. typedef struct {
  2884. /**
  2885. * 11BE EHT OFDMA PPDUs that were sent over the air with steering
  2886. * (TXBF + OFDMA)
  2887. */
  2888. A_UINT32 be_ofdma_num_ppdu_steer;
  2889. /** 11BE EHT OFDMA PPDUs that were sent over the air in open loop */
  2890. A_UINT32 be_ofdma_num_ppdu_ol;
  2891. /**
  2892. * 11BE EHT OFDMA number of users for which CBF prefetch was initiated
  2893. * to PHY HW during TX
  2894. */
  2895. A_UINT32 be_ofdma_num_usrs_prefetch;
  2896. /**
  2897. * 11BE EHT OFDMA number of users for which sounding was initiated
  2898. * during TX
  2899. */
  2900. A_UINT32 be_ofdma_num_usrs_sound;
  2901. /**
  2902. * 11BE EHT OFDMA number of users for which sounding was forced during TX
  2903. */
  2904. A_UINT32 be_ofdma_num_usrs_force_sound;
  2905. } htt_txbf_ofdma_be_steer_stats_elem_t;
  2906. typedef struct {
  2907. htt_tlv_hdr_t tlv_hdr;
  2908. /**
  2909. * This field is populated with the num of elems in the be_steer[]
  2910. * variable length array.
  2911. */
  2912. A_UINT32 num_elems_be_steer_arr;
  2913. /**
  2914. * This field will be filled by target with value of
  2915. * sizeof(htt_txbf_ofdma_be_steer_stats_elem_t).
  2916. * This is for allowing host to infer how much data target has provided,
  2917. * even if it using different version of the struct than what target
  2918. * had used.
  2919. */
  2920. A_UINT32 arr_elem_size_be_steer;
  2921. htt_txbf_ofdma_be_steer_stats_elem_t be_steer[1]; /* variable length */
  2922. } htt_stats_txbf_ofdma_be_steer_stats_tlv;
  2923. /* preserve old name alias for new name consistent with the tag name */
  2924. typedef htt_stats_txbf_ofdma_be_steer_stats_tlv
  2925. htt_txbf_ofdma_be_steer_stats_tlv;
  2926. typedef struct {
  2927. htt_tlv_hdr_t tlv_hdr;
  2928. /* 11BE EHT OFDMA MPDUs tried in rbo steering */
  2929. A_UINT32 be_ofdma_rbo_steer_mpdus_tried;
  2930. /* 11BE EHT OFDMA MPDUs failed in rbo steering */
  2931. A_UINT32 be_ofdma_rbo_steer_mpdus_failed;
  2932. /* 11BE EHT OFDMA MPDUs tried in sifs steering */
  2933. A_UINT32 be_ofdma_sifs_steer_mpdus_tried;
  2934. /* 11BE EHT OFDMA MPDUs failed in sifs steering */
  2935. A_UINT32 be_ofdma_sifs_steer_mpdus_failed;
  2936. } htt_stats_txbf_ofdma_be_steer_mpdu_stats_tlv;
  2937. /* preserve old name alias for new name consistent with the tag name */
  2938. typedef htt_stats_txbf_ofdma_be_steer_mpdu_stats_tlv
  2939. htt_txbf_ofdma_be_steer_mpdu_stats_tlv;
  2940. /* STATS_TYPE : HTT_DBG_EXT_STATS_TXBF_OFDMA
  2941. * TLV_TAGS:
  2942. * - HTT_STATS_TXBF_OFDMA_NDPA_STATS_TAG
  2943. * - HTT_STATS_TXBF_OFDMA_NDP_STATS_TAG
  2944. * - HTT_STATS_TXBF_OFDMA_BRP_STATS_TAG
  2945. * - HTT_STATS_TXBF_OFDMA_STEER_STATS_TAG
  2946. * - HTT_STATS_TXBF_OFDMA_AX_STEER_MPDU_STATS_TAG
  2947. * - HTT_STATS_TXBF_OFDMA_BE_NDPA_STATS_TAG
  2948. * - HTT_STATS_TXBF_OFDMA_BE_NDP_STATS_TAG
  2949. * - HTT_STATS_TXBF_OFDMA_BE_BRP_STATS_TAG
  2950. * - HTT_STATS_TXBF_OFDMA_BE_STEER_STATS_TAG
  2951. * - HTT_STATS_TXBF_OFDMA_BE_STEER_MPDU_STATS_TAG
  2952. */
  2953. typedef struct {
  2954. htt_tlv_hdr_t tlv_hdr;
  2955. /** 11AC VHT SU NDP frame completed with error(s) */
  2956. A_UINT32 ac_su_ndp_err;
  2957. /** 11AC VHT SU NDPA frame completed with error(s) */
  2958. A_UINT32 ac_su_ndpa_err;
  2959. /** 11AC VHT MU MIMO NDPA frame completed with error(s) */
  2960. A_UINT32 ac_mu_mimo_ndpa_err;
  2961. /** 11AC VHT MU MIMO NDP frame completed with error(s) */
  2962. A_UINT32 ac_mu_mimo_ndp_err;
  2963. /** 11AC VHT MU MIMO BRPOLL for user 1 frame completed with error(s) */
  2964. A_UINT32 ac_mu_mimo_brp1_err;
  2965. /** 11AC VHT MU MIMO BRPOLL for user 2 frame completed with error(s) */
  2966. A_UINT32 ac_mu_mimo_brp2_err;
  2967. /** 11AC VHT MU MIMO BRPOLL for user 3 frame completed with error(s) */
  2968. A_UINT32 ac_mu_mimo_brp3_err;
  2969. /** 11AC VHT SU NDPA frame flushed by HW */
  2970. A_UINT32 ac_su_ndpa_flushed;
  2971. /** 11AC VHT SU NDP frame flushed by HW */
  2972. A_UINT32 ac_su_ndp_flushed;
  2973. /** 11AC VHT MU MIMO NDPA frame flushed by HW */
  2974. A_UINT32 ac_mu_mimo_ndpa_flushed;
  2975. /** 11AC VHT MU MIMO NDP frame flushed by HW */
  2976. A_UINT32 ac_mu_mimo_ndp_flushed;
  2977. /** 11AC VHT MU MIMO BRPOLL for user 1 frame flushed by HW */
  2978. A_UINT32 ac_mu_mimo_brpoll1_flushed;
  2979. /** 11AC VHT MU MIMO BRPOLL for user 2 frame flushed by HW */
  2980. A_UINT32 ac_mu_mimo_brpoll2_flushed;
  2981. /** 11AC VHT MU MIMO BRPOLL for user 3 frame flushed by HW */
  2982. A_UINT32 ac_mu_mimo_brpoll3_flushed;
  2983. } htt_stats_tx_selfgen_ac_err_stats_tlv;
  2984. /* preserve old name alias for new name consistent with the tag name */
  2985. typedef htt_stats_tx_selfgen_ac_err_stats_tlv htt_tx_selfgen_ac_err_stats_tlv;
  2986. typedef struct {
  2987. htt_tlv_hdr_t tlv_hdr;
  2988. /** 11AX HE SU NDP frame completed with error(s) */
  2989. A_UINT32 ax_su_ndp_err;
  2990. /** 11AX HE SU NDPA frame completed with error(s) */
  2991. A_UINT32 ax_su_ndpa_err;
  2992. /** 11AX HE MU MIMO NDPA frame completed with error(s) */
  2993. A_UINT32 ax_mu_mimo_ndpa_err;
  2994. /** 11AX HE MU MIMO NDP frame completed with error(s) */
  2995. A_UINT32 ax_mu_mimo_ndp_err;
  2996. union {
  2997. struct {
  2998. /* deprecated old names */
  2999. A_UINT32 ax_mu_mimo_brp1_err;
  3000. A_UINT32 ax_mu_mimo_brp2_err;
  3001. A_UINT32 ax_mu_mimo_brp3_err;
  3002. A_UINT32 ax_mu_mimo_brp4_err;
  3003. A_UINT32 ax_mu_mimo_brp5_err;
  3004. A_UINT32 ax_mu_mimo_brp6_err;
  3005. A_UINT32 ax_mu_mimo_brp7_err;
  3006. };
  3007. /** 11AX HE MU BR-POLL frame for 1 - 7 users completed with error(s) */
  3008. A_UINT32 ax_mu_mimo_brp_err[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  3009. };
  3010. /** 11AX HE MU Basic Trigger frame completed with error(s) */
  3011. A_UINT32 ax_basic_trigger_err;
  3012. /** 11AX HE MU BSRP Trigger frame completed with error(s) */
  3013. A_UINT32 ax_bsr_trigger_err;
  3014. /** 11AX HE MU BAR Trigger frame completed with error(s) */
  3015. A_UINT32 ax_mu_bar_trigger_err;
  3016. /** 11AX HE MU RTS Trigger frame completed with error(s) */
  3017. A_UINT32 ax_mu_rts_trigger_err;
  3018. /** 11AX HE MU ULMUMIMO Trigger frame completed with error(s) */
  3019. A_UINT32 ax_ulmumimo_trigger_err;
  3020. /**
  3021. * Number of CBF(s) received when 11AX HE MU MIMO BRPOLL
  3022. * frame completed with error(s)
  3023. */
  3024. A_UINT32 ax_mu_mimo_brp_err_num_cbf_received[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3025. /** 11AX HE SU NDPA frame flushed by HW */
  3026. A_UINT32 ax_su_ndpa_flushed;
  3027. /** 11AX HE SU NDP frame flushed by HW */
  3028. A_UINT32 ax_su_ndp_flushed;
  3029. /** 11AX HE MU MIMO NDPA frame flushed by HW */
  3030. A_UINT32 ax_mu_mimo_ndpa_flushed;
  3031. /** 11AX HE MU MIMO NDP frame flushed by HW */
  3032. A_UINT32 ax_mu_mimo_ndp_flushed;
  3033. /** 11AX HE MU BR-POLL frame for users 1 - 7 flushed by HW */
  3034. A_UINT32 ax_mu_mimo_brpoll_flushed[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS - 1];
  3035. /**
  3036. * 11AX HE UL-MUMIMO Trigger frame for users 0 - 7 completed with error(s)
  3037. */
  3038. A_UINT32 ax_ul_mumimo_trigger_err[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3039. /** 11AX HE MU OFDMA Basic Trigger frame completed with partial user response */
  3040. A_UINT32 ax_basic_trigger_partial_resp;
  3041. /** 11AX HE MU BSRP Trigger frame completed with partial user response */
  3042. A_UINT32 ax_bsr_trigger_partial_resp;
  3043. /** 11AX HE MU BAR Trigger frame completed with partial user response */
  3044. A_UINT32 ax_mu_bar_trigger_partial_resp;
  3045. } htt_stats_tx_selfgen_ax_err_stats_tlv;
  3046. /* preserve old name alias for new name consistent with the tag name */
  3047. typedef htt_stats_tx_selfgen_ax_err_stats_tlv htt_tx_selfgen_ax_err_stats_tlv;
  3048. typedef struct {
  3049. htt_tlv_hdr_t tlv_hdr;
  3050. /** 11BE EHT SU NDP frame completed with error(s) */
  3051. A_UINT32 be_su_ndp_err;
  3052. /** 11BE EHT SU NDPA frame completed with error(s) */
  3053. A_UINT32 be_su_ndpa_err;
  3054. /** 11BE EHT MU MIMO NDPA frame completed with error(s) */
  3055. A_UINT32 be_mu_mimo_ndpa_err;
  3056. /** 11BE EHT MU MIMO NDP frame completed with error(s) */
  3057. A_UINT32 be_mu_mimo_ndp_err;
  3058. /** 11BE EHT MU BR-POLL frame for 1 - 7 users completed with error(s) */
  3059. A_UINT32 be_mu_mimo_brp_err[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  3060. /** 11BE EHT MU Basic Trigger frame completed with error(s) */
  3061. A_UINT32 be_basic_trigger_err;
  3062. /** 11BE EHT MU BSRP Trigger frame completed with error(s) */
  3063. A_UINT32 be_bsr_trigger_err;
  3064. /** 11BE EHT MU BAR Trigger frame completed with error(s) */
  3065. A_UINT32 be_mu_bar_trigger_err;
  3066. /** 11BE EHT MU RTS Trigger frame completed with error(s) */
  3067. A_UINT32 be_mu_rts_trigger_err;
  3068. /** 11BE EHT MU ULMUMIMO Trigger frame completed with error(s) */
  3069. A_UINT32 be_ulmumimo_trigger_err;
  3070. /**
  3071. * Number of CBF(s) received when 11BE EHT MU MIMO BRPOLL frame
  3072. * completed with error(s)
  3073. */
  3074. A_UINT32 be_mu_mimo_brp_err_num_cbf_received[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3075. /** 11BE EHT SU NDPA frame flushed by HW */
  3076. A_UINT32 be_su_ndpa_flushed;
  3077. /** 11BE EHT SU NDP frame flushed by HW */
  3078. A_UINT32 be_su_ndp_flushed;
  3079. /** 11BE EHT MU MIMO NDPA frame flushed by HW */
  3080. A_UINT32 be_mu_mimo_ndpa_flushed;
  3081. /** 11BE HT MU MIMO NDP frame flushed by HW */
  3082. A_UINT32 be_mu_mimo_ndp_flushed;
  3083. /** 11BE EHT MU BR-POLL frame for users 1 - 7 flushed by HW */
  3084. A_UINT32 be_mu_mimo_brpoll_flushed[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS - 1];
  3085. /**
  3086. * 11BE EHT UL-MUMIMO Trigger frame for users 0 - 7 completed with error(s)
  3087. */
  3088. A_UINT32 be_ul_mumimo_trigger_err[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3089. /** 11BE EHT MU OFDMA Basic Trigger frame completed with partial user response */
  3090. A_UINT32 be_basic_trigger_partial_resp;
  3091. /** 11BE EHT MU BSRP Trigger frame completed with partial user response */
  3092. A_UINT32 be_bsr_trigger_partial_resp;
  3093. /** 11BE EHT MU BAR Trigger frame completed with partial user response */
  3094. A_UINT32 be_mu_bar_trigger_partial_resp;
  3095. /** 11BE EHT MU RTS Trigger frame blocked due to partner link TX/RX(eMLSR) */
  3096. A_UINT32 be_mu_rts_trigger_blocked;
  3097. /** 11BE EHT MU BSR Trigger frame blocked due to partner link TX/RX(eMLSR) */
  3098. A_UINT32 be_bsr_trigger_blocked;
  3099. } htt_stats_tx_selfgen_be_err_stats_tlv;
  3100. /* preserve old name alias for new name consistent with the tag name */
  3101. typedef htt_stats_tx_selfgen_be_err_stats_tlv htt_tx_selfgen_be_err_stats_tlv;
  3102. /*
  3103. * Scheduler completion status reason code.
  3104. * (0) HTT_TXERR_NONE - No error (Success).
  3105. * (1) HTT_TXERR_RESP - Response timeout, response mismatch, BW mismatch,
  3106. * MIMO control mismatch, CRC error etc.
  3107. * (2) HTT_TXERR_FILT - Blocked by HW tx filtering.
  3108. * (3) HTT_TXERR_FIFO - FIFO, misc. errors in HW.
  3109. * (4) HTT_TXERR_SWABORT - Software initialted abort (TX_ABORT).
  3110. * (5) HTT_TXERR_RESERVED1 - Currently reserved.
  3111. * (6) HTT_TXERR_RESERVED2 - Currently reserved.
  3112. */
  3113. /* Scheduler error code.
  3114. * (0) HTT_TX_SELFGEN_SCH_TSFLAG_FLUSH_RCVD_ERR - Flush received from HW.
  3115. * (1) HTT_TX_SELFGEN_SCH_TSFLAG_FILT_SCHED_CMD_ERR - Scheduler command was
  3116. * filtered by HW.
  3117. * (2) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_MISMATCH_ERR - Response frame mismatch
  3118. * error.
  3119. * (3) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_MIMO_CTRL_MISMATCH_ERR - CBF
  3120. * received with MIMO control mismatch.
  3121. * (4) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_CBF_BW_MISMATCH_ERR - CBF received with
  3122. * BW mismatch.
  3123. * (5) HTT_TX_SELFGEN_SCH_TSFLAG_RETRY_COUNT_FAIL_ERR - Error in transmitting
  3124. * frame even after maximum retries.
  3125. * (6) HTT_TX_SELFGEN_SCH_TSFLAG_RESP_TOO_LATE_RECEIVED_ERR - Response frame
  3126. * received outside RX window.
  3127. * (7) HTT_TX_SELFGEN_SCH_TSFLAG_SIFS_STALL_NO_NEXT_CMD_ERR - No frame
  3128. * received by HW for queuing within SIFS interval.
  3129. */
  3130. typedef struct {
  3131. htt_tlv_hdr_t tlv_hdr;
  3132. /** 11AC VHT SU NDPA scheduler completion status reason code */
  3133. A_UINT32 ac_su_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3134. /** 11AC VHT SU NDP scheduler completion status reason code */
  3135. A_UINT32 ac_su_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3136. /** 11AC VHT SU NDP scheduler error code */
  3137. A_UINT32 ac_su_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3138. /** 11AC VHT MU MIMO NDPA scheduler completion status reason code */
  3139. A_UINT32 ac_mu_mimo_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3140. /** 11AC VHT MU MIMO NDP scheduler completion status reason code */
  3141. A_UINT32 ac_mu_mimo_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3142. /** 11AC VHT MU MIMO NDP scheduler error code */
  3143. A_UINT32 ac_mu_mimo_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3144. /** 11AC VHT MU MIMO BRPOLL scheduler completion status reason code */
  3145. A_UINT32 ac_mu_mimo_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3146. /** 11AC VHT MU MIMO BRPOLL scheduler error code */
  3147. A_UINT32 ac_mu_mimo_brp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3148. } htt_stats_tx_selfgen_ac_sched_status_stats_tlv;
  3149. /* preserve old name alias for new name consistent with the tag name */
  3150. typedef htt_stats_tx_selfgen_ac_sched_status_stats_tlv
  3151. htt_tx_selfgen_ac_sched_status_stats_tlv;
  3152. typedef struct {
  3153. htt_tlv_hdr_t tlv_hdr;
  3154. /** 11AX HE SU NDPA scheduler completion status reason code */
  3155. A_UINT32 ax_su_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3156. /** 11AX SU NDP scheduler completion status reason code */
  3157. A_UINT32 ax_su_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3158. /** 11AX HE SU NDP scheduler error code */
  3159. A_UINT32 ax_su_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3160. /** 11AX HE MU MIMO NDPA scheduler completion status reason code */
  3161. A_UINT32 ax_mu_mimo_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3162. /** 11AX HE MU MIMO NDP scheduler completion status reason code */
  3163. A_UINT32 ax_mu_mimo_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3164. /** 11AX HE MU MIMO NDP scheduler error code */
  3165. A_UINT32 ax_mu_mimo_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3166. /** 11AX HE MU MIMO MU BRPOLL scheduler completion status reason code */
  3167. A_UINT32 ax_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3168. /** 11AX HE MU MIMO MU BRPOLL scheduler error code */
  3169. A_UINT32 ax_mu_brp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3170. /** 11AX HE MU BAR scheduler completion status reason code */
  3171. A_UINT32 ax_mu_bar_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3172. /** 11AX HE MU BAR scheduler error code */
  3173. A_UINT32 ax_mu_bar_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3174. /**
  3175. * 11AX HE UL OFDMA Basic Trigger scheduler completion status reason code
  3176. */
  3177. A_UINT32 ax_basic_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3178. /** 11AX HE UL OFDMA Basic Trigger scheduler error code */
  3179. A_UINT32 ax_basic_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3180. /**
  3181. * 11AX HE UL MUMIMO Basic Trigger scheduler completion status reason code
  3182. */
  3183. A_UINT32 ax_ulmumimo_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3184. /** 11AX HE UL MUMIMO Basic Trigger scheduler error code */
  3185. A_UINT32 ax_ulmumimo_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3186. } htt_stats_tx_selfgen_ax_sched_status_stats_tlv;
  3187. /* preserve old name alias for new name consistent with the tag name */
  3188. typedef htt_stats_tx_selfgen_ax_sched_status_stats_tlv
  3189. htt_tx_selfgen_ax_sched_status_stats_tlv;
  3190. typedef struct {
  3191. htt_tlv_hdr_t tlv_hdr;
  3192. /** 11BE EHT SU NDPA scheduler completion status reason code */
  3193. A_UINT32 be_su_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3194. /** 11BE SU NDP scheduler completion status reason code */
  3195. A_UINT32 be_su_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3196. /** 11BE EHT SU NDP scheduler error code */
  3197. A_UINT32 be_su_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3198. /** 11BE EHT MU MIMO NDPA scheduler completion status reason code */
  3199. A_UINT32 be_mu_mimo_ndpa_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3200. /** 11BE EHT MU MIMO NDP scheduler completion status reason code */
  3201. A_UINT32 be_mu_mimo_ndp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3202. /** 11BE EHT MU MIMO NDP scheduler error code */
  3203. A_UINT32 be_mu_mimo_ndp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3204. /** 11BE EHT MU MIMO MU BRPOLL scheduler completion status reason code */
  3205. A_UINT32 be_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3206. /** 11BE EHT MU MIMO MU BRPOLL scheduler error code */
  3207. A_UINT32 be_mu_brp_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3208. /** 11BE EHT MU BAR scheduler completion status reason code */
  3209. A_UINT32 be_mu_bar_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3210. /** 11BE EHT MU BAR scheduler error code */
  3211. A_UINT32 be_mu_bar_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3212. /**
  3213. * 11BE EHT UL OFDMA Basic Trigger scheduler completion status reason code
  3214. */
  3215. A_UINT32 be_basic_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3216. /** 11BE EHT UL OFDMA Basic Trigger scheduler error code */
  3217. A_UINT32 be_basic_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3218. /**
  3219. * 11BE EHT UL MUMIMO Basic Trigger scheduler completion status reason code
  3220. */
  3221. A_UINT32 be_ulmumimo_trig_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  3222. /** 11BE EHT UL MUMIMO Basic Trigger scheduler error code */
  3223. A_UINT32 be_ulmumimo_trig_sch_flag_err[HTT_TX_SELFGEN_NUM_SCH_TSFLAG_ERROR_STATS];
  3224. } htt_stats_tx_selfgen_be_sched_status_stats_tlv;
  3225. /* preserve old name alias for new name consistent with the tag name */
  3226. typedef htt_stats_tx_selfgen_be_sched_status_stats_tlv
  3227. htt_tx_selfgen_be_sched_status_stats_tlv;
  3228. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  3229. * TLV_TAGS:
  3230. * - HTT_STATS_TX_SELFGEN_CMN_STATS_TAG
  3231. * - HTT_STATS_TX_SELFGEN_AC_STATS_TAG
  3232. * - HTT_STATS_TX_SELFGEN_AX_STATS_TAG
  3233. * - HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG
  3234. * - HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG
  3235. * - HTT_STATS_TX_SELFGEN_AC_SCHED_STATUS_STATS_TAG
  3236. * - HTT_STATS_TX_SELFGEN_AX_SCHED_STATUS_STATS_TAG
  3237. * - HTT_STATS_TX_SELFGEN_BE_STATS_TAG
  3238. * - HTT_STATS_TX_SELFGEN_BE_ERR_STATS_TAG
  3239. * - HTT_STATS_TX_SELFGEN_BE_SCHED_STATUS_STATS_TAG
  3240. */
  3241. /* NOTE:
  3242. * This structure is for documentation, and cannot be safely used directly.
  3243. * Instead, use the constituent TLV structures to fill/parse.
  3244. */
  3245. typedef struct {
  3246. htt_stats_tx_selfgen_cmn_stats_tlv cmn_tlv;
  3247. htt_stats_tx_selfgen_ac_stats_tlv ac_tlv;
  3248. htt_stats_tx_selfgen_ax_stats_tlv ax_tlv;
  3249. htt_stats_tx_selfgen_ac_err_stats_tlv ac_err_tlv;
  3250. htt_stats_tx_selfgen_ax_err_stats_tlv ax_err_tlv;
  3251. htt_stats_tx_selfgen_ac_sched_status_stats_tlv ac_sched_status_tlv;
  3252. htt_stats_tx_selfgen_ax_sched_status_stats_tlv ax_sched_status_tlv;
  3253. htt_stats_tx_selfgen_be_stats_tlv be_tlv;
  3254. htt_stats_tx_selfgen_be_err_stats_tlv be_err_tlv;
  3255. htt_stats_tx_selfgen_be_sched_status_stats_tlv be_sched_status_tlv;
  3256. } htt_tx_pdev_selfgen_stats_t;
  3257. /* == TX MU STATS == */
  3258. typedef struct {
  3259. htt_tlv_hdr_t tlv_hdr;
  3260. /** Number of MU MIMO schedules posted to HW */
  3261. A_UINT32 mu_mimo_sch_posted;
  3262. /** Number of MU MIMO schedules failed to post */
  3263. A_UINT32 mu_mimo_sch_failed;
  3264. /** Number of MU MIMO PPDUs posted to HW */
  3265. A_UINT32 mu_mimo_ppdu_posted;
  3266. /*
  3267. * This is the common description for the below sch stats.
  3268. * Counts the number of transmissions of each number of MU users
  3269. * in each TX mode.
  3270. * The array index is the "number of users - 1".
  3271. * For example, ac_mu_mimo_sch_nusers[1] counts the number of 11AC MU2
  3272. * TX PPDUs, ac_mu_mimo_sch_nusers[2] counts the number of 11AC MU3
  3273. * TX PPDUs and so on.
  3274. * The same is applicable for the other TX mode stats.
  3275. */
  3276. /** Represents the count for 11AC DL MU MIMO sequences */
  3277. A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3278. /** Represents the count for 11AX DL MU MIMO sequences */
  3279. A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3280. /** Represents the count for 11AX DL MU OFDMA sequences */
  3281. A_UINT32 ax_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3282. /**
  3283. * Represents the count for 11AX UL MU OFDMA sequences with Basic Triggers
  3284. */
  3285. A_UINT32 ax_ul_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3286. /** Represents the count for 11AX UL MU OFDMA sequences with BSRP Triggers */
  3287. A_UINT32 ax_ul_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3288. /** Represents the count for 11AX UL MU OFDMA sequences with BAR Triggers */
  3289. A_UINT32 ax_ul_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3290. /** Represents the count for 11AX UL MU OFDMA sequences with BRP Triggers */
  3291. A_UINT32 ax_ul_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3292. /**
  3293. * Represents the count for 11AX UL MU MIMO sequences with Basic Triggers
  3294. */
  3295. A_UINT32 ax_ul_mumimo_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3296. /** Represents the count for 11AX UL MU MIMO sequences with BRP Triggers */
  3297. A_UINT32 ax_ul_mumimo_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3298. /** Number of 11AC DL MU MIMO schedules posted per group size (0-3) */
  3299. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3300. /** Number of 11AX DL MU MIMO schedules posted per group size */
  3301. A_UINT32 ax_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3302. /** Represents the count for 11BE DL MU MIMO sequences */
  3303. A_UINT32 be_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3304. /** Number of 11BE DL MU MIMO schedules posted per group size */
  3305. A_UINT32 be_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3306. /** Number of 11AC DL MU MIMO schedules posted per group size (4-7) */
  3307. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz_ext[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3308. } htt_stats_tx_pdev_mu_mimo_stats_tlv;
  3309. /* preserve old name alias for new name consistent with the tag name */
  3310. typedef htt_stats_tx_pdev_mu_mimo_stats_tlv htt_tx_pdev_mu_mimo_sch_stats_tlv;
  3311. typedef struct {
  3312. htt_tlv_hdr_t tlv_hdr;
  3313. A_UINT32 dl_mumimo_grp_best_grp_size[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3314. A_UINT32 dl_mumimo_grp_best_num_usrs[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3315. A_UINT32 dl_mumimo_grp_eligible[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3316. A_UINT32 dl_mumimo_grp_ineligible[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3317. A_UINT32 dl_mumimo_grp_invalid[HTT_TX_NUM_MUMIMO_GRP_INVALID_WORDS];
  3318. A_UINT32 dl_mumimo_grp_tputs[HTT_STATS_MUMIMO_TPUT_NUM_BINS];
  3319. A_UINT32 ul_mumimo_grp_best_grp_size[HTT_STATS_MAX_MUMIMO_GRP_SZ];
  3320. A_UINT32 ul_mumimo_grp_best_num_usrs[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3321. A_UINT32 ul_mumimo_grp_tputs[HTT_STATS_MUMIMO_TPUT_NUM_BINS];
  3322. } htt_stats_tx_pdev_mumimo_grp_stats_tlv;
  3323. /* preserve old name alias for new name consistent with the tag name */
  3324. typedef htt_stats_tx_pdev_mumimo_grp_stats_tlv htt_tx_pdev_mumimo_grp_stats_tlv;
  3325. typedef struct {
  3326. htt_tlv_hdr_t tlv_hdr;
  3327. /** Number of MU MIMO schedules posted to HW */
  3328. A_UINT32 mu_mimo_sch_posted;
  3329. /** Number of MU MIMO schedules failed to post */
  3330. A_UINT32 mu_mimo_sch_failed;
  3331. /** Number of MU MIMO PPDUs posted to HW */
  3332. A_UINT32 mu_mimo_ppdu_posted;
  3333. /*
  3334. * This is the common description for the below sch stats.
  3335. * Counts the number of transmissions of each number of MU users
  3336. * in each TX mode.
  3337. * The array index is the "number of users - 1".
  3338. * For example, ac_mu_mimo_sch_nusers[1] counts the number of 11AC MU2
  3339. * TX PPDUs, ac_mu_mimo_sch_nusers[2] counts the number of 11AC MU3
  3340. * TX PPDUs and so on.
  3341. * The same is applicable for the other TX mode stats.
  3342. */
  3343. /** Represents the count for 11AC DL MU MIMO sequences */
  3344. A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3345. /** Represents the count for 11AX DL MU MIMO sequences */
  3346. A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3347. /** Number of 11AC DL MU MIMO schedules posted per group size (0-3) */
  3348. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3349. /** Number of 11AX DL MU MIMO schedules posted per group size */
  3350. A_UINT32 ax_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  3351. /** Represents the count for 11BE DL MU MIMO sequences */
  3352. A_UINT32 be_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3353. /** Number of 11BE DL MU MIMO schedules posted per group size */
  3354. A_UINT32 be_mu_mimo_sch_posted_per_grp_sz[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  3355. /** Number of 11AC DL MU MIMO schedules posted per group size (4 - 7)*/
  3356. A_UINT32 ac_mu_mimo_sch_posted_per_grp_sz_ext[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  3357. } htt_stats_tx_pdev_dl_mu_mimo_stats_tlv;
  3358. /* preserve old name alias for new name consistent with the tag name */
  3359. typedef htt_stats_tx_pdev_dl_mu_mimo_stats_tlv
  3360. htt_tx_pdev_dl_mu_mimo_sch_stats_tlv;
  3361. typedef struct {
  3362. htt_tlv_hdr_t tlv_hdr;
  3363. /** Represents the count for 11AX DL MU OFDMA sequences */
  3364. A_UINT32 ax_mu_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3365. } htt_stats_tx_pdev_dl_mu_ofdma_stats_tlv;
  3366. /* preserve old name alias for new name consistent with the tag name */
  3367. typedef htt_stats_tx_pdev_dl_mu_ofdma_stats_tlv
  3368. htt_tx_pdev_dl_mu_ofdma_sch_stats_tlv;
  3369. typedef struct {
  3370. htt_tlv_hdr_t tlv_hdr;
  3371. /** Represents the count for 11BE DL MU OFDMA sequences */
  3372. A_UINT32 be_mu_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3373. } htt_stats_tx_pdev_be_dl_mu_ofdma_stats_tlv;
  3374. /* preserve old name alias for new name consistent with the tag name */
  3375. typedef htt_stats_tx_pdev_be_dl_mu_ofdma_stats_tlv
  3376. htt_tx_pdev_be_dl_mu_ofdma_sch_stats_tlv;
  3377. typedef struct {
  3378. htt_tlv_hdr_t tlv_hdr;
  3379. /**
  3380. * Represents the count for 11AX UL MU OFDMA sequences with Basic Triggers
  3381. */
  3382. A_UINT32 ax_ul_mu_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3383. /**
  3384. * Represents the count for 11AX UL MU OFDMA sequences with BSRP Triggers
  3385. */
  3386. A_UINT32 ax_ul_mu_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3387. /**
  3388. * Represents the count for 11AX UL MU OFDMA sequences with BAR Triggers
  3389. */
  3390. A_UINT32 ax_ul_mu_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3391. /**
  3392. * Represents the count for 11AX UL MU OFDMA sequences with BRP Triggers
  3393. */
  3394. A_UINT32 ax_ul_mu_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3395. } htt_stats_tx_pdev_ul_mu_ofdma_stats_tlv;
  3396. /* preserve old name alias for new name consistent with the tag name */
  3397. typedef htt_stats_tx_pdev_ul_mu_ofdma_stats_tlv
  3398. htt_tx_pdev_ul_mu_ofdma_sch_stats_tlv;
  3399. typedef struct {
  3400. htt_tlv_hdr_t tlv_hdr;
  3401. /**
  3402. * Represents the count for 11BE UL MU OFDMA sequences with Basic Triggers
  3403. */
  3404. A_UINT32 be_ul_mu_ofdma_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3405. /**
  3406. * Represents the count for 11BE UL MU OFDMA sequences with BSRP Triggers
  3407. */
  3408. A_UINT32 be_ul_mu_ofdma_bsr_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3409. /**
  3410. * Represents the count for 11BE UL MU OFDMA sequences with BAR Triggers
  3411. */
  3412. A_UINT32 be_ul_mu_ofdma_bar_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3413. /**
  3414. * Represents the count for 11BE UL MU OFDMA sequences with BRP Triggers
  3415. */
  3416. A_UINT32 be_ul_mu_ofdma_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  3417. } htt_stats_tx_pdev_be_ul_mu_ofdma_stats_tlv;
  3418. /* preserve old name alias for new name consistent with the tag name */
  3419. typedef htt_stats_tx_pdev_be_ul_mu_ofdma_stats_tlv
  3420. htt_tx_pdev_be_ul_mu_ofdma_sch_stats_tlv;
  3421. typedef struct {
  3422. htt_tlv_hdr_t tlv_hdr;
  3423. /**
  3424. * Represents the count for 11AX UL MU MIMO sequences with Basic Triggers
  3425. */
  3426. A_UINT32 ax_ul_mu_mimo_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3427. /**
  3428. * Represents the count for 11AX UL MU MIMO sequences with BRP Triggers
  3429. */
  3430. A_UINT32 ax_ul_mu_mimo_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3431. } htt_stats_tx_pdev_ul_mu_mimo_stats_tlv;
  3432. /* preserve old name alias for new name consistent with the tag name */
  3433. typedef htt_stats_tx_pdev_ul_mu_mimo_stats_tlv
  3434. htt_tx_pdev_ul_mu_mimo_sch_stats_tlv;
  3435. typedef struct {
  3436. htt_tlv_hdr_t tlv_hdr;
  3437. /**
  3438. * Represents the count for 11BE UL MU MIMO sequences with Basic Triggers
  3439. */
  3440. A_UINT32 be_ul_mu_mimo_basic_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3441. /**
  3442. * Represents the count for 11BE UL MU MIMO sequences with BRP Triggers
  3443. */
  3444. A_UINT32 be_ul_mu_mimo_brp_sch_nusers[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS];
  3445. } htt_stats_tx_pdev_be_ul_mu_mimo_stats_tlv;
  3446. /* preserve old name alias for new name consistent with the tag name */
  3447. typedef htt_stats_tx_pdev_be_ul_mu_mimo_stats_tlv
  3448. htt_tx_pdev_be_ul_mu_mimo_sch_stats_tlv;
  3449. typedef struct {
  3450. htt_tlv_hdr_t tlv_hdr;
  3451. /** 11AC DL MU MIMO number of mpdus queued to HW, per user */
  3452. A_UINT32 mu_mimo_mpdus_queued_usr;
  3453. /** 11AC DL MU MIMO number of mpdus tried over the air, per user */
  3454. A_UINT32 mu_mimo_mpdus_tried_usr;
  3455. /** 11AC DL MU MIMO number of mpdus failed acknowledgement, per user */
  3456. A_UINT32 mu_mimo_mpdus_failed_usr;
  3457. /** 11AC DL MU MIMO number of mpdus re-queued to HW, per user */
  3458. A_UINT32 mu_mimo_mpdus_requeued_usr;
  3459. /** 11AC DL MU MIMO BA not received, per user */
  3460. A_UINT32 mu_mimo_err_no_ba_usr;
  3461. /** 11AC DL MU MIMO mpdu underrun encountered, per user */
  3462. A_UINT32 mu_mimo_mpdu_underrun_usr;
  3463. /** 11AC DL MU MIMO ampdu underrun encountered, per user */
  3464. A_UINT32 mu_mimo_ampdu_underrun_usr;
  3465. /** 11AX MU MIMO number of mpdus queued to HW, per user */
  3466. A_UINT32 ax_mu_mimo_mpdus_queued_usr;
  3467. /** 11AX MU MIMO number of mpdus tried over the air, per user */
  3468. A_UINT32 ax_mu_mimo_mpdus_tried_usr;
  3469. /** 11AX DL MU MIMO number of mpdus failed acknowledgement, per user */
  3470. A_UINT32 ax_mu_mimo_mpdus_failed_usr;
  3471. /** 11AX DL MU MIMO number of mpdus re-queued to HW, per user */
  3472. A_UINT32 ax_mu_mimo_mpdus_requeued_usr;
  3473. /** 11AX DL MU MIMO BA not received, per user */
  3474. A_UINT32 ax_mu_mimo_err_no_ba_usr;
  3475. /** 11AX DL MU MIMO mpdu underrun encountered, per user */
  3476. A_UINT32 ax_mu_mimo_mpdu_underrun_usr;
  3477. /** 11AX DL MU MIMO ampdu underrun encountered, per user */
  3478. A_UINT32 ax_mu_mimo_ampdu_underrun_usr;
  3479. /** 11AX MU OFDMA number of mpdus queued to HW, per user */
  3480. A_UINT32 ax_ofdma_mpdus_queued_usr;
  3481. /** 11AX MU OFDMA number of mpdus tried over the air, per user */
  3482. A_UINT32 ax_ofdma_mpdus_tried_usr;
  3483. /** 11AX MU OFDMA number of mpdus failed acknowledgement, per user */
  3484. A_UINT32 ax_ofdma_mpdus_failed_usr;
  3485. /** 11AX MU OFDMA number of mpdus re-queued to HW, per user */
  3486. A_UINT32 ax_ofdma_mpdus_requeued_usr;
  3487. /** 11AX MU OFDMA BA not received, per user */
  3488. A_UINT32 ax_ofdma_err_no_ba_usr;
  3489. /** 11AX MU OFDMA mpdu underrun encountered, per user */
  3490. A_UINT32 ax_ofdma_mpdu_underrun_usr;
  3491. /** 11AX MU OFDMA ampdu underrun encountered, per user */
  3492. A_UINT32 ax_ofdma_ampdu_underrun_usr;
  3493. } htt_stats_tx_pdev_mumimo_mpdu_stats_tlv;
  3494. /* preserve old name alias for new name consistent with the tag name */
  3495. typedef htt_stats_tx_pdev_mumimo_mpdu_stats_tlv
  3496. htt_tx_pdev_mu_mimo_mpdu_stats_tlv;
  3497. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AC 1 /* SCHED_TX_MODE_MU_MIMO_AC */
  3498. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AX 2 /* SCHED_TX_MODE_MU_MIMO_AX */
  3499. #define HTT_STATS_TX_SCHED_MODE_MU_OFDMA_AX 3 /* SCHED_TX_MODE_MU_OFDMA_AX */
  3500. #define HTT_STATS_TX_SCHED_MODE_MU_OFDMA_BE 4 /* SCHED_TX_MODE_MU_OFDMA_BE */
  3501. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_BE 5 /* SCHED_TX_MODE_MU_MIMO_BE */
  3502. typedef struct {
  3503. htt_tlv_hdr_t tlv_hdr;
  3504. /* mpdu level stats */
  3505. A_UINT32 mpdus_queued_usr;
  3506. A_UINT32 mpdus_tried_usr;
  3507. A_UINT32 mpdus_failed_usr;
  3508. A_UINT32 mpdus_requeued_usr;
  3509. A_UINT32 err_no_ba_usr;
  3510. A_UINT32 mpdu_underrun_usr;
  3511. A_UINT32 ampdu_underrun_usr;
  3512. A_UINT32 user_index;
  3513. /** HTT_STATS_TX_SCHED_MODE_xxx */
  3514. A_UINT32 tx_sched_mode;
  3515. } htt_stats_tx_pdev_mpdu_stats_tlv;
  3516. /* preserve old name alias for new name consistent with the tag name */
  3517. typedef htt_stats_tx_pdev_mpdu_stats_tlv htt_tx_pdev_mpdu_stats_tlv;
  3518. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_MU
  3519. * TLV_TAGS:
  3520. * - HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG (multiple)
  3521. * - HTT_STATS_TX_PDEV_MPDU_STATS_TAG (multiple)
  3522. */
  3523. /* NOTE:
  3524. * This structure is for documentation, and cannot be safely used directly.
  3525. * Instead, use the constituent TLV structures to fill/parse.
  3526. */
  3527. typedef struct {
  3528. htt_stats_tx_pdev_mu_mimo_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  3529. htt_stats_tx_pdev_dl_mu_mimo_stats_tlv dl_mu_mimo_sch_stats_tlv[1];
  3530. htt_stats_tx_pdev_ul_mu_mimo_stats_tlv ul_mu_mimo_sch_stats_tlv[1];
  3531. htt_stats_tx_pdev_dl_mu_ofdma_stats_tlv dl_mu_ofdma_sch_stats_tlv[1];
  3532. htt_stats_tx_pdev_ul_mu_ofdma_stats_tlv ul_mu_ofdma_sch_stats_tlv[1];
  3533. /*
  3534. * Note that though mu_mimo_mpdu_stats_tlv is named MU-MIMO,
  3535. * it can also hold MU-OFDMA stats.
  3536. */
  3537. htt_stats_tx_pdev_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_MAX_NUM_USERS */
  3538. htt_stats_tx_pdev_mumimo_grp_stats_tlv mumimo_grp_stats_tlv;
  3539. } htt_tx_pdev_mu_mimo_stats_t;
  3540. /* == TX SCHED STATS == */
  3541. #define HTT_SCHED_TXQ_CMD_POSTED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3542. /* NOTE: Variable length TLV, use length spec to infer array size */
  3543. typedef struct {
  3544. htt_tlv_hdr_t tlv_hdr;
  3545. /** Scheduler command posted per tx_mode */
  3546. A_UINT32 sched_cmd_posted[1/* length = num tx modes */];
  3547. } htt_stats_sched_txq_cmd_posted_tlv;
  3548. /* preserve old name alias for new name consistent with the tag name */
  3549. typedef htt_stats_sched_txq_cmd_posted_tlv htt_sched_txq_cmd_posted_tlv_v;
  3550. #define HTT_SCHED_TXQ_CMD_REAPED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3551. /* NOTE: Variable length TLV, use length spec to infer array size */
  3552. typedef struct {
  3553. htt_tlv_hdr_t tlv_hdr;
  3554. /** Scheduler command reaped per tx_mode */
  3555. A_UINT32 sched_cmd_reaped[1/* length = num tx modes */];
  3556. } htt_stats_sched_txq_cmd_reaped_tlv;
  3557. /* preserve old name alias for new name consistent with the tag name */
  3558. typedef htt_stats_sched_txq_cmd_reaped_tlv htt_sched_txq_cmd_reaped_tlv_v;
  3559. #define HTT_SCHED_TXQ_SCHED_ORDER_SU_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3560. /* NOTE: Variable length TLV, use length spec to infer array size */
  3561. typedef struct {
  3562. htt_tlv_hdr_t tlv_hdr;
  3563. /**
  3564. * sched_order_su contains the peer IDs of peers chosen in the last
  3565. * NUM_SCHED_ORDER_LOG scheduler instances.
  3566. * The array is circular; it's unspecified which array element corresponds
  3567. * to the most recent scheduler invocation, and which corresponds to
  3568. * the (NUM_SCHED_ORDER_LOG-1) most recent scheduler invocation.
  3569. */
  3570. A_UINT32 sched_order_su[1]; /* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
  3571. } htt_stats_sched_txq_sched_order_su_tlv;
  3572. /* preserve old name alias for new name consistent with the tag name */
  3573. typedef htt_stats_sched_txq_sched_order_su_tlv htt_sched_txq_sched_order_su_tlv_v;
  3574. typedef struct {
  3575. htt_tlv_hdr_t tlv_hdr;
  3576. A_UINT32 htt_stats_type;
  3577. } htt_stats_error_tlv_v;
  3578. typedef enum {
  3579. HTT_SCHED_TID_SKIP_SCHED_MASK_DISABLED = 0, /* Skip the tid when WAL_TID_DISABLE_TX_SCHED_MASK is true */
  3580. HTT_SCHED_TID_SKIP_NOTIFY_MPDU, /* Skip the tid's 2nd sched_cmd when 1st cmd is ongoing */
  3581. HTT_SCHED_TID_SKIP_MPDU_STATE_INVALID, /* Skip the tid when MPDU state is invalid */
  3582. HTT_SCHED_TID_SKIP_SCHED_DISABLED, /* Skip the tid when scheduling is disabled for that tid */
  3583. HTT_SCHED_TID_SKIP_TQM_BYPASS_CMD_PENDING, /* Skip the TQM bypass tid when it has pending sched_cmd */
  3584. HTT_SCHED_TID_SKIP_SECOND_SU_SCHEDULE, /* Skip tid from 2nd SU schedule when any of the following flag is set
  3585. WAL_TX_TID(SEND_BAR | TQM_MPDU_STATE_VALID | SEND_QOS_NULL | TQM_NOTIFY_MPDU | SENDN_PENDING) */
  3586. HTT_SCHED_TID_SKIP_CMD_SLOT_NOT_AVAIL, /* Skip the tid when command slot is not available */
  3587. HTT_SCHED_TID_SKIP_NO_DATA, /* Skip tid without data */
  3588. HTT_SCHED_TID_SKIP_NO_ENQ = HTT_SCHED_TID_SKIP_NO_DATA, /* deprecated old name */
  3589. HTT_SCHED_TID_SKIP_LOW_ENQ, /* Skip the tid when enqueue is low */
  3590. HTT_SCHED_TID_SKIP_PAUSED, /* Skipping the paused tid(sendn-frames) */
  3591. HTT_SCHED_TID_SKIP_UL_RESP, /* skip UL response tid */
  3592. HTT_SCHED_TID_SKIP_UL = HTT_SCHED_TID_SKIP_UL_RESP, /* deprecated old name */
  3593. HTT_SCHED_TID_REMOVE_PAUSED, /* Removing the paused tid when number of sendn frames is zero */
  3594. HTT_SCHED_TID_REMOVE_NO_ENQ, /* Remove tid with zero queue depth */
  3595. HTT_SCHED_TID_REMOVE_UL_RESP, /* Remove tid UL response */
  3596. HTT_SCHED_TID_REMOVE_UL = HTT_SCHED_TID_REMOVE_UL_RESP, /* deprecated old name */
  3597. HTT_SCHED_TID_QUERY, /* Moving to next user and adding tid in prepend list when qstats update is pending */
  3598. HTT_SCHED_TID_SU_ONLY, /* Tid is eligible and TX_SCHED_SU_ONLY is true */
  3599. HTT_SCHED_TID_ELIGIBLE, /* Tid is eligible for scheduling */
  3600. HTT_SCHED_TID_SKIP_EXCEPT_EAPOL, /* skip tid except eapol */
  3601. HTT_SCHED_TID_SU_LOW_PRI_ONLY, /* su low priority tid only */
  3602. HTT_SCHED_TID_SKIP_SOUND_IN_PROGRESS, /* skip tid sound in progress */
  3603. HTT_SCHED_TID_SKIP_NO_UL_DATA, /* skip ul tid when no ul data */
  3604. HTT_SCHED_TID_REMOVE_UL_NOT_CAPABLE, /* Remove tid that are not UL capable */
  3605. HTT_SCHED_TID_UL_ELIGIBLE, /* Tid is eligible for UL scheduling */
  3606. HTT_SCHED_TID_FALLBACK_TO_PREV_DECISION, /* Fall back to previous decision */
  3607. HTT_SCHED_TID_SKIP_PEER_ALREADY_IN_TXQ, /* skip tid, peer is already available in the txq */
  3608. HTT_SCHED_TID_SKIP_DELAY_UL_SCHED, /* skip tid delay UL schedule */
  3609. HTT_SCHED_TID_SKIP_PWR_SAVE_STATE_OFF, /* Limit UL scheduling to primary link if not in power save state */
  3610. HTT_SCHED_TID_SKIP_TWT_SUSPEND, /* Skip UL trigger for certain cases ex TWT suspend */
  3611. HTT_SCHED_TID_SKIP_DISABLE_160MHZ_OFDMA, /* Skip ul tid if peer supports 160MHZ */
  3612. HTT_SCHED_TID_SKIP_ULMU_DISABLE_FROM_OMI, /* Skip ul tid if sta send omi to indicate to disable UL mu data */
  3613. HTT_SCHED_TID_SKIP_UL_MAX_SCHED_CMD_EXCEEDED,/* skip ul tid if max sched cmd is exceeded */
  3614. HTT_SCHED_TID_SKIP_UL_SMALL_QDEPTH, /* Skip ul tid for small qdepth */
  3615. HTT_SCHED_TID_SKIP_UL_TWT_PAUSED, /* Skip ul tid if twt txq is paused */
  3616. HTT_SCHED_TID_SKIP_PEER_UL_RX_NOT_ACTIVE, /* Skip ul tid if peer ul rx is not active */
  3617. HTT_SCHED_TID_SKIP_NO_FORCE_TRIGGER, /* Skip ul tid if there is no force triggers */
  3618. HTT_SCHED_TID_SKIP_SMART_BASIC_TRIGGER, /* Skip ul tid if smart basic trigger doesn't have enough data */
  3619. HTT_SCHED_INELIGIBILITY_MAX,
  3620. } htt_sched_txq_sched_ineligibility_tlv_enum;
  3621. #define HTT_SCHED_TXQ_SCHED_INELIGIBILITY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3622. /* NOTE: Variable length TLV, use length spec to infer array size */
  3623. typedef struct {
  3624. htt_tlv_hdr_t tlv_hdr;
  3625. /**
  3626. * sched_ineligibility counts the number of occurrences of different
  3627. * reasons for tid ineligibility during eligibility checks per txq
  3628. * in scheduling
  3629. *
  3630. * Indexed by htt_sched_txq_sched_ineligibility_tlv_enum.
  3631. */
  3632. A_UINT32 sched_ineligibility[1];
  3633. } htt_stats_sched_txq_sched_ineligibility_tlv;
  3634. /* preserve old name alias for new name consistent with the tag name */
  3635. typedef htt_stats_sched_txq_sched_ineligibility_tlv
  3636. htt_sched_txq_sched_ineligibility_tlv_v;
  3637. typedef enum {
  3638. HTT_SCHED_SUPERCYCLE_TRIGGER_NONE = 0, /* Supercycle not triggered */
  3639. HTT_SCHED_SUPERCYCLE_TRIGGER_FORCED, /* forced supercycle trigger */
  3640. HTT_SCHED_SUPERCYCLE_TRIGGER_LESS_NUM_TIDQ_ENTRIES, /* Num tidq entries is less than max_client threshold */
  3641. HTT_SCHED_SUPERCYCLE_TRIGGER_LESS_NUM_ACTIVE_TIDS, /* Num active tids is less than max_client threshold */
  3642. HTT_SCHED_SUPERCYCLE_TRIGGER_MAX_ITR_REACHED, /* max sched iteration reached */
  3643. HTT_SCHED_SUPERCYCLE_TRIGGER_DUR_THRESHOLD_REACHED, /* duration threshold reached */
  3644. HTT_SCHED_SUPERCYCLE_TRIGGER_TWT_TRIGGER, /* TWT supercycle trigger */
  3645. HTT_SCHED_SUPERCYCLE_TRIGGER_MAX,
  3646. } htt_sched_txq_supercycle_triggers_tlv_enum;
  3647. #define HTT_SCHED_TXQ_SUPERCYCLE_TRIGGERS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3648. /* NOTE: Variable length TLV, use length spec to infer array size */
  3649. typedef struct {
  3650. htt_tlv_hdr_t tlv_hdr;
  3651. /**
  3652. * supercycle_triggers[] is a histogram that counts the number of
  3653. * occurrences of each different reason for a transmit scheduler
  3654. * supercycle to be triggered.
  3655. * The htt_sched_txq_supercycle_triggers_tlv_enum is used to index
  3656. * supercycle_triggers[], e.g. supercycle_triggers[1] holds the number
  3657. * of times a supercycle has been forced.
  3658. * These supercycle trigger counts are not automatically reset, but
  3659. * are reset upon request.
  3660. */
  3661. A_UINT32 supercycle_triggers[1/*HTT_SCHED_SUPERCYCLE_TRIGGER_MAX*/];
  3662. } htt_stats_sched_txq_supercycle_trigger_tlv;
  3663. /* preserve old name alias for new name consistent with the tag name */
  3664. typedef htt_stats_sched_txq_supercycle_trigger_tlv
  3665. htt_sched_txq_supercycle_triggers_tlv_v;
  3666. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M 0x000000ff
  3667. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S 0
  3668. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M 0x0000ff00
  3669. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S 8
  3670. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_GET(_var) \
  3671. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M) >> \
  3672. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)
  3673. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_SET(_var, _val) \
  3674. do { \
  3675. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID, _val); \
  3676. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)); \
  3677. } while (0)
  3678. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_GET(_var) \
  3679. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M) >> \
  3680. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)
  3681. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_SET(_var, _val) \
  3682. do { \
  3683. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID, _val); \
  3684. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)); \
  3685. } while (0)
  3686. typedef struct {
  3687. htt_tlv_hdr_t tlv_hdr;
  3688. /**
  3689. * BIT [ 7 : 0] :- mac_id
  3690. * BIT [15 : 8] :- txq_id
  3691. * BIT [31 : 16] :- reserved
  3692. */
  3693. A_UINT32 mac_id__txq_id__word;
  3694. /** Scheduler policy ised for this TxQ */
  3695. A_UINT32 sched_policy;
  3696. /** Timestamp of last scheduler command posted */
  3697. A_UINT32 last_sched_cmd_posted_timestamp;
  3698. /** Timestamp of last scheduler command completed */
  3699. A_UINT32 last_sched_cmd_compl_timestamp;
  3700. /** Num of Sched2TAC ring hit Low Water Mark condition */
  3701. A_UINT32 sched_2_tac_lwm_count;
  3702. /** Num of Sched2TAC ring full condition */
  3703. A_UINT32 sched_2_tac_ring_full;
  3704. /**
  3705. * Num of scheduler command post failures that includes SU/MU-MIMO/MU-OFDMA
  3706. * sequence type
  3707. */
  3708. A_UINT32 sched_cmd_post_failure;
  3709. /** Num of active tids for this TxQ at current instance */
  3710. A_UINT32 num_active_tids;
  3711. /** Num of powersave schedules */
  3712. A_UINT32 num_ps_schedules;
  3713. /** Num of scheduler commands pending for this TxQ */
  3714. A_UINT32 sched_cmds_pending;
  3715. /** Num of tidq registration for this TxQ */
  3716. A_UINT32 num_tid_register;
  3717. /** Num of tidq de-registration for this TxQ */
  3718. A_UINT32 num_tid_unregister;
  3719. /** Num of iterations msduq stats was updated */
  3720. A_UINT32 num_qstats_queried;
  3721. /** qstats query update status */
  3722. A_UINT32 qstats_update_pending;
  3723. /** Timestamp of Last query stats made */
  3724. A_UINT32 last_qstats_query_timestamp;
  3725. /** Num of sched2tqm command queue full condition */
  3726. A_UINT32 num_tqm_cmdq_full;
  3727. /** Num of scheduler trigger from DE Module */
  3728. A_UINT32 num_de_sched_algo_trigger;
  3729. /** Num of scheduler trigger from RT Module */
  3730. A_UINT32 num_rt_sched_algo_trigger;
  3731. /** Num of scheduler trigger from TQM Module */
  3732. A_UINT32 num_tqm_sched_algo_trigger;
  3733. /** Num of schedules for notify frame */
  3734. A_UINT32 notify_sched;
  3735. /** Duration based sendn termination */
  3736. A_UINT32 dur_based_sendn_term;
  3737. /** scheduled via NOTIFY2 */
  3738. A_UINT32 su_notify2_sched;
  3739. /** schedule if queued packets are greater than avg MSDUs in PPDU */
  3740. A_UINT32 su_optimal_queued_msdus_sched;
  3741. /** schedule due to timeout */
  3742. A_UINT32 su_delay_timeout_sched;
  3743. /** delay if txtime is less than 500us */
  3744. A_UINT32 su_min_txtime_sched_delay;
  3745. /** scheduled via no delay */
  3746. A_UINT32 su_no_delay;
  3747. /** Num of supercycles for this TxQ */
  3748. A_UINT32 num_supercycles;
  3749. /** Num of subcycles with sort for this TxQ */
  3750. A_UINT32 num_subcycles_with_sort;
  3751. /** Num of subcycles without sort for this Txq */
  3752. A_UINT32 num_subcycles_no_sort;
  3753. } htt_stats_tx_pdev_scheduler_txq_stats_tlv;
  3754. /* preserve old name alias for new name consistent with the tag name */
  3755. typedef htt_stats_tx_pdev_scheduler_txq_stats_tlv
  3756. htt_tx_pdev_stats_sched_per_txq_tlv;
  3757. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_M 0x000000ff
  3758. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_S 0
  3759. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_GET(_var) \
  3760. (((_var) & HTT_STATS_TX_SCHED_CMN_MAC_ID_M) >> \
  3761. HTT_STATS_TX_SCHED_CMN_MAC_ID_S)
  3762. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_SET(_var, _val) \
  3763. do { \
  3764. HTT_CHECK_SET_VAL(HTT_STATS_TX_SCHED_CMN_MAC_ID, _val); \
  3765. ((_var) |= ((_val) << HTT_STATS_TX_SCHED_CMN_MAC_ID_S)); \
  3766. } while (0)
  3767. typedef struct {
  3768. htt_tlv_hdr_t tlv_hdr;
  3769. /**
  3770. * BIT [ 7 : 0] :- mac_id
  3771. * BIT [31 : 8] :- reserved
  3772. */
  3773. A_UINT32 mac_id__word;
  3774. /** Current timestamp */
  3775. A_UINT32 current_timestamp;
  3776. } htt_stats_tx_sched_cmn_tlv;
  3777. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  3778. * TLV_TAGS:
  3779. * - HTT_STATS_TX_SCHED_CMN_TAG
  3780. * - HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG
  3781. * - HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG
  3782. * - HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG
  3783. * - HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG
  3784. * - HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG
  3785. * - HTT_STATS_SCHED_TXQ_SUPERCYCLE_TRIGGER_TAG
  3786. */
  3787. /* NOTE:
  3788. * This structure is for documentation, and cannot be safely used directly.
  3789. * Instead, use the constituent TLV structures to fill/parse.
  3790. */
  3791. typedef struct {
  3792. htt_stats_tx_sched_cmn_tlv cmn_tlv;
  3793. struct {
  3794. htt_stats_tx_pdev_scheduler_txq_stats_tlv txq_tlv;
  3795. htt_stats_sched_txq_cmd_posted_tlv cmd_posted_tlv;
  3796. htt_stats_sched_txq_cmd_reaped_tlv cmd_reaped_tlv;
  3797. htt_stats_sched_txq_sched_order_su_tlv sched_order_su_tlv;
  3798. htt_stats_sched_txq_sched_ineligibility_tlv sched_ineligibility_tlv;
  3799. htt_stats_sched_txq_supercycle_trigger_tlv htt_sched_txq_sched_ineligibility_tlv_esched_supercycle_trigger_tlv;
  3800. } txq[1];
  3801. } htt_stats_tx_sched_t;
  3802. /* == TQM STATS == */
  3803. #define HTT_TX_TQM_MAX_GEN_MPDU_END_REASON 17
  3804. #define HTT_TX_TQM_MAX_LIST_MPDU_END_REASON 16
  3805. #define HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS 16
  3806. #define HTT_TX_TQM_GEN_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3807. /* NOTE: Variable length TLV, use length spec to infer array size */
  3808. typedef struct {
  3809. htt_tlv_hdr_t tlv_hdr;
  3810. A_UINT32 gen_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
  3811. } htt_stats_tx_tqm_gen_mpdu_tlv;
  3812. /* preserve old name alias for new name consistent with the tag name */
  3813. typedef htt_stats_tx_tqm_gen_mpdu_tlv htt_tx_tqm_gen_mpdu_stats_tlv_v;
  3814. #define HTT_TX_TQM_LIST_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3815. /* NOTE: Variable length TLV, use length spec to infer array size */
  3816. typedef struct {
  3817. htt_tlv_hdr_t tlv_hdr;
  3818. A_UINT32 list_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
  3819. } htt_stats_tx_tqm_list_mpdu_tlv;
  3820. /* preserve old name alias for new name consistent with the tag name */
  3821. typedef htt_stats_tx_tqm_list_mpdu_tlv htt_tx_tqm_list_mpdu_stats_tlv_v;
  3822. #define HTT_TX_TQM_LIST_MPDU_CNT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3823. /* NOTE: Variable length TLV, use length spec to infer array size */
  3824. typedef struct {
  3825. htt_tlv_hdr_t tlv_hdr;
  3826. A_UINT32 list_mpdu_cnt_hist[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
  3827. } htt_stats_tx_tqm_list_mpdu_cnt_tlv;
  3828. /* preserve old name alias for new name consistent with the tag name */
  3829. typedef htt_stats_tx_tqm_list_mpdu_cnt_tlv htt_tx_tqm_list_mpdu_cnt_tlv_v;
  3830. typedef struct {
  3831. htt_tlv_hdr_t tlv_hdr;
  3832. A_UINT32 msdu_count;
  3833. A_UINT32 mpdu_count;
  3834. A_UINT32 remove_msdu;
  3835. A_UINT32 remove_mpdu;
  3836. A_UINT32 remove_msdu_ttl;
  3837. A_UINT32 send_bar;
  3838. A_UINT32 bar_sync;
  3839. A_UINT32 notify_mpdu;
  3840. A_UINT32 sync_cmd;
  3841. A_UINT32 write_cmd;
  3842. A_UINT32 hwsch_trigger;
  3843. A_UINT32 ack_tlv_proc;
  3844. A_UINT32 gen_mpdu_cmd;
  3845. A_UINT32 gen_list_cmd;
  3846. A_UINT32 remove_mpdu_cmd;
  3847. A_UINT32 remove_mpdu_tried_cmd;
  3848. A_UINT32 mpdu_queue_stats_cmd;
  3849. A_UINT32 mpdu_head_info_cmd;
  3850. A_UINT32 msdu_flow_stats_cmd;
  3851. A_UINT32 remove_msdu_cmd;
  3852. A_UINT32 remove_msdu_ttl_cmd;
  3853. A_UINT32 flush_cache_cmd;
  3854. A_UINT32 update_mpduq_cmd;
  3855. A_UINT32 enqueue;
  3856. A_UINT32 enqueue_notify;
  3857. A_UINT32 notify_mpdu_at_head;
  3858. A_UINT32 notify_mpdu_state_valid;
  3859. /*
  3860. * On receiving TQM_FLOW_NOT_EMPTY_STATUS from TQM, (on MSDUs being enqueued
  3861. * the flow is non empty), if the number of MSDUs is greater than the threshold,
  3862. * notify is incremented. UDP_THRESH counters are for UDP MSDUs, and NONUDP are
  3863. * for non-UDP MSDUs.
  3864. * MSDUQ_SWNOTIFY_UDP_THRESH1 threshold - sched_udp_notify1 is incremented
  3865. * MSDUQ_SWNOTIFY_UDP_THRESH2 threshold - sched_udp_notify2 is incremented
  3866. * MSDUQ_SWNOTIFY_NONUDP_THRESH1 threshold - sched_nonudp_notify1 is incremented
  3867. * MSDUQ_SWNOTIFY_NONUDP_THRESH2 threshold - sched_nonudp_notify2 is incremented
  3868. *
  3869. * Notify signifies that we trigger the scheduler.
  3870. */
  3871. A_UINT32 sched_udp_notify1;
  3872. A_UINT32 sched_udp_notify2;
  3873. A_UINT32 sched_nonudp_notify1;
  3874. A_UINT32 sched_nonudp_notify2;
  3875. } htt_stats_tx_tqm_pdev_tlv;
  3876. /* preserve old name alias for new name consistent with the tag name */
  3877. typedef htt_stats_tx_tqm_pdev_tlv htt_tx_tqm_pdev_stats_tlv_v;
  3878. #define HTT_TX_TQM_CMN_STATS_MAC_ID_M 0x000000ff
  3879. #define HTT_TX_TQM_CMN_STATS_MAC_ID_S 0
  3880. #define HTT_TX_TQM_CMN_STATS_MAC_ID_GET(_var) \
  3881. (((_var) & HTT_TX_TQM_CMN_STATS_MAC_ID_M) >> \
  3882. HTT_TX_TQM_CMN_STATS_MAC_ID_S)
  3883. #define HTT_TX_TQM_CMN_STATS_MAC_ID_SET(_var, _val) \
  3884. do { \
  3885. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMN_STATS_MAC_ID, _val); \
  3886. ((_var) |= ((_val) << HTT_TX_TQM_CMN_STATS_MAC_ID_S)); \
  3887. } while (0)
  3888. typedef struct {
  3889. htt_tlv_hdr_t tlv_hdr;
  3890. /**
  3891. * BIT [ 7 : 0] :- mac_id
  3892. * BIT [31 : 8] :- reserved
  3893. */
  3894. A_UINT32 mac_id__word;
  3895. A_UINT32 max_cmdq_id;
  3896. A_UINT32 list_mpdu_cnt_hist_intvl;
  3897. /* Global stats */
  3898. A_UINT32 add_msdu;
  3899. A_UINT32 q_empty;
  3900. A_UINT32 q_not_empty;
  3901. A_UINT32 drop_notification;
  3902. A_UINT32 desc_threshold;
  3903. A_UINT32 hwsch_tqm_invalid_status;
  3904. A_UINT32 missed_tqm_gen_mpdus;
  3905. A_UINT32 tqm_active_tids;
  3906. A_UINT32 tqm_inactive_tids;
  3907. A_UINT32 tqm_active_msduq_flows;
  3908. /* SAWF system delay reference timestamp updation related stats */
  3909. A_UINT32 total_msduq_timestamp_updates;
  3910. A_UINT32 total_msduq_timestamp_updates_by_get_mpdu_head_info_cmd;
  3911. A_UINT32 total_msduq_timestamp_updates_by_empty_to_nonempty_status;
  3912. A_UINT32 total_get_mpdu_head_info_cmds_by_sched_algo_la_query;
  3913. A_UINT32 total_get_mpdu_head_info_cmds_by_tac;
  3914. A_UINT32 total_gen_mpdu_cmds_by_sched_algo_la_query;
  3915. A_UINT32 high_prio_q_not_empty;
  3916. } htt_stats_tx_tqm_cmn_tlv;
  3917. /* preserve old name alias for new name consistent with the tag name */
  3918. typedef htt_stats_tx_tqm_cmn_tlv htt_tx_tqm_cmn_stats_tlv;
  3919. typedef struct {
  3920. htt_tlv_hdr_t tlv_hdr;
  3921. /* Error stats */
  3922. A_UINT32 q_empty_failure;
  3923. A_UINT32 q_not_empty_failure;
  3924. A_UINT32 add_msdu_failure;
  3925. /* TQM reset debug stats */
  3926. A_UINT32 tqm_cache_ctl_err;
  3927. A_UINT32 tqm_soft_reset;
  3928. A_UINT32 tqm_reset_total_num_in_use_link_descs;
  3929. A_UINT32 tqm_reset_worst_case_num_lost_link_descs;
  3930. A_UINT32 tqm_reset_worst_case_num_lost_host_tx_bufs_count;
  3931. A_UINT32 tqm_reset_num_in_use_link_descs_internal_tqm;
  3932. A_UINT32 tqm_reset_num_in_use_link_descs_wbm_idle_link_ring;
  3933. A_UINT32 tqm_reset_time_to_tqm_hang_delta_ms;
  3934. A_UINT32 tqm_reset_recovery_time_ms;
  3935. A_UINT32 tqm_reset_num_peers_hdl;
  3936. A_UINT32 tqm_reset_cumm_dirty_hw_mpduq_proc_cnt;
  3937. A_UINT32 tqm_reset_cumm_dirty_hw_msduq_proc;
  3938. A_UINT32 tqm_reset_flush_cache_cmd_su_cnt;
  3939. A_UINT32 tqm_reset_flush_cache_cmd_other_cnt;
  3940. A_UINT32 tqm_reset_flush_cache_cmd_trig_type;
  3941. A_UINT32 tqm_reset_flush_cache_cmd_trig_cfg;
  3942. A_UINT32 tqm_reset_flush_cache_cmd_skip_cmd_status_null;
  3943. } htt_stats_tx_tqm_error_stats_tlv;
  3944. /* preserve old name alias for new name consistent with the tag name */
  3945. typedef htt_stats_tx_tqm_error_stats_tlv htt_tx_tqm_error_stats_tlv;
  3946. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TQM
  3947. * TLV_TAGS:
  3948. * - HTT_STATS_TX_TQM_CMN_TAG
  3949. * - HTT_STATS_TX_TQM_ERROR_STATS_TAG
  3950. * - HTT_STATS_TX_TQM_GEN_MPDU_TAG
  3951. * - HTT_STATS_TX_TQM_LIST_MPDU_TAG
  3952. * - HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG
  3953. * - HTT_STATS_TX_TQM_PDEV_TAG
  3954. */
  3955. /* NOTE:
  3956. * This structure is for documentation, and cannot be safely used directly.
  3957. * Instead, use the constituent TLV structures to fill/parse.
  3958. */
  3959. typedef struct {
  3960. htt_stats_tx_tqm_cmn_tlv cmn_tlv;
  3961. htt_stats_tx_tqm_error_stats_tlv err_tlv;
  3962. htt_stats_tx_tqm_gen_mpdu_tlv gen_mpdu_stats_tlv;
  3963. htt_stats_tx_tqm_list_mpdu_tlv list_mpdu_stats_tlv;
  3964. htt_stats_tx_tqm_list_mpdu_cnt_tlv list_mpdu_cnt_tlv;
  3965. htt_stats_tx_tqm_pdev_tlv tqm_pdev_stats_tlv;
  3966. } htt_tx_tqm_pdev_stats_t;
  3967. /* == TQM CMDQ stats == */
  3968. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M 0x000000ff
  3969. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S 0
  3970. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M 0x0000ff00
  3971. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S 8
  3972. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_GET(_var) \
  3973. (((_var) & HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M) >> \
  3974. HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)
  3975. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_SET(_var, _val) \
  3976. do { \
  3977. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_MAC_ID, _val); \
  3978. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)); \
  3979. } while (0)
  3980. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_GET(_var) \
  3981. (((_var) & HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M) >> \
  3982. HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)
  3983. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_SET(_var, _val) \
  3984. do { \
  3985. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID, _val); \
  3986. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)); \
  3987. } while (0)
  3988. typedef struct {
  3989. htt_tlv_hdr_t tlv_hdr;
  3990. /*
  3991. * BIT [ 7 : 0] :- mac_id
  3992. * BIT [15 : 8] :- cmdq_id
  3993. * BIT [31 : 16] :- reserved
  3994. */
  3995. A_UINT32 mac_id__cmdq_id__word;
  3996. A_UINT32 sync_cmd;
  3997. A_UINT32 write_cmd;
  3998. A_UINT32 gen_mpdu_cmd;
  3999. A_UINT32 mpdu_queue_stats_cmd;
  4000. A_UINT32 mpdu_head_info_cmd;
  4001. A_UINT32 msdu_flow_stats_cmd;
  4002. A_UINT32 remove_mpdu_cmd;
  4003. A_UINT32 remove_msdu_cmd;
  4004. A_UINT32 flush_cache_cmd;
  4005. A_UINT32 update_mpduq_cmd;
  4006. A_UINT32 update_msduq_cmd;
  4007. } htt_stats_tx_tqm_cmdq_status_tlv;
  4008. /* preserve old name alias for new name consistent with the tag name */
  4009. typedef htt_stats_tx_tqm_cmdq_status_tlv htt_tx_tqm_cmdq_status_tlv;
  4010. /* STATS_TYPE : HTT_DBG_EXT_STATS_TQM_CMDQ
  4011. * TLV_TAGS:
  4012. * - HTT_STATS_STRING_TAG
  4013. * - HTT_STATS_TX_TQM_CMDQ_STATUS_TAG
  4014. */
  4015. /* NOTE:
  4016. * This structure is for documentation, and cannot be safely used directly.
  4017. * Instead, use the constituent TLV structures to fill/parse.
  4018. */
  4019. typedef struct {
  4020. struct {
  4021. htt_stats_string_tlv cmdq_str_tlv;
  4022. htt_stats_tx_tqm_cmdq_status_tlv status_tlv;
  4023. } q[1];
  4024. } htt_tx_tqm_cmdq_stats_t;
  4025. /* == TX-DE STATS == */
  4026. /* Structures for tx de stats */
  4027. typedef struct {
  4028. htt_tlv_hdr_t tlv_hdr;
  4029. A_UINT32 m1_packets;
  4030. A_UINT32 m2_packets;
  4031. A_UINT32 m3_packets;
  4032. A_UINT32 m4_packets;
  4033. A_UINT32 g1_packets;
  4034. A_UINT32 g2_packets;
  4035. A_UINT32 rc4_packets;
  4036. A_UINT32 eap_packets;
  4037. A_UINT32 eapol_start_packets;
  4038. A_UINT32 eapol_logoff_packets;
  4039. A_UINT32 eapol_encap_asf_packets;
  4040. } htt_stats_tx_de_eapol_packets_tlv;
  4041. /* preserve old name alias for new name consistent with the tag name */
  4042. typedef htt_stats_tx_de_eapol_packets_tlv htt_tx_de_eapol_packets_stats_tlv;
  4043. typedef struct {
  4044. htt_tlv_hdr_t tlv_hdr;
  4045. A_UINT32 ap_bss_peer_not_found;
  4046. A_UINT32 ap_bcast_mcast_no_peer;
  4047. A_UINT32 sta_delete_in_progress;
  4048. A_UINT32 ibss_no_bss_peer;
  4049. A_UINT32 invaild_vdev_type;
  4050. A_UINT32 invalid_ast_peer_entry;
  4051. A_UINT32 peer_entry_invalid;
  4052. A_UINT32 ethertype_not_ip;
  4053. A_UINT32 eapol_lookup_failed;
  4054. A_UINT32 qpeer_not_allow_data;
  4055. A_UINT32 fse_tid_override;
  4056. A_UINT32 ipv6_jumbogram_zero_length;
  4057. A_UINT32 qos_to_non_qos_in_prog;
  4058. A_UINT32 ap_bcast_mcast_eapol;
  4059. A_UINT32 unicast_on_ap_bss_peer;
  4060. A_UINT32 ap_vdev_invalid;
  4061. A_UINT32 incomplete_llc;
  4062. A_UINT32 eapol_duplicate_m3;
  4063. A_UINT32 eapol_duplicate_m4;
  4064. } htt_stats_tx_de_classify_failed_tlv;
  4065. /* preserve old name alias for new name consistent with the tag name */
  4066. typedef htt_stats_tx_de_classify_failed_tlv htt_tx_de_classify_failed_stats_tlv;
  4067. typedef struct {
  4068. htt_tlv_hdr_t tlv_hdr;
  4069. A_UINT32 arp_packets;
  4070. A_UINT32 igmp_packets;
  4071. A_UINT32 dhcp_packets;
  4072. A_UINT32 host_inspected;
  4073. A_UINT32 htt_included;
  4074. A_UINT32 htt_valid_mcs;
  4075. A_UINT32 htt_valid_nss;
  4076. A_UINT32 htt_valid_preamble_type;
  4077. A_UINT32 htt_valid_chainmask;
  4078. A_UINT32 htt_valid_guard_interval;
  4079. A_UINT32 htt_valid_retries;
  4080. A_UINT32 htt_valid_bw_info;
  4081. A_UINT32 htt_valid_power;
  4082. A_UINT32 htt_valid_key_flags;
  4083. A_UINT32 htt_valid_no_encryption;
  4084. A_UINT32 fse_entry_count;
  4085. A_UINT32 fse_priority_be;
  4086. A_UINT32 fse_priority_high;
  4087. A_UINT32 fse_priority_low;
  4088. A_UINT32 fse_traffic_ptrn_be;
  4089. A_UINT32 fse_traffic_ptrn_over_sub;
  4090. A_UINT32 fse_traffic_ptrn_bursty;
  4091. A_UINT32 fse_traffic_ptrn_interactive;
  4092. A_UINT32 fse_traffic_ptrn_periodic;
  4093. A_UINT32 fse_hwqueue_alloc;
  4094. A_UINT32 fse_hwqueue_created;
  4095. A_UINT32 fse_hwqueue_send_to_host;
  4096. A_UINT32 mcast_entry;
  4097. A_UINT32 bcast_entry;
  4098. A_UINT32 htt_update_peer_cache;
  4099. A_UINT32 htt_learning_frame;
  4100. A_UINT32 fse_invalid_peer;
  4101. /**
  4102. * mec_notify is HTT TX WBM multicast echo check notification
  4103. * from firmware to host. FW sends SA addresses to host for all
  4104. * multicast/broadcast packets received on STA side.
  4105. */
  4106. A_UINT32 mec_notify;
  4107. A_UINT32 arp_response;
  4108. A_UINT32 arp_request;
  4109. } htt_stats_tx_de_classify_stats_tlv;
  4110. /* preserve old name alias for new name consistent with the tag name */
  4111. typedef htt_stats_tx_de_classify_stats_tlv htt_tx_de_classify_stats_tlv;
  4112. typedef struct {
  4113. htt_tlv_hdr_t tlv_hdr;
  4114. A_UINT32 eok;
  4115. A_UINT32 classify_done;
  4116. A_UINT32 lookup_failed;
  4117. A_UINT32 send_host_dhcp;
  4118. A_UINT32 send_host_mcast;
  4119. A_UINT32 send_host_unknown_dest;
  4120. A_UINT32 send_host;
  4121. A_UINT32 status_invalid;
  4122. } htt_stats_tx_de_classify_status_tlv;
  4123. /* preserve old name alias for new name consistent with the tag name */
  4124. typedef htt_stats_tx_de_classify_status_tlv htt_tx_de_classify_status_stats_tlv;
  4125. typedef struct {
  4126. htt_tlv_hdr_t tlv_hdr;
  4127. A_UINT32 enqueued_pkts;
  4128. A_UINT32 to_tqm;
  4129. A_UINT32 to_tqm_bypass;
  4130. } htt_stats_tx_de_enqueue_packets_tlv;
  4131. /* preserve old name alias for new name consistent with the tag name */
  4132. typedef htt_stats_tx_de_enqueue_packets_tlv htt_tx_de_enqueue_packets_stats_tlv;
  4133. typedef struct {
  4134. htt_tlv_hdr_t tlv_hdr;
  4135. A_UINT32 discarded_pkts;
  4136. A_UINT32 local_frames;
  4137. A_UINT32 is_ext_msdu;
  4138. } htt_stats_tx_de_enqueue_discard_tlv;
  4139. /* preserve old name alias for new name consistent with the tag name */
  4140. typedef htt_stats_tx_de_enqueue_discard_tlv htt_tx_de_enqueue_discard_stats_tlv;
  4141. typedef struct {
  4142. htt_tlv_hdr_t tlv_hdr;
  4143. A_UINT32 tcl_dummy_frame;
  4144. A_UINT32 tqm_dummy_frame;
  4145. A_UINT32 tqm_notify_frame;
  4146. A_UINT32 fw2wbm_enq;
  4147. A_UINT32 tqm_bypass_frame;
  4148. } htt_stats_tx_de_compl_stats_tlv;
  4149. /* preserve old name alias for new name consistent with the tag name */
  4150. typedef htt_stats_tx_de_compl_stats_tlv htt_tx_de_compl_stats_tlv;
  4151. #define HTT_TX_DE_CMN_STATS_MAC_ID_M 0x000000ff
  4152. #define HTT_TX_DE_CMN_STATS_MAC_ID_S 0
  4153. #define HTT_TX_DE_CMN_STATS_MAC_ID_GET(_var) \
  4154. (((_var) & HTT_TX_DE_CMN_STATS_MAC_ID_M) >> \
  4155. HTT_TX_DE_CMN_STATS_MAC_ID_S)
  4156. #define HTT_TX_DE_CMN_STATS_MAC_ID_SET(_var, _val) \
  4157. do { \
  4158. HTT_CHECK_SET_VAL(HTT_TX_DE_CMN_STATS_MAC_ID, _val); \
  4159. ((_var) |= ((_val) << HTT_TX_DE_CMN_STATS_MAC_ID_S)); \
  4160. } while (0)
  4161. /*
  4162. * The htt_tx_de_fw2wbm_ring_full_hist_tlv is a histogram of time we waited
  4163. * for the fw2wbm ring buffer. we are requesting a buffer in FW2WBM release
  4164. * ring,which may fail, due to non availability of buffer. Hence we sleep for
  4165. * 200us & again request for it. This is a histogram of time we wait, with
  4166. * bin of 200ms & there are 10 bin (2 seconds max)
  4167. * They are defined by the following macros in FW
  4168. * #define ENTRIES_PER_BIN_COUNT 1000 // per bin 1000 * 200us = 200ms
  4169. * #define RING_FULL_BIN_ENTRIES (WAL_TX_DE_FW2WBM_ALLOC_TIMEOUT_COUNT /
  4170. * ENTRIES_PER_BIN_COUNT)
  4171. */
  4172. typedef struct {
  4173. htt_tlv_hdr_t tlv_hdr;
  4174. A_UINT32 fw2wbm_ring_full_hist[1];
  4175. } htt_stats_tx_de_fw2wbm_ring_full_hist_tlv;
  4176. /* preserve old name alias for new name consistent with the tag name */
  4177. typedef htt_stats_tx_de_fw2wbm_ring_full_hist_tlv
  4178. htt_tx_de_fw2wbm_ring_full_hist_tlv;
  4179. typedef struct {
  4180. htt_tlv_hdr_t tlv_hdr;
  4181. /**
  4182. * BIT [ 7 : 0] :- mac_id
  4183. * BIT [31 : 8] :- reserved
  4184. */
  4185. A_UINT32 mac_id__word;
  4186. /* Global Stats */
  4187. A_UINT32 tcl2fw_entry_count;
  4188. A_UINT32 not_to_fw;
  4189. A_UINT32 invalid_pdev_vdev_peer;
  4190. A_UINT32 tcl_res_invalid_addrx;
  4191. A_UINT32 wbm2fw_entry_count;
  4192. A_UINT32 invalid_pdev;
  4193. A_UINT32 tcl_res_addrx_timeout;
  4194. A_UINT32 invalid_vdev;
  4195. A_UINT32 invalid_tcl_exp_frame_desc;
  4196. A_UINT32 vdev_id_mismatch_cnt;
  4197. } htt_stats_tx_de_cmn_tlv;
  4198. /* preserve old name alias for new name consistent with the tag name */
  4199. typedef htt_stats_tx_de_cmn_tlv htt_tx_de_cmn_stats_tlv;
  4200. #define HTT_STATS_RX_FW_RING_SIZE_NUM_ENTRIES(dword) ((dword >> 0) & 0xffff)
  4201. #define HTT_STATS_RX_FW_RING_CURR_NUM_ENTRIES(dword) ((dword >> 16) & 0xffff)
  4202. /* Rx debug info for status rings */
  4203. typedef struct {
  4204. htt_tlv_hdr_t tlv_hdr;
  4205. /**
  4206. * BIT [15 : 0] :- max possible number of entries in respective ring
  4207. * (size of the ring in terms of entries)
  4208. * BIT [16 : 31] :- current number of entries occupied in respective ring
  4209. */
  4210. A_UINT32 entry_status_sw2rxdma;
  4211. A_UINT32 entry_status_rxdma2reo;
  4212. A_UINT32 entry_status_reo2sw1;
  4213. A_UINT32 entry_status_reo2sw4;
  4214. A_UINT32 entry_status_refillringipa;
  4215. A_UINT32 entry_status_refillringhost;
  4216. /** datarate - Moving Average of Number of Entries */
  4217. A_UINT32 datarate_refillringipa;
  4218. A_UINT32 datarate_refillringhost;
  4219. /**
  4220. * refillringhost_backpress_hist and refillringipa_backpress_hist are
  4221. * deprecated, and will be filled with 0x0 by the target.
  4222. */
  4223. A_UINT32 refillringhost_backpress_hist[3];
  4224. A_UINT32 refillringipa_backpress_hist[3];
  4225. /**
  4226. * Number of times reo2sw4(IPA_DEST_RING) ring is back-pressured
  4227. * in recent time periods
  4228. * element 0: in last 0 to 250ms
  4229. * element 1: 250ms to 500ms
  4230. * element 2: above 500ms
  4231. */
  4232. A_UINT32 reo2sw4ringipa_backpress_hist[3];
  4233. } htt_stats_rx_ring_stats_tlv;
  4234. /* preserve old name alias for new name consistent with the tag name */
  4235. typedef htt_stats_rx_ring_stats_tlv htt_rx_fw_ring_stats_tlv_v;
  4236. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_DE_INFO
  4237. * TLV_TAGS:
  4238. * - HTT_STATS_TX_DE_CMN_TAG
  4239. * - HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG
  4240. * - HTT_STATS_TX_DE_EAPOL_PACKETS_TAG
  4241. * - HTT_STATS_TX_DE_CLASSIFY_STATS_TAG
  4242. * - HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG
  4243. * - HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG
  4244. * - HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG
  4245. * - HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG
  4246. * - HTT_STATS_TX_DE_COMPL_STATS_TAG
  4247. */
  4248. /* NOTE:
  4249. * This structure is for documentation, and cannot be safely used directly.
  4250. * Instead, use the constituent TLV structures to fill/parse.
  4251. */
  4252. typedef struct {
  4253. htt_stats_tx_de_cmn_tlv cmn_tlv;
  4254. htt_stats_tx_de_fw2wbm_ring_full_hist_tlv fw2wbm_hist_tlv;
  4255. htt_stats_tx_de_eapol_packets_tlv eapol_stats_tlv;
  4256. htt_stats_tx_de_classify_stats_tlv classify_stats_tlv;
  4257. htt_stats_tx_de_classify_failed_tlv classify_failed_tlv;
  4258. htt_stats_tx_de_classify_status_tlv classify_status_rlv;
  4259. htt_stats_tx_de_enqueue_packets_tlv enqueue_packets_tlv;
  4260. htt_stats_tx_de_enqueue_discard_tlv enqueue_discard_tlv;
  4261. htt_stats_tx_de_compl_stats_tlv comp_status_tlv;
  4262. } htt_tx_de_stats_t;
  4263. /* == RING-IF STATS == */
  4264. /* DWORD num_elems__prefetch_tail_idx */
  4265. #define HTT_RING_IF_STATS_NUM_ELEMS_M 0x0000ffff
  4266. #define HTT_RING_IF_STATS_NUM_ELEMS_S 0
  4267. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M 0xffff0000
  4268. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S 16
  4269. #define HTT_RING_IF_STATS_NUM_ELEMS_GET(_var) \
  4270. (((_var) & HTT_RING_IF_STATS_NUM_ELEMS_M) >> \
  4271. HTT_RING_IF_STATS_NUM_ELEMS_S)
  4272. #define HTT_RING_IF_STATS_NUM_ELEMS_SET(_var, _val) \
  4273. do { \
  4274. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_NUM_ELEMS, _val); \
  4275. ((_var) |= ((_val) << HTT_RING_IF_STATS_NUM_ELEMS_S)); \
  4276. } while (0)
  4277. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_GET(_var) \
  4278. (((_var) & HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M) >> \
  4279. HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)
  4280. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_SET(_var, _val) \
  4281. do { \
  4282. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_PREFETCH_TAIL_IDX, _val); \
  4283. ((_var) |= ((_val) << HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)); \
  4284. } while (0)
  4285. /* DWORD head_idx__tail_idx */
  4286. #define HTT_RING_IF_STATS_HEAD_IDX_M 0x0000ffff
  4287. #define HTT_RING_IF_STATS_HEAD_IDX_S 0
  4288. #define HTT_RING_IF_STATS_TAIL_IDX_M 0xffff0000
  4289. #define HTT_RING_IF_STATS_TAIL_IDX_S 16
  4290. #define HTT_RING_IF_STATS_HEAD_IDX_GET(_var) \
  4291. (((_var) & HTT_RING_IF_STATS_HEAD_IDX_M) >> \
  4292. HTT_RING_IF_STATS_HEAD_IDX_S)
  4293. #define HTT_RING_IF_STATS_HEAD_IDX_SET(_var, _val) \
  4294. do { \
  4295. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HEAD_IDX, _val); \
  4296. ((_var) |= ((_val) << HTT_RING_IF_STATS_HEAD_IDX_S)); \
  4297. } while (0)
  4298. #define HTT_RING_IF_STATS_TAIL_IDX_GET(_var) \
  4299. (((_var) & HTT_RING_IF_STATS_TAIL_IDX_M) >> \
  4300. HTT_RING_IF_STATS_TAIL_IDX_S)
  4301. #define HTT_RING_IF_STATS_TAIL_IDX_SET(_var, _val) \
  4302. do { \
  4303. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_TAIL_IDX, _val); \
  4304. ((_var) |= ((_val) << HTT_RING_IF_STATS_TAIL_IDX_S)); \
  4305. } while (0)
  4306. /* DWORD shadow_head_idx__shadow_tail_idx */
  4307. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M 0x0000ffff
  4308. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S 0
  4309. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M 0xffff0000
  4310. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S 16
  4311. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_GET(_var) \
  4312. (((_var) & HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M) >> \
  4313. HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)
  4314. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_SET(_var, _val) \
  4315. do { \
  4316. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_HEAD_IDX, _val); \
  4317. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)); \
  4318. } while (0)
  4319. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_GET(_var) \
  4320. (((_var) & HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M) >> \
  4321. HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)
  4322. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_SET(_var, _val) \
  4323. do { \
  4324. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_TAIL_IDX, _val); \
  4325. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)); \
  4326. } while (0)
  4327. /* DWORD lwm_thresh__hwm_thresh */
  4328. #define HTT_RING_IF_STATS_LWM_THRESHOLD_M 0x0000ffff
  4329. #define HTT_RING_IF_STATS_LWM_THRESHOLD_S 0
  4330. #define HTT_RING_IF_STATS_HWM_THRESHOLD_M 0xffff0000
  4331. #define HTT_RING_IF_STATS_HWM_THRESHOLD_S 16
  4332. #define HTT_RING_IF_STATS_LWM_THRESHOLD_GET(_var) \
  4333. (((_var) & HTT_RING_IF_STATS_LWM_THRESHOLD_M) >> \
  4334. HTT_RING_IF_STATS_LWM_THRESHOLD_S)
  4335. #define HTT_RING_IF_STATS_LWM_THRESHOLD_SET(_var, _val) \
  4336. do { \
  4337. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_LWM_THRESHOLD, _val); \
  4338. ((_var) |= ((_val) << HTT_RING_IF_STATS_LWM_THRESHOLD_S)); \
  4339. } while (0)
  4340. #define HTT_RING_IF_STATS_HWM_THRESHOLD_GET(_var) \
  4341. (((_var) & HTT_RING_IF_STATS_HWM_THRESHOLD_M) >> \
  4342. HTT_RING_IF_STATS_HWM_THRESHOLD_S)
  4343. #define HTT_RING_IF_STATS_HWM_THRESHOLD_SET(_var, _val) \
  4344. do { \
  4345. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HWM_THRESHOLD, _val); \
  4346. ((_var) |= ((_val) << HTT_RING_IF_STATS_HWM_THRESHOLD_S)); \
  4347. } while (0)
  4348. #define HTT_STATS_LOW_WM_BINS 5
  4349. #define HTT_STATS_HIGH_WM_BINS 5
  4350. typedef struct {
  4351. /** DWORD aligned base memory address of the ring */
  4352. A_UINT32 base_addr;
  4353. /** size of each ring element */
  4354. A_UINT32 elem_size;
  4355. /**
  4356. * BIT [15 : 0] :- num_elems
  4357. * BIT [31 : 16] :- prefetch_tail_idx
  4358. */
  4359. A_UINT32 num_elems__prefetch_tail_idx;
  4360. /**
  4361. * BIT [15 : 0] :- head_idx
  4362. * BIT [31 : 16] :- tail_idx
  4363. */
  4364. A_UINT32 head_idx__tail_idx;
  4365. /**
  4366. * BIT [15 : 0] :- shadow_head_idx
  4367. * BIT [31 : 16] :- shadow_tail_idx
  4368. */
  4369. A_UINT32 shadow_head_idx__shadow_tail_idx;
  4370. A_UINT32 num_tail_incr;
  4371. /**
  4372. * BIT [15 : 0] :- lwm_thresh
  4373. * BIT [31 : 16] :- hwm_thresh
  4374. */
  4375. A_UINT32 lwm_thresh__hwm_thresh;
  4376. A_UINT32 overrun_hit_count;
  4377. A_UINT32 underrun_hit_count;
  4378. A_UINT32 prod_blockwait_count;
  4379. A_UINT32 cons_blockwait_count;
  4380. A_UINT32 low_wm_hit_count[HTT_STATS_LOW_WM_BINS];
  4381. A_UINT32 high_wm_hit_count[HTT_STATS_HIGH_WM_BINS];
  4382. } htt_stats_ring_if_tlv;
  4383. /* preserve old name alias for new name consistent with the tag name */
  4384. typedef htt_stats_ring_if_tlv htt_ring_if_stats_tlv;
  4385. #define HTT_RING_IF_CMN_MAC_ID_M 0x000000ff
  4386. #define HTT_RING_IF_CMN_MAC_ID_S 0
  4387. #define HTT_RING_IF_CMN_MAC_ID_GET(_var) \
  4388. (((_var) & HTT_RING_IF_CMN_MAC_ID_M) >> \
  4389. HTT_RING_IF_CMN_MAC_ID_S)
  4390. #define HTT_RING_IF_CMN_MAC_ID_SET(_var, _val) \
  4391. do { \
  4392. HTT_CHECK_SET_VAL(HTT_RING_IF_CMN_MAC_ID, _val); \
  4393. ((_var) |= ((_val) << HTT_RING_IF_CMN_MAC_ID_S)); \
  4394. } while (0)
  4395. typedef struct {
  4396. htt_tlv_hdr_t tlv_hdr;
  4397. /**
  4398. * BIT [ 7 : 0] :- mac_id
  4399. * BIT [31 : 8] :- reserved
  4400. */
  4401. A_UINT32 mac_id__word;
  4402. A_UINT32 num_records;
  4403. } htt_stats_ring_if_cmn_tlv;
  4404. /* preserve old name alias for new name consistent with the tag name */
  4405. typedef htt_stats_ring_if_cmn_tlv htt_ring_if_cmn_tlv;
  4406. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  4407. * TLV_TAGS:
  4408. * - HTT_STATS_RING_IF_CMN_TAG
  4409. * - HTT_STATS_STRING_TAG
  4410. * - HTT_STATS_RING_IF_TAG
  4411. */
  4412. /* NOTE:
  4413. * This structure is for documentation, and cannot be safely used directly.
  4414. * Instead, use the constituent TLV structures to fill/parse.
  4415. */
  4416. typedef struct {
  4417. htt_stats_ring_if_cmn_tlv cmn_tlv;
  4418. /** Variable based on the Number of records. */
  4419. struct {
  4420. htt_stats_string_tlv ring_str_tlv;
  4421. htt_stats_ring_if_tlv ring_tlv;
  4422. } r[1];
  4423. } htt_ring_if_stats_t;
  4424. /* == SFM STATS == */
  4425. #define HTT_SFM_CLIENT_USER_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  4426. /* NOTE: Variable length TLV, use length spec to infer array size */
  4427. typedef struct {
  4428. htt_tlv_hdr_t tlv_hdr;
  4429. /** Number of DWORDS used per user and per client */
  4430. A_UINT32 dwords_used_by_user_n[1];
  4431. } htt_stats_sfm_client_user_tlv;
  4432. /* preserve old name alias for new name consistent with the tag name */
  4433. typedef htt_stats_sfm_client_user_tlv htt_sfm_client_user_tlv_v;
  4434. typedef struct {
  4435. htt_tlv_hdr_t tlv_hdr;
  4436. /** Client ID */
  4437. A_UINT32 client_id;
  4438. /** Minimum number of buffers */
  4439. A_UINT32 buf_min;
  4440. /** Maximum number of buffers */
  4441. A_UINT32 buf_max;
  4442. /** Number of Busy buffers */
  4443. A_UINT32 buf_busy;
  4444. /** Number of Allocated buffers */
  4445. A_UINT32 buf_alloc;
  4446. /** Number of Available/Usable buffers */
  4447. A_UINT32 buf_avail;
  4448. /** Number of users */
  4449. A_UINT32 num_users;
  4450. } htt_stats_sfm_client_tlv;
  4451. /* preserve old name alias for new name consistent with the tag name */
  4452. typedef htt_stats_sfm_client_tlv htt_sfm_client_tlv;
  4453. #define HTT_SFM_CMN_MAC_ID_M 0x000000ff
  4454. #define HTT_SFM_CMN_MAC_ID_S 0
  4455. #define HTT_SFM_CMN_MAC_ID_GET(_var) \
  4456. (((_var) & HTT_SFM_CMN_MAC_ID_M) >> \
  4457. HTT_SFM_CMN_MAC_ID_S)
  4458. #define HTT_SFM_CMN_MAC_ID_SET(_var, _val) \
  4459. do { \
  4460. HTT_CHECK_SET_VAL(HTT_SFM_CMN_MAC_ID, _val); \
  4461. ((_var) |= ((_val) << HTT_SFM_CMN_MAC_ID_S)); \
  4462. } while (0)
  4463. typedef struct {
  4464. htt_tlv_hdr_t tlv_hdr;
  4465. /**
  4466. * BIT [ 7 : 0] :- mac_id
  4467. * BIT [31 : 8] :- reserved
  4468. */
  4469. A_UINT32 mac_id__word;
  4470. /**
  4471. * Indicates the total number of 128 byte buffers in the CMEM
  4472. * that are available for buffer sharing
  4473. */
  4474. A_UINT32 buf_total;
  4475. /**
  4476. * Indicates for certain client or all the clients there is no
  4477. * dword saved in SFM, refer to SFM_R1_MEM_EMPTY
  4478. */
  4479. A_UINT32 mem_empty;
  4480. /** DEALLOCATE_BUFFERS, refer to register SFM_R0_DEALLOCATE_BUFFERS */
  4481. A_UINT32 deallocate_bufs;
  4482. /** Number of Records */
  4483. A_UINT32 num_records;
  4484. } htt_stats_sfm_cmn_tlv;
  4485. /* preserve old name alias for new name consistent with the tag name */
  4486. typedef htt_stats_sfm_cmn_tlv htt_sfm_cmn_tlv;
  4487. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  4488. * TLV_TAGS:
  4489. * - HTT_STATS_SFM_CMN_TAG
  4490. * - HTT_STATS_STRING_TAG
  4491. * - HTT_STATS_SFM_CLIENT_TAG
  4492. * - HTT_STATS_SFM_CLIENT_USER_TAG
  4493. */
  4494. /* NOTE:
  4495. * This structure is for documentation, and cannot be safely used directly.
  4496. * Instead, use the constituent TLV structures to fill/parse.
  4497. */
  4498. typedef struct {
  4499. htt_stats_sfm_cmn_tlv cmn_tlv;
  4500. /** Variable based on the Number of records. */
  4501. struct {
  4502. htt_stats_string_tlv client_str_tlv;
  4503. htt_stats_sfm_client_tlv client_tlv;
  4504. htt_stats_sfm_client_user_tlv user_tlv;
  4505. } r[1];
  4506. } htt_sfm_stats_t;
  4507. /* == SRNG STATS == */
  4508. /* DWORD mac_id__ring_id__arena__ep */
  4509. #define HTT_SRING_STATS_MAC_ID_M 0x000000ff
  4510. #define HTT_SRING_STATS_MAC_ID_S 0
  4511. #define HTT_SRING_STATS_RING_ID_M 0x0000ff00
  4512. #define HTT_SRING_STATS_RING_ID_S 8
  4513. #define HTT_SRING_STATS_ARENA_M 0x00ff0000
  4514. #define HTT_SRING_STATS_ARENA_S 16
  4515. #define HTT_SRING_STATS_EP_TYPE_M 0x01000000
  4516. #define HTT_SRING_STATS_EP_TYPE_S 24
  4517. #define HTT_SRING_STATS_MAC_ID_GET(_var) \
  4518. (((_var) & HTT_SRING_STATS_MAC_ID_M) >> \
  4519. HTT_SRING_STATS_MAC_ID_S)
  4520. #define HTT_SRING_STATS_MAC_ID_SET(_var, _val) \
  4521. do { \
  4522. HTT_CHECK_SET_VAL(HTT_SRING_STATS_MAC_ID, _val); \
  4523. ((_var) |= ((_val) << HTT_SRING_STATS_MAC_ID_S)); \
  4524. } while (0)
  4525. #define HTT_SRING_STATS_RING_ID_GET(_var) \
  4526. (((_var) & HTT_SRING_STATS_RING_ID_M) >> \
  4527. HTT_SRING_STATS_RING_ID_S)
  4528. #define HTT_SRING_STATS_RING_ID_SET(_var, _val) \
  4529. do { \
  4530. HTT_CHECK_SET_VAL(HTT_SRING_STATS_RING_ID, _val); \
  4531. ((_var) |= ((_val) << HTT_SRING_STATS_RING_ID_S)); \
  4532. } while (0)
  4533. #define HTT_SRING_STATS_ARENA_GET(_var) \
  4534. (((_var) & HTT_SRING_STATS_ARENA_M) >> \
  4535. HTT_SRING_STATS_ARENA_S)
  4536. #define HTT_SRING_STATS_ARENA_SET(_var, _val) \
  4537. do { \
  4538. HTT_CHECK_SET_VAL(HTT_SRING_STATS_ARENA, _val); \
  4539. ((_var) |= ((_val) << HTT_SRING_STATS_ARENA_S)); \
  4540. } while (0)
  4541. #define HTT_SRING_STATS_EP_TYPE_GET(_var) \
  4542. (((_var) & HTT_SRING_STATS_EP_TYPE_M) >> \
  4543. HTT_SRING_STATS_EP_TYPE_S)
  4544. #define HTT_SRING_STATS_EP_TYPE_SET(_var, _val) \
  4545. do { \
  4546. HTT_CHECK_SET_VAL(HTT_SRING_STATS_EP_TYPE, _val); \
  4547. ((_var) |= ((_val) << HTT_SRING_STATS_EP_TYPE_S)); \
  4548. } while (0)
  4549. /* DWORD num_avail_words__num_valid_words */
  4550. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_M 0x0000ffff
  4551. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_S 0
  4552. #define HTT_SRING_STATS_NUM_VALID_WORDS_M 0xffff0000
  4553. #define HTT_SRING_STATS_NUM_VALID_WORDS_S 16
  4554. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_GET(_var) \
  4555. (((_var) & HTT_SRING_STATS_NUM_AVAIL_WORDS_M) >> \
  4556. HTT_SRING_STATS_NUM_AVAIL_WORDS_S)
  4557. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_SET(_var, _val) \
  4558. do { \
  4559. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_AVAIL_WORDS, _val); \
  4560. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_AVAIL_WORDS_S)); \
  4561. } while (0)
  4562. #define HTT_SRING_STATS_NUM_VALID_WORDS_GET(_var) \
  4563. (((_var) & HTT_SRING_STATS_NUM_VALID_WORDS_M) >> \
  4564. HTT_SRING_STATS_NUM_VALID_WORDS_S)
  4565. #define HTT_SRING_STATS_NUM_VALID_WORDS_SET(_var, _val) \
  4566. do { \
  4567. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_VALID_WORDS, _val); \
  4568. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_VALID_WORDS_S)); \
  4569. } while (0)
  4570. /* DWORD head_ptr__tail_ptr */
  4571. #define HTT_SRING_STATS_HEAD_PTR_M 0x0000ffff
  4572. #define HTT_SRING_STATS_HEAD_PTR_S 0
  4573. #define HTT_SRING_STATS_TAIL_PTR_M 0xffff0000
  4574. #define HTT_SRING_STATS_TAIL_PTR_S 16
  4575. #define HTT_SRING_STATS_HEAD_PTR_GET(_var) \
  4576. (((_var) & HTT_SRING_STATS_HEAD_PTR_M) >> \
  4577. HTT_SRING_STATS_HEAD_PTR_S)
  4578. #define HTT_SRING_STATS_HEAD_PTR_SET(_var, _val) \
  4579. do { \
  4580. HTT_CHECK_SET_VAL(HTT_SRING_STATS_HEAD_PTR, _val); \
  4581. ((_var) |= ((_val) << HTT_SRING_STATS_HEAD_PTR_S)); \
  4582. } while (0)
  4583. #define HTT_SRING_STATS_TAIL_PTR_GET(_var) \
  4584. (((_var) & HTT_SRING_STATS_TAIL_PTR_M) >> \
  4585. HTT_SRING_STATS_TAIL_PTR_S)
  4586. #define HTT_SRING_STATS_TAIL_PTR_SET(_var, _val) \
  4587. do { \
  4588. HTT_CHECK_SET_VAL(HTT_SRING_STATS_TAIL_PTR, _val); \
  4589. ((_var) |= ((_val) << HTT_SRING_STATS_TAIL_PTR_S)); \
  4590. } while (0)
  4591. /* DWORD consumer_empty__producer_full */
  4592. #define HTT_SRING_STATS_CONSUMER_EMPTY_M 0x0000ffff
  4593. #define HTT_SRING_STATS_CONSUMER_EMPTY_S 0
  4594. #define HTT_SRING_STATS_PRODUCER_FULL_M 0xffff0000
  4595. #define HTT_SRING_STATS_PRODUCER_FULL_S 16
  4596. #define HTT_SRING_STATS_CONSUMER_EMPTY_GET(_var) \
  4597. (((_var) & HTT_SRING_STATS_CONSUMER_EMPTY_M) >> \
  4598. HTT_SRING_STATS_CONSUMER_EMPTY_S)
  4599. #define HTT_SRING_STATS_CONSUMER_EMPTY_SET(_var, _val) \
  4600. do { \
  4601. HTT_CHECK_SET_VAL(HTT_SRING_STATS_CONSUMER_EMPTY, _val); \
  4602. ((_var) |= ((_val) << HTT_SRING_STATS_CONSUMER_EMPTY_S)); \
  4603. } while (0)
  4604. #define HTT_SRING_STATS_PRODUCER_FULL_GET(_var) \
  4605. (((_var) & HTT_SRING_STATS_PRODUCER_FULL_M) >> \
  4606. HTT_SRING_STATS_PRODUCER_FULL_S)
  4607. #define HTT_SRING_STATS_PRODUCER_FULL_SET(_var, _val) \
  4608. do { \
  4609. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PRODUCER_FULL, _val); \
  4610. ((_var) |= ((_val) << HTT_SRING_STATS_PRODUCER_FULL_S)); \
  4611. } while (0)
  4612. /* DWORD prefetch_count__internal_tail_ptr */
  4613. #define HTT_SRING_STATS_PREFETCH_COUNT_M 0x0000ffff
  4614. #define HTT_SRING_STATS_PREFETCH_COUNT_S 0
  4615. #define HTT_SRING_STATS_INTERNAL_TP_M 0xffff0000
  4616. #define HTT_SRING_STATS_INTERNAL_TP_S 16
  4617. #define HTT_SRING_STATS_PREFETCH_COUNT_GET(_var) \
  4618. (((_var) & HTT_SRING_STATS_PREFETCH_COUNT_M) >> \
  4619. HTT_SRING_STATS_PREFETCH_COUNT_S)
  4620. #define HTT_SRING_STATS_PREFETCH_COUNT_SET(_var, _val) \
  4621. do { \
  4622. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PREFETCH_COUNT, _val); \
  4623. ((_var) |= ((_val) << HTT_SRING_STATS_PREFETCH_COUNT_S)); \
  4624. } while (0)
  4625. #define HTT_SRING_STATS_INTERNAL_TP_GET(_var) \
  4626. (((_var) & HTT_SRING_STATS_INTERNAL_TP_M) >> \
  4627. HTT_SRING_STATS_INTERNAL_TP_S)
  4628. #define HTT_SRING_STATS_INTERNAL_TP_SET(_var, _val) \
  4629. do { \
  4630. HTT_CHECK_SET_VAL(HTT_SRING_STATS_INTERNAL_TP, _val); \
  4631. ((_var) |= ((_val) << HTT_SRING_STATS_INTERNAL_TP_S)); \
  4632. } while (0)
  4633. typedef struct {
  4634. htt_tlv_hdr_t tlv_hdr;
  4635. /**
  4636. * BIT [ 7 : 0] :- mac_id
  4637. * BIT [15 : 8] :- ring_id
  4638. * BIT [23 : 16] :- arena 0 -SRING_HRAM, 1 - SRING_HCRAM, 2 - SRING_HW2HW.
  4639. * BIT [24 : 24] :- EP 0 -consumer, 1 - producer
  4640. * BIT [31 : 25] :- reserved
  4641. */
  4642. A_UINT32 mac_id__ring_id__arena__ep;
  4643. /** DWORD aligned base memory address of the ring */
  4644. A_UINT32 base_addr_lsb;
  4645. A_UINT32 base_addr_msb;
  4646. /** size of ring */
  4647. A_UINT32 ring_size;
  4648. /** size of each ring element */
  4649. A_UINT32 elem_size;
  4650. /** Ring status
  4651. *
  4652. * BIT [15 : 0] :- num_avail_words
  4653. * BIT [31 : 16] :- num_valid_words
  4654. */
  4655. A_UINT32 num_avail_words__num_valid_words;
  4656. /** Index of head and tail
  4657. * BIT [15 : 0] :- head_ptr
  4658. * BIT [31 : 16] :- tail_ptr
  4659. */
  4660. A_UINT32 head_ptr__tail_ptr;
  4661. /** Empty or full counter of rings
  4662. * BIT [15 : 0] :- consumer_empty
  4663. * BIT [31 : 16] :- producer_full
  4664. */
  4665. A_UINT32 consumer_empty__producer_full;
  4666. /** Prefetch status of consumer ring
  4667. * BIT [15 : 0] :- prefetch_count
  4668. * BIT [31 : 16] :- internal_tail_ptr
  4669. */
  4670. A_UINT32 prefetch_count__internal_tail_ptr;
  4671. } htt_stats_sring_stats_tlv;
  4672. /* preserve old name alias for new name consistent with the tag name */
  4673. typedef htt_stats_sring_stats_tlv htt_sring_stats_tlv;
  4674. typedef struct {
  4675. htt_tlv_hdr_t tlv_hdr;
  4676. A_UINT32 num_records;
  4677. } htt_stats_sring_cmn_tlv;
  4678. /* preserve old name alias for new name consistent with the tag name */
  4679. typedef htt_stats_sring_cmn_tlv htt_sring_cmn_tlv;
  4680. /* STATS_TYPE : HTT_DBG_EXT_STATS_SRNG_INFO
  4681. * TLV_TAGS:
  4682. * - HTT_STATS_SRING_CMN_TAG
  4683. * - HTT_STATS_STRING_TAG
  4684. * - HTT_STATS_SRING_STATS_TAG
  4685. */
  4686. /* NOTE:
  4687. * This structure is for documentation, and cannot be safely used directly.
  4688. * Instead, use the constituent TLV structures to fill/parse.
  4689. */
  4690. typedef struct {
  4691. htt_stats_sring_cmn_tlv cmn_tlv;
  4692. /** Variable based on the Number of records */
  4693. struct {
  4694. htt_stats_string_tlv sring_str_tlv;
  4695. htt_stats_sring_stats_tlv sring_stats_tlv;
  4696. } r[1];
  4697. } htt_sring_stats_t;
  4698. /* == PDEV TX RATE CTRL STATS == */
  4699. #define HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  4700. #define HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  4701. #define HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
  4702. #define HTT_TX_PDEV_STATS_NUM_GI_COUNTERS 4
  4703. #define HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS 5
  4704. #define HTT_TX_PDEV_STATS_NUM_BW_COUNTERS 4
  4705. #define HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  4706. #define HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  4707. #define HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  4708. #define HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  4709. #define HTT_TX_PDEV_STATS_NUM_LTF 4
  4710. #define HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES 6
  4711. #define HTT_TX_PDEV_STATS_NUM_11BE_TRIGGER_TYPES 6
  4712. #define HTT_TX_NUM_OF_SOUNDING_STATS_WORDS \
  4713. (HTT_TX_PDEV_STATS_NUM_BW_COUNTERS * \
  4714. HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS)
  4715. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  4716. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_S 0
  4717. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  4718. (((_var) & HTT_TX_PDEV_RATE_STATS_MAC_ID_M) >> \
  4719. HTT_TX_PDEV_RATE_STATS_MAC_ID_S)
  4720. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  4721. do { \
  4722. HTT_CHECK_SET_VAL(HTT_TX_PDEV_RATE_STATS_MAC_ID, _val); \
  4723. ((_var) |= ((_val) << HTT_TX_PDEV_RATE_STATS_MAC_ID_S)); \
  4724. } while (0)
  4725. #define HTT_TX_PDEV_STATS_NUM_MCS_DROP_COUNTERS \
  4726. (HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + \
  4727. HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + \
  4728. HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS)
  4729. #define HTT_TX_PDEV_STATS_NUM_PER_COUNTERS 101
  4730. /*
  4731. * Introduce new TX counters to support 320MHz support and punctured modes
  4732. */
  4733. typedef enum {
  4734. HTT_TX_PDEV_STATS_PUNCTURED_NONE = 0,
  4735. HTT_TX_PDEV_STATS_PUNCTURED_20 = 1,
  4736. HTT_TX_PDEV_STATS_PUNCTURED_40 = 2,
  4737. HTT_TX_PDEV_STATS_PUNCTURED_80 = 3,
  4738. HTT_TX_PDEV_STATS_PUNCTURED_120 = 4,
  4739. HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
  4740. } HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;
  4741. #define HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  4742. /* 11be related updates */
  4743. #define HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS 16 /* 0...13,-2,-1 */
  4744. #define HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */
  4745. #define HTT_TX_PDEV_STATS_NUM_HE_SIG_B_MCS_COUNTERS 6
  4746. #define HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS 4
  4747. typedef enum {
  4748. HTT_TX_PDEV_STATS_AX_RU_SIZE_26,
  4749. HTT_TX_PDEV_STATS_AX_RU_SIZE_52,
  4750. HTT_TX_PDEV_STATS_AX_RU_SIZE_106,
  4751. HTT_TX_PDEV_STATS_AX_RU_SIZE_242,
  4752. HTT_TX_PDEV_STATS_AX_RU_SIZE_484,
  4753. HTT_TX_PDEV_STATS_AX_RU_SIZE_996,
  4754. HTT_TX_PDEV_STATS_AX_RU_SIZE_996x2,
  4755. HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS,
  4756. } HTT_TX_PDEV_STATS_AX_RU_SIZE;
  4757. typedef enum {
  4758. HTT_TX_PDEV_STATS_BE_RU_SIZE_26,
  4759. HTT_TX_PDEV_STATS_BE_RU_SIZE_52,
  4760. HTT_TX_PDEV_STATS_BE_RU_SIZE_52_26,
  4761. HTT_TX_PDEV_STATS_BE_RU_SIZE_106,
  4762. HTT_TX_PDEV_STATS_BE_RU_SIZE_106_26,
  4763. HTT_TX_PDEV_STATS_BE_RU_SIZE_242,
  4764. HTT_TX_PDEV_STATS_BE_RU_SIZE_484,
  4765. HTT_TX_PDEV_STATS_BE_RU_SIZE_484_242,
  4766. HTT_TX_PDEV_STATS_BE_RU_SIZE_996,
  4767. HTT_TX_PDEV_STATS_BE_RU_SIZE_996_484,
  4768. HTT_TX_PDEV_STATS_BE_RU_SIZE_996_484_242,
  4769. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x2,
  4770. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x2_484,
  4771. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x3,
  4772. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x3_484,
  4773. HTT_TX_PDEV_STATS_BE_RU_SIZE_996x4,
  4774. HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS,
  4775. } HTT_TX_PDEV_STATS_BE_RU_SIZE;
  4776. typedef struct {
  4777. htt_tlv_hdr_t tlv_hdr;
  4778. /**
  4779. * BIT [ 7 : 0] :- mac_id
  4780. * BIT [31 : 8] :- reserved
  4781. */
  4782. A_UINT32 mac_id__word;
  4783. /** Number of tx ldpc packets */
  4784. A_UINT32 tx_ldpc;
  4785. /** Number of tx rts packets */
  4786. A_UINT32 rts_cnt;
  4787. /** RSSI value of last ack packet (units = dB above noise floor) */
  4788. A_UINT32 ack_rssi;
  4789. A_UINT32 tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4790. /** tx_xx_mcs: currently unused */
  4791. A_UINT32 tx_su_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4792. A_UINT32 tx_mu_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4793. /* element 0,1, ...7 -> NSS 1,2, ...8 */
  4794. A_UINT32 tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4795. /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  4796. A_UINT32 tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4797. A_UINT32 tx_stbc[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4798. A_UINT32 tx_pream[HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  4799. /**
  4800. * Counters to track number of tx packets in each GI
  4801. * (400us, 800us, 1600us & 3200us) in each mcs (0-11)
  4802. */
  4803. A_UINT32 tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4804. /** Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  4805. A_UINT32 tx_dcm[HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS];
  4806. /** Number of CTS-acknowledged RTS packets */
  4807. A_UINT32 rts_success;
  4808. /**
  4809. * Counters for legacy 11a and 11b transmissions.
  4810. *
  4811. * The index corresponds to:
  4812. *
  4813. * CCK: 0: 1 Mbps, 1: 2 Mbps, 2: 5.5 Mbps, 3: 11 Mbps
  4814. *
  4815. * OFDM: 0: 6 Mbps, 1: 9 Mbps, 2: 12 Mbps, 3: 18 Mbps,
  4816. * 4: 24 Mbps, 5: 36 Mbps, 6: 48 Mbps, 7: 54 Mbps
  4817. */
  4818. A_UINT32 tx_legacy_cck_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  4819. A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  4820. /** 11AC VHT DL MU MIMO LDPC count */
  4821. A_UINT32 ac_mu_mimo_tx_ldpc;
  4822. /** 11AX HE DL MU MIMO LDPC count */
  4823. A_UINT32 ax_mu_mimo_tx_ldpc;
  4824. /** 11AX HE DL MU OFDMA LDPC count */
  4825. A_UINT32 ofdma_tx_ldpc;
  4826. /**
  4827. * Counters for 11ax HE LTF selection during TX.
  4828. *
  4829. * The index corresponds to:
  4830. *
  4831. * 0: unused, 1: 1x LTF, 2: 2x LTF, 3: 4x LTF
  4832. */
  4833. A_UINT32 tx_he_ltf[HTT_TX_PDEV_STATS_NUM_LTF];
  4834. /** 11AC VHT DL MU MIMO TX MCS stats */
  4835. A_UINT32 ac_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4836. /** 11AX HE DL MU MIMO TX MCS stats */
  4837. A_UINT32 ax_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4838. /** 11AX HE DL MU OFDMA TX MCS stats */
  4839. A_UINT32 ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4840. /** 11AC VHT DL MU MIMO TX NSS stats (Indicates NSS for individual users) */
  4841. A_UINT32 ac_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4842. /** 11AX HE DL MU MIMO TX NSS stats (Indicates NSS for individual users) */
  4843. A_UINT32 ax_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4844. /** 11AX HE DL MU OFDMA TX NSS stats (Indicates NSS for individual users) */
  4845. A_UINT32 ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4846. /** 11AC VHT DL MU MIMO TX BW stats */
  4847. A_UINT32 ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4848. /** 11AX HE DL MU MIMO TX BW stats */
  4849. A_UINT32 ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4850. /** 11AX HE DL MU OFDMA TX BW stats */
  4851. A_UINT32 ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4852. /** 11AC VHT DL MU MIMO TX guard interval stats */
  4853. A_UINT32 ac_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4854. /** 11AX HE DL MU MIMO TX guard interval stats */
  4855. A_UINT32 ax_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4856. /** 11AX HE DL MU OFDMA TX guard interval stats */
  4857. A_UINT32 ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  4858. A_UINT32 trigger_type_11ax[HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES];
  4859. A_UINT32 tx_11ax_su_ext;
  4860. /* Stats for MCS 12/13 */
  4861. A_UINT32 tx_mcs_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  4862. A_UINT32 tx_stbc_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  4863. A_UINT32 tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  4864. /** 11AX VHT DL MU MIMO extended TX MCS stats for MCS 12/13 */
  4865. A_UINT32 ax_mu_mimo_tx_mcs_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  4866. /** 11AX VHT DL MU OFDMA extended TX MCS stats for MCS 12/13 */
  4867. A_UINT32 ofdma_tx_mcs_ext[HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  4868. /** 11AX VHT DL MU MIMO extended TX guard interval stats for MCS 12/13 */
  4869. A_UINT32 ax_mu_mimo_tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  4870. /** 11AX VHT DL MU OFDMA extended TX guard interval stats for MCS 12/13 */
  4871. A_UINT32 ofdma_tx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  4872. /* Stats for MCS 14/15 */
  4873. A_UINT32 tx_mcs_ext_2[HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  4874. A_UINT32 tx_bw_320mhz;
  4875. A_UINT32 tx_gi_ext_2[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  4876. A_UINT32 tx_su_punctured_mode[HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  4877. A_UINT32 reduced_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4878. /** 11AC VHT DL MU MIMO TX BW stats at reduced channel config */
  4879. A_UINT32 reduced_ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4880. /** 11AX HE DL MU MIMO TX BW stats at reduced channel config */
  4881. A_UINT32 reduced_ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4882. /** 11AX HE DL MU OFDMA TX BW stats at reduced channel config */
  4883. A_UINT32 reduced_ax_mu_ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  4884. /** 11AX HE DL MU OFDMA TX RU Size stats */
  4885. A_UINT32 ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS];
  4886. /** 11AX HE DL MU OFDMA HE-SIG-B MCS stats */
  4887. A_UINT32 ofdma_he_sig_b_mcs[HTT_TX_PDEV_STATS_NUM_HE_SIG_B_MCS_COUNTERS];
  4888. /** 11AX HE SU data + embedded trigger PPDU success stats (stats for HETP ack success PPDU cnt) */
  4889. A_UINT32 ax_su_embedded_trigger_data_ppdu;
  4890. /** 11AX HE SU data + embedded trigger PPDU failure stats (stats for HETP ack failure PPDU cnt) */
  4891. A_UINT32 ax_su_embedded_trigger_data_ppdu_err;
  4892. /** sta side trigger stats */
  4893. A_UINT32 trigger_type_11be[HTT_TX_PDEV_STATS_NUM_11BE_TRIGGER_TYPES];
  4894. /** Stats for Extra EHT LTF */
  4895. A_UINT32 extra_eht_ltf;
  4896. /** Counter for Extra EHT LTFs in OFDMA sequences */
  4897. A_UINT32 extra_eht_ltf_ofdma;
  4898. } htt_stats_tx_pdev_rate_stats_tlv;
  4899. /* preserve old name alias for new name consistent with the tag name */
  4900. typedef htt_stats_tx_pdev_rate_stats_tlv htt_tx_pdev_rate_stats_tlv;
  4901. typedef struct {
  4902. /* 11be mode pdev rate stats; placed in a separate TLV to adhere to size restrictions */
  4903. htt_tlv_hdr_t tlv_hdr;
  4904. /** 11BE EHT DL MU MIMO TX MCS stats */
  4905. A_UINT32 be_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  4906. /** 11BE EHT DL MU MIMO TX NSS stats (Indicates NSS for individual users) */
  4907. A_UINT32 be_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4908. /** 11BE EHT DL MU MIMO TX BW stats */
  4909. A_UINT32 be_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  4910. /** 11BE EHT DL MU MIMO TX guard interval stats */
  4911. A_UINT32 be_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  4912. /** 11BE DL MU MIMO LDPC count */
  4913. A_UINT32 be_mu_mimo_tx_ldpc;
  4914. } htt_stats_tx_pdev_be_rate_stats_tlv;
  4915. /* preserve old name alias for new name consistent with the tag name */
  4916. typedef htt_stats_tx_pdev_be_rate_stats_tlv htt_tx_pdev_rate_stats_be_tlv;
  4917. typedef struct {
  4918. /*
  4919. * SAWF pdev rate stats;
  4920. * placed in a separate TLV to adhere to size restrictions
  4921. */
  4922. htt_tlv_hdr_t tlv_hdr;
  4923. /**
  4924. * Counter incremented when MCS is dropped due to the successive retries
  4925. * to a peer reaching the configured limit.
  4926. */
  4927. A_UINT32 rate_retry_mcs_drop_cnt;
  4928. /**
  4929. * histogram of MCS rate drop down, indexed by pre-drop MCS
  4930. */
  4931. A_UINT32 mcs_drop_rate[HTT_TX_PDEV_STATS_NUM_MCS_DROP_COUNTERS];
  4932. /**
  4933. * PPDU PER histogram - each PPDU has its PER computed,
  4934. * and the bin corresponding to that PER percentage is incremented.
  4935. */
  4936. A_UINT32 per_histogram_cnt[HTT_TX_PDEV_STATS_NUM_PER_COUNTERS];
  4937. /**
  4938. * When the service class contains delay bound rate parameters which
  4939. * indicate low latency and we enable latency-based RA params then
  4940. * the low_latency_rate_count will be incremented.
  4941. * This counts the number of peer-TIDs that have been categorized as
  4942. * low-latency.
  4943. */
  4944. A_UINT32 low_latency_rate_cnt;
  4945. /** Indicate how many times rate drop happened within SIFS burst */
  4946. A_UINT32 su_burst_rate_drop_cnt;
  4947. /** Indicates how many within SIFS burst failed to deliver any pkt */
  4948. A_UINT32 su_burst_rate_drop_fail_cnt;
  4949. } htt_stats_tx_pdev_sawf_rate_stats_tlv;
  4950. /* preserve old name alias for new name consistent with the tag name */
  4951. typedef htt_stats_tx_pdev_sawf_rate_stats_tlv htt_tx_pdev_rate_stats_sawf_tlv;
  4952. typedef struct {
  4953. htt_tlv_hdr_t tlv_hdr;
  4954. /**
  4955. * BIT [ 7 : 0] :- mac_id
  4956. * BIT [31 : 8] :- reserved
  4957. */
  4958. A_UINT32 mac_id__word;
  4959. /** 11BE EHT DL MU OFDMA LDPC count */
  4960. A_UINT32 be_ofdma_tx_ldpc;
  4961. /** 11BE EHT DL MU OFDMA TX MCS stats */
  4962. A_UINT32 be_ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  4963. /**
  4964. * 11BE EHT DL MU OFDMA TX NSS stats (Indicates NSS for individual users)
  4965. */
  4966. A_UINT32 be_ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  4967. /** 11BE EHT DL MU OFDMA TX BW stats */
  4968. A_UINT32 be_ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  4969. /** 11BE EHT DL MU OFDMA TX guard interval stats */
  4970. A_UINT32 be_ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  4971. /** 11BE EHT DL MU OFDMA TX RU Size stats */
  4972. A_UINT32 be_ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  4973. /** 11BE EHT DL MU OFDMA EHT-SIG MCS stats */
  4974. A_UINT32 be_ofdma_eht_sig_mcs[HTT_TX_PDEV_STATS_NUM_EHT_SIG_MCS_COUNTERS];
  4975. } htt_stats_tx_pdev_rate_stats_be_ofdma_tlv;
  4976. /* preserve old name alias for new name consistent with the tag name */
  4977. typedef htt_stats_tx_pdev_rate_stats_be_ofdma_tlv
  4978. htt_tx_pdev_rate_stats_be_ofdma_tlv;
  4979. typedef struct {
  4980. htt_tlv_hdr_t tlv_hdr;
  4981. /** tx_ppdu_dur_hist:
  4982. * Tx PPDU duration histogram, which holds the tx duration of PPDUs
  4983. * under histogram bins of interval 250us
  4984. */
  4985. A_UINT32 tx_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS];
  4986. A_UINT32 tx_success_time_us_low;
  4987. A_UINT32 tx_success_time_us_high;
  4988. A_UINT32 tx_fail_time_us_low;
  4989. A_UINT32 tx_fail_time_us_high;
  4990. A_UINT32 pdev_up_time_us_low;
  4991. A_UINT32 pdev_up_time_us_high;
  4992. /** tx_ofdma_ppdu_dur_hist:
  4993. * Tx OFDMA PPDU duration histogram, which holds the tx duration of
  4994. * OFDMA PPDUs under histogram bins of interval 250us
  4995. */
  4996. A_UINT32 tx_ofdma_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS];
  4997. } htt_stats_tx_pdev_ppdu_dur_tlv;
  4998. /* preserve old name alias for new name consistent with the tag name */
  4999. typedef htt_stats_tx_pdev_ppdu_dur_tlv htt_tx_pdev_ppdu_dur_stats_tlv;
  5000. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
  5001. * TLV_TAGS:
  5002. * - HTT_STATS_TX_PDEV_RATE_STATS_TAG
  5003. */
  5004. /* NOTE:
  5005. * This structure is for documentation, and cannot be safely used directly.
  5006. * Instead, use the constituent TLV structures to fill/parse.
  5007. */
  5008. typedef struct {
  5009. htt_stats_tx_pdev_rate_stats_tlv rate_tlv;
  5010. htt_stats_tx_pdev_be_rate_stats_tlv rate_be_tlv;
  5011. htt_stats_tx_pdev_sawf_rate_stats_tlv rate_sawf_tlv;
  5012. htt_stats_tx_pdev_ppdu_dur_tlv tx_ppdu_dur_tlv;
  5013. } htt_tx_pdev_rate_stats_t;
  5014. /* == PDEV RX RATE CTRL STATS == */
  5015. #define HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  5016. #define HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  5017. #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS 12 /* 0-11 */
  5018. #define HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS 2 /* 12, 13 */
  5019. #define HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS 2 /* 14, 15 */
  5020. #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT 14 /* 0-13 */
  5021. #define HTT_RX_PDEV_STATS_NUM_GI_COUNTERS 4
  5022. #define HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS 5
  5023. #define HTT_RX_PDEV_STATS_NUM_BW_COUNTERS 4
  5024. #define HTT_RX_PDEV_STATS_TOTAL_BW_COUNTERS \
  5025. (HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS + HTT_RX_PDEV_STATS_NUM_BW_COUNTERS)
  5026. #define HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS 5 /* 20, 40, 80, 160, 320Mhz */
  5027. #define HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  5028. #define HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS 8
  5029. #define HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  5030. #define HTT_RX_PDEV_MAX_OFDMA_NUM_USER 8
  5031. #define HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER 8
  5032. #define HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS 16
  5033. #define HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS 16 /* 0-13, -2, -1 */
  5034. #define HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS 5 /* 20,40,80,160,320 MHz */
  5035. /* HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS:
  5036. * RU size index 0: HTT_UL_OFDMA_V0_RU_SIZE_RU_26
  5037. * RU size index 1: HTT_UL_OFDMA_V0_RU_SIZE_RU_52
  5038. * RU size index 2: HTT_UL_OFDMA_V0_RU_SIZE_RU_106
  5039. * RU size index 3: HTT_UL_OFDMA_V0_RU_SIZE_RU_242
  5040. * RU size index 4: HTT_UL_OFDMA_V0_RU_SIZE_RU_484
  5041. * RU size index 5: HTT_UL_OFDMA_V0_RU_SIZE_RU_996
  5042. */
  5043. #define HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS 6
  5044. /* HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS:
  5045. * RU size index 0: HTT_UL_OFDMA_V0_RU_SIZE_RU_26
  5046. * RU size index 1: HTT_UL_OFDMA_V0_RU_SIZE_RU_52
  5047. * RU size index 2: HTT_UL_OFDMA_V0_RU_SIZE_RU_106
  5048. * RU size index 3: HTT_UL_OFDMA_V0_RU_SIZE_RU_242
  5049. * RU size index 4: HTT_UL_OFDMA_V0_RU_SIZE_RU_484
  5050. * RU size index 5: HTT_UL_OFDMA_V0_RU_SIZE_RU_996
  5051. * RU size index 6: HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  5052. */
  5053. #define HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS 7 /* includes 996x2 */
  5054. typedef enum {
  5055. HTT_RX_PDEV_STATS_BE_RU_SIZE_26,
  5056. HTT_RX_PDEV_STATS_BE_RU_SIZE_52,
  5057. HTT_RX_PDEV_STATS_BE_RU_SIZE_52_26,
  5058. HTT_RX_PDEV_STATS_BE_RU_SIZE_106,
  5059. HTT_RX_PDEV_STATS_BE_RU_SIZE_106_26,
  5060. HTT_RX_PDEV_STATS_BE_RU_SIZE_242,
  5061. HTT_RX_PDEV_STATS_BE_RU_SIZE_484,
  5062. HTT_RX_PDEV_STATS_BE_RU_SIZE_484_242,
  5063. HTT_RX_PDEV_STATS_BE_RU_SIZE_996,
  5064. HTT_RX_PDEV_STATS_BE_RU_SIZE_996_484,
  5065. HTT_RX_PDEV_STATS_BE_RU_SIZE_996_484_242,
  5066. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x2,
  5067. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x2_484,
  5068. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x3,
  5069. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x3_484,
  5070. HTT_RX_PDEV_STATS_BE_RU_SIZE_996x4,
  5071. HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS,
  5072. } HTT_RX_PDEV_STATS_BE_RU_SIZE;
  5073. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  5074. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_S 0
  5075. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  5076. (((_var) & HTT_RX_PDEV_RATE_STATS_MAC_ID_M) >> \
  5077. HTT_RX_PDEV_RATE_STATS_MAC_ID_S)
  5078. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  5079. do { \
  5080. HTT_CHECK_SET_VAL(HTT_RX_PDEV_RATE_STATS_MAC_ID, _val); \
  5081. ((_var) |= ((_val) << HTT_RX_PDEV_RATE_STATS_MAC_ID_S)); \
  5082. } while (0)
  5083. /* Introduce new RX counters to support 320MHZ support and punctured modes */
  5084. typedef enum {
  5085. HTT_RX_PDEV_STATS_PUNCTURED_NONE = 0,
  5086. HTT_RX_PDEV_STATS_PUNCTURED_20 = 1,
  5087. HTT_RX_PDEV_STATS_PUNCTURED_40 = 2,
  5088. HTT_RX_PDEV_STATS_PUNCTURED_80 = 3,
  5089. HTT_RX_PDEV_STATS_PUNCTURED_120 = 4,
  5090. HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS = 5
  5091. } HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_TYPE;
  5092. #define HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  5093. typedef struct {
  5094. htt_tlv_hdr_t tlv_hdr;
  5095. /**
  5096. * BIT [ 7 : 0] :- mac_id
  5097. * BIT [31 : 8] :- reserved
  5098. */
  5099. A_UINT32 mac_id__word;
  5100. A_UINT32 nsts;
  5101. /** Number of rx ldpc packets */
  5102. A_UINT32 rx_ldpc;
  5103. /** Number of rx rts packets */
  5104. A_UINT32 rts_cnt;
  5105. /** units = dB above noise floor */
  5106. A_UINT32 rssi_mgmt;
  5107. /** units = dB above noise floor */
  5108. A_UINT32 rssi_data;
  5109. /** units = dB above noise floor */
  5110. A_UINT32 rssi_comb;
  5111. A_UINT32 rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5112. /** element 0,1, ...7 -> NSS 1,2, ...8 */
  5113. A_UINT32 rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5114. A_UINT32 rx_dcm[HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS];
  5115. A_UINT32 rx_stbc[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5116. /** element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  5117. A_UINT32 rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5118. A_UINT32 rx_pream[HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  5119. /** units = dB above noise floor */
  5120. A_UINT8 rssi_chain[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5121. /** Counters to track number of rx packets in each GI in each mcs (0-11) */
  5122. A_UINT32 rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5123. /** rx Signal Strength value in dBm unit */
  5124. A_INT32 rssi_in_dbm;
  5125. A_UINT32 rx_11ax_su_ext;
  5126. A_UINT32 rx_11ac_mumimo;
  5127. A_UINT32 rx_11ax_mumimo;
  5128. A_UINT32 rx_11ax_ofdma;
  5129. A_UINT32 txbf;
  5130. A_UINT32 rx_legacy_cck_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  5131. A_UINT32 rx_legacy_ofdm_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  5132. A_UINT32 rx_active_dur_us_low;
  5133. A_UINT32 rx_active_dur_us_high;
  5134. /** number of times UL MU MIMO RX packets received */
  5135. A_UINT32 rx_11ax_ul_ofdma;
  5136. /** 11AX HE UL OFDMA RX TB PPDU MCS stats */
  5137. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5138. /** 11AX HE UL OFDMA RX TB PPDU GI stats */
  5139. A_UINT32 ul_ofdma_rx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5140. /**
  5141. * 11AX HE UL OFDMA RX TB PPDU NSS stats
  5142. * (Increments the individual user NSS in the OFDMA PPDU received)
  5143. */
  5144. A_UINT32 ul_ofdma_rx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5145. /** 11AX HE UL OFDMA RX TB PPDU BW stats */
  5146. A_UINT32 ul_ofdma_rx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  5147. /** Number of times UL OFDMA TB PPDUs received with stbc */
  5148. A_UINT32 ul_ofdma_rx_stbc;
  5149. /** Number of times UL OFDMA TB PPDUs received with ldpc */
  5150. A_UINT32 ul_ofdma_rx_ldpc;
  5151. /**
  5152. * Number of non data PPDUs received for each degree (number of users)
  5153. * in UL OFDMA
  5154. */
  5155. A_UINT32 rx_ulofdma_non_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5156. /**
  5157. * Number of data ppdus received for each degree (number of users)
  5158. * in UL OFDMA
  5159. */
  5160. A_UINT32 rx_ulofdma_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5161. /**
  5162. * Number of mpdus passed for each degree (number of users)
  5163. * in UL OFDMA TB PPDU
  5164. */
  5165. A_UINT32 rx_ulofdma_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5166. /**
  5167. * Number of mpdus failed for each degree (number of users)
  5168. * in UL OFDMA TB PPDU
  5169. */
  5170. A_UINT32 rx_ulofdma_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5171. A_UINT32 nss_count;
  5172. A_UINT32 pilot_count;
  5173. /** RxEVM stats in dB */
  5174. A_INT32 rx_pilot_evm_dB[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS];
  5175. /**
  5176. * EVM mean across pilots, computed as
  5177. * mean(10*log10(rx_pilot_evm_linear)) = mean(rx_pilot_evm_dB)
  5178. */
  5179. A_INT32 rx_pilot_evm_dB_mean[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5180. /** dBm units */
  5181. A_INT8 rx_ul_fd_rssi[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5182. /** per_chain_rssi_pkt_type:
  5183. * This field shows what type of rx frame the per-chain RSSI was computed
  5184. * on, by recording the frame type and sub-type as bit-fields within this
  5185. * field:
  5186. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  5187. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  5188. * BIT [31 : 8] :- Reserved
  5189. */
  5190. A_UINT32 per_chain_rssi_pkt_type;
  5191. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5192. A_UINT32 rx_su_ndpa;
  5193. A_UINT32 rx_11ax_su_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5194. A_UINT32 rx_mu_ndpa;
  5195. A_UINT32 rx_11ax_mu_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5196. A_UINT32 rx_br_poll;
  5197. A_UINT32 rx_11ax_dl_ofdma_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5198. A_UINT32 rx_11ax_dl_ofdma_ru[HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS];
  5199. /**
  5200. * Number of non data ppdus received for each degree (number of users)
  5201. * with UL MUMIMO
  5202. */
  5203. A_UINT32 rx_ulmumimo_non_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5204. /**
  5205. * Number of data ppdus received for each degree (number of users)
  5206. * with UL MUMIMO
  5207. */
  5208. A_UINT32 rx_ulmumimo_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5209. /**
  5210. * Number of mpdus passed for each degree (number of users)
  5211. * with UL MUMIMO TB PPDU
  5212. */
  5213. A_UINT32 rx_ulmumimo_mpdu_ok[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5214. /**
  5215. * Number of mpdus failed for each degree (number of users)
  5216. * with UL MUMIMO TB PPDU
  5217. */
  5218. A_UINT32 rx_ulmumimo_mpdu_fail[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER];
  5219. /**
  5220. * Number of non data ppdus received for each degree (number of users)
  5221. * in UL OFDMA
  5222. */
  5223. A_UINT32 rx_ulofdma_non_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5224. /**
  5225. * Number of data ppdus received for each degree (number of users)
  5226. *in UL OFDMA
  5227. */
  5228. A_UINT32 rx_ulofdma_data_nusers[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  5229. /* Stats for MCS 12/13 */
  5230. A_UINT32 rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5231. /*
  5232. * NOTE - this TLV is already large enough that it causes the HTT message
  5233. * carrying it to be nearly at the message size limit that applies to
  5234. * many targets/hosts.
  5235. * No further fields should be added to this TLV without very careful
  5236. * review to ensure the size increase is acceptable.
  5237. */
  5238. } htt_stats_rx_pdev_rate_stats_tlv;
  5239. /* preserve old name alias for new name consistent with the tag name */
  5240. typedef htt_stats_rx_pdev_rate_stats_tlv htt_rx_pdev_rate_stats_tlv;
  5241. typedef struct {
  5242. htt_tlv_hdr_t tlv_hdr;
  5243. /** Tx PPDU duration histogram **/
  5244. A_UINT32 rx_ppdu_dur_hist[HTT_PDEV_STATS_PPDU_DUR_HIST_BINS];
  5245. } htt_stats_rx_pdev_ppdu_dur_tlv;
  5246. /* preserve old name alias for new name consistent with the tag name */
  5247. typedef htt_stats_rx_pdev_ppdu_dur_tlv htt_rx_pdev_ppdu_dur_stats_tlv;
  5248. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE
  5249. * TLV_TAGS:
  5250. * - HTT_STATS_RX_PDEV_RATE_STATS_TAG
  5251. */
  5252. /* NOTE:
  5253. * This structure is for documentation, and cannot be safely used directly.
  5254. * Instead, use the constituent TLV structures to fill/parse.
  5255. */
  5256. typedef struct {
  5257. htt_stats_rx_pdev_rate_stats_tlv rate_tlv;
  5258. htt_stats_rx_pdev_ppdu_dur_tlv rx_ppdu_dur_tlv;
  5259. } htt_rx_pdev_rate_stats_t;
  5260. typedef struct {
  5261. htt_tlv_hdr_t tlv_hdr;
  5262. /** units = dB above noise floor */
  5263. A_UINT8 rssi_chain_ext[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS];
  5264. A_INT8 rx_per_chain_rssi_ext_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS];
  5265. /** rx mcast signal strength value in dBm unit */
  5266. A_INT32 rssi_mcast_in_dbm;
  5267. /** rx mgmt packet signal Strength value in dBm unit */
  5268. A_INT32 rssi_mgmt_in_dbm;
  5269. /*
  5270. * Stats for MCS 0-13 since rx_pdev_rate_stats_tlv cannot be updated,
  5271. * due to message size limitations.
  5272. */
  5273. A_UINT32 rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5274. A_UINT32 rx_stbc_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5275. A_UINT32 rx_gi_ext[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5276. A_UINT32 ul_ofdma_rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5277. A_UINT32 ul_ofdma_rx_gi_ext[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5278. A_UINT32 rx_11ax_su_txbf_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5279. A_UINT32 rx_11ax_mu_txbf_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5280. A_UINT32 rx_11ax_dl_ofdma_mcs_ext[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
  5281. /* MCS 14,15 */
  5282. A_UINT32 rx_mcs_ext_2[HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  5283. A_UINT32 rx_bw_ext[HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS];
  5284. A_UINT32 rx_gi_ext_2[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  5285. A_UINT32 rx_su_punctured_mode[HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  5286. A_UINT32 reduced_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5287. A_UINT8 rssi_chain_ext_2[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_2_COUNTERS]; /* units = dB above noise floor */
  5288. A_INT8 rx_per_chain_rssi_ext_2_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_EXT_2_COUNTERS];
  5289. } htt_stats_rx_pdev_rate_ext_stats_tlv;
  5290. /* preserve old name alias for new name consistent with the tag name */
  5291. typedef htt_stats_rx_pdev_rate_ext_stats_tlv htt_rx_pdev_rate_ext_stats_tlv;
  5292. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE_EXT
  5293. * TLV_TAGS:
  5294. * - HTT_STATS_RX_PDEV_RATE_EXT_STATS_TAG
  5295. */
  5296. /* NOTE:
  5297. * This structure is for documentation, and cannot be safely used directly.
  5298. * Instead, use the constituent TLV structures to fill/parse.
  5299. */
  5300. typedef struct {
  5301. htt_stats_rx_pdev_rate_ext_stats_tlv rate_tlv;
  5302. } htt_rx_pdev_rate_ext_stats_t;
  5303. #define HTT_STATS_CMN_MAC_ID_M 0x000000ff
  5304. #define HTT_STATS_CMN_MAC_ID_S 0
  5305. #define HTT_STATS_CMN_MAC_ID_GET(_var) \
  5306. (((_var) & HTT_STATS_CMN_MAC_ID_M) >> \
  5307. HTT_STATS_CMN_MAC_ID_S)
  5308. #define HTT_STATS_CMN_MAC_ID_SET(_var, _val) \
  5309. do { \
  5310. HTT_CHECK_SET_VAL(HTT_STATS_CMN_MAC_ID, _val); \
  5311. ((_var) |= ((_val) << HTT_STATS_CMN_MAC_ID_S)); \
  5312. } while (0)
  5313. #define HTT_RX_UL_MAX_UPLINK_RSSI_TRACK 5
  5314. typedef struct {
  5315. htt_tlv_hdr_t tlv_hdr;
  5316. /**
  5317. * BIT [ 7 : 0] :- mac_id
  5318. * BIT [31 : 8] :- reserved
  5319. */
  5320. A_UINT32 mac_id__word;
  5321. A_UINT32 rx_11ax_ul_ofdma;
  5322. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5323. A_UINT32 ul_ofdma_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5324. A_UINT32 ul_ofdma_rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5325. A_UINT32 ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5326. A_UINT32 ul_ofdma_rx_stbc;
  5327. A_UINT32 ul_ofdma_rx_ldpc;
  5328. /*
  5329. * These are arrays to hold the number of PPDUs that we received per RU.
  5330. * E.g. PPDUs (data or non data) received in RU26 will be incremented in
  5331. * array offset 0 and similarly RU52 will be incremented in array offset 1
  5332. */
  5333. A_UINT32 rx_ulofdma_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS]; /* ppdu level */
  5334. A_UINT32 rx_ulofdma_non_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_RU_SIZE_160MHZ_CNTRS]; /* ppdu level */
  5335. /*
  5336. * These arrays hold Target RSSI (rx power the AP wants),
  5337. * FD RSSI (rx power the AP sees) & Power headroom values of STAs
  5338. * which can be identified by AIDs, during trigger based RX.
  5339. * Array acts a circular buffer and holds values for last 5 STAs
  5340. * in the same order as RX.
  5341. */
  5342. /**
  5343. * STA AID array for identifying which STA the
  5344. * Target-RSSI / FD-RSSI / pwr headroom stats are for
  5345. */
  5346. A_UINT32 uplink_sta_aid[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5347. /**
  5348. * Trig Target RSSI for STA AID in same index - UNIT(dBm)
  5349. */
  5350. A_INT32 uplink_sta_target_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5351. /**
  5352. * Trig FD RSSI from STA AID in same index - UNIT(dBm)
  5353. */
  5354. A_INT32 uplink_sta_fd_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5355. /**
  5356. * Trig power headroom for STA AID in same idx - UNIT(dB)
  5357. */
  5358. A_UINT32 uplink_sta_power_headroom[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5359. A_UINT32 reduced_ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5360. /*
  5361. * Number of HE UL OFDMA per-user responses containing only a QoS null in
  5362. * response to basic trigger. Typically a data response is expected.
  5363. */
  5364. A_UINT32 ul_ofdma_basic_trigger_rx_qos_null_only;
  5365. } htt_stats_rx_pdev_ul_trig_stats_tlv;
  5366. /* preserve old name alias for new name consistent with the tag name */
  5367. typedef htt_stats_rx_pdev_ul_trig_stats_tlv htt_rx_pdev_ul_trigger_stats_tlv;
  5368. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS
  5369. * TLV_TAGS:
  5370. * - HTT_STATS_RX_PDEV_UL_TRIG_STATS_TAG
  5371. * NOTE:
  5372. * This structure is for documentation, and cannot be safely used directly.
  5373. * Instead, use the constituent TLV structures to fill/parse.
  5374. */
  5375. typedef struct {
  5376. htt_stats_rx_pdev_ul_trig_stats_tlv ul_trigger_tlv;
  5377. } htt_rx_pdev_ul_trigger_stats_t;
  5378. typedef struct {
  5379. htt_tlv_hdr_t tlv_hdr;
  5380. /**
  5381. * BIT [ 7 : 0] :- mac_id
  5382. * BIT [31 : 8] :- reserved
  5383. */
  5384. A_UINT32 mac_id__word;
  5385. A_UINT32 rx_11be_ul_ofdma;
  5386. A_UINT32 be_ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5387. A_UINT32 be_ul_ofdma_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5388. A_UINT32 be_ul_ofdma_rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  5389. A_UINT32 be_ul_ofdma_rx_bw[HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5390. A_UINT32 be_ul_ofdma_rx_stbc;
  5391. A_UINT32 be_ul_ofdma_rx_ldpc;
  5392. /*
  5393. * These are arrays to hold the number of PPDUs that we received per RU.
  5394. * E.g. PPDUs (data or non data) received in RU26 will be incremented in
  5395. * array offset 0 and similarly RU52 will be incremented in array offset 1
  5396. */
  5397. /** PPDU level */
  5398. A_UINT32 be_rx_ulofdma_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  5399. /** PPDU level */
  5400. A_UINT32 be_rx_ulofdma_non_data_ru_size_ppdu[HTT_RX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  5401. /*
  5402. * These arrays hold Target RSSI (rx power the AP wants),
  5403. * FD RSSI (rx power the AP sees) & Power headroom values of STAs
  5404. * which can be identified by AIDs, during trigger based RX.
  5405. * Array acts a circular buffer and holds values for last 5 STAs
  5406. * in the same order as RX.
  5407. */
  5408. /**
  5409. * STA AID array for identifying which STA the
  5410. * Target-RSSI / FD-RSSI / pwr headroom stats are for
  5411. */
  5412. A_UINT32 be_uplink_sta_aid[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5413. /**
  5414. * Trig Target RSSI for STA AID in same index - UNIT(dBm)
  5415. */
  5416. A_INT32 be_uplink_sta_target_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5417. /**
  5418. * Trig FD RSSI from STA AID in same index - UNIT(dBm)
  5419. */
  5420. A_INT32 be_uplink_sta_fd_rssi[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5421. /**
  5422. * Trig power headroom for STA AID in same idx - UNIT(dB)
  5423. */
  5424. A_UINT32 be_uplink_sta_power_headroom[HTT_RX_UL_MAX_UPLINK_RSSI_TRACK];
  5425. /*
  5426. * Number of EHT UL OFDMA per-user responses containing only a QoS null in
  5427. * response to basic trigger. Typically a data response is expected.
  5428. */
  5429. A_UINT32 be_ul_ofdma_basic_trigger_rx_qos_null_only;
  5430. /* UL MLO Queue Depth Sharing Stats */
  5431. A_UINT32 ul_mlo_send_qdepth_params_count;
  5432. A_UINT32 ul_mlo_proc_qdepth_params_count;
  5433. A_UINT32 ul_mlo_proc_accepted_qdepth_params_count;
  5434. A_UINT32 ul_mlo_proc_discarded_qdepth_params_count;
  5435. } htt_stats_rx_pdev_be_ul_trig_stats_tlv;
  5436. /* preserve old name alias for new name consistent with the tag name */
  5437. typedef htt_stats_rx_pdev_be_ul_trig_stats_tlv
  5438. htt_rx_pdev_be_ul_trigger_stats_tlv;
  5439. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_TRIG_STATS
  5440. * TLV_TAGS:
  5441. * - HTT_STATS_RX_PDEV_BE_UL_TRIG_STATS_TAG
  5442. * NOTE:
  5443. * This structure is for documentation, and cannot be safely used directly.
  5444. * Instead, use the constituent TLV structures to fill/parse.
  5445. */
  5446. typedef struct {
  5447. htt_stats_rx_pdev_be_ul_trig_stats_tlv ul_trigger_tlv;
  5448. } htt_rx_pdev_be_ul_trigger_stats_t;
  5449. typedef struct {
  5450. htt_tlv_hdr_t tlv_hdr;
  5451. A_UINT32 user_index;
  5452. /** PPDU level */
  5453. A_UINT32 rx_ulofdma_non_data_ppdu;
  5454. /** PPDU level */
  5455. A_UINT32 rx_ulofdma_data_ppdu;
  5456. /** MPDU level */
  5457. A_UINT32 rx_ulofdma_mpdu_ok;
  5458. /** MPDU level */
  5459. A_UINT32 rx_ulofdma_mpdu_fail;
  5460. A_UINT32 rx_ulofdma_non_data_nusers;
  5461. A_UINT32 rx_ulofdma_data_nusers;
  5462. } htt_stats_rx_pdev_ul_ofdma_user_stats_tlv;
  5463. /* preserve old name alias for new name consistent with the tag name */
  5464. typedef htt_stats_rx_pdev_ul_ofdma_user_stats_tlv
  5465. htt_rx_pdev_ul_ofdma_user_stats_tlv;
  5466. typedef struct {
  5467. htt_tlv_hdr_t tlv_hdr;
  5468. A_UINT32 user_index;
  5469. /** PPDU level */
  5470. A_UINT32 be_rx_ulofdma_non_data_ppdu;
  5471. /** PPDU level */
  5472. A_UINT32 be_rx_ulofdma_data_ppdu;
  5473. /** MPDU level */
  5474. A_UINT32 be_rx_ulofdma_mpdu_ok;
  5475. /** MPDU level */
  5476. A_UINT32 be_rx_ulofdma_mpdu_fail;
  5477. A_UINT32 be_rx_ulofdma_non_data_nusers;
  5478. A_UINT32 be_rx_ulofdma_data_nusers;
  5479. } htt_stats_rx_pdev_be_ul_ofdma_user_stats_tlv;
  5480. /* preserve old name alias for new name consistent with the tag name */
  5481. typedef htt_stats_rx_pdev_be_ul_ofdma_user_stats_tlv
  5482. htt_rx_pdev_be_ul_ofdma_user_stats_tlv;
  5483. typedef struct {
  5484. htt_tlv_hdr_t tlv_hdr;
  5485. A_UINT32 user_index;
  5486. /** PPDU level */
  5487. A_UINT32 rx_ulmumimo_non_data_ppdu;
  5488. /** PPDU level */
  5489. A_UINT32 rx_ulmumimo_data_ppdu;
  5490. /** MPDU level */
  5491. A_UINT32 rx_ulmumimo_mpdu_ok;
  5492. /** MPDU level */
  5493. A_UINT32 rx_ulmumimo_mpdu_fail;
  5494. } htt_stats_rx_pdev_ul_mimo_user_stats_tlv;
  5495. /* preserve old name alias for new name consistent with the tag name */
  5496. typedef htt_stats_rx_pdev_ul_mimo_user_stats_tlv
  5497. htt_rx_pdev_ul_mimo_user_stats_tlv;
  5498. typedef struct {
  5499. htt_tlv_hdr_t tlv_hdr;
  5500. A_UINT32 user_index;
  5501. /** PPDU level */
  5502. A_UINT32 be_rx_ulmumimo_non_data_ppdu;
  5503. /** PPDU level */
  5504. A_UINT32 be_rx_ulmumimo_data_ppdu;
  5505. /** MPDU level */
  5506. A_UINT32 be_rx_ulmumimo_mpdu_ok;
  5507. /** MPDU level */
  5508. A_UINT32 be_rx_ulmumimo_mpdu_fail;
  5509. } htt_stats_rx_pdev_be_ul_mimo_user_stats_tlv;
  5510. /* preserve old name alias for new name consistent with the tag name */
  5511. typedef htt_stats_rx_pdev_be_ul_mimo_user_stats_tlv
  5512. htt_rx_pdev_be_ul_mimo_user_stats_tlv;
  5513. /* == RX PDEV/SOC STATS == */
  5514. typedef struct {
  5515. htt_tlv_hdr_t tlv_hdr;
  5516. /**
  5517. * BIT [7:0] :- mac_id
  5518. * BIT [31:8] :- reserved
  5519. *
  5520. * Refer to HTT_STATS_CMN_MAC_ID_GET/SET macros.
  5521. */
  5522. A_UINT32 mac_id__word;
  5523. /** Number of times UL MUMIMO RX packets received */
  5524. A_UINT32 rx_11ax_ul_mumimo;
  5525. /** 11AX HE UL MU-MIMO RX TB PPDU MCS stats */
  5526. A_UINT32 ul_mumimo_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5527. /**
  5528. * 11AX HE UL MU-MIMO RX GI & LTF stats.
  5529. * Index 0 indicates 1xLTF + 1.6 msec GI
  5530. * Index 1 indicates 2xLTF + 1.6 msec GI
  5531. * Index 2 indicates 4xLTF + 3.2 msec GI
  5532. */
  5533. A_UINT32 ul_mumimo_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  5534. /**
  5535. * 11AX HE UL MU-MIMO RX TB PPDU NSS stats
  5536. * (Increments the individual user NSS in the UL MU MIMO PPDU received)
  5537. */
  5538. A_UINT32 ul_mumimo_rx_nss[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5539. /** 11AX HE UL MU-MIMO RX TB PPDU BW stats */
  5540. A_UINT32 ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5541. /** Number of times UL MUMIMO TB PPDUs received with STBC */
  5542. A_UINT32 ul_mumimo_rx_stbc;
  5543. /** Number of times UL MUMIMO TB PPDUs received with LDPC */
  5544. A_UINT32 ul_mumimo_rx_ldpc;
  5545. /* Stats for MCS 12/13 */
  5546. A_UINT32 ul_mumimo_rx_mcs_ext[HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5547. A_UINT32 ul_mumimo_rx_gi_ext[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  5548. /** RSSI in dBm for Rx TB PPDUs */
  5549. A_INT8 rx_ul_mumimo_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_TOTAL_BW_COUNTERS];
  5550. /** Target RSSI programmed in UL MUMIMO triggers (units dBm) */
  5551. A_INT8 rx_ul_mumimo_target_rssi[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5552. /** FD RSSI measured for Rx UL TB PPDUs (units dBm) */
  5553. A_INT8 rx_ul_mumimo_fd_rssi[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5554. /** Average pilot EVM measued for RX UL TB PPDU */
  5555. A_INT8 rx_ulmumimo_pilot_evm_dB_mean[HTT_TX_PDEV_STATS_NUM_UL_MUMIMO_USER_STATS][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5556. A_UINT32 reduced_ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_REDUCED_CHAN_TYPES][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  5557. /*
  5558. * Number of HE UL MU-MIMO per-user responses containing only a QoS null in
  5559. * response to basic trigger. Typically a data response is expected.
  5560. */
  5561. A_UINT32 ul_mumimo_basic_trigger_rx_qos_null_only;
  5562. } htt_stats_rx_pdev_ul_mumimo_trig_stats_tlv;
  5563. /* preserve old name alias for new name consistent with the tag name */
  5564. typedef htt_stats_rx_pdev_ul_mumimo_trig_stats_tlv
  5565. htt_rx_pdev_ul_mumimo_trig_stats_tlv;
  5566. typedef struct {
  5567. htt_tlv_hdr_t tlv_hdr;
  5568. /**
  5569. * BIT [7:0] :- mac_id
  5570. * BIT [31:8] :- reserved
  5571. *
  5572. * Refer to HTT_STATS_CMN_MAC_ID_GET/SET macros.
  5573. */
  5574. A_UINT32 mac_id__word;
  5575. /** Number of times UL MUMIMO RX packets received */
  5576. A_UINT32 rx_11be_ul_mumimo;
  5577. /** 11BE EHT UL MU-MIMO RX TB PPDU MCS stats */
  5578. A_UINT32 be_ul_mumimo_rx_mcs[HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5579. /**
  5580. * 11BE EHT UL MU-MIMO RX GI & LTF stats.
  5581. * Index 0 indicates 1xLTF + 1.6 msec GI
  5582. * Index 1 indicates 2xLTF + 1.6 msec GI
  5583. * Index 2 indicates 4xLTF + 3.2 msec GI
  5584. */
  5585. A_UINT32 be_ul_mumimo_rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_BE_MCS_COUNTERS];
  5586. /**
  5587. * 11BE EHT UL MU-MIMO RX TB PPDU NSS stats
  5588. * (Increments the individual user NSS in the UL MU MIMO PPDU received)
  5589. */
  5590. A_UINT32 be_ul_mumimo_rx_nss[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5591. /** 11BE EHT UL MU-MIMO RX TB PPDU BW stats */
  5592. A_UINT32 be_ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5593. /** Number of times UL MUMIMO TB PPDUs received with STBC */
  5594. A_UINT32 be_ul_mumimo_rx_stbc;
  5595. /** Number of times UL MUMIMO TB PPDUs received with LDPC */
  5596. A_UINT32 be_ul_mumimo_rx_ldpc;
  5597. /** RSSI in dBm for Rx TB PPDUs */
  5598. A_INT8 be_rx_ul_mumimo_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5599. /** Target RSSI programmed in UL MUMIMO triggers (units dBm) */
  5600. A_INT8 be_rx_ul_mumimo_target_rssi[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER][HTT_RX_PDEV_STATS_NUM_BE_BW_COUNTERS];
  5601. /** FD RSSI measured for Rx UL TB PPDUs (units dBm) */
  5602. A_INT8 be_rx_ul_mumimo_fd_rssi[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5603. /** Average pilot EVM measued for RX UL TB PPDU */
  5604. A_INT8 be_rx_ulmumimo_pilot_evm_dB_mean[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER][HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  5605. /** Number of times UL MUMIMO TB PPDUs received in a punctured mode */
  5606. A_UINT32 rx_ul_mumimo_punctured_mode[HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  5607. /*
  5608. * Number of EHT UL MU-MIMO per-user responses containing only a QoS null
  5609. * in response to basic trigger. Typically a data response is expected.
  5610. */
  5611. A_UINT32 be_ul_mumimo_basic_trigger_rx_qos_null_only;
  5612. } htt_stats_rx_pdev_ul_mumimo_trig_be_stats_tlv;
  5613. /* preserve old name alias for new name consistent with the tag name */
  5614. typedef htt_stats_rx_pdev_ul_mumimo_trig_be_stats_tlv
  5615. htt_rx_pdev_ul_mumimo_trig_be_stats_tlv;
  5616. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_UL_MUMIMO_TRIG_STATS
  5617. * TLV_TAGS:
  5618. * - HTT_STATS_RX_PDEV_UL_MUMIMO_TRIG_STATS_TAG
  5619. * - HTT_STATS_RX_PDEV_UL_MUMIMO_TRIG_BE_STATS_TAG
  5620. */
  5621. typedef struct {
  5622. htt_stats_rx_pdev_ul_mumimo_trig_stats_tlv ul_mumimo_trig_tlv;
  5623. htt_stats_rx_pdev_ul_mumimo_trig_be_stats_tlv ul_mumimo_trig_be_tlv;
  5624. } htt_rx_pdev_ul_mumimo_trig_stats_t;
  5625. typedef struct {
  5626. htt_tlv_hdr_t tlv_hdr;
  5627. /** Num Packets received on REO FW ring */
  5628. A_UINT32 fw_reo_ring_data_msdu;
  5629. /** Num bc/mc packets indicated from fw to host */
  5630. A_UINT32 fw_to_host_data_msdu_bcmc;
  5631. /** Num unicast packets indicated from fw to host */
  5632. A_UINT32 fw_to_host_data_msdu_uc;
  5633. /** Num remote buf recycle from offload */
  5634. A_UINT32 ofld_remote_data_buf_recycle_cnt;
  5635. /** Num remote free buf given to offload */
  5636. A_UINT32 ofld_remote_free_buf_indication_cnt;
  5637. /** Num unicast packets from local path indicated to host */
  5638. A_UINT32 ofld_buf_to_host_data_msdu_uc;
  5639. /** Num unicast packets from REO indicated to host */
  5640. A_UINT32 reo_fw_ring_to_host_data_msdu_uc;
  5641. /** Num Packets received from WBM SW1 ring */
  5642. A_UINT32 wbm_sw_ring_reap;
  5643. /** Num packets from WBM forwarded from fw to host via WBM */
  5644. A_UINT32 wbm_forward_to_host_cnt;
  5645. /** Num packets from WBM recycled to target refill ring */
  5646. A_UINT32 wbm_target_recycle_cnt;
  5647. /**
  5648. * Total Num of recycled to refill ring,
  5649. * including packets from WBM and REO
  5650. */
  5651. A_UINT32 target_refill_ring_recycle_cnt;
  5652. } htt_stats_rx_soc_fw_stats_tlv;
  5653. /* preserve old name alias for new name consistent with the tag name */
  5654. typedef htt_stats_rx_soc_fw_stats_tlv htt_rx_soc_fw_stats_tlv;
  5655. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  5656. /* NOTE: Variable length TLV, use length spec to infer array size */
  5657. typedef struct {
  5658. htt_tlv_hdr_t tlv_hdr;
  5659. /** Num ring empty encountered */
  5660. A_UINT32 refill_ring_empty_cnt[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  5661. } htt_stats_rx_soc_fw_refill_ring_empty_tlv;
  5662. /* preserve old name alias for new name consistent with the tag name */
  5663. typedef htt_stats_rx_soc_fw_refill_ring_empty_tlv
  5664. htt_rx_soc_fw_refill_ring_empty_tlv_v;
  5665. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  5666. /* NOTE: Variable length TLV, use length spec to infer array size */
  5667. typedef struct {
  5668. htt_tlv_hdr_t tlv_hdr;
  5669. /** Num total buf refilled from refill ring */
  5670. A_UINT32 refill_ring_num_refill[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  5671. } htt_stats_rx_soc_fw_refill_ring_num_refill_tlv;
  5672. /* preserve old name alias for new name consistent with the tag name */
  5673. typedef htt_stats_rx_soc_fw_refill_ring_num_refill_tlv
  5674. htt_rx_soc_fw_refill_ring_num_refill_tlv_v;
  5675. /* RXDMA error code from WBM released packets */
  5676. typedef enum {
  5677. HTT_RX_RXDMA_OVERFLOW_ERR = 0,
  5678. HTT_RX_RXDMA_MPDU_LENGTH_ERR = 1,
  5679. HTT_RX_RXDMA_FCS_ERR = 2,
  5680. HTT_RX_RXDMA_DECRYPT_ERR = 3,
  5681. HTT_RX_RXDMA_TKIP_MIC_ERR = 4,
  5682. HTT_RX_RXDMA_UNECRYPTED_ERR = 5,
  5683. HTT_RX_RXDMA_MSDU_LEN_ERR = 6,
  5684. HTT_RX_RXDMA_MSDU_LIMIT_ERR = 7,
  5685. HTT_RX_RXDMA_WIFI_PARSE_ERR = 8,
  5686. HTT_RX_RXDMA_AMSDU_PARSE_ERR = 9,
  5687. HTT_RX_RXDMA_SA_TIMEOUT_ERR = 10,
  5688. HTT_RX_RXDMA_DA_TIMEOUT_ERR = 11,
  5689. HTT_RX_RXDMA_FLOW_TIMEOUT_ERR = 12,
  5690. HTT_RX_RXDMA_FLUSH_REQUEST = 13,
  5691. HTT_RX_RXDMA_ERR_CODE_RVSD0 = 14,
  5692. HTT_RX_RXDMA_ERR_CODE_RVSD1 = 15,
  5693. /*
  5694. * This MAX_ERR_CODE should not be used in any host/target messages,
  5695. * so that even though it is defined within a host/target interface
  5696. * definition header file, it isn't actually part of the host/target
  5697. * interface, and thus can be modified.
  5698. */
  5699. HTT_RX_RXDMA_MAX_ERR_CODE
  5700. } htt_rx_rxdma_error_code_enum;
  5701. /* NOTE: Variable length TLV, use length spec to infer array size */
  5702. typedef struct {
  5703. htt_tlv_hdr_t tlv_hdr;
  5704. /** NOTE:
  5705. * The mapping of RXDMA error types to rxdma_err array elements is HW dependent.
  5706. * It is expected but not required that the target will provide a rxdma_err element
  5707. * for each of the htt_rx_rxdma_error_code_enum values, up to but not including
  5708. * MAX_ERR_CODE. The host should ignore any array elements whose
  5709. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  5710. */
  5711. A_UINT32 rxdma_err[1]; /* HTT_RX_RXDMA_MAX_ERR_CODE */
  5712. } htt_stats_rx_refill_rxdma_err_tlv;
  5713. /* preserve old name alias for new name consistent with the tag name */
  5714. typedef htt_stats_rx_refill_rxdma_err_tlv
  5715. htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v;
  5716. /* REO error code from WBM released packets */
  5717. typedef enum {
  5718. HTT_RX_REO_QUEUE_DESC_ADDR_ZERO = 0,
  5719. HTT_RX_REO_QUEUE_DESC_NOT_VALID = 1,
  5720. HTT_RX_AMPDU_IN_NON_BA = 2,
  5721. HTT_RX_NON_BA_DUPLICATE = 3,
  5722. HTT_RX_BA_DUPLICATE = 4,
  5723. HTT_RX_REGULAR_FRAME_2K_JUMP = 5,
  5724. HTT_RX_BAR_FRAME_2K_JUMP = 6,
  5725. HTT_RX_REGULAR_FRAME_OOR = 7,
  5726. HTT_RX_BAR_FRAME_OOR = 8,
  5727. HTT_RX_BAR_FRAME_NO_BA_SESSION = 9,
  5728. HTT_RX_BAR_FRAME_SN_EQUALS_SSN = 10,
  5729. HTT_RX_PN_CHECK_FAILED = 11,
  5730. HTT_RX_2K_ERROR_HANDLING_FLAG_SET = 12,
  5731. HTT_RX_PN_ERROR_HANDLING_FLAG_SET = 13,
  5732. HTT_RX_QUEUE_DESCRIPTOR_BLOCKED_SET = 14,
  5733. HTT_RX_REO_ERR_CODE_RVSD = 15,
  5734. /*
  5735. * This MAX_ERR_CODE should not be used in any host/target messages,
  5736. * so that even though it is defined within a host/target interface
  5737. * definition header file, it isn't actually part of the host/target
  5738. * interface, and thus can be modified.
  5739. */
  5740. HTT_RX_REO_MAX_ERR_CODE
  5741. } htt_rx_reo_error_code_enum;
  5742. /* NOTE: Variable length TLV, use length spec to infer array size */
  5743. typedef struct {
  5744. htt_tlv_hdr_t tlv_hdr;
  5745. /** NOTE:
  5746. * The mapping of REO error types to reo_err array elements is HW dependent.
  5747. * It is expected but not required that the target will provide a rxdma_err element
  5748. * for each of the htt_rx_reo_error_code_enum values, up to but not including
  5749. * MAX_ERR_CODE. The host should ignore any array elements whose
  5750. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  5751. */
  5752. A_UINT32 reo_err[1]; /* HTT_RX_REO_MAX_ERR_CODE */
  5753. } htt_stats_rx_refill_reo_err_tlv;
  5754. /* preserve old name alias for new name consistent with the tag name */
  5755. typedef htt_stats_rx_refill_reo_err_tlv
  5756. htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v;
  5757. /* NOTE:
  5758. * This structure is for documentation, and cannot be safely used directly.
  5759. * Instead, use the constituent TLV structures to fill/parse.
  5760. */
  5761. typedef struct {
  5762. htt_stats_rx_soc_fw_stats_tlv fw_tlv;
  5763. htt_stats_rx_soc_fw_refill_ring_empty_tlv fw_refill_ring_empty_tlv;
  5764. htt_stats_rx_soc_fw_refill_ring_num_refill_tlv
  5765. fw_refill_ring_num_refill_tlv;
  5766. htt_stats_rx_refill_rxdma_err_tlv fw_refill_ring_num_rxdma_err_tlv;
  5767. htt_stats_rx_refill_reo_err_tlv fw_refill_ring_num_reo_err_tlv;
  5768. } htt_rx_soc_stats_t;
  5769. /* == RX PDEV STATS == */
  5770. #define HTT_RX_PDEV_FW_STATS_MAC_ID_M 0x000000ff
  5771. #define HTT_RX_PDEV_FW_STATS_MAC_ID_S 0
  5772. #define HTT_RX_PDEV_FW_STATS_MAC_ID_GET(_var) \
  5773. (((_var) & HTT_RX_PDEV_FW_STATS_MAC_ID_M) >> \
  5774. HTT_RX_PDEV_FW_STATS_MAC_ID_S)
  5775. #define HTT_RX_PDEV_FW_STATS_MAC_ID_SET(_var, _val) \
  5776. do { \
  5777. HTT_CHECK_SET_VAL(HTT_RX_PDEV_FW_STATS_MAC_ID, _val); \
  5778. ((_var) |= ((_val) << HTT_RX_PDEV_FW_STATS_MAC_ID_S)); \
  5779. } while (0)
  5780. typedef struct {
  5781. htt_tlv_hdr_t tlv_hdr;
  5782. /**
  5783. * BIT [ 7 : 0] :- mac_id
  5784. * BIT [31 : 8] :- reserved
  5785. */
  5786. A_UINT32 mac_id__word;
  5787. /** Num PPDU status processed from HW */
  5788. A_UINT32 ppdu_recvd;
  5789. /** Num MPDU across PPDUs with FCS ok */
  5790. A_UINT32 mpdu_cnt_fcs_ok;
  5791. /** Num MPDU across PPDUs with FCS err */
  5792. A_UINT32 mpdu_cnt_fcs_err;
  5793. /** Num MSDU across PPDUs */
  5794. A_UINT32 tcp_msdu_cnt;
  5795. /** Num MSDU across PPDUs */
  5796. A_UINT32 tcp_ack_msdu_cnt;
  5797. /** Num MSDU across PPDUs */
  5798. A_UINT32 udp_msdu_cnt;
  5799. /** Num MSDU across PPDUs */
  5800. A_UINT32 other_msdu_cnt;
  5801. /** Num MPDU on FW ring indicated */
  5802. A_UINT32 fw_ring_mpdu_ind;
  5803. /** Num MGMT MPDU given to protocol */
  5804. A_UINT32 fw_ring_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  5805. /** Num ctrl MPDU given to protocol */
  5806. A_UINT32 fw_ring_ctrl_subtype[HTT_STATS_SUBTYPE_MAX];
  5807. /** Num mcast data packet received */
  5808. A_UINT32 fw_ring_mcast_data_msdu;
  5809. /** Num broadcast data packet received */
  5810. A_UINT32 fw_ring_bcast_data_msdu;
  5811. /** Num unicast data packet received */
  5812. A_UINT32 fw_ring_ucast_data_msdu;
  5813. /** Num null data packet received */
  5814. A_UINT32 fw_ring_null_data_msdu;
  5815. /** Num MPDU on FW ring dropped */
  5816. A_UINT32 fw_ring_mpdu_drop;
  5817. /** Num buf indication to offload */
  5818. A_UINT32 ofld_local_data_ind_cnt;
  5819. /** Num buf recycle from offload */
  5820. A_UINT32 ofld_local_data_buf_recycle_cnt;
  5821. /** Num buf indication to data_rx */
  5822. A_UINT32 drx_local_data_ind_cnt;
  5823. /** Num buf recycle from data_rx */
  5824. A_UINT32 drx_local_data_buf_recycle_cnt;
  5825. /** Num buf indication to protocol */
  5826. A_UINT32 local_nondata_ind_cnt;
  5827. /** Num buf recycle from protocol */
  5828. A_UINT32 local_nondata_buf_recycle_cnt;
  5829. /** Num buf fed */
  5830. A_UINT32 fw_status_buf_ring_refill_cnt;
  5831. /** Num ring empty encountered */
  5832. A_UINT32 fw_status_buf_ring_empty_cnt;
  5833. /** Num buf fed */
  5834. A_UINT32 fw_pkt_buf_ring_refill_cnt;
  5835. /** Num ring empty encountered */
  5836. A_UINT32 fw_pkt_buf_ring_empty_cnt;
  5837. /** Num buf fed */
  5838. A_UINT32 fw_link_buf_ring_refill_cnt;
  5839. /** Num ring empty encountered */
  5840. A_UINT32 fw_link_buf_ring_empty_cnt;
  5841. /** Num buf fed */
  5842. A_UINT32 host_pkt_buf_ring_refill_cnt;
  5843. /** Num ring empty encountered */
  5844. A_UINT32 host_pkt_buf_ring_empty_cnt;
  5845. /** Num buf fed */
  5846. A_UINT32 mon_pkt_buf_ring_refill_cnt;
  5847. /** Num ring empty encountered */
  5848. A_UINT32 mon_pkt_buf_ring_empty_cnt;
  5849. /** Num buf fed */
  5850. A_UINT32 mon_status_buf_ring_refill_cnt;
  5851. /** Num ring empty encountered */
  5852. A_UINT32 mon_status_buf_ring_empty_cnt;
  5853. /** Num buf fed */
  5854. A_UINT32 mon_desc_buf_ring_refill_cnt;
  5855. /** Num ring empty encountered */
  5856. A_UINT32 mon_desc_buf_ring_empty_cnt;
  5857. /** Num buf fed */
  5858. A_UINT32 mon_dest_ring_update_cnt;
  5859. /** Num ring full encountered */
  5860. A_UINT32 mon_dest_ring_full_cnt;
  5861. /** Num rx suspend is attempted */
  5862. A_UINT32 rx_suspend_cnt;
  5863. /** Num rx suspend failed */
  5864. A_UINT32 rx_suspend_fail_cnt;
  5865. /** Num rx resume attempted */
  5866. A_UINT32 rx_resume_cnt;
  5867. /** Num rx resume failed */
  5868. A_UINT32 rx_resume_fail_cnt;
  5869. /** Num rx ring switch */
  5870. A_UINT32 rx_ring_switch_cnt;
  5871. /** Num rx ring restore */
  5872. A_UINT32 rx_ring_restore_cnt;
  5873. /** Num rx flush issued */
  5874. A_UINT32 rx_flush_cnt;
  5875. /** Num rx recovery */
  5876. A_UINT32 rx_recovery_reset_cnt;
  5877. } htt_stats_rx_pdev_fw_stats_tlv;
  5878. /* preserve old name alias for new name consistent with the tag name */
  5879. typedef htt_stats_rx_pdev_fw_stats_tlv htt_rx_pdev_fw_stats_tlv;
  5880. typedef struct {
  5881. htt_tlv_hdr_t tlv_hdr;
  5882. /** peer mac address */
  5883. htt_mac_addr peer_mac_addr;
  5884. /** Num of tx mgmt frames with subtype on peer level */
  5885. A_UINT32 peer_tx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  5886. /** Num of rx mgmt frames with subtype on peer level */
  5887. A_UINT32 peer_rx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  5888. } htt_stats_peer_ctrl_path_txrx_stats_tlv;
  5889. /* preserve old name alias for new name consistent with the tag name */
  5890. typedef htt_stats_peer_ctrl_path_txrx_stats_tlv
  5891. htt_peer_ctrl_path_txrx_stats_tlv;
  5892. #define HTT_STATS_PHY_ERR_MAX 43
  5893. typedef struct {
  5894. htt_tlv_hdr_t tlv_hdr;
  5895. /**
  5896. * BIT [ 7 : 0] :- mac_id
  5897. * BIT [31 : 8] :- reserved
  5898. */
  5899. A_UINT32 mac_id__word;
  5900. /** Num of phy err */
  5901. A_UINT32 total_phy_err_cnt;
  5902. /** Counts of different types of phy errs
  5903. * The mapping of PHY error types to phy_err array elements is HW dependent.
  5904. * The only currently-supported mapping is shown below:
  5905. *
  5906. * 0 phyrx_err_phy_off Reception aborted due to receiving a PHY_OFF TLV
  5907. * 1 phyrx_err_synth_off
  5908. * 2 phyrx_err_ofdma_timing
  5909. * 3 phyrx_err_ofdma_signal_parity
  5910. * 4 phyrx_err_ofdma_rate_illegal
  5911. * 5 phyrx_err_ofdma_length_illegal
  5912. * 6 phyrx_err_ofdma_restart
  5913. * 7 phyrx_err_ofdma_service
  5914. * 8 phyrx_err_ppdu_ofdma_power_drop
  5915. * 9 phyrx_err_cck_blokker
  5916. * 10 phyrx_err_cck_timing
  5917. * 11 phyrx_err_cck_header_crc
  5918. * 12 phyrx_err_cck_rate_illegal
  5919. * 13 phyrx_err_cck_length_illegal
  5920. * 14 phyrx_err_cck_restart
  5921. * 15 phyrx_err_cck_service
  5922. * 16 phyrx_err_cck_power_drop
  5923. * 17 phyrx_err_ht_crc_err
  5924. * 18 phyrx_err_ht_length_illegal
  5925. * 19 phyrx_err_ht_rate_illegal
  5926. * 20 phyrx_err_ht_zlf
  5927. * 21 phyrx_err_false_radar_ext
  5928. * 22 phyrx_err_green_field
  5929. * 23 phyrx_err_bw_gt_dyn_bw
  5930. * 24 phyrx_err_leg_ht_mismatch
  5931. * 25 phyrx_err_vht_crc_error
  5932. * 26 phyrx_err_vht_siga_unsupported
  5933. * 27 phyrx_err_vht_lsig_len_invalid
  5934. * 28 phyrx_err_vht_ndp_or_zlf
  5935. * 29 phyrx_err_vht_nsym_lt_zero
  5936. * 30 phyrx_err_vht_rx_extra_symbol_mismatch
  5937. * 31 phyrx_err_vht_rx_skip_group_id0
  5938. * 32 phyrx_err_vht_rx_skip_group_id1to62
  5939. * 33 phyrx_err_vht_rx_skip_group_id63
  5940. * 34 phyrx_err_ofdm_ldpc_decoder_disabled
  5941. * 35 phyrx_err_defer_nap
  5942. * 36 phyrx_err_fdomain_timeout
  5943. * 37 phyrx_err_lsig_rel_check
  5944. * 38 phyrx_err_bt_collision
  5945. * 39 phyrx_err_unsupported_mu_feedback
  5946. * 40 phyrx_err_ppdu_tx_interrupt_rx
  5947. * 41 phyrx_err_unsupported_cbf
  5948. * 42 phyrx_err_other
  5949. */
  5950. A_UINT32 phy_err[HTT_STATS_PHY_ERR_MAX];
  5951. } htt_stats_rx_pdev_fw_stats_phy_err_tlv;
  5952. /* preserve old name alias for new name consistent with the tag name */
  5953. typedef htt_stats_rx_pdev_fw_stats_phy_err_tlv htt_rx_pdev_fw_stats_phy_err_tlv;
  5954. #define HTT_RX_PDEV_FW_RING_MPDU_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  5955. /* NOTE: Variable length TLV, use length spec to infer array size */
  5956. typedef struct {
  5957. htt_tlv_hdr_t tlv_hdr;
  5958. /** Num error MPDU for each RxDMA error type */
  5959. A_UINT32 fw_ring_mpdu_err[1]; /* HTT_RX_STATS_RXDMA_MAX_ERR */
  5960. } htt_stats_rx_pdev_fw_ring_mpdu_err_tlv;
  5961. /* preserve old name alias for new name consistent with the tag name */
  5962. typedef htt_stats_rx_pdev_fw_ring_mpdu_err_tlv
  5963. htt_rx_pdev_fw_ring_mpdu_err_tlv_v;
  5964. #define HTT_RX_PDEV_FW_MPDU_DROP_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  5965. /* NOTE: Variable length TLV, use length spec to infer array size */
  5966. typedef struct {
  5967. htt_tlv_hdr_t tlv_hdr;
  5968. /** Num MPDU dropped */
  5969. A_UINT32 fw_mpdu_drop[1]; /* HTT_RX_STATS_FW_DROP_REASON_MAX */
  5970. } htt_stats_rx_pdev_fw_mpdu_drop_tlv;
  5971. /* preserve old name alias for new name consistent with the tag name */
  5972. typedef htt_stats_rx_pdev_fw_mpdu_drop_tlv htt_rx_pdev_fw_mpdu_drop_tlv_v;
  5973. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX
  5974. * TLV_TAGS:
  5975. * - HTT_STATS_RX_SOC_FW_STATS_TAG (head TLV in soc_stats)
  5976. * - HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG (inside soc_stats)
  5977. * - HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG (inside soc_stats)
  5978. * - HTT_STATS_RX_PDEV_FW_STATS_TAG
  5979. * - HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG
  5980. * - HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG
  5981. */
  5982. /* NOTE:
  5983. * This structure is for documentation, and cannot be safely used directly.
  5984. * Instead, use the constituent TLV structures to fill/parse.
  5985. */
  5986. typedef struct {
  5987. htt_rx_soc_stats_t soc_stats;
  5988. htt_stats_rx_pdev_fw_stats_tlv fw_stats_tlv;
  5989. htt_stats_rx_pdev_fw_ring_mpdu_err_tlv fw_ring_mpdu_err_tlv;
  5990. htt_stats_rx_pdev_fw_mpdu_drop_tlv fw_ring_mpdu_drop;
  5991. htt_stats_rx_pdev_fw_stats_phy_err_tlv fw_stats_phy_err_tlv;
  5992. } htt_rx_pdev_stats_t;
  5993. /* STATS_TYPE : HTT_DBG_EXT_PEER_CTRL_PATH_TXRX_STATS
  5994. * TLV_TAGS:
  5995. * - HTT_STATS_PEER_CTRL_PATH_TXRX_STATS_TAG
  5996. *
  5997. */
  5998. typedef struct {
  5999. htt_stats_peer_ctrl_path_txrx_stats_tlv peer_ctrl_path_txrx_stats_tlv;
  6000. } htt_ctrl_path_txrx_stats_t;
  6001. #define HTT_PDEV_CCA_STATS_TX_FRAME_INFO_PRESENT (0x1)
  6002. #define HTT_PDEV_CCA_STATS_RX_FRAME_INFO_PRESENT (0x2)
  6003. #define HTT_PDEV_CCA_STATS_RX_CLEAR_INFO_PRESENT (0x4)
  6004. #define HTT_PDEV_CCA_STATS_MY_RX_FRAME_INFO_PRESENT (0x8)
  6005. #define HTT_PDEV_CCA_STATS_USEC_CNT_INFO_PRESENT (0x10)
  6006. #define HTT_PDEV_CCA_STATS_MED_RX_IDLE_INFO_PRESENT (0x20)
  6007. #define HTT_PDEV_CCA_STATS_MED_TX_IDLE_GLOBAL_INFO_PRESENT (0x40)
  6008. #define HTT_PDEV_CCA_STATS_CCA_OBBS_USEC_INFO_PRESENT (0x80)
  6009. typedef struct {
  6010. htt_tlv_hdr_t tlv_hdr;
  6011. /* Below values are obtained from the HW Cycles counter registers */
  6012. A_UINT32 tx_frame_usec;
  6013. A_UINT32 rx_frame_usec;
  6014. A_UINT32 rx_clear_usec;
  6015. A_UINT32 my_rx_frame_usec;
  6016. A_UINT32 usec_cnt;
  6017. A_UINT32 med_rx_idle_usec;
  6018. A_UINT32 med_tx_idle_global_usec;
  6019. A_UINT32 cca_obss_usec;
  6020. A_UINT32 pre_rx_frame_usec;
  6021. } htt_stats_pdev_cca_counters_tlv;
  6022. /* preserve old name alias for new name consistent with the tag name */
  6023. typedef htt_stats_pdev_cca_counters_tlv htt_pdev_stats_cca_counters_tlv;
  6024. /* NOTE: THIS htt_pdev_cca_stats_hist_tlv STRUCTURE IS DEPRECATED,
  6025. * due to lack of support in some host stats infrastructures for
  6026. * TLVs nested within TLVs.
  6027. */
  6028. typedef struct {
  6029. htt_tlv_hdr_t tlv_hdr;
  6030. /** The channel number on which these stats were collected */
  6031. A_UINT32 chan_num;
  6032. /** num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  6033. A_UINT32 num_records;
  6034. /**
  6035. * Bit map of valid CCA counters
  6036. * Bit0 - tx_frame_usec
  6037. * Bit1 - rx_frame_usec
  6038. * Bit2 - rx_clear_usec
  6039. * Bit3 - my_rx_frame_usec
  6040. * bit4 - usec_cnt
  6041. * Bit5 - med_rx_idle_usec
  6042. * Bit6 - med_tx_idle_global_usec
  6043. * Bit7 - cca_obss_usec
  6044. *
  6045. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  6046. */
  6047. A_UINT32 valid_cca_counters_bitmap;
  6048. /** Indicates the stats collection interval
  6049. * Valid Values:
  6050. * 100 - For the 100ms interval CCA stats histogram
  6051. * 1000 - For 1sec interval CCA histogram
  6052. * 0xFFFFFFFF - For Cumulative CCA Stats
  6053. */
  6054. A_UINT32 collection_interval;
  6055. /**
  6056. * This will be followed by an array which contains the CCA stats
  6057. * collected in the last N intervals,
  6058. * if the indication is for last N intervals CCA stats.
  6059. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  6060. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  6061. */
  6062. htt_stats_pdev_cca_counters_tlv cca_hist_tlv[1];
  6063. } htt_pdev_cca_stats_hist_tlv;
  6064. typedef struct {
  6065. htt_tlv_hdr_t tlv_hdr;
  6066. /** The channel number on which these stats were collected */
  6067. A_UINT32 chan_num;
  6068. /** num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  6069. A_UINT32 num_records;
  6070. /**
  6071. * Bit map of valid CCA counters
  6072. * Bit0 - tx_frame_usec
  6073. * Bit1 - rx_frame_usec
  6074. * Bit2 - rx_clear_usec
  6075. * Bit3 - my_rx_frame_usec
  6076. * bit4 - usec_cnt
  6077. * Bit5 - med_rx_idle_usec
  6078. * Bit6 - med_tx_idle_global_usec
  6079. * Bit7 - cca_obss_usec
  6080. *
  6081. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  6082. */
  6083. A_UINT32 valid_cca_counters_bitmap;
  6084. /** Indicates the stats collection interval
  6085. * Valid Values:
  6086. * 100 - For the 100ms interval CCA stats histogram
  6087. * 1000 - For 1sec interval CCA histogram
  6088. * 0xFFFFFFFF - For Cumulative CCA Stats
  6089. */
  6090. A_UINT32 collection_interval;
  6091. /**
  6092. * This will be followed by an array which contains the CCA stats
  6093. * collected in the last N intervals,
  6094. * if the indication is for last N intervals CCA stats.
  6095. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  6096. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  6097. * htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  6098. */
  6099. } htt_pdev_cca_stats_hist_v1_tlv;
  6100. #define HTT_TWT_SESSION_FLAG_FLOW_ID_M 0x0000000f
  6101. #define HTT_TWT_SESSION_FLAG_FLOW_ID_S 0
  6102. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_M 0x0000fff0
  6103. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_S 4
  6104. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_M 0x00010000
  6105. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_S 16
  6106. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M 0x00020000
  6107. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S 17
  6108. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M 0x00040000
  6109. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S 18
  6110. #define HTT_TWT_SESSION_FLAG_FLOW_ID_GET(_var) \
  6111. (((_var) & HTT_TWT_SESSION_FLAG_FLOW_ID_M) >> \
  6112. HTT_TWT_SESSION_FLAG_FLOW_ID_S)
  6113. #define HTT_TWT_SESSION_FLAG_FLOW_ID_SET(_var, _val) \
  6114. do { \
  6115. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_FLOW_ID, _val); \
  6116. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_FLOW_ID_S)); \
  6117. } while (0)
  6118. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_GET(_var) \
  6119. (((_var) & HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_M) >> \
  6120. HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_S)
  6121. #define HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_SET(_var, _val) \
  6122. do { \
  6123. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT, _val); \
  6124. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_BTWT_PEER_CNT_S)); \
  6125. } while (0)
  6126. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_GET(_var) \
  6127. (((_var) & HTT_TWT_SESSION_FLAG_BCAST_TWT_M) >> \
  6128. HTT_TWT_SESSION_FLAG_BCAST_TWT_S)
  6129. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_SET(_var, _val) \
  6130. do { \
  6131. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_BCAST_TWT, _val); \
  6132. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_BCAST_TWT_S)); \
  6133. } while (0)
  6134. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_GET(_var) \
  6135. (((_var) & HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M) >> \
  6136. HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)
  6137. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_SET(_var, _val) \
  6138. do { \
  6139. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_TRIGGER_TWT, _val); \
  6140. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)); \
  6141. } while (0)
  6142. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_GET(_var) \
  6143. (((_var) & HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M) >> \
  6144. HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)
  6145. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_SET(_var, _val) \
  6146. do { \
  6147. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_ANNOUN_TWT, _val); \
  6148. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)); \
  6149. } while (0)
  6150. #define TWT_DIALOG_ID_UNAVAILABLE 0xFFFFFFFF
  6151. typedef struct {
  6152. htt_tlv_hdr_t tlv_hdr;
  6153. A_UINT32 vdev_id;
  6154. htt_mac_addr peer_mac;
  6155. A_UINT32 flow_id_flags;
  6156. /**
  6157. * TWT_DIALOG_ID_UNAVAILABLE is used when TWT session is
  6158. * not initiated by host
  6159. */
  6160. A_UINT32 dialog_id;
  6161. A_UINT32 wake_dura_us;
  6162. A_UINT32 wake_intvl_us;
  6163. A_UINT32 sp_offset_us;
  6164. } htt_stats_pdev_twt_session_tlv;
  6165. /* preserve old name alias for new name consistent with the tag name */
  6166. typedef htt_stats_pdev_twt_session_tlv htt_pdev_stats_twt_session_tlv;
  6167. typedef struct {
  6168. htt_tlv_hdr_t tlv_hdr;
  6169. A_UINT32 pdev_id;
  6170. A_UINT32 num_sessions;
  6171. htt_stats_pdev_twt_session_tlv twt_session[1];
  6172. } htt_stats_pdev_twt_sessions_tlv;
  6173. /* preserve old name alias for new name consistent with the tag name */
  6174. typedef htt_stats_pdev_twt_sessions_tlv htt_pdev_stats_twt_sessions_tlv;
  6175. /* STATS_TYPE: HTT_DBG_EXT_STATS_TWT_SESSIONS
  6176. * TLV_TAGS:
  6177. * - HTT_STATS_PDEV_TWT_SESSIONS_TAG
  6178. * - HTT_STATS_PDEV_TWT_SESSION_TAG
  6179. */
  6180. /* NOTE:
  6181. * This structure is for documentation, and cannot be safely used directly.
  6182. * Instead, use the constituent TLV structures to fill/parse.
  6183. */
  6184. typedef struct {
  6185. htt_stats_pdev_twt_session_tlv twt_sessions[1];
  6186. } htt_pdev_twt_sessions_stats_t;
  6187. typedef enum {
  6188. /* Global link descriptor queued in REO */
  6189. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_0 = 0,
  6190. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_1 = 1,
  6191. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_2 = 2,
  6192. /*Number of queue descriptors of this aging group */
  6193. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC0 = 3,
  6194. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC1 = 4,
  6195. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC2 = 5,
  6196. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC3 = 6,
  6197. /* Total number of MSDUs buffered in AC */
  6198. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC0 = 7,
  6199. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC1 = 8,
  6200. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC2 = 9,
  6201. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC3 = 10,
  6202. HTT_RX_REO_RESOURCE_STATS_MAX = 16
  6203. } htt_rx_reo_resource_sample_id_enum;
  6204. typedef struct {
  6205. htt_tlv_hdr_t tlv_hdr;
  6206. /* Variable based on the Number of records. HTT_RX_REO_RESOURCE_STATS_MAX */
  6207. /** htt_rx_reo_debug_sample_id_enum */
  6208. A_UINT32 sample_id;
  6209. /** Max value of all samples */
  6210. A_UINT32 total_max;
  6211. /** Average value of total samples */
  6212. A_UINT32 total_avg;
  6213. /** Num of samples including both zeros and non zeros ones*/
  6214. A_UINT32 total_sample;
  6215. /** Average value of all non zeros samples */
  6216. A_UINT32 non_zeros_avg;
  6217. /** Num of non zeros samples */
  6218. A_UINT32 non_zeros_sample;
  6219. /** Max value of last N non zero samples (N = last_non_zeros_sample) */
  6220. A_UINT32 last_non_zeros_max;
  6221. /** Min value of last N non zero samples (N = last_non_zeros_sample) */
  6222. A_UINT32 last_non_zeros_min;
  6223. /** Average value of last N non zero samples (N = last_non_zeros_sample) */
  6224. A_UINT32 last_non_zeros_avg;
  6225. /** Num of last non zero samples */
  6226. A_UINT32 last_non_zeros_sample;
  6227. } htt_stats_rx_reo_resource_stats_tlv;
  6228. /* preserve old name alias for new name consistent with the tag name */
  6229. typedef htt_stats_rx_reo_resource_stats_tlv htt_rx_reo_resource_stats_tlv_v;
  6230. /* STATS_TYPE: HTT_DBG_EXT_STATS_REO_RESOURCE_STATS
  6231. * TLV_TAGS:
  6232. * - HTT_STATS_RX_REO_RESOURCE_STATS_TAG
  6233. */
  6234. /* NOTE:
  6235. * This structure is for documentation, and cannot be safely used directly.
  6236. * Instead, use the constituent TLV structures to fill/parse.
  6237. */
  6238. typedef struct {
  6239. htt_stats_rx_reo_resource_stats_tlv reo_resource_stats;
  6240. } htt_soc_reo_resource_stats_t;
  6241. /* == TX SOUNDING STATS == */
  6242. /* config_param0 */
  6243. #define HTT_DBG_EXT_STATS_SET_VDEV_MASK(_var) ((_var << 1) | 0x1)
  6244. #define HTT_DBG_EXT_STATS_GET_VDEV_ID_FROM_VDEV_MASK(_var) ((_var >> 1) & 0xFF)
  6245. #define HTT_DBG_EXT_STATS_IS_VDEV_ID_SET(_var) ((_var) & 0x1)
  6246. typedef enum {
  6247. /* Implicit beamforming stats */
  6248. HTT_IMPLICIT_TXBF_STEER_STATS = 0,
  6249. /* Single user short inter frame sequence steer stats */
  6250. HTT_EXPLICIT_TXBF_SU_SIFS_STEER_STATS = 1,
  6251. /* Single user random back off steer stats */
  6252. HTT_EXPLICIT_TXBF_SU_RBO_STEER_STATS = 2,
  6253. /* Multi user short inter frame sequence steer stats */
  6254. HTT_EXPLICIT_TXBF_MU_SIFS_STEER_STATS = 3,
  6255. /* Multi user random back off steer stats */
  6256. HTT_EXPLICIT_TXBF_MU_RBO_STEER_STATS = 4,
  6257. /* For backward compatibility new modes cannot be added */
  6258. HTT_TXBF_MAX_NUM_OF_MODES = 5
  6259. } htt_txbf_sound_steer_modes;
  6260. typedef enum {
  6261. HTT_TX_AC_SOUNDING_MODE = 0,
  6262. HTT_TX_AX_SOUNDING_MODE = 1,
  6263. HTT_TX_BE_SOUNDING_MODE = 2,
  6264. HTT_TX_CMN_SOUNDING_MODE = 3,
  6265. HTT_TX_CV_CORR_MODE = 4,
  6266. } htt_stats_sounding_tx_mode;
  6267. #define HTT_TX_CV_CORR_MAX_NUM_COLUMNS 8
  6268. typedef struct {
  6269. htt_tlv_hdr_t tlv_hdr;
  6270. A_UINT32 tx_sounding_mode; /* HTT_TX_XX_SOUNDING_MODE */
  6271. /* Counts number of soundings for all steering modes in each bw */
  6272. A_UINT32 cbf_20[HTT_TXBF_MAX_NUM_OF_MODES];
  6273. A_UINT32 cbf_40[HTT_TXBF_MAX_NUM_OF_MODES];
  6274. A_UINT32 cbf_80[HTT_TXBF_MAX_NUM_OF_MODES];
  6275. A_UINT32 cbf_160[HTT_TXBF_MAX_NUM_OF_MODES];
  6276. /**
  6277. * The sounding array is a 2-D array stored as an 1-D array of
  6278. * A_UINT32. The stats for a particular user/bw combination is
  6279. * referenced with the following:
  6280. *
  6281. * sounding[(user* max_bw) + bw]
  6282. *
  6283. * ... where max_bw == 4 for 160mhz
  6284. */
  6285. A_UINT32 sounding[HTT_TX_NUM_OF_SOUNDING_STATS_WORDS];
  6286. /* cv upload handler stats */
  6287. /** total times CV nc mismatched */
  6288. A_UINT32 cv_nc_mismatch_err;
  6289. /** total times CV has FCS error */
  6290. A_UINT32 cv_fcs_err;
  6291. /** total times CV has invalid NSS index */
  6292. A_UINT32 cv_frag_idx_mismatch;
  6293. /** total times CV has invalid SW peer ID */
  6294. A_UINT32 cv_invalid_peer_id;
  6295. /** total times CV rejected because TXBF is not setup in peer */
  6296. A_UINT32 cv_no_txbf_setup;
  6297. /** total times CV expired while in updating state */
  6298. A_UINT32 cv_expiry_in_update;
  6299. /** total times Pkt b/w exceeding the cbf_bw */
  6300. A_UINT32 cv_pkt_bw_exceed;
  6301. /** total times CV DMA not completed */
  6302. A_UINT32 cv_dma_not_done_err;
  6303. /** total times CV update to peer failed */
  6304. A_UINT32 cv_update_failed;
  6305. /* cv query stats */
  6306. /** total times CV query happened */
  6307. A_UINT32 cv_total_query;
  6308. /** total pattern based CV query */
  6309. A_UINT32 cv_total_pattern_query;
  6310. /** total BW based CV query */
  6311. A_UINT32 cv_total_bw_query;
  6312. /** incorrect encoding in CV flags */
  6313. A_UINT32 cv_invalid_bw_coding;
  6314. /** forced sounding enabled for the peer */
  6315. A_UINT32 cv_forced_sounding;
  6316. /** standalone sounding sequence on-going */
  6317. A_UINT32 cv_standalone_sounding;
  6318. /** NC of available CV lower than expected */
  6319. A_UINT32 cv_nc_mismatch;
  6320. /** feedback type different from expected */
  6321. A_UINT32 cv_fb_type_mismatch;
  6322. /** CV BW not equal to expected BW for OFDMA */
  6323. A_UINT32 cv_ofdma_bw_mismatch;
  6324. /** CV BW not greater than or equal to expected BW */
  6325. A_UINT32 cv_bw_mismatch;
  6326. /** CV pattern not matching with the expected pattern */
  6327. A_UINT32 cv_pattern_mismatch;
  6328. /** CV available is of different preamble type than expected. */
  6329. A_UINT32 cv_preamble_mismatch;
  6330. /** NR of available CV is lower than expected. */
  6331. A_UINT32 cv_nr_mismatch;
  6332. /** CV in use count has exceeded threshold and cannot be used further. */
  6333. A_UINT32 cv_in_use_cnt_exceeded;
  6334. /** A valid CV has been found. */
  6335. A_UINT32 cv_found;
  6336. /** No valid CV was found. */
  6337. A_UINT32 cv_not_found;
  6338. /** Sounding per user in 320MHz bandwidth */
  6339. A_UINT32 sounding_320[HTT_TX_PDEV_STATS_NUM_BE_MUMIMO_USER_STATS];
  6340. /** Counts number of soundings for all steering modes in 320MHz bandwidth */
  6341. A_UINT32 cbf_320[HTT_TXBF_MAX_NUM_OF_MODES];
  6342. /* This part can be used for new counters added for CV query/upload. */
  6343. /** non-trigger based ranging sequence on-going */
  6344. A_UINT32 cv_ntbr_sounding;
  6345. /** CV found, but upload is in progress. */
  6346. A_UINT32 cv_found_upload_in_progress;
  6347. /** Expired CV found during query. */
  6348. A_UINT32 cv_expired_during_query;
  6349. /** total times CV dma timeout happened */
  6350. A_UINT32 cv_dma_timeout_error;
  6351. /** total times CV bufs uploaded for IBF case */
  6352. A_UINT32 cv_buf_ibf_uploads;
  6353. /** total times CV bufs uploaded for EBF case */
  6354. A_UINT32 cv_buf_ebf_uploads;
  6355. /** total times CV bufs received from IPC ring */
  6356. A_UINT32 cv_buf_received;
  6357. /** total times CV bufs fed back to the IPC ring */
  6358. A_UINT32 cv_buf_fed_back;
  6359. /** Total times CV query happened for IBF case */
  6360. A_UINT32 cv_total_query_ibf;
  6361. /** A valid CV has been found for IBF case */
  6362. A_UINT32 cv_found_ibf;
  6363. /** A valid CV has not been found for IBF case */
  6364. A_UINT32 cv_not_found_ibf;
  6365. /** Expired CV found during query for IBF case */
  6366. A_UINT32 cv_expired_during_query_ibf;
  6367. /** Total number of times adaptive sounding logic has been queried */
  6368. A_UINT32 adaptive_snd_total_query;
  6369. /**
  6370. * Total number of times adaptive sounding mcs drop has been computed
  6371. * and recorded.
  6372. */
  6373. A_UINT32 adaptive_snd_total_mcs_drop[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
  6374. /** Total number of times adaptive sounding logic kicked in */
  6375. A_UINT32 adaptive_snd_kicked_in;
  6376. /** Total number of times we switched back to normal sounding interval */
  6377. A_UINT32 adaptive_snd_back_to_default;
  6378. /**
  6379. * Below are CV correlation feature related stats.
  6380. * This feature is used for DL MU MIMO, but is not available
  6381. * from certain legacy targets.
  6382. */
  6383. /** number of CV Correlation triggers for online mode */
  6384. A_UINT32 cv_corr_trigger_online_mode;
  6385. /** number of CV Correlation triggers for offline mode */
  6386. A_UINT32 cv_corr_trigger_offline_mode;
  6387. /** number of CV Correlation triggers for hybrid mode */
  6388. A_UINT32 cv_corr_trigger_hybrid_mode;
  6389. /** number of CV Correlation triggers with computation level 0 */
  6390. A_UINT32 cv_corr_trigger_computation_level_0;
  6391. /** number of CV Correlation triggers with computation level 1 */
  6392. A_UINT32 cv_corr_trigger_computation_level_1;
  6393. /** number of CV Correlation triggers with computation level 2 */
  6394. A_UINT32 cv_corr_trigger_computation_level_2;
  6395. /** number of users for which CV Correlation was triggered */
  6396. A_UINT32 cv_corr_trigger_num_users[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6397. /** number of streams for which CV Correlation was triggered */
  6398. A_UINT32 cv_corr_trigger_num_streams[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6399. /** number of CV Correlation buffers received through IPC tickle */
  6400. A_UINT32 cv_corr_upload_total_buf_received;
  6401. /** number of CV Correlation buffers fed back to the IPC ring */
  6402. A_UINT32 cv_corr_upload_total_buf_fed_back;
  6403. /** number of CV Correlation buffers for which processing failed */
  6404. A_UINT32 cv_corr_upload_total_processing_failed;
  6405. /**
  6406. * number of CV Correlation buffers for which processing failed,
  6407. * due to no users being present in parsed buffer
  6408. */
  6409. A_UINT32 cv_corr_upload_failed_total_users_zero;
  6410. /**
  6411. * number of CV Correlation buffers for which processing failed,
  6412. * due to number of users present in parsed buffer exceeded
  6413. * CV_CORR_MAX_NUM_COLUMNS
  6414. */
  6415. A_UINT32 cv_corr_upload_failed_total_users_exceeded;
  6416. /**
  6417. * number of CV Correlation buffers for which processing failed,
  6418. * due to peer pointer for parsed peer not available
  6419. */
  6420. A_UINT32 cv_corr_upload_failed_peer_not_found;
  6421. /**
  6422. * number of CV Correlation buffers for which processing encountered,
  6423. * Nss of peer exceeding SCHED_ALGO_MAX_SUPPORTED_MUMIMO_NSS
  6424. */
  6425. A_UINT32 cv_corr_upload_user_nss_exceeded;
  6426. /**
  6427. * number of CV Correlation buffers for which processing encountered,
  6428. * invalid reverse look up index for fetching CV correlation results
  6429. */
  6430. A_UINT32 cv_corr_upload_invalid_lookup_index;
  6431. /** number of users present in uploaded CV Correlation results buffer */
  6432. A_UINT32 cv_corr_upload_total_num_users[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6433. /** number of streams present in uploaded CV Correlation results buffer */
  6434. A_UINT32 cv_corr_upload_total_num_streams[HTT_TX_CV_CORR_MAX_NUM_COLUMNS];
  6435. } htt_stats_tx_sounding_stats_tlv;
  6436. /* preserve old name alias for new name consistent with the tag name */
  6437. typedef htt_stats_tx_sounding_stats_tlv htt_tx_sounding_stats_tlv;
  6438. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  6439. * TLV_TAGS:
  6440. * - HTT_STATS_TX_SOUNDING_STATS_TAG
  6441. */
  6442. /* NOTE:
  6443. * This structure is for documentation, and cannot be safely used directly.
  6444. * Instead, use the constituent TLV structures to fill/parse.
  6445. */
  6446. typedef struct {
  6447. htt_stats_tx_sounding_stats_tlv sounding_tlv;
  6448. } htt_tx_sounding_stats_t;
  6449. typedef struct {
  6450. htt_tlv_hdr_t tlv_hdr;
  6451. A_UINT32 num_obss_tx_ppdu_success;
  6452. A_UINT32 num_obss_tx_ppdu_failure;
  6453. /** num_sr_tx_transmissions:
  6454. * Counter of TX done by aborting other BSS RX with spatial reuse
  6455. * (for cases where rx RSSI from other BSS is below the packet-detection
  6456. * threshold for doing spatial reuse)
  6457. */
  6458. union {
  6459. A_UINT32 num_sr_tx_transmissions; /* CORRECTED - use this one */
  6460. A_UINT32 num_sr_tx_tranmissions; /* DEPRECATED - has typo in name */
  6461. };
  6462. union {
  6463. /**
  6464. * Count the number of times the RSSI from an other-BSS signal
  6465. * is below the spatial reuse power threshold, thus providing an
  6466. * opportunity for spatial reuse since OBSS interference will be
  6467. * inconsequential.
  6468. */
  6469. A_UINT32 num_spatial_reuse_opportunities;
  6470. /* DEPRECATED: num_sr_rx_ge_pd_rssi_thr
  6471. * This old name has been deprecated because it does not
  6472. * clearly and accurately reflect the information stored within
  6473. * this field.
  6474. * Use the new name (num_spatial_reuse_opportunities) instead of
  6475. * the deprecated old name (num_sr_rx_ge_pd_rssi_thr).
  6476. */
  6477. A_UINT32 num_sr_rx_ge_pd_rssi_thr;
  6478. };
  6479. /**
  6480. * Count of number of times OBSS frames were aborted and non-SRG
  6481. * opportunities were created. Non-SRG opportunities are created when
  6482. * incoming OBSS RSSI is lesser than the global configured non-SRG RSSI
  6483. * threshold and non-SRG OBSS color / non-SRG OBSS BSSID registers
  6484. * allow non-SRG TX.
  6485. */
  6486. A_UINT32 num_non_srg_opportunities;
  6487. /**
  6488. * Count of number of times TX PPDU were transmitted using non-SRG
  6489. * opportunities created. Incoming OBSS frame RSSI is compared with per
  6490. * PPDU non-SRG RSSI threshold configured in each PPDU. If incoming OBSS
  6491. * RSSI < non-SRG RSSI threshold configured in each PPDU, then non-SRG
  6492. * transmission happens.
  6493. */
  6494. A_UINT32 num_non_srg_ppdu_tried;
  6495. /**
  6496. * Count of number of times non-SRG based TX transmissions were successful
  6497. */
  6498. A_UINT32 num_non_srg_ppdu_success;
  6499. /**
  6500. * Count of number of times OBSS frames were aborted and SRG opportunities
  6501. * were created. Srg opportunities are created when incoming OBSS RSSI
  6502. * is less than the global configured SRG RSSI threshold and SRC OBSS
  6503. * color / SRG OBSS BSSID / SRG partial bssid / SRG BSS color bitmap
  6504. * registers allow SRG TX.
  6505. */
  6506. A_UINT32 num_srg_opportunities;
  6507. /**
  6508. * Count of number of times TX PPDU were transmitted using SRG
  6509. * opportunities created.
  6510. * Incoming OBSS frame RSSI is compared with per PPDU SRG RSSI
  6511. * threshold configured in each PPDU.
  6512. * If incoming OBSS RSSI < SRG RSSI threshold configured in each PPDU,
  6513. * then SRG transmission happens.
  6514. */
  6515. A_UINT32 num_srg_ppdu_tried;
  6516. /**
  6517. * Count of number of times SRG based TX transmissions were successful
  6518. */
  6519. A_UINT32 num_srg_ppdu_success;
  6520. /**
  6521. * Count of number of times PSR opportunities were created by aborting
  6522. * OBSS UL OFDMA HE-TB PPDU frame. HE-TB ppdu frames are aborted if the
  6523. * spatial reuse info in the OBSS trigger common field is set to allow PSR
  6524. * based spatial reuse.
  6525. */
  6526. A_UINT32 num_psr_opportunities;
  6527. /**
  6528. * Count of number of times TX PPDU were transmitted using PSR
  6529. * opportunities created.
  6530. */
  6531. A_UINT32 num_psr_ppdu_tried;
  6532. /**
  6533. * Count of number of times PSR based TX transmissions were successful.
  6534. */
  6535. A_UINT32 num_psr_ppdu_success;
  6536. /**
  6537. * Count of number of times TX PPDU per access category were transmitted
  6538. * using non-SRG opportunities created.
  6539. */
  6540. A_UINT32 num_non_srg_ppdu_tried_per_ac[HTT_NUM_AC_WMM];
  6541. /**
  6542. * Count of number of times non-SRG based TX transmissions per access
  6543. * category were successful
  6544. */
  6545. A_UINT32 num_non_srg_ppdu_success_per_ac[HTT_NUM_AC_WMM];
  6546. /**
  6547. * Count of number of times TX PPDU per access category were transmitted
  6548. * using SRG opportunities created.
  6549. */
  6550. A_UINT32 num_srg_ppdu_tried_per_ac[HTT_NUM_AC_WMM];
  6551. /**
  6552. * Count of number of times SRG based TX transmissions per access
  6553. * category were successful
  6554. */
  6555. A_UINT32 num_srg_ppdu_success_per_ac[HTT_NUM_AC_WMM];
  6556. /**
  6557. * Count of number of times ppdu was flushed due to ongoing OBSS
  6558. * frame duration value lesser than minimum required frame duration.
  6559. */
  6560. A_UINT32 num_obss_min_duration_check_flush_cnt;
  6561. /**
  6562. * Count of number of times ppdu was flushed due to ppdu duration
  6563. * exceeding aborted OBSS frame duration
  6564. */
  6565. A_UINT32 num_sr_ppdu_abort_flush_cnt;
  6566. } htt_stats_pdev_obss_pd_tlv;
  6567. /* preserve old name alias for new name consistent with the tag name */
  6568. typedef htt_stats_pdev_obss_pd_tlv htt_pdev_obss_pd_stats_tlv;
  6569. /* NOTE:
  6570. * This structure is for documentation, and cannot be safely used directly.
  6571. * Instead, use the constituent TLV structures to fill/parse.
  6572. */
  6573. typedef struct {
  6574. htt_stats_pdev_obss_pd_tlv obss_pd_stat;
  6575. } htt_pdev_obss_pd_stats_t;
  6576. typedef struct {
  6577. htt_tlv_hdr_t tlv_hdr;
  6578. A_UINT32 pdev_id;
  6579. A_UINT32 current_head_idx;
  6580. A_UINT32 current_tail_idx;
  6581. A_UINT32 num_htt_msgs_sent;
  6582. /**
  6583. * Time in milliseconds for which the ring has been in
  6584. * its current backpressure condition
  6585. */
  6586. A_UINT32 backpressure_time_ms;
  6587. /** backpressure_hist -
  6588. * histogram showing how many times different degrees of backpressure
  6589. * duration occurred:
  6590. * Index 0 indicates the number of times ring was
  6591. * continuously in backpressure state for 100 - 200ms.
  6592. * Index 1 indicates the number of times ring was
  6593. * continuously in backpressure state for 200 - 300ms.
  6594. * Index 2 indicates the number of times ring was
  6595. * continuously in backpressure state for 300 - 400ms.
  6596. * Index 3 indicates the number of times ring was
  6597. * continuously in backpressure state for 400 - 500ms.
  6598. * Index 4 indicates the number of times ring was
  6599. * continuously in backpressure state beyond 500ms.
  6600. */
  6601. A_UINT32 backpressure_hist[5];
  6602. } htt_stats_ring_backpressure_stats_tlv;
  6603. /* preserve old name alias for new name consistent with the tag name */
  6604. typedef htt_stats_ring_backpressure_stats_tlv htt_ring_backpressure_stats_tlv;
  6605. /* STATS_TYPE : HTT_STATS_RING_BACKPRESSURE_STATS_INFO
  6606. * TLV_TAGS:
  6607. * - HTT_STATS_RING_BACKPRESSURE_STATS_TAG
  6608. */
  6609. /* NOTE:
  6610. * This structure is for documentation, and cannot be safely used directly.
  6611. * Instead, use the constituent TLV structures to fill/parse.
  6612. */
  6613. typedef struct {
  6614. htt_stats_sring_cmn_tlv cmn_tlv;
  6615. struct {
  6616. htt_stats_string_tlv sring_str_tlv;
  6617. htt_stats_ring_backpressure_stats_tlv backpressure_stats_tlv;
  6618. } r[1]; /* variable-length array */
  6619. } htt_ring_backpressure_stats_t;
  6620. #define HTT_LATENCY_PROFILE_MAX_HIST 3
  6621. #define HTT_STATS_MAX_PROF_STATS_NAME_LEN 32
  6622. #define HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST 3
  6623. typedef struct {
  6624. htt_tlv_hdr_t tlv_hdr;
  6625. /** print_header:
  6626. * This field suggests whether the host should print a header when
  6627. * displaying the TLV (because this is the first latency_prof_stats
  6628. * TLV within a series), or if only the TLV contents should be displayed
  6629. * without a header (because this is not the first TLV within the series).
  6630. */
  6631. A_UINT32 print_header;
  6632. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  6633. /** number of data values included in the tot sum */
  6634. A_UINT32 cnt;
  6635. /** time in us */
  6636. A_UINT32 min;
  6637. /** time in us */
  6638. A_UINT32 max;
  6639. A_UINT32 last;
  6640. /** time in us */
  6641. A_UINT32 tot;
  6642. /** time in us */
  6643. A_UINT32 avg;
  6644. /** hist_intvl:
  6645. * Histogram interval, i.e. the latency range covered by each
  6646. * bin of the histogram, in microsecond units.
  6647. * hist[0] counts how many latencies were between 0 to hist_intvl
  6648. * hist[1] counts how many latencies were between hist_intvl to 2*hist_intvl
  6649. * hist[2] counts how many latencies were more than 2*hist_intvl
  6650. */
  6651. A_UINT32 hist_intvl;
  6652. A_UINT32 hist[HTT_LATENCY_PROFILE_MAX_HIST];
  6653. /** max page faults in any 1 sampling window */
  6654. A_UINT32 page_fault_max;
  6655. /** summed over all sampling windows */
  6656. A_UINT32 page_fault_total;
  6657. /** ignored_latency_count:
  6658. * ignore some of profile latency to avoid avg skewing
  6659. */
  6660. A_UINT32 ignored_latency_count;
  6661. /** interrupts_max: max interrupts within any single sampling window */
  6662. A_UINT32 interrupts_max;
  6663. /** interrupts_hist: histogram of interrupt rate
  6664. * bin0 contains the number of sampling windows that had 0 interrupts,
  6665. * bin1 contains the number of sampling windows that had 1-4 interrupts,
  6666. * bin2 contains the number of sampling windows that had > 4 interrupts
  6667. */
  6668. A_UINT32 interrupts_hist[HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST];
  6669. } htt_stats_latency_prof_stats_tlv;
  6670. /* preserve old name alias for new name consistent with the tag name */
  6671. typedef htt_stats_latency_prof_stats_tlv htt_latency_prof_stats_tlv;
  6672. typedef struct {
  6673. htt_tlv_hdr_t tlv_hdr;
  6674. /** duration:
  6675. * Time period over which counts were gathered, units = microseconds.
  6676. */
  6677. A_UINT32 duration;
  6678. A_UINT32 tx_msdu_cnt;
  6679. A_UINT32 tx_mpdu_cnt;
  6680. A_UINT32 tx_ppdu_cnt;
  6681. A_UINT32 rx_msdu_cnt;
  6682. A_UINT32 rx_mpdu_cnt;
  6683. } htt_stats_latency_ctx_tlv;
  6684. /* preserve old name alias for new name consistent with the tag name */
  6685. typedef htt_stats_latency_ctx_tlv htt_latency_prof_ctx_tlv;
  6686. typedef struct {
  6687. htt_tlv_hdr_t tlv_hdr;
  6688. /** count of enabled profiles */
  6689. A_UINT32 prof_enable_cnt;
  6690. } htt_stats_latency_cnt_tlv;
  6691. /* preserve old name alias for new name consistent with the tag name */
  6692. typedef htt_stats_latency_cnt_tlv htt_latency_prof_cnt_tlv;
  6693. /* STATS_TYPE : HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  6694. * TLV_TAGS:
  6695. * HTT_STATS_LATENCY_PROF_STATS_TAG / htt_latency_prof_stats_tlv
  6696. * HTT_STATS_LATENCY_CTX_TAG / htt_latency_prof_ctx_tlv
  6697. * HTT_STATS_LATENCY_CNT_TAG / htt_latency_prof_cnt_tlv
  6698. */
  6699. /* NOTE:
  6700. * This structure is for documentation, and cannot be safely used directly.
  6701. * Instead, use the constituent TLV structures to fill/parse.
  6702. */
  6703. typedef struct {
  6704. htt_stats_latency_prof_stats_tlv latency_prof_stat;
  6705. htt_stats_latency_ctx_tlv latency_ctx_stat;
  6706. htt_stats_latency_cnt_tlv latency_cnt_stat;
  6707. } htt_soc_latency_stats_t;
  6708. #define HTT_RX_MAX_PEAK_OCCUPANCY_INDEX 10
  6709. #define HTT_RX_MAX_CURRENT_OCCUPANCY_INDEX 10
  6710. #define HTT_RX_SQUARE_INDEX 6
  6711. #define HTT_RX_MAX_PEAK_SEARCH_INDEX 4
  6712. #define HTT_RX_MAX_PENDING_SEARCH_INDEX 4
  6713. /* STATS_TYPE : HTT_DBG_EXT_RX_FSE_STATS
  6714. * TLV_TAGS:
  6715. * - HTT_STATS_RX_FSE_STATS_TAG
  6716. */
  6717. typedef struct {
  6718. htt_tlv_hdr_t tlv_hdr;
  6719. /**
  6720. * Number of times host requested for fse enable/disable
  6721. */
  6722. A_UINT32 fse_enable_cnt;
  6723. A_UINT32 fse_disable_cnt;
  6724. /**
  6725. * Number of times host requested for fse cache invalidation
  6726. * individual entries or full cache
  6727. */
  6728. A_UINT32 fse_cache_invalidate_entry_cnt;
  6729. A_UINT32 fse_full_cache_invalidate_cnt;
  6730. /**
  6731. * Cache hits count will increase if there is a matching flow in the cache
  6732. * There is no register for cache miss but the number of cache misses can
  6733. * be calculated as
  6734. * cache miss = (num_searches - cache_hits)
  6735. * Thus, there is no need to have a separate variable for cache misses.
  6736. * Num searches is flow search times done in the cache.
  6737. */
  6738. A_UINT32 fse_num_cache_hits_cnt;
  6739. A_UINT32 fse_num_searches_cnt;
  6740. /**
  6741. * Cache Occupancy holds 2 types of values: Peak and Current.
  6742. * 10 bins are used to keep track of peak occupancy.
  6743. * 8 of these bins represent ranges of values, while the first and last
  6744. * bins represent the extreme cases of the cache being completely empty
  6745. * or completely full.
  6746. * For the non-extreme bins, the number of cache occupancy values per
  6747. * bin is the maximum cache occupancy (128), divided by the number of
  6748. * non-extreme bins (8), so 128/8 = 16 values per bin.
  6749. * The range of values for each histogram bins is specified below:
  6750. * Bin0 = Counter increments when cache occupancy is empty
  6751. * Bin1 = Counter increments when cache occupancy is within [1 to 16]
  6752. * Bin2 = Counter increments when cache occupancy is within [17 to 32]
  6753. * Bin3 = Counter increments when cache occupancy is within [33 to 48]
  6754. * Bin4 = Counter increments when cache occupancy is within [49 to 64]
  6755. * Bin5 = Counter increments when cache occupancy is within [65 to 80]
  6756. * Bin6 = Counter increments when cache occupancy is within [81 to 96]
  6757. * Bin7 = Counter increments when cache occupancy is within [97 to 112]
  6758. * Bin8 = Counter increments when cache occupancy is within [113 to 127]
  6759. * Bin9 = Counter increments when cache occupancy is equal to 128
  6760. * The above histogram bin definitions apply to both the peak-occupancy
  6761. * histogram and the current-occupancy histogram.
  6762. *
  6763. * @fse_cache_occupancy_peak_cnt:
  6764. * Array records periodically PEAK cache occupancy values.
  6765. * Peak Occupancy will increment only if it is greater than current
  6766. * occupancy value.
  6767. *
  6768. * @fse_cache_occupancy_curr_cnt:
  6769. * Array records periodically current cache occupancy value.
  6770. * Current Cache occupancy always holds instant snapshot of
  6771. * current number of cache entries.
  6772. **/
  6773. A_UINT32 fse_cache_occupancy_peak_cnt[HTT_RX_MAX_PEAK_OCCUPANCY_INDEX];
  6774. A_UINT32 fse_cache_occupancy_curr_cnt[HTT_RX_MAX_CURRENT_OCCUPANCY_INDEX];
  6775. /**
  6776. * Square stat is sum of squares of cache occupancy to better understand
  6777. * any variation/deviation within each cache set, over a given time-window.
  6778. *
  6779. * Square stat is calculated this way:
  6780. * Square = SUM(Squares of all Occupancy in a Set) / 8
  6781. * The cache has 16-way set associativity, so the occupancy of a
  6782. * set can vary from 0 to 16. There are 8 sets within the cache.
  6783. * Therefore, the minimum possible square value is 0, and the maximum
  6784. * possible square value is (8*16^2) / 8 = 256.
  6785. *
  6786. * 6 bins are used to keep track of square stats:
  6787. * Bin0 = increments when square of current cache occupancy is zero
  6788. * Bin1 = increments when square of current cache occupancy is within
  6789. * [1 to 50]
  6790. * Bin2 = increments when square of current cache occupancy is within
  6791. * [51 to 100]
  6792. * Bin3 = increments when square of current cache occupancy is within
  6793. * [101 to 200]
  6794. * Bin4 = increments when square of current cache occupancy is within
  6795. * [201 to 255]
  6796. * Bin5 = increments when square of current cache occupancy is 256
  6797. */
  6798. A_UINT32 fse_search_stat_square_cnt[HTT_RX_SQUARE_INDEX];
  6799. /**
  6800. * Search stats has 2 types of values: Peak Pending and Number of
  6801. * Search Pending.
  6802. * GSE command ring for FSE can hold maximum of 5 Pending searches
  6803. * at any given time.
  6804. *
  6805. * 4 bins are used to keep track of search stats:
  6806. * Bin0 = Counter increments when there are NO pending searches
  6807. * (For peak, it will be number of pending searches greater
  6808. * than GSE command ring FIFO outstanding requests.
  6809. * For Search Pending, it will be number of pending search
  6810. * inside GSE command ring FIFO.)
  6811. * Bin1 = Counter increments when number of pending searches are within
  6812. * [1 to 2]
  6813. * Bin2 = Counter increments when number of pending searches are within
  6814. * [3 to 4]
  6815. * Bin3 = Counter increments when number of pending searches are
  6816. * greater/equal to [ >= 5]
  6817. */
  6818. A_UINT32 fse_search_stat_peak_cnt[HTT_RX_MAX_PEAK_SEARCH_INDEX];
  6819. A_UINT32 fse_search_stat_search_pending_cnt[HTT_RX_MAX_PENDING_SEARCH_INDEX];
  6820. } htt_stats_rx_fse_stats_tlv;
  6821. /* preserve old name alias for new name consistent with the tag name */
  6822. typedef htt_stats_rx_fse_stats_tlv htt_rx_fse_stats_tlv;
  6823. /* NOTE:
  6824. * This structure is for documentation, and cannot be safely used directly.
  6825. * Instead, use the constituent TLV structures to fill/parse.
  6826. */
  6827. typedef struct {
  6828. htt_stats_rx_fse_stats_tlv rx_fse_stats;
  6829. } htt_rx_fse_stats_t;
  6830. #define HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS 14
  6831. #define HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS 5 /* 20, 40, 80, 160, 320 */
  6832. #define HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES 2/* 0: Half, 1: Quarter */
  6833. typedef struct {
  6834. htt_tlv_hdr_t tlv_hdr;
  6835. /** SU TxBF TX MCS stats */
  6836. A_UINT32 tx_su_txbf_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  6837. /** Implicit BF TX MCS stats */
  6838. A_UINT32 tx_su_ibf_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  6839. /** Open loop TX MCS stats */
  6840. A_UINT32 tx_su_ol_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  6841. /** SU TxBF TX NSS stats */
  6842. A_UINT32 tx_su_txbf_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  6843. /** Implicit BF TX NSS stats */
  6844. A_UINT32 tx_su_ibf_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  6845. /** Open loop TX NSS stats */
  6846. A_UINT32 tx_su_ol_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  6847. /** SU TxBF TX BW stats */
  6848. A_UINT32 tx_su_txbf_bw[HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  6849. /** Implicit BF TX BW stats */
  6850. A_UINT32 tx_su_ibf_bw[HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  6851. /** Open loop TX BW stats */
  6852. A_UINT32 tx_su_ol_bw[HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  6853. /** Legacy and OFDM TX rate stats */
  6854. A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  6855. /** SU TxBF TX BW stats */
  6856. A_UINT32 reduced_tx_su_txbf_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  6857. /** Implicit BF TX BW stats */
  6858. A_UINT32 reduced_tx_su_ibf_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  6859. /** Open loop TX BW stats */
  6860. A_UINT32 reduced_tx_su_ol_bw[HTT_TX_TXBF_RATE_STATS_NUM_REDUCED_CHAN_TYPES][HTT_TX_TXBF_RATE_STATS_NUM_BW_COUNTERS];
  6861. /** Txbf flag reason stats */
  6862. A_UINT32 txbf_flag_set_mu_mode;
  6863. A_UINT32 txbf_flag_set_final_status;
  6864. A_UINT32 txbf_flag_not_set_verified_txbf_mode;
  6865. A_UINT32 txbf_flag_not_set_disable_p2p_access;
  6866. A_UINT32 txbf_flag_not_set_max_nss_reached_in_he160;
  6867. A_UINT32 txbf_flag_not_set_disable_ul_dl_ofdma;
  6868. A_UINT32 txbf_flag_not_set_mcs_threshold_value;
  6869. A_UINT32 txbf_flag_not_set_final_status;
  6870. } htt_stats_pdev_tx_rate_txbf_stats_tlv;
  6871. /* preserve old name alias for new name consistent with the tag name */
  6872. typedef htt_stats_pdev_tx_rate_txbf_stats_tlv htt_tx_pdev_txbf_rate_stats_tlv;
  6873. typedef enum {
  6874. HTT_STATS_RC_MODE_DLSU = 0,
  6875. HTT_STATS_RC_MODE_DLMUMIMO = 1,
  6876. HTT_STATS_RC_MODE_DLOFDMA = 2,
  6877. HTT_STATS_RC_MODE_ULMUMIMO = 3,
  6878. HTT_STATS_RC_MODE_ULOFDMA = 4,
  6879. } htt_stats_rc_mode;
  6880. typedef struct {
  6881. A_UINT32 ppdus_tried;
  6882. A_UINT32 ppdus_ack_failed;
  6883. A_UINT32 mpdus_tried;
  6884. A_UINT32 mpdus_failed;
  6885. } htt_tx_rate_stats_t;
  6886. typedef enum {
  6887. HTT_RC_MODE_SU_OL,
  6888. HTT_RC_MODE_SU_BF,
  6889. HTT_RC_MODE_MU1_INTF,
  6890. HTT_RC_MODE_MU2_INTF,
  6891. HTT_Rc_MODE_MU3_INTF,
  6892. HTT_RC_MODE_MU4_INTF,
  6893. HTT_RC_MODE_MU5_INTF,
  6894. HTT_RC_MODE_MU6_INTF,
  6895. HTT_RC_MODE_MU7_INTF,
  6896. HTT_RC_MODE_2D_COUNT,
  6897. } HTT_RC_MODE;
  6898. typedef enum {
  6899. HTT_STATS_RU_TYPE_INVALID = 0,
  6900. HTT_STATS_RU_TYPE_SINGLE_RU_ONLY = 1,
  6901. HTT_STATS_RU_TYPE_SINGLE_AND_MULTI_RU = 2,
  6902. } htt_stats_ru_type;
  6903. typedef struct {
  6904. htt_tlv_hdr_t tlv_hdr;
  6905. /** HTT_STATS_RC_MODE_XX */
  6906. A_UINT32 rc_mode;
  6907. A_UINT32 last_probed_mcs;
  6908. A_UINT32 last_probed_nss;
  6909. A_UINT32 last_probed_bw;
  6910. htt_tx_rate_stats_t per_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  6911. htt_tx_rate_stats_t per_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  6912. htt_tx_rate_stats_t per_mcs[HTT_TX_TXBF_RATE_STATS_NUM_MCS_COUNTERS];
  6913. /** 320MHz extension for PER */
  6914. htt_tx_rate_stats_t per_bw320;
  6915. A_UINT32 probe_cnt_per_rcmode[HTT_RC_MODE_2D_COUNT];
  6916. A_UINT32 ru_type; /* refer to htt_stats_ru_type enum */
  6917. htt_tx_rate_stats_t per_ru[HTT_TX_PDEV_STATS_NUM_BE_RU_SIZE_COUNTERS];
  6918. } htt_stats_per_rate_stats_tlv;
  6919. /* preserve old name alias for new name consistent with the tag name */
  6920. typedef htt_stats_per_rate_stats_tlv htt_tx_rate_stats_per_tlv;
  6921. /* NOTE:
  6922. * This structure is for documentation, and cannot be safely used directly.
  6923. * Instead, use the constituent TLV structures to fill/parse.
  6924. */
  6925. typedef struct {
  6926. htt_stats_pdev_tx_rate_txbf_stats_tlv txbf_rate_stats;
  6927. } htt_pdev_txbf_rate_stats_t;
  6928. typedef struct {
  6929. htt_stats_per_rate_stats_tlv per_stats;
  6930. } htt_tx_pdev_per_stats_t;
  6931. typedef enum {
  6932. HTT_ULTRIG_QBOOST_TRIGGER = 0,
  6933. HTT_ULTRIG_PSPOLL_TRIGGER,
  6934. HTT_ULTRIG_UAPSD_TRIGGER,
  6935. HTT_ULTRIG_11AX_TRIGGER,
  6936. HTT_ULTRIG_11AX_WILDCARD_TRIGGER,
  6937. HTT_ULTRIG_11AX_UNASSOC_WILDCARD_TRIGGER,
  6938. HTT_STA_UL_OFDMA_NUM_TRIG_TYPE,
  6939. } HTT_STA_UL_OFDMA_RX_TRIG_TYPE;
  6940. typedef enum {
  6941. HTT_11AX_TRIGGER_BASIC_E = 0,
  6942. HTT_11AX_TRIGGER_BRPOLL_E = 1,
  6943. HTT_11AX_TRIGGER_MU_BAR_E = 2,
  6944. HTT_11AX_TRIGGER_MU_RTS_E = 3,
  6945. HTT_11AX_TRIGGER_BUFFER_SIZE_E = 4,
  6946. HTT_11AX_TRIGGER_GCR_MU_BAR_E = 5,
  6947. HTT_11AX_TRIGGER_BQRP_E = 6,
  6948. HTT_11AX_TRIGGER_NDP_FB_REPORT_POLL_E = 7,
  6949. HTT_11AX_TRIGGER_RESERVED_8_E = 8,
  6950. HTT_11AX_TRIGGER_RESERVED_9_E = 9,
  6951. HTT_11AX_TRIGGER_RESERVED_10_E = 10,
  6952. HTT_11AX_TRIGGER_RESERVED_11_E = 11,
  6953. HTT_11AX_TRIGGER_RESERVED_12_E = 12,
  6954. HTT_11AX_TRIGGER_RESERVED_13_E = 13,
  6955. HTT_11AX_TRIGGER_RESERVED_14_E = 14,
  6956. HTT_11AX_TRIGGER_RESERVED_15_E = 15,
  6957. HTT_STA_UL_OFDMA_NUM_11AX_TRIG_TYPE,
  6958. } HTT_STA_UL_OFDMA_11AX_TRIG_TYPE;
  6959. /* UL RESP Queues 0 - HIPRI, 1 - LOPRI & 2 - BSR */
  6960. #define HTT_STA_UL_OFDMA_NUM_UL_QUEUES 3
  6961. /* Actual resp type sent by STA for trigger
  6962. * 0 - HE TB PPDU, 1 - NULL Delimiter */
  6963. #define HTT_STA_UL_OFDMA_NUM_RESP_END_TYPE 2
  6964. /* Counter for MCS 0-13 */
  6965. #define HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS 14
  6966. /* Counters BW 20,40,80,160,320 */
  6967. #define HTT_STA_UL_OFDMA_NUM_BW_COUNTERS 5
  6968. #define HTT_STA_UL_OFDMA_NUM_REDUCED_CHAN_TYPES 2 /* 0 - Half, 1 - Quarter */
  6969. /* STATS_TYPE : HTT_DBG_EXT_STA_11AX_UL_STATS
  6970. * TLV_TAGS:
  6971. * - HTT_STATS_STA_UL_OFDMA_STATS_TAG
  6972. */
  6973. typedef struct {
  6974. htt_tlv_hdr_t tlv_hdr;
  6975. A_UINT32 pdev_id;
  6976. /**
  6977. * Trigger Type reported by HWSCH on RX reception
  6978. * Each index populate enum HTT_STA_UL_OFDMA_RX_TRIG_TYPE
  6979. */
  6980. A_UINT32 rx_trigger_type[HTT_STA_UL_OFDMA_NUM_TRIG_TYPE];
  6981. /**
  6982. * 11AX Trigger Type on RX reception
  6983. * Each index populate enum HTT_STA_UL_OFDMA_11AX_TRIG_TYPE
  6984. */
  6985. A_UINT32 ax_trigger_type[HTT_STA_UL_OFDMA_NUM_11AX_TRIG_TYPE];
  6986. /** Num data PPDUs/Delims responded to trigs. per HWQ for UL RESP */
  6987. A_UINT32 num_data_ppdu_responded_per_hwq[HTT_STA_UL_OFDMA_NUM_UL_QUEUES];
  6988. A_UINT32 num_null_delimiters_responded_per_hwq[HTT_STA_UL_OFDMA_NUM_UL_QUEUES];
  6989. /**
  6990. * Overall UL STA RESP Status 0 - HE TB PPDU, 1 - NULL Delimiter
  6991. * Super set of num_data_ppdu_responded_per_hwq,
  6992. * num_null_delimiters_responded_per_hwq
  6993. */
  6994. A_UINT32 num_total_trig_responses[HTT_STA_UL_OFDMA_NUM_RESP_END_TYPE];
  6995. /**
  6996. * Time interval between current time ms and last successful trigger RX
  6997. * 0xFFFFFFFF denotes no trig received / timestamp roll back
  6998. */
  6999. A_UINT32 last_trig_rx_time_delta_ms;
  7000. /**
  7001. * Rate Statistics for UL OFDMA
  7002. * UL TB PPDU TX MCS, NSS, GI, BW from STA HWQ
  7003. */
  7004. A_UINT32 ul_ofdma_tx_mcs[HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS];
  7005. A_UINT32 ul_ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  7006. A_UINT32 ul_ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_STA_UL_OFDMA_NUM_MCS_COUNTERS];
  7007. A_UINT32 ul_ofdma_tx_ldpc;
  7008. A_UINT32 ul_ofdma_tx_bw[HTT_STA_UL_OFDMA_NUM_BW_COUNTERS];
  7009. /** Trig based PPDU TX/ RBO based PPDU TX Count */
  7010. A_UINT32 trig_based_ppdu_tx;
  7011. A_UINT32 rbo_based_ppdu_tx;
  7012. /** Switch MU EDCA to SU EDCA Count */
  7013. A_UINT32 mu_edca_to_su_edca_switch_count;
  7014. /** Num MU EDCA applied Count */
  7015. A_UINT32 num_mu_edca_param_apply_count;
  7016. /**
  7017. * Current MU EDCA Parameters for WMM ACs
  7018. * Mode - 0 - SU EDCA, 1- MU EDCA
  7019. */
  7020. A_UINT32 current_edca_hwq_mode[HTT_NUM_AC_WMM];
  7021. /** Contention Window minimum. Range: 1 - 10 */
  7022. A_UINT32 current_cw_min[HTT_NUM_AC_WMM];
  7023. /** Contention Window maximum. Range: 1 - 10 */
  7024. A_UINT32 current_cw_max[HTT_NUM_AC_WMM];
  7025. /** AIFS value - 0 -255 */
  7026. A_UINT32 current_aifs[HTT_NUM_AC_WMM];
  7027. A_UINT32 reduced_ul_ofdma_tx_bw[HTT_STA_UL_OFDMA_NUM_REDUCED_CHAN_TYPES][HTT_STA_UL_OFDMA_NUM_BW_COUNTERS];
  7028. } htt_stats_sta_ul_ofdma_stats_tlv;
  7029. /* preserve old name alias for new name consistent with the tag name */
  7030. typedef htt_stats_sta_ul_ofdma_stats_tlv htt_sta_ul_ofdma_stats_tlv;
  7031. /* NOTE:
  7032. * This structure is for documentation, and cannot be safely used directly.
  7033. * Instead, use the constituent TLV structures to fill/parse.
  7034. */
  7035. typedef struct {
  7036. htt_stats_sta_ul_ofdma_stats_tlv ul_ofdma_sta_stats;
  7037. } htt_sta_11ax_ul_stats_t;
  7038. typedef struct {
  7039. htt_tlv_hdr_t tlv_hdr;
  7040. /** No of Fine Timing Measurement frames transmitted successfully */
  7041. A_UINT32 tx_ftm_suc;
  7042. /**
  7043. * No of Fine Timing Measurement frames transmitted successfully
  7044. * after retry
  7045. */
  7046. A_UINT32 tx_ftm_suc_retry;
  7047. /** No of Fine Timing Measurement frames not transmitted successfully */
  7048. A_UINT32 tx_ftm_fail;
  7049. /**
  7050. * No of Fine Timing Measurement Request frames received,
  7051. * including initial, non-initial, and duplicates
  7052. */
  7053. A_UINT32 rx_ftmr_cnt;
  7054. /**
  7055. * No of duplicate Fine Timing Measurement Request frames received,
  7056. * including both initial and non-initial
  7057. */
  7058. A_UINT32 rx_ftmr_dup_cnt;
  7059. /** No of initial Fine Timing Measurement Request frames received */
  7060. A_UINT32 rx_iftmr_cnt;
  7061. /**
  7062. * No of duplicate initial Fine Timing Measurement Request frames received
  7063. */
  7064. A_UINT32 rx_iftmr_dup_cnt;
  7065. /** No of responder sessions rejected when initiator was active */
  7066. A_UINT32 initiator_active_responder_rejected_cnt;
  7067. /** Responder terminate count */
  7068. A_UINT32 responder_terminate_cnt;
  7069. A_UINT32 vdev_id;
  7070. } htt_stats_vdev_rtt_resp_stats_tlv;
  7071. /* preserve old name alias for new name consistent with the tag name */
  7072. typedef htt_stats_vdev_rtt_resp_stats_tlv htt_vdev_rtt_resp_stats_tlv;
  7073. typedef struct {
  7074. htt_stats_vdev_rtt_resp_stats_tlv vdev_rtt_resp_stats;
  7075. } htt_vdev_rtt_resp_stats_t;
  7076. typedef struct {
  7077. htt_tlv_hdr_t tlv_hdr;
  7078. A_UINT32 vdev_id;
  7079. /**
  7080. * No of Fine Timing Measurement request frames transmitted successfully
  7081. */
  7082. A_UINT32 tx_ftmr_cnt;
  7083. /**
  7084. * No of Fine Timing Measurement request frames not transmitted successfully
  7085. */
  7086. A_UINT32 tx_ftmr_fail;
  7087. /**
  7088. * No of Fine Timing Measurement request frames transmitted successfully
  7089. * after retry
  7090. */
  7091. A_UINT32 tx_ftmr_suc_retry;
  7092. /**
  7093. * No of Fine Timing Measurement frames received, including initial,
  7094. * non-initial, and duplicates
  7095. */
  7096. A_UINT32 rx_ftm_cnt;
  7097. /** Initiator Terminate count */
  7098. A_UINT32 initiator_terminate_cnt;
  7099. /** Debug count to check the Measurement request from host */
  7100. A_UINT32 tx_meas_req_count;
  7101. } htt_stats_vdev_rtt_init_stats_tlv;
  7102. /* preserve old name alias for new name consistent with the tag name */
  7103. typedef htt_stats_vdev_rtt_init_stats_tlv htt_vdev_rtt_init_stats_tlv;
  7104. typedef struct {
  7105. htt_stats_vdev_rtt_init_stats_tlv vdev_rtt_init_stats;
  7106. } htt_vdev_rtt_init_stats_t;
  7107. #define HTT_STATS_MAX_SCH_CMD_RESULT 25
  7108. /* TXSEND self generated frames */
  7109. typedef enum {
  7110. HTT_TXSEND_FTYPE_SGEN_TF_POLL,
  7111. HTT_TXSEND_FTYPE_SGEN_TF_SOUND,
  7112. HTT_TXSEND_FTYPE_SGEN_TBR_NDPA,
  7113. HTT_TXSEND_FTYPE_SGEN_TBR_NDP,
  7114. HTT_TXSEND_FTYPE_SGEN_TBR_LMR,
  7115. HTT_TXSEND_FTYPE_SGEN_TF_REPORT,
  7116. HTT_TXSEND_FTYPE_MAX
  7117. }
  7118. htt_stats_txsend_ftype_t;
  7119. typedef struct {
  7120. htt_tlv_hdr_t tlv_hdr;
  7121. /* 11AZ TBR SU Stats */
  7122. A_UINT32 tbr_su_ftype_queued[HTT_TXSEND_FTYPE_MAX];
  7123. /* 11AZ TBR MU Stats */
  7124. A_UINT32 tbr_mu_ftype_queued[HTT_TXSEND_FTYPE_MAX];
  7125. } htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv;
  7126. typedef struct {
  7127. htt_tlv_hdr_t tlv_hdr;
  7128. /** tbr_num_sch_cmd_result_buckets:
  7129. * Number of sch cmd results buckets in use per chip
  7130. * Each bucket contains the counter of the number of times that bucket
  7131. * index was seen in the sch_cmd_result. The last bucket will capture
  7132. * the count of sch_cmd_result matching the last bucket index and the
  7133. * count of all the sch_cmd_results that exceeded the last bucket index
  7134. * value.
  7135. * tbr_num_sch_cmd_result_buckets must be <= HTT_STATS_MAX_SCH_CMD_RESULT
  7136. */
  7137. A_UINT32 tbr_num_sch_cmd_result_buckets;
  7138. /* cmd result status for SU frames in case of TB ranging */
  7139. A_UINT32 opaque_tbr_su_ftype_cmd_result[HTT_TXSEND_FTYPE_MAX][HTT_STATS_MAX_SCH_CMD_RESULT];
  7140. /* cmd result status for MU frames in case of TB ranging */
  7141. A_UINT32 opaque_tbr_mu_ftype_cmd_result[HTT_TXSEND_FTYPE_MAX][HTT_STATS_MAX_SCH_CMD_RESULT];
  7142. } htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv;
  7143. typedef struct {
  7144. htt_tlv_hdr_t tlv_hdr;
  7145. /** ista_ranging_ndpa_cnt:
  7146. * Indicates the number of Ranging NDPA sent successfully.
  7147. */
  7148. A_UINT32 ista_ranging_ndpa_cnt;
  7149. /** ista_ranging_ndp_cnt:
  7150. * Indicates the number of Ranging NDP sent successfully.
  7151. */
  7152. A_UINT32 ista_ranging_ndp_cnt;
  7153. /** ista_ranging_i2r_lmr_cnt:
  7154. * Indicates the number of Ranging I2R LMR sent successfully.
  7155. */
  7156. A_UINT32 ista_ranging_i2r_lmr_cnt;
  7157. /** rtsa_ranging_resp_cnt
  7158. * Indicates the number of times RXPCU initiates a Ranging response
  7159. * as a RSTA.
  7160. */
  7161. A_UINT32 rtsa_ranging_resp_cnt;
  7162. /** rtsa_ranging_ndp_cnt:
  7163. * Indicates the number of Ranging NDP response sent successfully.
  7164. */
  7165. A_UINT32 rtsa_ranging_ndp_cnt;
  7166. /** rsta_ranging_lmr_cnt:
  7167. * Indicates the number of Ranging R2I LMR response sent successfully.
  7168. */
  7169. A_UINT32 rsta_ranging_lmr_cnt;
  7170. /** tb_ranging_cts2s_rcvd_cnt:
  7171. * Indicates the number of expected CTS2S response received for TF Poll
  7172. * sent.
  7173. */
  7174. A_UINT32 tb_ranging_cts2s_rcvd_cnt;
  7175. /** tb_ranging_ndp_rcvd_cnt:
  7176. * Indicates the number of expected NDP response received for TF Sound
  7177. * or Secure Sound sent.
  7178. */
  7179. A_UINT32 tb_ranging_ndp_rcvd_cnt;
  7180. /** tb_ranging_lmr_rcvd_cnt:
  7181. * Indicates the number of expected LMR response received for TF Report
  7182. * sent.
  7183. */
  7184. A_UINT32 tb_ranging_lmr_rcvd_cnt;
  7185. /** tb_ranging_tf_poll_resp_sent_cnt:
  7186. * Indicates the number of successful responses sent for TF Poll
  7187. * received.
  7188. */
  7189. A_UINT32 tb_ranging_tf_poll_resp_sent_cnt;
  7190. /** tb_ranging_tf_sound_resp_sent_cnt:
  7191. * Indicates the number of successful responses sent for TF Sound
  7192. * (or Secure) received.
  7193. */
  7194. A_UINT32 tb_ranging_tf_sound_resp_sent_cnt;
  7195. /** tb_ranging_tf_report_resp_sent_cnt:
  7196. * Indicates the number of successful responses sent for TF Report
  7197. * received.
  7198. */
  7199. A_UINT32 tb_ranging_tf_report_resp_sent_cnt;
  7200. } htt_stats_pdev_rtt_hw_stats_tlv;
  7201. typedef struct {
  7202. htt_tlv_hdr_t tlv_hdr;
  7203. A_UINT32 pdev_id;
  7204. /** tx_11mc_ftm_suc:
  7205. * Number of 11mc Fine Timing Measurement frames transmitted successfully.
  7206. */
  7207. A_UINT32 tx_11mc_ftm_suc;
  7208. /** tx_11mc_ftm_suc_retry:
  7209. * Number of Fine Timing Measurement frames transmitted successfully
  7210. * after retrying.
  7211. */
  7212. A_UINT32 tx_11mc_ftm_suc_retry;
  7213. /** tx_11mc_ftm_fail:
  7214. * Number of Fine Timing Measurement frames not transmitted successfully.
  7215. */
  7216. A_UINT32 tx_11mc_ftm_fail;
  7217. /** rx_11mc_ftmr_cnt:
  7218. * Number of FTMR frames received, including initial, non-initial,
  7219. * and duplicates.
  7220. */
  7221. A_UINT32 rx_11mc_ftmr_cnt;
  7222. /** rx_11mc_ftmr_dup_cnt:
  7223. * Number of duplicate Fine Timing Measurement Request frames received,
  7224. * including both initial and non-initial.
  7225. */
  7226. A_UINT32 rx_11mc_ftmr_dup_cnt;
  7227. /** rx_11mc_iftmr_cnt:
  7228. * Number of initial Fine Timing Measurement Request frames received.
  7229. */
  7230. A_UINT32 rx_11mc_iftmr_cnt;
  7231. /** rx_11mc_iftmr_dup_cnt:
  7232. * Number of duplicate initial Fine Timing Measurement Request frames
  7233. * received.
  7234. */
  7235. A_UINT32 rx_11mc_iftmr_dup_cnt;
  7236. /** ftmr_drop_11mc_resp_role_not_enabled_cnt:
  7237. * Number of FTMR frames dropped as 11mc is not supported for this VAP.
  7238. */
  7239. A_UINT32 ftmr_drop_11mc_resp_role_not_enabled_cnt;
  7240. /** initiator_active_responder_rejected_cnt:
  7241. * Number of responder sessions rejected when initiator was active.
  7242. */
  7243. A_UINT32 initiator_active_responder_rejected_cnt;
  7244. /** responder_terminate_cnt:
  7245. * Number of times Responder session got terminated.
  7246. */
  7247. A_UINT32 responder_terminate_cnt;
  7248. /** active_rsta_open:
  7249. * Number of active responder contexts in open mode.
  7250. */
  7251. A_UINT32 active_rsta_open;
  7252. /** active_rsta_mac:
  7253. * Number of active responder contexts in mac security mode.
  7254. */
  7255. A_UINT32 active_rsta_mac;
  7256. /** active_rsta_mac_phy:
  7257. * Number of active responder contexts in mac_phy security mode.
  7258. */
  7259. A_UINT32 active_rsta_mac_phy;
  7260. /** num_assoc_ranging_peers:
  7261. * Number of active associated ISTA ranging peers.
  7262. */
  7263. A_UINT32 num_assoc_ranging_peers;
  7264. /** num_unassoc_ranging_peers:
  7265. * Number of active un-associated ISTA ranging peers.
  7266. */
  7267. A_UINT32 num_unassoc_ranging_peers;
  7268. /** responder_alloc_cnt:
  7269. * Number of responder contexts allocated.
  7270. */
  7271. A_UINT32 responder_alloc_cnt;
  7272. /** responder_alloc_failure:
  7273. * Number of times responder context failed to be allocated.
  7274. */
  7275. A_UINT32 responder_alloc_failure;
  7276. /** pn_check_failure_cnt:
  7277. * Number of times PN check failed.
  7278. */
  7279. A_UINT32 pn_check_failure_cnt;
  7280. /** pasn_m1_auth_recv_cnt:
  7281. * Num of M1 auth frames received for PASN over the air from iSTA.
  7282. */
  7283. A_UINT32 pasn_m1_auth_recv_cnt;
  7284. /** pasn_m1_auth_drop_cnt:
  7285. * Number of M1 auth frames received for PASN over the air from iSTA
  7286. * but dropped in FW due to any reason (such as unavailability of
  7287. * responder ctxt or any other check).
  7288. */
  7289. A_UINT32 pasn_m1_auth_drop_cnt;
  7290. /** pasn_m2_auth_recv_cnt:
  7291. * Number of M2 auth frames received in FW for PASN from Host driver.
  7292. */
  7293. A_UINT32 pasn_m2_auth_recv_cnt;
  7294. /** pasn_m2_auth_tx_fail_cnt:
  7295. * Number of M2 auth frames received in FW but Tx failed.
  7296. */
  7297. A_UINT32 pasn_m2_auth_tx_fail_cnt;
  7298. /** pasn_m3_auth_recv_cnt:
  7299. * Number of M3 auth frames received for PASN.
  7300. */
  7301. A_UINT32 pasn_m3_auth_recv_cnt;
  7302. /** pasn_m3_auth_drop_cnt:
  7303. * Number of M3 auth frames received for PASN over the air from iSTA but
  7304. * dropped in FW due to any reason.
  7305. */
  7306. A_UINT32 pasn_m3_auth_drop_cnt;
  7307. /** pasn_peer_create_request_cnt:
  7308. * Number of times FW requested PASN peer create request to Host.
  7309. */
  7310. A_UINT32 pasn_peer_create_request_cnt;
  7311. /** pasn_peer_create_timeout_cnt:
  7312. * Number of times PASN peer was not created within timeout period.
  7313. */
  7314. A_UINT32 pasn_peer_create_timeout_cnt;
  7315. /** pasn_peer_created_cnt:
  7316. * Number of times Host sent PASN peer create request to FW.
  7317. */
  7318. A_UINT32 pasn_peer_created_cnt;
  7319. /** sec_ranging_not_supported_mfp_not_setup:
  7320. * management frame protection not setup, drop secure ranging request.
  7321. */
  7322. A_UINT32 sec_ranging_not_supported_mfp_not_setup;
  7323. /** non_sec_ranging_discarded_for_assoc_peer_with_mfpr_set:
  7324. * Non secured ranging request discarded for Assoc peer with MFPR set.
  7325. */
  7326. A_UINT32 non_sec_ranging_discarded_for_assoc_peer_with_mfpr_set;
  7327. /** open_ranging_discarded_with_URNM_MFPR_set_for_pasn_peer:
  7328. * Failure in case non-secured frame is received for PASN peer and
  7329. * URNM_MFPR is set.
  7330. */
  7331. A_UINT32 open_ranging_discarded_with_URNM_MFPR_set_for_pasn_peer;
  7332. /** unassoc_non_pasn_ranging_not_supported_with_URNM_MFPR:
  7333. * Failure in case non-assoc/non-PASN sta is sending open FTMR and
  7334. * RSTA does not support un-secured ranging.
  7335. */
  7336. A_UINT32 unassoc_non_pasn_ranging_not_supported_with_URNM_MFPR;
  7337. /** num_req_bw_20_MHz:
  7338. * Number of requests with BW 20 MHz.
  7339. */
  7340. A_UINT32 num_req_bw_20_MHz;
  7341. /** num_req_bw_40_MHz:
  7342. * Number of requests with BW 40 MHz.
  7343. */
  7344. A_UINT32 num_req_bw_40_MHz;
  7345. /** num_req_bw_80_MHz:
  7346. * Number of requests with BW 80 MHz.
  7347. */
  7348. A_UINT32 num_req_bw_80_MHz;
  7349. /** num_req_bw_160_MHz:
  7350. * Number of requests with BW 160 MHz.
  7351. */
  7352. A_UINT32 num_req_bw_160_MHz;
  7353. /** tx_11az_ftm_successful:
  7354. * Number of 11AZ FTM frames transmitted successfully.
  7355. */
  7356. A_UINT32 tx_11az_ftm_successful;
  7357. /** tx_11az_ftm_failed:
  7358. * Number of 11AZ FTM frames for which Tx failed.
  7359. */
  7360. A_UINT32 tx_11az_ftm_failed;
  7361. /** rx_11az_ftmr_cnt:
  7362. * Number of 11AZ FTM frames received.
  7363. */
  7364. A_UINT32 rx_11az_ftmr_cnt;
  7365. /** rx_11az_ftmr_dup_cnt:
  7366. * Number of duplicate 11az ftmr frames dropped.
  7367. */
  7368. A_UINT32 rx_11az_ftmr_dup_cnt;
  7369. /** rx_11az_iftmr_dup_cnt:
  7370. * Number of duplicate 11az iftmr frames dropped.
  7371. */
  7372. A_UINT32 rx_11az_iftmr_dup_cnt;
  7373. /** malformed_ftmr:
  7374. * Number of malformed FTMR frames received from client leading to
  7375. * frame parse error.
  7376. */
  7377. A_UINT32 malformed_ftmr;
  7378. /** ftmr_drop_ntb_resp_role_not_enabled_cnt:
  7379. * Number of FTMR frames dropped as NTB is not supported for this VAP.
  7380. */
  7381. A_UINT32 ftmr_drop_ntb_resp_role_not_enabled_cnt;
  7382. /** ftmr_drop_tb_resp_role_not_enabled_cnt:
  7383. * Number of FTMR frames dropped as TB is not supported for this VAP.
  7384. */
  7385. A_UINT32 ftmr_drop_tb_resp_role_not_enabled_cnt;
  7386. /** invalid_ftm_request_params:
  7387. * Number of FTMR frames received with invalid params.
  7388. */
  7389. A_UINT32 invalid_ftm_request_params;
  7390. /** requested_bw_format_not_supported:
  7391. * FTMR rejected as requested format is lower or higher than AP's
  7392. * capability, or unknown.
  7393. */
  7394. A_UINT32 requested_bw_format_not_supported;
  7395. /** ntb_unsec_unassoc_mode_ranging_peer_alloc_failed:
  7396. * AST entry creation failed for NTB unsecured mode.
  7397. */
  7398. A_UINT32 ntb_unsec_unassoc_mode_ranging_peer_alloc_failed;
  7399. /** tb_unassoc_unsec_mode_pasn_peer_creation_failed:
  7400. * PASN peer creation failed for unsecured mode TBR.
  7401. */
  7402. A_UINT32 tb_unassoc_unsec_mode_pasn_peer_creation_failed;
  7403. /** num_ranging_sequences_processed:
  7404. * Number of ranging sequences processed for NTB and TB.
  7405. */
  7406. A_UINT32 num_ranging_sequences_processed;
  7407. /** Number of NDPs transmitted for NTBR */
  7408. A_UINT32 ntb_tx_ndp;
  7409. A_UINT32 ndp_rx_cnt;
  7410. /** Number of NDPAs received for 11AZ NTB ranging */
  7411. A_UINT32 num_ntb_ranging_NDPAs_recv;
  7412. /** Number of LMR frames received */
  7413. A_UINT32 recv_lmr;
  7414. /** invalid_ftmr_cnt:
  7415. * Number of invalid FTMR frames received
  7416. * iftmr with null ie element is invalid
  7417. * The Frame is valid if any of the following combination is present:
  7418. * a. LCI sub ie + parameter ie
  7419. * b. LCR sub ie + parameter ie
  7420. * c. parameter ie
  7421. * d. LCI sub ie + LCR sub ie + parameter ie
  7422. */
  7423. A_UINT32 invalid_ftmr_cnt;
  7424. /** Number of times the 'max time b/w measurement' timer got expired */
  7425. A_UINT32 max_time_bw_meas_exp_cnt;
  7426. } htt_stats_pdev_rtt_resp_stats_tlv;
  7427. /* STATS_TYPE: HTT_DBG_EXT_PDEV_RTT_RESP_STATS
  7428. * TLV_TAGS:
  7429. * HTT_STATS_PDEV_RTT_RESP_STATS_TAG
  7430. * HTT_STATS_PDEV_RTT_HW_STATS_TAG
  7431. * HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG
  7432. * HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG
  7433. */
  7434. typedef struct {
  7435. htt_stats_pdev_rtt_resp_stats_tlv pdev_rtt_resp_stats;
  7436. htt_stats_pdev_rtt_hw_stats_tlv pdev_rtt_hw_stats;
  7437. htt_stats_pdev_rtt_tbr_selfgen_queued_stats_tlv pdev_rtt_tbr_selfgen_queued_stats;
  7438. htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv pdev_rtt_tbr_cmd_result_stats;
  7439. } htt_pdev_rtt_resp_stats_t;
  7440. typedef struct {
  7441. htt_tlv_hdr_t tlv_hdr;
  7442. A_UINT32 pdev_id;
  7443. /** tx_11mc_ftmr_cnt:
  7444. * Number of 11mc Fine Timing Measurement request frames transmitted
  7445. * successfully.
  7446. */
  7447. A_UINT32 tx_11mc_ftmr_cnt;
  7448. /** tx_11mc_ftmr_fail:
  7449. * Number of 11mc Fine Timing Measurement request frames not transmitted
  7450. * successfully.
  7451. */
  7452. A_UINT32 tx_11mc_ftmr_fail;
  7453. /** tx_11mc_ftmr_suc_retry:
  7454. * Number of 11mc Fine Timing Measurement request frames transmitted
  7455. * successfully after retrying.
  7456. */
  7457. A_UINT32 tx_11mc_ftmr_suc_retry;
  7458. /** rx_11mc_ftm_cnt:
  7459. * Number of 11mc Fine Timing Measurement frames received, including
  7460. * initial, non-initial, and duplicates.
  7461. */
  7462. A_UINT32 rx_11mc_ftm_cnt;
  7463. /** Count of Ranging Measurement requests received from host */
  7464. A_UINT32 tx_meas_req_count;
  7465. /** Initiator role not supported on the vdev */
  7466. A_UINT32 init_role_not_enabled;
  7467. /** Number of times Initiator context got terminated */
  7468. A_UINT32 initiator_terminate_cnt;
  7469. /** Number of times Tx of FTMR failed */
  7470. A_UINT32 tx_11az_ftmr_fail;
  7471. /** tx_11az_ftmr_start:
  7472. * Number of Fine Timing Measurement start requests transmitted
  7473. * successfully.
  7474. */
  7475. A_UINT32 tx_11az_ftmr_start;
  7476. /** tx_11az_ftmr_stop:
  7477. * Number of Fine Timing Measurement stop requests transmitted
  7478. * successfully.
  7479. */
  7480. A_UINT32 tx_11az_ftmr_stop;
  7481. /** Number of FTM frames received successfully */
  7482. A_UINT32 rx_11az_ftm_cnt;
  7483. /** Number of active ISTA sessions */
  7484. A_UINT32 active_ista;
  7485. /** HE preamble not enabled on Initiator side */
  7486. A_UINT32 invalid_preamble;
  7487. /** Initiator invalid channel bw format */
  7488. A_UINT32 invalid_chan_bw_format;
  7489. /* mgmt_buff_alloc_fail_cnt Management Buffer allocation failure count */
  7490. A_UINT32 mgmt_buff_alloc_fail_cnt;
  7491. /** ftm_parse_failure:
  7492. * Count of FTM frame IE parse failure or RSTA sending measurement
  7493. * negotiation failure.
  7494. */
  7495. A_UINT32 ftm_parse_failure;
  7496. /** Count of NTB/TB ranging negotiation completed successfully */
  7497. A_UINT32 ranging_negotiation_successful_cnt;
  7498. /** incompatible_ftm_params:
  7499. * Number of occurrences of failure due to incompatible parameters
  7500. * suggested by rSTA during negotiation.
  7501. */
  7502. A_UINT32 incompatible_ftm_params;
  7503. /** sec_ranging_req_in_open_mode:
  7504. * Number of occurrences of failure if BSS peer exists in open mode and
  7505. * secured mode RTT ranging is requested.
  7506. */
  7507. A_UINT32 sec_ranging_req_in_open_mode;
  7508. /** ftmr_tx_failed_null_11az_peer:
  7509. * Number of occurrences where FTMR was not transmitted as there was
  7510. * no 11AZ peer.
  7511. */
  7512. A_UINT32 ftmr_tx_failed_null_11az_peer;
  7513. /** Number of times ftmr retry timed out */
  7514. A_UINT32 ftmr_retry_timeout;
  7515. /** Number of times the 'max time b/w measurement' timer got expired */
  7516. A_UINT32 max_time_bw_meas_exp_cnt;
  7517. /** tb_meas_duration_expiry_cnt:
  7518. * Number of times TBR measurement duration expired.
  7519. */
  7520. A_UINT32 tb_meas_duration_expiry_cnt;
  7521. /** num_tb_ranging_requests:
  7522. * Number of TB ranging requests ready for negotiation.
  7523. */
  7524. A_UINT32 num_tb_ranging_requests;
  7525. /** Number of times NTB ranging was triggered successfully */
  7526. A_UINT32 ntbr_triggered_successfully;
  7527. /** Number of times NTB ranging failed to be triggered */
  7528. A_UINT32 ntbr_trigger_failed;
  7529. /** No valid index found for programming vreg settings */
  7530. A_UINT32 invalid_or_no_vreg_idx;
  7531. /** Number of times VREG setting failed */
  7532. A_UINT32 set_vreg_params_failed;
  7533. /** Number of occurrences of SAC mismatch */
  7534. A_UINT32 sac_mismatch;
  7535. /** pasn_m1_auth_recv_cnt:
  7536. * Number of M1 auth frames received for PASN from Host.
  7537. */
  7538. A_UINT32 pasn_m1_auth_recv_cnt;
  7539. /** pasn_m1_auth_tx_fail_cnt:
  7540. * Number of M1 auth frames received in FW but Tx failed.
  7541. */
  7542. A_UINT32 pasn_m1_auth_tx_fail_cnt;
  7543. /** pasn_m2_auth_recv_cnt:
  7544. * Number of M2 auth frames received in FW for PASN over the air from rSTA.
  7545. */
  7546. A_UINT32 pasn_m2_auth_recv_cnt;
  7547. /** pasn_m2_auth_drop_cnt:
  7548. * Number of M2 auth frames received in FW but dropped due to any reason.
  7549. */
  7550. A_UINT32 pasn_m2_auth_drop_cnt;
  7551. /** pasn_m3_auth_recv_cnt:
  7552. * Number of M3 auth frames received for PASN from Host.
  7553. */
  7554. A_UINT32 pasn_m3_auth_recv_cnt;
  7555. /** pasn_m3_auth_tx_fail_cnt:
  7556. * Number of M3 auth frames received in FW but Tx failed.
  7557. */
  7558. A_UINT32 pasn_m3_auth_tx_fail_cnt;
  7559. /** pasn_peer_create_request_cnt:
  7560. * Number of times FW requested PASN peer create request to Host.
  7561. */
  7562. A_UINT32 pasn_peer_create_request_cnt;
  7563. /** pasn_peer_create_timeout_cnt:
  7564. * Number of times PASN peer was not created within timeout period.
  7565. */
  7566. A_UINT32 pasn_peer_create_timeout_cnt;
  7567. /** pasn_peer_created_cnt:
  7568. * Number of times Host sent PASN peer create request to FW.
  7569. */
  7570. A_UINT32 pasn_peer_created_cnt;
  7571. /** Number of occurrences of Tx of NDPA failing */
  7572. A_UINT32 ntbr_ndpa_failed;
  7573. /** ntbr_sequence_successful:
  7574. * The NDPA, NDP and LMR exchanges are successful and sched cmd status
  7575. * is 0.
  7576. */
  7577. A_UINT32 ntbr_sequence_successful;
  7578. /** ntbr_ndp_failed:
  7579. * Number of occurrences of NDPA being transmitted successfully
  7580. * but NDP failing for NTB ranging.
  7581. */
  7582. A_UINT32 ntbr_ndp_failed;
  7583. /** sch_cmd_status_cnts:
  7584. * Elements 0-7 count the number of times the sch_cmd_status was equal to
  7585. * the corresponding value of the index of the array sch_cmd_status_cnts[],
  7586. * and element 8 counts the numbers of times the status was some other
  7587. * value >=8.
  7588. */
  7589. A_UINT32 sch_cmd_status_cnts[9];
  7590. /** Number of times LMR reception timed out */
  7591. A_UINT32 lmr_timeout;
  7592. /** Number of LMR frames received */
  7593. A_UINT32 lmr_recv;
  7594. /** Number of trigger frames received */
  7595. A_UINT32 num_trigger_frames_received;
  7596. /** Number of NDPAs received for TBR */
  7597. A_UINT32 num_tb_ranging_NDPAs_recv;
  7598. /** Number of ranging NDPs received for NTBR/TB */
  7599. A_UINT32 ndp_rx_cnt;
  7600. } htt_stats_pdev_rtt_init_stats_tlv;
  7601. /* STATS_TYPE: HTT_DBG_EXT_PDEV_RTT_INITIATOR_STATS
  7602. * TLV_TAGS:
  7603. * HTT_STATS_PDEV_RTT_INIT_STATS_TAG
  7604. * HTT_STATS_PDEV_RTT_HW_STATS_TAG
  7605. */
  7606. typedef struct {
  7607. htt_stats_pdev_rtt_init_stats_tlv pdev_rtt_init_stats;
  7608. htt_stats_pdev_rtt_hw_stats_tlv pdev_rtt_hw_stats;
  7609. } htt_pdev_rtt_init_stats_t;
  7610. /* STATS_TYPE : HTT_DBG_EXT_PKTLOG_AND_HTT_RING_STATS
  7611. * TLV_TAGS:
  7612. * - HTT_STATS_PKTLOG_AND_HTT_RING_STATS_TAG
  7613. */
  7614. /* NOTE:
  7615. * This structure is for documentation, and cannot be safely used directly.
  7616. * Instead, use the constituent TLV structures to fill/parse.
  7617. */
  7618. typedef struct {
  7619. htt_tlv_hdr_t tlv_hdr;
  7620. /** No of pktlog payloads that were dropped in htt_ppdu_stats path */
  7621. A_UINT32 pktlog_lite_drop_cnt;
  7622. /** No of pktlog payloads that were dropped in TQM path */
  7623. A_UINT32 pktlog_tqm_drop_cnt;
  7624. /** No of pktlog ppdu stats payloads that were dropped */
  7625. A_UINT32 pktlog_ppdu_stats_drop_cnt;
  7626. /** No of pktlog ppdu ctrl payloads that were dropped */
  7627. A_UINT32 pktlog_ppdu_ctrl_drop_cnt;
  7628. /** No of pktlog sw events payloads that were dropped */
  7629. A_UINT32 pktlog_sw_events_drop_cnt;
  7630. } htt_stats_pktlog_and_htt_ring_stats_tlv;
  7631. /* preserve old name alias for new name consistent with the tag name */
  7632. typedef htt_stats_pktlog_and_htt_ring_stats_tlv
  7633. htt_pktlog_and_htt_ring_stats_tlv;
  7634. #define HTT_DLPAGER_STATS_MAX_HIST 10
  7635. #define HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_M 0x000000FF
  7636. #define HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_S 0
  7637. #define HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_M 0x0000FF00
  7638. #define HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_S 8
  7639. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_M 0x0000FFFF
  7640. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_S 0
  7641. #define HTT_DLPAGER_TOTAL_FREE_PAGES_M 0xFFFF0000
  7642. #define HTT_DLPAGER_TOTAL_FREE_PAGES_S 16
  7643. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_M 0x0000FFFF
  7644. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_S 0
  7645. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_M 0xFFFF0000
  7646. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_S 16
  7647. #define HTT_DLPAGER_ASYNC_LOCK_PAGE_COUNT_GET(_var) \
  7648. (((_var) & HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_M) >> \
  7649. HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_S)
  7650. #define HTT_DLPAGER_ASYNC_LOCK_PAGE_COUNT_SET(_var, _val) \
  7651. do { \
  7652. HTT_CHECK_SET_VAL(HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT, _val); \
  7653. ((_var) &= ~(HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_M));\
  7654. ((_var) |= ((_val) << HTT_DLPAGER_ASYNC_LOCKED_PAGE_COUNT_S)); \
  7655. } while (0)
  7656. #define HTT_DLPAGER_SYNC_LOCK_PAGE_COUNT_GET(_var) \
  7657. (((_var) & HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_M) >> \
  7658. HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_S)
  7659. #define HTT_DLPAGER_SYNC_LOCK_PAGE_COUNT_SET(_var, _val) \
  7660. do { \
  7661. HTT_CHECK_SET_VAL(HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT, _val); \
  7662. ((_var) &= ~(HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_M));\
  7663. ((_var) |= ((_val) << HTT_DLPAGER_SYNC_LOCKED_PAGE_COUNT_S)); \
  7664. } while (0)
  7665. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_GET(_var) \
  7666. (((_var) & HTT_DLPAGER_TOTAL_LOCKED_PAGES_M) >> \
  7667. HTT_DLPAGER_TOTAL_LOCKED_PAGES_S)
  7668. #define HTT_DLPAGER_TOTAL_LOCKED_PAGES_SET(_var, _val) \
  7669. do { \
  7670. HTT_CHECK_SET_VAL(HTT_DLPAGER_TOTAL_LOCKED_PAGES, _val); \
  7671. ((_var) &= ~(HTT_DLPAGER_TOTAL_LOCKED_PAGES_M)); \
  7672. ((_var) |= ((_val) << HTT_DLPAGER_TOTAL_LOCKED_PAGES_S)); \
  7673. } while (0)
  7674. #define HTT_DLPAGER_TOTAL_FREE_PAGES_GET(_var) \
  7675. (((_var) & HTT_DLPAGER_TOTAL_FREE_PAGES_M) >> \
  7676. HTT_DLPAGER_TOTAL_FREE_PAGES_S)
  7677. #define HTT_DLPAGER_TOTAL_FREE_PAGES_SET(_var, _val) \
  7678. do { \
  7679. HTT_CHECK_SET_VAL(HTT_DLPAGER_TOTAL_FREE_PAGES, _val); \
  7680. ((_var) &= ~(HTT_DLPAGER_TOTAL_FREE_PAGES_M)); \
  7681. ((_var) |= ((_val) << HTT_DLPAGER_TOTAL_FREE_PAGES_S)); \
  7682. } while (0)
  7683. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_GET(_var) \
  7684. (((_var) & HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_M) >> \
  7685. HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_S)
  7686. #define HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_SET(_var, _val) \
  7687. do { \
  7688. HTT_CHECK_SET_VAL(HTT_DLPAGER_LAST_LOCKED_PAGE_IDX, _val); \
  7689. ((_var) &= ~(HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_M)); \
  7690. ((_var) |= ((_val) << HTT_DLPAGER_LAST_LOCKED_PAGE_IDX_S)); \
  7691. } while (0)
  7692. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_GET(_var) \
  7693. (((_var) & HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_M) >> \
  7694. HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_S)
  7695. #define HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_SET(_var, _val) \
  7696. do { \
  7697. HTT_CHECK_SET_VAL(HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX, _val); \
  7698. ((_var) &= ~(HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_M)); \
  7699. ((_var) |= ((_val) << HTT_DLPAGER_LAST_UNLOCKED_PAGE_IDX_S)); \
  7700. } while (0)
  7701. enum {
  7702. HTT_STATS_PAGE_LOCKED = 0,
  7703. HTT_STATS_PAGE_UNLOCKED = 1,
  7704. HTT_STATS_NUM_PAGE_LOCK_STATES
  7705. };
  7706. /* dlPagerStats structure
  7707. * Number of lock/unlock pages with last 10 lock/unlock occurrences are recorded */
  7708. typedef struct{
  7709. /** msg_dword_1 bitfields:
  7710. * async_lock : 8,
  7711. * sync_lock : 8,
  7712. * reserved : 16;
  7713. */
  7714. A_UINT32 msg_dword_1;
  7715. /** mst_dword_2 bitfields:
  7716. * total_locked_pages : 16,
  7717. * total_free_pages : 16;
  7718. */
  7719. A_UINT32 msg_dword_2;
  7720. /** msg_dword_3 bitfields:
  7721. * last_locked_page_idx : 16,
  7722. * last_unlocked_page_idx : 16;
  7723. */
  7724. A_UINT32 msg_dword_3;
  7725. struct {
  7726. A_UINT32 page_num;
  7727. A_UINT32 num_of_pages;
  7728. /** timestamp is in microsecond units, from SoC timer clock */
  7729. A_UINT32 timestamp_lsbs;
  7730. A_UINT32 timestamp_msbs;
  7731. } last_pages_info[HTT_STATS_NUM_PAGE_LOCK_STATES][HTT_DLPAGER_STATS_MAX_HIST];
  7732. } htt_dl_pager_stats_tlv;
  7733. /* NOTE:
  7734. * This structure is for documentation, and cannot be safely used directly.
  7735. * Instead, use the constituent TLV structures to fill/parse.
  7736. * STATS_TYPE : HTT_DBG_EXT_STATS_DLPAGER_STATS
  7737. * TLV_TAGS:
  7738. * - HTT_STATS_DLPAGER_STATS_TAG
  7739. */
  7740. typedef struct {
  7741. htt_tlv_hdr_t tlv_hdr;
  7742. htt_dl_pager_stats_tlv dl_pager_stats;
  7743. } htt_stats_dlpager_stats_tlv;
  7744. /* preserve old name alias for new name consistent with the tag name */
  7745. typedef htt_stats_dlpager_stats_tlv htt_dlpager_stats_t;
  7746. /*======= PHY STATS ====================*/
  7747. /*
  7748. * STATS TYPE : HTT_DBG_EXT_PHY_COUNTERS_AND_PHY_STATS
  7749. * TLV_TAGS:
  7750. * - HTT_STATS_PHY_COUNTERS_TAG
  7751. * - HTT_STATS_PHY_STATS_TAG
  7752. */
  7753. #define HTT_MAX_RX_PKT_CNT 8
  7754. #define HTT_MAX_RX_PKT_CRC_PASS_CNT 8
  7755. #define HTT_MAX_PER_BLK_ERR_CNT 20
  7756. #define HTT_MAX_RX_OTA_ERR_CNT 14
  7757. #define HTT_MAX_RX_PKT_CNT_EXT 4
  7758. #define HTT_MAX_RX_PKT_CRC_PASS_CNT_EXT 4
  7759. #define HTT_MAX_RX_PKT_MU_CNT 14
  7760. #define HTT_MAX_TX_PKT_CNT 10
  7761. #define HTT_MAX_PHY_TX_ABORT_CNT 10
  7762. typedef enum {
  7763. HTT_STATS_CHANNEL_HALF_RATE = 0x0001, /* Half rate */
  7764. HTT_STATS_CHANNEL_QUARTER_RATE = 0x0002, /* Quarter rate */
  7765. HTT_STATS_CHANNEL_DFS = 0x0004, /* Enable radar event reporting */
  7766. HTT_STATS_CHANNEL_HOME = 0x0008, /* Home channel */
  7767. HTT_STATS_CHANNEL_PASSIVE_SCAN = 0x0010, /*Passive Scan */
  7768. HTT_STATS_CHANNEL_DFS_SAP_NOT_UP = 0x0020, /* set when VDEV_START_REQUEST, clear when VDEV_UP */
  7769. HTT_STATS_CHANNEL_PASSIVE_SCAN_CAL = 0x0040, /* need to do passive scan calibration to avoid "spikes" */
  7770. HTT_STATS_CHANNEL_DFS_SAP_UP = 0x0080, /* DFS master */
  7771. HTT_STATS_CHANNEL_DFS_CFREQ2 = 0x0100, /* Enable radar event reporting for sec80 in VHT80p80 */
  7772. HTT_STATS_CHANNEL_DTIM_SYNTH = 0x0200, /* Enable DTIM */
  7773. HTT_STATS_CHANNEL_FORCE_GAIN = 0x0400, /* Force gain mmode (only used for FTM) */
  7774. HTT_STATS_CHANNEL_PERFORM_NF_CAL = 0x0800, /* Perform NF cal in channel change (only used for FTM) */
  7775. HTT_STATS_CHANNEL_165_MODE_0 = 0x1000, /* 165 MHz mode 0 */
  7776. HTT_STATS_CHANNEL_165_MODE_1 = 0x2000, /* 165 MHz mode 1 */
  7777. HTT_STATS_CHANNEL_165_MODE_2 = 0x3000, /* 165 MHz mode 2 */
  7778. HTT_STATS_CHANNEL_165_MODE_MASK = 0x3000, /* 165 MHz 2-bit mode mask */
  7779. } HTT_STATS_CHANNEL_FLAGS;
  7780. typedef enum {
  7781. HTT_STATS_RF_MODE_MIN = 0,
  7782. HTT_STATS_RF_MODE_PHYA_ONLY = 0, // only PHYA is active
  7783. HTT_STATS_RF_MODE_DBS = 1, // PHYA/5G and PHYB/2G
  7784. HTT_STATS_RF_MODE_SBS = 2, // PHYA/5G and PHYB/5G in HL/NPR; PHYA0/5G and PHYA1/5G in HK
  7785. HTT_STATS_RF_MODE_PHYB_ONLY = 3, // only PHYB is active
  7786. HTT_STATS_RF_MODE_DBS_SBS = 4, // PHYA0/5G, PHYA1/5G and PHYB/2G in HK (the 2 5G are in different channel)
  7787. HTT_STATS_RF_MODE_DBS_OR_SBS = 5, // PHYA0/5G, PHYA1/5G and PHYB/5G or 2G in HK
  7788. HTT_STATS_RF_MODE_INVALID = 0xff,
  7789. } HTT_STATS_RF_MODE;
  7790. typedef enum {
  7791. HTT_STATS_RESET_CAUSE_FIRST_RESET = 0x00000001, /* First reset by application */
  7792. HTT_STATS_RESET_CAUSE_ERROR = 0x00000002, /* Triggered due to error */
  7793. HTT_STATS_RESET_CAUSE_DEEP_SLEEP = 0x00000004, /* Reset after deep sleep */
  7794. HTT_STATS_RESET_CAUSE_FULL_RESET = 0x00000008, /* Full reset without any optimizations */
  7795. HTT_STATS_RESET_CAUSE_CHANNEL_CHANGE = 0x00000010, /* For normal channel change */
  7796. HTT_STATS_RESET_CAUSE_BAND_CHANGE = 0x00000020, /* Triggered due to band change */
  7797. HTT_STATS_RESET_CAUSE_DO_CAL = 0x00000040, /* Triggered due to calibrations */
  7798. HTT_STATS_RESET_CAUSE_MCI_ERROR = 0x00000080, /* Triggered due to MCI ERROR */
  7799. HTT_STATS_RESET_CAUSE_CHWIDTH_CHANGE = 0x00000100, /* Triggered due to channel width change */
  7800. HTT_STATS_RESET_CAUSE_WARM_RESTORE_CAL = 0x00000200, /* Triggered due to warm reset we want to just restore calibrations */
  7801. HTT_STATS_RESET_CAUSE_COLD_RESTORE_CAL = 0x00000400, /* Triggered due to cold reset we want to just restore calibrations */
  7802. HTT_STATS_RESET_CAUSE_PHY_WARM_RESET = 0x00000800, /* Triggered due to phy warm reset we want to just restore calibrations */
  7803. HTT_STATS_RESET_CAUSE_M3_SSR = 0x00001000, /* Triggered due to SSR Restart */
  7804. HTT_STATS_RESET_CAUSE_FORCE_CAL = 0x00002000, /* Reset to force the calibration */
  7805. /* 0x00004000, 0x00008000 reserved */
  7806. HTT_STATS_NO_RESET_CHANNEL_CHANGE = 0x00010000, /* No reset, normal channel change */
  7807. HTT_STATS_NO_RESET_BAND_CHANGE = 0x00020000, /* No reset, channel change across band */
  7808. HTT_STATS_NO_RESET_CHWIDTH_CHANGE = 0x00040000, /* No reset, channel change across channel width */
  7809. HTT_STATS_NO_RESET_CHAINMASK_CHANGE = 0x00080000, /* No reset, chainmask change */
  7810. HTT_STATS_RESET_CAUSE_PHY_WARM_RESET_UCODE_TRIG = 0x00100000, /* Triggered due to phy warm reset we want to just restore calibrations */
  7811. HTT_STATS_RESET_CAUSE_PHY_OFF_TIMEOUT_RESET = 0x00200000, /* Reset ucode because phy off ack timeout*/
  7812. HTT_STATS_RESET_CAUSE_LMAC_RESET_UMAC_NOC_ERR = 0x00400000, /* LMAC reset triggered due to NOC Address/Slave error originating at LMAC */
  7813. HTT_STATS_NO_RESET_SCAN_BACK_TO_SAME_HOME_CHANNEL_CHANGE = 0x00800000, /* No reset, scan to home channel change */
  7814. } HTT_STATS_RESET_CAUSE;
  7815. typedef enum {
  7816. HTT_CHANNEL_RATE_FULL,
  7817. HTT_CHANNEL_RATE_HALF,
  7818. HTT_CHANNEL_RATE_QUARTER,
  7819. HTT_CHANNEL_RATE_COUNT
  7820. } HTT_CHANNEL_RATE;
  7821. typedef enum {
  7822. HTT_PHY_BW_IDX_20MHz = 0,
  7823. HTT_PHY_BW_IDX_40MHz = 1,
  7824. HTT_PHY_BW_IDX_80MHz = 2,
  7825. HTT_PHY_BW_IDX_80Plus80 = 3,
  7826. HTT_PHY_BW_IDX_160MHz = 4,
  7827. HTT_PHY_BW_IDX_10MHz = 5,
  7828. HTT_PHY_BW_IDX_5MHz = 6,
  7829. HTT_PHY_BW_IDX_165MHz = 7,
  7830. } HTT_PHY_BW_IDX;
  7831. typedef enum {
  7832. HTT_WHAL_CONFIG_NONE = 0x00000000,
  7833. HTT_WHAL_CONFIG_NF_WAR = 0x00000001,
  7834. HTT_WHAL_CONFIG_CAL_WAR = 0x00000002,
  7835. HTT_WHAL_CONFIG_DO_NF_CAL = 0x00000004,
  7836. HTT_WHAL_CONFIG_SET_WAIT_FOR_NF_CAL = 0x00000008,
  7837. HTT_WHAL_CONFIG_FORCED_TX_PWR = 0x00000010,
  7838. HTT_WHAL_CONFIG_FORCED_GAIN_IDX = 0x00000020,
  7839. HTT_WHAL_CONFIG_FORCED_PER_CHAIN = 0x00000040,
  7840. } HTT_WHAL_CONFIG;
  7841. typedef struct {
  7842. htt_tlv_hdr_t tlv_hdr;
  7843. /** number of RXTD OFDMA OTA error counts except power surge and drop */
  7844. A_UINT32 rx_ofdma_timing_err_cnt;
  7845. /** rx_cck_fail_cnt:
  7846. * number of cck error counts due to rx reception failure because of
  7847. * timing error in cck
  7848. */
  7849. A_UINT32 rx_cck_fail_cnt;
  7850. /** number of times tx abort initiated by mac */
  7851. A_UINT32 mactx_abort_cnt;
  7852. /** number of times rx abort initiated by mac */
  7853. A_UINT32 macrx_abort_cnt;
  7854. /** number of times tx abort initiated by phy */
  7855. A_UINT32 phytx_abort_cnt;
  7856. /** number of times rx abort initiated by phy */
  7857. A_UINT32 phyrx_abort_cnt;
  7858. /** number of rx deferred count initiated by phy */
  7859. A_UINT32 phyrx_defer_abort_cnt;
  7860. /** number of sizing events generated at LSTF */
  7861. A_UINT32 rx_gain_adj_lstf_event_cnt; /* a.k.a sizing1 */
  7862. /** number of sizing events generated at non-legacy LTF */
  7863. A_UINT32 rx_gain_adj_non_legacy_cnt; /* a.k.a sizing2 */
  7864. /** rx_pkt_cnt -
  7865. * Received EOP (end-of-packet) count per packet type;
  7866. * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF
  7867. * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE
  7868. */
  7869. A_UINT32 rx_pkt_cnt[HTT_MAX_RX_PKT_CNT];
  7870. /** rx_pkt_crc_pass_cnt -
  7871. * Received EOP (end-of-packet) count per packet type;
  7872. * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF
  7873. * [6] = EHT; [7]=RSVD; [6] = Applicable only for BE
  7874. */
  7875. A_UINT32 rx_pkt_crc_pass_cnt[HTT_MAX_RX_PKT_CRC_PASS_CNT];
  7876. /** per_blk_err_cnt -
  7877. * Error count per error source;
  7878. * [0] = unknown; [1] = LSIG; [2] = HTSIG; [3] = VHTSIG; [4] = HESIG;
  7879. * [5] = RXTD_OTA; [6] = RXTD_FATAL; [7] = DEMF; [8] = ROBE;
  7880. * [9] = PMI; [10] = TXFD; [11] = TXTD; [12] = PHYRF
  7881. * [13-19]=RSVD
  7882. */
  7883. A_UINT32 per_blk_err_cnt[HTT_MAX_PER_BLK_ERR_CNT];
  7884. /** rx_ota_err_cnt -
  7885. * RXTD OTA (over-the-air) error count per error reason;
  7886. * [0] = voting fail; [1] = weak det fail; [2] = strong sig fail;
  7887. * [3] = cck fail; [4] = power surge; [5] = power drop;
  7888. * [6] = btcf timing timeout error; [7] = btcf packet detect error;
  7889. * [8] = coarse timing timeout error
  7890. * [9-13]=RSVD
  7891. */
  7892. A_UINT32 rx_ota_err_cnt[HTT_MAX_RX_OTA_ERR_CNT];
  7893. /** rx_pkt_cnt_ext -
  7894. * Received EOP (end-of-packet) count per packet type for BE;
  7895. * [0] = WUR; [1] = AZ; [2-3]=RVSD
  7896. */
  7897. A_UINT32 rx_pkt_cnt_ext[HTT_MAX_RX_PKT_CNT_EXT];
  7898. /** rx_pkt_crc_pass_cnt_ext -
  7899. * Received EOP (end-of-packet) count per packet type for BE;
  7900. * [0] = WUR; [1] = AZ; [2-3]=RVSD
  7901. */
  7902. A_UINT32 rx_pkt_crc_pass_cnt_ext[HTT_MAX_RX_PKT_CRC_PASS_CNT_EXT];
  7903. /** rx_pkt_mu_cnt -
  7904. * RX MU MIMO+OFDMA packet count per packet type for BE;
  7905. * [0] = 11ax OFDMA; [1] = 11ax OFDMA+MUMIMO; [2] = 11be OFDMA;
  7906. * [3] = 11be OFDMA+MUMIMO; [4] = 11ax MIMO; [5] = 11be MIMO;
  7907. * [6] = 11ax OFDMA; [7] = 11ax OFDMA+MUMIMO; [8] = 11be OFDMA;
  7908. * [9] = 11be OFDMA+MUMIMO; [10] = 11ax MIMO; [11] = 11be MIMO;
  7909. * [12-13]=RSVD
  7910. */
  7911. A_UINT32 rx_pkt_mu_cnt[HTT_MAX_RX_PKT_MU_CNT];
  7912. /** tx_pkt_cnt -
  7913. * num of transfered packet count per packet type;
  7914. * [0] = 11a; [1] = 11b; [2] = 11n; [3] = 11ac; [4] = 11ax; [5] = GF;
  7915. * [6]= EHT; [7] = WUR; [8] = AZ; [9]=RSVD; [6-8] = Applicable only for BE
  7916. */
  7917. A_UINT32 tx_pkt_cnt[HTT_MAX_TX_PKT_CNT];
  7918. /** phy_tx_abort_cnt -
  7919. * phy tx abort after each tlv;
  7920. * [0] = PRE-PHY desc tlv; [1] = PHY desc tlv; [2] = LSIGA tlv;
  7921. * [3] = LSIGB tlv; [4] = Per User tlv; [5] = HESIGB tlv;
  7922. * [6] = Service tlv; [7] = Tx Packet End tlv; [8-9]=RSVD;
  7923. */
  7924. A_UINT32 phy_tx_abort_cnt[HTT_MAX_PHY_TX_ABORT_CNT];
  7925. } htt_stats_phy_counters_tlv;
  7926. /* preserve old name alias for new name consistent with the tag name */
  7927. typedef htt_stats_phy_counters_tlv htt_phy_counters_tlv;
  7928. typedef struct {
  7929. htt_tlv_hdr_t tlv_hdr;
  7930. /** per chain hw noise floor values in dBm */
  7931. A_INT32 nf_chain[HTT_STATS_MAX_CHAINS];
  7932. /** number of false radars detected */
  7933. A_UINT32 false_radar_cnt;
  7934. /** number of channel switches happened due to radar detection */
  7935. A_UINT32 radar_cs_cnt;
  7936. /** ani_level -
  7937. * ANI level (noise interference) corresponds to the channel
  7938. * the desense levels range from -5 to 15 in dB units,
  7939. * higher values indicating more noise interference.
  7940. */
  7941. A_INT32 ani_level;
  7942. /** running time in minutes since FW boot */
  7943. A_UINT32 fw_run_time;
  7944. /** per chain runtime noise floor values in dBm */
  7945. A_INT32 runTime_nf_chain[HTT_STATS_MAX_CHAINS];
  7946. /** DFS SW based progressive stats - start **/
  7947. /* current AP operating bandwidth (refer to WLAN_PHY_MODE) */
  7948. A_UINT32 current_OBW;
  7949. /* current AP device bandwidth (refer to WLAN_PHY_MODE) */
  7950. A_UINT32 current_DBW;
  7951. /* last_radar_type: last detected radar type
  7952. * This last_radar_type field contains a value whose meaning is not
  7953. * exposed to the host; this field is only provided for debug purposes.
  7954. */
  7955. A_UINT32 last_radar_type;
  7956. /* dfs_reg_domain: curent DFS regulatory domain
  7957. * This dfs_reg_domain field contains a value whose meaning is not
  7958. * exposed to the host; this field is only provided for debug purposes.
  7959. */
  7960. A_UINT32 dfs_reg_domain;
  7961. /* radar_mask_bit: Radar mask setting programmed in HW registers.
  7962. * Each bit represents a 20 MHz portion of the channel.
  7963. * Bit 0 represents the highest 20 MHz portion within the channel.
  7964. * For example...
  7965. * For a 80 MHz channel, bit0 = highest 20 MHz, bit3 = lowest 20 MHz
  7966. * For a 320 MHz channel, bit0 = highest 20 MHz, bit15 = lowest 20 MHz
  7967. */
  7968. A_UINT32 radar_mask_bit;
  7969. /* DFS radar rssi threshold (units = dBm) */
  7970. A_INT32 radar_rssi;
  7971. /* DFS global flags (refer to IEEE80211_CHAN_* defines) */
  7972. A_UINT32 radar_dfs_flags;
  7973. /* band center frequency of operating bandwidth (units = MHz) */
  7974. A_UINT32 band_center_frequency_OBW;
  7975. /* band center frequency of device bandwidth (units = MHz) */
  7976. A_UINT32 band_center_frequency_DBW;
  7977. /** DFS SW based progressive stats - end **/
  7978. } htt_stats_phy_stats_tlv;
  7979. /* preserve old name alias for new name consistent with the tag name */
  7980. typedef htt_stats_phy_stats_tlv htt_phy_stats_tlv;
  7981. typedef struct {
  7982. htt_tlv_hdr_t tlv_hdr;
  7983. /** current pdev_id */
  7984. A_UINT32 pdev_id;
  7985. /** current channel information */
  7986. A_UINT32 chan_mhz;
  7987. /** center_freq1, center_freq2 in mhz */
  7988. A_UINT32 chan_band_center_freq1;
  7989. A_UINT32 chan_band_center_freq2;
  7990. /** chan_phy_mode - WLAN_PHY_MODE enum type */
  7991. A_UINT32 chan_phy_mode;
  7992. /** chan_flags follows HTT_STATS_CHANNEL_FLAGS enum */
  7993. A_UINT32 chan_flags;
  7994. /** channel Num updated to virtual phybase */
  7995. A_UINT32 chan_num;
  7996. /** Cause for the phy reset - HTT_STATS_RESET_CAUSE */
  7997. A_UINT32 reset_cause;
  7998. /** Cause for the previous phy reset */
  7999. A_UINT32 prev_reset_cause;
  8000. /** source for the phywarm reset - HTT_STATS_RESET_CAUSE */
  8001. A_UINT32 phy_warm_reset_src;
  8002. /** rxGain Table selection mode - register settings
  8003. * 0 - Auto, 1/2 - Forced with and without BT override respectively
  8004. */
  8005. A_UINT32 rx_gain_tbl_mode;
  8006. /** current xbar value - perchain analog to digital idx mapping */
  8007. A_UINT32 xbar_val;
  8008. /** Flag to indicate forced calibration */
  8009. A_UINT32 force_calibration;
  8010. /** current RF mode (e.g. SBS/DBS) - follows HTT_STATS_RF_MODE enum */
  8011. A_UINT32 phyrf_mode;
  8012. /* PDL phyInput stats */
  8013. /** homechannel flag
  8014. * 1- Homechan, 0 - scan channel
  8015. */
  8016. A_UINT32 phy_homechan;
  8017. /** Tx and Rx chainmask */
  8018. A_UINT32 phy_tx_ch_mask;
  8019. A_UINT32 phy_rx_ch_mask;
  8020. /** INI masks - to decide the INI registers to be loaded on a reset */
  8021. A_UINT32 phybb_ini_mask;
  8022. A_UINT32 phyrf_ini_mask;
  8023. /** DFS,ADFS/Spectral scan enable masks */
  8024. A_UINT32 phy_dfs_en_mask;
  8025. A_UINT32 phy_sscan_en_mask;
  8026. A_UINT32 phy_synth_sel_mask;
  8027. A_UINT32 phy_adfs_freq;
  8028. /** CCK FIR settings
  8029. * register settings - filter coefficients for Iqs conversion
  8030. * [31:24] = FIR_COEFF_3_0
  8031. * [23:16] = FIR_COEFF_2_0
  8032. * [15:8] = FIR_COEFF_1_0
  8033. * [7:0] = FIR_COEFF_0_0
  8034. */
  8035. A_UINT32 cck_fir_settings;
  8036. /** dynamic primary channel index
  8037. * primary 20MHz channel index on the current channel BW
  8038. */
  8039. A_UINT32 phy_dyn_pri_chan;
  8040. /**
  8041. * Current CCA detection threshold
  8042. * dB above noisefloor req for CCA
  8043. * Register settings for all subbands
  8044. */
  8045. A_UINT32 cca_thresh;
  8046. /**
  8047. * status for dynamic CCA adjustment
  8048. * 0-disabled, 1-enabled
  8049. */
  8050. A_UINT32 dyn_cca_status;
  8051. /** RXDEAF Register value
  8052. * rxdesense_thresh_sw - VREG Register
  8053. * rxdesense_thresh_hw - PHY Register
  8054. */
  8055. A_UINT32 rxdesense_thresh_sw;
  8056. A_UINT32 rxdesense_thresh_hw;
  8057. /** Current PHY Bandwidth -
  8058. * values are specified by the HTT_PHY_BW_IDX enum type
  8059. */
  8060. A_UINT32 phy_bw_code;
  8061. /** Current channel operating rate -
  8062. * values are specified by the HTT_CHANNEL_RATE enum type
  8063. */
  8064. A_UINT32 phy_rate_mode;
  8065. /** current channel operating band
  8066. * 0 - 5G; 1 - 2G; 2 -6G
  8067. */
  8068. A_UINT32 phy_band_code;
  8069. /** microcode processor virtual phy base address -
  8070. * provided only for debug
  8071. */
  8072. A_UINT32 phy_vreg_base;
  8073. /** microcode processor virtual phy base ext address -
  8074. * provided only for debug
  8075. */
  8076. A_UINT32 phy_vreg_base_ext;
  8077. /** HW LUT table configuration for home/scan channel -
  8078. * provided only for debug
  8079. */
  8080. A_UINT32 cur_table_index;
  8081. /** SW configuration flag for PHY reset and Calibrations -
  8082. * values are specified by the HTT_WHAL_CONFIG enum type
  8083. */
  8084. A_UINT32 whal_config_flag;
  8085. /** nfcal_iteration_counts:
  8086. * iteration count for Home/Scan/Periodic Noise Floor calibrations
  8087. * nfcal_iteration_counts[0] - home NF iteration counter
  8088. * nfcal_iteration_counts[1] - scan NF iteration counter
  8089. * nfcal_iteration_counts[2] - periodic NF iteration counter
  8090. * These counters are not reset automatically; they are only reset
  8091. * when explicitly requested by the host.
  8092. */
  8093. A_UINT32 nfcal_iteration_counts[3];
  8094. } htt_stats_phy_reset_stats_tlv;
  8095. /* preserve old name alias for new name consistent with the tag name */
  8096. typedef htt_stats_phy_reset_stats_tlv htt_phy_reset_stats_tlv;
  8097. typedef struct {
  8098. htt_tlv_hdr_t tlv_hdr;
  8099. /** current pdev_id */
  8100. A_UINT32 pdev_id;
  8101. /** ucode PHYOFF pass/failure count */
  8102. A_UINT32 cf_active_low_fail_cnt;
  8103. A_UINT32 cf_active_low_pass_cnt;
  8104. /** PHYOFF count attempted through ucode VREG */
  8105. A_UINT32 phy_off_through_vreg_cnt;
  8106. /** Force calibration count */
  8107. A_UINT32 force_calibration_cnt;
  8108. /** phyoff count during rfmode switch */
  8109. A_UINT32 rf_mode_switch_phy_off_cnt;
  8110. /** Temperature based recalibration count */
  8111. A_UINT32 temperature_recal_cnt;
  8112. } htt_stats_phy_reset_counters_tlv;
  8113. /* preserve old name alias for new name consistent with the tag name */
  8114. typedef htt_stats_phy_reset_counters_tlv htt_phy_reset_counters_tlv;
  8115. /* Considering 320 MHz maximum 16 power levels */
  8116. #define HTT_MAX_CH_PWR_INFO_SIZE 16
  8117. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_M 0x000000ff
  8118. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_S 0
  8119. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_GET(_var) \
  8120. (((_var) & HTT_PHY_TPC_STATS_CTL_REGION_GRP_M) >> \
  8121. HTT_PHY_TPC_STATS_CTL_REGION_GRP_S)
  8122. #define HTT_PHY_TPC_STATS_CTL_REGION_GRP_SET(_var, _val) \
  8123. do { \
  8124. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_CTL_REGION_GRP, _val); \
  8125. ((_var) &= ~(HTT_PHY_TPC_STATS_CTL_REGION_GRP_M)); \
  8126. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_CTL_REGION_GRP_S)); \
  8127. } while (0)
  8128. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_M 0x0000ff00
  8129. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_S 8
  8130. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_GET(_var) \
  8131. (((_var) & HTT_PHY_TPC_STATS_SUB_BAND_INDEX_M) >> \
  8132. HTT_PHY_TPC_STATS_SUB_BAND_INDEX_S)
  8133. #define HTT_PHY_TPC_STATS_SUB_BAND_INDEX_SET(_var, _val) \
  8134. do { \
  8135. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_SUB_BAND_INDEX, _val); \
  8136. ((_var) &= ~(HTT_PHY_TPC_STATS_SUB_BAND_INDEX_M)); \
  8137. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_SUB_BAND_INDEX_S)); \
  8138. } while (0)
  8139. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_M 0x00ff0000
  8140. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_S 16
  8141. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_GET(_var) \
  8142. (((_var) & HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_M) >> \
  8143. HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_S)
  8144. #define HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_SET(_var, _val) \
  8145. do { \
  8146. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED, _val); \
  8147. ((_var) &= ~(HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_M)); \
  8148. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_AG_CAP_EXT2_ENABLED_S)); \
  8149. } while (0)
  8150. #define HTT_PHY_TPC_STATS_CTL_FLAG_M 0xff000000
  8151. #define HTT_PHY_TPC_STATS_CTL_FLAG_S 24
  8152. #define HTT_PHY_TPC_STATS_CTL_FLAG_GET(_var) \
  8153. (((_var) & HTT_PHY_TPC_STATS_CTL_FLAG_M) >> \
  8154. HTT_PHY_TPC_STATS_CTL_FLAG_S)
  8155. #define HTT_PHY_TPC_STATS_CTL_FLAG_SET(_var, _val) \
  8156. do { \
  8157. HTT_CHECK_SET_VAL(HTT_PHY_TPC_STATS_CTL_FLAG, _val); \
  8158. ((_var) &= ~(HTT_PHY_TPC_STATS_CTL_FLAG_M)); \
  8159. ((_var) |= ((_val) << HTT_PHY_TPC_STATS_CTL_FLAG_S)); \
  8160. } while (0)
  8161. typedef struct {
  8162. htt_tlv_hdr_t tlv_hdr;
  8163. /** current pdev_id */
  8164. A_UINT32 pdev_id;
  8165. /** Tranmsit power control scaling related configurations */
  8166. A_UINT32 tx_power_scale;
  8167. A_UINT32 tx_power_scale_db;
  8168. /** Minimum negative tx power supported by the target */
  8169. A_INT32 min_negative_tx_power;
  8170. /** current configured CTL domain */
  8171. A_UINT32 reg_ctl_domain;
  8172. /** Regulatory power information for the current channel */
  8173. A_INT32 max_reg_allowed_power[HTT_STATS_MAX_CHAINS];
  8174. A_INT32 max_reg_allowed_power_6g[HTT_STATS_MAX_CHAINS];
  8175. /** channel max regulatory power in 0.5dB */
  8176. A_UINT32 twice_max_rd_power;
  8177. /** current channel and home channel's maximum possible tx power */
  8178. A_INT32 max_tx_power;
  8179. A_INT32 home_max_tx_power;
  8180. /** channel's Power Spectral Density */
  8181. A_UINT32 psd_power;
  8182. /** channel's EIRP power */
  8183. A_UINT32 eirp_power;
  8184. /** 6G channel power mode
  8185. * 0-LPI, 1-SP, 2-VLPI and 3-SP_CLIENT power mode
  8186. */
  8187. A_UINT32 power_type_6ghz;
  8188. /** sub-band channels and corresponding Tx-power */
  8189. A_UINT32 sub_band_cfreq[HTT_MAX_CH_PWR_INFO_SIZE];
  8190. A_UINT32 sub_band_txpower[HTT_MAX_CH_PWR_INFO_SIZE];
  8191. /** array_gain_cap:
  8192. * CTL Array Gain cap, units are dB
  8193. * The lower-triangular portion of this square matrix is stored, i.e.
  8194. * array element 0 stores matrix element (0,0)
  8195. * array element 1 stores matrix element (1,0)
  8196. * array element 2 stores matrix element (1,1)
  8197. * array element 3 stores matrix element (2,0)
  8198. * ...
  8199. * array element 35 stores matrix element (7,7)
  8200. */
  8201. A_INT32 array_gain_cap[HTT_STATS_MAX_CHAINS * ((HTT_STATS_MAX_CHAINS/2)+1)];
  8202. union {
  8203. struct {
  8204. A_UINT32
  8205. ctl_region_grp:8, /** Group to which the ctl region belongs */
  8206. sub_band_index:8, /** Frequency subband index */
  8207. /** Array Gain Cap Ext2 feature enablement status */
  8208. array_gain_cap_ext2_enabled:8,
  8209. /** ctl_flag:
  8210. * 1st bit ULOFDMA supported
  8211. * 2nd bit DLOFDMA shared Exception supported
  8212. */
  8213. ctl_flag:8;
  8214. };
  8215. A_UINT32 ctl_args;
  8216. };
  8217. } htt_stats_phy_tpc_stats_tlv;
  8218. /* preserve old name alias for new name consistent with the tag name */
  8219. typedef htt_stats_phy_tpc_stats_tlv htt_phy_tpc_stats_tlv;
  8220. /* NOTE:
  8221. * This structure is for documentation, and cannot be safely used directly.
  8222. * Instead, use the constituent TLV structures to fill/parse.
  8223. */
  8224. typedef struct {
  8225. htt_stats_phy_counters_tlv phy_counters;
  8226. htt_stats_phy_stats_tlv phy_stats;
  8227. htt_stats_phy_reset_counters_tlv phy_reset_counters;
  8228. htt_stats_phy_reset_stats_tlv phy_reset_stats;
  8229. htt_stats_phy_tpc_stats_tlv phy_tpc_stats;
  8230. } htt_phy_counters_and_phy_stats_t;
  8231. /* NOTE:
  8232. * This structure is for documentation, and cannot be safely used directly.
  8233. * Instead, use the constituent TLV structures to fill/parse.
  8234. */
  8235. typedef struct {
  8236. htt_stats_soc_txrx_stats_common_tlv soc_common_stats;
  8237. htt_stats_vdev_txrx_stats_hw_stats_tlv vdev_hw_stats[1/*or more*/];
  8238. } htt_vdevs_txrx_stats_t;
  8239. typedef struct {
  8240. A_UINT32
  8241. success: 16,
  8242. fail: 16;
  8243. } htt_stats_strm_gen_mpdus_cntr_t;
  8244. typedef struct {
  8245. /* MSDU queue identification */
  8246. A_UINT32
  8247. peer_id: 16,
  8248. tid: 4, /* only TIDs 0-7 actually expected to be used */
  8249. htt_qtype: 4, /* refer to HTT_MSDUQ_INDEX */
  8250. reserved: 8;
  8251. } htt_stats_strm_msdu_queue_id;
  8252. typedef struct {
  8253. htt_tlv_hdr_t tlv_hdr;
  8254. htt_stats_strm_msdu_queue_id queue_id;
  8255. htt_stats_strm_gen_mpdus_cntr_t svc_interval;
  8256. htt_stats_strm_gen_mpdus_cntr_t burst_size;
  8257. } htt_stats_strm_gen_mpdus_tlv;
  8258. /* preserve old name alias for new name consistent with the tag name */
  8259. typedef htt_stats_strm_gen_mpdus_tlv htt_stats_strm_gen_mpdus_tlv_t;
  8260. typedef struct {
  8261. htt_tlv_hdr_t tlv_hdr;
  8262. htt_stats_strm_msdu_queue_id queue_id;
  8263. struct {
  8264. A_UINT32
  8265. timestamp_prior_ms: 16,
  8266. timestamp_now_ms: 16;
  8267. A_UINT32
  8268. interval_spec_ms: 16,
  8269. margin_ms: 16;
  8270. } svc_interval;
  8271. struct {
  8272. A_UINT32
  8273. /* consumed_bytes_orig:
  8274. * Raw count (actually estimate) of how many bytes were removed
  8275. * from the MSDU queue by the GEN_MPDUS operation.
  8276. */
  8277. consumed_bytes_orig: 16,
  8278. /* consumed_bytes_final:
  8279. * Adjusted count of removed bytes that incorporates normalizing
  8280. * by the actual service interval compared to the expected
  8281. * service interval.
  8282. * This allows the burst size computation to be independent of
  8283. * whether the target is doing GEN_MPDUS at only the service
  8284. * interval, or substantially more often than the service
  8285. * interval.
  8286. * consumed_bytes_final = consumed_bytes_orig /
  8287. * (svc_interval / ref_svc_interval)
  8288. */
  8289. consumed_bytes_final: 16;
  8290. A_UINT32
  8291. remaining_bytes: 16,
  8292. reserved: 16;
  8293. A_UINT32
  8294. burst_size_spec: 16,
  8295. margin_bytes: 16;
  8296. } burst_size;
  8297. } htt_stats_strm_gen_mpdus_details_tlv;
  8298. /* preserve old name alias for new name consistent with the tag name */
  8299. typedef htt_stats_strm_gen_mpdus_details_tlv
  8300. htt_stats_strm_gen_mpdus_details_tlv_t;
  8301. typedef struct {
  8302. htt_tlv_hdr_t tlv_hdr;
  8303. A_UINT32 reset_count;
  8304. /** lower portion (bits 31:0) of reset time, in milliseconds */
  8305. A_UINT32 reset_time_lo_ms;
  8306. /** upper portion (bits 63:32) of reset time, in milliseconds */
  8307. A_UINT32 reset_time_hi_ms;
  8308. /** lower portion (bits 31:0) of disengage time, in milliseconds */
  8309. A_UINT32 disengage_time_lo_ms;
  8310. /** upper portion (bits 63:32) of disengage time, in milliseconds */
  8311. A_UINT32 disengage_time_hi_ms;
  8312. /** lower portion (bits 31:0) of engage time, in milliseconds */
  8313. A_UINT32 engage_time_lo_ms;
  8314. /** upper portion (bits 63:32) of engage time, in milliseconds */
  8315. A_UINT32 engage_time_hi_ms;
  8316. A_UINT32 disengage_count;
  8317. A_UINT32 engage_count;
  8318. A_UINT32 drain_dest_ring_mask;
  8319. } htt_stats_dmac_reset_stats_tlv;
  8320. /* preserve old name alias for new name consistent with the tag name */
  8321. typedef htt_stats_dmac_reset_stats_tlv htt_dmac_reset_stats_tlv;
  8322. /* Support up to 640 MHz mode for future expansion */
  8323. #define HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT 32
  8324. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_M 0x000000ff
  8325. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_S 0
  8326. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_GET(_var) \
  8327. (((_var) & HTT_PDEV_PUNCTURE_STATS_MAC_ID_M) >> \
  8328. HTT_PDEV_PUNCTURE_STATS_MAC_ID_S)
  8329. #define HTT_PDEV_PUNCTURE_STATS_MAC_ID_SET(_var, _val) \
  8330. do { \
  8331. HTT_CHECK_SET_VAL(HTT_PDEV_PUNCTURE_STATS_MAC_ID, _val); \
  8332. ((_var) |= ((_val) << HTT_PDEV_PUNCTURE_STATS_MAC_ID_S)); \
  8333. } while (0)
  8334. /*
  8335. * TLV used to provide puncturing related stats for TX/RX and each PPDU type.
  8336. */
  8337. typedef struct {
  8338. htt_tlv_hdr_t tlv_hdr;
  8339. /**
  8340. * BIT [ 7 : 0] :- mac_id
  8341. * BIT [31 : 8] :- reserved
  8342. */
  8343. union {
  8344. struct {
  8345. A_UINT32 mac_id: 8,
  8346. reserved: 24;
  8347. };
  8348. A_UINT32 mac_id__word;
  8349. };
  8350. /*
  8351. * Stats direction (TX/RX). Enum value from HTT_STATS_DIRECTION.
  8352. */
  8353. A_UINT32 direction;
  8354. /*
  8355. * Preamble type. Enum value from HTT_STATS_PREAM_TYPE.
  8356. *
  8357. * Note that for although OFDM rates don't technically support
  8358. * "puncturing", this TLV can be used to indicate the 20 MHz sub-bands
  8359. * utilized for OFDM legacy duplicate packets, which are also used during
  8360. * puncturing sequences.
  8361. */
  8362. A_UINT32 preamble;
  8363. /*
  8364. * Stats PPDU type. Enum value from HTT_STATS_PPDU_TYPE.
  8365. */
  8366. A_UINT32 ppdu_type;
  8367. /*
  8368. * Indicates the number of valid elements in the
  8369. * "num_subbands_used_cnt" array, and must be <=
  8370. * HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT.
  8371. *
  8372. * Also indicates how many bits in the last_used_pattern_mask may be
  8373. * non-zero.
  8374. */
  8375. A_UINT32 subband_count;
  8376. /*
  8377. * The last used transmit 20 MHz subband mask. Bit 0 represents the lowest
  8378. * 20 MHz subband mask, bit 1 the second lowest, and so on.
  8379. *
  8380. * All 32 bits are valid and will be used for expansion to higher BW modes.
  8381. */
  8382. A_UINT32 last_used_pattern_mask;
  8383. /*
  8384. * Number of array elements with valid values is equal to "subband_count".
  8385. * If subband_count is < HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT, the
  8386. * remaining elements will be implicitly set to 0x0.
  8387. *
  8388. * The array index is the number of 20 MHz subbands utilized during TX/RX,
  8389. * and the counter value at that index is the number of times that subband
  8390. * count was used.
  8391. *
  8392. * The count is incremented once for each OTA PPDU transmitted / received.
  8393. */
  8394. A_UINT32 num_subbands_used_cnt[HTT_PUNCTURE_STATS_MAX_SUBBAND_COUNT];
  8395. } htt_stats_pdev_puncture_stats_tlv;
  8396. /* preserve old name alias for new name consistent with the tag name */
  8397. typedef htt_stats_pdev_puncture_stats_tlv htt_pdev_puncture_stats_tlv;
  8398. enum {
  8399. HTT_STATS_CAL_PROF_COLD_BOOT = 0,
  8400. HTT_STATS_CAL_PROF_FULL_CHAN_SWITCH = 1,
  8401. HTT_STATS_CAL_PROF_SCAN_CHAN_SWITCH = 2,
  8402. HTT_STATS_CAL_PROF_DPD_SPLIT_CAL = 3,
  8403. HTT_STATS_MAX_PROF_CAL = 4,
  8404. };
  8405. #define HTT_STATS_MAX_CAL_IDX_CNT 8
  8406. typedef struct { /* DEPRECATED */
  8407. htt_tlv_hdr_t tlv_hdr;
  8408. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  8409. /** To verify whether prof cal is enabled or not */
  8410. A_UINT32 enable;
  8411. /** current pdev_id */
  8412. A_UINT32 pdev_id;
  8413. /** The cnt is incremented when each time the calindex takes place */
  8414. A_UINT32 cnt[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8415. /** Minimum time taken to complete the calibration - in us */
  8416. A_UINT32 min[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8417. /** Maximum time taken to complete the calibration -in us */
  8418. A_UINT32 max[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8419. /** Time taken by the cal for its final time execution - in us */
  8420. A_UINT32 last[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8421. /** Total time taken - in us */
  8422. A_UINT32 tot[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8423. /** hist_intvl - by default will be set to 2000 us */
  8424. A_UINT32 hist_intvl[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8425. /**
  8426. * If last is less than hist_intvl, then hist[0]++,
  8427. * If last is less than hist_intvl << 1, then hist[1]++,
  8428. * otherwise hist[2]++.
  8429. */
  8430. A_UINT32 hist[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT][HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST];
  8431. /** Pf_last will log the current no of page faults */
  8432. A_UINT32 pf_last[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8433. /** Sum of all page faults happened */
  8434. A_UINT32 pf_tot[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8435. /** If pf_last > pf_max then pf_max = pf_last */
  8436. A_UINT32 pf_max[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8437. /**
  8438. * For each cal profile, only certain no of cal indices were invoked,
  8439. * this member will store what all the indices got invoked per each
  8440. * cal profile
  8441. */
  8442. A_UINT32 enabledCalIdx[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8443. /** No of indices invoked per each cal profile */
  8444. A_UINT32 CalCnt[HTT_STATS_MAX_PROF_CAL];
  8445. } htt_stats_latency_prof_cal_stats_tlv; /* DEPRECATED */
  8446. /* preserve old name alias for new name consistent with the tag name */
  8447. typedef htt_stats_latency_prof_cal_stats_tlv htt_latency_prof_cal_stats_tlv; /* DEPRECATED */
  8448. typedef struct {
  8449. /** The cnt is incremented when each time the calindex takes place */
  8450. A_UINT32 cnt;
  8451. /** Minimum time taken to complete the calibration - in us */
  8452. A_UINT32 min;
  8453. /** Maximum time taken to complete the calibration -in us */
  8454. A_UINT32 max;
  8455. /** Time taken by the cal for its final time execution - in us */
  8456. A_UINT32 last;
  8457. /** Total time taken - in us */
  8458. A_UINT32 tot;
  8459. /** hist_intvl - in us, by default will be set to 2000 us */
  8460. A_UINT32 hist_intvl;
  8461. /**
  8462. * If last is less than hist_intvl, then hist[0]++,
  8463. * If last is less than hist_intvl << 1, then hist[1]++,
  8464. * otherwise hist[2]++.
  8465. */
  8466. A_UINT32 hist[HTT_INTERRUPTS_LATENCY_PROFILE_MAX_HIST];
  8467. /** pf_last will log the current no of page faults */
  8468. A_UINT32 pf_last;
  8469. /** Sum of all page faults happened */
  8470. A_UINT32 pf_tot;
  8471. /** If pf_last > pf_max then pf_max = pf_last */
  8472. A_UINT32 pf_max;
  8473. /**
  8474. * For each cal profile, only certain no of cal indices were invoked,
  8475. * this member will store what all the indices got invoked per each
  8476. * cal profile
  8477. */
  8478. A_UINT32 enabled_cal_idx;
  8479. /*
  8480. * NOTE: due to backwards-compatibility requirements,
  8481. * no fields can be added to this struct.
  8482. */
  8483. } htt_stats_latency_prof_cal_data;
  8484. typedef struct {
  8485. htt_tlv_hdr_t tlv_hdr;
  8486. /** To verify whether prof cal is enabled or not */
  8487. A_UINT32 enable;
  8488. /** current pdev_id */
  8489. A_UINT32 pdev_id;
  8490. /** No of indices invoked per each cal profile */
  8491. A_UINT32 cal_cnt[HTT_STATS_MAX_PROF_CAL];
  8492. /** Latency Cal Profile name */
  8493. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  8494. /** Latency Cal data */
  8495. htt_stats_latency_prof_cal_data latency_data[HTT_STATS_MAX_PROF_CAL][HTT_STATS_MAX_CAL_IDX_CNT];
  8496. } htt_stats_latency_prof_cal_data_tlv;
  8497. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M 0x0000003F
  8498. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S 0
  8499. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M 0x00000FC0
  8500. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S 6
  8501. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M 0x0FFFF000
  8502. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S 12
  8503. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_GET(_var) \
  8504. (((_var) & HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M) >> \
  8505. HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S)
  8506. #define HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_SET(_var, _val) \
  8507. do { \
  8508. HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD, _val); \
  8509. ((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_M)); \
  8510. ((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_PEER_ASSOC_IPC_RECVD_S)); \
  8511. } while (0)
  8512. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_GET(_var) \
  8513. (((_var) & HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M) >> \
  8514. HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S)
  8515. #define HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_SET(_var, _val) \
  8516. do { \
  8517. HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD, _val); \
  8518. ((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_M)); \
  8519. ((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_SCHED_PEER_DELETE_RECVD_S)); \
  8520. } while (0)
  8521. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_GET(_var) \
  8522. (((_var) & HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M) >> \
  8523. HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S)
  8524. #define HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_SET(_var, _val) \
  8525. do { \
  8526. HTT_CHECK_SET_VAL(HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX, _val); \
  8527. ((_var) &= ~(HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_M)); \
  8528. ((_var) |= ((_val) << HTT_ML_PEER_EXT_DETAILS_MLD_AST_INDEX_S)); \
  8529. } while (0)
  8530. typedef struct {
  8531. htt_tlv_hdr_t tlv_hdr;
  8532. union {
  8533. struct {
  8534. A_UINT32 peer_assoc_ipc_recvd : 6,
  8535. sched_peer_delete_recvd : 6,
  8536. mld_ast_index : 16,
  8537. reserved : 4;
  8538. };
  8539. A_UINT32 msg_dword_1;
  8540. };
  8541. } htt_stats_ml_peer_ext_details_tlv;
  8542. /* preserve old name alias for new name consistent with the tag name */
  8543. typedef htt_stats_ml_peer_ext_details_tlv htt_ml_peer_ext_details_tlv;
  8544. #define HTT_ML_LINK_INFO_VALID_M 0x00000001
  8545. #define HTT_ML_LINK_INFO_VALID_S 0
  8546. #define HTT_ML_LINK_INFO_ACTIVE_M 0x00000002
  8547. #define HTT_ML_LINK_INFO_ACTIVE_S 1
  8548. #define HTT_ML_LINK_INFO_PRIMARY_M 0x00000004
  8549. #define HTT_ML_LINK_INFO_PRIMARY_S 2
  8550. #define HTT_ML_LINK_INFO_ASSOC_LINK_M 0x00000008
  8551. #define HTT_ML_LINK_INFO_ASSOC_LINK_S 3
  8552. #define HTT_ML_LINK_INFO_CHIP_ID_M 0x00000070
  8553. #define HTT_ML_LINK_INFO_CHIP_ID_S 4
  8554. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_M 0x00007F80
  8555. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_S 7
  8556. #define HTT_ML_LINK_INFO_HW_LINK_ID_M 0x00038000
  8557. #define HTT_ML_LINK_INFO_HW_LINK_ID_S 15
  8558. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M 0x000C0000
  8559. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S 18
  8560. #define HTT_ML_LINK_INFO_MASTER_LINK_M 0x00100000
  8561. #define HTT_ML_LINK_INFO_MASTER_LINK_S 20
  8562. #define HTT_ML_LINK_INFO_ANCHOR_LINK_M 0x00200000
  8563. #define HTT_ML_LINK_INFO_ANCHOR_LINK_S 21
  8564. #define HTT_ML_LINK_INFO_INITIALIZED_M 0x00400000
  8565. #define HTT_ML_LINK_INFO_INITIALIZED_S 22
  8566. #define HTT_ML_LINK_INFO_SW_PEER_ID_M 0x0000ffff
  8567. #define HTT_ML_LINK_INFO_SW_PEER_ID_S 0
  8568. #define HTT_ML_LINK_INFO_VDEV_ID_M 0x00ff0000
  8569. #define HTT_ML_LINK_INFO_VDEV_ID_S 16
  8570. #define HTT_ML_LINK_INFO_VALID_GET(_var) \
  8571. (((_var) & HTT_ML_LINK_INFO_VALID_M) >> \
  8572. HTT_ML_LINK_INFO_VALID_S)
  8573. #define HTT_ML_LINK_INFO_VALID_SET(_var, _val) \
  8574. do { \
  8575. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_VALID, _val); \
  8576. ((_var) &= ~(HTT_ML_LINK_INFO_VALID_M)); \
  8577. ((_var) |= ((_val) << HTT_ML_LINK_INFO_VALID_S)); \
  8578. } while (0)
  8579. #define HTT_ML_LINK_INFO_ACTIVE_GET(_var) \
  8580. (((_var) & HTT_ML_LINK_INFO_ACTIVE_M) >> \
  8581. HTT_ML_LINK_INFO_ACTIVE_S)
  8582. #define HTT_ML_LINK_INFO_ACTIVE_SET(_var, _val) \
  8583. do { \
  8584. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ACTIVE, _val); \
  8585. ((_var) &= ~(HTT_ML_LINK_INFO_ACTIVE_M)); \
  8586. ((_var) |= ((_val) << HTT_ML_LINK_INFO_ACTIVE_S)); \
  8587. } while (0)
  8588. #define HTT_ML_LINK_INFO_PRIMARY_GET(_var) \
  8589. (((_var) & HTT_ML_LINK_INFO_PRIMARY_M) >> \
  8590. HTT_ML_LINK_INFO_PRIMARY_S)
  8591. #define HTT_ML_LINK_INFO_PRIMARY_SET(_var, _val) \
  8592. do { \
  8593. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_PRIMARY, _val); \
  8594. ((_var) &= ~(HTT_ML_LINK_INFO_PRIMARY_M)); \
  8595. ((_var) |= ((_val) << HTT_ML_LINK_INFO_PRIMARY_S)); \
  8596. } while (0)
  8597. #define HTT_ML_LINK_INFO_ASSOC_LINK_GET(_var) \
  8598. (((_var) & HTT_ML_LINK_INFO_ASSOC_LINK_M) >> \
  8599. HTT_ML_LINK_INFO_ASSOC_LINK_S)
  8600. #define HTT_ML_LINK_INFO_ASSOC_LINK_SET(_var, _val) \
  8601. do { \
  8602. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ASSOC_LINK, _val); \
  8603. ((_var) &= ~(HTT_ML_LINK_INFO_ASSOC_LINK_M)); \
  8604. ((_var) |= ((_val) << HTT_ML_LINK_INFO_ASSOC_LINK_S)); \
  8605. } while (0)
  8606. #define HTT_ML_LINK_INFO_CHIP_ID_GET(_var) \
  8607. (((_var) & HTT_ML_LINK_INFO_CHIP_ID_M) >> \
  8608. HTT_ML_LINK_INFO_CHIP_ID_S)
  8609. #define HTT_ML_LINK_INFO_CHIP_ID_SET(_var, _val) \
  8610. do { \
  8611. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_CHIP_ID, _val); \
  8612. ((_var) &= ~(HTT_ML_LINK_INFO_CHIP_ID_M)); \
  8613. ((_var) |= ((_val) << HTT_ML_LINK_INFO_CHIP_ID_S)); \
  8614. } while (0)
  8615. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_GET(_var) \
  8616. (((_var) & HTT_ML_LINK_INFO_IEEE_LINK_ID_M) >> \
  8617. HTT_ML_LINK_INFO_IEEE_LINK_ID_S)
  8618. #define HTT_ML_LINK_INFO_IEEE_LINK_ID_SET(_var, _val) \
  8619. do { \
  8620. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_IEEE_LINK_ID, _val); \
  8621. ((_var) &= ~(HTT_ML_LINK_INFO_IEEE_LINK_ID_M)); \
  8622. ((_var) |= ((_val) << HTT_ML_LINK_INFO_IEEE_LINK_ID_S)); \
  8623. } while (0)
  8624. #define HTT_ML_LINK_INFO_HW_LINK_ID_GET(_var) \
  8625. (((_var) & HTT_ML_LINK_INFO_HW_LINK_ID_M) >> \
  8626. HTT_ML_LINK_INFO_HW_LINK_ID_S)
  8627. #define HTT_ML_LINK_INFO_HW_LINK_ID_SET(_var, _val) \
  8628. do { \
  8629. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_HW_LINK_ID, _val); \
  8630. ((_var) &= ~(HTT_ML_LINK_INFO_HW_LINK_ID_M)); \
  8631. ((_var) |= ((_val) << HTT_ML_LINK_INFO_HW_LINK_ID_S)); \
  8632. } while (0)
  8633. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_GET(_var) \
  8634. (((_var) & HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M) >> \
  8635. HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S)
  8636. #define HTT_ML_LINK_INFO_LOGICAL_LINK_ID_SET(_var, _val) \
  8637. do { \
  8638. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_LOGICAL_LINK_ID, _val); \
  8639. ((_var) &= ~(HTT_ML_LINK_INFO_LOGICAL_LINK_ID_M)); \
  8640. ((_var) |= ((_val) << HTT_ML_LINK_INFO_LOGICAL_LINK_ID_S)); \
  8641. } while (0)
  8642. #define HTT_ML_LINK_INFO_MASTER_LINK_GET(_var) \
  8643. (((_var) & HTT_ML_LINK_INFO_MASTER_LINK_M) >> \
  8644. HTT_ML_LINK_INFO_MASTER_LINK_S)
  8645. #define HTT_ML_LINK_INFO_MASTER_LINK_SET(_var, _val) \
  8646. do { \
  8647. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_MASTER_LINK, _val); \
  8648. ((_var) &= ~(HTT_ML_LINK_INFO_MASTER_LINK_M)); \
  8649. ((_var) |= ((_val) << HTT_ML_LINK_INFO_MASTER_LINK_S)); \
  8650. } while (0)
  8651. #define HTT_ML_LINK_INFO_ANCHOR_LINK_GET(_var) \
  8652. (((_var) & HTT_ML_LINK_INFO_ANCHOR_LINK_M) >> \
  8653. HTT_ML_LINK_INFO_ANCHOR_LINK_S)
  8654. #define HTT_ML_LINK_INFO_ANCHOR_LINK_SET(_var, _val) \
  8655. do { \
  8656. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_ANCHOR_LINK, _val); \
  8657. ((_var) &= ~(HTT_ML_LINK_INFO_ANCHOR_LINK_M)); \
  8658. ((_var) |= ((_val) << HTT_ML_LINK_INFO_ANCHOR_LINK_S)); \
  8659. } while (0)
  8660. #define HTT_ML_LINK_INFO_INITIALIZED_GET(_var) \
  8661. (((_var) & HTT_ML_LINK_INFO_INITIALIZED_M) >> \
  8662. HTT_ML_LINK_INFO_INITIALIZED_S)
  8663. #define HTT_ML_LINK_INFO_INITIALIZED_SET(_var, _val) \
  8664. do { \
  8665. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_INITIALIZED, _val); \
  8666. ((_var) &= ~(HTT_ML_LINK_INFO_INITIALIZED_M)); \
  8667. ((_var) |= ((_val) << HTT_ML_LINK_INFO_INITIALIZED_S)); \
  8668. } while (0)
  8669. #define HTT_ML_LINK_INFO_SW_PEER_ID_GET(_var) \
  8670. (((_var) & HTT_ML_LINK_INFO_SW_PEER_ID_M) >> \
  8671. HTT_ML_LINK_INFO_SW_PEER_ID_S)
  8672. #define HTT_ML_LINK_INFO_SW_PEER_ID_SET(_var, _val) \
  8673. do { \
  8674. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_SW_PEER_ID, _val); \
  8675. ((_var) &= ~(HTT_ML_LINK_INFO_SW_PEER_ID_M)); \
  8676. ((_var) |= ((_val) << HTT_ML_LINK_INFO_SW_PEER_ID_S)); \
  8677. } while (0)
  8678. #define HTT_ML_LINK_INFO_VDEV_ID_GET(_var) \
  8679. (((_var) & HTT_ML_LINK_INFO_VDEV_ID_M) >> \
  8680. HTT_ML_LINK_INFO_VDEV_ID_S)
  8681. #define HTT_ML_LINK_INFO_VDEV_ID_SET(_var, _val) \
  8682. do { \
  8683. HTT_CHECK_SET_VAL(HTT_ML_LINK_INFO_VDEV_ID, _val); \
  8684. ((_var) &= ~(HTT_ML_LINK_INFO_VDEV_ID_M)); \
  8685. ((_var) |= ((_val) << HTT_ML_LINK_INFO_VDEV_ID_S)); \
  8686. } while (0)
  8687. typedef struct {
  8688. htt_tlv_hdr_t tlv_hdr;
  8689. union {
  8690. struct {
  8691. A_UINT32 valid : 1,
  8692. active : 1,
  8693. primary : 1,
  8694. assoc_link : 1,
  8695. chip_id : 3,
  8696. ieee_link_id : 8,
  8697. hw_link_id : 3,
  8698. logical_link_id : 2,
  8699. master_link : 1,
  8700. anchor_link : 1,
  8701. initialized : 1,
  8702. reserved : 9;
  8703. };
  8704. A_UINT32 msg_dword_1;
  8705. };
  8706. union {
  8707. struct {
  8708. A_UINT32 sw_peer_id : 16,
  8709. vdev_id : 8,
  8710. reserved1 : 8;
  8711. };
  8712. A_UINT32 msg_dword_2;
  8713. };
  8714. A_UINT32 primary_tid_mask;
  8715. } htt_stats_ml_link_info_details_tlv;
  8716. /* preserve old name alias for new name consistent with the tag name */
  8717. typedef htt_stats_ml_link_info_details_tlv htt_ml_link_info_tlv;
  8718. #define HTT_ML_PEER_DETAILS_NUM_LINKS_M 0x00000003
  8719. #define HTT_ML_PEER_DETAILS_NUM_LINKS_S 0
  8720. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_M 0x00003FFC
  8721. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_S 2
  8722. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M 0x0001C000
  8723. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S 14
  8724. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M 0x00060000
  8725. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S 17
  8726. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M 0x00380000
  8727. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S 19
  8728. #define HTT_ML_PEER_DETAILS_NON_STR_M 0x00400000
  8729. #define HTT_ML_PEER_DETAILS_NON_STR_S 22
  8730. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M 0x00800000
  8731. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S 23
  8732. /* for backwards compatibility, retain the old EMLSR name of the bitfield */
  8733. #define HTT_ML_PEER_DETAILS_EMLSR_M HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M
  8734. #define HTT_ML_PEER_DETAILS_EMLSR_S HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S
  8735. #define HTT_ML_PEER_DETAILS_IS_STA_KO_M 0x01000000
  8736. #define HTT_ML_PEER_DETAILS_IS_STA_KO_S 24
  8737. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M 0x06000000
  8738. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S 25
  8739. #define HTT_ML_PEER_DETAILS_ALLOCATED_M 0x08000000
  8740. #define HTT_ML_PEER_DETAILS_ALLOCATED_S 27
  8741. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_M 0x10000000
  8742. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_S 28
  8743. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M 0x000000ff
  8744. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S 0
  8745. #define HTT_ML_PEER_DETAILS_NUM_LINKS_GET(_var) \
  8746. (((_var) & HTT_ML_PEER_DETAILS_NUM_LINKS_M) >> \
  8747. HTT_ML_PEER_DETAILS_NUM_LINKS_S)
  8748. #define HTT_ML_PEER_DETAILS_NUM_LINKS_SET(_var, _val) \
  8749. do { \
  8750. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NUM_LINKS, _val); \
  8751. ((_var) &= ~(HTT_ML_PEER_DETAILS_NUM_LINKS_M)); \
  8752. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NUM_LINKS_S)); \
  8753. } while (0)
  8754. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_GET(_var) \
  8755. (((_var) & HTT_ML_PEER_DETAILS_ML_PEER_ID_M) >> \
  8756. HTT_ML_PEER_DETAILS_ML_PEER_ID_S)
  8757. #define HTT_ML_PEER_DETAILS_ML_PEER_ID_SET(_var, _val) \
  8758. do { \
  8759. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_ML_PEER_ID, _val); \
  8760. ((_var) &= ~(HTT_ML_PEER_DETAILS_ML_PEER_ID_M)); \
  8761. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_ML_PEER_ID_S)); \
  8762. } while (0)
  8763. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_GET(_var) \
  8764. (((_var) & HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M) >> \
  8765. HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S)
  8766. #define HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_SET(_var, _val) \
  8767. do { \
  8768. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX, _val); \
  8769. ((_var) &= ~(HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_M)); \
  8770. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PRIMARY_LINK_IDX_S)); \
  8771. } while (0)
  8772. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_GET(_var) \
  8773. (((_var) & HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M) >> \
  8774. HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S)
  8775. #define HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_SET(_var, _val) \
  8776. do { \
  8777. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID, _val); \
  8778. ((_var) &= ~(HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_M)); \
  8779. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PRIMARY_CHIP_ID_S)); \
  8780. } while (0)
  8781. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_GET(_var) \
  8782. (((_var) & HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M) >> \
  8783. HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S)
  8784. #define HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_SET(_var, _val) \
  8785. do { \
  8786. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_LINK_INIT_COUNT, _val); \
  8787. ((_var) &= ~(HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_M)); \
  8788. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_LINK_INIT_COUNT_S)); \
  8789. } while (0)
  8790. #define HTT_ML_PEER_DETAILS_NON_STR_GET(_var) \
  8791. (((_var) & HTT_ML_PEER_DETAILS_NON_STR_M) >> \
  8792. HTT_ML_PEER_DETAILS_NON_STR_S)
  8793. #define HTT_ML_PEER_DETAILS_NON_STR_SET(_var, _val) \
  8794. do { \
  8795. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NON_STR, _val); \
  8796. ((_var) &= ~(HTT_ML_PEER_DETAILS_NON_STR_M)); \
  8797. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NON_STR_S)); \
  8798. } while (0)
  8799. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_GET(_var) \
  8800. (((_var) & HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M) >> \
  8801. HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S)
  8802. #define HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_SET(_var, _val) \
  8803. do { \
  8804. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE, _val); \
  8805. ((_var) &= ~(HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_M)); \
  8806. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_IS_EMLSR_ACTIVE_S)); \
  8807. } while (0)
  8808. /* start deprecated:
  8809. * For backwards compatibility, retain a macro definition that uses
  8810. * the old EMLSR name of the bitfield
  8811. */
  8812. #define HTT_ML_PEER_DETAILS_EMLSR_GET(_var) \
  8813. (((_var) & HTT_ML_PEER_DETAILS_EMLSR_M) >> \
  8814. HTT_ML_PEER_DETAILS_EMLSR_S)
  8815. #define HTT_ML_PEER_DETAILS_EMLSR_SET(_var, _val) \
  8816. do { \
  8817. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_EMLSR, _val); \
  8818. ((_var) &= ~(HTT_ML_PEER_DETAILS_EMLSR_M)); \
  8819. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_EMLSR_S)); \
  8820. } while (0)
  8821. /* end deprecated */
  8822. #define HTT_ML_PEER_DETAILS_IS_STA_KO_GET(_var) \
  8823. (((_var) & HTT_ML_PEER_DETAILS_IS_STA_KO_M) >> \
  8824. HTT_ML_PEER_DETAILS_IS_STA_KO_S)
  8825. #define HTT_ML_PEER_DETAILS_IS_STA_KO_SET(_var, _val) \
  8826. do { \
  8827. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_IS_STA_KO, _val); \
  8828. ((_var) &= ~(HTT_ML_PEER_DETAILS_IS_STA_KO_M)); \
  8829. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_IS_STA_KO_S)); \
  8830. } while (0)
  8831. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_GET(_var) \
  8832. (((_var) & HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M) >> \
  8833. HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S)
  8834. #define HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_SET(_var, _val) \
  8835. do { \
  8836. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS, _val); \
  8837. ((_var) &= ~(HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_M)); \
  8838. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_NUM_LOCAL_LINKS_S)); \
  8839. } while (0)
  8840. #define HTT_ML_PEER_DETAILS_ALLOCATED_GET(_var) \
  8841. (((_var) & HTT_ML_PEER_DETAILS_ALLOCATED_M) >> \
  8842. HTT_ML_PEER_DETAILS_ALLOCATED_S)
  8843. #define HTT_ML_PEER_DETAILS_ALLOCATED_SET(_var, _val) \
  8844. do { \
  8845. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_ALLOCATED, _val); \
  8846. ((_var) &= ~(HTT_ML_PEER_DETAILS_ALLOCATED_M)); \
  8847. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_ALLOCATED_S)); \
  8848. } while (0)
  8849. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_GET(_var) \
  8850. (((_var) & HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_M) >> \
  8851. HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_S)
  8852. #define HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_SET(_var, _val) \
  8853. do { \
  8854. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_EMLSR_SUPPORT, _val); \
  8855. ((_var) &= ~(HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_M)); \
  8856. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_EMLSR_SUPPORT_S)); \
  8857. } while (0)
  8858. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_GET(_var) \
  8859. (((_var) & HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M) >> \
  8860. HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S)
  8861. #define HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_SET(_var, _val) \
  8862. do { \
  8863. HTT_CHECK_SET_VAL(HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP, _val); \
  8864. ((_var) &= ~(HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_M)); \
  8865. ((_var) |= ((_val) << HTT_ML_PEER_DETAILS_PARTICIPATING_CHIPS_BITMAP_S)); \
  8866. } while (0)
  8867. typedef struct {
  8868. htt_tlv_hdr_t tlv_hdr;
  8869. htt_mac_addr remote_mld_mac_addr;
  8870. union {
  8871. struct {
  8872. A_UINT32 num_links : 2,
  8873. ml_peer_id : 12,
  8874. primary_link_idx : 3,
  8875. primary_chip_id : 2,
  8876. link_init_count : 3,
  8877. non_str : 1,
  8878. is_emlsr_active : 1,
  8879. is_sta_ko : 1,
  8880. num_local_links : 2,
  8881. allocated : 1,
  8882. emlsr_support : 1,
  8883. reserved : 3;
  8884. };
  8885. struct {
  8886. /*
  8887. * For backwards compatibility, use a dummy union element to
  8888. * retain the old "emlsr" name for the "is_emlsr_active" bitfield.
  8889. */
  8890. A_UINT32 dummy1 : 23,
  8891. emlsr : 1,
  8892. dummy2 : 8;
  8893. };
  8894. A_UINT32 msg_dword_1;
  8895. };
  8896. union {
  8897. struct {
  8898. A_UINT32 participating_chips_bitmap : 8,
  8899. reserved1 : 24;
  8900. };
  8901. A_UINT32 msg_dword_2;
  8902. };
  8903. /*
  8904. * ml_peer_flags is an opaque field that cannot be interpreted by
  8905. * the host; it is only for off-line debug.
  8906. */
  8907. A_UINT32 ml_peer_flags;
  8908. } htt_stats_ml_peer_details_tlv;
  8909. /* preserve old name alias for new name consistent with the tag name */
  8910. typedef htt_stats_ml_peer_details_tlv htt_ml_peer_details_tlv;
  8911. /* STATS_TYPE : HTT_DBG_EXT_STATS_ML_PEERS_INFO
  8912. * TLV_TAGS:
  8913. * - HTT_STATS_ML_PEER_DETAILS_TAG
  8914. * - HTT_STATS_ML_LINK_INFO_DETAILS_TAG
  8915. * - HTT_STATS_ML_PEER_EXT_DETAILS_TAG (multiple)
  8916. */
  8917. /* NOTE:
  8918. * This structure is for documentation, and cannot be safely used directly.
  8919. * Instead, use the constituent TLV structures to fill/parse.
  8920. */
  8921. typedef struct _htt_ml_peer_stats {
  8922. htt_stats_ml_peer_details_tlv ml_peer_details;
  8923. htt_stats_ml_peer_ext_details_tlv ml_peer_ext_details;
  8924. htt_stats_ml_link_info_details_tlv ml_link_info[1];
  8925. } htt_ml_peer_stats_t;
  8926. /*
  8927. * ODD Mandatory Stats are grouped together from all the existing different
  8928. * stats, to form a set of stats that will be used by the ODD application to
  8929. * post the stats to the cloud instead of polling for the individual stats.
  8930. * This is done to avoid non-mandatory stats to be polled as the data will not
  8931. * be required in the recipes derivation.
  8932. * Rather than the host simply printing the ODD stats, the ODD application
  8933. * will take the buffer and map it to the odd_mandatory_stats data structure.
  8934. */
  8935. typedef struct {
  8936. htt_tlv_hdr_t tlv_hdr;
  8937. A_UINT32 hw_queued;
  8938. A_UINT32 hw_reaped;
  8939. A_UINT32 hw_paused;
  8940. A_UINT32 hw_filt;
  8941. A_UINT32 seq_posted;
  8942. A_UINT32 seq_completed;
  8943. A_UINT32 underrun;
  8944. A_UINT32 hw_flush;
  8945. A_UINT32 next_seq_posted_dsr;
  8946. A_UINT32 seq_posted_isr;
  8947. A_UINT32 mpdu_cnt_fcs_ok;
  8948. A_UINT32 mpdu_cnt_fcs_err;
  8949. A_UINT32 msdu_count_tqm;
  8950. A_UINT32 mpdu_count_tqm;
  8951. A_UINT32 mpdus_ack_failed;
  8952. A_UINT32 num_data_ppdus_tried_ota;
  8953. A_UINT32 ppdu_ok;
  8954. A_UINT32 num_total_ppdus_tried_ota;
  8955. A_UINT32 thermal_suspend_cnt;
  8956. A_UINT32 dfs_suspend_cnt;
  8957. A_UINT32 tx_abort_suspend_cnt;
  8958. A_UINT32 suspended_txq_mask;
  8959. A_UINT32 last_suspend_reason;
  8960. A_UINT32 seq_failed_queueing;
  8961. A_UINT32 seq_restarted;
  8962. A_UINT32 seq_txop_repost_stop;
  8963. A_UINT32 next_seq_cancel;
  8964. A_UINT32 seq_min_msdu_repost_stop;
  8965. A_UINT32 total_phy_err_cnt;
  8966. A_UINT32 ppdu_recvd;
  8967. A_UINT32 tcp_msdu_cnt;
  8968. A_UINT32 tcp_ack_msdu_cnt;
  8969. A_UINT32 udp_msdu_cnt;
  8970. A_UINT32 fw_tx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  8971. A_UINT32 fw_rx_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  8972. A_UINT32 fw_ring_mpdu_err[HTT_RX_STATS_RXDMA_MAX_ERR];
  8973. A_UINT32 urrn_stats[HTT_TX_PDEV_MAX_URRN_STATS];
  8974. A_UINT32 sifs_status[HTT_TX_PDEV_MAX_SIFS_BURST_STATS];
  8975. A_UINT32 sifs_hist_status[HTT_TX_PDEV_SIFS_BURST_HIST_STATS];
  8976. A_UINT32 rx_suspend_cnt;
  8977. A_UINT32 rx_suspend_fail_cnt;
  8978. A_UINT32 rx_resume_cnt;
  8979. A_UINT32 rx_resume_fail_cnt;
  8980. A_UINT32 hwq_beacon_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  8981. A_UINT32 hwq_voice_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  8982. A_UINT32 hwq_video_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  8983. A_UINT32 hwq_best_effort_cmd_result[HTT_TX_HWQ_MAX_CMD_RESULT_STATS];
  8984. A_UINT32 hwq_beacon_mpdu_tried_cnt;
  8985. A_UINT32 hwq_voice_mpdu_tried_cnt;
  8986. A_UINT32 hwq_video_mpdu_tried_cnt;
  8987. A_UINT32 hwq_best_effort_mpdu_tried_cnt;
  8988. A_UINT32 hwq_beacon_mpdu_queued_cnt;
  8989. A_UINT32 hwq_voice_mpdu_queued_cnt;
  8990. A_UINT32 hwq_video_mpdu_queued_cnt;
  8991. A_UINT32 hwq_best_effort_mpdu_queued_cnt;
  8992. A_UINT32 hwq_beacon_mpdu_ack_fail_cnt;
  8993. A_UINT32 hwq_voice_mpdu_ack_fail_cnt;
  8994. A_UINT32 hwq_video_mpdu_ack_fail_cnt;
  8995. A_UINT32 hwq_best_effort_mpdu_ack_fail_cnt;
  8996. A_UINT32 pdev_resets;
  8997. A_UINT32 phy_warm_reset;
  8998. A_UINT32 hwsch_reset_count;
  8999. A_UINT32 phy_warm_reset_ucode_trig;
  9000. A_UINT32 mac_cold_reset;
  9001. A_UINT32 mac_warm_reset;
  9002. A_UINT32 mac_warm_reset_restore_cal;
  9003. A_UINT32 phy_warm_reset_m3_ssr;
  9004. A_UINT32 fw_rx_rings_reset;
  9005. A_UINT32 tx_flush;
  9006. A_UINT32 hwsch_dev_reset_war;
  9007. A_UINT32 mac_cold_reset_restore_cal;
  9008. A_UINT32 mac_only_reset;
  9009. A_UINT32 mac_sfm_reset;
  9010. A_UINT32 tx_ldpc; /* Number of tx PPDUs with LDPC coding */
  9011. A_UINT32 rx_ldpc; /* Number of rx PPDUs with LDPC coding */
  9012. A_UINT32 gen_mpdu_end_reason[HTT_TX_TQM_MAX_GEN_MPDU_END_REASON];
  9013. A_UINT32 list_mpdu_end_reason[HTT_TX_TQM_MAX_LIST_MPDU_END_REASON];
  9014. A_UINT32 tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9015. A_UINT32 tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9016. A_UINT32 tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9017. A_UINT32 half_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9018. A_UINT32 quarter_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9019. A_UINT32 tx_su_punctured_mode[HTT_TX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
  9020. A_UINT32 rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9021. A_UINT32 rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9022. A_UINT32 rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  9023. A_UINT32 rx_stbc[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9024. A_UINT32 rts_cnt;
  9025. A_UINT32 rts_success;
  9026. } htt_stats_odd_pdev_mandatory_tlv;
  9027. /* preserve old name alias for new name consistent with the tag name */
  9028. typedef htt_stats_odd_pdev_mandatory_tlv htt_odd_mandatory_pdev_stats_tlv;
  9029. typedef struct _htt_odd_mandatory_mumimo_pdev_stats_tlv {
  9030. htt_tlv_hdr_t tlv_hdr;
  9031. A_UINT32 ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9032. A_UINT32 ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9033. A_UINT32 ac_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9034. A_UINT32 ax_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9035. A_UINT32 ac_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  9036. A_UINT32 ax_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  9037. A_UINT32 ul_mumimo_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  9038. A_UINT32 ul_mumimo_rx_nss[HTT_RX_PDEV_STATS_ULMUMIMO_NUM_SPATIAL_STREAMS];
  9039. A_UINT32 ul_mumimo_rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  9040. A_UINT32 rx_ulmumimo_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9041. A_UINT32 rx_ulmumimo_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9042. A_UINT32 rx_ulmumimo_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9043. } htt_dbg_odd_mandatory_mumimo_tlv;
  9044. /* preserve old name alias for new name consistent with the tag name */
  9045. typedef htt_dbg_odd_mandatory_mumimo_tlv
  9046. htt_odd_mandatory_mumimo_pdev_stats_tlv;
  9047. typedef struct _htt_odd_mandatory_muofdma_pdev_stats_tlv {
  9048. htt_tlv_hdr_t tlv_hdr;
  9049. A_UINT32 mu_ofdma_seq_posted;
  9050. A_UINT32 ul_mu_ofdma_seq_posted;
  9051. A_UINT32 ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9052. A_UINT32 ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9053. A_UINT32 ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9054. A_UINT32 ofdma_tx_ldpc;
  9055. A_UINT32 ul_ofdma_rx_ldpc;
  9056. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
  9057. A_UINT32 ul_ofdma_rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  9058. A_UINT32 ul_ofdma_rx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  9059. A_UINT32 rx_ulofdma_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9060. A_UINT32 rx_ulofdma_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9061. A_UINT32 rx_ulofdma_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
  9062. A_UINT32 ax_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  9063. A_UINT32 be_mu_brp_sch_status[HTT_TX_PDEV_STATS_NUM_TX_ERR_STATUS];
  9064. A_UINT32 ofdma_tx_ru_size[HTT_TX_PDEV_STATS_NUM_AX_RU_SIZE_COUNTERS];
  9065. } htt_dbg_odd_mandatory_muofdma_tlv;
  9066. /* preserve old name alias for new name consistent with the tag name */
  9067. typedef htt_dbg_odd_mandatory_muofdma_tlv
  9068. htt_odd_mandatory_muofdma_pdev_stats_tlv;
  9069. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_M 0x000000ff
  9070. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_S 0
  9071. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_GET(_var) \
  9072. (((_var) & HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_M) >> \
  9073. HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_S)
  9074. #define HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_SET(_var, _val) \
  9075. do { \
  9076. HTT_CHECK_SET_VAL(HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID, _val); \
  9077. ((_var) |= ((_val) << HTT_PDEV_SCHED_ALGO_OFDMA_STATS_MAC_ID_S)); \
  9078. } while (0)
  9079. typedef enum {
  9080. HTT_STATS_SCHED_OFDMA_TXBF = 0, /* 0 */
  9081. HTT_STATS_SCHED_OFDMA_TXBF_IS_SANITY_FAILED, /* 1 */
  9082. HTT_STATS_SCHED_OFDMA_TXBF_IS_EBF_ALLOWED_FAILIED, /* 2 */
  9083. HTT_STATS_SCHED_OFDMA_TXBF_RU_ALLOC_BW_DROP_COUNT, /* 3 */
  9084. HTT_STATS_SCHED_OFDMA_TXBF_INVALID_CV_QUERY_COUNT, /* 4 */
  9085. HTT_STATS_SCHED_OFDMA_TXBF_AVG_TXTIME_LESS_THAN_TXBF_SND_THERHOLD, /* 5 */
  9086. HTT_STATS_SCHED_OFDMA_TXBF_IS_CANDIDATE_KICKED_OUT, /* 6 */
  9087. HTT_STATS_SCHED_OFDMA_TXBF_CV_IMAGE_BUF_INVALID, /* 7 */
  9088. HTT_STATS_SCHED_OFDMA_TXBF_INELIGIBILITY_MAX,
  9089. } htt_stats_sched_ofdma_txbf_ineligibility_t;
  9090. #define HTT_MAX_NUM_CHAN_ACC_LAT_INTR 9
  9091. typedef struct {
  9092. htt_tlv_hdr_t tlv_hdr;
  9093. /**
  9094. * BIT [ 7 : 0] :- mac_id
  9095. * BIT [31 : 8] :- reserved
  9096. */
  9097. union {
  9098. struct {
  9099. A_UINT32 mac_id: 8,
  9100. reserved: 24;
  9101. };
  9102. A_UINT32 mac_id__word;
  9103. };
  9104. /** Num of instances where rate based DL OFDMA status = ENABLED */
  9105. A_UINT32 rate_based_dlofdma_enabled_count[HTT_NUM_AC_WMM];
  9106. /** Num of instances where rate based DL OFDMA status = DISABLED */
  9107. A_UINT32 rate_based_dlofdma_disabled_count[HTT_NUM_AC_WMM];
  9108. /** Num of instances where rate based DL OFDMA status = PROBING */
  9109. A_UINT32 rate_based_dlofdma_probing_count[HTT_NUM_AC_WMM];
  9110. /** Num of instances where rate based DL OFDMA status = MONITORING */
  9111. A_UINT32 rate_based_dlofdma_monitoring_count[HTT_NUM_AC_WMM];
  9112. /** Num of instances where avg. channel access latency based DL OFDMA status = ENABLED */
  9113. A_UINT32 chan_acc_lat_based_dlofdma_enabled_count[HTT_NUM_AC_WMM];
  9114. /** Num of instances where avg. channel access latency based DL OFDMA status = DISABLED */
  9115. A_UINT32 chan_acc_lat_based_dlofdma_disabled_count[HTT_NUM_AC_WMM];
  9116. /** Num of instances where avg. channel access latency based DL OFDMA status = MONITORING */
  9117. A_UINT32 chan_acc_lat_based_dlofdma_monitoring_count[HTT_NUM_AC_WMM];
  9118. /** Num of instances where dl ofdma is disabled due to ru allocation failure */
  9119. A_UINT32 downgrade_to_dl_su_ru_alloc_fail[HTT_NUM_AC_WMM];
  9120. /** Num of instances where dl ofdma is disabled because we have only one user in candidate list */
  9121. A_UINT32 candidate_list_single_user_disable_ofdma[HTT_NUM_AC_WMM];
  9122. /** Num of instances where ul is chosen over dl based on qos weight not specific to OFDMA */
  9123. A_UINT32 dl_cand_list_dropped_high_ul_qos_weight[HTT_NUM_AC_WMM];
  9124. /** Num of instances where dl ofdma is disabled due to pipelining */
  9125. A_UINT32 ax_dlofdma_disabled_due_to_pipelining[HTT_NUM_AC_WMM];
  9126. /** Num of instances where dl ofdma is disabled as the tid is su only eligible */
  9127. A_UINT32 dlofdma_disabled_su_only_eligible[HTT_NUM_AC_WMM];
  9128. /** Num of instances where dl ofdma is disabled because there are no mpdus tried consecutively */
  9129. A_UINT32 dlofdma_disabled_consec_no_mpdus_tried[HTT_NUM_AC_WMM];
  9130. /** Num of instances where dl ofdma is disabled because there are consecutive mpdu failure */
  9131. A_UINT32 dlofdma_disabled_consec_no_mpdus_success[HTT_NUM_AC_WMM];
  9132. A_UINT32 txbf_ofdma_ineligibility_stat[HTT_STATS_SCHED_OFDMA_TXBF_INELIGIBILITY_MAX];
  9133. /** Average channel access latency histogram stats
  9134. *
  9135. * avg_chan_acc_lat_hist[0]: channel access latency is < 100 us
  9136. * avg_chan_acc_lat_hist[1]: 100 us <= channel access latency < 200 us
  9137. * avg_chan_acc_lat_hist[2]: 200 us <= channel access latency < 300 us
  9138. * avg_chan_acc_lat_hist[3]: 300 us <= channel access latency < 400 us
  9139. * avg_chan_acc_lat_hist[4]: 400 us <= channel access latency < 500 us
  9140. * avg_chan_acc_lat_hist[5]: 500 us <= channel access latency < 1000 us
  9141. * avg_chan_acc_lat_hist[6]: 1000 us <= channel access latency < 1500 us
  9142. * avg_chan_acc_lat_hist[7]: 1500 us <= channel access latency < 2000 us
  9143. * avg_chan_acc_lat_hist[8]: channel access latency is >= 2000 us
  9144. */
  9145. A_UINT32 avg_chan_acc_lat_hist[HTT_MAX_NUM_CHAN_ACC_LAT_INTR];
  9146. } htt_stats_pdev_sched_algo_ofdma_stats_tlv;
  9147. /* preserve old name alias for new name consistent with the tag name */
  9148. typedef htt_stats_pdev_sched_algo_ofdma_stats_tlv
  9149. htt_pdev_sched_algo_ofdma_stats_tlv;
  9150. typedef struct {
  9151. htt_tlv_hdr_t tlv_hdr;
  9152. /** mac_id__word:
  9153. * BIT [ 7 : 0] :- mac_id
  9154. * Use the HTT_STATS_CMN_MAC_ID_GET,_SET macros to
  9155. * read/write this bitfield.
  9156. * BIT [31 : 8] :- reserved
  9157. */
  9158. A_UINT32 mac_id__word;
  9159. A_UINT32 basic_trigger_across_bss;
  9160. A_UINT32 basic_trigger_within_bss;
  9161. A_UINT32 bsr_trigger_across_bss;
  9162. A_UINT32 bsr_trigger_within_bss;
  9163. A_UINT32 mu_rts_across_bss;
  9164. A_UINT32 mu_rts_within_bss;
  9165. A_UINT32 ul_mumimo_trigger_across_bss;
  9166. A_UINT32 ul_mumimo_trigger_within_bss;
  9167. } htt_stats_pdev_mbssid_ctrl_frame_stats_tlv;
  9168. /* preserve old name alias for new name consistent with the tag name */
  9169. typedef htt_stats_pdev_mbssid_ctrl_frame_stats_tlv
  9170. htt_pdev_mbssid_ctrl_frame_stats_tlv;
  9171. typedef struct {
  9172. htt_tlv_hdr_t tlv_hdr;
  9173. /**
  9174. * BIT [ 7 : 0] :- mac_id
  9175. * Use the HTT_STATS_TDMA_MAC_ID_GET macro to extract
  9176. * this bitfield.
  9177. * BIT [31 : 8] :- reserved
  9178. */
  9179. union {
  9180. struct {
  9181. A_UINT32 mac_id: 8,
  9182. reserved: 24;
  9183. };
  9184. A_UINT32 mac_id__word;
  9185. };
  9186. /** Num of Active TDMA schedules */
  9187. A_UINT32 num_tdma_active_schedules;
  9188. /** Num of Reserved TDMA schedules */
  9189. A_UINT32 num_tdma_reserved_schedules;
  9190. /** Num of Restricted TDMA schedules */
  9191. A_UINT32 num_tdma_restricted_schedules;
  9192. /** Num of Unconfigured TDMA schedules */
  9193. A_UINT32 num_tdma_unconfigured_schedules;
  9194. /** Num of TDMA slot switches */
  9195. A_UINT32 num_tdma_slot_switches;
  9196. /** Num of TDMA EDCA switches */
  9197. A_UINT32 num_tdma_edca_switches;
  9198. } htt_stats_pdev_tdma_tlv;
  9199. /* preserve old name alias for new name consistent with the tag name */
  9200. typedef htt_stats_pdev_tdma_tlv htt_pdev_tdma_stats_tlv;
  9201. #define HTT_STATS_TDMA_MAC_ID_M 0x000000ff
  9202. #define HTT_STATS_TDMA_MAC_ID_S 0
  9203. #define HTT_STATS_TDMA_MAC_ID_GET(_var) \
  9204. (((_var) & HTT_STATS_TDMA_MAC_ID_M) >> \
  9205. HTT_STATS_TDMA_MAC_ID_S)
  9206. /*======= Bandwidth Manager stats ====================*/
  9207. #define HTT_BW_MGR_STATS_MAC_ID_M 0x000000ff
  9208. #define HTT_BW_MGR_STATS_MAC_ID_S 0
  9209. #define HTT_BW_MGR_STATS_PRI20_IDX_M 0x0000ff00
  9210. #define HTT_BW_MGR_STATS_PRI20_IDX_S 8
  9211. #define HTT_BW_MGR_STATS_PRI20_FREQ_M 0xffff0000
  9212. #define HTT_BW_MGR_STATS_PRI20_FREQ_S 16
  9213. #define HTT_BW_MGR_STATS_CENTER_FREQ1_M 0x0000ffff
  9214. #define HTT_BW_MGR_STATS_CENTER_FREQ1_S 0
  9215. #define HTT_BW_MGR_STATS_CENTER_FREQ2_M 0xffff0000
  9216. #define HTT_BW_MGR_STATS_CENTER_FREQ2_S 16
  9217. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_M 0x000000ff
  9218. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_S 0
  9219. #define HTT_BW_MGR_STATS_STATIC_PATTERN_M 0x00ffff00
  9220. #define HTT_BW_MGR_STATS_STATIC_PATTERN_S 8
  9221. #define HTT_BW_MGR_STATS_MAC_ID_GET(_var) \
  9222. (((_var) & HTT_BW_MGR_STATS_MAC_ID_M) >> \
  9223. HTT_BW_MGR_STATS_MAC_ID_S)
  9224. #define HTT_BW_MGR_STATS_MAC_ID_SET(_var, _val) \
  9225. do { \
  9226. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_MAC_ID, _val); \
  9227. ((_var) |= ((_val) << HTT_BW_MGR_STATS_MAC_ID_S)); \
  9228. } while (0)
  9229. #define HTT_BW_MGR_STATS_PRI20_IDX_GET(_var) \
  9230. (((_var) & HTT_BW_MGR_STATS_PRI20_IDX_M) >> \
  9231. HTT_BW_MGR_STATS_PRI20_IDX_S)
  9232. #define HTT_BW_MGR_STATS_PRI20_IDX_SET(_var, _val) \
  9233. do { \
  9234. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_IDX, _val); \
  9235. ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_IDX_S)); \
  9236. } while (0)
  9237. #define HTT_BW_MGR_STATS_PRI20_FREQ_GET(_var) \
  9238. (((_var) & HTT_BW_MGR_STATS_PRI20_FREQ_M) >> \
  9239. HTT_BW_MGR_STATS_PRI20_FREQ_S)
  9240. #define HTT_BW_MGR_STATS_PRI20_FREQ_SET(_var, _val) \
  9241. do { \
  9242. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_PRI20_FREQ, _val); \
  9243. ((_var) |= ((_val) << HTT_BW_MGR_STATS_PRI20_FREQ_S)); \
  9244. } while (0)
  9245. #define HTT_BW_MGR_STATS_CENTER_FREQ1_GET(_var) \
  9246. (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ1_M) >> \
  9247. HTT_BW_MGR_STATS_CENTER_FREQ1_S)
  9248. #define HTT_BW_MGR_STATS_CENTER_FREQ1_SET(_var, _val) \
  9249. do { \
  9250. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ1, _val); \
  9251. ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ1_S)); \
  9252. } while (0)
  9253. #define HTT_BW_MGR_STATS_CENTER_FREQ2_GET(_var) \
  9254. (((_var) & HTT_BW_MGR_STATS_CENTER_FREQ2_M) >> \
  9255. HTT_BW_MGR_STATS_CENTER_FREQ2_S)
  9256. #define HTT_BW_MGR_STATS_CENTER_FREQ2_SET(_var, _val) \
  9257. do { \
  9258. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CENTER_FREQ2, _val); \
  9259. ((_var) |= ((_val) << HTT_BW_MGR_STATS_CENTER_FREQ2_S)); \
  9260. } while (0)
  9261. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_GET(_var) \
  9262. (((_var) & HTT_BW_MGR_STATS_CHAN_PHY_MODE_M) >> \
  9263. HTT_BW_MGR_STATS_CHAN_PHY_MODE_S)
  9264. #define HTT_BW_MGR_STATS_CHAN_PHY_MODE_SET(_var, _val) \
  9265. do { \
  9266. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_CHAN_PHY_MODE, _val); \
  9267. ((_var) |= ((_val) << HTT_BW_MGR_STATS_CHAN_PHY_MODE_S)); \
  9268. } while (0)
  9269. #define HTT_BW_MGR_STATS_STATIC_PATTERN_GET(_var) \
  9270. (((_var) & HTT_BW_MGR_STATS_STATIC_PATTERN_M) >> \
  9271. HTT_BW_MGR_STATS_STATIC_PATTERN_S)
  9272. #define HTT_BW_MGR_STATS_STATIC_PATTERN_SET(_var, _val) \
  9273. do { \
  9274. HTT_CHECK_SET_VAL(HTT_BW_MGR_STATS_STATIC_PATTERN, _val); \
  9275. ((_var) |= ((_val) << HTT_BW_MGR_STATS_STATIC_PATTERN_S)); \
  9276. } while (0)
  9277. typedef struct {
  9278. htt_tlv_hdr_t tlv_hdr;
  9279. /* BIT [ 7 : 0] :- mac_id
  9280. * BIT [ 15 : 8] :- pri20_index
  9281. * BIT [ 31 : 16] :- pri20_freq in Mhz
  9282. */
  9283. A_UINT32 mac_id__pri20_idx__freq;
  9284. /* BIT [ 15 : 0] :- centre_freq1
  9285. * BIT [ 31 : 16] :- centre_freq2
  9286. */
  9287. A_UINT32 centre_freq1__freq2;
  9288. /* BIT [ 7 : 0] :- channel_phy_mode
  9289. * BIT [ 23 : 8] :- static_pattern
  9290. */
  9291. A_UINT32 phy_mode__static_pattern;
  9292. } htt_stats_pdev_bw_mgr_stats_tlv;
  9293. /* preserve old name alias for new name consistent with the tag name */
  9294. typedef htt_stats_pdev_bw_mgr_stats_tlv htt_pdev_bw_mgr_stats_tlv;
  9295. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_BW_MGR
  9296. * TLV_TAGS:
  9297. * - HTT_STATS_PDEV_BW_MGR_STATS_TAG
  9298. */
  9299. /* NOTE:
  9300. * This structure is for documentation, and cannot be safely used directly.
  9301. * Instead, use the constituent TLV structures to fill/parse.
  9302. */
  9303. typedef struct {
  9304. htt_stats_pdev_bw_mgr_stats_tlv bw_mgr_tlv;
  9305. } htt_pdev_bw_mgr_stats_t;
  9306. /*============= start MLO UMAC SSR stats ============= { */
  9307. typedef enum {
  9308. HTT_MLO_UMAC_SSR_DBG_POINT_INVALID = 0,
  9309. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_DISABLE_RXDMA_PREFETCH,
  9310. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_PMACS_HWMLOS,
  9311. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_GLOBAL_WSI,
  9312. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_PMACS_DMAC,
  9313. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_TCL,
  9314. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_TQM,
  9315. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_WBM,
  9316. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_REO,
  9317. HTT_MLO_UMAC_SSR_DBG_POINT_PRE_RESET_HOST,
  9318. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_PREREQUISITES,
  9319. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_PRE_RING_RESET,
  9320. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_APPLY_SOFT_RESET,
  9321. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_POST_RING_RESET,
  9322. HTT_MLO_UMAC_SSR_DBG_POINT_RESET_FW_TQM_CMDQS,
  9323. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_HOST,
  9324. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_UMAC_INTERRUPTS,
  9325. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_WBM,
  9326. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_REO,
  9327. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_TQM,
  9328. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_PMACS_DMAC,
  9329. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_TQM_SYNC_CMD,
  9330. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_GLOBAL_WSI,
  9331. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_PMACS_HWMLOS,
  9332. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_ENABLE_RXDMA_PREFETCH,
  9333. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_TCL,
  9334. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_HOST_ENQ,
  9335. HTT_MLO_UMAC_SSR_DBG_POINT_POST_RESET_VERIFY_UMAC_RECOVERED,
  9336. /* The below debug point values are reserved for future expansion. */
  9337. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED28,
  9338. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED29,
  9339. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED30,
  9340. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED31,
  9341. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED32,
  9342. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED33,
  9343. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED34,
  9344. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED35,
  9345. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED36,
  9346. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED37,
  9347. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED38,
  9348. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED39,
  9349. HTT_MLO_UMAC_SSR_DBG_POINT_RESERVED40,
  9350. /*
  9351. * Due to backwards compatibility requirements, no futher DBG_POINT values
  9352. * can be added (but the above reserved values can be repurposed).
  9353. */
  9354. HTT_MLO_UMAC_SSR_DBG_POINT_MAX,
  9355. } HTT_MLO_UMAC_SSR_DBG_POINTS;
  9356. typedef enum {
  9357. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_INVALID = 0,
  9358. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_DO_PRE_RESET,
  9359. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_DO_POST_RESET_START,
  9360. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_DO_POST_RESET_COMPLETE,
  9361. /* The below recovery handshake values are reserved for future expansion. */
  9362. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED4,
  9363. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED5,
  9364. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED6,
  9365. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED7,
  9366. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_RESERVED8,
  9367. /*
  9368. * Due to backwards compatibility requirements, no futher
  9369. * RECOVERY_HANDSHAKE values can be added (but the above
  9370. * reserved values can be repurposed).
  9371. */
  9372. HTT_MLO_UMAC_RECOVERY_HANDSHAKE_COUNT,
  9373. } HTT_MLO_UMAC_RECOVERY_HANDSHAKES;
  9374. typedef struct {
  9375. htt_tlv_hdr_t tlv_hdr;
  9376. A_UINT32 start_ms;
  9377. A_UINT32 end_ms;
  9378. A_UINT32 delta_ms;
  9379. A_UINT32 reserved;
  9380. A_UINT32 footprint; /* holds a HTT_MLO_UMAC_SSR_DBG_POINTS value */
  9381. A_UINT32 tqm_hw_tstamp;
  9382. } htt_stats_mlo_umac_ssr_dbg_tlv;
  9383. /* preserve old name alias for new name consistent with the tag name */
  9384. typedef htt_stats_mlo_umac_ssr_dbg_tlv htt_mlo_umac_ssr_dbg_tlv;
  9385. typedef struct {
  9386. A_UINT32 last_mlo_htt_handshake_delta_ms;
  9387. A_UINT32 max_mlo_htt_handshake_delta_ms;
  9388. union {
  9389. A_UINT32 umac_recovery_done_mask;
  9390. struct {
  9391. A_UINT32 pre_reset_disable_rxdma_prefetch : 1,
  9392. pre_reset_pmacs_hwmlos : 1,
  9393. pre_reset_global_wsi : 1,
  9394. pre_reset_pmacs_dmac : 1,
  9395. pre_reset_tcl : 1,
  9396. pre_reset_tqm : 1,
  9397. pre_reset_wbm : 1,
  9398. pre_reset_reo : 1,
  9399. pre_reset_host : 1,
  9400. reset_prerequisites : 1,
  9401. reset_pre_ring_reset : 1,
  9402. reset_apply_soft_reset : 1,
  9403. reset_post_ring_reset : 1,
  9404. reset_fw_tqm_cmdqs : 1,
  9405. post_reset_host : 1,
  9406. post_reset_umac_interrupts : 1,
  9407. post_reset_wbm : 1,
  9408. post_reset_reo : 1,
  9409. post_reset_tqm : 1,
  9410. post_reset_pmacs_dmac : 1,
  9411. post_reset_tqm_sync_cmd : 1,
  9412. post_reset_global_wsi : 1,
  9413. post_reset_pmacs_hwmlos : 1,
  9414. post_reset_enable_rxdma_prefetch : 1,
  9415. post_reset_tcl : 1,
  9416. post_reset_host_enq : 1,
  9417. post_reset_verify_umac_recovered : 1,
  9418. reserved : 5;
  9419. } done_mask;
  9420. };
  9421. } htt_mlo_umac_ssr_mlo_stats_t;
  9422. typedef struct {
  9423. htt_tlv_hdr_t tlv_hdr;
  9424. htt_mlo_umac_ssr_mlo_stats_t mlo;
  9425. } htt_stats_mlo_umac_ssr_mlo_tlv;
  9426. /* preserve old name alias for new name consistent with the tag name */
  9427. typedef htt_stats_mlo_umac_ssr_mlo_tlv htt_mlo_umac_ssr_mlo_stats_tlv;
  9428. /* dword0 - b'0 - PRE_RESET_DISABLE_RXDMA_PREFETCH */
  9429. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_M 0x1
  9430. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_S 0
  9431. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_GET(word0) \
  9432. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_M) >> \
  9433. HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_S)
  9434. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_SET(word0, _val) \
  9435. do { \
  9436. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH, _val); \
  9437. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_DISABLE_RXDMA_PREFETCH_S));\
  9438. } while (0)
  9439. /* dword0 - b'1 - PRE_RESET_PMACS_HWMLOS */
  9440. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_M 0x2
  9441. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_S 1
  9442. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_GET(word0) \
  9443. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_M) >> \
  9444. HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_S)
  9445. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_SET(word0, _val) \
  9446. do { \
  9447. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS, _val); \
  9448. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_HWMLOS_S));\
  9449. } while (0)
  9450. /* dword0 - b'2 - PRE_RESET_GLOBAL_WSI */
  9451. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_M 0x4
  9452. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_S 2
  9453. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_GET(word0) \
  9454. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_M) >> \
  9455. HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_S)
  9456. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_SET(word0, _val) \
  9457. do { \
  9458. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI, _val); \
  9459. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_GLOBAL_WSI_S));\
  9460. } while (0)
  9461. /* dword0 - b'3 - PRE_RESET_PMACS_DMAC */
  9462. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_M 0x8
  9463. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_S 3
  9464. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_GET(word0) \
  9465. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_M) >> \
  9466. HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_S)
  9467. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_SET(word0, _val) \
  9468. do { \
  9469. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC, _val); \
  9470. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_PMACS_DMAC_S));\
  9471. } while (0)
  9472. /* dword0 - b'4 - PRE_RESET_TCL */
  9473. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_M 0x10
  9474. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_S 4
  9475. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_GET(word0) \
  9476. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_M) >> \
  9477. HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_S)
  9478. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_SET(word0, _val) \
  9479. do { \
  9480. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL, _val); \
  9481. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_TCL_S));\
  9482. } while (0)
  9483. /* dword0 - b'5 - PRE_RESET_TQM */
  9484. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_M 0x20
  9485. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_S 5
  9486. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_GET(word0) \
  9487. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_M) >> \
  9488. HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_S)
  9489. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_SET(word0, _val) \
  9490. do { \
  9491. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM, _val); \
  9492. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_TQM_S));\
  9493. } while (0)
  9494. /* dword0 - b'6 - PRE_RESET_WBM */
  9495. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_M 0x40
  9496. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_S 6
  9497. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_GET(word0) \
  9498. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_M) >> \
  9499. HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_S)
  9500. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_SET(word0, _val) \
  9501. do { \
  9502. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM, _val); \
  9503. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_WBM_S));\
  9504. } while (0)
  9505. /* dword0 - b'7 - PRE_RESET_REO */
  9506. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_M 0x80
  9507. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_S 7
  9508. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_GET(word0) \
  9509. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_M) >> \
  9510. HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_S)
  9511. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_SET(word0, _val) \
  9512. do { \
  9513. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO, _val); \
  9514. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_REO_S));\
  9515. } while (0)
  9516. /* dword0 - b'8 - PRE_RESET_HOST */
  9517. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_M 0x100
  9518. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_S 8
  9519. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_GET(word0) \
  9520. (((word0) & HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_M) >> \
  9521. HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_S)
  9522. #define HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_SET(word0, _val) \
  9523. do { \
  9524. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST, _val); \
  9525. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_PRE_RESET_HOST_S));\
  9526. } while (0)
  9527. /* dword0 - b'9 - RESET_PREREQUISITES */
  9528. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_M 0x200
  9529. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_S 9
  9530. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_GET(word0) \
  9531. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_M) >> \
  9532. HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_S)
  9533. #define HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_SET(word0, _val) \
  9534. do { \
  9535. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES, _val); \
  9536. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_PREREQUISITES_S));\
  9537. } while (0)
  9538. /* dword0 - b'10 - RESET_PRE_RING_RESET */
  9539. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_M 0x400
  9540. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_S 10
  9541. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_GET(word0) \
  9542. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_M) >> \
  9543. HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_S)
  9544. #define HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_SET(word0, _val) \
  9545. do { \
  9546. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET, _val); \
  9547. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_PRE_RING_RESET_S));\
  9548. } while (0)
  9549. /* dword0 - b'11 - RESET_APPLY_SOFT_RESET */
  9550. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_M 0x800
  9551. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_S 11
  9552. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_GET(word0) \
  9553. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_M) >> \
  9554. HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_S)
  9555. #define HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_SET(word0, _val) \
  9556. do { \
  9557. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET, _val); \
  9558. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_APPLY_SOFT_RESET_S));\
  9559. } while (0)
  9560. /* dword0 - b'12 - RESET_POST_RING_RESET */
  9561. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_M 0x1000
  9562. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_S 12
  9563. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_GET(word0) \
  9564. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_M) >> \
  9565. HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_S)
  9566. #define HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_SET(word0, _val) \
  9567. do { \
  9568. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET, _val); \
  9569. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_POST_RING_RESET_S));\
  9570. } while (0)
  9571. /* dword0 - b'13 - RESET_FW_TQM_CMDQS */
  9572. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_M 0x2000
  9573. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_S 13
  9574. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_GET(word0) \
  9575. (((word0) & HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_M) >> \
  9576. HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_S)
  9577. #define HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_SET(word0, _val) \
  9578. do { \
  9579. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS, _val); \
  9580. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_RESET_FW_TQM_CMDQS_S));\
  9581. } while (0)
  9582. /* dword0 - b'14 - POST_RESET_HOST */
  9583. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_M 0x4000
  9584. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_S 14
  9585. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_GET(word0) \
  9586. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_M) >> \
  9587. HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_S)
  9588. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_SET(word0, _val) \
  9589. do { \
  9590. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST, _val); \
  9591. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_S));\
  9592. } while (0)
  9593. /* dword0 - b'15 - POST_RESET_UMAC_INTERRUPTS */
  9594. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_M 0x8000
  9595. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_S 15
  9596. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_GET(word0) \
  9597. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_M) >> \
  9598. HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_S)
  9599. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_SET(word0, _val) \
  9600. do { \
  9601. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS, _val); \
  9602. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_UMAC_INTERRUPTS_S));\
  9603. } while (0)
  9604. /* dword0 - b'16 - POST_RESET_WBM */
  9605. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_M 0x10000
  9606. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_S 16
  9607. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_GET(word0) \
  9608. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_M) >> \
  9609. HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_S)
  9610. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_SET(word0, _val) \
  9611. do { \
  9612. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM, _val); \
  9613. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_WBM_S));\
  9614. } while (0)
  9615. /* dword0 - b'17 - POST_RESET_REO */
  9616. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_M 0x20000
  9617. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_S 17
  9618. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_GET(word0) \
  9619. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_M) >> \
  9620. HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_S)
  9621. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_SET(word0, _val) \
  9622. do { \
  9623. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_REO, _val); \
  9624. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_REO_S));\
  9625. } while (0)
  9626. /* dword0 - b'18 - POST_RESET_TQM */
  9627. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_M 0x40000
  9628. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_S 18
  9629. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_GET(word0) \
  9630. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_M) >> \
  9631. HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_S)
  9632. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SET(word0, _val) \
  9633. do { \
  9634. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM, _val); \
  9635. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_S));\
  9636. } while (0)
  9637. /* dword0 - b'19 - POST_RESET_PMACS_DMAC */
  9638. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_M 0x80000
  9639. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_S 19
  9640. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_GET(word0) \
  9641. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_M) >> \
  9642. HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_S)
  9643. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_SET(word0, _val) \
  9644. do { \
  9645. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC, _val); \
  9646. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_DMAC_S));\
  9647. } while (0)
  9648. /* dword0 - b'20 - POST_RESET_TQM_SYNC_CMD */
  9649. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_M 0x100000
  9650. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_S 20
  9651. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_GET(word0) \
  9652. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_M) >> \
  9653. HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_S)
  9654. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_SET(word0, _val) \
  9655. do { \
  9656. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD, _val); \
  9657. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_TQM_SYNC_CMD_S));\
  9658. } while (0)
  9659. /* dword0 - b'21 - POST_RESET_GLOBAL_WSI */
  9660. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_M 0x200000
  9661. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_S 21
  9662. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_GET(word0) \
  9663. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_M) >> \
  9664. HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_S)
  9665. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_SET(word0, _val) \
  9666. do { \
  9667. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI, _val); \
  9668. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_GLOBAL_WSI_S));\
  9669. } while (0)
  9670. /* dword0 - b'22 - POST_RESET_PMACS_HWMLOS */
  9671. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_M 0x400000
  9672. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_S 22
  9673. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_GET(word0) \
  9674. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_M) >> \
  9675. HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_S)
  9676. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_SET(word0, _val) \
  9677. do { \
  9678. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS, _val); \
  9679. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_PMACS_HWMLOS_S));\
  9680. } while (0)
  9681. /* dword0 - b'23 - POST_RESET_ENABLE_RXDMA_PREFETCH */
  9682. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_M 0x800000
  9683. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_S 23
  9684. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_GET(word0) \
  9685. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_M) >> \
  9686. HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_S)
  9687. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_SET(word0, _val) \
  9688. do { \
  9689. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH, _val); \
  9690. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_ENABLE_RXDMA_PREFETCH_S));\
  9691. } while (0)
  9692. /* dword0 - b'24 - POST_RESET_TCL */
  9693. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_M 0x1000000
  9694. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_S 24
  9695. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_GET(word0) \
  9696. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_M) >> \
  9697. HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_S)
  9698. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_SET(word0, _val) \
  9699. do { \
  9700. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL, _val); \
  9701. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_TCL_S));\
  9702. } while (0)
  9703. /* dword0 - b'25 - POST_RESET_HOST_ENQ */
  9704. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_M 0x2000000
  9705. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_S 25
  9706. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_GET(word0) \
  9707. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_M) >> \
  9708. HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_S)
  9709. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_SET(word0, _val) \
  9710. do { \
  9711. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ, _val); \
  9712. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_HOST_ENQ_S));\
  9713. } while (0)
  9714. /* dword0 - b'26 - POST_RESET_VERIFY_UMAC_RECOVERED */
  9715. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_M 0x4000000
  9716. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_S 26
  9717. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_GET(word0) \
  9718. (((word0) & HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_M) >> \
  9719. HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_S)
  9720. #define HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_SET(word0, _val) \
  9721. do { \
  9722. HTT_CHECK_SET_VAL(HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED, _val); \
  9723. ((word0) |= ((_val) << HTT_UMAC_RECOVERY_DONE_POST_RESET_VERIFY_UMAC_RECOVERED_S));\
  9724. } while (0)
  9725. typedef struct {
  9726. htt_tlv_hdr_t tlv_hdr;
  9727. A_UINT32 last_trigger_request_ms;
  9728. A_UINT32 last_start_ms;
  9729. A_UINT32 last_start_disengage_umac_ms;
  9730. A_UINT32 last_enter_ssr_platform_thread_ms;
  9731. A_UINT32 last_exit_ssr_platform_thread_ms;
  9732. A_UINT32 last_start_engage_umac_ms;
  9733. A_UINT32 last_done_successful_ms;
  9734. A_UINT32 post_reset_tqm_sync_cmd_completion_ms;
  9735. A_UINT32 htt_sync_mlo_initiate_umac_recovery_ms;
  9736. A_UINT32 htt_sync_do_pre_reset_ms;
  9737. A_UINT32 htt_sync_do_post_reset_start_ms;
  9738. A_UINT32 htt_sync_do_post_reset_complete_ms;
  9739. } htt_stats_mlo_umac_ssr_kpi_tstmp_tlv;
  9740. /* preserve old name alias for new name consistent with the tag name */
  9741. typedef htt_stats_mlo_umac_ssr_kpi_tstmp_tlv
  9742. htt_mlo_umac_ssr_kpi_tstamp_stats_tlv;
  9743. typedef struct {
  9744. htt_tlv_hdr_t tlv_hdr;
  9745. A_UINT32 htt_sync_start_ms;
  9746. A_UINT32 htt_sync_delta_ms;
  9747. A_UINT32 post_t2h_start_ms;
  9748. A_UINT32 post_t2h_delta_ms;
  9749. A_UINT32 post_t2h_msg_read_shmem_ms;
  9750. A_UINT32 post_t2h_msg_write_shmem_ms;
  9751. A_UINT32 post_t2h_msg_send_msg_to_host_ms;
  9752. } htt_stats_mlo_umac_ssr_handshake_tlv;
  9753. /* preserve old name alias for new name consistent with the tag name */
  9754. typedef htt_stats_mlo_umac_ssr_handshake_tlv
  9755. htt_mlo_umac_htt_handshake_stats_tlv;
  9756. typedef struct {
  9757. /*
  9758. * Note that the host cannot use this struct directly, but instead needs
  9759. * to use the TLV header within each element of each of the arrays in
  9760. * this struct to determine where the subsequent item resides.
  9761. */
  9762. htt_stats_mlo_umac_ssr_dbg_tlv dbg_point[HTT_MLO_UMAC_SSR_DBG_POINT_MAX];
  9763. htt_stats_mlo_umac_ssr_handshake_tlv htt_handshakes[HTT_MLO_UMAC_RECOVERY_HANDSHAKE_COUNT];
  9764. } htt_mlo_umac_ssr_kpi_delta_stats_t;
  9765. typedef struct {
  9766. /*
  9767. * Since each item within htt_mlo_umac_ssr_kpi_delta_stats_t has its own
  9768. * TLV header, and since no additional fields are added in this struct
  9769. * beyond the htt_mlo_umac_ssr_kpi_delta_stats_t info, no additional
  9770. * TLV header is needed.
  9771. *
  9772. * Note that the host cannot use this struct directly, but instead needs
  9773. * to use the TLV header within each item inside the
  9774. * htt_mlo_umac_ssr_kpi_delta_stats_t to determine where the subsequent
  9775. * item resides.
  9776. */
  9777. htt_mlo_umac_ssr_kpi_delta_stats_t kpi_delta;
  9778. } htt_mlo_umac_ssr_kpi_delta_stats_tlv;
  9779. typedef struct {
  9780. A_UINT32 last_e2e_delta_ms;
  9781. A_UINT32 max_e2e_delta_ms;
  9782. A_UINT32 per_handshake_max_allowed_delta_ms;
  9783. /* Total done count */
  9784. A_UINT32 total_success_runs_cnt;
  9785. A_UINT32 umac_recovery_in_progress;
  9786. /* Count of Disengaged in Pre reset */
  9787. A_UINT32 umac_disengaged_count;
  9788. /* Count of UMAC Soft/Control Reset */
  9789. A_UINT32 umac_soft_reset_count;
  9790. /* Count of Engaged in Post reset */
  9791. A_UINT32 umac_engaged_count;
  9792. } htt_mlo_umac_ssr_common_stats_t;
  9793. typedef struct {
  9794. htt_tlv_hdr_t tlv_hdr;
  9795. htt_mlo_umac_ssr_common_stats_t cmn;
  9796. } htt_stats_mlo_umac_ssr_cmn_tlv;
  9797. /* preserve old name alias for new name consistent with the tag name */
  9798. typedef htt_stats_mlo_umac_ssr_cmn_tlv htt_mlo_umac_ssr_common_stats_tlv;
  9799. typedef struct {
  9800. A_UINT32 trigger_requests_count;
  9801. A_UINT32 trigger_count_for_umac_hang;
  9802. A_UINT32 trigger_count_for_mlo_target_recovery_mode1;
  9803. A_UINT32 trigger_count_for_unknown_signature;
  9804. A_UINT32 total_trig_dropped;
  9805. A_UINT32 trigger_count_for_unit_test_direct_trigger;
  9806. A_UINT32 trigger_count_for_tx_de_wdg_dummy_frame_tout;
  9807. A_UINT32 trigger_count_for_peer_delete_wdg_dummy_frame_tout;
  9808. A_UINT32 trigger_count_for_reo_hang;
  9809. A_UINT32 trigger_count_for_tqm_hang;
  9810. A_UINT32 trigger_count_for_tcl_hang;
  9811. A_UINT32 trigger_count_for_wbm_hang;
  9812. } htt_mlo_umac_ssr_trigger_stats_t;
  9813. typedef struct {
  9814. htt_tlv_hdr_t tlv_hdr;
  9815. htt_mlo_umac_ssr_trigger_stats_t trigger;
  9816. } htt_stats_mlo_umac_ssr_trigger_tlv;
  9817. /* preserve old name alias for new name consistent with the tag name */
  9818. typedef htt_stats_mlo_umac_ssr_trigger_tlv htt_mlo_umac_ssr_trigger_stats_tlv;
  9819. typedef struct {
  9820. /*
  9821. * Note that the host cannot use this struct directly, but instead needs
  9822. * to use the TLV header within each element to determine where the
  9823. * subsequent element resides.
  9824. */
  9825. htt_mlo_umac_ssr_kpi_delta_stats_tlv kpi_delta_tlv;
  9826. htt_stats_mlo_umac_ssr_kpi_tstmp_tlv kpi_tstamp_tlv;
  9827. } htt_mlo_umac_ssr_kpi_stats_t;
  9828. typedef struct {
  9829. /*
  9830. * Since the embedded sub-struct within htt_mlo_umac_ssr_kpi_stats_tlv
  9831. * has its own TLV header, and since no additional fields are added in
  9832. * this struct beyond the htt_mlo_umac_ssr_kpi_stats_t info, no additional
  9833. * TLV header is needed.
  9834. *
  9835. * Note that the host cannot use this struct directly, but instead needs
  9836. * to use the TLV header within the htt_mlo_umac_ssr_kpi_stats_t sub-struct
  9837. * to determine how much data is present for this struct.
  9838. */
  9839. htt_mlo_umac_ssr_kpi_stats_t kpi;
  9840. } htt_mlo_umac_ssr_kpi_stats_tlv;
  9841. typedef struct {
  9842. /*
  9843. * Note that the host cannot use this struct directly, but instead needs
  9844. * to use the TLV header within each element to determine where the
  9845. * subsequent element resides.
  9846. */
  9847. htt_stats_mlo_umac_ssr_trigger_tlv trigger_tlv;
  9848. htt_mlo_umac_ssr_kpi_stats_tlv kpi_tlv;
  9849. htt_stats_mlo_umac_ssr_mlo_tlv mlo_tlv;
  9850. htt_stats_mlo_umac_ssr_cmn_tlv cmn_tlv;
  9851. } htt_mlo_umac_ssr_stats_tlv;
  9852. /*============= end MLO UMAC SSR stats ============= } */
  9853. typedef struct {
  9854. A_UINT32 total_done;
  9855. A_UINT32 trigger_requests_count;
  9856. A_UINT32 total_trig_dropped;
  9857. A_UINT32 umac_disengaged_count;
  9858. A_UINT32 umac_soft_reset_count;
  9859. A_UINT32 umac_engaged_count;
  9860. A_UINT32 last_trigger_request_ms;
  9861. A_UINT32 last_start_ms;
  9862. A_UINT32 last_start_disengage_umac_ms;
  9863. A_UINT32 last_enter_ssr_platform_thread_ms;
  9864. A_UINT32 last_exit_ssr_platform_thread_ms;
  9865. A_UINT32 last_start_engage_umac_ms;
  9866. A_UINT32 last_done_successful_ms;
  9867. A_UINT32 last_e2e_delta_ms;
  9868. A_UINT32 max_e2e_delta_ms;
  9869. A_UINT32 trigger_count_for_umac_hang;
  9870. A_UINT32 trigger_count_for_mlo_quick_ssr;
  9871. A_UINT32 trigger_count_for_unknown_signature;
  9872. A_UINT32 post_reset_tqm_sync_cmd_completion_ms;
  9873. A_UINT32 htt_sync_mlo_initiate_umac_recovery_ms;
  9874. A_UINT32 htt_sync_do_pre_reset_ms;
  9875. A_UINT32 htt_sync_do_post_reset_start_ms;
  9876. A_UINT32 htt_sync_do_post_reset_complete_ms;
  9877. } htt_umac_ssr_stats_t;
  9878. typedef struct {
  9879. htt_tlv_hdr_t tlv_hdr;
  9880. htt_umac_ssr_stats_t stats;
  9881. } htt_stats_umac_ssr_tlv;
  9882. /* preserve old name alias for new name consistent with the tag name */
  9883. typedef htt_stats_umac_ssr_tlv htt_umac_ssr_stats_tlv;
  9884. typedef struct {
  9885. htt_tlv_hdr_t tlv_hdr;
  9886. A_UINT32 svc_class_id;
  9887. /* codel_drops:
  9888. * How many times have MSDU queues belonging to this service class
  9889. * dropped their head MSDU due to the queue's latency being above
  9890. * the CoDel latency limit specified for the service class throughout
  9891. * the full CoDel latency statistics collection window.
  9892. */
  9893. A_UINT32 codel_drops;
  9894. /* codel_no_drops:
  9895. * How many times have MSDU queues belonging to this service class
  9896. * completed a CoDel latency statistics collection window and
  9897. * concluded that no head MSDU drop is needed, due to the MSDU queue's
  9898. * latency being under the limit specified for the service class at
  9899. * some point during the window.
  9900. */
  9901. A_UINT32 codel_no_drops;
  9902. } htt_stats_codel_svc_class_tlv;
  9903. /* preserve old name alias for new name consistent with the tag name */
  9904. typedef htt_stats_codel_svc_class_tlv htt_codel_svc_class_stats_tlv;
  9905. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_M 0x0000FFFF
  9906. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_S 0
  9907. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_GET(_var) \
  9908. (((_var) & HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_M) >> \
  9909. HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_S)
  9910. #define HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_SET(_var, _val) \
  9911. do { \
  9912. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM, _val); \
  9913. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_TX_FLOW_NUM_S)); \
  9914. } while (0)
  9915. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_M 0x00FF0000
  9916. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_S 16
  9917. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_GET(_var) \
  9918. (((_var) & HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_M) >> \
  9919. HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_S)
  9920. #define HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_SET(_var, _val) \
  9921. do { \
  9922. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID, _val); \
  9923. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_SVC_CLASS_ID_S)); \
  9924. } while (0)
  9925. #define HTT_CODEL_MSDUQ_STATS_DROPS_M 0x0000FFFF
  9926. #define HTT_CODEL_MSDUQ_STATS_DROPS_S 0
  9927. #define HTT_CODEL_MSDUQ_STATS_DROPS_GET(_var) \
  9928. (((_var) & HTT_CODEL_MSDUQ_STATS_DROPS_M) >> \
  9929. HTT_CODEL_MSDUQ_STATS_DROPS_S)
  9930. #define HTT_CODEL_MSDUQ_STATS_DROPS_SET(_var, _val) \
  9931. do { \
  9932. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_DROPS, _val); \
  9933. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_DROPS_S)); \
  9934. } while (0)
  9935. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_M 0xFFFF0000
  9936. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_S 16
  9937. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_GET(_var) \
  9938. (((_var) & HTT_CODEL_MSDUQ_STATS_NO_DROPS_M) >> \
  9939. HTT_CODEL_MSDUQ_STATS_NO_DROPS_S)
  9940. #define HTT_CODEL_MSDUQ_STATS_NO_DROPS_SET(_var, _val) \
  9941. do { \
  9942. HTT_CHECK_SET_VAL(HTT_CODEL_MSDUQ_STATS_NO_DROPS, _val); \
  9943. ((_var) |= ((_val) << HTT_CODEL_MSDUQ_STATS_NO_DROPS_S)); \
  9944. } while (0)
  9945. typedef struct {
  9946. htt_tlv_hdr_t tlv_hdr;
  9947. union {
  9948. A_UINT32 id__word;
  9949. struct {
  9950. A_UINT32 tx_flow_num: 16, /* FW's MSDU queue ID */
  9951. svc_class_id: 8,
  9952. reserved: 8;
  9953. };
  9954. };
  9955. union {
  9956. A_UINT32 stats__word;
  9957. struct {
  9958. A_UINT32
  9959. codel_drops: 16,
  9960. codel_no_drops: 16;
  9961. };
  9962. };
  9963. } htt_stats_codel_msduq_tlv;
  9964. /* preserve old name alias for new name consistent with the tag name */
  9965. typedef htt_stats_codel_msduq_tlv htt_codel_msduq_stats_tlv;
  9966. /*===================== start MLO stats ====================*/
  9967. typedef struct {
  9968. htt_tlv_hdr_t tlv_hdr;
  9969. A_UINT32 pref_link_num_sec_link_sched;
  9970. A_UINT32 pref_link_num_pref_link_timeout;
  9971. A_UINT32 pref_link_num_pref_link_sch_delay_ipc;
  9972. A_UINT32 pref_link_num_pref_link_timeout_ipc;
  9973. } htt_stats_mlo_sched_stats_tlv;
  9974. /* preserve old name alias for new name consistent with the tag name */
  9975. typedef htt_stats_mlo_sched_stats_tlv htt_mlo_sched_stats_tlv;
  9976. /* STATS_TYPE : HTT_DBG_MLO_SCHED_STATS
  9977. * TLV_TAGS:
  9978. * - HTT_STATS_MLO_SCHED_STATS_TAG
  9979. */
  9980. /* NOTE:
  9981. * This structure is for documentation, and cannot be safely used directly.
  9982. * Instead, use the constituent TLV structures to fill/parse.
  9983. */
  9984. typedef struct _htt_mlo_sched_stats {
  9985. htt_stats_mlo_sched_stats_tlv preferred_link_stats;
  9986. } htt_mlo_sched_stats_t;
  9987. #define HTT_STATS_HWMLO_MAX_LINKS 6
  9988. #define HTT_STATS_MLO_MAX_IPC_RINGS 7
  9989. typedef struct {
  9990. htt_tlv_hdr_t tlv_hdr;
  9991. A_UINT32 mlo_ipc_ring_full_cnt[HTT_STATS_HWMLO_MAX_LINKS][HTT_STATS_MLO_MAX_IPC_RINGS];
  9992. } htt_stats_pdev_mlo_ipc_stats_tlv;
  9993. /* preserve old name alias for new name consistent with the tag name */
  9994. typedef htt_stats_pdev_mlo_ipc_stats_tlv htt_pdev_mlo_ipc_stats_tlv;
  9995. /* STATS_TYPE : HTT_DBG_MLO_IPC_STATS
  9996. * TLV_TAGS:
  9997. * - HTT_STATS_PDEV_MLO_IPC_STATS_TAG
  9998. */
  9999. /* NOTE:
  10000. * This structure is for documentation, and cannot be safely used directly.
  10001. * Instead, use the constituent TLV structures to fill/parse.
  10002. */
  10003. typedef struct _htt_mlo_ipc_stats {
  10004. htt_stats_pdev_mlo_ipc_stats_tlv mlo_ipc_stats;
  10005. } htt_pdev_mlo_ipc_stats_t;
  10006. /*===================== end MLO stats ======================*/
  10007. typedef enum {
  10008. HTT_CTRL_PATH_STATS_CAL_TYPE_ADC = 0x0,
  10009. HTT_CTRL_PATH_STATS_CAL_TYPE_DAC = 0x1,
  10010. HTT_CTRL_PATH_STATS_CAL_TYPE_PROCESS = 0x2,
  10011. HTT_CTRL_PATH_STATS_CAL_TYPE_NOISE_FLOOR = 0x3,
  10012. HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO = 0x4,
  10013. HTT_CTRL_PATH_STATS_CAL_TYPE_COMB_TXLO_TXIQ_RXIQ = 0x5,
  10014. HTT_CTRL_PATH_STATS_CAL_TYPE_TXLO = 0x6,
  10015. HTT_CTRL_PATH_STATS_CAL_TYPE_TXIQ = 0x7,
  10016. HTT_CTRL_PATH_STATS_CAL_TYPE_RXIQ = 0x8,
  10017. HTT_CTRL_PATH_STATS_CAL_TYPE_IM2 = 0x9,
  10018. HTT_CTRL_PATH_STATS_CAL_TYPE_LNA = 0xa,
  10019. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXDCO = 0xb,
  10020. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXIQ = 0xc,
  10021. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORYLESS = 0xd,
  10022. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORY = 0xe,
  10023. HTT_CTRL_PATH_STATS_CAL_TYPE_IBF = 0xf,
  10024. HTT_CTRL_PATH_STATS_CAL_TYPE_PDET_AND_PAL = 0x10,
  10025. HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_IQ = 0x11,
  10026. HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_DTIM = 0x12,
  10027. HTT_CTRL_PATH_STATS_CAL_TYPE_TPC_CAL = 0x13,
  10028. HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_TIMEREQ = 0x14,
  10029. HTT_CTRL_PATH_STATS_CAL_TYPE_BWFILTER = 0x15,
  10030. HTT_CTRL_PATH_STATS_CAL_TYPE_PEF = 0x16,
  10031. HTT_CTRL_PATH_STATS_CAL_TYPE_PADROOP = 0x17,
  10032. HTT_CTRL_PATH_STATS_CAL_TYPE_SELFCALTPC = 0x18,
  10033. HTT_CTRL_PATH_STATS_CAL_TYPE_RXSPUR = 0x19,
  10034. /* add new cal types above this line */
  10035. HTT_CTRL_PATH_STATS_CAL_TYPE_INVALID = 0xFF
  10036. } htt_ctrl_path_stats_cal_type_ids;
  10037. #define HTT_RETURN_STRING(str) case ((str)): return (A_UINT8 *)(# str);
  10038. #define HTT_GET_BITS(_val, _index, _num_bits) \
  10039. (((_val) >> (_index)) & ((1 << (_num_bits)) - 1))
  10040. #define HTT_CTRL_PATH_CALIBRATION_STATS_CAL_TYPE_GET(cal_info) \
  10041. HTT_GET_BITS(cal_info, 0, 8)
  10042. /*
  10043. * Used by some hosts to print names of cal type, based on
  10044. * htt_ctrl_path_cal_type_ids values specified in
  10045. * htt_ctrl_path_calibration_stats_struct in ctrl_path_stats event msg.
  10046. */
  10047. #ifdef HTT_CTRL_PATH_STATS_CAL_TYPE_STRINGS
  10048. static INLINE A_UINT8 *htt_ctrl_path_cal_type_id_to_name(A_UINT32 cal_type_id)
  10049. {
  10050. switch (cal_type_id)
  10051. {
  10052. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_ADC);
  10053. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DAC);
  10054. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PROCESS);
  10055. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_NOISE_FLOOR);
  10056. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO);
  10057. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_COMB_TXLO_TXIQ_RXIQ);
  10058. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_TXLO);
  10059. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_TXIQ);
  10060. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXIQ);
  10061. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_IM2);
  10062. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_LNA);
  10063. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXDCO);
  10064. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_LP_RXIQ);
  10065. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORYLESS);
  10066. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_MEMORY);
  10067. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_IBF);
  10068. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PDET_AND_PAL);
  10069. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_IQ);
  10070. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXDCO_DTIM);
  10071. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_TPC_CAL);
  10072. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_DPD_TIMEREQ);
  10073. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_BWFILTER);
  10074. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PEF);
  10075. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_PADROOP);
  10076. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_SELFCALTPC);
  10077. HTT_RETURN_STRING(HTT_CTRL_PATH_STATS_CAL_TYPE_RXSPUR);
  10078. }
  10079. return (A_UINT8 *) "HTT_CTRL_PATH_STATS_CAL_TYPE_UNKNOWN";
  10080. }
  10081. #endif /* HTT_CTRL_PATH_STATS_CAL_TYPE_STRINGS */
  10082. #endif /* __HTT_STATS_H__ */