internal.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef _WCD937X_INTERNAL_H
  6. #define _WCD937X_INTERNAL_H
  7. #include <asoc/wcd-clsh.h>
  8. #include <asoc/wcd-mbhc-v2.h>
  9. #include <asoc/wcd-irq.h>
  10. #include <soc/soundwire.h>
  11. #include "wcd937x-mbhc.h"
  12. #include "wcd937x.h"
  13. #define WCD937X_MAX_MICBIAS 3
  14. /* Convert from vout ctl to micbias voltage in mV */
  15. #define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
  16. #define MAX_PORT 8
  17. #define MAX_CH_PER_PORT 8
  18. #define MAX_TX_PWR_CH 2
  19. #define SWR_NUM_PORTS 4
  20. #define WCD937X_MAX_SLAVE_PORT_TYPES 10
  21. extern struct regmap_config wcd937x_regmap_config;
  22. struct codec_port_info {
  23. u32 slave_port_type;
  24. u32 master_port_type;
  25. u32 ch_mask;
  26. u32 num_ch;
  27. u32 ch_rate;
  28. };
  29. struct wcd937x_priv {
  30. struct device *dev;
  31. int variant;
  32. struct snd_soc_component *component;
  33. struct device_node *rst_np;
  34. struct regmap *regmap;
  35. struct swr_device *rx_swr_dev;
  36. struct swr_device *tx_swr_dev;
  37. s32 micb_ref[WCD937X_MAX_MICBIAS];
  38. s32 pullup_ref[WCD937X_MAX_MICBIAS];
  39. struct fw_info *fw_data;
  40. struct device_node *wcd_rst_np;
  41. struct mutex micb_lock;
  42. s32 dmic_0_1_clk_cnt;
  43. s32 dmic_2_3_clk_cnt;
  44. s32 dmic_4_5_clk_cnt;
  45. /* class h specific info */
  46. struct wcd_clsh_cdc_info clsh_info;
  47. /* mbhc module */
  48. struct wcd937x_mbhc *mbhc;
  49. u32 hph_mode;
  50. bool comp1_enable;
  51. bool comp2_enable;
  52. bool bcs_dis;
  53. struct irq_domain *virq;
  54. struct wcd_irq_info irq_info;
  55. u32 rx_clk_cnt;
  56. int num_irq_regs;
  57. /* to track the status */
  58. unsigned long status_mask;
  59. u8 num_tx_ports;
  60. u8 num_rx_ports;
  61. struct codec_port_info
  62. tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  63. struct codec_port_info
  64. rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  65. struct swr_port_params tx_port_params[SWR_UC_MAX][SWR_NUM_PORTS];
  66. struct swr_dev_frame_config swr_tx_port_params[SWR_UC_MAX];
  67. struct regulator_bulk_data *supplies;
  68. struct notifier_block nblock;
  69. /* wcd callback to bolero */
  70. void *handle;
  71. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  72. int (*register_notifier)(void *handle,
  73. struct notifier_block *nblock,
  74. bool enable);
  75. int (*wakeup)(void *handle, bool enable);
  76. u32 version;
  77. /* Entry for version info */
  78. struct snd_info_entry *entry;
  79. struct snd_info_entry *version_entry;
  80. /*Entry for Variant info*/
  81. struct snd_info_entry *variant_entry;
  82. int ear_rx_path;
  83. int ana_clk_count;
  84. int adc_count;
  85. struct mutex ana_tx_clk_lock;
  86. u8 tx_master_ch_map[WCD937X_MAX_SLAVE_CH_TYPES];
  87. bool usbc_hs_status;
  88. u32 tx_ch_pwr[MAX_TX_PWR_CH];
  89. };
  90. struct wcd937x_micbias_setting {
  91. u8 ldoh_v;
  92. u32 cfilt1_mv;
  93. u32 micb1_mv;
  94. u32 micb2_mv;
  95. u32 micb3_mv;
  96. u8 bias1_cfilt_sel;
  97. };
  98. struct wcd937x_pdata {
  99. struct device_node *rst_np;
  100. struct device_node *rx_slave;
  101. struct device_node *tx_slave;
  102. struct wcd937x_micbias_setting micbias;
  103. struct cdc_regulator *regulator;
  104. int num_supplies;
  105. };
  106. struct wcd_ctrl_platform_data {
  107. void *handle;
  108. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  109. int (*register_notifier)(void *handle,
  110. struct notifier_block *nblock,
  111. bool enable);
  112. };
  113. enum {
  114. WCD_RX1,
  115. WCD_RX2,
  116. WCD_RX3
  117. };
  118. enum {
  119. /* INTR_CTRL_INT_MASK_0 */
  120. WCD937X_IRQ_MBHC_BUTTON_PRESS_DET = 0,
  121. WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET,
  122. WCD937X_IRQ_MBHC_ELECT_INS_REM_DET,
  123. WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  124. WCD937X_IRQ_MBHC_SW_DET,
  125. WCD937X_IRQ_HPHR_OCP_INT,
  126. WCD937X_IRQ_HPHR_CNP_INT,
  127. WCD937X_IRQ_HPHL_OCP_INT,
  128. /* INTR_CTRL_INT_MASK_1 */
  129. WCD937X_IRQ_HPHL_CNP_INT,
  130. WCD937X_IRQ_EAR_CNP_INT,
  131. WCD937X_IRQ_EAR_SCD_INT,
  132. WCD937X_IRQ_AUX_CNP_INT,
  133. WCD937X_IRQ_AUX_SCD_INT,
  134. WCD937X_IRQ_HPHL_PDM_WD_INT,
  135. WCD937X_IRQ_HPHR_PDM_WD_INT,
  136. WCD937X_IRQ_AUX_PDM_WD_INT,
  137. /* INTR_CTRL_INT_MASK_2 */
  138. WCD937X_IRQ_LDORT_SCD_INT,
  139. WCD937X_IRQ_MBHC_MOISTURE_INT,
  140. WCD937X_IRQ_HPHL_SURGE_DET_INT,
  141. WCD937X_IRQ_HPHR_SURGE_DET_INT,
  142. WCD937X_NUM_IRQS,
  143. };
  144. extern void wcd937x_disable_bcs_before_slow_insert(
  145. struct snd_soc_component *component,
  146. bool bcs_disable);
  147. extern struct wcd937x_mbhc *wcd937x_soc_get_mbhc(
  148. struct snd_soc_component *component);
  149. extern int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  150. int volt, int micb_num);
  151. extern int wcd937x_get_micb_vout_ctl_val(u32 micb_mv);
  152. extern int wcd937x_micbias_control(struct snd_soc_component *component,
  153. int micb_num, int req, bool is_dapm);
  154. #endif