kona.c 153 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <sound/core.h>
  16. #include <sound/soc.h>
  17. #include <sound/soc-dapm.h>
  18. #include <sound/pcm.h>
  19. #include <sound/pcm_params.h>
  20. #include <sound/info.h>
  21. #include <soc/snd_event.h>
  22. #include <dsp/audio_notifier.h>
  23. #include <soc/swr-common.h>
  24. #include <dsp/q6afe-v2.h>
  25. #include <dsp/q6core.h>
  26. #include "device_event.h"
  27. #include "msm-pcm-routing-v2.h"
  28. #include "asoc/msm-cdc-pinctrl.h"
  29. #include "asoc/wcd-mbhc-v2.h"
  30. #include "codecs/wsa881x.h"
  31. #include "codecs/bolero/bolero-cdc.h"
  32. #include <dt-bindings/sound/audio-codec-port-types.h>
  33. #include "codecs/bolero/wsa-macro.h"
  34. #include "sm8250-port-config.h"
  35. #define DRV_NAME "kona-asoc-snd"
  36. #define __CHIPSET__ "KONA "
  37. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  38. #define SAMPLING_RATE_8KHZ 8000
  39. #define SAMPLING_RATE_11P025KHZ 11025
  40. #define SAMPLING_RATE_16KHZ 16000
  41. #define SAMPLING_RATE_22P05KHZ 22050
  42. #define SAMPLING_RATE_32KHZ 32000
  43. #define SAMPLING_RATE_44P1KHZ 44100
  44. #define SAMPLING_RATE_48KHZ 48000
  45. #define SAMPLING_RATE_88P2KHZ 88200
  46. #define SAMPLING_RATE_96KHZ 96000
  47. #define SAMPLING_RATE_176P4KHZ 176400
  48. #define SAMPLING_RATE_192KHZ 192000
  49. #define SAMPLING_RATE_352P8KHZ 352800
  50. #define SAMPLING_RATE_384KHZ 384000
  51. #define TDM_CHANNEL_MAX 8
  52. #define DEV_NAME_STR_LEN 32
  53. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  54. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  55. #define WSA8810_NAME_1 "wsa881x.20170211"
  56. #define WSA8810_NAME_2 "wsa881x.20170212"
  57. enum {
  58. TDM_0 = 0,
  59. TDM_1,
  60. TDM_2,
  61. TDM_3,
  62. TDM_4,
  63. TDM_5,
  64. TDM_6,
  65. TDM_7,
  66. TDM_PORT_MAX,
  67. };
  68. enum {
  69. TDM_PRI = 0,
  70. TDM_SEC,
  71. TDM_TERT,
  72. TDM_INTERFACE_MAX,
  73. };
  74. enum {
  75. PRIM_AUX_PCM = 0,
  76. SEC_AUX_PCM,
  77. TERT_AUX_PCM,
  78. AUX_PCM_MAX,
  79. };
  80. enum {
  81. PRIM_MI2S = 0,
  82. SEC_MI2S,
  83. TERT_MI2S,
  84. MI2S_MAX,
  85. };
  86. enum {
  87. WSA_CDC_DMA_RX_0 = 0,
  88. WSA_CDC_DMA_RX_1,
  89. RX_CDC_DMA_RX_0,
  90. RX_CDC_DMA_RX_1,
  91. RX_CDC_DMA_RX_2,
  92. RX_CDC_DMA_RX_3,
  93. RX_CDC_DMA_RX_5,
  94. CDC_DMA_RX_MAX,
  95. };
  96. enum {
  97. WSA_CDC_DMA_TX_0 = 0,
  98. WSA_CDC_DMA_TX_1,
  99. WSA_CDC_DMA_TX_2,
  100. TX_CDC_DMA_TX_0,
  101. TX_CDC_DMA_TX_3,
  102. TX_CDC_DMA_TX_4,
  103. CDC_DMA_TX_MAX,
  104. };
  105. struct msm_asoc_mach_data {
  106. struct snd_info_entry *codec_root;
  107. int usbc_en2_gpio; /* used by gpio driver API */
  108. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  109. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  110. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  111. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  112. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  113. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  114. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  115. bool is_afe_config_done;
  116. };
  117. struct tdm_port {
  118. u32 mode;
  119. u32 channel;
  120. };
  121. struct msm_wsa881x_dev_info {
  122. struct device_node *of_node;
  123. u32 index;
  124. };
  125. struct aux_codec_dev_info {
  126. struct device_node *of_node;
  127. u32 index;
  128. };
  129. struct dev_config {
  130. u32 sample_rate;
  131. u32 bit_format;
  132. u32 channels;
  133. };
  134. static struct dev_config usb_rx_cfg = {
  135. .sample_rate = SAMPLING_RATE_48KHZ,
  136. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  137. .channels = 2,
  138. };
  139. static struct dev_config usb_tx_cfg = {
  140. .sample_rate = SAMPLING_RATE_48KHZ,
  141. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  142. .channels = 1,
  143. };
  144. static struct dev_config proxy_rx_cfg = {
  145. .sample_rate = SAMPLING_RATE_48KHZ,
  146. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  147. .channels = 2,
  148. };
  149. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  150. {
  151. AFE_API_VERSION_I2S_CONFIG,
  152. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  153. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  154. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  155. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  156. 0,
  157. },
  158. {
  159. AFE_API_VERSION_I2S_CONFIG,
  160. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  161. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  162. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  163. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  164. 0,
  165. },
  166. {
  167. AFE_API_VERSION_I2S_CONFIG,
  168. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  169. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  170. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  171. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  172. 0,
  173. },
  174. };
  175. struct mi2s_conf {
  176. struct mutex lock;
  177. u32 ref_cnt;
  178. u32 msm_is_mi2s_master;
  179. };
  180. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  181. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  182. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  183. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  184. };
  185. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  186. /* Default configuration of TDM channels */
  187. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  188. { /* PRI TDM */
  189. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  190. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  191. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  192. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  193. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  194. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  195. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  196. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  197. },
  198. { /* SEC TDM */
  199. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  200. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  201. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  202. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  203. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  207. },
  208. { /* TERT TDM */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  210. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  211. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  212. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  213. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  217. },
  218. };
  219. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  220. { /* PRI TDM */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  229. },
  230. { /* SEC TDM */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  239. },
  240. { /* TERT TDM */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  249. },
  250. };
  251. /* Default configuration of AUX PCM channels */
  252. static struct dev_config aux_pcm_rx_cfg[] = {
  253. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  254. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  255. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  256. };
  257. static struct dev_config aux_pcm_tx_cfg[] = {
  258. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  259. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  260. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  261. };
  262. /* Default configuration of MI2S channels */
  263. static struct dev_config mi2s_rx_cfg[] = {
  264. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  265. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  266. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  267. };
  268. static struct dev_config mi2s_tx_cfg[] = {
  269. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  270. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  271. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  272. };
  273. /* Default configuration of Codec DMA Interface RX */
  274. static struct dev_config cdc_dma_rx_cfg[] = {
  275. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  276. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  277. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  278. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  279. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  280. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  281. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  282. };
  283. /* Default configuration of Codec DMA Interface TX */
  284. static struct dev_config cdc_dma_tx_cfg[] = {
  285. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  286. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  287. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  288. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  289. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  290. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  291. };
  292. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  293. "S32_LE"};
  294. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  295. "Six", "Seven", "Eight"};
  296. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  297. "KHZ_16", "KHZ_22P05",
  298. "KHZ_32", "KHZ_44P1", "KHZ_48",
  299. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  300. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  301. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  302. "Five", "Six", "Seven",
  303. "Eight"};
  304. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  305. "KHZ_48", "KHZ_176P4",
  306. "KHZ_352P8"};
  307. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  308. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  309. "Five", "Six", "Seven", "Eight"};
  310. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  311. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  312. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  313. "KHZ_48", "KHZ_96", "KHZ_192"};
  314. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  315. "Five", "Six", "Seven",
  316. "Eight"};
  317. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  318. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  319. "Five", "Six", "Seven",
  320. "Eight"};
  321. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  322. "KHZ_16", "KHZ_22P05",
  323. "KHZ_32", "KHZ_44P1", "KHZ_48",
  324. "KHZ_88P2", "KHZ_96",
  325. "KHZ_176P4", "KHZ_192",
  326. "KHZ_352P8", "KHZ_384"};
  327. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  328. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  329. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  330. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  331. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  332. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  333. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  334. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  335. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  336. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  337. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  338. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  339. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  340. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  341. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  342. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  343. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  344. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  345. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  346. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  347. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  348. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  349. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  350. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  351. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  352. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  353. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  354. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  355. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  356. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  357. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  358. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  359. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  360. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  361. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  362. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  363. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  364. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  365. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  366. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  367. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  368. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  369. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  370. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  371. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  372. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  373. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  374. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  375. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  376. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  377. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  378. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  379. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  380. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  381. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  382. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  383. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  384. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  385. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  386. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  387. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  388. cdc_dma_sample_rate_text);
  389. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  390. cdc_dma_sample_rate_text);
  391. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  392. cdc_dma_sample_rate_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  394. cdc_dma_sample_rate_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  396. cdc_dma_sample_rate_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  398. cdc_dma_sample_rate_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  400. cdc_dma_sample_rate_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  402. cdc_dma_sample_rate_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  404. cdc_dma_sample_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  406. cdc_dma_sample_rate_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  408. cdc_dma_sample_rate_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  410. cdc_dma_sample_rate_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  412. cdc_dma_sample_rate_text);
  413. static bool is_initial_boot;
  414. static bool codec_reg_done;
  415. static struct snd_soc_aux_dev *msm_aux_dev;
  416. static struct snd_soc_codec_conf *msm_codec_conf;
  417. static struct snd_soc_card snd_soc_card_kona_msm;
  418. static int dmic_0_1_gpio_cnt;
  419. static int dmic_2_3_gpio_cnt;
  420. static int dmic_4_5_gpio_cnt;
  421. static int msm_vi_feed_tx_ch = 2;
  422. /*
  423. * Need to report LINEIN
  424. * if R/L channel impedance is larger than 5K ohm
  425. */
  426. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  427. .read_fw_bin = false,
  428. .calibration = NULL,
  429. .detect_extn_cable = true,
  430. .mono_stero_detection = false,
  431. .swap_gnd_mic = NULL,
  432. .hs_ext_micbias = true,
  433. .key_code[0] = KEY_MEDIA,
  434. .key_code[1] = KEY_VOICECOMMAND,
  435. .key_code[2] = KEY_VOLUMEUP,
  436. .key_code[3] = KEY_VOLUMEDOWN,
  437. .key_code[4] = 0,
  438. .key_code[5] = 0,
  439. .key_code[6] = 0,
  440. .key_code[7] = 0,
  441. .linein_th = 5000,
  442. .moisture_en = true,
  443. .mbhc_micbias = MIC_BIAS_2,
  444. .anc_micbias = MIC_BIAS_2,
  445. .enable_anc_mic_detect = false,
  446. };
  447. static inline int param_is_mask(int p)
  448. {
  449. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  450. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  451. }
  452. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  453. int n)
  454. {
  455. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  456. }
  457. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  458. unsigned int bit)
  459. {
  460. if (bit >= SNDRV_MASK_MAX)
  461. return;
  462. if (param_is_mask(n)) {
  463. struct snd_mask *m = param_to_mask(p, n);
  464. m->bits[0] = 0;
  465. m->bits[1] = 0;
  466. m->bits[bit >> 5] |= (1 << (bit & 31));
  467. }
  468. }
  469. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  470. struct snd_ctl_elem_value *ucontrol)
  471. {
  472. int sample_rate_val = 0;
  473. switch (usb_rx_cfg.sample_rate) {
  474. case SAMPLING_RATE_384KHZ:
  475. sample_rate_val = 12;
  476. break;
  477. case SAMPLING_RATE_352P8KHZ:
  478. sample_rate_val = 11;
  479. break;
  480. case SAMPLING_RATE_192KHZ:
  481. sample_rate_val = 10;
  482. break;
  483. case SAMPLING_RATE_176P4KHZ:
  484. sample_rate_val = 9;
  485. break;
  486. case SAMPLING_RATE_96KHZ:
  487. sample_rate_val = 8;
  488. break;
  489. case SAMPLING_RATE_88P2KHZ:
  490. sample_rate_val = 7;
  491. break;
  492. case SAMPLING_RATE_48KHZ:
  493. sample_rate_val = 6;
  494. break;
  495. case SAMPLING_RATE_44P1KHZ:
  496. sample_rate_val = 5;
  497. break;
  498. case SAMPLING_RATE_32KHZ:
  499. sample_rate_val = 4;
  500. break;
  501. case SAMPLING_RATE_22P05KHZ:
  502. sample_rate_val = 3;
  503. break;
  504. case SAMPLING_RATE_16KHZ:
  505. sample_rate_val = 2;
  506. break;
  507. case SAMPLING_RATE_11P025KHZ:
  508. sample_rate_val = 1;
  509. break;
  510. case SAMPLING_RATE_8KHZ:
  511. default:
  512. sample_rate_val = 0;
  513. break;
  514. }
  515. ucontrol->value.integer.value[0] = sample_rate_val;
  516. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  517. usb_rx_cfg.sample_rate);
  518. return 0;
  519. }
  520. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  521. struct snd_ctl_elem_value *ucontrol)
  522. {
  523. switch (ucontrol->value.integer.value[0]) {
  524. case 12:
  525. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  526. break;
  527. case 11:
  528. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  529. break;
  530. case 10:
  531. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  532. break;
  533. case 9:
  534. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  535. break;
  536. case 8:
  537. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  538. break;
  539. case 7:
  540. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  541. break;
  542. case 6:
  543. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  544. break;
  545. case 5:
  546. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  547. break;
  548. case 4:
  549. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  550. break;
  551. case 3:
  552. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  553. break;
  554. case 2:
  555. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  556. break;
  557. case 1:
  558. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  559. break;
  560. case 0:
  561. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  562. break;
  563. default:
  564. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  565. break;
  566. }
  567. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  568. __func__, ucontrol->value.integer.value[0],
  569. usb_rx_cfg.sample_rate);
  570. return 0;
  571. }
  572. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  573. struct snd_ctl_elem_value *ucontrol)
  574. {
  575. int sample_rate_val = 0;
  576. switch (usb_tx_cfg.sample_rate) {
  577. case SAMPLING_RATE_384KHZ:
  578. sample_rate_val = 12;
  579. break;
  580. case SAMPLING_RATE_352P8KHZ:
  581. sample_rate_val = 11;
  582. break;
  583. case SAMPLING_RATE_192KHZ:
  584. sample_rate_val = 10;
  585. break;
  586. case SAMPLING_RATE_176P4KHZ:
  587. sample_rate_val = 9;
  588. break;
  589. case SAMPLING_RATE_96KHZ:
  590. sample_rate_val = 8;
  591. break;
  592. case SAMPLING_RATE_88P2KHZ:
  593. sample_rate_val = 7;
  594. break;
  595. case SAMPLING_RATE_48KHZ:
  596. sample_rate_val = 6;
  597. break;
  598. case SAMPLING_RATE_44P1KHZ:
  599. sample_rate_val = 5;
  600. break;
  601. case SAMPLING_RATE_32KHZ:
  602. sample_rate_val = 4;
  603. break;
  604. case SAMPLING_RATE_22P05KHZ:
  605. sample_rate_val = 3;
  606. break;
  607. case SAMPLING_RATE_16KHZ:
  608. sample_rate_val = 2;
  609. break;
  610. case SAMPLING_RATE_11P025KHZ:
  611. sample_rate_val = 1;
  612. break;
  613. case SAMPLING_RATE_8KHZ:
  614. sample_rate_val = 0;
  615. break;
  616. default:
  617. sample_rate_val = 6;
  618. break;
  619. }
  620. ucontrol->value.integer.value[0] = sample_rate_val;
  621. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  622. usb_tx_cfg.sample_rate);
  623. return 0;
  624. }
  625. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  626. struct snd_ctl_elem_value *ucontrol)
  627. {
  628. switch (ucontrol->value.integer.value[0]) {
  629. case 12:
  630. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  631. break;
  632. case 11:
  633. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  634. break;
  635. case 10:
  636. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  637. break;
  638. case 9:
  639. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  640. break;
  641. case 8:
  642. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  643. break;
  644. case 7:
  645. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  646. break;
  647. case 6:
  648. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  649. break;
  650. case 5:
  651. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  652. break;
  653. case 4:
  654. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  655. break;
  656. case 3:
  657. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  658. break;
  659. case 2:
  660. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  661. break;
  662. case 1:
  663. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  664. break;
  665. case 0:
  666. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  667. break;
  668. default:
  669. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  670. break;
  671. }
  672. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  673. __func__, ucontrol->value.integer.value[0],
  674. usb_tx_cfg.sample_rate);
  675. return 0;
  676. }
  677. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  678. struct snd_ctl_elem_value *ucontrol)
  679. {
  680. switch (usb_rx_cfg.bit_format) {
  681. case SNDRV_PCM_FORMAT_S32_LE:
  682. ucontrol->value.integer.value[0] = 3;
  683. break;
  684. case SNDRV_PCM_FORMAT_S24_3LE:
  685. ucontrol->value.integer.value[0] = 2;
  686. break;
  687. case SNDRV_PCM_FORMAT_S24_LE:
  688. ucontrol->value.integer.value[0] = 1;
  689. break;
  690. case SNDRV_PCM_FORMAT_S16_LE:
  691. default:
  692. ucontrol->value.integer.value[0] = 0;
  693. break;
  694. }
  695. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  696. __func__, usb_rx_cfg.bit_format,
  697. ucontrol->value.integer.value[0]);
  698. return 0;
  699. }
  700. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  701. struct snd_ctl_elem_value *ucontrol)
  702. {
  703. int rc = 0;
  704. switch (ucontrol->value.integer.value[0]) {
  705. case 3:
  706. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  707. break;
  708. case 2:
  709. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  710. break;
  711. case 1:
  712. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  713. break;
  714. case 0:
  715. default:
  716. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  717. break;
  718. }
  719. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  720. __func__, usb_rx_cfg.bit_format,
  721. ucontrol->value.integer.value[0]);
  722. return rc;
  723. }
  724. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  725. struct snd_ctl_elem_value *ucontrol)
  726. {
  727. switch (usb_tx_cfg.bit_format) {
  728. case SNDRV_PCM_FORMAT_S32_LE:
  729. ucontrol->value.integer.value[0] = 3;
  730. break;
  731. case SNDRV_PCM_FORMAT_S24_3LE:
  732. ucontrol->value.integer.value[0] = 2;
  733. break;
  734. case SNDRV_PCM_FORMAT_S24_LE:
  735. ucontrol->value.integer.value[0] = 1;
  736. break;
  737. case SNDRV_PCM_FORMAT_S16_LE:
  738. default:
  739. ucontrol->value.integer.value[0] = 0;
  740. break;
  741. }
  742. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  743. __func__, usb_tx_cfg.bit_format,
  744. ucontrol->value.integer.value[0]);
  745. return 0;
  746. }
  747. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  748. struct snd_ctl_elem_value *ucontrol)
  749. {
  750. int rc = 0;
  751. switch (ucontrol->value.integer.value[0]) {
  752. case 3:
  753. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  754. break;
  755. case 2:
  756. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  757. break;
  758. case 1:
  759. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  760. break;
  761. case 0:
  762. default:
  763. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  764. break;
  765. }
  766. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  767. __func__, usb_tx_cfg.bit_format,
  768. ucontrol->value.integer.value[0]);
  769. return rc;
  770. }
  771. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  772. struct snd_ctl_elem_value *ucontrol)
  773. {
  774. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  775. usb_rx_cfg.channels);
  776. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  777. return 0;
  778. }
  779. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  780. struct snd_ctl_elem_value *ucontrol)
  781. {
  782. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  783. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  784. return 1;
  785. }
  786. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  787. struct snd_ctl_elem_value *ucontrol)
  788. {
  789. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  790. usb_tx_cfg.channels);
  791. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  792. return 0;
  793. }
  794. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  795. struct snd_ctl_elem_value *ucontrol)
  796. {
  797. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  798. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  799. return 1;
  800. }
  801. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  802. struct snd_ctl_elem_value *ucontrol)
  803. {
  804. pr_debug("%s: proxy_rx channels = %d\n",
  805. __func__, proxy_rx_cfg.channels);
  806. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  807. return 0;
  808. }
  809. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  810. struct snd_ctl_elem_value *ucontrol)
  811. {
  812. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  813. pr_debug("%s: proxy_rx channels = %d\n",
  814. __func__, proxy_rx_cfg.channels);
  815. return 1;
  816. }
  817. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  818. struct tdm_port *port)
  819. {
  820. if (port) {
  821. if (strnstr(kcontrol->id.name, "PRI",
  822. sizeof(kcontrol->id.name))) {
  823. port->mode = TDM_PRI;
  824. } else if (strnstr(kcontrol->id.name, "SEC",
  825. sizeof(kcontrol->id.name))) {
  826. port->mode = TDM_SEC;
  827. } else if (strnstr(kcontrol->id.name, "TERT",
  828. sizeof(kcontrol->id.name))) {
  829. port->mode = TDM_TERT;
  830. } else {
  831. pr_err("%s: unsupported mode in: %s\n",
  832. __func__, kcontrol->id.name);
  833. return -EINVAL;
  834. }
  835. if (strnstr(kcontrol->id.name, "RX_0",
  836. sizeof(kcontrol->id.name)) ||
  837. strnstr(kcontrol->id.name, "TX_0",
  838. sizeof(kcontrol->id.name))) {
  839. port->channel = TDM_0;
  840. } else if (strnstr(kcontrol->id.name, "RX_1",
  841. sizeof(kcontrol->id.name)) ||
  842. strnstr(kcontrol->id.name, "TX_1",
  843. sizeof(kcontrol->id.name))) {
  844. port->channel = TDM_1;
  845. } else if (strnstr(kcontrol->id.name, "RX_2",
  846. sizeof(kcontrol->id.name)) ||
  847. strnstr(kcontrol->id.name, "TX_2",
  848. sizeof(kcontrol->id.name))) {
  849. port->channel = TDM_2;
  850. } else if (strnstr(kcontrol->id.name, "RX_3",
  851. sizeof(kcontrol->id.name)) ||
  852. strnstr(kcontrol->id.name, "TX_3",
  853. sizeof(kcontrol->id.name))) {
  854. port->channel = TDM_3;
  855. } else if (strnstr(kcontrol->id.name, "RX_4",
  856. sizeof(kcontrol->id.name)) ||
  857. strnstr(kcontrol->id.name, "TX_4",
  858. sizeof(kcontrol->id.name))) {
  859. port->channel = TDM_4;
  860. } else if (strnstr(kcontrol->id.name, "RX_5",
  861. sizeof(kcontrol->id.name)) ||
  862. strnstr(kcontrol->id.name, "TX_5",
  863. sizeof(kcontrol->id.name))) {
  864. port->channel = TDM_5;
  865. } else if (strnstr(kcontrol->id.name, "RX_6",
  866. sizeof(kcontrol->id.name)) ||
  867. strnstr(kcontrol->id.name, "TX_6",
  868. sizeof(kcontrol->id.name))) {
  869. port->channel = TDM_6;
  870. } else if (strnstr(kcontrol->id.name, "RX_7",
  871. sizeof(kcontrol->id.name)) ||
  872. strnstr(kcontrol->id.name, "TX_7",
  873. sizeof(kcontrol->id.name))) {
  874. port->channel = TDM_7;
  875. } else {
  876. pr_err("%s: unsupported channel in: %s\n",
  877. __func__, kcontrol->id.name);
  878. return -EINVAL;
  879. }
  880. } else {
  881. return -EINVAL;
  882. }
  883. return 0;
  884. }
  885. static int tdm_get_sample_rate(int value)
  886. {
  887. int sample_rate = 0;
  888. switch (value) {
  889. case 0:
  890. sample_rate = SAMPLING_RATE_8KHZ;
  891. break;
  892. case 1:
  893. sample_rate = SAMPLING_RATE_16KHZ;
  894. break;
  895. case 2:
  896. sample_rate = SAMPLING_RATE_32KHZ;
  897. break;
  898. case 3:
  899. sample_rate = SAMPLING_RATE_48KHZ;
  900. break;
  901. case 4:
  902. sample_rate = SAMPLING_RATE_176P4KHZ;
  903. break;
  904. case 5:
  905. sample_rate = SAMPLING_RATE_352P8KHZ;
  906. break;
  907. default:
  908. sample_rate = SAMPLING_RATE_48KHZ;
  909. break;
  910. }
  911. return sample_rate;
  912. }
  913. static int tdm_get_sample_rate_val(int sample_rate)
  914. {
  915. int sample_rate_val = 0;
  916. switch (sample_rate) {
  917. case SAMPLING_RATE_8KHZ:
  918. sample_rate_val = 0;
  919. break;
  920. case SAMPLING_RATE_16KHZ:
  921. sample_rate_val = 1;
  922. break;
  923. case SAMPLING_RATE_32KHZ:
  924. sample_rate_val = 2;
  925. break;
  926. case SAMPLING_RATE_48KHZ:
  927. sample_rate_val = 3;
  928. break;
  929. case SAMPLING_RATE_176P4KHZ:
  930. sample_rate_val = 4;
  931. break;
  932. case SAMPLING_RATE_352P8KHZ:
  933. sample_rate_val = 5;
  934. break;
  935. default:
  936. sample_rate_val = 3;
  937. break;
  938. }
  939. return sample_rate_val;
  940. }
  941. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  942. struct snd_ctl_elem_value *ucontrol)
  943. {
  944. struct tdm_port port;
  945. int ret = tdm_get_port_idx(kcontrol, &port);
  946. if (ret) {
  947. pr_err("%s: unsupported control: %s\n",
  948. __func__, kcontrol->id.name);
  949. } else {
  950. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  951. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  952. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  953. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  954. ucontrol->value.enumerated.item[0]);
  955. }
  956. return ret;
  957. }
  958. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  959. struct snd_ctl_elem_value *ucontrol)
  960. {
  961. struct tdm_port port;
  962. int ret = tdm_get_port_idx(kcontrol, &port);
  963. if (ret) {
  964. pr_err("%s: unsupported control: %s\n",
  965. __func__, kcontrol->id.name);
  966. } else {
  967. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  968. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  969. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  970. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  971. ucontrol->value.enumerated.item[0]);
  972. }
  973. return ret;
  974. }
  975. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  976. struct snd_ctl_elem_value *ucontrol)
  977. {
  978. struct tdm_port port;
  979. int ret = tdm_get_port_idx(kcontrol, &port);
  980. if (ret) {
  981. pr_err("%s: unsupported control: %s\n",
  982. __func__, kcontrol->id.name);
  983. } else {
  984. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  985. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  986. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  987. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  988. ucontrol->value.enumerated.item[0]);
  989. }
  990. return ret;
  991. }
  992. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  993. struct snd_ctl_elem_value *ucontrol)
  994. {
  995. struct tdm_port port;
  996. int ret = tdm_get_port_idx(kcontrol, &port);
  997. if (ret) {
  998. pr_err("%s: unsupported control: %s\n",
  999. __func__, kcontrol->id.name);
  1000. } else {
  1001. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1002. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1003. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1004. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1005. ucontrol->value.enumerated.item[0]);
  1006. }
  1007. return ret;
  1008. }
  1009. static int tdm_get_format(int value)
  1010. {
  1011. int format = 0;
  1012. switch (value) {
  1013. case 0:
  1014. format = SNDRV_PCM_FORMAT_S16_LE;
  1015. break;
  1016. case 1:
  1017. format = SNDRV_PCM_FORMAT_S24_LE;
  1018. break;
  1019. case 2:
  1020. format = SNDRV_PCM_FORMAT_S32_LE;
  1021. break;
  1022. default:
  1023. format = SNDRV_PCM_FORMAT_S16_LE;
  1024. break;
  1025. }
  1026. return format;
  1027. }
  1028. static int tdm_get_format_val(int format)
  1029. {
  1030. int value = 0;
  1031. switch (format) {
  1032. case SNDRV_PCM_FORMAT_S16_LE:
  1033. value = 0;
  1034. break;
  1035. case SNDRV_PCM_FORMAT_S24_LE:
  1036. value = 1;
  1037. break;
  1038. case SNDRV_PCM_FORMAT_S32_LE:
  1039. value = 2;
  1040. break;
  1041. default:
  1042. value = 0;
  1043. break;
  1044. }
  1045. return value;
  1046. }
  1047. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1048. struct snd_ctl_elem_value *ucontrol)
  1049. {
  1050. struct tdm_port port;
  1051. int ret = tdm_get_port_idx(kcontrol, &port);
  1052. if (ret) {
  1053. pr_err("%s: unsupported control: %s\n",
  1054. __func__, kcontrol->id.name);
  1055. } else {
  1056. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1057. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1058. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1059. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1060. ucontrol->value.enumerated.item[0]);
  1061. }
  1062. return ret;
  1063. }
  1064. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1065. struct snd_ctl_elem_value *ucontrol)
  1066. {
  1067. struct tdm_port port;
  1068. int ret = tdm_get_port_idx(kcontrol, &port);
  1069. if (ret) {
  1070. pr_err("%s: unsupported control: %s\n",
  1071. __func__, kcontrol->id.name);
  1072. } else {
  1073. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1074. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1075. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1076. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1077. ucontrol->value.enumerated.item[0]);
  1078. }
  1079. return ret;
  1080. }
  1081. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1082. struct snd_ctl_elem_value *ucontrol)
  1083. {
  1084. struct tdm_port port;
  1085. int ret = tdm_get_port_idx(kcontrol, &port);
  1086. if (ret) {
  1087. pr_err("%s: unsupported control: %s\n",
  1088. __func__, kcontrol->id.name);
  1089. } else {
  1090. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1091. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1092. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1093. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1094. ucontrol->value.enumerated.item[0]);
  1095. }
  1096. return ret;
  1097. }
  1098. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1099. struct snd_ctl_elem_value *ucontrol)
  1100. {
  1101. struct tdm_port port;
  1102. int ret = tdm_get_port_idx(kcontrol, &port);
  1103. if (ret) {
  1104. pr_err("%s: unsupported control: %s\n",
  1105. __func__, kcontrol->id.name);
  1106. } else {
  1107. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1108. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1109. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1110. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1111. ucontrol->value.enumerated.item[0]);
  1112. }
  1113. return ret;
  1114. }
  1115. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1116. struct snd_ctl_elem_value *ucontrol)
  1117. {
  1118. struct tdm_port port;
  1119. int ret = tdm_get_port_idx(kcontrol, &port);
  1120. if (ret) {
  1121. pr_err("%s: unsupported control: %s\n",
  1122. __func__, kcontrol->id.name);
  1123. } else {
  1124. ucontrol->value.enumerated.item[0] =
  1125. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1126. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1127. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1128. ucontrol->value.enumerated.item[0]);
  1129. }
  1130. return ret;
  1131. }
  1132. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1133. struct snd_ctl_elem_value *ucontrol)
  1134. {
  1135. struct tdm_port port;
  1136. int ret = tdm_get_port_idx(kcontrol, &port);
  1137. if (ret) {
  1138. pr_err("%s: unsupported control: %s\n",
  1139. __func__, kcontrol->id.name);
  1140. } else {
  1141. tdm_rx_cfg[port.mode][port.channel].channels =
  1142. ucontrol->value.enumerated.item[0] + 1;
  1143. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1144. tdm_rx_cfg[port.mode][port.channel].channels,
  1145. ucontrol->value.enumerated.item[0] + 1);
  1146. }
  1147. return ret;
  1148. }
  1149. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1150. struct snd_ctl_elem_value *ucontrol)
  1151. {
  1152. struct tdm_port port;
  1153. int ret = tdm_get_port_idx(kcontrol, &port);
  1154. if (ret) {
  1155. pr_err("%s: unsupported control: %s\n",
  1156. __func__, kcontrol->id.name);
  1157. } else {
  1158. ucontrol->value.enumerated.item[0] =
  1159. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1160. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1161. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1162. ucontrol->value.enumerated.item[0]);
  1163. }
  1164. return ret;
  1165. }
  1166. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1167. struct snd_ctl_elem_value *ucontrol)
  1168. {
  1169. struct tdm_port port;
  1170. int ret = tdm_get_port_idx(kcontrol, &port);
  1171. if (ret) {
  1172. pr_err("%s: unsupported control: %s\n",
  1173. __func__, kcontrol->id.name);
  1174. } else {
  1175. tdm_tx_cfg[port.mode][port.channel].channels =
  1176. ucontrol->value.enumerated.item[0] + 1;
  1177. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1178. tdm_tx_cfg[port.mode][port.channel].channels,
  1179. ucontrol->value.enumerated.item[0] + 1);
  1180. }
  1181. return ret;
  1182. }
  1183. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1184. {
  1185. int idx = 0;
  1186. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1187. sizeof("PRIM_AUX_PCM"))) {
  1188. idx = PRIM_AUX_PCM;
  1189. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1190. sizeof("SEC_AUX_PCM"))) {
  1191. idx = SEC_AUX_PCM;
  1192. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1193. sizeof("TERT_AUX_PCM"))) {
  1194. idx = TERT_AUX_PCM;
  1195. } else {
  1196. pr_err("%s: unsupported port: %s\n",
  1197. __func__, kcontrol->id.name);
  1198. idx = -EINVAL;
  1199. }
  1200. return idx;
  1201. }
  1202. static int aux_pcm_get_sample_rate(int value)
  1203. {
  1204. int sample_rate = 0;
  1205. switch (value) {
  1206. case 1:
  1207. sample_rate = SAMPLING_RATE_16KHZ;
  1208. break;
  1209. case 0:
  1210. default:
  1211. sample_rate = SAMPLING_RATE_8KHZ;
  1212. break;
  1213. }
  1214. return sample_rate;
  1215. }
  1216. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1217. {
  1218. int sample_rate_val = 0;
  1219. switch (sample_rate) {
  1220. case SAMPLING_RATE_16KHZ:
  1221. sample_rate_val = 1;
  1222. break;
  1223. case SAMPLING_RATE_8KHZ:
  1224. default:
  1225. sample_rate_val = 0;
  1226. break;
  1227. }
  1228. return sample_rate_val;
  1229. }
  1230. static int mi2s_auxpcm_get_format(int value)
  1231. {
  1232. int format = 0;
  1233. switch (value) {
  1234. case 0:
  1235. format = SNDRV_PCM_FORMAT_S16_LE;
  1236. break;
  1237. case 1:
  1238. format = SNDRV_PCM_FORMAT_S24_LE;
  1239. break;
  1240. case 2:
  1241. format = SNDRV_PCM_FORMAT_S24_3LE;
  1242. break;
  1243. case 3:
  1244. format = SNDRV_PCM_FORMAT_S32_LE;
  1245. break;
  1246. default:
  1247. format = SNDRV_PCM_FORMAT_S16_LE;
  1248. break;
  1249. }
  1250. return format;
  1251. }
  1252. static int mi2s_auxpcm_get_format_value(int format)
  1253. {
  1254. int value = 0;
  1255. switch (format) {
  1256. case SNDRV_PCM_FORMAT_S16_LE:
  1257. value = 0;
  1258. break;
  1259. case SNDRV_PCM_FORMAT_S24_LE:
  1260. value = 1;
  1261. break;
  1262. case SNDRV_PCM_FORMAT_S24_3LE:
  1263. value = 2;
  1264. break;
  1265. case SNDRV_PCM_FORMAT_S32_LE:
  1266. value = 3;
  1267. break;
  1268. default:
  1269. value = 0;
  1270. break;
  1271. }
  1272. return value;
  1273. }
  1274. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1275. struct snd_ctl_elem_value *ucontrol)
  1276. {
  1277. int idx = aux_pcm_get_port_idx(kcontrol);
  1278. if (idx < 0)
  1279. return idx;
  1280. ucontrol->value.enumerated.item[0] =
  1281. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1282. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1283. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1284. ucontrol->value.enumerated.item[0]);
  1285. return 0;
  1286. }
  1287. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1288. struct snd_ctl_elem_value *ucontrol)
  1289. {
  1290. int idx = aux_pcm_get_port_idx(kcontrol);
  1291. if (idx < 0)
  1292. return idx;
  1293. aux_pcm_rx_cfg[idx].sample_rate =
  1294. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1295. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1296. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1297. ucontrol->value.enumerated.item[0]);
  1298. return 0;
  1299. }
  1300. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1301. struct snd_ctl_elem_value *ucontrol)
  1302. {
  1303. int idx = aux_pcm_get_port_idx(kcontrol);
  1304. if (idx < 0)
  1305. return idx;
  1306. ucontrol->value.enumerated.item[0] =
  1307. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1308. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1309. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1310. ucontrol->value.enumerated.item[0]);
  1311. return 0;
  1312. }
  1313. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1314. struct snd_ctl_elem_value *ucontrol)
  1315. {
  1316. int idx = aux_pcm_get_port_idx(kcontrol);
  1317. if (idx < 0)
  1318. return idx;
  1319. aux_pcm_tx_cfg[idx].sample_rate =
  1320. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1321. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1322. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1323. ucontrol->value.enumerated.item[0]);
  1324. return 0;
  1325. }
  1326. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1327. struct snd_ctl_elem_value *ucontrol)
  1328. {
  1329. int idx = aux_pcm_get_port_idx(kcontrol);
  1330. if (idx < 0)
  1331. return idx;
  1332. ucontrol->value.enumerated.item[0] =
  1333. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1334. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1335. idx, aux_pcm_rx_cfg[idx].bit_format,
  1336. ucontrol->value.enumerated.item[0]);
  1337. return 0;
  1338. }
  1339. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1340. struct snd_ctl_elem_value *ucontrol)
  1341. {
  1342. int idx = aux_pcm_get_port_idx(kcontrol);
  1343. if (idx < 0)
  1344. return idx;
  1345. aux_pcm_rx_cfg[idx].bit_format =
  1346. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1347. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1348. idx, aux_pcm_rx_cfg[idx].bit_format,
  1349. ucontrol->value.enumerated.item[0]);
  1350. return 0;
  1351. }
  1352. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1353. struct snd_ctl_elem_value *ucontrol)
  1354. {
  1355. int idx = aux_pcm_get_port_idx(kcontrol);
  1356. if (idx < 0)
  1357. return idx;
  1358. ucontrol->value.enumerated.item[0] =
  1359. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1360. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1361. idx, aux_pcm_tx_cfg[idx].bit_format,
  1362. ucontrol->value.enumerated.item[0]);
  1363. return 0;
  1364. }
  1365. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1366. struct snd_ctl_elem_value *ucontrol)
  1367. {
  1368. int idx = aux_pcm_get_port_idx(kcontrol);
  1369. if (idx < 0)
  1370. return idx;
  1371. aux_pcm_tx_cfg[idx].bit_format =
  1372. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1373. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1374. idx, aux_pcm_tx_cfg[idx].bit_format,
  1375. ucontrol->value.enumerated.item[0]);
  1376. return 0;
  1377. }
  1378. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1379. {
  1380. int idx = 0;
  1381. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1382. sizeof("PRIM_MI2S_RX"))) {
  1383. idx = PRIM_MI2S;
  1384. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1385. sizeof("SEC_MI2S_RX"))) {
  1386. idx = SEC_MI2S;
  1387. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1388. sizeof("TERT_MI2S_RX"))) {
  1389. idx = TERT_MI2S;
  1390. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1391. sizeof("PRIM_MI2S_TX"))) {
  1392. idx = PRIM_MI2S;
  1393. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1394. sizeof("SEC_MI2S_TX"))) {
  1395. idx = SEC_MI2S;
  1396. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1397. sizeof("TERT_MI2S_TX"))) {
  1398. idx = TERT_MI2S;
  1399. } else {
  1400. pr_err("%s: unsupported channel: %s\n",
  1401. __func__, kcontrol->id.name);
  1402. idx = -EINVAL;
  1403. }
  1404. return idx;
  1405. }
  1406. static int mi2s_get_sample_rate(int value)
  1407. {
  1408. int sample_rate = 0;
  1409. switch (value) {
  1410. case 0:
  1411. sample_rate = SAMPLING_RATE_8KHZ;
  1412. break;
  1413. case 1:
  1414. sample_rate = SAMPLING_RATE_11P025KHZ;
  1415. break;
  1416. case 2:
  1417. sample_rate = SAMPLING_RATE_16KHZ;
  1418. break;
  1419. case 3:
  1420. sample_rate = SAMPLING_RATE_22P05KHZ;
  1421. break;
  1422. case 4:
  1423. sample_rate = SAMPLING_RATE_32KHZ;
  1424. break;
  1425. case 5:
  1426. sample_rate = SAMPLING_RATE_44P1KHZ;
  1427. break;
  1428. case 6:
  1429. sample_rate = SAMPLING_RATE_48KHZ;
  1430. break;
  1431. case 7:
  1432. sample_rate = SAMPLING_RATE_96KHZ;
  1433. break;
  1434. case 8:
  1435. sample_rate = SAMPLING_RATE_192KHZ;
  1436. break;
  1437. default:
  1438. sample_rate = SAMPLING_RATE_48KHZ;
  1439. break;
  1440. }
  1441. return sample_rate;
  1442. }
  1443. static int mi2s_get_sample_rate_val(int sample_rate)
  1444. {
  1445. int sample_rate_val = 0;
  1446. switch (sample_rate) {
  1447. case SAMPLING_RATE_8KHZ:
  1448. sample_rate_val = 0;
  1449. break;
  1450. case SAMPLING_RATE_11P025KHZ:
  1451. sample_rate_val = 1;
  1452. break;
  1453. case SAMPLING_RATE_16KHZ:
  1454. sample_rate_val = 2;
  1455. break;
  1456. case SAMPLING_RATE_22P05KHZ:
  1457. sample_rate_val = 3;
  1458. break;
  1459. case SAMPLING_RATE_32KHZ:
  1460. sample_rate_val = 4;
  1461. break;
  1462. case SAMPLING_RATE_44P1KHZ:
  1463. sample_rate_val = 5;
  1464. break;
  1465. case SAMPLING_RATE_48KHZ:
  1466. sample_rate_val = 6;
  1467. break;
  1468. case SAMPLING_RATE_96KHZ:
  1469. sample_rate_val = 7;
  1470. break;
  1471. case SAMPLING_RATE_192KHZ:
  1472. sample_rate_val = 8;
  1473. break;
  1474. default:
  1475. sample_rate_val = 6;
  1476. break;
  1477. }
  1478. return sample_rate_val;
  1479. }
  1480. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1481. struct snd_ctl_elem_value *ucontrol)
  1482. {
  1483. int idx = mi2s_get_port_idx(kcontrol);
  1484. if (idx < 0)
  1485. return idx;
  1486. ucontrol->value.enumerated.item[0] =
  1487. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1488. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1489. idx, mi2s_rx_cfg[idx].sample_rate,
  1490. ucontrol->value.enumerated.item[0]);
  1491. return 0;
  1492. }
  1493. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1494. struct snd_ctl_elem_value *ucontrol)
  1495. {
  1496. int idx = mi2s_get_port_idx(kcontrol);
  1497. if (idx < 0)
  1498. return idx;
  1499. mi2s_rx_cfg[idx].sample_rate =
  1500. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1501. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1502. idx, mi2s_rx_cfg[idx].sample_rate,
  1503. ucontrol->value.enumerated.item[0]);
  1504. return 0;
  1505. }
  1506. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1507. struct snd_ctl_elem_value *ucontrol)
  1508. {
  1509. int idx = mi2s_get_port_idx(kcontrol);
  1510. if (idx < 0)
  1511. return idx;
  1512. ucontrol->value.enumerated.item[0] =
  1513. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1514. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1515. idx, mi2s_tx_cfg[idx].sample_rate,
  1516. ucontrol->value.enumerated.item[0]);
  1517. return 0;
  1518. }
  1519. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1520. struct snd_ctl_elem_value *ucontrol)
  1521. {
  1522. int idx = mi2s_get_port_idx(kcontrol);
  1523. if (idx < 0)
  1524. return idx;
  1525. mi2s_tx_cfg[idx].sample_rate =
  1526. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1527. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1528. idx, mi2s_tx_cfg[idx].sample_rate,
  1529. ucontrol->value.enumerated.item[0]);
  1530. return 0;
  1531. }
  1532. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1533. struct snd_ctl_elem_value *ucontrol)
  1534. {
  1535. int idx = mi2s_get_port_idx(kcontrol);
  1536. if (idx < 0)
  1537. return idx;
  1538. ucontrol->value.enumerated.item[0] =
  1539. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1540. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1541. idx, mi2s_rx_cfg[idx].bit_format,
  1542. ucontrol->value.enumerated.item[0]);
  1543. return 0;
  1544. }
  1545. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1546. struct snd_ctl_elem_value *ucontrol)
  1547. {
  1548. int idx = mi2s_get_port_idx(kcontrol);
  1549. if (idx < 0)
  1550. return idx;
  1551. mi2s_rx_cfg[idx].bit_format =
  1552. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1553. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1554. idx, mi2s_rx_cfg[idx].bit_format,
  1555. ucontrol->value.enumerated.item[0]);
  1556. return 0;
  1557. }
  1558. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1559. struct snd_ctl_elem_value *ucontrol)
  1560. {
  1561. int idx = mi2s_get_port_idx(kcontrol);
  1562. if (idx < 0)
  1563. return idx;
  1564. ucontrol->value.enumerated.item[0] =
  1565. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1566. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1567. idx, mi2s_tx_cfg[idx].bit_format,
  1568. ucontrol->value.enumerated.item[0]);
  1569. return 0;
  1570. }
  1571. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1572. struct snd_ctl_elem_value *ucontrol)
  1573. {
  1574. int idx = mi2s_get_port_idx(kcontrol);
  1575. if (idx < 0)
  1576. return idx;
  1577. mi2s_tx_cfg[idx].bit_format =
  1578. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1579. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1580. idx, mi2s_tx_cfg[idx].bit_format,
  1581. ucontrol->value.enumerated.item[0]);
  1582. return 0;
  1583. }
  1584. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1585. struct snd_ctl_elem_value *ucontrol)
  1586. {
  1587. int idx = mi2s_get_port_idx(kcontrol);
  1588. if (idx < 0)
  1589. return idx;
  1590. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1591. idx, mi2s_rx_cfg[idx].channels);
  1592. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1593. return 0;
  1594. }
  1595. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1596. struct snd_ctl_elem_value *ucontrol)
  1597. {
  1598. int idx = mi2s_get_port_idx(kcontrol);
  1599. if (idx < 0)
  1600. return idx;
  1601. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1602. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1603. idx, mi2s_rx_cfg[idx].channels);
  1604. return 1;
  1605. }
  1606. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1607. struct snd_ctl_elem_value *ucontrol)
  1608. {
  1609. int idx = mi2s_get_port_idx(kcontrol);
  1610. if (idx < 0)
  1611. return idx;
  1612. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1613. idx, mi2s_tx_cfg[idx].channels);
  1614. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1615. return 0;
  1616. }
  1617. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1618. struct snd_ctl_elem_value *ucontrol)
  1619. {
  1620. int idx = mi2s_get_port_idx(kcontrol);
  1621. if (idx < 0)
  1622. return idx;
  1623. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1624. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1625. idx, mi2s_tx_cfg[idx].channels);
  1626. return 1;
  1627. }
  1628. static int msm_get_port_id(int be_id)
  1629. {
  1630. int afe_port_id = 0;
  1631. switch (be_id) {
  1632. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1633. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1634. break;
  1635. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1636. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1637. break;
  1638. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1639. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1640. break;
  1641. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1642. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1643. break;
  1644. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1645. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1646. break;
  1647. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1648. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1649. break;
  1650. default:
  1651. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1652. afe_port_id = -EINVAL;
  1653. }
  1654. return afe_port_id;
  1655. }
  1656. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1657. {
  1658. u32 bit_per_sample = 0;
  1659. switch (bit_format) {
  1660. case SNDRV_PCM_FORMAT_S32_LE:
  1661. case SNDRV_PCM_FORMAT_S24_3LE:
  1662. case SNDRV_PCM_FORMAT_S24_LE:
  1663. bit_per_sample = 32;
  1664. break;
  1665. case SNDRV_PCM_FORMAT_S16_LE:
  1666. default:
  1667. bit_per_sample = 16;
  1668. break;
  1669. }
  1670. return bit_per_sample;
  1671. }
  1672. static void update_mi2s_clk_val(int dai_id, int stream)
  1673. {
  1674. u32 bit_per_sample = 0;
  1675. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1676. bit_per_sample =
  1677. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1678. mi2s_clk[dai_id].clk_freq_in_hz =
  1679. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1680. } else {
  1681. bit_per_sample =
  1682. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1683. mi2s_clk[dai_id].clk_freq_in_hz =
  1684. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1685. }
  1686. }
  1687. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1688. {
  1689. int ret = 0;
  1690. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1691. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1692. int port_id = 0;
  1693. int index = cpu_dai->id;
  1694. port_id = msm_get_port_id(rtd->dai_link->id);
  1695. if (port_id < 0) {
  1696. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1697. ret = port_id;
  1698. goto err;
  1699. }
  1700. if (enable) {
  1701. update_mi2s_clk_val(index, substream->stream);
  1702. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1703. mi2s_clk[index].clk_freq_in_hz);
  1704. }
  1705. mi2s_clk[index].enable = enable;
  1706. ret = afe_set_lpass_clock_v2(port_id,
  1707. &mi2s_clk[index]);
  1708. if (ret < 0) {
  1709. dev_err(rtd->card->dev,
  1710. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1711. __func__, port_id, ret);
  1712. goto err;
  1713. }
  1714. err:
  1715. return ret;
  1716. }
  1717. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1718. {
  1719. int idx = 0;
  1720. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1721. sizeof("WSA_CDC_DMA_RX_0")))
  1722. idx = WSA_CDC_DMA_RX_0;
  1723. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1724. sizeof("WSA_CDC_DMA_RX_0")))
  1725. idx = WSA_CDC_DMA_RX_1;
  1726. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1727. sizeof("RX_CDC_DMA_RX_0")))
  1728. idx = RX_CDC_DMA_RX_0;
  1729. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1730. sizeof("RX_CDC_DMA_RX_1")))
  1731. idx = RX_CDC_DMA_RX_1;
  1732. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1733. sizeof("RX_CDC_DMA_RX_2")))
  1734. idx = RX_CDC_DMA_RX_2;
  1735. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1736. sizeof("RX_CDC_DMA_RX_3")))
  1737. idx = RX_CDC_DMA_RX_3;
  1738. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1739. sizeof("RX_CDC_DMA_RX_5")))
  1740. idx = RX_CDC_DMA_RX_5;
  1741. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1742. sizeof("WSA_CDC_DMA_TX_0")))
  1743. idx = WSA_CDC_DMA_TX_0;
  1744. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1745. sizeof("WSA_CDC_DMA_TX_1")))
  1746. idx = WSA_CDC_DMA_TX_1;
  1747. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1748. sizeof("WSA_CDC_DMA_TX_2")))
  1749. idx = WSA_CDC_DMA_TX_2;
  1750. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1751. sizeof("TX_CDC_DMA_TX_0")))
  1752. idx = TX_CDC_DMA_TX_0;
  1753. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1754. sizeof("TX_CDC_DMA_TX_3")))
  1755. idx = TX_CDC_DMA_TX_3;
  1756. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1757. sizeof("TX_CDC_DMA_TX_4")))
  1758. idx = TX_CDC_DMA_TX_4;
  1759. else {
  1760. pr_err("%s: unsupported channel: %s\n",
  1761. __func__, kcontrol->id.name);
  1762. return -EINVAL;
  1763. }
  1764. return idx;
  1765. }
  1766. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1767. struct snd_ctl_elem_value *ucontrol)
  1768. {
  1769. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1770. if (ch_num < 0) {
  1771. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1772. return ch_num;
  1773. }
  1774. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1775. cdc_dma_rx_cfg[ch_num].channels - 1);
  1776. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1777. return 0;
  1778. }
  1779. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1780. struct snd_ctl_elem_value *ucontrol)
  1781. {
  1782. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1783. if (ch_num < 0) {
  1784. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1785. return ch_num;
  1786. }
  1787. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1788. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1789. cdc_dma_rx_cfg[ch_num].channels);
  1790. return 1;
  1791. }
  1792. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1793. struct snd_ctl_elem_value *ucontrol)
  1794. {
  1795. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1796. if (ch_num < 0) {
  1797. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1798. return ch_num;
  1799. }
  1800. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1801. case SNDRV_PCM_FORMAT_S32_LE:
  1802. ucontrol->value.integer.value[0] = 3;
  1803. break;
  1804. case SNDRV_PCM_FORMAT_S24_3LE:
  1805. ucontrol->value.integer.value[0] = 2;
  1806. break;
  1807. case SNDRV_PCM_FORMAT_S24_LE:
  1808. ucontrol->value.integer.value[0] = 1;
  1809. break;
  1810. case SNDRV_PCM_FORMAT_S16_LE:
  1811. default:
  1812. ucontrol->value.integer.value[0] = 0;
  1813. break;
  1814. }
  1815. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1816. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1817. ucontrol->value.integer.value[0]);
  1818. return 0;
  1819. }
  1820. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1821. struct snd_ctl_elem_value *ucontrol)
  1822. {
  1823. int rc = 0;
  1824. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1825. if (ch_num < 0) {
  1826. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1827. return ch_num;
  1828. }
  1829. switch (ucontrol->value.integer.value[0]) {
  1830. case 3:
  1831. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1832. break;
  1833. case 2:
  1834. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1835. break;
  1836. case 1:
  1837. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1838. break;
  1839. case 0:
  1840. default:
  1841. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1842. break;
  1843. }
  1844. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1845. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1846. ucontrol->value.integer.value[0]);
  1847. return rc;
  1848. }
  1849. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1850. {
  1851. int sample_rate_val = 0;
  1852. switch (sample_rate) {
  1853. case SAMPLING_RATE_8KHZ:
  1854. sample_rate_val = 0;
  1855. break;
  1856. case SAMPLING_RATE_11P025KHZ:
  1857. sample_rate_val = 1;
  1858. break;
  1859. case SAMPLING_RATE_16KHZ:
  1860. sample_rate_val = 2;
  1861. break;
  1862. case SAMPLING_RATE_22P05KHZ:
  1863. sample_rate_val = 3;
  1864. break;
  1865. case SAMPLING_RATE_32KHZ:
  1866. sample_rate_val = 4;
  1867. break;
  1868. case SAMPLING_RATE_44P1KHZ:
  1869. sample_rate_val = 5;
  1870. break;
  1871. case SAMPLING_RATE_48KHZ:
  1872. sample_rate_val = 6;
  1873. break;
  1874. case SAMPLING_RATE_88P2KHZ:
  1875. sample_rate_val = 7;
  1876. break;
  1877. case SAMPLING_RATE_96KHZ:
  1878. sample_rate_val = 8;
  1879. break;
  1880. case SAMPLING_RATE_176P4KHZ:
  1881. sample_rate_val = 9;
  1882. break;
  1883. case SAMPLING_RATE_192KHZ:
  1884. sample_rate_val = 10;
  1885. break;
  1886. case SAMPLING_RATE_352P8KHZ:
  1887. sample_rate_val = 11;
  1888. break;
  1889. case SAMPLING_RATE_384KHZ:
  1890. sample_rate_val = 12;
  1891. break;
  1892. default:
  1893. sample_rate_val = 6;
  1894. break;
  1895. }
  1896. return sample_rate_val;
  1897. }
  1898. static int cdc_dma_get_sample_rate(int value)
  1899. {
  1900. int sample_rate = 0;
  1901. switch (value) {
  1902. case 0:
  1903. sample_rate = SAMPLING_RATE_8KHZ;
  1904. break;
  1905. case 1:
  1906. sample_rate = SAMPLING_RATE_11P025KHZ;
  1907. break;
  1908. case 2:
  1909. sample_rate = SAMPLING_RATE_16KHZ;
  1910. break;
  1911. case 3:
  1912. sample_rate = SAMPLING_RATE_22P05KHZ;
  1913. break;
  1914. case 4:
  1915. sample_rate = SAMPLING_RATE_32KHZ;
  1916. break;
  1917. case 5:
  1918. sample_rate = SAMPLING_RATE_44P1KHZ;
  1919. break;
  1920. case 6:
  1921. sample_rate = SAMPLING_RATE_48KHZ;
  1922. break;
  1923. case 7:
  1924. sample_rate = SAMPLING_RATE_88P2KHZ;
  1925. break;
  1926. case 8:
  1927. sample_rate = SAMPLING_RATE_96KHZ;
  1928. break;
  1929. case 9:
  1930. sample_rate = SAMPLING_RATE_176P4KHZ;
  1931. break;
  1932. case 10:
  1933. sample_rate = SAMPLING_RATE_192KHZ;
  1934. break;
  1935. case 11:
  1936. sample_rate = SAMPLING_RATE_352P8KHZ;
  1937. break;
  1938. case 12:
  1939. sample_rate = SAMPLING_RATE_384KHZ;
  1940. break;
  1941. default:
  1942. sample_rate = SAMPLING_RATE_48KHZ;
  1943. break;
  1944. }
  1945. return sample_rate;
  1946. }
  1947. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1948. struct snd_ctl_elem_value *ucontrol)
  1949. {
  1950. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1951. if (ch_num < 0) {
  1952. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1953. return ch_num;
  1954. }
  1955. ucontrol->value.enumerated.item[0] =
  1956. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1957. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1958. cdc_dma_rx_cfg[ch_num].sample_rate);
  1959. return 0;
  1960. }
  1961. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1962. struct snd_ctl_elem_value *ucontrol)
  1963. {
  1964. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1965. if (ch_num < 0) {
  1966. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1967. return ch_num;
  1968. }
  1969. cdc_dma_rx_cfg[ch_num].sample_rate =
  1970. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1971. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1972. __func__, ucontrol->value.enumerated.item[0],
  1973. cdc_dma_rx_cfg[ch_num].sample_rate);
  1974. return 0;
  1975. }
  1976. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1977. struct snd_ctl_elem_value *ucontrol)
  1978. {
  1979. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1980. if (ch_num < 0) {
  1981. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1982. return ch_num;
  1983. }
  1984. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1985. cdc_dma_tx_cfg[ch_num].channels);
  1986. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1987. return 0;
  1988. }
  1989. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1990. struct snd_ctl_elem_value *ucontrol)
  1991. {
  1992. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1993. if (ch_num < 0) {
  1994. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1995. return ch_num;
  1996. }
  1997. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1998. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1999. cdc_dma_tx_cfg[ch_num].channels);
  2000. return 1;
  2001. }
  2002. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2003. struct snd_ctl_elem_value *ucontrol)
  2004. {
  2005. int sample_rate_val;
  2006. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2007. if (ch_num < 0) {
  2008. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2009. return ch_num;
  2010. }
  2011. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2012. case SAMPLING_RATE_384KHZ:
  2013. sample_rate_val = 12;
  2014. break;
  2015. case SAMPLING_RATE_352P8KHZ:
  2016. sample_rate_val = 11;
  2017. break;
  2018. case SAMPLING_RATE_192KHZ:
  2019. sample_rate_val = 10;
  2020. break;
  2021. case SAMPLING_RATE_176P4KHZ:
  2022. sample_rate_val = 9;
  2023. break;
  2024. case SAMPLING_RATE_96KHZ:
  2025. sample_rate_val = 8;
  2026. break;
  2027. case SAMPLING_RATE_88P2KHZ:
  2028. sample_rate_val = 7;
  2029. break;
  2030. case SAMPLING_RATE_48KHZ:
  2031. sample_rate_val = 6;
  2032. break;
  2033. case SAMPLING_RATE_44P1KHZ:
  2034. sample_rate_val = 5;
  2035. break;
  2036. case SAMPLING_RATE_32KHZ:
  2037. sample_rate_val = 4;
  2038. break;
  2039. case SAMPLING_RATE_22P05KHZ:
  2040. sample_rate_val = 3;
  2041. break;
  2042. case SAMPLING_RATE_16KHZ:
  2043. sample_rate_val = 2;
  2044. break;
  2045. case SAMPLING_RATE_11P025KHZ:
  2046. sample_rate_val = 1;
  2047. break;
  2048. case SAMPLING_RATE_8KHZ:
  2049. sample_rate_val = 0;
  2050. break;
  2051. default:
  2052. sample_rate_val = 6;
  2053. break;
  2054. }
  2055. ucontrol->value.integer.value[0] = sample_rate_val;
  2056. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2057. cdc_dma_tx_cfg[ch_num].sample_rate);
  2058. return 0;
  2059. }
  2060. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2061. struct snd_ctl_elem_value *ucontrol)
  2062. {
  2063. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2064. if (ch_num < 0) {
  2065. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2066. return ch_num;
  2067. }
  2068. switch (ucontrol->value.integer.value[0]) {
  2069. case 12:
  2070. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2071. break;
  2072. case 11:
  2073. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2074. break;
  2075. case 10:
  2076. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2077. break;
  2078. case 9:
  2079. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2080. break;
  2081. case 8:
  2082. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2083. break;
  2084. case 7:
  2085. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2086. break;
  2087. case 6:
  2088. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2089. break;
  2090. case 5:
  2091. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2092. break;
  2093. case 4:
  2094. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2095. break;
  2096. case 3:
  2097. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2098. break;
  2099. case 2:
  2100. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2101. break;
  2102. case 1:
  2103. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2104. break;
  2105. case 0:
  2106. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2107. break;
  2108. default:
  2109. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2110. break;
  2111. }
  2112. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2113. __func__, ucontrol->value.integer.value[0],
  2114. cdc_dma_tx_cfg[ch_num].sample_rate);
  2115. return 0;
  2116. }
  2117. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2118. struct snd_ctl_elem_value *ucontrol)
  2119. {
  2120. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2121. if (ch_num < 0) {
  2122. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2123. return ch_num;
  2124. }
  2125. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2126. case SNDRV_PCM_FORMAT_S32_LE:
  2127. ucontrol->value.integer.value[0] = 3;
  2128. break;
  2129. case SNDRV_PCM_FORMAT_S24_3LE:
  2130. ucontrol->value.integer.value[0] = 2;
  2131. break;
  2132. case SNDRV_PCM_FORMAT_S24_LE:
  2133. ucontrol->value.integer.value[0] = 1;
  2134. break;
  2135. case SNDRV_PCM_FORMAT_S16_LE:
  2136. default:
  2137. ucontrol->value.integer.value[0] = 0;
  2138. break;
  2139. }
  2140. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2141. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2142. ucontrol->value.integer.value[0]);
  2143. return 0;
  2144. }
  2145. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2146. struct snd_ctl_elem_value *ucontrol)
  2147. {
  2148. int rc = 0;
  2149. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2150. if (ch_num < 0) {
  2151. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2152. return ch_num;
  2153. }
  2154. switch (ucontrol->value.integer.value[0]) {
  2155. case 3:
  2156. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2157. break;
  2158. case 2:
  2159. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2160. break;
  2161. case 1:
  2162. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2163. break;
  2164. case 0:
  2165. default:
  2166. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2167. break;
  2168. }
  2169. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2170. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2171. ucontrol->value.integer.value[0]);
  2172. return rc;
  2173. }
  2174. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2175. {
  2176. int idx = 0;
  2177. switch (be_id) {
  2178. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2179. idx = WSA_CDC_DMA_RX_0;
  2180. break;
  2181. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2182. idx = WSA_CDC_DMA_TX_0;
  2183. break;
  2184. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2185. idx = WSA_CDC_DMA_RX_1;
  2186. break;
  2187. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2188. idx = WSA_CDC_DMA_TX_1;
  2189. break;
  2190. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2191. idx = WSA_CDC_DMA_TX_2;
  2192. break;
  2193. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2194. idx = RX_CDC_DMA_RX_0;
  2195. break;
  2196. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2197. idx = RX_CDC_DMA_RX_1;
  2198. break;
  2199. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2200. idx = RX_CDC_DMA_RX_2;
  2201. break;
  2202. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2203. idx = RX_CDC_DMA_RX_3;
  2204. break;
  2205. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2206. idx = RX_CDC_DMA_RX_5;
  2207. break;
  2208. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2209. idx = TX_CDC_DMA_TX_0;
  2210. break;
  2211. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2212. idx = TX_CDC_DMA_TX_3;
  2213. break;
  2214. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2215. idx = TX_CDC_DMA_TX_4;
  2216. break;
  2217. default:
  2218. idx = RX_CDC_DMA_RX_0;
  2219. break;
  2220. }
  2221. return idx;
  2222. }
  2223. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2224. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2225. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2226. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2227. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2228. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2229. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2230. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2231. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2232. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2233. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2234. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2235. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2236. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2237. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2238. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2239. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2240. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2241. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2242. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2243. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2244. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2245. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2246. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2247. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2248. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2249. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2250. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2251. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2252. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2253. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2254. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2255. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2256. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2257. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2258. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2259. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2260. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2261. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2262. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2263. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2264. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2265. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2266. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2267. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2268. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2269. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2270. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2271. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2272. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2273. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2274. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2275. wsa_cdc_dma_rx_0_sample_rate,
  2276. cdc_dma_rx_sample_rate_get,
  2277. cdc_dma_rx_sample_rate_put),
  2278. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2279. wsa_cdc_dma_rx_1_sample_rate,
  2280. cdc_dma_rx_sample_rate_get,
  2281. cdc_dma_rx_sample_rate_put),
  2282. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2283. rx_cdc_dma_rx_0_sample_rate,
  2284. cdc_dma_rx_sample_rate_get,
  2285. cdc_dma_rx_sample_rate_put),
  2286. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2287. rx_cdc_dma_rx_1_sample_rate,
  2288. cdc_dma_rx_sample_rate_get,
  2289. cdc_dma_rx_sample_rate_put),
  2290. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2291. rx_cdc_dma_rx_2_sample_rate,
  2292. cdc_dma_rx_sample_rate_get,
  2293. cdc_dma_rx_sample_rate_put),
  2294. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2295. rx_cdc_dma_rx_3_sample_rate,
  2296. cdc_dma_rx_sample_rate_get,
  2297. cdc_dma_rx_sample_rate_put),
  2298. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2299. rx_cdc_dma_rx_5_sample_rate,
  2300. cdc_dma_rx_sample_rate_get,
  2301. cdc_dma_rx_sample_rate_put),
  2302. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2303. wsa_cdc_dma_tx_0_sample_rate,
  2304. cdc_dma_tx_sample_rate_get,
  2305. cdc_dma_tx_sample_rate_put),
  2306. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2307. wsa_cdc_dma_tx_1_sample_rate,
  2308. cdc_dma_tx_sample_rate_get,
  2309. cdc_dma_tx_sample_rate_put),
  2310. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2311. wsa_cdc_dma_tx_2_sample_rate,
  2312. cdc_dma_tx_sample_rate_get,
  2313. cdc_dma_tx_sample_rate_put),
  2314. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2315. tx_cdc_dma_tx_0_sample_rate,
  2316. cdc_dma_tx_sample_rate_get,
  2317. cdc_dma_tx_sample_rate_put),
  2318. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2319. tx_cdc_dma_tx_3_sample_rate,
  2320. cdc_dma_tx_sample_rate_get,
  2321. cdc_dma_tx_sample_rate_put),
  2322. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2323. tx_cdc_dma_tx_4_sample_rate,
  2324. cdc_dma_tx_sample_rate_get,
  2325. cdc_dma_tx_sample_rate_put),
  2326. };
  2327. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2328. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2329. usb_audio_rx_sample_rate_get,
  2330. usb_audio_rx_sample_rate_put),
  2331. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2332. usb_audio_tx_sample_rate_get,
  2333. usb_audio_tx_sample_rate_put),
  2334. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2335. tdm_rx_sample_rate_get,
  2336. tdm_rx_sample_rate_put),
  2337. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2338. tdm_rx_sample_rate_get,
  2339. tdm_rx_sample_rate_put),
  2340. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2341. tdm_rx_sample_rate_get,
  2342. tdm_rx_sample_rate_put),
  2343. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2344. tdm_tx_sample_rate_get,
  2345. tdm_tx_sample_rate_put),
  2346. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2347. tdm_tx_sample_rate_get,
  2348. tdm_tx_sample_rate_put),
  2349. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2350. tdm_tx_sample_rate_get,
  2351. tdm_tx_sample_rate_put),
  2352. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2353. aux_pcm_rx_sample_rate_get,
  2354. aux_pcm_rx_sample_rate_put),
  2355. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2356. aux_pcm_rx_sample_rate_get,
  2357. aux_pcm_rx_sample_rate_put),
  2358. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2359. aux_pcm_rx_sample_rate_get,
  2360. aux_pcm_rx_sample_rate_put),
  2361. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2362. aux_pcm_tx_sample_rate_get,
  2363. aux_pcm_tx_sample_rate_put),
  2364. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2365. aux_pcm_tx_sample_rate_get,
  2366. aux_pcm_tx_sample_rate_put),
  2367. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2368. aux_pcm_tx_sample_rate_get,
  2369. aux_pcm_tx_sample_rate_put),
  2370. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2371. mi2s_rx_sample_rate_get,
  2372. mi2s_rx_sample_rate_put),
  2373. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2374. mi2s_rx_sample_rate_get,
  2375. mi2s_rx_sample_rate_put),
  2376. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2377. mi2s_rx_sample_rate_get,
  2378. mi2s_rx_sample_rate_put),
  2379. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2380. mi2s_tx_sample_rate_get,
  2381. mi2s_tx_sample_rate_put),
  2382. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2383. mi2s_tx_sample_rate_get,
  2384. mi2s_tx_sample_rate_put),
  2385. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2386. mi2s_tx_sample_rate_get,
  2387. mi2s_tx_sample_rate_put),
  2388. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2389. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2390. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2391. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2392. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2393. tdm_rx_format_get,
  2394. tdm_rx_format_put),
  2395. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2396. tdm_rx_format_get,
  2397. tdm_rx_format_put),
  2398. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2399. tdm_rx_format_get,
  2400. tdm_rx_format_put),
  2401. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2402. tdm_tx_format_get,
  2403. tdm_tx_format_put),
  2404. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2405. tdm_tx_format_get,
  2406. tdm_tx_format_put),
  2407. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2408. tdm_tx_format_get,
  2409. tdm_tx_format_put),
  2410. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2411. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2412. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2413. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2414. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2415. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2416. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2417. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2418. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2419. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2420. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2421. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2422. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2423. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2424. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2425. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2426. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2427. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2428. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2429. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2430. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2431. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2432. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2433. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2434. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2435. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2436. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2437. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2438. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2439. proxy_rx_ch_get, proxy_rx_ch_put),
  2440. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2441. tdm_rx_ch_get,
  2442. tdm_rx_ch_put),
  2443. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2444. tdm_rx_ch_get,
  2445. tdm_rx_ch_put),
  2446. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2447. tdm_rx_ch_get,
  2448. tdm_rx_ch_put),
  2449. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2450. tdm_tx_ch_get,
  2451. tdm_tx_ch_put),
  2452. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2453. tdm_tx_ch_get,
  2454. tdm_tx_ch_put),
  2455. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2456. tdm_tx_ch_get,
  2457. tdm_tx_ch_put),
  2458. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2459. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2460. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2461. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2462. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2463. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2464. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2465. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2466. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2467. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2468. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2469. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2470. };
  2471. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2472. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2473. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2474. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2475. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2476. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2477. aux_pcm_rx_sample_rate_get,
  2478. aux_pcm_rx_sample_rate_put),
  2479. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2480. aux_pcm_tx_sample_rate_get,
  2481. aux_pcm_tx_sample_rate_put),
  2482. };
  2483. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2484. struct snd_pcm_hw_params *params)
  2485. {
  2486. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2487. struct snd_interval *rate = hw_param_interval(params,
  2488. SNDRV_PCM_HW_PARAM_RATE);
  2489. struct snd_interval *channels = hw_param_interval(params,
  2490. SNDRV_PCM_HW_PARAM_CHANNELS);
  2491. int rc = 0;
  2492. pr_debug("%s: format = %d, rate = %d\n",
  2493. __func__, params_format(params), params_rate(params));
  2494. switch (dai_link->id) {
  2495. case MSM_BACKEND_DAI_USB_RX:
  2496. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2497. usb_rx_cfg.bit_format);
  2498. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2499. channels->min = channels->max = usb_rx_cfg.channels;
  2500. break;
  2501. case MSM_BACKEND_DAI_USB_TX:
  2502. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2503. usb_tx_cfg.bit_format);
  2504. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2505. channels->min = channels->max = usb_tx_cfg.channels;
  2506. break;
  2507. case MSM_BACKEND_DAI_AFE_PCM_RX:
  2508. channels->min = channels->max = proxy_rx_cfg.channels;
  2509. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  2510. break;
  2511. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  2512. channels->min = channels->max =
  2513. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2514. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2515. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  2516. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  2517. break;
  2518. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  2519. channels->min = channels->max =
  2520. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2521. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2522. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  2523. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  2524. break;
  2525. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  2526. channels->min = channels->max =
  2527. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2528. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2529. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  2530. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  2531. break;
  2532. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  2533. channels->min = channels->max =
  2534. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2535. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2536. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  2537. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  2538. break;
  2539. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  2540. channels->min = channels->max =
  2541. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2542. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2543. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  2544. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  2545. break;
  2546. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  2547. channels->min = channels->max =
  2548. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2549. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2550. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  2551. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  2552. break;
  2553. case MSM_BACKEND_DAI_AUXPCM_RX:
  2554. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2555. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  2556. rate->min = rate->max =
  2557. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  2558. channels->min = channels->max =
  2559. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  2560. break;
  2561. case MSM_BACKEND_DAI_AUXPCM_TX:
  2562. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2563. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  2564. rate->min = rate->max =
  2565. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  2566. channels->min = channels->max =
  2567. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  2568. break;
  2569. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  2570. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2571. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  2572. rate->min = rate->max =
  2573. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  2574. channels->min = channels->max =
  2575. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  2576. break;
  2577. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  2578. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2579. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  2580. rate->min = rate->max =
  2581. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  2582. channels->min = channels->max =
  2583. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  2584. break;
  2585. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  2586. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2587. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  2588. rate->min = rate->max =
  2589. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  2590. channels->min = channels->max =
  2591. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  2592. break;
  2593. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  2594. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2595. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  2596. rate->min = rate->max =
  2597. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  2598. channels->min = channels->max =
  2599. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  2600. break;
  2601. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  2602. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2603. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  2604. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  2605. channels->min = channels->max =
  2606. mi2s_rx_cfg[PRIM_MI2S].channels;
  2607. break;
  2608. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  2609. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2610. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  2611. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  2612. channels->min = channels->max =
  2613. mi2s_tx_cfg[PRIM_MI2S].channels;
  2614. break;
  2615. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  2616. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2617. mi2s_rx_cfg[SEC_MI2S].bit_format);
  2618. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  2619. channels->min = channels->max =
  2620. mi2s_rx_cfg[SEC_MI2S].channels;
  2621. break;
  2622. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  2623. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2624. mi2s_tx_cfg[SEC_MI2S].bit_format);
  2625. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  2626. channels->min = channels->max =
  2627. mi2s_tx_cfg[SEC_MI2S].channels;
  2628. break;
  2629. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  2630. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2631. mi2s_rx_cfg[TERT_MI2S].bit_format);
  2632. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  2633. channels->min = channels->max =
  2634. mi2s_rx_cfg[TERT_MI2S].channels;
  2635. break;
  2636. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  2637. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2638. mi2s_tx_cfg[TERT_MI2S].bit_format);
  2639. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  2640. channels->min = channels->max =
  2641. mi2s_tx_cfg[TERT_MI2S].channels;
  2642. break;
  2643. default:
  2644. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  2645. break;
  2646. }
  2647. return rc;
  2648. }
  2649. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  2650. struct snd_pcm_hw_params *params)
  2651. {
  2652. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2653. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2654. int ret = 0;
  2655. int slot_width = 32;
  2656. int channels, slots;
  2657. unsigned int slot_mask, rate, clk_freq;
  2658. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  2659. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  2660. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  2661. switch (cpu_dai->id) {
  2662. case AFE_PORT_ID_PRIMARY_TDM_RX:
  2663. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  2664. break;
  2665. case AFE_PORT_ID_SECONDARY_TDM_RX:
  2666. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  2667. break;
  2668. case AFE_PORT_ID_TERTIARY_TDM_RX:
  2669. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  2670. break;
  2671. case AFE_PORT_ID_PRIMARY_TDM_TX:
  2672. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  2673. break;
  2674. case AFE_PORT_ID_SECONDARY_TDM_TX:
  2675. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  2676. break;
  2677. case AFE_PORT_ID_TERTIARY_TDM_TX:
  2678. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  2679. break;
  2680. default:
  2681. pr_err("%s: dai id 0x%x not supported\n",
  2682. __func__, cpu_dai->id);
  2683. return -EINVAL;
  2684. }
  2685. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2686. /*2 slot config - bits 0 and 1 set for the first two slots */
  2687. slot_mask = 0x0000FFFF >> (16 - slots);
  2688. channels = slots;
  2689. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  2690. __func__, slot_width, slots);
  2691. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  2692. slots, slot_width);
  2693. if (ret < 0) {
  2694. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  2695. __func__, ret);
  2696. goto end;
  2697. }
  2698. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2699. 0, NULL, channels, slot_offset);
  2700. if (ret < 0) {
  2701. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  2702. __func__, ret);
  2703. goto end;
  2704. }
  2705. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  2706. /*2 slot config - bits 0 and 1 set for the first two slots */
  2707. slot_mask = 0x0000FFFF >> (16 - slots);
  2708. channels = slots;
  2709. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  2710. __func__, slot_width, slots);
  2711. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  2712. slots, slot_width);
  2713. if (ret < 0) {
  2714. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  2715. __func__, ret);
  2716. goto end;
  2717. }
  2718. ret = snd_soc_dai_set_channel_map(cpu_dai,
  2719. channels, slot_offset, 0, NULL);
  2720. if (ret < 0) {
  2721. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  2722. __func__, ret);
  2723. goto end;
  2724. }
  2725. } else {
  2726. ret = -EINVAL;
  2727. pr_err("%s: invalid use case, err:%d\n",
  2728. __func__, ret);
  2729. goto end;
  2730. }
  2731. rate = params_rate(params);
  2732. clk_freq = rate * slot_width * slots;
  2733. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  2734. if (ret < 0)
  2735. pr_err("%s: failed to set tdm clk, err:%d\n",
  2736. __func__, ret);
  2737. end:
  2738. return ret;
  2739. }
  2740. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  2741. struct snd_pcm_hw_params *params)
  2742. {
  2743. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2744. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  2745. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2746. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2747. int ret = 0;
  2748. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  2749. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  2750. u32 user_set_tx_ch = 0;
  2751. u32 user_set_rx_ch = 0;
  2752. u32 ch_id;
  2753. ret = snd_soc_dai_get_channel_map(codec_dai,
  2754. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  2755. &rx_ch_cdc_dma);
  2756. if (ret < 0) {
  2757. pr_err("%s: failed to get codec chan map, err:%d\n",
  2758. __func__, ret);
  2759. goto err;
  2760. }
  2761. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  2762. switch (dai_link->id) {
  2763. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2764. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2765. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2766. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2767. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2768. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2769. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  2770. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2771. {
  2772. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2773. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  2774. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  2775. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  2776. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  2777. user_set_rx_ch, &rx_ch_cdc_dma);
  2778. if (ret < 0) {
  2779. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2780. __func__, ret);
  2781. goto err;
  2782. }
  2783. }
  2784. break;
  2785. }
  2786. } else {
  2787. switch (dai_link->id) {
  2788. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2789. {
  2790. user_set_tx_ch = msm_vi_feed_tx_ch;
  2791. }
  2792. break;
  2793. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2794. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2795. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2796. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2797. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2798. {
  2799. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  2800. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  2801. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  2802. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  2803. }
  2804. break;
  2805. }
  2806. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  2807. &tx_ch_cdc_dma, 0, 0);
  2808. if (ret < 0) {
  2809. pr_err("%s: failed to set cpu chan map, err:%d\n",
  2810. __func__, ret);
  2811. goto err;
  2812. }
  2813. }
  2814. err:
  2815. return ret;
  2816. }
  2817. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  2818. {
  2819. cpumask_t mask;
  2820. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  2821. pm_qos_remove_request(&substream->latency_pm_qos_req);
  2822. cpumask_clear(&mask);
  2823. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  2824. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  2825. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  2826. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  2827. pm_qos_add_request(&substream->latency_pm_qos_req,
  2828. PM_QOS_CPU_DMA_LATENCY,
  2829. MSM_LL_QOS_VALUE);
  2830. return 0;
  2831. }
  2832. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  2833. {
  2834. int ret = 0;
  2835. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2836. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  2837. int index = cpu_dai->id;
  2838. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  2839. dev_dbg(rtd->card->dev,
  2840. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  2841. __func__, substream->name, substream->stream,
  2842. cpu_dai->name, cpu_dai->id);
  2843. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  2844. ret = -EINVAL;
  2845. dev_err(rtd->card->dev,
  2846. "%s: CPU DAI id (%d) out of range\n",
  2847. __func__, cpu_dai->id);
  2848. goto err;
  2849. }
  2850. /*
  2851. * Mutex protection in case the same MI2S
  2852. * interface using for both TX and RX so
  2853. * that the same clock won't be enable twice.
  2854. */
  2855. mutex_lock(&mi2s_intf_conf[index].lock);
  2856. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  2857. /* Check if msm needs to provide the clock to the interface */
  2858. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  2859. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  2860. fmt = SND_SOC_DAIFMT_CBM_CFM;
  2861. }
  2862. ret = msm_mi2s_set_sclk(substream, true);
  2863. if (ret < 0) {
  2864. dev_err(rtd->card->dev,
  2865. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  2866. __func__, ret);
  2867. goto clean_up;
  2868. }
  2869. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  2870. if (ret < 0) {
  2871. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  2872. __func__, index, ret);
  2873. goto clk_off;
  2874. }
  2875. }
  2876. clk_off:
  2877. if (ret < 0)
  2878. msm_mi2s_set_sclk(substream, false);
  2879. clean_up:
  2880. if (ret < 0)
  2881. mi2s_intf_conf[index].ref_cnt--;
  2882. mutex_unlock(&mi2s_intf_conf[index].lock);
  2883. err:
  2884. return ret;
  2885. }
  2886. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  2887. {
  2888. int ret = 0;
  2889. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  2890. int index = rtd->cpu_dai->id;
  2891. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  2892. substream->name, substream->stream);
  2893. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  2894. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  2895. return;
  2896. }
  2897. mutex_lock(&mi2s_intf_conf[index].lock);
  2898. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  2899. ret = msm_mi2s_set_sclk(substream, false);
  2900. if (ret < 0)
  2901. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  2902. __func__, index, ret);
  2903. }
  2904. mutex_unlock(&mi2s_intf_conf[index].lock);
  2905. }
  2906. static struct snd_soc_ops kona_tdm_be_ops = {
  2907. .hw_params = kona_tdm_snd_hw_params,
  2908. };
  2909. static struct snd_soc_ops msm_mi2s_be_ops = {
  2910. .startup = msm_mi2s_snd_startup,
  2911. .shutdown = msm_mi2s_snd_shutdown,
  2912. };
  2913. static struct snd_soc_ops msm_fe_qos_ops = {
  2914. .prepare = msm_fe_qos_prepare,
  2915. };
  2916. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  2917. .hw_params = msm_snd_cdc_dma_hw_params,
  2918. };
  2919. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  2920. struct snd_kcontrol *kcontrol, int event)
  2921. {
  2922. struct msm_asoc_mach_data *pdata = NULL;
  2923. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  2924. int ret = 0;
  2925. u32 dmic_idx;
  2926. int *dmic_gpio_cnt;
  2927. struct device_node *dmic_gpio;
  2928. char *wname;
  2929. wname = strpbrk(w->name, "012345");
  2930. if (!wname) {
  2931. dev_err(component->dev, "%s: widget not found\n", __func__);
  2932. return -EINVAL;
  2933. }
  2934. ret = kstrtouint(wname, 10, &dmic_idx);
  2935. if (ret < 0) {
  2936. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  2937. __func__);
  2938. return -EINVAL;
  2939. }
  2940. pdata = snd_soc_card_get_drvdata(component->card);
  2941. switch (dmic_idx) {
  2942. case 0:
  2943. case 1:
  2944. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  2945. dmic_gpio = pdata->dmic01_gpio_p;
  2946. break;
  2947. case 2:
  2948. case 3:
  2949. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  2950. dmic_gpio = pdata->dmic23_gpio_p;
  2951. break;
  2952. case 4:
  2953. case 5:
  2954. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  2955. dmic_gpio = pdata->dmic45_gpio_p;
  2956. break;
  2957. default:
  2958. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  2959. __func__);
  2960. return -EINVAL;
  2961. }
  2962. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  2963. __func__, event, dmic_idx, *dmic_gpio_cnt);
  2964. switch (event) {
  2965. case SND_SOC_DAPM_PRE_PMU:
  2966. (*dmic_gpio_cnt)++;
  2967. if (*dmic_gpio_cnt == 1) {
  2968. ret = msm_cdc_pinctrl_select_active_state(
  2969. dmic_gpio);
  2970. if (ret < 0) {
  2971. pr_err("%s: gpio set cannot be activated %sd",
  2972. __func__, "dmic_gpio");
  2973. return ret;
  2974. }
  2975. }
  2976. break;
  2977. case SND_SOC_DAPM_POST_PMD:
  2978. (*dmic_gpio_cnt)--;
  2979. if (*dmic_gpio_cnt == 0) {
  2980. ret = msm_cdc_pinctrl_select_sleep_state(
  2981. dmic_gpio);
  2982. if (ret < 0) {
  2983. pr_err("%s: gpio set cannot be de-activated %sd",
  2984. __func__, "dmic_gpio");
  2985. return ret;
  2986. }
  2987. }
  2988. break;
  2989. default:
  2990. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  2991. return -EINVAL;
  2992. }
  2993. return 0;
  2994. }
  2995. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  2996. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  2997. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  2998. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  2999. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3000. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3001. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3002. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3003. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3004. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3005. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3006. };
  3007. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3008. {
  3009. int ret = -EINVAL;
  3010. struct snd_soc_component *component;
  3011. struct snd_soc_dapm_context *dapm;
  3012. struct snd_card *card;
  3013. struct snd_info_entry *entry;
  3014. struct snd_soc_component *aux_comp;
  3015. struct msm_asoc_mach_data *pdata =
  3016. snd_soc_card_get_drvdata(rtd->card);
  3017. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3018. if (!component) {
  3019. pr_err("%s: could not find component for bolero_codec\n",
  3020. __func__);
  3021. return ret;
  3022. }
  3023. dapm = snd_soc_component_get_dapm(component);
  3024. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3025. ARRAY_SIZE(msm_int_snd_controls));
  3026. if (ret < 0) {
  3027. pr_err("%s: add_component_controls failed: %d\n",
  3028. __func__, ret);
  3029. return ret;
  3030. }
  3031. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3032. ARRAY_SIZE(msm_common_snd_controls));
  3033. if (ret < 0) {
  3034. pr_err("%s: add common snd controls failed: %d\n",
  3035. __func__, ret);
  3036. return ret;
  3037. }
  3038. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3039. ARRAY_SIZE(msm_int_dapm_widgets));
  3040. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3041. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3042. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3043. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3044. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3045. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3046. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3047. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3048. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3049. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3050. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3051. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3052. snd_soc_dapm_sync(dapm);
  3053. /*
  3054. * Send speaker configuration only for WSA8810.
  3055. * Default configuration is for WSA8815.
  3056. */
  3057. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3058. __func__, rtd->card->num_aux_devs);
  3059. if (rtd->card->num_aux_devs &&
  3060. !list_empty(&rtd->card->component_dev_list)) {
  3061. aux_comp = list_first_entry(
  3062. &rtd->card->component_dev_list,
  3063. struct snd_soc_component,
  3064. card_aux_list);
  3065. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3066. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3067. wsa_macro_set_spkr_mode(component,
  3068. WSA_MACRO_SPKR_MODE_1);
  3069. wsa_macro_set_spkr_gain_offset(component,
  3070. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3071. }
  3072. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3073. sm_port_map);
  3074. }
  3075. card = rtd->card->snd_card;
  3076. if (!pdata->codec_root) {
  3077. entry = snd_info_create_subdir(card->module, "codecs",
  3078. card->proc_root);
  3079. if (!entry) {
  3080. pr_debug("%s: Cannot create codecs module entry\n",
  3081. __func__);
  3082. ret = 0;
  3083. goto err;
  3084. }
  3085. pdata->codec_root = entry;
  3086. }
  3087. bolero_info_create_codec_entry(pdata->codec_root, component);
  3088. codec_reg_done = true;
  3089. return 0;
  3090. err:
  3091. return ret;
  3092. }
  3093. /* Digital audio interface glue - connects codec <---> CPU */
  3094. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3095. /* FrontEnd DAI Links */
  3096. {/* hw:x,0 */
  3097. .name = MSM_DAILINK_NAME(Media1),
  3098. .stream_name = "MultiMedia1",
  3099. .cpu_dai_name = "MultiMedia1",
  3100. .platform_name = "msm-pcm-dsp.0",
  3101. .dynamic = 1,
  3102. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3103. .dpcm_playback = 1,
  3104. .dpcm_capture = 1,
  3105. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3106. SND_SOC_DPCM_TRIGGER_POST},
  3107. .codec_dai_name = "snd-soc-dummy-dai",
  3108. .codec_name = "snd-soc-dummy",
  3109. .ignore_suspend = 1,
  3110. /* this dainlink has playback support */
  3111. .ignore_pmdown_time = 1,
  3112. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3113. },
  3114. {/* hw:x,1 */
  3115. .name = MSM_DAILINK_NAME(Media2),
  3116. .stream_name = "MultiMedia2",
  3117. .cpu_dai_name = "MultiMedia2",
  3118. .platform_name = "msm-pcm-dsp.0",
  3119. .dynamic = 1,
  3120. .dpcm_playback = 1,
  3121. .dpcm_capture = 1,
  3122. .codec_dai_name = "snd-soc-dummy-dai",
  3123. .codec_name = "snd-soc-dummy",
  3124. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3125. SND_SOC_DPCM_TRIGGER_POST},
  3126. .ignore_suspend = 1,
  3127. /* this dainlink has playback support */
  3128. .ignore_pmdown_time = 1,
  3129. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3130. },
  3131. {/* hw:x,2 */
  3132. .name = "VoiceMMode1",
  3133. .stream_name = "VoiceMMode1",
  3134. .cpu_dai_name = "VoiceMMode1",
  3135. .platform_name = "msm-pcm-voice",
  3136. .dynamic = 1,
  3137. .dpcm_playback = 1,
  3138. .dpcm_capture = 1,
  3139. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3140. SND_SOC_DPCM_TRIGGER_POST},
  3141. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3142. .ignore_suspend = 1,
  3143. .ignore_pmdown_time = 1,
  3144. .codec_dai_name = "snd-soc-dummy-dai",
  3145. .codec_name = "snd-soc-dummy",
  3146. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3147. },
  3148. {/* hw:x,3 */
  3149. .name = "MSM VoIP",
  3150. .stream_name = "VoIP",
  3151. .cpu_dai_name = "VoIP",
  3152. .platform_name = "msm-voip-dsp",
  3153. .dynamic = 1,
  3154. .dpcm_playback = 1,
  3155. .dpcm_capture = 1,
  3156. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3157. SND_SOC_DPCM_TRIGGER_POST},
  3158. .codec_dai_name = "snd-soc-dummy-dai",
  3159. .codec_name = "snd-soc-dummy",
  3160. .ignore_suspend = 1,
  3161. /* this dainlink has playback support */
  3162. .ignore_pmdown_time = 1,
  3163. .id = MSM_FRONTEND_DAI_VOIP,
  3164. },
  3165. {/* hw:x,4 */
  3166. .name = MSM_DAILINK_NAME(ULL),
  3167. .stream_name = "MultiMedia3",
  3168. .cpu_dai_name = "MultiMedia3",
  3169. .platform_name = "msm-pcm-dsp.2",
  3170. .dynamic = 1,
  3171. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3172. .dpcm_playback = 1,
  3173. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3174. SND_SOC_DPCM_TRIGGER_POST},
  3175. .codec_dai_name = "snd-soc-dummy-dai",
  3176. .codec_name = "snd-soc-dummy",
  3177. .ignore_suspend = 1,
  3178. /* this dainlink has playback support */
  3179. .ignore_pmdown_time = 1,
  3180. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3181. },
  3182. /* Hostless PCM purpose */
  3183. {/* hw:x,5 */
  3184. .name = "MSM AFE-PCM RX",
  3185. .stream_name = "AFE-PROXY RX",
  3186. .cpu_dai_name = "msm-dai-q6-dev.241",
  3187. .codec_name = "msm-stub-codec.1",
  3188. .codec_dai_name = "msm-stub-rx",
  3189. .platform_name = "msm-pcm-afe",
  3190. .dpcm_playback = 1,
  3191. .ignore_suspend = 1,
  3192. /* this dainlink has playback support */
  3193. .ignore_pmdown_time = 1,
  3194. },
  3195. {/* hw:x,6 */
  3196. .name = "MSM AFE-PCM TX",
  3197. .stream_name = "AFE-PROXY TX",
  3198. .cpu_dai_name = "msm-dai-q6-dev.240",
  3199. .codec_name = "msm-stub-codec.1",
  3200. .codec_dai_name = "msm-stub-tx",
  3201. .platform_name = "msm-pcm-afe",
  3202. .dpcm_capture = 1,
  3203. .ignore_suspend = 1,
  3204. },
  3205. {/* hw:x,7 */
  3206. .name = MSM_DAILINK_NAME(Compress1),
  3207. .stream_name = "Compress1",
  3208. .cpu_dai_name = "MultiMedia4",
  3209. .platform_name = "msm-compress-dsp",
  3210. .dynamic = 1,
  3211. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3212. .dpcm_playback = 1,
  3213. .dpcm_capture = 1,
  3214. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3215. SND_SOC_DPCM_TRIGGER_POST},
  3216. .codec_dai_name = "snd-soc-dummy-dai",
  3217. .codec_name = "snd-soc-dummy",
  3218. .ignore_suspend = 1,
  3219. .ignore_pmdown_time = 1,
  3220. /* this dainlink has playback support */
  3221. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3222. },
  3223. {/* hw:x,8 */
  3224. .name = "AUXPCM Hostless",
  3225. .stream_name = "AUXPCM Hostless",
  3226. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3227. .platform_name = "msm-pcm-hostless",
  3228. .dynamic = 1,
  3229. .dpcm_playback = 1,
  3230. .dpcm_capture = 1,
  3231. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3232. SND_SOC_DPCM_TRIGGER_POST},
  3233. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3234. .ignore_suspend = 1,
  3235. /* this dainlink has playback support */
  3236. .ignore_pmdown_time = 1,
  3237. .codec_dai_name = "snd-soc-dummy-dai",
  3238. .codec_name = "snd-soc-dummy",
  3239. },
  3240. {/* hw:x,9 */
  3241. .name = MSM_DAILINK_NAME(LowLatency),
  3242. .stream_name = "MultiMedia5",
  3243. .cpu_dai_name = "MultiMedia5",
  3244. .platform_name = "msm-pcm-dsp.1",
  3245. .dynamic = 1,
  3246. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3247. .dpcm_playback = 1,
  3248. .dpcm_capture = 1,
  3249. .codec_dai_name = "snd-soc-dummy-dai",
  3250. .codec_name = "snd-soc-dummy",
  3251. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3252. SND_SOC_DPCM_TRIGGER_POST},
  3253. .ignore_suspend = 1,
  3254. /* this dainlink has playback support */
  3255. .ignore_pmdown_time = 1,
  3256. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  3257. .ops = &msm_fe_qos_ops,
  3258. },
  3259. {/* hw:x,10 */
  3260. .name = "Listen 1 Audio Service",
  3261. .stream_name = "Listen 1 Audio Service",
  3262. .cpu_dai_name = "LSM1",
  3263. .platform_name = "msm-lsm-client",
  3264. .dynamic = 1,
  3265. .dpcm_capture = 1,
  3266. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3267. SND_SOC_DPCM_TRIGGER_POST },
  3268. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3269. .ignore_suspend = 1,
  3270. .codec_dai_name = "snd-soc-dummy-dai",
  3271. .codec_name = "snd-soc-dummy",
  3272. .id = MSM_FRONTEND_DAI_LSM1,
  3273. },
  3274. /* Multiple Tunnel instances */
  3275. {/* hw:x,11 */
  3276. .name = MSM_DAILINK_NAME(Compress2),
  3277. .stream_name = "Compress2",
  3278. .cpu_dai_name = "MultiMedia7",
  3279. .platform_name = "msm-compress-dsp",
  3280. .dynamic = 1,
  3281. .dpcm_playback = 1,
  3282. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3283. SND_SOC_DPCM_TRIGGER_POST},
  3284. .codec_dai_name = "snd-soc-dummy-dai",
  3285. .codec_name = "snd-soc-dummy",
  3286. .ignore_suspend = 1,
  3287. .ignore_pmdown_time = 1,
  3288. /* this dainlink has playback support */
  3289. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  3290. },
  3291. {/* hw:x,12 */
  3292. .name = MSM_DAILINK_NAME(MultiMedia10),
  3293. .stream_name = "MultiMedia10",
  3294. .cpu_dai_name = "MultiMedia10",
  3295. .platform_name = "msm-pcm-dsp.1",
  3296. .dynamic = 1,
  3297. .dpcm_playback = 1,
  3298. .dpcm_capture = 1,
  3299. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3300. SND_SOC_DPCM_TRIGGER_POST},
  3301. .codec_dai_name = "snd-soc-dummy-dai",
  3302. .codec_name = "snd-soc-dummy",
  3303. .ignore_suspend = 1,
  3304. .ignore_pmdown_time = 1,
  3305. /* this dainlink has playback support */
  3306. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  3307. },
  3308. {/* hw:x,13 */
  3309. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  3310. .stream_name = "MM_NOIRQ",
  3311. .cpu_dai_name = "MultiMedia8",
  3312. .platform_name = "msm-pcm-dsp-noirq",
  3313. .dynamic = 1,
  3314. .dpcm_playback = 1,
  3315. .dpcm_capture = 1,
  3316. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3317. SND_SOC_DPCM_TRIGGER_POST},
  3318. .codec_dai_name = "snd-soc-dummy-dai",
  3319. .codec_name = "snd-soc-dummy",
  3320. .ignore_suspend = 1,
  3321. .ignore_pmdown_time = 1,
  3322. /* this dainlink has playback support */
  3323. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  3324. .ops = &msm_fe_qos_ops,
  3325. },
  3326. /* HDMI Hostless */
  3327. {/* hw:x,14 */
  3328. .name = "HDMI_RX_HOSTLESS",
  3329. .stream_name = "HDMI_RX_HOSTLESS",
  3330. .cpu_dai_name = "HDMI_HOSTLESS",
  3331. .platform_name = "msm-pcm-hostless",
  3332. .dynamic = 1,
  3333. .dpcm_playback = 1,
  3334. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3335. SND_SOC_DPCM_TRIGGER_POST},
  3336. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3337. .ignore_suspend = 1,
  3338. .ignore_pmdown_time = 1,
  3339. .codec_dai_name = "snd-soc-dummy-dai",
  3340. .codec_name = "snd-soc-dummy",
  3341. },
  3342. {/* hw:x,15 */
  3343. .name = "VoiceMMode2",
  3344. .stream_name = "VoiceMMode2",
  3345. .cpu_dai_name = "VoiceMMode2",
  3346. .platform_name = "msm-pcm-voice",
  3347. .dynamic = 1,
  3348. .dpcm_playback = 1,
  3349. .dpcm_capture = 1,
  3350. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3351. SND_SOC_DPCM_TRIGGER_POST},
  3352. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3353. .ignore_suspend = 1,
  3354. .ignore_pmdown_time = 1,
  3355. .codec_dai_name = "snd-soc-dummy-dai",
  3356. .codec_name = "snd-soc-dummy",
  3357. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  3358. },
  3359. /* LSM FE */
  3360. {/* hw:x,16 */
  3361. .name = "Listen 2 Audio Service",
  3362. .stream_name = "Listen 2 Audio Service",
  3363. .cpu_dai_name = "LSM2",
  3364. .platform_name = "msm-lsm-client",
  3365. .dynamic = 1,
  3366. .dpcm_capture = 1,
  3367. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3368. SND_SOC_DPCM_TRIGGER_POST },
  3369. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3370. .ignore_suspend = 1,
  3371. .codec_dai_name = "snd-soc-dummy-dai",
  3372. .codec_name = "snd-soc-dummy",
  3373. .id = MSM_FRONTEND_DAI_LSM2,
  3374. },
  3375. {/* hw:x,17 */
  3376. .name = "Listen 3 Audio Service",
  3377. .stream_name = "Listen 3 Audio Service",
  3378. .cpu_dai_name = "LSM3",
  3379. .platform_name = "msm-lsm-client",
  3380. .dynamic = 1,
  3381. .dpcm_capture = 1,
  3382. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3383. SND_SOC_DPCM_TRIGGER_POST },
  3384. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3385. .ignore_suspend = 1,
  3386. .codec_dai_name = "snd-soc-dummy-dai",
  3387. .codec_name = "snd-soc-dummy",
  3388. .id = MSM_FRONTEND_DAI_LSM3,
  3389. },
  3390. {/* hw:x,18 */
  3391. .name = "Listen 4 Audio Service",
  3392. .stream_name = "Listen 4 Audio Service",
  3393. .cpu_dai_name = "LSM4",
  3394. .platform_name = "msm-lsm-client",
  3395. .dynamic = 1,
  3396. .dpcm_capture = 1,
  3397. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3398. SND_SOC_DPCM_TRIGGER_POST },
  3399. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3400. .ignore_suspend = 1,
  3401. .codec_dai_name = "snd-soc-dummy-dai",
  3402. .codec_name = "snd-soc-dummy",
  3403. .id = MSM_FRONTEND_DAI_LSM4,
  3404. },
  3405. {/* hw:x,19 */
  3406. .name = "Listen 5 Audio Service",
  3407. .stream_name = "Listen 5 Audio Service",
  3408. .cpu_dai_name = "LSM5",
  3409. .platform_name = "msm-lsm-client",
  3410. .dynamic = 1,
  3411. .dpcm_capture = 1,
  3412. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3413. SND_SOC_DPCM_TRIGGER_POST },
  3414. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3415. .ignore_suspend = 1,
  3416. .codec_dai_name = "snd-soc-dummy-dai",
  3417. .codec_name = "snd-soc-dummy",
  3418. .id = MSM_FRONTEND_DAI_LSM5,
  3419. },
  3420. {/* hw:x,20 */
  3421. .name = "Listen 6 Audio Service",
  3422. .stream_name = "Listen 6 Audio Service",
  3423. .cpu_dai_name = "LSM6",
  3424. .platform_name = "msm-lsm-client",
  3425. .dynamic = 1,
  3426. .dpcm_capture = 1,
  3427. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3428. SND_SOC_DPCM_TRIGGER_POST },
  3429. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3430. .ignore_suspend = 1,
  3431. .codec_dai_name = "snd-soc-dummy-dai",
  3432. .codec_name = "snd-soc-dummy",
  3433. .id = MSM_FRONTEND_DAI_LSM6,
  3434. },
  3435. {/* hw:x,21 */
  3436. .name = "Listen 7 Audio Service",
  3437. .stream_name = "Listen 7 Audio Service",
  3438. .cpu_dai_name = "LSM7",
  3439. .platform_name = "msm-lsm-client",
  3440. .dynamic = 1,
  3441. .dpcm_capture = 1,
  3442. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3443. SND_SOC_DPCM_TRIGGER_POST },
  3444. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3445. .ignore_suspend = 1,
  3446. .codec_dai_name = "snd-soc-dummy-dai",
  3447. .codec_name = "snd-soc-dummy",
  3448. .id = MSM_FRONTEND_DAI_LSM7,
  3449. },
  3450. {/* hw:x,22 */
  3451. .name = "Listen 8 Audio Service",
  3452. .stream_name = "Listen 8 Audio Service",
  3453. .cpu_dai_name = "LSM8",
  3454. .platform_name = "msm-lsm-client",
  3455. .dynamic = 1,
  3456. .dpcm_capture = 1,
  3457. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3458. SND_SOC_DPCM_TRIGGER_POST },
  3459. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3460. .ignore_suspend = 1,
  3461. .codec_dai_name = "snd-soc-dummy-dai",
  3462. .codec_name = "snd-soc-dummy",
  3463. .id = MSM_FRONTEND_DAI_LSM8,
  3464. },
  3465. {/* hw:x,23 */
  3466. .name = MSM_DAILINK_NAME(Media9),
  3467. .stream_name = "MultiMedia9",
  3468. .cpu_dai_name = "MultiMedia9",
  3469. .platform_name = "msm-pcm-dsp.0",
  3470. .dynamic = 1,
  3471. .dpcm_playback = 1,
  3472. .dpcm_capture = 1,
  3473. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3474. SND_SOC_DPCM_TRIGGER_POST},
  3475. .codec_dai_name = "snd-soc-dummy-dai",
  3476. .codec_name = "snd-soc-dummy",
  3477. .ignore_suspend = 1,
  3478. /* this dainlink has playback support */
  3479. .ignore_pmdown_time = 1,
  3480. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  3481. },
  3482. {/* hw:x,24 */
  3483. .name = MSM_DAILINK_NAME(Compress4),
  3484. .stream_name = "Compress4",
  3485. .cpu_dai_name = "MultiMedia11",
  3486. .platform_name = "msm-compress-dsp",
  3487. .dynamic = 1,
  3488. .dpcm_playback = 1,
  3489. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3490. SND_SOC_DPCM_TRIGGER_POST},
  3491. .codec_dai_name = "snd-soc-dummy-dai",
  3492. .codec_name = "snd-soc-dummy",
  3493. .ignore_suspend = 1,
  3494. .ignore_pmdown_time = 1,
  3495. /* this dainlink has playback support */
  3496. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  3497. },
  3498. {/* hw:x,25 */
  3499. .name = MSM_DAILINK_NAME(Compress5),
  3500. .stream_name = "Compress5",
  3501. .cpu_dai_name = "MultiMedia12",
  3502. .platform_name = "msm-compress-dsp",
  3503. .dynamic = 1,
  3504. .dpcm_playback = 1,
  3505. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3506. SND_SOC_DPCM_TRIGGER_POST},
  3507. .codec_dai_name = "snd-soc-dummy-dai",
  3508. .codec_name = "snd-soc-dummy",
  3509. .ignore_suspend = 1,
  3510. .ignore_pmdown_time = 1,
  3511. /* this dainlink has playback support */
  3512. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  3513. },
  3514. {/* hw:x,26 */
  3515. .name = MSM_DAILINK_NAME(Compress6),
  3516. .stream_name = "Compress6",
  3517. .cpu_dai_name = "MultiMedia13",
  3518. .platform_name = "msm-compress-dsp",
  3519. .dynamic = 1,
  3520. .dpcm_playback = 1,
  3521. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3522. SND_SOC_DPCM_TRIGGER_POST},
  3523. .codec_dai_name = "snd-soc-dummy-dai",
  3524. .codec_name = "snd-soc-dummy",
  3525. .ignore_suspend = 1,
  3526. .ignore_pmdown_time = 1,
  3527. /* this dainlink has playback support */
  3528. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  3529. },
  3530. {/* hw:x,27 */
  3531. .name = MSM_DAILINK_NAME(Compress7),
  3532. .stream_name = "Compress7",
  3533. .cpu_dai_name = "MultiMedia14",
  3534. .platform_name = "msm-compress-dsp",
  3535. .dynamic = 1,
  3536. .dpcm_playback = 1,
  3537. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3538. SND_SOC_DPCM_TRIGGER_POST},
  3539. .codec_dai_name = "snd-soc-dummy-dai",
  3540. .codec_name = "snd-soc-dummy",
  3541. .ignore_suspend = 1,
  3542. .ignore_pmdown_time = 1,
  3543. /* this dainlink has playback support */
  3544. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  3545. },
  3546. {/* hw:x,28 */
  3547. .name = MSM_DAILINK_NAME(Compress8),
  3548. .stream_name = "Compress8",
  3549. .cpu_dai_name = "MultiMedia15",
  3550. .platform_name = "msm-compress-dsp",
  3551. .dynamic = 1,
  3552. .dpcm_playback = 1,
  3553. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3554. SND_SOC_DPCM_TRIGGER_POST},
  3555. .codec_dai_name = "snd-soc-dummy-dai",
  3556. .codec_name = "snd-soc-dummy",
  3557. .ignore_suspend = 1,
  3558. .ignore_pmdown_time = 1,
  3559. /* this dainlink has playback support */
  3560. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  3561. },
  3562. {/* hw:x,29 */
  3563. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  3564. .stream_name = "MM_NOIRQ_2",
  3565. .cpu_dai_name = "MultiMedia16",
  3566. .platform_name = "msm-pcm-dsp-noirq",
  3567. .dynamic = 1,
  3568. .dpcm_playback = 1,
  3569. .dpcm_capture = 1,
  3570. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3571. SND_SOC_DPCM_TRIGGER_POST},
  3572. .codec_dai_name = "snd-soc-dummy-dai",
  3573. .codec_name = "snd-soc-dummy",
  3574. .ignore_suspend = 1,
  3575. .ignore_pmdown_time = 1,
  3576. /* this dainlink has playback support */
  3577. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  3578. },
  3579. {/* hw:x,30 */
  3580. .name = "CDC_DMA Hostless",
  3581. .stream_name = "CDC_DMA Hostless",
  3582. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  3583. .platform_name = "msm-pcm-hostless",
  3584. .dynamic = 1,
  3585. .dpcm_playback = 1,
  3586. .dpcm_capture = 1,
  3587. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3588. SND_SOC_DPCM_TRIGGER_POST},
  3589. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3590. .ignore_suspend = 1,
  3591. /* this dailink has playback support */
  3592. .ignore_pmdown_time = 1,
  3593. .codec_dai_name = "snd-soc-dummy-dai",
  3594. .codec_name = "snd-soc-dummy",
  3595. },
  3596. {/* hw:x,31 */
  3597. .name = "TX3_CDC_DMA Hostless",
  3598. .stream_name = "TX3_CDC_DMA Hostless",
  3599. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  3600. .platform_name = "msm-pcm-hostless",
  3601. .dynamic = 1,
  3602. .dpcm_capture = 1,
  3603. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3604. SND_SOC_DPCM_TRIGGER_POST},
  3605. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3606. .ignore_suspend = 1,
  3607. .codec_dai_name = "snd-soc-dummy-dai",
  3608. .codec_name = "snd-soc-dummy",
  3609. },
  3610. };
  3611. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  3612. {/* hw:x,37 */
  3613. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  3614. .stream_name = "WSA CDC DMA0 Capture",
  3615. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  3616. .platform_name = "msm-pcm-hostless",
  3617. .codec_name = "bolero_codec",
  3618. .codec_dai_name = "wsa_macro_vifeedback",
  3619. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  3620. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3621. .ignore_suspend = 1,
  3622. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3623. .ops = &msm_cdc_dma_be_ops,
  3624. },
  3625. };
  3626. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  3627. {
  3628. .name = MSM_DAILINK_NAME(ASM Loopback),
  3629. .stream_name = "MultiMedia6",
  3630. .cpu_dai_name = "MultiMedia6",
  3631. .platform_name = "msm-pcm-loopback",
  3632. .dynamic = 1,
  3633. .dpcm_playback = 1,
  3634. .dpcm_capture = 1,
  3635. .codec_dai_name = "snd-soc-dummy-dai",
  3636. .codec_name = "snd-soc-dummy",
  3637. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3638. SND_SOC_DPCM_TRIGGER_POST},
  3639. .ignore_suspend = 1,
  3640. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3641. .ignore_pmdown_time = 1,
  3642. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  3643. },
  3644. {
  3645. .name = "USB Audio Hostless",
  3646. .stream_name = "USB Audio Hostless",
  3647. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  3648. .platform_name = "msm-pcm-hostless",
  3649. .dynamic = 1,
  3650. .dpcm_playback = 1,
  3651. .dpcm_capture = 1,
  3652. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3653. SND_SOC_DPCM_TRIGGER_POST},
  3654. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3655. .ignore_suspend = 1,
  3656. .ignore_pmdown_time = 1,
  3657. .codec_dai_name = "snd-soc-dummy-dai",
  3658. .codec_name = "snd-soc-dummy",
  3659. },
  3660. {
  3661. .name = "SLIMBUS_7 Hostless",
  3662. .stream_name = "SLIMBUS_7 Hostless",
  3663. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  3664. .platform_name = "msm-pcm-hostless",
  3665. .dynamic = 1,
  3666. .dpcm_capture = 1,
  3667. .dpcm_playback = 1,
  3668. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3669. SND_SOC_DPCM_TRIGGER_POST},
  3670. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3671. .ignore_suspend = 1,
  3672. .ignore_pmdown_time = 1,
  3673. .codec_dai_name = "snd-soc-dummy-dai",
  3674. .codec_name = "snd-soc-dummy",
  3675. },
  3676. };
  3677. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  3678. /* Backend AFE DAI Links */
  3679. {
  3680. .name = LPASS_BE_AFE_PCM_RX,
  3681. .stream_name = "AFE Playback",
  3682. .cpu_dai_name = "msm-dai-q6-dev.224",
  3683. .platform_name = "msm-pcm-routing",
  3684. .codec_name = "msm-stub-codec.1",
  3685. .codec_dai_name = "msm-stub-rx",
  3686. .no_pcm = 1,
  3687. .dpcm_playback = 1,
  3688. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  3689. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3690. /* this dainlink has playback support */
  3691. .ignore_pmdown_time = 1,
  3692. .ignore_suspend = 1,
  3693. },
  3694. {
  3695. .name = LPASS_BE_AFE_PCM_TX,
  3696. .stream_name = "AFE Capture",
  3697. .cpu_dai_name = "msm-dai-q6-dev.225",
  3698. .platform_name = "msm-pcm-routing",
  3699. .codec_name = "msm-stub-codec.1",
  3700. .codec_dai_name = "msm-stub-tx",
  3701. .no_pcm = 1,
  3702. .dpcm_capture = 1,
  3703. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  3704. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3705. .ignore_suspend = 1,
  3706. },
  3707. /* Incall Record Uplink BACK END DAI Link */
  3708. {
  3709. .name = LPASS_BE_INCALL_RECORD_TX,
  3710. .stream_name = "Voice Uplink Capture",
  3711. .cpu_dai_name = "msm-dai-q6-dev.32772",
  3712. .platform_name = "msm-pcm-routing",
  3713. .codec_name = "msm-stub-codec.1",
  3714. .codec_dai_name = "msm-stub-tx",
  3715. .no_pcm = 1,
  3716. .dpcm_capture = 1,
  3717. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  3718. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3719. .ignore_suspend = 1,
  3720. },
  3721. /* Incall Record Downlink BACK END DAI Link */
  3722. {
  3723. .name = LPASS_BE_INCALL_RECORD_RX,
  3724. .stream_name = "Voice Downlink Capture",
  3725. .cpu_dai_name = "msm-dai-q6-dev.32771",
  3726. .platform_name = "msm-pcm-routing",
  3727. .codec_name = "msm-stub-codec.1",
  3728. .codec_dai_name = "msm-stub-tx",
  3729. .no_pcm = 1,
  3730. .dpcm_capture = 1,
  3731. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  3732. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3733. .ignore_suspend = 1,
  3734. },
  3735. /* Incall Music BACK END DAI Link */
  3736. {
  3737. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  3738. .stream_name = "Voice Farend Playback",
  3739. .cpu_dai_name = "msm-dai-q6-dev.32773",
  3740. .platform_name = "msm-pcm-routing",
  3741. .codec_name = "msm-stub-codec.1",
  3742. .codec_dai_name = "msm-stub-rx",
  3743. .no_pcm = 1,
  3744. .dpcm_playback = 1,
  3745. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  3746. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3747. .ignore_suspend = 1,
  3748. .ignore_pmdown_time = 1,
  3749. },
  3750. /* Incall Music 2 BACK END DAI Link */
  3751. {
  3752. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  3753. .stream_name = "Voice2 Farend Playback",
  3754. .cpu_dai_name = "msm-dai-q6-dev.32770",
  3755. .platform_name = "msm-pcm-routing",
  3756. .codec_name = "msm-stub-codec.1",
  3757. .codec_dai_name = "msm-stub-rx",
  3758. .no_pcm = 1,
  3759. .dpcm_playback = 1,
  3760. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  3761. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3762. .ignore_suspend = 1,
  3763. .ignore_pmdown_time = 1,
  3764. },
  3765. {
  3766. .name = LPASS_BE_USB_AUDIO_RX,
  3767. .stream_name = "USB Audio Playback",
  3768. .cpu_dai_name = "msm-dai-q6-dev.28672",
  3769. .platform_name = "msm-pcm-routing",
  3770. .codec_name = "msm-stub-codec.1",
  3771. .codec_dai_name = "msm-stub-rx",
  3772. .no_pcm = 1,
  3773. .dpcm_playback = 1,
  3774. .id = MSM_BACKEND_DAI_USB_RX,
  3775. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3776. .ignore_pmdown_time = 1,
  3777. .ignore_suspend = 1,
  3778. },
  3779. {
  3780. .name = LPASS_BE_USB_AUDIO_TX,
  3781. .stream_name = "USB Audio Capture",
  3782. .cpu_dai_name = "msm-dai-q6-dev.28673",
  3783. .platform_name = "msm-pcm-routing",
  3784. .codec_name = "msm-stub-codec.1",
  3785. .codec_dai_name = "msm-stub-tx",
  3786. .no_pcm = 1,
  3787. .dpcm_capture = 1,
  3788. .id = MSM_BACKEND_DAI_USB_TX,
  3789. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3790. .ignore_suspend = 1,
  3791. },
  3792. {
  3793. .name = LPASS_BE_PRI_TDM_RX_0,
  3794. .stream_name = "Primary TDM0 Playback",
  3795. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  3796. .platform_name = "msm-pcm-routing",
  3797. .codec_name = "msm-stub-codec.1",
  3798. .codec_dai_name = "msm-stub-rx",
  3799. .no_pcm = 1,
  3800. .dpcm_playback = 1,
  3801. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  3802. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3803. .ops = &kona_tdm_be_ops,
  3804. .ignore_suspend = 1,
  3805. .ignore_pmdown_time = 1,
  3806. },
  3807. {
  3808. .name = LPASS_BE_PRI_TDM_TX_0,
  3809. .stream_name = "Primary TDM0 Capture",
  3810. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  3811. .platform_name = "msm-pcm-routing",
  3812. .codec_name = "msm-stub-codec.1",
  3813. .codec_dai_name = "msm-stub-tx",
  3814. .no_pcm = 1,
  3815. .dpcm_capture = 1,
  3816. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  3817. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3818. .ops = &kona_tdm_be_ops,
  3819. .ignore_suspend = 1,
  3820. },
  3821. {
  3822. .name = LPASS_BE_SEC_TDM_RX_0,
  3823. .stream_name = "Secondary TDM0 Playback",
  3824. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  3825. .platform_name = "msm-pcm-routing",
  3826. .codec_name = "msm-stub-codec.1",
  3827. .codec_dai_name = "msm-stub-rx",
  3828. .no_pcm = 1,
  3829. .dpcm_playback = 1,
  3830. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  3831. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3832. .ops = &kona_tdm_be_ops,
  3833. .ignore_suspend = 1,
  3834. .ignore_pmdown_time = 1,
  3835. },
  3836. {
  3837. .name = LPASS_BE_SEC_TDM_TX_0,
  3838. .stream_name = "Secondary TDM0 Capture",
  3839. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  3840. .platform_name = "msm-pcm-routing",
  3841. .codec_name = "msm-stub-codec.1",
  3842. .codec_dai_name = "msm-stub-tx",
  3843. .no_pcm = 1,
  3844. .dpcm_capture = 1,
  3845. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  3846. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3847. .ops = &kona_tdm_be_ops,
  3848. .ignore_suspend = 1,
  3849. },
  3850. {
  3851. .name = LPASS_BE_TERT_TDM_RX_0,
  3852. .stream_name = "Tertiary TDM0 Playback",
  3853. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  3854. .platform_name = "msm-pcm-routing",
  3855. .codec_name = "msm-stub-codec.1",
  3856. .codec_dai_name = "msm-stub-rx",
  3857. .no_pcm = 1,
  3858. .dpcm_playback = 1,
  3859. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  3860. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3861. .ops = &kona_tdm_be_ops,
  3862. .ignore_suspend = 1,
  3863. .ignore_pmdown_time = 1,
  3864. },
  3865. {
  3866. .name = LPASS_BE_TERT_TDM_TX_0,
  3867. .stream_name = "Tertiary TDM0 Capture",
  3868. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  3869. .platform_name = "msm-pcm-routing",
  3870. .codec_name = "msm-stub-codec.1",
  3871. .codec_dai_name = "msm-stub-tx",
  3872. .no_pcm = 1,
  3873. .dpcm_capture = 1,
  3874. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  3875. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3876. .ops = &kona_tdm_be_ops,
  3877. .ignore_suspend = 1,
  3878. },
  3879. };
  3880. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  3881. {
  3882. .name = LPASS_BE_PRI_MI2S_RX,
  3883. .stream_name = "Primary MI2S Playback",
  3884. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  3885. .platform_name = "msm-pcm-routing",
  3886. .codec_name = "msm-stub-codec.1",
  3887. .codec_dai_name = "msm-stub-rx",
  3888. .no_pcm = 1,
  3889. .dpcm_playback = 1,
  3890. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  3891. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3892. .ops = &msm_mi2s_be_ops,
  3893. .ignore_suspend = 1,
  3894. .ignore_pmdown_time = 1,
  3895. },
  3896. {
  3897. .name = LPASS_BE_PRI_MI2S_TX,
  3898. .stream_name = "Primary MI2S Capture",
  3899. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  3900. .platform_name = "msm-pcm-routing",
  3901. .codec_name = "msm-stub-codec.1",
  3902. .codec_dai_name = "msm-stub-tx",
  3903. .no_pcm = 1,
  3904. .dpcm_capture = 1,
  3905. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  3906. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3907. .ops = &msm_mi2s_be_ops,
  3908. .ignore_suspend = 1,
  3909. },
  3910. {
  3911. .name = LPASS_BE_SEC_MI2S_RX,
  3912. .stream_name = "Secondary MI2S Playback",
  3913. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  3914. .platform_name = "msm-pcm-routing",
  3915. .codec_name = "msm-stub-codec.1",
  3916. .codec_dai_name = "msm-stub-rx",
  3917. .no_pcm = 1,
  3918. .dpcm_playback = 1,
  3919. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  3920. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3921. .ops = &msm_mi2s_be_ops,
  3922. .ignore_suspend = 1,
  3923. .ignore_pmdown_time = 1,
  3924. },
  3925. {
  3926. .name = LPASS_BE_SEC_MI2S_TX,
  3927. .stream_name = "Secondary MI2S Capture",
  3928. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  3929. .platform_name = "msm-pcm-routing",
  3930. .codec_name = "msm-stub-codec.1",
  3931. .codec_dai_name = "msm-stub-tx",
  3932. .no_pcm = 1,
  3933. .dpcm_capture = 1,
  3934. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  3935. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3936. .ops = &msm_mi2s_be_ops,
  3937. .ignore_suspend = 1,
  3938. },
  3939. {
  3940. .name = LPASS_BE_TERT_MI2S_RX,
  3941. .stream_name = "Tertiary MI2S Playback",
  3942. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  3943. .platform_name = "msm-pcm-routing",
  3944. .codec_name = "msm-stub-codec.1",
  3945. .codec_dai_name = "msm-stub-rx",
  3946. .no_pcm = 1,
  3947. .dpcm_playback = 1,
  3948. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  3949. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3950. .ops = &msm_mi2s_be_ops,
  3951. .ignore_suspend = 1,
  3952. .ignore_pmdown_time = 1,
  3953. },
  3954. {
  3955. .name = LPASS_BE_TERT_MI2S_TX,
  3956. .stream_name = "Tertiary MI2S Capture",
  3957. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  3958. .platform_name = "msm-pcm-routing",
  3959. .codec_name = "msm-stub-codec.1",
  3960. .codec_dai_name = "msm-stub-tx",
  3961. .no_pcm = 1,
  3962. .dpcm_capture = 1,
  3963. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  3964. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3965. .ops = &msm_mi2s_be_ops,
  3966. .ignore_suspend = 1,
  3967. },
  3968. };
  3969. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  3970. /* Primary AUX PCM Backend DAI Links */
  3971. {
  3972. .name = LPASS_BE_AUXPCM_RX,
  3973. .stream_name = "AUX PCM Playback",
  3974. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  3975. .platform_name = "msm-pcm-routing",
  3976. .codec_name = "msm-stub-codec.1",
  3977. .codec_dai_name = "msm-stub-rx",
  3978. .no_pcm = 1,
  3979. .dpcm_playback = 1,
  3980. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  3981. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3982. .ignore_pmdown_time = 1,
  3983. .ignore_suspend = 1,
  3984. },
  3985. {
  3986. .name = LPASS_BE_AUXPCM_TX,
  3987. .stream_name = "AUX PCM Capture",
  3988. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  3989. .platform_name = "msm-pcm-routing",
  3990. .codec_name = "msm-stub-codec.1",
  3991. .codec_dai_name = "msm-stub-tx",
  3992. .no_pcm = 1,
  3993. .dpcm_capture = 1,
  3994. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  3995. .be_hw_params_fixup = msm_be_hw_params_fixup,
  3996. .ignore_suspend = 1,
  3997. },
  3998. /* Secondary AUX PCM Backend DAI Links */
  3999. {
  4000. .name = LPASS_BE_SEC_AUXPCM_RX,
  4001. .stream_name = "Sec AUX PCM Playback",
  4002. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4003. .platform_name = "msm-pcm-routing",
  4004. .codec_name = "msm-stub-codec.1",
  4005. .codec_dai_name = "msm-stub-rx",
  4006. .no_pcm = 1,
  4007. .dpcm_playback = 1,
  4008. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4009. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4010. .ignore_pmdown_time = 1,
  4011. .ignore_suspend = 1,
  4012. },
  4013. {
  4014. .name = LPASS_BE_SEC_AUXPCM_TX,
  4015. .stream_name = "Sec AUX PCM Capture",
  4016. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4017. .platform_name = "msm-pcm-routing",
  4018. .codec_name = "msm-stub-codec.1",
  4019. .codec_dai_name = "msm-stub-tx",
  4020. .no_pcm = 1,
  4021. .dpcm_capture = 1,
  4022. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4023. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4024. .ignore_suspend = 1,
  4025. },
  4026. /* Tertiary AUX PCM Backend DAI Links */
  4027. {
  4028. .name = LPASS_BE_TERT_AUXPCM_RX,
  4029. .stream_name = "Tert AUX PCM Playback",
  4030. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4031. .platform_name = "msm-pcm-routing",
  4032. .codec_name = "msm-stub-codec.1",
  4033. .codec_dai_name = "msm-stub-rx",
  4034. .no_pcm = 1,
  4035. .dpcm_playback = 1,
  4036. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  4037. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4038. .ignore_suspend = 1,
  4039. },
  4040. {
  4041. .name = LPASS_BE_TERT_AUXPCM_TX,
  4042. .stream_name = "Tert AUX PCM Capture",
  4043. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4044. .platform_name = "msm-pcm-routing",
  4045. .codec_name = "msm-stub-codec.1",
  4046. .codec_dai_name = "msm-stub-tx",
  4047. .no_pcm = 1,
  4048. .dpcm_capture = 1,
  4049. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  4050. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4051. .ignore_suspend = 1,
  4052. },
  4053. };
  4054. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  4055. /* WSA CDC DMA Backend DAI Links */
  4056. {
  4057. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  4058. .stream_name = "WSA CDC DMA0 Playback",
  4059. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  4060. .platform_name = "msm-pcm-routing",
  4061. .codec_name = "bolero_codec",
  4062. .codec_dai_name = "wsa_macro_rx1",
  4063. .no_pcm = 1,
  4064. .dpcm_playback = 1,
  4065. .init = &msm_int_audrx_init,
  4066. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  4067. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4068. .ignore_pmdown_time = 1,
  4069. .ignore_suspend = 1,
  4070. .ops = &msm_cdc_dma_be_ops,
  4071. },
  4072. {
  4073. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  4074. .stream_name = "WSA CDC DMA1 Playback",
  4075. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  4076. .platform_name = "msm-pcm-routing",
  4077. .codec_name = "bolero_codec",
  4078. .codec_dai_name = "wsa_macro_rx_mix",
  4079. .no_pcm = 1,
  4080. .dpcm_playback = 1,
  4081. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  4082. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4083. .ignore_pmdown_time = 1,
  4084. .ignore_suspend = 1,
  4085. .ops = &msm_cdc_dma_be_ops,
  4086. },
  4087. {
  4088. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  4089. .stream_name = "WSA CDC DMA1 Capture",
  4090. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  4091. .platform_name = "msm-pcm-routing",
  4092. .codec_name = "bolero_codec",
  4093. .codec_dai_name = "wsa_macro_echo",
  4094. .no_pcm = 1,
  4095. .dpcm_capture = 1,
  4096. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  4097. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4098. .ignore_suspend = 1,
  4099. .ops = &msm_cdc_dma_be_ops,
  4100. },
  4101. };
  4102. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  4103. /* RX CDC DMA Backend DAI Links */
  4104. {
  4105. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  4106. .stream_name = "RX CDC DMA0 Playback",
  4107. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  4108. .platform_name = "msm-pcm-routing",
  4109. .codec_name = "bolero_codec",
  4110. .codec_dai_name = "rx_macro_rx1",
  4111. .no_pcm = 1,
  4112. .dpcm_playback = 1,
  4113. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  4114. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4115. .ignore_pmdown_time = 1,
  4116. .ignore_suspend = 1,
  4117. .ops = &msm_cdc_dma_be_ops,
  4118. },
  4119. {
  4120. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  4121. .stream_name = "RX CDC DMA1 Playback",
  4122. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  4123. .platform_name = "msm-pcm-routing",
  4124. .codec_name = "bolero_codec",
  4125. .codec_dai_name = "rx_macro_rx2",
  4126. .no_pcm = 1,
  4127. .dpcm_playback = 1,
  4128. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  4129. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4130. .ignore_pmdown_time = 1,
  4131. .ignore_suspend = 1,
  4132. .ops = &msm_cdc_dma_be_ops,
  4133. },
  4134. {
  4135. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  4136. .stream_name = "RX CDC DMA2 Playback",
  4137. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  4138. .platform_name = "msm-pcm-routing",
  4139. .codec_name = "bolero_codec",
  4140. .codec_dai_name = "rx_macro_rx3",
  4141. .no_pcm = 1,
  4142. .dpcm_playback = 1,
  4143. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  4144. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4145. .ignore_pmdown_time = 1,
  4146. .ignore_suspend = 1,
  4147. .ops = &msm_cdc_dma_be_ops,
  4148. },
  4149. {
  4150. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  4151. .stream_name = "RX CDC DMA3 Playback",
  4152. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  4153. .platform_name = "msm-pcm-routing",
  4154. .codec_name = "bolero_codec",
  4155. .codec_dai_name = "rx_macro_rx4",
  4156. .no_pcm = 1,
  4157. .dpcm_playback = 1,
  4158. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  4159. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4160. .ignore_pmdown_time = 1,
  4161. .ignore_suspend = 1,
  4162. .ops = &msm_cdc_dma_be_ops,
  4163. },
  4164. /* TX CDC DMA Backend DAI Links */
  4165. {
  4166. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  4167. .stream_name = "TX CDC DMA3 Capture",
  4168. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  4169. .platform_name = "msm-pcm-routing",
  4170. .codec_name = "bolero_codec",
  4171. .codec_dai_name = "tx_macro_tx1",
  4172. .no_pcm = 1,
  4173. .dpcm_capture = 1,
  4174. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  4175. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4176. .ignore_suspend = 1,
  4177. .ops = &msm_cdc_dma_be_ops,
  4178. },
  4179. {
  4180. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  4181. .stream_name = "TX CDC DMA4 Capture",
  4182. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  4183. .platform_name = "msm-pcm-routing",
  4184. .codec_name = "bolero_codec",
  4185. .codec_dai_name = "tx_macro_tx2",
  4186. .no_pcm = 1,
  4187. .dpcm_capture = 1,
  4188. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  4189. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4190. .ignore_suspend = 1,
  4191. .ops = &msm_cdc_dma_be_ops,
  4192. },
  4193. };
  4194. static struct snd_soc_dai_link msm_kona_dai_links[
  4195. ARRAY_SIZE(msm_common_dai_links) +
  4196. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  4197. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  4198. ARRAY_SIZE(msm_common_be_dai_links) +
  4199. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  4200. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  4201. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  4202. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  4203. static int msm_populate_dai_link_component_of_node(
  4204. struct snd_soc_card *card)
  4205. {
  4206. int i, index, ret = 0;
  4207. struct device *cdev = card->dev;
  4208. struct snd_soc_dai_link *dai_link = card->dai_link;
  4209. struct device_node *np;
  4210. if (!cdev) {
  4211. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  4212. return -ENODEV;
  4213. }
  4214. for (i = 0; i < card->num_links; i++) {
  4215. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  4216. continue;
  4217. /* populate platform_of_node for snd card dai links */
  4218. if (dai_link[i].platform_name &&
  4219. !dai_link[i].platform_of_node) {
  4220. index = of_property_match_string(cdev->of_node,
  4221. "asoc-platform-names",
  4222. dai_link[i].platform_name);
  4223. if (index < 0) {
  4224. dev_err(cdev, "%s: No match found for platform name: %s\n",
  4225. __func__, dai_link[i].platform_name);
  4226. ret = index;
  4227. goto err;
  4228. }
  4229. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  4230. index);
  4231. if (!np) {
  4232. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  4233. __func__, dai_link[i].platform_name,
  4234. index);
  4235. ret = -ENODEV;
  4236. goto err;
  4237. }
  4238. dai_link[i].platform_of_node = np;
  4239. dai_link[i].platform_name = NULL;
  4240. }
  4241. /* populate cpu_of_node for snd card dai links */
  4242. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  4243. index = of_property_match_string(cdev->of_node,
  4244. "asoc-cpu-names",
  4245. dai_link[i].cpu_dai_name);
  4246. if (index >= 0) {
  4247. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  4248. index);
  4249. if (!np) {
  4250. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  4251. __func__,
  4252. dai_link[i].cpu_dai_name);
  4253. ret = -ENODEV;
  4254. goto err;
  4255. }
  4256. dai_link[i].cpu_of_node = np;
  4257. dai_link[i].cpu_dai_name = NULL;
  4258. }
  4259. }
  4260. /* populate codec_of_node for snd card dai links */
  4261. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  4262. index = of_property_match_string(cdev->of_node,
  4263. "asoc-codec-names",
  4264. dai_link[i].codec_name);
  4265. if (index < 0)
  4266. continue;
  4267. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  4268. index);
  4269. if (!np) {
  4270. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  4271. __func__, dai_link[i].codec_name);
  4272. ret = -ENODEV;
  4273. goto err;
  4274. }
  4275. dai_link[i].codec_of_node = np;
  4276. dai_link[i].codec_name = NULL;
  4277. }
  4278. }
  4279. err:
  4280. return ret;
  4281. }
  4282. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  4283. {
  4284. int ret = -EINVAL;
  4285. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  4286. if (!component) {
  4287. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  4288. return ret;
  4289. }
  4290. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  4291. ARRAY_SIZE(msm_snd_controls));
  4292. if (ret < 0) {
  4293. dev_err(component->dev,
  4294. "%s: add_codec_controls failed, err = %d\n",
  4295. __func__, ret);
  4296. return ret;
  4297. }
  4298. return ret;
  4299. }
  4300. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  4301. struct snd_pcm_hw_params *params)
  4302. {
  4303. return 0;
  4304. }
  4305. static struct snd_soc_ops msm_stub_be_ops = {
  4306. .hw_params = msm_snd_stub_hw_params,
  4307. };
  4308. struct snd_soc_card snd_soc_card_stub_msm = {
  4309. .name = "kona-stub-snd-card",
  4310. };
  4311. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  4312. /* FrontEnd DAI Links */
  4313. {
  4314. .name = "MSMSTUB Media1",
  4315. .stream_name = "MultiMedia1",
  4316. .cpu_dai_name = "MultiMedia1",
  4317. .platform_name = "msm-pcm-dsp.0",
  4318. .dynamic = 1,
  4319. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  4320. .dpcm_playback = 1,
  4321. .dpcm_capture = 1,
  4322. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4323. SND_SOC_DPCM_TRIGGER_POST},
  4324. .codec_dai_name = "snd-soc-dummy-dai",
  4325. .codec_name = "snd-soc-dummy",
  4326. .ignore_suspend = 1,
  4327. /* this dainlink has playback support */
  4328. .ignore_pmdown_time = 1,
  4329. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  4330. },
  4331. };
  4332. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  4333. /* Backend DAI Links */
  4334. {
  4335. .name = LPASS_BE_AUXPCM_RX,
  4336. .stream_name = "AUX PCM Playback",
  4337. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4338. .platform_name = "msm-pcm-routing",
  4339. .codec_name = "msm-stub-codec.1",
  4340. .codec_dai_name = "msm-stub-rx",
  4341. .no_pcm = 1,
  4342. .dpcm_playback = 1,
  4343. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4344. .init = &msm_audrx_stub_init,
  4345. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4346. .ignore_pmdown_time = 1,
  4347. .ignore_suspend = 1,
  4348. .ops = &msm_stub_be_ops,
  4349. },
  4350. {
  4351. .name = LPASS_BE_AUXPCM_TX,
  4352. .stream_name = "AUX PCM Capture",
  4353. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4354. .platform_name = "msm-pcm-routing",
  4355. .codec_name = "msm-stub-codec.1",
  4356. .codec_dai_name = "msm-stub-tx",
  4357. .no_pcm = 1,
  4358. .dpcm_capture = 1,
  4359. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4360. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4361. .ignore_suspend = 1,
  4362. .ops = &msm_stub_be_ops,
  4363. },
  4364. };
  4365. static struct snd_soc_dai_link msm_stub_dai_links[
  4366. ARRAY_SIZE(msm_stub_fe_dai_links) +
  4367. ARRAY_SIZE(msm_stub_be_dai_links)];
  4368. static const struct of_device_id kona_asoc_machine_of_match[] = {
  4369. { .compatible = "qcom,kona-asoc-snd",
  4370. .data = "codec"},
  4371. { .compatible = "qcom,kona-asoc-snd-stub",
  4372. .data = "stub_codec"},
  4373. {},
  4374. };
  4375. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  4376. {
  4377. struct snd_soc_card *card = NULL;
  4378. struct snd_soc_dai_link *dailink = NULL;
  4379. int len_1 = 0;
  4380. int len_2 = 0;
  4381. int total_links = 0;
  4382. int rc = 0;
  4383. u32 mi2s_audio_intf = 0;
  4384. u32 auxpcm_audio_intf = 0;
  4385. const struct of_device_id *match;
  4386. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  4387. if (!match) {
  4388. dev_err(dev, "%s: No DT match found for sound card\n",
  4389. __func__);
  4390. return NULL;
  4391. }
  4392. if (!strcmp(match->data, "codec")) {
  4393. card = &snd_soc_card_kona_msm;
  4394. memcpy(msm_kona_dai_links + total_links,
  4395. msm_common_dai_links,
  4396. sizeof(msm_common_dai_links));
  4397. total_links += ARRAY_SIZE(msm_common_dai_links);
  4398. memcpy(msm_kona_dai_links + total_links,
  4399. msm_bolero_fe_dai_links,
  4400. sizeof(msm_bolero_fe_dai_links));
  4401. total_links +=
  4402. ARRAY_SIZE(msm_bolero_fe_dai_links);
  4403. memcpy(msm_kona_dai_links + total_links,
  4404. msm_common_misc_fe_dai_links,
  4405. sizeof(msm_common_misc_fe_dai_links));
  4406. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  4407. memcpy(msm_kona_dai_links + total_links,
  4408. msm_common_be_dai_links,
  4409. sizeof(msm_common_be_dai_links));
  4410. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  4411. memcpy(msm_kona_dai_links + total_links,
  4412. msm_wsa_cdc_dma_be_dai_links,
  4413. sizeof(msm_wsa_cdc_dma_be_dai_links));
  4414. total_links +=
  4415. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  4416. memcpy(msm_kona_dai_links + total_links,
  4417. msm_rx_tx_cdc_dma_be_dai_links,
  4418. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  4419. total_links +=
  4420. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  4421. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  4422. &mi2s_audio_intf);
  4423. if (rc) {
  4424. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  4425. __func__);
  4426. } else {
  4427. if (mi2s_audio_intf) {
  4428. memcpy(msm_kona_dai_links + total_links,
  4429. msm_mi2s_be_dai_links,
  4430. sizeof(msm_mi2s_be_dai_links));
  4431. total_links +=
  4432. ARRAY_SIZE(msm_mi2s_be_dai_links);
  4433. }
  4434. }
  4435. rc = of_property_read_u32(dev->of_node,
  4436. "qcom,auxpcm-audio-intf",
  4437. &auxpcm_audio_intf);
  4438. if (rc) {
  4439. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  4440. __func__);
  4441. } else {
  4442. if (auxpcm_audio_intf) {
  4443. memcpy(msm_kona_dai_links + total_links,
  4444. msm_auxpcm_be_dai_links,
  4445. sizeof(msm_auxpcm_be_dai_links));
  4446. total_links +=
  4447. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  4448. }
  4449. }
  4450. dailink = msm_kona_dai_links;
  4451. } else if(!strcmp(match->data, "stub_codec")) {
  4452. card = &snd_soc_card_stub_msm;
  4453. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  4454. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  4455. memcpy(msm_stub_dai_links,
  4456. msm_stub_fe_dai_links,
  4457. sizeof(msm_stub_fe_dai_links));
  4458. memcpy(msm_stub_dai_links + len_1,
  4459. msm_stub_be_dai_links,
  4460. sizeof(msm_stub_be_dai_links));
  4461. dailink = msm_stub_dai_links;
  4462. total_links = len_2;
  4463. }
  4464. if (card) {
  4465. card->dai_link = dailink;
  4466. card->num_links = total_links;
  4467. }
  4468. return card;
  4469. }
  4470. static int msm_wsa881x_init(struct snd_soc_component *component)
  4471. {
  4472. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4473. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  4474. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  4475. SPKR_L_BOOST, SPKR_L_VI};
  4476. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  4477. SPKR_R_BOOST, SPKR_R_VI};
  4478. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  4479. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  4480. struct msm_asoc_mach_data *pdata;
  4481. struct snd_soc_dapm_context *dapm;
  4482. struct snd_card *card;
  4483. struct snd_info_entry *entry;
  4484. int ret = 0;
  4485. if (!component) {
  4486. pr_err("%s component is NULL\n", __func__);
  4487. return -EINVAL;
  4488. }
  4489. card = component->card->snd_card;
  4490. dapm = snd_soc_component_get_dapm(component);
  4491. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  4492. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  4493. __func__, component->name);
  4494. wsa881x_set_channel_map(component, &spkleft_ports[0],
  4495. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4496. &ch_rate[0], &spkleft_port_types[0]);
  4497. if (dapm->component) {
  4498. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  4499. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  4500. }
  4501. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  4502. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  4503. __func__, component->name);
  4504. wsa881x_set_channel_map(component, &spkright_ports[0],
  4505. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  4506. &ch_rate[0], &spkright_port_types[0]);
  4507. if (dapm->component) {
  4508. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  4509. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  4510. }
  4511. } else {
  4512. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  4513. component->name);
  4514. ret = -EINVAL;
  4515. goto err;
  4516. }
  4517. pdata = snd_soc_card_get_drvdata(component->card);
  4518. if (!pdata->codec_root) {
  4519. entry = snd_info_create_subdir(card->module, "codecs",
  4520. card->proc_root);
  4521. if (!entry) {
  4522. pr_err("%s: Cannot create codecs module entry\n",
  4523. __func__);
  4524. ret = 0;
  4525. goto err;
  4526. }
  4527. pdata->codec_root = entry;
  4528. }
  4529. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  4530. component);
  4531. err:
  4532. return ret;
  4533. }
  4534. static int msm_aux_codec_init(struct snd_soc_component *component)
  4535. {
  4536. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  4537. int ret = 0;
  4538. struct snd_info_entry *entry;
  4539. struct snd_card *card = component->card->snd_card;
  4540. struct msm_asoc_mach_data *pdata;
  4541. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4542. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  4543. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4544. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4545. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  4546. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  4547. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  4548. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  4549. snd_soc_dapm_sync(dapm);
  4550. pdata = snd_soc_card_get_drvdata(component->card);
  4551. if (!pdata->codec_root) {
  4552. entry = snd_info_create_subdir(card->module, "codecs",
  4553. card->proc_root);
  4554. if (!entry) {
  4555. pr_err("%s: Cannot create codecs module entry\n",
  4556. __func__);
  4557. ret = 0;
  4558. goto codec_root_err;
  4559. }
  4560. pdata->codec_root = entry;
  4561. }
  4562. codec_root_err:
  4563. return ret;
  4564. }
  4565. static int msm_init_aux_dev(struct platform_device *pdev,
  4566. struct snd_soc_card *card)
  4567. {
  4568. struct device_node *wsa_of_node;
  4569. struct device_node *aux_codec_of_node;
  4570. u32 wsa_max_devs;
  4571. u32 wsa_dev_cnt;
  4572. u32 codec_aux_dev_cnt = 0;
  4573. u32 bolero_codec = 0;
  4574. int i;
  4575. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  4576. struct aux_codec_dev_info *aux_cdc_dev_info;
  4577. const char *auxdev_name_prefix[1];
  4578. char *dev_name_str = NULL;
  4579. int found = 0;
  4580. int codecs_found = 0;
  4581. int ret = 0;
  4582. /* Get maximum WSA device count for this platform */
  4583. ret = of_property_read_u32(pdev->dev.of_node,
  4584. "qcom,wsa-max-devs", &wsa_max_devs);
  4585. if (ret) {
  4586. dev_info(&pdev->dev,
  4587. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  4588. __func__, pdev->dev.of_node->full_name, ret);
  4589. wsa_max_devs = 0;
  4590. goto codec_aux_dev;
  4591. }
  4592. if (wsa_max_devs == 0) {
  4593. dev_warn(&pdev->dev,
  4594. "%s: Max WSA devices is 0 for this target?\n",
  4595. __func__);
  4596. goto codec_aux_dev;
  4597. }
  4598. /* Get count of WSA device phandles for this platform */
  4599. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  4600. "qcom,wsa-devs", NULL);
  4601. if (wsa_dev_cnt == -ENOENT) {
  4602. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  4603. __func__);
  4604. goto err;
  4605. } else if (wsa_dev_cnt <= 0) {
  4606. dev_err(&pdev->dev,
  4607. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  4608. __func__, wsa_dev_cnt);
  4609. ret = -EINVAL;
  4610. goto err;
  4611. }
  4612. /*
  4613. * Expect total phandles count to be NOT less than maximum possible
  4614. * WSA count. However, if it is less, then assign same value to
  4615. * max count as well.
  4616. */
  4617. if (wsa_dev_cnt < wsa_max_devs) {
  4618. dev_dbg(&pdev->dev,
  4619. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  4620. __func__, wsa_max_devs, wsa_dev_cnt);
  4621. wsa_max_devs = wsa_dev_cnt;
  4622. }
  4623. /* Make sure prefix string passed for each WSA device */
  4624. ret = of_property_count_strings(pdev->dev.of_node,
  4625. "qcom,wsa-aux-dev-prefix");
  4626. if (ret != wsa_dev_cnt) {
  4627. dev_err(&pdev->dev,
  4628. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  4629. __func__, wsa_dev_cnt, ret);
  4630. ret = -EINVAL;
  4631. goto err;
  4632. }
  4633. /*
  4634. * Alloc mem to store phandle and index info of WSA device, if already
  4635. * registered with ALSA core
  4636. */
  4637. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  4638. sizeof(struct msm_wsa881x_dev_info),
  4639. GFP_KERNEL);
  4640. if (!wsa881x_dev_info) {
  4641. ret = -ENOMEM;
  4642. goto err;
  4643. }
  4644. /*
  4645. * search and check whether all WSA devices are already
  4646. * registered with ALSA core or not. If found a node, store
  4647. * the node and the index in a local array of struct for later
  4648. * use.
  4649. */
  4650. for (i = 0; i < wsa_dev_cnt; i++) {
  4651. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  4652. "qcom,wsa-devs", i);
  4653. if (unlikely(!wsa_of_node)) {
  4654. /* we should not be here */
  4655. dev_err(&pdev->dev,
  4656. "%s: wsa dev node is not present\n",
  4657. __func__);
  4658. ret = -EINVAL;
  4659. goto err;
  4660. }
  4661. if (soc_find_component(wsa_of_node, NULL)) {
  4662. /* WSA device registered with ALSA core */
  4663. wsa881x_dev_info[found].of_node = wsa_of_node;
  4664. wsa881x_dev_info[found].index = i;
  4665. found++;
  4666. if (found == wsa_max_devs)
  4667. break;
  4668. }
  4669. }
  4670. if (found < wsa_max_devs) {
  4671. dev_dbg(&pdev->dev,
  4672. "%s: failed to find %d components. Found only %d\n",
  4673. __func__, wsa_max_devs, found);
  4674. return -EPROBE_DEFER;
  4675. }
  4676. dev_info(&pdev->dev,
  4677. "%s: found %d wsa881x devices registered with ALSA core\n",
  4678. __func__, found);
  4679. codec_aux_dev:
  4680. ret = of_property_read_u32(pdev->dev.of_node, "qcom,bolero-codec", &bolero_codec);
  4681. if (ret)
  4682. dev_dbg(&pdev->dev, "%s: No DT match for bolero codec\n", __func__);
  4683. if (bolero_codec) {
  4684. /* Get count of aux codec device phandles for this platform */
  4685. codec_aux_dev_cnt = of_count_phandle_with_args(
  4686. pdev->dev.of_node,
  4687. "qcom,codec-aux-devs", NULL);
  4688. if (codec_aux_dev_cnt == -ENOENT) {
  4689. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  4690. __func__);
  4691. goto err;
  4692. } else if (codec_aux_dev_cnt <= 0) {
  4693. dev_err(&pdev->dev,
  4694. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  4695. __func__, codec_aux_dev_cnt);
  4696. ret = -EINVAL;
  4697. goto err;
  4698. }
  4699. /*
  4700. * Alloc mem to store phandle and index info of aux codec
  4701. * if already registered with ALSA core
  4702. */
  4703. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  4704. sizeof(struct aux_codec_dev_info),
  4705. GFP_KERNEL);
  4706. if (!aux_cdc_dev_info) {
  4707. ret = -ENOMEM;
  4708. goto err;
  4709. }
  4710. /*
  4711. * search and check whether all aux codecs are already
  4712. * registered with ALSA core or not. If found a node, store
  4713. * the node and the index in a local array of struct for later
  4714. * use.
  4715. */
  4716. for (i = 0; i < codec_aux_dev_cnt; i++) {
  4717. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  4718. "qcom,codec-aux-devs", i);
  4719. if (unlikely(!aux_codec_of_node)) {
  4720. /* we should not be here */
  4721. dev_err(&pdev->dev,
  4722. "%s: aux codec dev node is not present\n",
  4723. __func__);
  4724. ret = -EINVAL;
  4725. goto err;
  4726. }
  4727. if (soc_find_component(aux_codec_of_node, NULL)) {
  4728. /* AUX codec registered with ALSA core */
  4729. aux_cdc_dev_info[codecs_found].of_node =
  4730. aux_codec_of_node;
  4731. aux_cdc_dev_info[codecs_found].index = i;
  4732. codecs_found++;
  4733. }
  4734. }
  4735. if (codecs_found < codec_aux_dev_cnt) {
  4736. dev_dbg(&pdev->dev,
  4737. "%s: failed to find %d components. Found only %d\n",
  4738. __func__, codec_aux_dev_cnt, codecs_found);
  4739. return -EPROBE_DEFER;
  4740. }
  4741. dev_info(&pdev->dev,
  4742. "%s: found %d AUX codecs registered with ALSA core\n",
  4743. __func__, codecs_found);
  4744. }
  4745. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  4746. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  4747. /* Alloc array of AUX devs struct */
  4748. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  4749. sizeof(struct snd_soc_aux_dev),
  4750. GFP_KERNEL);
  4751. if (!msm_aux_dev) {
  4752. ret = -ENOMEM;
  4753. goto err;
  4754. }
  4755. /* Alloc array of codec conf struct */
  4756. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  4757. sizeof(struct snd_soc_codec_conf),
  4758. GFP_KERNEL);
  4759. if (!msm_codec_conf) {
  4760. ret = -ENOMEM;
  4761. goto err;
  4762. }
  4763. for (i = 0; i < wsa_max_devs; i++) {
  4764. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  4765. GFP_KERNEL);
  4766. if (!dev_name_str) {
  4767. ret = -ENOMEM;
  4768. goto err;
  4769. }
  4770. ret = of_property_read_string_index(pdev->dev.of_node,
  4771. "qcom,wsa-aux-dev-prefix",
  4772. wsa881x_dev_info[i].index,
  4773. auxdev_name_prefix);
  4774. if (ret) {
  4775. dev_err(&pdev->dev,
  4776. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  4777. __func__, ret);
  4778. ret = -EINVAL;
  4779. goto err;
  4780. }
  4781. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  4782. msm_aux_dev[i].name = dev_name_str;
  4783. msm_aux_dev[i].codec_name = NULL;
  4784. msm_aux_dev[i].codec_of_node =
  4785. wsa881x_dev_info[i].of_node;
  4786. msm_aux_dev[i].init = msm_wsa881x_init;
  4787. msm_codec_conf[i].dev_name = NULL;
  4788. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  4789. msm_codec_conf[i].of_node =
  4790. wsa881x_dev_info[i].of_node;
  4791. }
  4792. for (i = 0; i < codec_aux_dev_cnt; i++) {
  4793. msm_aux_dev[wsa_max_devs + i].name = NULL;
  4794. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  4795. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  4796. aux_cdc_dev_info[i].of_node;
  4797. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  4798. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  4799. msm_codec_conf[wsa_max_devs + i].name_prefix =
  4800. NULL;
  4801. msm_codec_conf[wsa_max_devs + i].of_node =
  4802. aux_cdc_dev_info[i].of_node;
  4803. }
  4804. card->codec_conf = msm_codec_conf;
  4805. card->aux_dev = msm_aux_dev;
  4806. err:
  4807. return ret;
  4808. }
  4809. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  4810. {
  4811. int count = 0;
  4812. u32 mi2s_master_slave[MI2S_MAX];
  4813. int ret = 0;
  4814. for (count = 0; count < MI2S_MAX; count++) {
  4815. mutex_init(&mi2s_intf_conf[count].lock);
  4816. mi2s_intf_conf[count].ref_cnt = 0;
  4817. }
  4818. ret = of_property_read_u32_array(pdev->dev.of_node,
  4819. "qcom,msm-mi2s-master",
  4820. mi2s_master_slave, MI2S_MAX);
  4821. if (ret) {
  4822. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  4823. __func__);
  4824. } else {
  4825. for (count = 0; count < MI2S_MAX; count++) {
  4826. mi2s_intf_conf[count].msm_is_mi2s_master =
  4827. mi2s_master_slave[count];
  4828. }
  4829. }
  4830. }
  4831. static void msm_i2s_auxpcm_deinit(void)
  4832. {
  4833. int count = 0;
  4834. for (count = 0; count < MI2S_MAX; count++) {
  4835. mutex_destroy(&mi2s_intf_conf[count].lock);
  4836. mi2s_intf_conf[count].ref_cnt = 0;
  4837. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  4838. }
  4839. }
  4840. static int kona_ssr_enable(struct device *dev, void *data)
  4841. {
  4842. struct platform_device *pdev = to_platform_device(dev);
  4843. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4844. int ret = 0;
  4845. if (!card) {
  4846. dev_err(dev, "%s: card is NULL\n", __func__);
  4847. ret = -EINVAL;
  4848. goto err;
  4849. }
  4850. if (!strcmp(card->name, "kona-stub-snd-card")) {
  4851. /* TODO */
  4852. dev_dbg(dev, "%s: TODO \n", __func__);
  4853. }
  4854. snd_soc_card_change_online_state(card, 1);
  4855. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  4856. err:
  4857. return ret;
  4858. }
  4859. static void kona_ssr_disable(struct device *dev, void *data)
  4860. {
  4861. struct platform_device *pdev = to_platform_device(dev);
  4862. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4863. if (!card) {
  4864. dev_err(dev, "%s: card is NULL\n", __func__);
  4865. return;
  4866. }
  4867. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  4868. snd_soc_card_change_online_state(card, 0);
  4869. if (!strcmp(card->name, "kona-stub-snd-card")) {
  4870. /* TODO */
  4871. dev_dbg(dev, "%s: TODO \n", __func__);
  4872. }
  4873. }
  4874. static const struct snd_event_ops kona_ssr_ops = {
  4875. .enable = kona_ssr_enable,
  4876. .disable = kona_ssr_disable,
  4877. };
  4878. static int msm_audio_ssr_compare(struct device *dev, void *data)
  4879. {
  4880. struct device_node *node = data;
  4881. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  4882. __func__, dev->of_node, node);
  4883. return (dev->of_node && dev->of_node == node);
  4884. }
  4885. static int msm_audio_ssr_register(struct device *dev)
  4886. {
  4887. struct device_node *np = dev->of_node;
  4888. struct snd_event_clients *ssr_clients = NULL;
  4889. struct device_node *node = NULL;
  4890. int ret = 0;
  4891. int i = 0;
  4892. for (i = 0; ; i++) {
  4893. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  4894. if (!node)
  4895. break;
  4896. snd_event_mstr_add_client(&ssr_clients,
  4897. msm_audio_ssr_compare, node);
  4898. }
  4899. ret = snd_event_master_register(dev, &kona_ssr_ops,
  4900. ssr_clients, NULL);
  4901. if (!ret)
  4902. snd_event_notify(dev, SND_EVENT_UP);
  4903. return ret;
  4904. }
  4905. static int msm_asoc_machine_probe(struct platform_device *pdev)
  4906. {
  4907. struct snd_soc_card *card = NULL;
  4908. struct msm_asoc_mach_data *pdata = NULL;
  4909. const char *mbhc_audio_jack_type = NULL;
  4910. int ret = 0;
  4911. if (!pdev->dev.of_node) {
  4912. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  4913. return -EINVAL;
  4914. }
  4915. pdata = devm_kzalloc(&pdev->dev,
  4916. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  4917. if (!pdata)
  4918. return -ENOMEM;
  4919. card = populate_snd_card_dailinks(&pdev->dev);
  4920. if (!card) {
  4921. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  4922. ret = -EINVAL;
  4923. goto err;
  4924. }
  4925. card->dev = &pdev->dev;
  4926. platform_set_drvdata(pdev, card);
  4927. snd_soc_card_set_drvdata(card, pdata);
  4928. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  4929. if (ret) {
  4930. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  4931. __func__, ret);
  4932. goto err;
  4933. }
  4934. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  4935. if (ret) {
  4936. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  4937. __func__, ret);
  4938. goto err;
  4939. }
  4940. ret = msm_populate_dai_link_component_of_node(card);
  4941. if (ret) {
  4942. ret = -EPROBE_DEFER;
  4943. goto err;
  4944. }
  4945. ret = msm_init_aux_dev(pdev, card);
  4946. if (ret)
  4947. goto err;
  4948. ret = devm_snd_soc_register_card(&pdev->dev, card);
  4949. if (ret == -EPROBE_DEFER) {
  4950. if (codec_reg_done)
  4951. ret = -EINVAL;
  4952. goto err;
  4953. } else if (ret) {
  4954. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  4955. __func__, ret);
  4956. goto err;
  4957. }
  4958. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  4959. __func__, card->name);
  4960. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  4961. "qcom,hph-en1-gpio", 0);
  4962. if (!pdata->hph_en1_gpio_p) {
  4963. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  4964. __func__, "qcom,hph-en1-gpio",
  4965. pdev->dev.of_node->full_name);
  4966. }
  4967. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  4968. "qcom,hph-en0-gpio", 0);
  4969. if (!pdata->hph_en0_gpio_p) {
  4970. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  4971. __func__, "qcom,hph-en0-gpio",
  4972. pdev->dev.of_node->full_name);
  4973. }
  4974. ret = of_property_read_string(pdev->dev.of_node,
  4975. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  4976. if (ret) {
  4977. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  4978. __func__, "qcom,mbhc-audio-jack-type",
  4979. pdev->dev.of_node->full_name);
  4980. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  4981. } else {
  4982. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  4983. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  4984. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  4985. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  4986. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  4987. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  4988. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  4989. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  4990. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  4991. } else {
  4992. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  4993. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  4994. }
  4995. }
  4996. msm_i2s_auxpcm_init(pdev);
  4997. if (strcmp(card->name, "kona-mtp-snd-card")) {
  4998. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  4999. "qcom,cdc-dmic01-gpios",
  5000. 0);
  5001. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5002. "qcom,cdc-dmic23-gpios",
  5003. 0);
  5004. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5005. "qcom,cdc-dmic45-gpios",
  5006. 0);
  5007. }
  5008. ret = msm_audio_ssr_register(&pdev->dev);
  5009. if (ret)
  5010. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  5011. __func__, ret);
  5012. is_initial_boot = true;
  5013. return 0;
  5014. err:
  5015. devm_kfree(&pdev->dev, pdata);
  5016. return ret;
  5017. }
  5018. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5019. {
  5020. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5021. snd_event_master_deregister(&pdev->dev);
  5022. snd_soc_unregister_card(card);
  5023. msm_i2s_auxpcm_deinit();
  5024. return 0;
  5025. }
  5026. static struct platform_driver kona_asoc_machine_driver = {
  5027. .driver = {
  5028. .name = DRV_NAME,
  5029. .owner = THIS_MODULE,
  5030. .pm = &snd_soc_pm_ops,
  5031. .of_match_table = kona_asoc_machine_of_match,
  5032. },
  5033. .probe = msm_asoc_machine_probe,
  5034. .remove = msm_asoc_machine_remove,
  5035. };
  5036. module_platform_driver(kona_asoc_machine_driver);
  5037. MODULE_DESCRIPTION("ALSA SoC msm");
  5038. MODULE_LICENSE("GPL v2");
  5039. MODULE_ALIAS("platform:" DRV_NAME);
  5040. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);