main.c 128 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #include "smcinvoke.h"
  36. #include "smcinvoke_object.h"
  37. #include "IClientEnv.h"
  38. #define HW_STATE_UID 0x108
  39. #define HW_OP_GET_STATE 1
  40. #define HW_WIFI_UID 0x508
  41. #define FEATURE_NOT_SUPPORTED 12
  42. #define PERIPHERAL_NOT_FOUND 10
  43. #endif
  44. #define CNSS_DUMP_FORMAT_VER 0x11
  45. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  46. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  47. #define CNSS_DUMP_NAME "CNSS_WLAN"
  48. #define CNSS_DUMP_DESC_SIZE 0x1000
  49. #define CNSS_DUMP_SEG_VER 0x1
  50. #define FILE_SYSTEM_READY 1
  51. #define FW_READY_TIMEOUT 20000
  52. #define FW_ASSERT_TIMEOUT 5000
  53. #define CNSS_EVENT_PENDING 2989
  54. #define POWER_RESET_MIN_DELAY_MS 100
  55. #define CNSS_QUIRKS_DEFAULT 0
  56. #ifdef CONFIG_CNSS_EMULATION
  57. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  58. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  59. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  60. #else
  61. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  62. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  63. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  64. #endif
  65. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  66. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  67. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  68. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  69. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  70. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  71. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  72. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  73. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  74. enum cnss_cal_db_op {
  75. CNSS_CAL_DB_UPLOAD,
  76. CNSS_CAL_DB_DOWNLOAD,
  77. CNSS_CAL_DB_INVALID_OP,
  78. };
  79. enum cnss_recovery_type {
  80. CNSS_WLAN_RECOVERY = 0x1,
  81. CNSS_PCSS_RECOVERY = 0x2,
  82. };
  83. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  84. #define CNSS_MAX_DEV_NUM 2
  85. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  86. static int plat_env_count;
  87. #else
  88. static struct cnss_plat_data *plat_env;
  89. #endif
  90. static bool cnss_allow_driver_loading;
  91. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  92. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  93. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  94. };
  95. static struct cnss_fw_files FW_FILES_DEFAULT = {
  96. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  97. "utfbd.bin", "epping.bin", "evicted.bin"
  98. };
  99. struct cnss_driver_event {
  100. struct list_head list;
  101. enum cnss_driver_event_type type;
  102. bool sync;
  103. struct completion complete;
  104. int ret;
  105. void *data;
  106. };
  107. bool cnss_check_driver_loading_allowed(void)
  108. {
  109. return cnss_allow_driver_loading;
  110. }
  111. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  112. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  113. struct cnss_plat_data *plat_priv)
  114. {
  115. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  116. if (plat_priv) {
  117. plat_priv->plat_idx = plat_env_count;
  118. plat_env[plat_priv->plat_idx] = plat_priv;
  119. plat_env_count++;
  120. }
  121. }
  122. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  123. *plat_dev)
  124. {
  125. int i;
  126. if (!plat_dev)
  127. return NULL;
  128. for (i = 0; i < plat_env_count; i++) {
  129. if (plat_env[i]->plat_dev == plat_dev)
  130. return plat_env[i];
  131. }
  132. return NULL;
  133. }
  134. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  135. {
  136. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  137. plat_env[plat_priv->plat_idx] = NULL;
  138. plat_env_count--;
  139. }
  140. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  141. {
  142. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  143. "wlan_%d", plat_priv->plat_idx);
  144. return 0;
  145. }
  146. static int cnss_plat_env_available(void)
  147. {
  148. int ret = 0;
  149. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  150. cnss_pr_err("ERROR: No space to store plat_priv\n");
  151. ret = -ENOMEM;
  152. }
  153. return ret;
  154. }
  155. int cnss_get_plat_env_count(void)
  156. {
  157. return plat_env_count;
  158. }
  159. struct cnss_plat_data *cnss_get_plat_env(int index)
  160. {
  161. return plat_env[index];
  162. }
  163. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  164. {
  165. int i;
  166. for (i = 0; i < plat_env_count; i++) {
  167. if (plat_env[i]->rc_num == rc_num)
  168. return plat_env[i];
  169. }
  170. return NULL;
  171. }
  172. static inline int
  173. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  174. {
  175. return of_property_read_u32(plat_priv->dev_node,
  176. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  177. }
  178. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  179. {
  180. int ret = 0;
  181. ret = cnss_get_qrtr_node_id(plat_priv);
  182. if (ret) {
  183. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  184. plat_priv->qrtr_node_id = 0;
  185. plat_priv->wlfw_service_instance_id = 0;
  186. } else {
  187. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  188. QRTR_NODE_FW_ID_BASE;
  189. cnss_pr_dbg("service_instance_id=0x%x\n",
  190. plat_priv->wlfw_service_instance_id);
  191. }
  192. }
  193. static inline int
  194. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  195. {
  196. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  197. "qcom,pld_bus_ops_name",
  198. &plat_priv->pld_bus_ops_name);
  199. }
  200. #else
  201. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  202. struct cnss_plat_data *plat_priv)
  203. {
  204. plat_env = plat_priv;
  205. }
  206. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  207. {
  208. return plat_env;
  209. }
  210. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  211. {
  212. plat_env = NULL;
  213. }
  214. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  215. {
  216. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  217. "wlan");
  218. return 0;
  219. }
  220. static int cnss_plat_env_available(void)
  221. {
  222. return 0;
  223. }
  224. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  225. {
  226. return cnss_bus_dev_to_plat_priv(NULL);
  227. }
  228. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  229. {
  230. }
  231. static int
  232. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  233. {
  234. return 0;
  235. }
  236. #endif
  237. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  238. {
  239. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  240. "qcom,no-bwscale");
  241. }
  242. static inline int
  243. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  244. {
  245. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  246. "qcom,wlan-rc-num", &plat_priv->rc_num);
  247. }
  248. bool cnss_is_dual_wlan_enabled(void)
  249. {
  250. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  251. }
  252. /**
  253. * cnss_get_mem_seg_count - Get segment count of memory
  254. * @type: memory type
  255. * @seg: segment count
  256. *
  257. * Return: 0 on success, negative value on failure
  258. */
  259. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  260. {
  261. struct cnss_plat_data *plat_priv;
  262. plat_priv = cnss_get_plat_priv(NULL);
  263. if (!plat_priv)
  264. return -ENODEV;
  265. switch (type) {
  266. case CNSS_REMOTE_MEM_TYPE_FW:
  267. *seg = plat_priv->fw_mem_seg_len;
  268. break;
  269. case CNSS_REMOTE_MEM_TYPE_QDSS:
  270. *seg = plat_priv->qdss_mem_seg_len;
  271. break;
  272. default:
  273. return -EINVAL;
  274. }
  275. return 0;
  276. }
  277. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  278. /**
  279. * cnss_get_wifi_kobject -return wifi kobject
  280. * Return: Null, to maintain driver comnpatibilty
  281. */
  282. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  283. {
  284. struct cnss_plat_data *plat_priv;
  285. plat_priv = cnss_get_plat_priv(NULL);
  286. if (!plat_priv)
  287. return NULL;
  288. return plat_priv->wifi_kobj;
  289. }
  290. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  291. /**
  292. * cnss_get_mem_segment_info - Get memory info of different type
  293. * @type: memory type
  294. * @segment: array to save the segment info
  295. * @seg: segment count
  296. *
  297. * Return: 0 on success, negative value on failure
  298. */
  299. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  300. struct cnss_mem_segment segment[],
  301. u32 segment_count)
  302. {
  303. struct cnss_plat_data *plat_priv;
  304. u32 i;
  305. plat_priv = cnss_get_plat_priv(NULL);
  306. if (!plat_priv)
  307. return -ENODEV;
  308. switch (type) {
  309. case CNSS_REMOTE_MEM_TYPE_FW:
  310. if (segment_count > plat_priv->fw_mem_seg_len)
  311. segment_count = plat_priv->fw_mem_seg_len;
  312. for (i = 0; i < segment_count; i++) {
  313. segment[i].size = plat_priv->fw_mem[i].size;
  314. segment[i].va = plat_priv->fw_mem[i].va;
  315. segment[i].pa = plat_priv->fw_mem[i].pa;
  316. }
  317. break;
  318. case CNSS_REMOTE_MEM_TYPE_QDSS:
  319. if (segment_count > plat_priv->qdss_mem_seg_len)
  320. segment_count = plat_priv->qdss_mem_seg_len;
  321. for (i = 0; i < segment_count; i++) {
  322. segment[i].size = plat_priv->qdss_mem[i].size;
  323. segment[i].va = plat_priv->qdss_mem[i].va;
  324. segment[i].pa = plat_priv->qdss_mem[i].pa;
  325. }
  326. break;
  327. default:
  328. return -EINVAL;
  329. }
  330. return 0;
  331. }
  332. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  333. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  334. {
  335. struct device_node *audio_ion_node;
  336. struct platform_device *audio_ion_pdev;
  337. audio_ion_node = of_find_compatible_node(NULL, NULL,
  338. "qcom,msm-audio-ion");
  339. if (!audio_ion_node) {
  340. cnss_pr_err("Unable to get Audio ion node");
  341. return -EINVAL;
  342. }
  343. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  344. of_node_put(audio_ion_node);
  345. if (!audio_ion_pdev) {
  346. cnss_pr_err("Unable to get Audio ion platform device");
  347. return -EINVAL;
  348. }
  349. plat_priv->audio_iommu_domain =
  350. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  351. put_device(&audio_ion_pdev->dev);
  352. if (!plat_priv->audio_iommu_domain) {
  353. cnss_pr_err("Unable to get Audio ion iommu domain");
  354. return -EINVAL;
  355. }
  356. return 0;
  357. }
  358. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  359. enum cnss_feature_v01 feature)
  360. {
  361. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  362. return -EINVAL;
  363. plat_priv->feature_list |= 1 << feature;
  364. return 0;
  365. }
  366. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  367. enum cnss_feature_v01 feature)
  368. {
  369. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  370. return -EINVAL;
  371. plat_priv->feature_list &= ~(1 << feature);
  372. return 0;
  373. }
  374. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  375. u64 *feature_list)
  376. {
  377. if (unlikely(!plat_priv))
  378. return -EINVAL;
  379. *feature_list = plat_priv->feature_list;
  380. return 0;
  381. }
  382. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  383. {
  384. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  385. return;
  386. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  387. plat_priv->driver_state,
  388. atomic_read(&plat_priv->pm_count));
  389. pm_stay_awake(&plat_priv->plat_dev->dev);
  390. }
  391. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  392. {
  393. int r = atomic_dec_return(&plat_priv->pm_count);
  394. WARN_ON(r < 0);
  395. if (r != 0)
  396. return;
  397. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  398. plat_priv->driver_state,
  399. atomic_read(&plat_priv->pm_count));
  400. pm_relax(&plat_priv->plat_dev->dev);
  401. }
  402. int cnss_get_fw_files_for_target(struct device *dev,
  403. struct cnss_fw_files *pfw_files,
  404. u32 target_type, u32 target_version)
  405. {
  406. if (!pfw_files)
  407. return -ENODEV;
  408. switch (target_version) {
  409. case QCA6174_REV3_VERSION:
  410. case QCA6174_REV3_2_VERSION:
  411. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  412. break;
  413. default:
  414. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  415. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  416. target_type, target_version);
  417. break;
  418. }
  419. return 0;
  420. }
  421. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  422. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  423. {
  424. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  425. if (!plat_priv)
  426. return -ENODEV;
  427. if (!cap)
  428. return -EINVAL;
  429. *cap = plat_priv->cap;
  430. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  431. return 0;
  432. }
  433. EXPORT_SYMBOL(cnss_get_platform_cap);
  434. /**
  435. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  436. * @dev: Device
  437. * @fw_cap: FW Capability which needs to be checked
  438. *
  439. * Return: TRUE if supported, FALSE on failure or if not supported
  440. */
  441. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  442. {
  443. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  444. bool is_supported = false;
  445. if (!plat_priv)
  446. return is_supported;
  447. if (!plat_priv->fw_caps)
  448. return is_supported;
  449. switch (fw_cap) {
  450. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  451. is_supported = !!(plat_priv->fw_caps &
  452. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  453. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  454. is_supported = false;
  455. break;
  456. default:
  457. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  458. }
  459. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  460. is_supported ? "supported" : "not supported");
  461. return is_supported;
  462. }
  463. EXPORT_SYMBOL(cnss_get_fw_cap);
  464. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  465. {
  466. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  467. if (!plat_priv)
  468. return;
  469. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  470. }
  471. EXPORT_SYMBOL(cnss_request_pm_qos);
  472. void cnss_remove_pm_qos(struct device *dev)
  473. {
  474. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  475. if (!plat_priv)
  476. return;
  477. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  478. }
  479. EXPORT_SYMBOL(cnss_remove_pm_qos);
  480. int cnss_wlan_enable(struct device *dev,
  481. struct cnss_wlan_enable_cfg *config,
  482. enum cnss_driver_mode mode,
  483. const char *host_version)
  484. {
  485. int ret = 0;
  486. struct cnss_plat_data *plat_priv;
  487. if (!dev) {
  488. cnss_pr_err("Invalid dev pointer\n");
  489. return -EINVAL;
  490. }
  491. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  492. if (!plat_priv)
  493. return -ENODEV;
  494. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  495. return 0;
  496. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  497. return 0;
  498. if (!config || !host_version) {
  499. cnss_pr_err("Invalid config or host_version pointer\n");
  500. return -EINVAL;
  501. }
  502. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  503. mode, config, host_version);
  504. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  505. goto skip_cfg;
  506. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  507. config->send_msi_ce = true;
  508. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  509. if (ret)
  510. goto out;
  511. skip_cfg:
  512. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  513. out:
  514. return ret;
  515. }
  516. EXPORT_SYMBOL(cnss_wlan_enable);
  517. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  518. {
  519. int ret = 0;
  520. struct cnss_plat_data *plat_priv;
  521. if (!dev) {
  522. cnss_pr_err("Invalid dev pointer\n");
  523. return -EINVAL;
  524. }
  525. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  526. if (!plat_priv)
  527. return -ENODEV;
  528. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  529. return 0;
  530. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  531. return 0;
  532. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  533. cnss_bus_free_qdss_mem(plat_priv);
  534. return ret;
  535. }
  536. EXPORT_SYMBOL(cnss_wlan_disable);
  537. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  538. dma_addr_t iova, size_t size)
  539. {
  540. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  541. uint32_t page_offset;
  542. if (!plat_priv)
  543. return -ENODEV;
  544. if (!plat_priv->audio_iommu_domain)
  545. return -EINVAL;
  546. page_offset = iova & (PAGE_SIZE - 1);
  547. if (page_offset + size > PAGE_SIZE)
  548. size += PAGE_SIZE;
  549. iova -= page_offset;
  550. paddr -= page_offset;
  551. return iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  552. roundup(size, PAGE_SIZE), IOMMU_READ | IOMMU_WRITE |
  553. IOMMU_CACHE);
  554. }
  555. EXPORT_SYMBOL(cnss_audio_smmu_map);
  556. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  557. {
  558. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  559. uint32_t page_offset;
  560. if (!plat_priv)
  561. return;
  562. if (!plat_priv->audio_iommu_domain)
  563. return;
  564. page_offset = iova & (PAGE_SIZE - 1);
  565. if (page_offset + size > PAGE_SIZE)
  566. size += PAGE_SIZE;
  567. iova -= page_offset;
  568. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  569. roundup(size, PAGE_SIZE));
  570. }
  571. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  572. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  573. u32 data_len, u8 *output)
  574. {
  575. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  576. int ret = 0;
  577. if (!plat_priv) {
  578. cnss_pr_err("plat_priv is NULL!\n");
  579. return -EINVAL;
  580. }
  581. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  582. return 0;
  583. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  584. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  585. plat_priv->driver_state);
  586. ret = -EINVAL;
  587. goto out;
  588. }
  589. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  590. data_len, output);
  591. out:
  592. return ret;
  593. }
  594. EXPORT_SYMBOL(cnss_athdiag_read);
  595. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  596. u32 data_len, u8 *input)
  597. {
  598. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  599. int ret = 0;
  600. if (!plat_priv) {
  601. cnss_pr_err("plat_priv is NULL!\n");
  602. return -EINVAL;
  603. }
  604. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  605. return 0;
  606. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  607. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  608. plat_priv->driver_state);
  609. ret = -EINVAL;
  610. goto out;
  611. }
  612. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  613. data_len, input);
  614. out:
  615. return ret;
  616. }
  617. EXPORT_SYMBOL(cnss_athdiag_write);
  618. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  619. {
  620. struct cnss_plat_data *plat_priv;
  621. if (!dev) {
  622. cnss_pr_err("Invalid dev pointer\n");
  623. return -EINVAL;
  624. }
  625. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  626. if (!plat_priv)
  627. return -ENODEV;
  628. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  629. return 0;
  630. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  631. }
  632. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  633. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  634. {
  635. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  636. if (!plat_priv)
  637. return -EINVAL;
  638. if (!plat_priv->fw_pcie_gen_switch) {
  639. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  640. return -EOPNOTSUPP;
  641. }
  642. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  643. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  644. return -EINVAL;
  645. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  646. plat_priv->pcie_gen_speed = pcie_gen_speed;
  647. return 0;
  648. }
  649. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  650. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  651. {
  652. int ret = 0;
  653. if (!plat_priv)
  654. return -ENODEV;
  655. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  656. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  657. if (ret)
  658. goto out;
  659. if (plat_priv->hds_enabled)
  660. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  661. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  662. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  663. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  664. cnss_wlfw_ini_file_send_sync(plat_priv, WLFW_CONN_ROAM_INI_V01);
  665. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  666. plat_priv->ctrl_params.bdf_type);
  667. if (ret)
  668. goto out;
  669. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  670. return 0;
  671. ret = cnss_bus_load_m3(plat_priv);
  672. if (ret)
  673. goto out;
  674. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  675. if (ret)
  676. goto out;
  677. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  678. return 0;
  679. out:
  680. return ret;
  681. }
  682. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  683. {
  684. int ret = 0;
  685. if (!plat_priv->antenna) {
  686. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  687. if (ret)
  688. goto out;
  689. }
  690. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  691. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  692. if (ret)
  693. goto out;
  694. }
  695. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  696. if (ret)
  697. goto out;
  698. return 0;
  699. out:
  700. return ret;
  701. }
  702. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  703. {
  704. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  705. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  706. }
  707. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  708. {
  709. u32 i;
  710. int ret = 0;
  711. struct cnss_plat_ipc_daemon_config *cfg;
  712. ret = cnss_qmi_get_dms_mac(plat_priv);
  713. if (ret == 0 && plat_priv->dms.mac_valid)
  714. goto qmi_send;
  715. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  716. * Thus assert on failure to get MAC from DMS even after retries
  717. */
  718. if (plat_priv->use_nv_mac) {
  719. /* Check if Daemon says platform support DMS MAC provisioning */
  720. cfg = cnss_plat_ipc_qmi_daemon_config();
  721. if (cfg) {
  722. if (!cfg->dms_mac_addr_supported) {
  723. cnss_pr_err("DMS MAC address not supported\n");
  724. CNSS_ASSERT(0);
  725. return -EINVAL;
  726. }
  727. }
  728. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  729. if (plat_priv->dms.mac_valid)
  730. break;
  731. ret = cnss_qmi_get_dms_mac(plat_priv);
  732. if (ret == 0)
  733. break;
  734. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  735. }
  736. if (!plat_priv->dms.mac_valid) {
  737. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  738. CNSS_ASSERT(0);
  739. return -EINVAL;
  740. }
  741. }
  742. qmi_send:
  743. if (plat_priv->dms.mac_valid)
  744. ret =
  745. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  746. ARRAY_SIZE(plat_priv->dms.mac));
  747. return ret;
  748. }
  749. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  750. enum cnss_cal_db_op op, u32 *size)
  751. {
  752. int ret = 0;
  753. u32 timeout = cnss_get_timeout(plat_priv,
  754. CNSS_TIMEOUT_DAEMON_CONNECTION);
  755. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  756. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  757. if (op >= CNSS_CAL_DB_INVALID_OP)
  758. return -EINVAL;
  759. if (!plat_priv->cbc_file_download) {
  760. cnss_pr_info("CAL DB file not required as per BDF\n");
  761. return 0;
  762. }
  763. if (*size == 0) {
  764. cnss_pr_err("Invalid cal file size\n");
  765. return -EINVAL;
  766. }
  767. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  768. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  769. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  770. msecs_to_jiffies(timeout));
  771. if (!ret) {
  772. cnss_pr_err("Daemon not yet connected\n");
  773. CNSS_ASSERT(0);
  774. return ret;
  775. }
  776. }
  777. if (!plat_priv->cal_mem->va) {
  778. cnss_pr_err("CAL DB Memory not setup for FW\n");
  779. return -EINVAL;
  780. }
  781. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  782. if (op == CNSS_CAL_DB_DOWNLOAD) {
  783. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  784. ret = cnss_plat_ipc_qmi_file_download(client_id,
  785. CNSS_CAL_DB_FILE_NAME,
  786. plat_priv->cal_mem->va,
  787. size);
  788. } else {
  789. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  790. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  791. CNSS_CAL_DB_FILE_NAME,
  792. plat_priv->cal_mem->va,
  793. *size);
  794. }
  795. if (ret)
  796. cnss_pr_err("Cal DB file %s %s failure\n",
  797. CNSS_CAL_DB_FILE_NAME,
  798. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  799. else
  800. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  801. CNSS_CAL_DB_FILE_NAME,
  802. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  803. *size);
  804. return ret;
  805. }
  806. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  807. {
  808. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  809. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  810. return -EINVAL;
  811. }
  812. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  813. &plat_priv->cal_file_size);
  814. }
  815. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  816. u32 *cal_file_size)
  817. {
  818. /* To download pass the total size of cal DB mem allocated.
  819. * After cal file is download to mem, its size is updated in
  820. * return pointer
  821. */
  822. *cal_file_size = plat_priv->cal_mem->size;
  823. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  824. cal_file_size);
  825. }
  826. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  827. {
  828. int ret = 0;
  829. u32 cal_file_size = 0;
  830. if (!plat_priv)
  831. return -ENODEV;
  832. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  833. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  834. return -EINVAL;
  835. }
  836. cnss_pr_dbg("Processing FW Init Done..\n");
  837. del_timer(&plat_priv->fw_boot_timer);
  838. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  839. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  840. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  841. cnss_send_subsys_restart_level_msg(plat_priv);
  842. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  843. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  844. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  845. }
  846. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  847. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  848. CNSS_WALTEST);
  849. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  850. cnss_request_antenna_sharing(plat_priv);
  851. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  852. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  853. plat_priv->cal_time = jiffies;
  854. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  855. CNSS_CALIBRATION);
  856. } else {
  857. ret = cnss_setup_dms_mac(plat_priv);
  858. ret = cnss_bus_call_driver_probe(plat_priv);
  859. }
  860. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  861. goto out;
  862. else if (ret)
  863. goto shutdown;
  864. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  865. return 0;
  866. shutdown:
  867. cnss_bus_dev_shutdown(plat_priv);
  868. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  869. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  870. out:
  871. return ret;
  872. }
  873. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  874. {
  875. switch (type) {
  876. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  877. return "SERVER_ARRIVE";
  878. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  879. return "SERVER_EXIT";
  880. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  881. return "REQUEST_MEM";
  882. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  883. return "FW_MEM_READY";
  884. case CNSS_DRIVER_EVENT_FW_READY:
  885. return "FW_READY";
  886. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  887. return "COLD_BOOT_CAL_START";
  888. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  889. return "COLD_BOOT_CAL_DONE";
  890. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  891. return "REGISTER_DRIVER";
  892. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  893. return "UNREGISTER_DRIVER";
  894. case CNSS_DRIVER_EVENT_RECOVERY:
  895. return "RECOVERY";
  896. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  897. return "FORCE_FW_ASSERT";
  898. case CNSS_DRIVER_EVENT_POWER_UP:
  899. return "POWER_UP";
  900. case CNSS_DRIVER_EVENT_POWER_DOWN:
  901. return "POWER_DOWN";
  902. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  903. return "IDLE_RESTART";
  904. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  905. return "IDLE_SHUTDOWN";
  906. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  907. return "IMS_WFC_CALL_IND";
  908. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  909. return "WLFW_TWC_CFG_IND";
  910. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  911. return "QDSS_TRACE_REQ_MEM";
  912. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  913. return "FW_MEM_FILE_SAVE";
  914. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  915. return "QDSS_TRACE_FREE";
  916. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  917. return "QDSS_TRACE_REQ_DATA";
  918. case CNSS_DRIVER_EVENT_MAX:
  919. return "EVENT_MAX";
  920. }
  921. return "UNKNOWN";
  922. };
  923. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  924. enum cnss_driver_event_type type,
  925. u32 flags, void *data)
  926. {
  927. struct cnss_driver_event *event;
  928. unsigned long irq_flags;
  929. int gfp = GFP_KERNEL;
  930. int ret = 0;
  931. if (!plat_priv)
  932. return -ENODEV;
  933. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  934. cnss_driver_event_to_str(type), type,
  935. flags ? "-sync" : "", plat_priv->driver_state, flags);
  936. if (type >= CNSS_DRIVER_EVENT_MAX) {
  937. cnss_pr_err("Invalid Event type: %d, can't post", type);
  938. return -EINVAL;
  939. }
  940. if (in_interrupt() || irqs_disabled())
  941. gfp = GFP_ATOMIC;
  942. event = kzalloc(sizeof(*event), gfp);
  943. if (!event)
  944. return -ENOMEM;
  945. cnss_pm_stay_awake(plat_priv);
  946. event->type = type;
  947. event->data = data;
  948. init_completion(&event->complete);
  949. event->ret = CNSS_EVENT_PENDING;
  950. event->sync = !!(flags & CNSS_EVENT_SYNC);
  951. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  952. list_add_tail(&event->list, &plat_priv->event_list);
  953. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  954. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  955. if (!(flags & CNSS_EVENT_SYNC))
  956. goto out;
  957. if (flags & CNSS_EVENT_UNKILLABLE)
  958. wait_for_completion(&event->complete);
  959. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  960. ret = wait_for_completion_killable(&event->complete);
  961. else
  962. ret = wait_for_completion_interruptible(&event->complete);
  963. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  964. cnss_driver_event_to_str(type), type,
  965. plat_priv->driver_state, ret, event->ret);
  966. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  967. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  968. event->sync = false;
  969. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  970. ret = -EINTR;
  971. goto out;
  972. }
  973. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  974. ret = event->ret;
  975. kfree(event);
  976. out:
  977. cnss_pm_relax(plat_priv);
  978. return ret;
  979. }
  980. /**
  981. * cnss_get_timeout - Get timeout for corresponding type.
  982. * @plat_priv: Pointer to platform driver context.
  983. * @cnss_timeout_type: Timeout type.
  984. *
  985. * Return: Timeout in milliseconds.
  986. */
  987. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  988. enum cnss_timeout_type timeout_type)
  989. {
  990. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  991. switch (timeout_type) {
  992. case CNSS_TIMEOUT_QMI:
  993. return qmi_timeout;
  994. case CNSS_TIMEOUT_POWER_UP:
  995. return (qmi_timeout << 2);
  996. case CNSS_TIMEOUT_IDLE_RESTART:
  997. /* In idle restart power up sequence, we have fw_boot_timer to
  998. * handle FW initialization failure.
  999. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1000. * account for FW dump collection and FW re-initialization on
  1001. * retry.
  1002. */
  1003. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1004. case CNSS_TIMEOUT_CALIBRATION:
  1005. /* Similar to mission mode, in CBC if FW init fails
  1006. * fw recovery is tried. Thus return 2x the CBC timeout.
  1007. */
  1008. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1009. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1010. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1011. case CNSS_TIMEOUT_RDDM:
  1012. return CNSS_RDDM_TIMEOUT_MS;
  1013. case CNSS_TIMEOUT_RECOVERY:
  1014. return RECOVERY_TIMEOUT;
  1015. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1016. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1017. default:
  1018. return qmi_timeout;
  1019. }
  1020. }
  1021. unsigned int cnss_get_boot_timeout(struct device *dev)
  1022. {
  1023. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1024. if (!plat_priv) {
  1025. cnss_pr_err("plat_priv is NULL\n");
  1026. return 0;
  1027. }
  1028. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1029. }
  1030. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1031. int cnss_power_up(struct device *dev)
  1032. {
  1033. int ret = 0;
  1034. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1035. unsigned int timeout;
  1036. if (!plat_priv) {
  1037. cnss_pr_err("plat_priv is NULL\n");
  1038. return -ENODEV;
  1039. }
  1040. cnss_pr_dbg("Powering up device\n");
  1041. ret = cnss_driver_event_post(plat_priv,
  1042. CNSS_DRIVER_EVENT_POWER_UP,
  1043. CNSS_EVENT_SYNC, NULL);
  1044. if (ret)
  1045. goto out;
  1046. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1047. goto out;
  1048. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1049. reinit_completion(&plat_priv->power_up_complete);
  1050. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1051. msecs_to_jiffies(timeout));
  1052. if (!ret) {
  1053. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1054. timeout);
  1055. ret = -EAGAIN;
  1056. goto out;
  1057. }
  1058. return 0;
  1059. out:
  1060. return ret;
  1061. }
  1062. EXPORT_SYMBOL(cnss_power_up);
  1063. int cnss_power_down(struct device *dev)
  1064. {
  1065. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1066. if (!plat_priv) {
  1067. cnss_pr_err("plat_priv is NULL\n");
  1068. return -ENODEV;
  1069. }
  1070. cnss_pr_dbg("Powering down device\n");
  1071. return cnss_driver_event_post(plat_priv,
  1072. CNSS_DRIVER_EVENT_POWER_DOWN,
  1073. CNSS_EVENT_SYNC, NULL);
  1074. }
  1075. EXPORT_SYMBOL(cnss_power_down);
  1076. int cnss_idle_restart(struct device *dev)
  1077. {
  1078. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1079. unsigned int timeout;
  1080. int ret = 0;
  1081. if (!plat_priv) {
  1082. cnss_pr_err("plat_priv is NULL\n");
  1083. return -ENODEV;
  1084. }
  1085. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1086. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1087. return -EBUSY;
  1088. }
  1089. cnss_pr_dbg("Doing idle restart\n");
  1090. reinit_completion(&plat_priv->power_up_complete);
  1091. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1092. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1093. ret = -EINVAL;
  1094. goto out;
  1095. }
  1096. ret = cnss_driver_event_post(plat_priv,
  1097. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1098. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1099. if (ret)
  1100. goto out;
  1101. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1102. ret = cnss_bus_call_driver_probe(plat_priv);
  1103. goto out;
  1104. }
  1105. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1106. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1107. msecs_to_jiffies(timeout));
  1108. if (plat_priv->power_up_error) {
  1109. ret = plat_priv->power_up_error;
  1110. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1111. cnss_pr_dbg("Power up error:%d, exiting\n",
  1112. plat_priv->power_up_error);
  1113. goto out;
  1114. }
  1115. if (!ret) {
  1116. /* This exception occurs after attempting retry of FW recovery.
  1117. * Thus we can safely power off the device.
  1118. */
  1119. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1120. timeout);
  1121. ret = -ETIMEDOUT;
  1122. cnss_power_down(dev);
  1123. CNSS_ASSERT(0);
  1124. goto out;
  1125. }
  1126. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1127. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1128. del_timer(&plat_priv->fw_boot_timer);
  1129. ret = -EINVAL;
  1130. goto out;
  1131. }
  1132. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1133. * non-DRV is supported only once after device reboots and before wifi
  1134. * is turned on. We do not allow switching back to DRV.
  1135. * To bring device back into DRV, user needs to reboot device.
  1136. */
  1137. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1138. cnss_pr_dbg("DRV is disabled\n");
  1139. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1140. }
  1141. mutex_unlock(&plat_priv->driver_ops_lock);
  1142. return 0;
  1143. out:
  1144. mutex_unlock(&plat_priv->driver_ops_lock);
  1145. return ret;
  1146. }
  1147. EXPORT_SYMBOL(cnss_idle_restart);
  1148. int cnss_idle_shutdown(struct device *dev)
  1149. {
  1150. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1151. if (!plat_priv) {
  1152. cnss_pr_err("plat_priv is NULL\n");
  1153. return -ENODEV;
  1154. }
  1155. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1156. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1157. return -EAGAIN;
  1158. }
  1159. cnss_pr_dbg("Doing idle shutdown\n");
  1160. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1161. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1162. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1163. return -EBUSY;
  1164. }
  1165. return cnss_driver_event_post(plat_priv,
  1166. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1167. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1168. }
  1169. EXPORT_SYMBOL(cnss_idle_shutdown);
  1170. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1171. {
  1172. int ret = 0;
  1173. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1174. if (ret < 0) {
  1175. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1176. goto out;
  1177. }
  1178. ret = cnss_get_clk(plat_priv);
  1179. if (ret) {
  1180. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1181. goto put_vreg;
  1182. }
  1183. ret = cnss_get_pinctrl(plat_priv);
  1184. if (ret) {
  1185. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1186. goto put_clk;
  1187. }
  1188. return 0;
  1189. put_clk:
  1190. cnss_put_clk(plat_priv);
  1191. put_vreg:
  1192. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1193. out:
  1194. return ret;
  1195. }
  1196. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1197. {
  1198. cnss_put_clk(plat_priv);
  1199. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1200. }
  1201. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1202. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1203. unsigned long code,
  1204. void *ss_handle)
  1205. {
  1206. struct cnss_plat_data *plat_priv =
  1207. container_of(nb, struct cnss_plat_data, modem_nb);
  1208. struct cnss_esoc_info *esoc_info;
  1209. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1210. if (!plat_priv)
  1211. return NOTIFY_DONE;
  1212. esoc_info = &plat_priv->esoc_info;
  1213. if (code == SUBSYS_AFTER_POWERUP)
  1214. esoc_info->modem_current_status = 1;
  1215. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1216. esoc_info->modem_current_status = 0;
  1217. else
  1218. return NOTIFY_DONE;
  1219. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1220. esoc_info->modem_current_status))
  1221. return NOTIFY_DONE;
  1222. return NOTIFY_OK;
  1223. }
  1224. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1225. {
  1226. int ret = 0;
  1227. struct device *dev;
  1228. struct cnss_esoc_info *esoc_info;
  1229. struct esoc_desc *esoc_desc;
  1230. const char *client_desc;
  1231. dev = &plat_priv->plat_dev->dev;
  1232. esoc_info = &plat_priv->esoc_info;
  1233. esoc_info->notify_modem_status =
  1234. of_property_read_bool(dev->of_node,
  1235. "qcom,notify-modem-status");
  1236. if (!esoc_info->notify_modem_status)
  1237. goto out;
  1238. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1239. &client_desc);
  1240. if (ret) {
  1241. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1242. } else {
  1243. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1244. if (IS_ERR_OR_NULL(esoc_desc)) {
  1245. ret = PTR_RET(esoc_desc);
  1246. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1247. ret);
  1248. goto out;
  1249. }
  1250. esoc_info->esoc_desc = esoc_desc;
  1251. }
  1252. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1253. esoc_info->modem_current_status = 0;
  1254. esoc_info->modem_notify_handler =
  1255. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1256. esoc_info->esoc_desc->name :
  1257. "modem", &plat_priv->modem_nb);
  1258. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1259. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1260. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1261. ret);
  1262. goto unreg_esoc;
  1263. }
  1264. return 0;
  1265. unreg_esoc:
  1266. if (esoc_info->esoc_desc)
  1267. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1268. out:
  1269. return ret;
  1270. }
  1271. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1272. {
  1273. struct device *dev;
  1274. struct cnss_esoc_info *esoc_info;
  1275. dev = &plat_priv->plat_dev->dev;
  1276. esoc_info = &plat_priv->esoc_info;
  1277. if (esoc_info->notify_modem_status)
  1278. subsys_notif_unregister_notifier
  1279. (esoc_info->modem_notify_handler,
  1280. &plat_priv->modem_nb);
  1281. if (esoc_info->esoc_desc)
  1282. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1283. }
  1284. #else
  1285. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1286. {
  1287. return 0;
  1288. }
  1289. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1290. #endif
  1291. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1292. {
  1293. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1294. int ret = 0;
  1295. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1296. return 0;
  1297. enable_irq(sol_gpio->dev_sol_irq);
  1298. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1299. if (ret)
  1300. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1301. ret);
  1302. return ret;
  1303. }
  1304. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1305. {
  1306. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1307. int ret = 0;
  1308. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1309. return 0;
  1310. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1311. if (ret)
  1312. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1313. ret);
  1314. disable_irq(sol_gpio->dev_sol_irq);
  1315. return ret;
  1316. }
  1317. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1318. {
  1319. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1320. if (sol_gpio->dev_sol_gpio < 0)
  1321. return -EINVAL;
  1322. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1323. }
  1324. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1325. {
  1326. struct cnss_plat_data *plat_priv = data;
  1327. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1328. sol_gpio->dev_sol_counter++;
  1329. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1330. irq, sol_gpio->dev_sol_counter);
  1331. /* Make sure abort current suspend */
  1332. cnss_pm_stay_awake(plat_priv);
  1333. cnss_pm_relax(plat_priv);
  1334. pm_system_wakeup();
  1335. cnss_bus_handle_dev_sol_irq(plat_priv);
  1336. return IRQ_HANDLED;
  1337. }
  1338. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1339. {
  1340. struct device *dev = &plat_priv->plat_dev->dev;
  1341. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1342. int ret = 0;
  1343. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1344. "wlan-dev-sol-gpio", 0);
  1345. if (sol_gpio->dev_sol_gpio < 0)
  1346. goto out;
  1347. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1348. sol_gpio->dev_sol_gpio);
  1349. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1350. if (ret) {
  1351. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1352. ret);
  1353. goto out;
  1354. }
  1355. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1356. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1357. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1358. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1359. if (ret) {
  1360. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1361. goto free_gpio;
  1362. }
  1363. return 0;
  1364. free_gpio:
  1365. gpio_free(sol_gpio->dev_sol_gpio);
  1366. out:
  1367. return ret;
  1368. }
  1369. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1370. {
  1371. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1372. if (sol_gpio->dev_sol_gpio < 0)
  1373. return;
  1374. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1375. gpio_free(sol_gpio->dev_sol_gpio);
  1376. }
  1377. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1378. {
  1379. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1380. if (sol_gpio->host_sol_gpio < 0)
  1381. return -EINVAL;
  1382. if (value)
  1383. cnss_pr_dbg("Assert host SOL GPIO\n");
  1384. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1385. return 0;
  1386. }
  1387. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1388. {
  1389. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1390. if (sol_gpio->host_sol_gpio < 0)
  1391. return -EINVAL;
  1392. return gpio_get_value(sol_gpio->host_sol_gpio);
  1393. }
  1394. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1395. {
  1396. struct device *dev = &plat_priv->plat_dev->dev;
  1397. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1398. int ret = 0;
  1399. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1400. "wlan-host-sol-gpio", 0);
  1401. if (sol_gpio->host_sol_gpio < 0)
  1402. goto out;
  1403. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1404. sol_gpio->host_sol_gpio);
  1405. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1406. if (ret) {
  1407. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1408. ret);
  1409. goto out;
  1410. }
  1411. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1412. return 0;
  1413. out:
  1414. return ret;
  1415. }
  1416. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1417. {
  1418. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1419. if (sol_gpio->host_sol_gpio < 0)
  1420. return;
  1421. gpio_free(sol_gpio->host_sol_gpio);
  1422. }
  1423. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1424. {
  1425. int ret;
  1426. ret = cnss_init_dev_sol_gpio(plat_priv);
  1427. if (ret)
  1428. goto out;
  1429. ret = cnss_init_host_sol_gpio(plat_priv);
  1430. if (ret)
  1431. goto deinit_dev_sol;
  1432. return 0;
  1433. deinit_dev_sol:
  1434. cnss_deinit_dev_sol_gpio(plat_priv);
  1435. out:
  1436. return ret;
  1437. }
  1438. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1439. {
  1440. cnss_deinit_host_sol_gpio(plat_priv);
  1441. cnss_deinit_dev_sol_gpio(plat_priv);
  1442. }
  1443. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1444. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1445. {
  1446. struct cnss_plat_data *plat_priv;
  1447. int ret = 0;
  1448. if (!subsys_desc->dev) {
  1449. cnss_pr_err("dev from subsys_desc is NULL\n");
  1450. return -ENODEV;
  1451. }
  1452. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1453. if (!plat_priv) {
  1454. cnss_pr_err("plat_priv is NULL\n");
  1455. return -ENODEV;
  1456. }
  1457. if (!plat_priv->driver_state) {
  1458. cnss_pr_dbg("subsys powerup is ignored\n");
  1459. return 0;
  1460. }
  1461. ret = cnss_bus_dev_powerup(plat_priv);
  1462. if (ret)
  1463. __pm_relax(plat_priv->recovery_ws);
  1464. return ret;
  1465. }
  1466. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1467. bool force_stop)
  1468. {
  1469. struct cnss_plat_data *plat_priv;
  1470. if (!subsys_desc->dev) {
  1471. cnss_pr_err("dev from subsys_desc is NULL\n");
  1472. return -ENODEV;
  1473. }
  1474. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1475. if (!plat_priv) {
  1476. cnss_pr_err("plat_priv is NULL\n");
  1477. return -ENODEV;
  1478. }
  1479. if (!plat_priv->driver_state) {
  1480. cnss_pr_dbg("subsys shutdown is ignored\n");
  1481. return 0;
  1482. }
  1483. return cnss_bus_dev_shutdown(plat_priv);
  1484. }
  1485. void cnss_device_crashed(struct device *dev)
  1486. {
  1487. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1488. struct cnss_subsys_info *subsys_info;
  1489. if (!plat_priv)
  1490. return;
  1491. subsys_info = &plat_priv->subsys_info;
  1492. if (subsys_info->subsys_device) {
  1493. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1494. subsys_set_crash_status(subsys_info->subsys_device, true);
  1495. subsystem_restart_dev(subsys_info->subsys_device);
  1496. }
  1497. }
  1498. EXPORT_SYMBOL(cnss_device_crashed);
  1499. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1500. {
  1501. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1502. if (!plat_priv) {
  1503. cnss_pr_err("plat_priv is NULL\n");
  1504. return;
  1505. }
  1506. cnss_bus_dev_crash_shutdown(plat_priv);
  1507. }
  1508. static int cnss_subsys_ramdump(int enable,
  1509. const struct subsys_desc *subsys_desc)
  1510. {
  1511. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1512. if (!plat_priv) {
  1513. cnss_pr_err("plat_priv is NULL\n");
  1514. return -ENODEV;
  1515. }
  1516. if (!enable)
  1517. return 0;
  1518. return cnss_bus_dev_ramdump(plat_priv);
  1519. }
  1520. static void cnss_recovery_work_handler(struct work_struct *work)
  1521. {
  1522. }
  1523. #else
  1524. static void cnss_recovery_work_handler(struct work_struct *work)
  1525. {
  1526. int ret;
  1527. struct cnss_plat_data *plat_priv =
  1528. container_of(work, struct cnss_plat_data, recovery_work);
  1529. if (!plat_priv->recovery_enabled)
  1530. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1531. cnss_bus_dev_shutdown(plat_priv);
  1532. cnss_bus_dev_ramdump(plat_priv);
  1533. msleep(POWER_RESET_MIN_DELAY_MS);
  1534. ret = cnss_bus_dev_powerup(plat_priv);
  1535. if (ret)
  1536. __pm_relax(plat_priv->recovery_ws);
  1537. return;
  1538. }
  1539. void cnss_device_crashed(struct device *dev)
  1540. {
  1541. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1542. if (!plat_priv)
  1543. return;
  1544. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1545. schedule_work(&plat_priv->recovery_work);
  1546. }
  1547. EXPORT_SYMBOL(cnss_device_crashed);
  1548. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1549. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1550. {
  1551. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1552. struct cnss_ramdump_info *ramdump_info;
  1553. if (!plat_priv)
  1554. return NULL;
  1555. ramdump_info = &plat_priv->ramdump_info;
  1556. *size = ramdump_info->ramdump_size;
  1557. return ramdump_info->ramdump_va;
  1558. }
  1559. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1560. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1561. {
  1562. switch (reason) {
  1563. case CNSS_REASON_DEFAULT:
  1564. return "DEFAULT";
  1565. case CNSS_REASON_LINK_DOWN:
  1566. return "LINK_DOWN";
  1567. case CNSS_REASON_RDDM:
  1568. return "RDDM";
  1569. case CNSS_REASON_TIMEOUT:
  1570. return "TIMEOUT";
  1571. }
  1572. return "UNKNOWN";
  1573. };
  1574. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1575. enum cnss_recovery_reason reason)
  1576. {
  1577. plat_priv->recovery_count++;
  1578. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1579. goto self_recovery;
  1580. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1581. cnss_pr_dbg("Skip device recovery\n");
  1582. return 0;
  1583. }
  1584. /* FW recovery sequence has multiple steps and firmware load requires
  1585. * linux PM in awake state. Thus hold the cnss wake source until
  1586. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1587. * time taken in this process.
  1588. */
  1589. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1590. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1591. true);
  1592. switch (reason) {
  1593. case CNSS_REASON_LINK_DOWN:
  1594. if (!cnss_bus_check_link_status(plat_priv)) {
  1595. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1596. return 0;
  1597. }
  1598. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1599. &plat_priv->ctrl_params.quirks))
  1600. goto self_recovery;
  1601. if (!cnss_bus_recover_link_down(plat_priv)) {
  1602. /* clear recovery bit here to avoid skipping
  1603. * the recovery work for RDDM later
  1604. */
  1605. clear_bit(CNSS_DRIVER_RECOVERY,
  1606. &plat_priv->driver_state);
  1607. return 0;
  1608. }
  1609. break;
  1610. case CNSS_REASON_RDDM:
  1611. cnss_bus_collect_dump_info(plat_priv, false);
  1612. break;
  1613. case CNSS_REASON_DEFAULT:
  1614. case CNSS_REASON_TIMEOUT:
  1615. break;
  1616. default:
  1617. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1618. cnss_recovery_reason_to_str(reason), reason);
  1619. break;
  1620. }
  1621. cnss_bus_device_crashed(plat_priv);
  1622. return 0;
  1623. self_recovery:
  1624. cnss_pr_dbg("Going for self recovery\n");
  1625. cnss_bus_dev_shutdown(plat_priv);
  1626. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1627. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1628. &plat_priv->ctrl_params.quirks);
  1629. cnss_bus_dev_powerup(plat_priv);
  1630. return 0;
  1631. }
  1632. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1633. void *data)
  1634. {
  1635. struct cnss_recovery_data *recovery_data = data;
  1636. int ret = 0;
  1637. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1638. cnss_recovery_reason_to_str(recovery_data->reason),
  1639. recovery_data->reason);
  1640. if (!plat_priv->driver_state) {
  1641. cnss_pr_err("Improper driver state, ignore recovery\n");
  1642. ret = -EINVAL;
  1643. goto out;
  1644. }
  1645. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1646. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1647. ret = -EINVAL;
  1648. goto out;
  1649. }
  1650. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1651. cnss_pr_err("Recovery is already in progress\n");
  1652. CNSS_ASSERT(0);
  1653. ret = -EINVAL;
  1654. goto out;
  1655. }
  1656. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1657. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1658. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1659. ret = -EINVAL;
  1660. goto out;
  1661. }
  1662. switch (plat_priv->device_id) {
  1663. case QCA6174_DEVICE_ID:
  1664. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1665. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1666. &plat_priv->driver_state)) {
  1667. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1668. ret = -EINVAL;
  1669. goto out;
  1670. }
  1671. break;
  1672. default:
  1673. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1674. set_bit(CNSS_FW_BOOT_RECOVERY,
  1675. &plat_priv->driver_state);
  1676. }
  1677. break;
  1678. }
  1679. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1680. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1681. out:
  1682. kfree(data);
  1683. return ret;
  1684. }
  1685. int cnss_self_recovery(struct device *dev,
  1686. enum cnss_recovery_reason reason)
  1687. {
  1688. cnss_schedule_recovery(dev, reason);
  1689. return 0;
  1690. }
  1691. EXPORT_SYMBOL(cnss_self_recovery);
  1692. void cnss_schedule_recovery(struct device *dev,
  1693. enum cnss_recovery_reason reason)
  1694. {
  1695. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1696. struct cnss_recovery_data *data;
  1697. int gfp = GFP_KERNEL;
  1698. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1699. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1700. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1701. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1702. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1703. return;
  1704. }
  1705. if (in_interrupt() || irqs_disabled())
  1706. gfp = GFP_ATOMIC;
  1707. data = kzalloc(sizeof(*data), gfp);
  1708. if (!data)
  1709. return;
  1710. data->reason = reason;
  1711. cnss_driver_event_post(plat_priv,
  1712. CNSS_DRIVER_EVENT_RECOVERY,
  1713. 0, data);
  1714. }
  1715. EXPORT_SYMBOL(cnss_schedule_recovery);
  1716. int cnss_force_fw_assert(struct device *dev)
  1717. {
  1718. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1719. if (!plat_priv) {
  1720. cnss_pr_err("plat_priv is NULL\n");
  1721. return -ENODEV;
  1722. }
  1723. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1724. cnss_pr_info("Forced FW assert is not supported\n");
  1725. return -EOPNOTSUPP;
  1726. }
  1727. if (cnss_bus_is_device_down(plat_priv)) {
  1728. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1729. return 0;
  1730. }
  1731. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1732. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1733. return 0;
  1734. }
  1735. if (in_interrupt() || irqs_disabled())
  1736. cnss_driver_event_post(plat_priv,
  1737. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1738. 0, NULL);
  1739. else
  1740. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1741. return 0;
  1742. }
  1743. EXPORT_SYMBOL(cnss_force_fw_assert);
  1744. int cnss_force_collect_rddm(struct device *dev)
  1745. {
  1746. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1747. unsigned int timeout;
  1748. int ret = 0;
  1749. if (!plat_priv) {
  1750. cnss_pr_err("plat_priv is NULL\n");
  1751. return -ENODEV;
  1752. }
  1753. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1754. cnss_pr_info("Force collect rddm is not supported\n");
  1755. return -EOPNOTSUPP;
  1756. }
  1757. if (cnss_bus_is_device_down(plat_priv)) {
  1758. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1759. goto wait_rddm;
  1760. }
  1761. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1762. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1763. goto wait_rddm;
  1764. }
  1765. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1766. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1767. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1768. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1769. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1770. return 0;
  1771. }
  1772. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1773. if (ret)
  1774. return ret;
  1775. wait_rddm:
  1776. reinit_completion(&plat_priv->rddm_complete);
  1777. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1778. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1779. msecs_to_jiffies(timeout));
  1780. if (!ret) {
  1781. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1782. timeout);
  1783. ret = -ETIMEDOUT;
  1784. } else if (ret > 0) {
  1785. ret = 0;
  1786. }
  1787. return ret;
  1788. }
  1789. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1790. int cnss_qmi_send_get(struct device *dev)
  1791. {
  1792. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1793. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1794. return 0;
  1795. return cnss_bus_qmi_send_get(plat_priv);
  1796. }
  1797. EXPORT_SYMBOL(cnss_qmi_send_get);
  1798. int cnss_qmi_send_put(struct device *dev)
  1799. {
  1800. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1801. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1802. return 0;
  1803. return cnss_bus_qmi_send_put(plat_priv);
  1804. }
  1805. EXPORT_SYMBOL(cnss_qmi_send_put);
  1806. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1807. int cmd_len, void *cb_ctx,
  1808. int (*cb)(void *ctx, void *event, int event_len))
  1809. {
  1810. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1811. int ret;
  1812. if (!plat_priv)
  1813. return -ENODEV;
  1814. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1815. return -EINVAL;
  1816. plat_priv->get_info_cb = cb;
  1817. plat_priv->get_info_cb_ctx = cb_ctx;
  1818. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1819. if (ret) {
  1820. plat_priv->get_info_cb = NULL;
  1821. plat_priv->get_info_cb_ctx = NULL;
  1822. }
  1823. return ret;
  1824. }
  1825. EXPORT_SYMBOL(cnss_qmi_send);
  1826. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1827. {
  1828. int ret = 0;
  1829. u32 retry = 0, timeout;
  1830. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1831. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1832. goto out;
  1833. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1834. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1835. goto out;
  1836. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1837. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1838. goto out;
  1839. }
  1840. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1841. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1842. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1843. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1844. CNSS_ASSERT(0);
  1845. return -EINVAL;
  1846. }
  1847. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1848. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1849. break;
  1850. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1851. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1852. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1853. CNSS_ASSERT(0);
  1854. ret = -EINVAL;
  1855. goto mark_cal_fail;
  1856. }
  1857. }
  1858. switch (plat_priv->device_id) {
  1859. case QCA6290_DEVICE_ID:
  1860. case QCA6390_DEVICE_ID:
  1861. case QCA6490_DEVICE_ID:
  1862. case KIWI_DEVICE_ID:
  1863. case MANGO_DEVICE_ID:
  1864. case PEACH_DEVICE_ID:
  1865. break;
  1866. default:
  1867. cnss_pr_err("Not supported for device ID 0x%lx\n",
  1868. plat_priv->device_id);
  1869. ret = -EINVAL;
  1870. goto mark_cal_fail;
  1871. }
  1872. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1873. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  1874. timeout = cnss_get_timeout(plat_priv,
  1875. CNSS_TIMEOUT_CALIBRATION);
  1876. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  1877. timeout / 1000);
  1878. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1879. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1880. msecs_to_jiffies(timeout));
  1881. }
  1882. reinit_completion(&plat_priv->cal_complete);
  1883. ret = cnss_bus_dev_powerup(plat_priv);
  1884. mark_cal_fail:
  1885. if (ret) {
  1886. complete(&plat_priv->cal_complete);
  1887. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1888. /* Set CBC done in driver state to mark attempt and note error
  1889. * since calibration cannot be retried at boot.
  1890. */
  1891. plat_priv->cal_done = CNSS_CAL_FAILURE;
  1892. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1893. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  1894. plat_priv->device_id == QCN7605_DEVICE_ID) {
  1895. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1896. goto out;
  1897. cnss_pr_info("Schedule WLAN driver load\n");
  1898. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1899. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1900. 0);
  1901. }
  1902. }
  1903. out:
  1904. return ret;
  1905. }
  1906. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  1907. void *data)
  1908. {
  1909. struct cnss_cal_info *cal_info = data;
  1910. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  1911. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  1912. goto out;
  1913. switch (cal_info->cal_status) {
  1914. case CNSS_CAL_DONE:
  1915. cnss_pr_dbg("Calibration completed successfully\n");
  1916. plat_priv->cal_done = true;
  1917. break;
  1918. case CNSS_CAL_TIMEOUT:
  1919. case CNSS_CAL_FAILURE:
  1920. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  1921. cal_info->cal_status);
  1922. break;
  1923. default:
  1924. cnss_pr_err("Unknown calibration status: %u\n",
  1925. cal_info->cal_status);
  1926. break;
  1927. }
  1928. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  1929. cnss_bus_free_qdss_mem(plat_priv);
  1930. cnss_release_antenna_sharing(plat_priv);
  1931. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  1932. goto skip_shutdown;
  1933. cnss_bus_dev_shutdown(plat_priv);
  1934. msleep(POWER_RESET_MIN_DELAY_MS);
  1935. skip_shutdown:
  1936. complete(&plat_priv->cal_complete);
  1937. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  1938. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  1939. if (cal_info->cal_status == CNSS_CAL_DONE) {
  1940. cnss_cal_mem_upload_to_file(plat_priv);
  1941. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  1942. goto out;
  1943. cnss_pr_dbg("Schedule WLAN driver load\n");
  1944. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  1945. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  1946. 0);
  1947. }
  1948. out:
  1949. kfree(data);
  1950. return 0;
  1951. }
  1952. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  1953. {
  1954. int ret;
  1955. ret = cnss_bus_dev_powerup(plat_priv);
  1956. if (ret)
  1957. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1958. return ret;
  1959. }
  1960. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  1961. {
  1962. cnss_bus_dev_shutdown(plat_priv);
  1963. return 0;
  1964. }
  1965. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  1966. {
  1967. int ret = 0;
  1968. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  1969. if (ret < 0)
  1970. return ret;
  1971. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  1972. }
  1973. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  1974. u32 mem_seg_len, u64 pa, u32 size)
  1975. {
  1976. int i = 0;
  1977. u64 offset = 0;
  1978. void *va = NULL;
  1979. u64 local_pa;
  1980. u32 local_size;
  1981. for (i = 0; i < mem_seg_len; i++) {
  1982. local_pa = (u64)fw_mem[i].pa;
  1983. local_size = (u32)fw_mem[i].size;
  1984. if (pa == local_pa && size <= local_size) {
  1985. va = fw_mem[i].va;
  1986. break;
  1987. }
  1988. if (pa > local_pa &&
  1989. pa < local_pa + local_size &&
  1990. pa + size <= local_pa + local_size) {
  1991. offset = pa - local_pa;
  1992. va = fw_mem[i].va + offset;
  1993. break;
  1994. }
  1995. }
  1996. return va;
  1997. }
  1998. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  1999. void *data)
  2000. {
  2001. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2002. struct cnss_fw_mem *fw_mem_seg;
  2003. int ret = 0L;
  2004. void *va = NULL;
  2005. u32 i, fw_mem_seg_len;
  2006. switch (event_data->mem_type) {
  2007. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2008. if (!plat_priv->fw_mem_seg_len)
  2009. goto invalid_mem_save;
  2010. fw_mem_seg = plat_priv->fw_mem;
  2011. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2012. break;
  2013. case QMI_WLFW_MEM_QDSS_V01:
  2014. if (!plat_priv->qdss_mem_seg_len)
  2015. goto invalid_mem_save;
  2016. fw_mem_seg = plat_priv->qdss_mem;
  2017. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2018. break;
  2019. default:
  2020. goto invalid_mem_save;
  2021. }
  2022. for (i = 0; i < event_data->mem_seg_len; i++) {
  2023. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2024. event_data->mem_seg[i].addr,
  2025. event_data->mem_seg[i].size);
  2026. if (!va) {
  2027. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2028. &event_data->mem_seg[i].addr,
  2029. event_data->mem_type);
  2030. ret = -EINVAL;
  2031. break;
  2032. }
  2033. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2034. event_data->file_name,
  2035. event_data->mem_seg[i].size);
  2036. if (ret < 0) {
  2037. cnss_pr_err("Fail to save fw mem data: %d\n",
  2038. ret);
  2039. break;
  2040. }
  2041. }
  2042. kfree(data);
  2043. return ret;
  2044. invalid_mem_save:
  2045. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2046. event_data->mem_type);
  2047. kfree(data);
  2048. return -EINVAL;
  2049. }
  2050. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2051. {
  2052. cnss_bus_free_qdss_mem(plat_priv);
  2053. return 0;
  2054. }
  2055. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2056. void *data)
  2057. {
  2058. int ret = 0;
  2059. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2060. if (!plat_priv)
  2061. return -ENODEV;
  2062. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2063. event_data->total_size);
  2064. kfree(data);
  2065. return ret;
  2066. }
  2067. static void cnss_driver_event_work(struct work_struct *work)
  2068. {
  2069. struct cnss_plat_data *plat_priv =
  2070. container_of(work, struct cnss_plat_data, event_work);
  2071. struct cnss_driver_event *event;
  2072. unsigned long flags;
  2073. int ret = 0;
  2074. if (!plat_priv) {
  2075. cnss_pr_err("plat_priv is NULL!\n");
  2076. return;
  2077. }
  2078. cnss_pm_stay_awake(plat_priv);
  2079. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2080. while (!list_empty(&plat_priv->event_list)) {
  2081. event = list_first_entry(&plat_priv->event_list,
  2082. struct cnss_driver_event, list);
  2083. list_del(&event->list);
  2084. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2085. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2086. cnss_driver_event_to_str(event->type),
  2087. event->sync ? "-sync" : "", event->type,
  2088. plat_priv->driver_state);
  2089. switch (event->type) {
  2090. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2091. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2092. break;
  2093. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2094. ret = cnss_wlfw_server_exit(plat_priv);
  2095. break;
  2096. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2097. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2098. if (ret)
  2099. break;
  2100. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2101. break;
  2102. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2103. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2104. break;
  2105. case CNSS_DRIVER_EVENT_FW_READY:
  2106. ret = cnss_fw_ready_hdlr(plat_priv);
  2107. break;
  2108. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2109. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2110. break;
  2111. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2112. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2113. event->data);
  2114. break;
  2115. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2116. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2117. event->data);
  2118. break;
  2119. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2120. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2121. break;
  2122. case CNSS_DRIVER_EVENT_RECOVERY:
  2123. ret = cnss_driver_recovery_hdlr(plat_priv,
  2124. event->data);
  2125. break;
  2126. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2127. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2128. break;
  2129. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2130. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2131. &plat_priv->driver_state);
  2132. fallthrough;
  2133. case CNSS_DRIVER_EVENT_POWER_UP:
  2134. ret = cnss_power_up_hdlr(plat_priv);
  2135. break;
  2136. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2137. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2138. &plat_priv->driver_state);
  2139. fallthrough;
  2140. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2141. ret = cnss_power_down_hdlr(plat_priv);
  2142. break;
  2143. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2144. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2145. event->data);
  2146. break;
  2147. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2148. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2149. event->data);
  2150. break;
  2151. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2152. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2153. break;
  2154. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2155. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2156. event->data);
  2157. break;
  2158. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2159. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2160. break;
  2161. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2162. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2163. event->data);
  2164. break;
  2165. default:
  2166. cnss_pr_err("Invalid driver event type: %d",
  2167. event->type);
  2168. kfree(event);
  2169. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2170. continue;
  2171. }
  2172. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2173. if (event->sync) {
  2174. event->ret = ret;
  2175. complete(&event->complete);
  2176. continue;
  2177. }
  2178. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2179. kfree(event);
  2180. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2181. }
  2182. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2183. cnss_pm_relax(plat_priv);
  2184. }
  2185. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2186. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2187. {
  2188. int ret = 0;
  2189. struct cnss_subsys_info *subsys_info;
  2190. subsys_info = &plat_priv->subsys_info;
  2191. subsys_info->subsys_desc.name = plat_priv->device_name;
  2192. subsys_info->subsys_desc.owner = THIS_MODULE;
  2193. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2194. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2195. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2196. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2197. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2198. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2199. if (IS_ERR(subsys_info->subsys_device)) {
  2200. ret = PTR_ERR(subsys_info->subsys_device);
  2201. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2202. goto out;
  2203. }
  2204. subsys_info->subsys_handle =
  2205. subsystem_get(subsys_info->subsys_desc.name);
  2206. if (!subsys_info->subsys_handle) {
  2207. cnss_pr_err("Failed to get subsys_handle!\n");
  2208. ret = -EINVAL;
  2209. goto unregister_subsys;
  2210. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2211. ret = PTR_ERR(subsys_info->subsys_handle);
  2212. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2213. goto unregister_subsys;
  2214. }
  2215. return 0;
  2216. unregister_subsys:
  2217. subsys_unregister(subsys_info->subsys_device);
  2218. out:
  2219. return ret;
  2220. }
  2221. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2222. {
  2223. struct cnss_subsys_info *subsys_info;
  2224. subsys_info = &plat_priv->subsys_info;
  2225. subsystem_put(subsys_info->subsys_handle);
  2226. subsys_unregister(subsys_info->subsys_device);
  2227. }
  2228. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2229. {
  2230. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2231. return create_ramdump_device(subsys_info->subsys_desc.name,
  2232. subsys_info->subsys_desc.dev);
  2233. }
  2234. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2235. void *ramdump_dev)
  2236. {
  2237. destroy_ramdump_device(ramdump_dev);
  2238. }
  2239. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2240. {
  2241. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2242. struct ramdump_segment segment;
  2243. memset(&segment, 0, sizeof(segment));
  2244. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2245. segment.size = ramdump_info->ramdump_size;
  2246. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2247. }
  2248. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2249. {
  2250. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2251. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2252. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2253. struct ramdump_segment *ramdump_segs, *s;
  2254. struct cnss_dump_meta_info meta_info = {0};
  2255. int i, ret = 0;
  2256. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2257. sizeof(*ramdump_segs),
  2258. GFP_KERNEL);
  2259. if (!ramdump_segs)
  2260. return -ENOMEM;
  2261. s = ramdump_segs + 1;
  2262. for (i = 0; i < dump_data->nentries; i++) {
  2263. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2264. cnss_pr_err("Unsupported dump type: %d",
  2265. dump_seg->type);
  2266. continue;
  2267. }
  2268. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2269. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2270. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2271. }
  2272. meta_info.entry[dump_seg->type].entry_num++;
  2273. s->address = dump_seg->address;
  2274. s->v_address = (void __iomem *)dump_seg->v_address;
  2275. s->size = dump_seg->size;
  2276. s++;
  2277. dump_seg++;
  2278. }
  2279. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2280. meta_info.version = CNSS_RAMDUMP_VERSION;
  2281. meta_info.chipset = plat_priv->device_id;
  2282. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2283. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2284. ramdump_segs->size = sizeof(meta_info);
  2285. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2286. dump_data->nentries + 1);
  2287. kfree(ramdump_segs);
  2288. return ret;
  2289. }
  2290. #else
  2291. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2292. void *data)
  2293. {
  2294. struct cnss_plat_data *plat_priv =
  2295. container_of(nb, struct cnss_plat_data, panic_nb);
  2296. cnss_bus_dev_crash_shutdown(plat_priv);
  2297. return NOTIFY_DONE;
  2298. }
  2299. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2300. {
  2301. int ret;
  2302. if (!plat_priv)
  2303. return -ENODEV;
  2304. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2305. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2306. &plat_priv->panic_nb);
  2307. if (ret) {
  2308. cnss_pr_err("Failed to register panic handler\n");
  2309. return -EINVAL;
  2310. }
  2311. return 0;
  2312. }
  2313. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2314. {
  2315. int ret;
  2316. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2317. &plat_priv->panic_nb);
  2318. if (ret)
  2319. cnss_pr_err("Failed to unregister panic handler\n");
  2320. }
  2321. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2322. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2323. {
  2324. return &plat_priv->plat_dev->dev;
  2325. }
  2326. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2327. void *ramdump_dev)
  2328. {
  2329. }
  2330. #endif
  2331. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2332. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2333. {
  2334. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2335. struct qcom_dump_segment segment;
  2336. struct list_head head;
  2337. INIT_LIST_HEAD(&head);
  2338. memset(&segment, 0, sizeof(segment));
  2339. segment.va = ramdump_info->ramdump_va;
  2340. segment.size = ramdump_info->ramdump_size;
  2341. list_add(&segment.node, &head);
  2342. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2343. }
  2344. #else
  2345. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2346. {
  2347. return 0;
  2348. }
  2349. /* Using completion event inside dynamically allocated ramdump_desc
  2350. * may result a race between freeing the event after setting it to
  2351. * complete inside dev coredump free callback and the thread that is
  2352. * waiting for completion.
  2353. */
  2354. DECLARE_COMPLETION(dump_done);
  2355. #define TIMEOUT_SAVE_DUMP_MS 30000
  2356. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2357. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2358. { \
  2359. if (class == ELFCLASS32) \
  2360. return sizeof(struct elf32_##__xhdr); \
  2361. else \
  2362. return sizeof(struct elf64_##__xhdr); \
  2363. }
  2364. SIZEOF_ELF_STRUCT(phdr)
  2365. SIZEOF_ELF_STRUCT(hdr)
  2366. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2367. do { \
  2368. if (class == ELFCLASS32) \
  2369. ((struct elf32_##__xhdr *)arg)->member = value; \
  2370. else \
  2371. ((struct elf64_##__xhdr *)arg)->member = value; \
  2372. } while (0)
  2373. #define set_ehdr_property(arg, class, member, value) \
  2374. set_xhdr_property(hdr, arg, class, member, value)
  2375. #define set_phdr_property(arg, class, member, value) \
  2376. set_xhdr_property(phdr, arg, class, member, value)
  2377. /* These replace qcom_ramdump driver APIs called from common API
  2378. * cnss_do_elf_dump() by the ones defined here.
  2379. */
  2380. #define qcom_dump_segment cnss_qcom_dump_segment
  2381. #define qcom_elf_dump cnss_qcom_elf_dump
  2382. #define dump_enabled cnss_dump_enabled
  2383. struct cnss_qcom_dump_segment {
  2384. struct list_head node;
  2385. dma_addr_t da;
  2386. void *va;
  2387. size_t size;
  2388. };
  2389. struct cnss_qcom_ramdump_desc {
  2390. void *data;
  2391. struct completion dump_done;
  2392. };
  2393. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2394. void *data, size_t datalen)
  2395. {
  2396. struct cnss_qcom_ramdump_desc *desc = data;
  2397. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2398. datalen);
  2399. }
  2400. static void cnss_qcom_devcd_freev(void *data)
  2401. {
  2402. struct cnss_qcom_ramdump_desc *desc = data;
  2403. cnss_pr_dbg("Free dump data for dev coredump\n");
  2404. complete(&dump_done);
  2405. vfree(desc->data);
  2406. kfree(desc);
  2407. }
  2408. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2409. gfp_t gfp)
  2410. {
  2411. struct cnss_qcom_ramdump_desc *desc;
  2412. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2413. int ret;
  2414. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2415. if (!desc)
  2416. return -ENOMEM;
  2417. desc->data = data;
  2418. reinit_completion(&dump_done);
  2419. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2420. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2421. ret = wait_for_completion_timeout(&dump_done,
  2422. msecs_to_jiffies(timeout));
  2423. if (!ret)
  2424. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2425. timeout);
  2426. return ret ? 0 : -ETIMEDOUT;
  2427. }
  2428. /* Since the elf32 and elf64 identification is identical apart from
  2429. * the class, use elf32 by default.
  2430. */
  2431. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2432. {
  2433. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2434. ehdr->e_ident[EI_CLASS] = class;
  2435. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2436. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2437. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2438. }
  2439. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2440. unsigned char class)
  2441. {
  2442. struct cnss_qcom_dump_segment *segment;
  2443. void *phdr, *ehdr;
  2444. size_t data_size, offset;
  2445. int phnum = 0;
  2446. void *data;
  2447. void __iomem *ptr;
  2448. if (!segs || list_empty(segs))
  2449. return -EINVAL;
  2450. data_size = sizeof_elf_hdr(class);
  2451. list_for_each_entry(segment, segs, node) {
  2452. data_size += sizeof_elf_phdr(class) + segment->size;
  2453. phnum++;
  2454. }
  2455. data = vmalloc(data_size);
  2456. if (!data)
  2457. return -ENOMEM;
  2458. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2459. ehdr = data;
  2460. memset(ehdr, 0, sizeof_elf_hdr(class));
  2461. init_elf_identification(ehdr, class);
  2462. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2463. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2464. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2465. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2466. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2467. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2468. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2469. phdr = data + sizeof_elf_hdr(class);
  2470. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2471. list_for_each_entry(segment, segs, node) {
  2472. memset(phdr, 0, sizeof_elf_phdr(class));
  2473. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2474. set_phdr_property(phdr, class, p_offset, offset);
  2475. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2476. set_phdr_property(phdr, class, p_paddr, segment->da);
  2477. set_phdr_property(phdr, class, p_filesz, segment->size);
  2478. set_phdr_property(phdr, class, p_memsz, segment->size);
  2479. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2480. set_phdr_property(phdr, class, p_align, 0);
  2481. if (segment->va) {
  2482. memcpy(data + offset, segment->va, segment->size);
  2483. } else {
  2484. ptr = devm_ioremap(dev, segment->da, segment->size);
  2485. if (!ptr) {
  2486. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2487. &segment->da, segment->size);
  2488. memset(data + offset, 0xff, segment->size);
  2489. } else {
  2490. memcpy_fromio(data + offset, ptr,
  2491. segment->size);
  2492. }
  2493. }
  2494. offset += segment->size;
  2495. phdr += sizeof_elf_phdr(class);
  2496. }
  2497. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2498. }
  2499. /* Saving dump to file system is always needed in this case. */
  2500. static bool cnss_dump_enabled(void)
  2501. {
  2502. return true;
  2503. }
  2504. #endif /* CONFIG_QCOM_RAMDUMP */
  2505. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2506. {
  2507. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2508. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2509. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2510. struct qcom_dump_segment *seg;
  2511. struct cnss_dump_meta_info meta_info = {0};
  2512. struct list_head head;
  2513. int i, ret = 0;
  2514. if (!dump_enabled()) {
  2515. cnss_pr_info("Dump collection is not enabled\n");
  2516. return ret;
  2517. }
  2518. INIT_LIST_HEAD(&head);
  2519. for (i = 0; i < dump_data->nentries; i++) {
  2520. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2521. cnss_pr_err("Unsupported dump type: %d",
  2522. dump_seg->type);
  2523. continue;
  2524. }
  2525. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2526. if (!seg) {
  2527. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2528. __func__, i);
  2529. continue;
  2530. }
  2531. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2532. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2533. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2534. }
  2535. meta_info.entry[dump_seg->type].entry_num++;
  2536. seg->da = dump_seg->address;
  2537. seg->va = dump_seg->v_address;
  2538. seg->size = dump_seg->size;
  2539. list_add_tail(&seg->node, &head);
  2540. dump_seg++;
  2541. }
  2542. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2543. if (!seg) {
  2544. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2545. __func__);
  2546. goto skip_elf_dump;
  2547. }
  2548. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2549. meta_info.version = CNSS_RAMDUMP_VERSION;
  2550. meta_info.chipset = plat_priv->device_id;
  2551. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2552. seg->va = &meta_info;
  2553. seg->size = sizeof(meta_info);
  2554. list_add(&seg->node, &head);
  2555. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2556. skip_elf_dump:
  2557. while (!list_empty(&head)) {
  2558. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2559. list_del(&seg->node);
  2560. kfree(seg);
  2561. }
  2562. return ret;
  2563. }
  2564. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2565. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2566. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2567. size_t num_entries_loaded)
  2568. {
  2569. struct qcom_dump_segment *seg;
  2570. struct cnss_host_dump_meta_info meta_info = {0};
  2571. struct list_head head;
  2572. int dev_ret = 0;
  2573. struct device *new_device;
  2574. static const char * const wlan_str[] = {
  2575. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2576. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2577. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2578. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2579. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2580. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2581. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2582. [CNSS_HOST_WMI_HANG_DATA] = "wmi_hang_data",
  2583. [CNSS_HOST_CE_HANG_EVT] = "ce_hang_evt",
  2584. [CNSS_HOST_PEER_MAC_ADDR_HANG_DATA] = "peer_mac_addr_hang_data",
  2585. [CNSS_HOST_CP_VDEV_INFO] = "cp_vdev_info",
  2586. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2587. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2588. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2589. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2590. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2591. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2592. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2593. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx"
  2594. };
  2595. int i;
  2596. int ret = 0;
  2597. enum cnss_host_dump_type j;
  2598. if (!dump_enabled()) {
  2599. cnss_pr_info("Dump collection is not enabled\n");
  2600. return ret;
  2601. }
  2602. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2603. if (!new_device) {
  2604. cnss_pr_err("Failed to alloc device mem\n");
  2605. return -ENOMEM;
  2606. }
  2607. device_initialize(new_device);
  2608. dev_set_name(new_device, "wlan_driver");
  2609. dev_ret = device_add(new_device);
  2610. if (dev_ret) {
  2611. cnss_pr_err("Failed to add new device\n");
  2612. goto put_device;
  2613. }
  2614. INIT_LIST_HEAD(&head);
  2615. for (i = 0; i < num_entries_loaded; i++) {
  2616. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2617. if (!seg) {
  2618. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2619. continue;
  2620. }
  2621. seg->va = ssr_entry[i].buffer_pointer;
  2622. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2623. seg->size = ssr_entry[i].buffer_size;
  2624. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2625. if (strncmp(ssr_entry[i].region_name, wlan_str[j],
  2626. strlen(wlan_str[j])) == 0) {
  2627. meta_info.entry[i].type = j;
  2628. }
  2629. }
  2630. meta_info.entry[i].entry_start = i + 1;
  2631. meta_info.entry[i].entry_num++;
  2632. list_add_tail(&seg->node, &head);
  2633. }
  2634. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2635. if (!seg) {
  2636. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2637. __func__);
  2638. goto skip_host_dump;
  2639. }
  2640. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2641. meta_info.version = CNSS_RAMDUMP_VERSION;
  2642. meta_info.chipset = plat_priv->device_id;
  2643. meta_info.total_entries = num_entries_loaded;
  2644. seg->va = &meta_info;
  2645. seg->da = (dma_addr_t)&meta_info;
  2646. seg->size = sizeof(meta_info);
  2647. list_add(&seg->node, &head);
  2648. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2649. skip_host_dump:
  2650. while (!list_empty(&head)) {
  2651. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2652. list_del(&seg->node);
  2653. kfree(seg);
  2654. }
  2655. device_del(new_device);
  2656. put_device:
  2657. put_device(new_device);
  2658. kfree(new_device);
  2659. return ret;
  2660. }
  2661. #endif
  2662. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2663. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2664. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2665. {
  2666. struct cnss_ramdump_info *ramdump_info;
  2667. struct msm_dump_entry dump_entry;
  2668. ramdump_info = &plat_priv->ramdump_info;
  2669. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2670. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2671. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2672. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2673. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2674. sizeof(ramdump_info->dump_data.name));
  2675. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2676. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2677. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2678. &dump_entry);
  2679. }
  2680. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2681. {
  2682. int ret = 0;
  2683. struct device *dev;
  2684. struct cnss_ramdump_info *ramdump_info;
  2685. u32 ramdump_size = 0;
  2686. dev = &plat_priv->plat_dev->dev;
  2687. ramdump_info = &plat_priv->ramdump_info;
  2688. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2689. /* dt type: legacy or converged */
  2690. ret = of_property_read_u32(dev->of_node,
  2691. "qcom,wlan-ramdump-dynamic",
  2692. &ramdump_size);
  2693. } else {
  2694. ret = of_property_read_u32(plat_priv->dev_node,
  2695. "qcom,wlan-ramdump-dynamic",
  2696. &ramdump_size);
  2697. }
  2698. if (ret == 0) {
  2699. ramdump_info->ramdump_va =
  2700. dma_alloc_coherent(dev, ramdump_size,
  2701. &ramdump_info->ramdump_pa,
  2702. GFP_KERNEL);
  2703. if (ramdump_info->ramdump_va)
  2704. ramdump_info->ramdump_size = ramdump_size;
  2705. }
  2706. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2707. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2708. if (ramdump_info->ramdump_size == 0) {
  2709. cnss_pr_info("Ramdump will not be collected");
  2710. goto out;
  2711. }
  2712. ret = cnss_init_dump_entry(plat_priv);
  2713. if (ret) {
  2714. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2715. goto free_ramdump;
  2716. }
  2717. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2718. if (!ramdump_info->ramdump_dev) {
  2719. cnss_pr_err("Failed to create ramdump device!");
  2720. ret = -ENOMEM;
  2721. goto free_ramdump;
  2722. }
  2723. return 0;
  2724. free_ramdump:
  2725. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2726. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2727. out:
  2728. return ret;
  2729. }
  2730. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2731. {
  2732. struct device *dev;
  2733. struct cnss_ramdump_info *ramdump_info;
  2734. dev = &plat_priv->plat_dev->dev;
  2735. ramdump_info = &plat_priv->ramdump_info;
  2736. if (ramdump_info->ramdump_dev)
  2737. cnss_destroy_ramdump_device(plat_priv,
  2738. ramdump_info->ramdump_dev);
  2739. if (ramdump_info->ramdump_va)
  2740. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2741. ramdump_info->ramdump_va,
  2742. ramdump_info->ramdump_pa);
  2743. }
  2744. /**
  2745. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2746. * @ret: Error returned by msm_dump_data_register_nominidump
  2747. *
  2748. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  2749. * ignore failure.
  2750. *
  2751. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  2752. */
  2753. static int cnss_ignore_dump_data_reg_fail(int ret)
  2754. {
  2755. return ret;
  2756. }
  2757. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  2758. {
  2759. int ret = 0;
  2760. struct cnss_ramdump_info_v2 *info_v2;
  2761. struct cnss_dump_data *dump_data;
  2762. struct msm_dump_entry dump_entry;
  2763. struct device *dev = &plat_priv->plat_dev->dev;
  2764. u32 ramdump_size = 0;
  2765. info_v2 = &plat_priv->ramdump_info_v2;
  2766. dump_data = &info_v2->dump_data;
  2767. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2768. /* dt type: legacy or converged */
  2769. ret = of_property_read_u32(dev->of_node,
  2770. "qcom,wlan-ramdump-dynamic",
  2771. &ramdump_size);
  2772. } else {
  2773. ret = of_property_read_u32(plat_priv->dev_node,
  2774. "qcom,wlan-ramdump-dynamic",
  2775. &ramdump_size);
  2776. }
  2777. if (ret == 0)
  2778. info_v2->ramdump_size = ramdump_size;
  2779. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2780. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2781. if (!info_v2->dump_data_vaddr)
  2782. return -ENOMEM;
  2783. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2784. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2785. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2786. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2787. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2788. sizeof(dump_data->name));
  2789. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2790. dump_entry.addr = virt_to_phys(dump_data);
  2791. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2792. &dump_entry);
  2793. if (ret) {
  2794. ret = cnss_ignore_dump_data_reg_fail(ret);
  2795. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  2796. ret ? "Error" : "Ignoring", ret);
  2797. goto free_ramdump;
  2798. }
  2799. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2800. if (!info_v2->ramdump_dev) {
  2801. cnss_pr_err("Failed to create ramdump device!\n");
  2802. ret = -ENOMEM;
  2803. goto free_ramdump;
  2804. }
  2805. return 0;
  2806. free_ramdump:
  2807. kfree(info_v2->dump_data_vaddr);
  2808. info_v2->dump_data_vaddr = NULL;
  2809. return ret;
  2810. }
  2811. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  2812. {
  2813. struct cnss_ramdump_info_v2 *info_v2;
  2814. info_v2 = &plat_priv->ramdump_info_v2;
  2815. if (info_v2->ramdump_dev)
  2816. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  2817. kfree(info_v2->dump_data_vaddr);
  2818. info_v2->dump_data_vaddr = NULL;
  2819. info_v2->dump_data_valid = false;
  2820. }
  2821. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2822. {
  2823. int ret = 0;
  2824. switch (plat_priv->device_id) {
  2825. case QCA6174_DEVICE_ID:
  2826. ret = cnss_register_ramdump_v1(plat_priv);
  2827. break;
  2828. case QCA6290_DEVICE_ID:
  2829. case QCA6390_DEVICE_ID:
  2830. case QCN7605_DEVICE_ID:
  2831. case QCA6490_DEVICE_ID:
  2832. case KIWI_DEVICE_ID:
  2833. case MANGO_DEVICE_ID:
  2834. case PEACH_DEVICE_ID:
  2835. ret = cnss_register_ramdump_v2(plat_priv);
  2836. break;
  2837. default:
  2838. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2839. ret = -ENODEV;
  2840. break;
  2841. }
  2842. return ret;
  2843. }
  2844. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2845. {
  2846. switch (plat_priv->device_id) {
  2847. case QCA6174_DEVICE_ID:
  2848. cnss_unregister_ramdump_v1(plat_priv);
  2849. break;
  2850. case QCA6290_DEVICE_ID:
  2851. case QCA6390_DEVICE_ID:
  2852. case QCN7605_DEVICE_ID:
  2853. case QCA6490_DEVICE_ID:
  2854. case KIWI_DEVICE_ID:
  2855. case MANGO_DEVICE_ID:
  2856. case PEACH_DEVICE_ID:
  2857. cnss_unregister_ramdump_v2(plat_priv);
  2858. break;
  2859. default:
  2860. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  2861. break;
  2862. }
  2863. }
  2864. #else
  2865. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  2866. {
  2867. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2868. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  2869. struct device *dev = &plat_priv->plat_dev->dev;
  2870. u32 ramdump_size = 0;
  2871. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  2872. &ramdump_size) == 0)
  2873. info_v2->ramdump_size = ramdump_size;
  2874. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  2875. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  2876. if (!info_v2->dump_data_vaddr)
  2877. return -ENOMEM;
  2878. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  2879. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  2880. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  2881. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  2882. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  2883. sizeof(dump_data->name));
  2884. info_v2->ramdump_dev = dev;
  2885. return 0;
  2886. }
  2887. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  2888. {
  2889. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2890. info_v2->ramdump_dev = NULL;
  2891. kfree(info_v2->dump_data_vaddr);
  2892. info_v2->dump_data_vaddr = NULL;
  2893. info_v2->dump_data_valid = false;
  2894. }
  2895. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  2896. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  2897. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2898. phys_addr_t *pa, unsigned long attrs)
  2899. {
  2900. struct sg_table sgt;
  2901. int ret;
  2902. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  2903. if (ret) {
  2904. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  2905. va, &dma, size, attrs);
  2906. return -EINVAL;
  2907. }
  2908. *pa = page_to_phys(sg_page(sgt.sgl));
  2909. sg_free_table(&sgt);
  2910. return 0;
  2911. }
  2912. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2913. enum cnss_fw_dump_type type, int seg_no,
  2914. void *va, phys_addr_t pa, size_t size)
  2915. {
  2916. struct md_region md_entry;
  2917. int ret;
  2918. switch (type) {
  2919. case CNSS_FW_IMAGE:
  2920. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2921. seg_no);
  2922. break;
  2923. case CNSS_FW_RDDM:
  2924. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2925. seg_no);
  2926. break;
  2927. case CNSS_FW_REMOTE_HEAP:
  2928. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2929. seg_no);
  2930. break;
  2931. default:
  2932. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2933. return -EINVAL;
  2934. }
  2935. md_entry.phys_addr = pa;
  2936. md_entry.virt_addr = (uintptr_t)va;
  2937. md_entry.size = size;
  2938. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2939. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2940. md_entry.name, va, &pa, size);
  2941. ret = msm_minidump_add_region(&md_entry);
  2942. if (ret < 0)
  2943. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  2944. return ret;
  2945. }
  2946. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2947. enum cnss_fw_dump_type type, int seg_no,
  2948. void *va, phys_addr_t pa, size_t size)
  2949. {
  2950. struct md_region md_entry;
  2951. int ret;
  2952. switch (type) {
  2953. case CNSS_FW_IMAGE:
  2954. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  2955. seg_no);
  2956. break;
  2957. case CNSS_FW_RDDM:
  2958. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  2959. seg_no);
  2960. break;
  2961. case CNSS_FW_REMOTE_HEAP:
  2962. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  2963. seg_no);
  2964. break;
  2965. default:
  2966. cnss_pr_err("Unknown dump type ID: %d\n", type);
  2967. return -EINVAL;
  2968. }
  2969. md_entry.phys_addr = pa;
  2970. md_entry.virt_addr = (uintptr_t)va;
  2971. md_entry.size = size;
  2972. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2973. cnss_pr_dbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  2974. md_entry.name, va, &pa, size);
  2975. ret = msm_minidump_remove_region(&md_entry);
  2976. if (ret)
  2977. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  2978. ret);
  2979. return ret;
  2980. }
  2981. #else
  2982. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  2983. phys_addr_t *pa, unsigned long attrs)
  2984. {
  2985. return 0;
  2986. }
  2987. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  2988. enum cnss_fw_dump_type type, int seg_no,
  2989. void *va, phys_addr_t pa, size_t size)
  2990. {
  2991. return 0;
  2992. }
  2993. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  2994. enum cnss_fw_dump_type type, int seg_no,
  2995. void *va, phys_addr_t pa, size_t size)
  2996. {
  2997. return 0;
  2998. }
  2999. #endif /* CONFIG_QCOM_MINIDUMP */
  3000. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3001. const struct firmware **fw_entry,
  3002. const char *filename)
  3003. {
  3004. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3005. return request_firmware_direct(fw_entry, filename,
  3006. &plat_priv->plat_dev->dev);
  3007. else
  3008. return firmware_request_nowarn(fw_entry, filename,
  3009. &plat_priv->plat_dev->dev);
  3010. }
  3011. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3012. /**
  3013. * cnss_register_bus_scale() - Setup interconnect voting data
  3014. * @plat_priv: Platform data structure
  3015. *
  3016. * For different interconnect path configured in device tree setup voting data
  3017. * for list of bandwidth requirements.
  3018. *
  3019. * Result: 0 for success. -EINVAL if not configured
  3020. */
  3021. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3022. {
  3023. int ret = -EINVAL;
  3024. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3025. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3026. struct device *dev = &plat_priv->plat_dev->dev;
  3027. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3028. ret = of_property_read_u32(dev->of_node,
  3029. "qcom,icc-path-count",
  3030. &plat_priv->icc.path_count);
  3031. if (ret) {
  3032. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3033. return 0;
  3034. }
  3035. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3036. "qcom,bus-bw-cfg-count",
  3037. &plat_priv->icc.bus_bw_cfg_count);
  3038. if (ret) {
  3039. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3040. goto cleanup;
  3041. }
  3042. cfg_arr_size = plat_priv->icc.path_count *
  3043. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3044. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3045. if (!cfg_arr) {
  3046. cnss_pr_err("Failed to alloc cfg table mem\n");
  3047. ret = -ENOMEM;
  3048. goto cleanup;
  3049. }
  3050. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3051. "qcom,bus-bw-cfg", cfg_arr,
  3052. cfg_arr_size);
  3053. if (ret) {
  3054. cnss_pr_err("Invalid Bus BW Config Table\n");
  3055. goto cleanup;
  3056. }
  3057. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3058. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3059. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3060. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3061. GFP_KERNEL);
  3062. if (!bus_bw_info) {
  3063. ret = -ENOMEM;
  3064. goto out;
  3065. }
  3066. ret = of_property_read_string_index(dev->of_node,
  3067. "interconnect-names", idx,
  3068. &bus_bw_info->icc_name);
  3069. if (ret)
  3070. goto out;
  3071. bus_bw_info->icc_path =
  3072. of_icc_get(&plat_priv->plat_dev->dev,
  3073. bus_bw_info->icc_name);
  3074. if (IS_ERR(bus_bw_info->icc_path)) {
  3075. ret = PTR_ERR(bus_bw_info->icc_path);
  3076. if (ret != -EPROBE_DEFER) {
  3077. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3078. bus_bw_info->icc_name, ret);
  3079. goto out;
  3080. }
  3081. }
  3082. bus_bw_info->cfg_table =
  3083. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3084. sizeof(*bus_bw_info->cfg_table),
  3085. GFP_KERNEL);
  3086. if (!bus_bw_info->cfg_table) {
  3087. ret = -ENOMEM;
  3088. goto out;
  3089. }
  3090. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3091. bus_bw_info->icc_name);
  3092. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3093. CNSS_ICC_VOTE_MAX);
  3094. i < plat_priv->icc.bus_bw_cfg_count;
  3095. i++, j += 2) {
  3096. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3097. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3098. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3099. i, bus_bw_info->cfg_table[i].avg_bw,
  3100. bus_bw_info->cfg_table[i].peak_bw);
  3101. }
  3102. list_add_tail(&bus_bw_info->list,
  3103. &plat_priv->icc.list_head);
  3104. }
  3105. kfree(cfg_arr);
  3106. return 0;
  3107. out:
  3108. list_for_each_entry_safe(bus_bw_info, tmp,
  3109. &plat_priv->icc.list_head, list) {
  3110. list_del(&bus_bw_info->list);
  3111. }
  3112. cleanup:
  3113. kfree(cfg_arr);
  3114. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3115. return ret;
  3116. }
  3117. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3118. {
  3119. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3120. list_for_each_entry_safe(bus_bw_info, tmp,
  3121. &plat_priv->icc.list_head, list) {
  3122. list_del(&bus_bw_info->list);
  3123. if (bus_bw_info->icc_path)
  3124. icc_put(bus_bw_info->icc_path);
  3125. }
  3126. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3127. }
  3128. #else
  3129. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3130. {
  3131. return 0;
  3132. }
  3133. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3134. #endif /* CONFIG_INTERCONNECT */
  3135. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3136. {
  3137. struct cnss_plat_data *plat_priv = cb_ctx;
  3138. if (!plat_priv) {
  3139. cnss_pr_err("%s: Invalid context\n", __func__);
  3140. return;
  3141. }
  3142. if (status) {
  3143. cnss_pr_info("CNSS Daemon connected\n");
  3144. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3145. complete(&plat_priv->daemon_connected);
  3146. } else {
  3147. cnss_pr_info("CNSS Daemon disconnected\n");
  3148. reinit_completion(&plat_priv->daemon_connected);
  3149. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3150. }
  3151. }
  3152. static ssize_t enable_hds_store(struct device *dev,
  3153. struct device_attribute *attr,
  3154. const char *buf, size_t count)
  3155. {
  3156. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3157. unsigned int enable_hds = 0;
  3158. if (!plat_priv)
  3159. return -ENODEV;
  3160. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3161. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3162. return -EINVAL;
  3163. }
  3164. if (enable_hds)
  3165. plat_priv->hds_enabled = true;
  3166. else
  3167. plat_priv->hds_enabled = false;
  3168. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3169. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3170. return count;
  3171. }
  3172. static ssize_t recovery_show(struct device *dev,
  3173. struct device_attribute *attr,
  3174. char *buf)
  3175. {
  3176. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3177. u32 buf_size = PAGE_SIZE;
  3178. u32 curr_len = 0;
  3179. u32 buf_written = 0;
  3180. if (!plat_priv)
  3181. return -ENODEV;
  3182. buf_written = scnprintf(buf, buf_size,
  3183. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3184. "BIT0 -- wlan fw recovery\n"
  3185. "BIT1 -- wlan pcss recovery\n"
  3186. "---------------------------------\n");
  3187. curr_len += buf_written;
  3188. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3189. "WLAN recovery %s[%d]\n",
  3190. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3191. plat_priv->recovery_enabled);
  3192. curr_len += buf_written;
  3193. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3194. "WLAN PCSS recovery %s[%d]\n",
  3195. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3196. plat_priv->recovery_pcss_enabled);
  3197. curr_len += buf_written;
  3198. /*
  3199. * Now size of curr_len is not over page size for sure,
  3200. * later if new item or none-fixed size item added, need
  3201. * add check to make sure curr_len is not over page size.
  3202. */
  3203. return curr_len;
  3204. }
  3205. static ssize_t time_sync_period_show(struct device *dev,
  3206. struct device_attribute *attr,
  3207. char *buf)
  3208. {
  3209. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3210. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3211. plat_priv->ctrl_params.time_sync_period);
  3212. }
  3213. static ssize_t time_sync_period_store(struct device *dev,
  3214. struct device_attribute *attr,
  3215. const char *buf, size_t count)
  3216. {
  3217. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3218. unsigned int time_sync_period = 0;
  3219. if (!plat_priv)
  3220. return -ENODEV;
  3221. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3222. cnss_pr_err("Invalid time sync sysfs command\n");
  3223. return -EINVAL;
  3224. }
  3225. if (time_sync_period >= CNSS_MIN_TIME_SYNC_PERIOD)
  3226. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3227. return count;
  3228. }
  3229. static ssize_t recovery_store(struct device *dev,
  3230. struct device_attribute *attr,
  3231. const char *buf, size_t count)
  3232. {
  3233. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3234. unsigned int recovery = 0;
  3235. if (!plat_priv)
  3236. return -ENODEV;
  3237. if (sscanf(buf, "%du", &recovery) != 1) {
  3238. cnss_pr_err("Invalid recovery sysfs command\n");
  3239. return -EINVAL;
  3240. }
  3241. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3242. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3243. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3244. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3245. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3246. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3247. cnss_send_subsys_restart_level_msg(plat_priv);
  3248. return count;
  3249. }
  3250. static ssize_t shutdown_store(struct device *dev,
  3251. struct device_attribute *attr,
  3252. const char *buf, size_t count)
  3253. {
  3254. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3255. if (plat_priv) {
  3256. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3257. del_timer(&plat_priv->fw_boot_timer);
  3258. complete_all(&plat_priv->power_up_complete);
  3259. complete_all(&plat_priv->cal_complete);
  3260. }
  3261. cnss_pr_dbg("Received shutdown notification\n");
  3262. return count;
  3263. }
  3264. static ssize_t fs_ready_store(struct device *dev,
  3265. struct device_attribute *attr,
  3266. const char *buf, size_t count)
  3267. {
  3268. int fs_ready = 0;
  3269. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3270. if (sscanf(buf, "%du", &fs_ready) != 1)
  3271. return -EINVAL;
  3272. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3273. fs_ready, count);
  3274. if (!plat_priv) {
  3275. cnss_pr_err("plat_priv is NULL\n");
  3276. return count;
  3277. }
  3278. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3279. cnss_pr_dbg("QMI is bypassed\n");
  3280. return count;
  3281. }
  3282. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3283. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3284. cnss_driver_event_post(plat_priv,
  3285. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3286. 0, NULL);
  3287. }
  3288. return count;
  3289. }
  3290. static ssize_t qdss_trace_start_store(struct device *dev,
  3291. struct device_attribute *attr,
  3292. const char *buf, size_t count)
  3293. {
  3294. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3295. wlfw_qdss_trace_start(plat_priv);
  3296. cnss_pr_dbg("Received QDSS start command\n");
  3297. return count;
  3298. }
  3299. static ssize_t qdss_trace_stop_store(struct device *dev,
  3300. struct device_attribute *attr,
  3301. const char *buf, size_t count)
  3302. {
  3303. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3304. u32 option = 0;
  3305. if (sscanf(buf, "%du", &option) != 1)
  3306. return -EINVAL;
  3307. wlfw_qdss_trace_stop(plat_priv, option);
  3308. cnss_pr_dbg("Received QDSS stop command\n");
  3309. return count;
  3310. }
  3311. static ssize_t qdss_conf_download_store(struct device *dev,
  3312. struct device_attribute *attr,
  3313. const char *buf, size_t count)
  3314. {
  3315. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3316. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3317. cnss_pr_dbg("Received QDSS download config command\n");
  3318. return count;
  3319. }
  3320. static ssize_t hw_trace_override_store(struct device *dev,
  3321. struct device_attribute *attr,
  3322. const char *buf, size_t count)
  3323. {
  3324. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3325. int tmp = 0;
  3326. if (sscanf(buf, "%du", &tmp) != 1)
  3327. return -EINVAL;
  3328. plat_priv->hw_trc_override = tmp;
  3329. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3330. return count;
  3331. }
  3332. static ssize_t charger_mode_store(struct device *dev,
  3333. struct device_attribute *attr,
  3334. const char *buf, size_t count)
  3335. {
  3336. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3337. int tmp = 0;
  3338. if (sscanf(buf, "%du", &tmp) != 1)
  3339. return -EINVAL;
  3340. plat_priv->charger_mode = tmp;
  3341. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3342. return count;
  3343. }
  3344. static DEVICE_ATTR_WO(fs_ready);
  3345. static DEVICE_ATTR_WO(shutdown);
  3346. static DEVICE_ATTR_RW(recovery);
  3347. static DEVICE_ATTR_WO(enable_hds);
  3348. static DEVICE_ATTR_WO(qdss_trace_start);
  3349. static DEVICE_ATTR_WO(qdss_trace_stop);
  3350. static DEVICE_ATTR_WO(qdss_conf_download);
  3351. static DEVICE_ATTR_WO(hw_trace_override);
  3352. static DEVICE_ATTR_WO(charger_mode);
  3353. static DEVICE_ATTR_RW(time_sync_period);
  3354. static struct attribute *cnss_attrs[] = {
  3355. &dev_attr_fs_ready.attr,
  3356. &dev_attr_shutdown.attr,
  3357. &dev_attr_recovery.attr,
  3358. &dev_attr_enable_hds.attr,
  3359. &dev_attr_qdss_trace_start.attr,
  3360. &dev_attr_qdss_trace_stop.attr,
  3361. &dev_attr_qdss_conf_download.attr,
  3362. &dev_attr_hw_trace_override.attr,
  3363. &dev_attr_charger_mode.attr,
  3364. &dev_attr_time_sync_period.attr,
  3365. NULL,
  3366. };
  3367. static struct attribute_group cnss_attr_group = {
  3368. .attrs = cnss_attrs,
  3369. };
  3370. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3371. {
  3372. struct device *dev = &plat_priv->plat_dev->dev;
  3373. int ret;
  3374. char cnss_name[CNSS_FS_NAME_SIZE];
  3375. char shutdown_name[32];
  3376. if (cnss_is_dual_wlan_enabled()) {
  3377. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3378. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3379. snprintf(shutdown_name, sizeof(shutdown_name),
  3380. "shutdown_wlan_%d", plat_priv->plat_idx);
  3381. } else {
  3382. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3383. snprintf(shutdown_name, sizeof(shutdown_name),
  3384. "shutdown_wlan");
  3385. }
  3386. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3387. if (ret) {
  3388. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3389. ret);
  3390. goto out;
  3391. }
  3392. /* This is only for backward compatibility. */
  3393. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3394. if (ret) {
  3395. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3396. ret);
  3397. goto rm_cnss_link;
  3398. }
  3399. return 0;
  3400. rm_cnss_link:
  3401. sysfs_remove_link(kernel_kobj, cnss_name);
  3402. out:
  3403. return ret;
  3404. }
  3405. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3406. {
  3407. char cnss_name[CNSS_FS_NAME_SIZE];
  3408. char shutdown_name[32];
  3409. if (cnss_is_dual_wlan_enabled()) {
  3410. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3411. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3412. snprintf(shutdown_name, sizeof(shutdown_name),
  3413. "shutdown_wlan_%d", plat_priv->plat_idx);
  3414. } else {
  3415. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3416. snprintf(shutdown_name, sizeof(shutdown_name),
  3417. "shutdown_wlan");
  3418. }
  3419. sysfs_remove_link(kernel_kobj, shutdown_name);
  3420. sysfs_remove_link(kernel_kobj, cnss_name);
  3421. }
  3422. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3423. {
  3424. int ret = 0;
  3425. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3426. &cnss_attr_group);
  3427. if (ret) {
  3428. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3429. ret);
  3430. goto out;
  3431. }
  3432. cnss_create_sysfs_link(plat_priv);
  3433. return 0;
  3434. out:
  3435. return ret;
  3436. }
  3437. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3438. {
  3439. cnss_remove_sysfs_link(plat_priv);
  3440. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3441. }
  3442. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3443. {
  3444. spin_lock_init(&plat_priv->event_lock);
  3445. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3446. WQ_UNBOUND, 1);
  3447. if (!plat_priv->event_wq) {
  3448. cnss_pr_err("Failed to create event workqueue!\n");
  3449. return -EFAULT;
  3450. }
  3451. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3452. INIT_LIST_HEAD(&plat_priv->event_list);
  3453. return 0;
  3454. }
  3455. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3456. {
  3457. destroy_workqueue(plat_priv->event_wq);
  3458. }
  3459. static int cnss_reboot_notifier(struct notifier_block *nb,
  3460. unsigned long action,
  3461. void *data)
  3462. {
  3463. struct cnss_plat_data *plat_priv =
  3464. container_of(nb, struct cnss_plat_data, reboot_nb);
  3465. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3466. del_timer(&plat_priv->fw_boot_timer);
  3467. complete_all(&plat_priv->power_up_complete);
  3468. complete_all(&plat_priv->cal_complete);
  3469. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3470. return NOTIFY_DONE;
  3471. }
  3472. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3473. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3474. {
  3475. struct Object client_env;
  3476. struct Object app_object;
  3477. u32 wifi_uid = HW_WIFI_UID;
  3478. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3479. int ret;
  3480. u8 state = 0;
  3481. /* Once this flag is set, secure peripheral feature
  3482. * will not be supported till next reboot
  3483. */
  3484. if (plat_priv->sec_peri_feature_disable)
  3485. return 0;
  3486. /* get rootObj */
  3487. ret = get_client_env_object(&client_env);
  3488. if (ret) {
  3489. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3490. goto end;
  3491. }
  3492. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3493. if (ret) {
  3494. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3495. if (ret == FEATURE_NOT_SUPPORTED) {
  3496. ret = 0; /* Do not Assert */
  3497. plat_priv->sec_peri_feature_disable = true;
  3498. cnss_pr_dbg("Secure HW feature not supported\n");
  3499. }
  3500. goto exit_release_clientenv;
  3501. }
  3502. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3503. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3504. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3505. ObjectCounts_pack(1, 1, 0, 0));
  3506. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3507. if (ret) {
  3508. if (ret == PERIPHERAL_NOT_FOUND) {
  3509. ret = 0; /* Do not Assert */
  3510. plat_priv->sec_peri_feature_disable = true;
  3511. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3512. }
  3513. goto exit_release_app_obj;
  3514. }
  3515. if (state == 1)
  3516. set_bit(CNSS_WLAN_HW_DISABLED,
  3517. &plat_priv->driver_state);
  3518. else
  3519. clear_bit(CNSS_WLAN_HW_DISABLED,
  3520. &plat_priv->driver_state);
  3521. exit_release_app_obj:
  3522. Object_release(app_object);
  3523. exit_release_clientenv:
  3524. Object_release(client_env);
  3525. end:
  3526. if (ret) {
  3527. cnss_pr_err("Unable to get HW disable status\n");
  3528. CNSS_ASSERT(0);
  3529. }
  3530. return ret;
  3531. }
  3532. #else
  3533. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3534. {
  3535. return 0;
  3536. }
  3537. #endif
  3538. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3539. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3540. {
  3541. }
  3542. #else
  3543. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3544. {
  3545. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3546. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3547. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3548. }
  3549. #endif
  3550. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  3551. {
  3552. int ret;
  3553. ret = cnss_init_sol_gpio(plat_priv);
  3554. if (ret)
  3555. return ret;
  3556. timer_setup(&plat_priv->fw_boot_timer,
  3557. cnss_bus_fw_boot_timeout_hdlr, 0);
  3558. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  3559. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  3560. if (ret)
  3561. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  3562. ret);
  3563. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  3564. if (ret)
  3565. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3566. ret);
  3567. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  3568. init_completion(&plat_priv->power_up_complete);
  3569. init_completion(&plat_priv->cal_complete);
  3570. init_completion(&plat_priv->rddm_complete);
  3571. init_completion(&plat_priv->recovery_complete);
  3572. init_completion(&plat_priv->daemon_connected);
  3573. mutex_init(&plat_priv->dev_lock);
  3574. mutex_init(&plat_priv->driver_ops_lock);
  3575. plat_priv->recovery_ws =
  3576. wakeup_source_register(&plat_priv->plat_dev->dev,
  3577. "CNSS_FW_RECOVERY");
  3578. if (!plat_priv->recovery_ws)
  3579. cnss_pr_err("Failed to setup FW recovery wake source\n");
  3580. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3581. cnss_daemon_connection_update_cb,
  3582. plat_priv);
  3583. if (ret)
  3584. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  3585. ret);
  3586. cnss_sram_dump_init(plat_priv);
  3587. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3588. "qcom,rc-ep-short-channel"))
  3589. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  3590. return 0;
  3591. }
  3592. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3593. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3594. {
  3595. }
  3596. #else
  3597. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  3598. {
  3599. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3600. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3601. kfree(plat_priv->sram_dump);
  3602. }
  3603. #endif
  3604. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  3605. {
  3606. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  3607. plat_priv);
  3608. complete_all(&plat_priv->recovery_complete);
  3609. complete_all(&plat_priv->rddm_complete);
  3610. complete_all(&plat_priv->cal_complete);
  3611. complete_all(&plat_priv->power_up_complete);
  3612. complete_all(&plat_priv->daemon_connected);
  3613. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  3614. unregister_reboot_notifier(&plat_priv->reboot_nb);
  3615. del_timer(&plat_priv->fw_boot_timer);
  3616. wakeup_source_unregister(plat_priv->recovery_ws);
  3617. cnss_deinit_sol_gpio(plat_priv);
  3618. cnss_sram_dump_deinit(plat_priv);
  3619. kfree(plat_priv->on_chip_pmic_board_ids);
  3620. }
  3621. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  3622. {
  3623. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  3624. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  3625. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3626. "qcom,wlan-cbc-enabled");
  3627. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  3628. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  3629. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  3630. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  3631. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  3632. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  3633. * enabled by default
  3634. */
  3635. plat_priv->adsp_pc_enabled = true;
  3636. }
  3637. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  3638. {
  3639. struct device *dev = &plat_priv->plat_dev->dev;
  3640. plat_priv->use_pm_domain =
  3641. of_property_read_bool(dev->of_node, "use-pm-domain");
  3642. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  3643. }
  3644. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  3645. {
  3646. struct device *dev = &plat_priv->plat_dev->dev;
  3647. plat_priv->set_wlaon_pwr_ctrl =
  3648. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  3649. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  3650. plat_priv->set_wlaon_pwr_ctrl);
  3651. }
  3652. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  3653. {
  3654. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3655. "qcom,converged-dt") ||
  3656. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3657. "qcom,same-dt-multi-dev") ||
  3658. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3659. "qcom,multi-wlan-exchg"));
  3660. }
  3661. static const struct platform_device_id cnss_platform_id_table[] = {
  3662. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  3663. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  3664. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  3665. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  3666. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  3667. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  3668. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  3669. { .name = "qcaconv", .driver_data = 0, },
  3670. { },
  3671. };
  3672. static const struct of_device_id cnss_of_match_table[] = {
  3673. {
  3674. .compatible = "qcom,cnss",
  3675. .data = (void *)&cnss_platform_id_table[0]},
  3676. {
  3677. .compatible = "qcom,cnss-qca6290",
  3678. .data = (void *)&cnss_platform_id_table[1]},
  3679. {
  3680. .compatible = "qcom,cnss-qca6390",
  3681. .data = (void *)&cnss_platform_id_table[2]},
  3682. {
  3683. .compatible = "qcom,cnss-qca6490",
  3684. .data = (void *)&cnss_platform_id_table[3]},
  3685. {
  3686. .compatible = "qcom,cnss-kiwi",
  3687. .data = (void *)&cnss_platform_id_table[4]},
  3688. {
  3689. .compatible = "qcom,cnss-mango",
  3690. .data = (void *)&cnss_platform_id_table[5]},
  3691. {
  3692. .compatible = "qcom,cnss-peach",
  3693. .data = (void *)&cnss_platform_id_table[6]},
  3694. {
  3695. .compatible = "qcom,cnss-qca-converged",
  3696. .data = (void *)&cnss_platform_id_table[7]},
  3697. { },
  3698. };
  3699. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  3700. static inline bool
  3701. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  3702. {
  3703. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  3704. "use-nv-mac");
  3705. }
  3706. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  3707. {
  3708. struct device_node *child;
  3709. u32 id, i;
  3710. int id_n, device_identifier_gpio, ret;
  3711. u8 gpio_value;
  3712. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  3713. return 0;
  3714. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  3715. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  3716. if (ret) {
  3717. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  3718. return ret;
  3719. }
  3720. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  3721. gpio_value = gpio_get_value(device_identifier_gpio);
  3722. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  3723. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  3724. child) {
  3725. if (strcmp(child->name, "chip_cfg"))
  3726. continue;
  3727. id_n = of_property_count_u32_elems(child, "supported-ids");
  3728. if (id_n <= 0) {
  3729. cnss_pr_err("Device id is NOT set\n");
  3730. return -EINVAL;
  3731. }
  3732. for (i = 0; i < id_n; i++) {
  3733. ret = of_property_read_u32_index(child,
  3734. "supported-ids",
  3735. i, &id);
  3736. if (ret) {
  3737. cnss_pr_err("Failed to read supported ids\n");
  3738. return -EINVAL;
  3739. }
  3740. if (gpio_value && id == QCA6490_DEVICE_ID) {
  3741. plat_priv->plat_dev->dev.of_node = child;
  3742. plat_priv->device_id = QCA6490_DEVICE_ID;
  3743. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  3744. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3745. child->name, i, id);
  3746. return 0;
  3747. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  3748. plat_priv->plat_dev->dev.of_node = child;
  3749. plat_priv->device_id = KIWI_DEVICE_ID;
  3750. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  3751. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  3752. child->name, i, id);
  3753. return 0;
  3754. }
  3755. }
  3756. }
  3757. return -EINVAL;
  3758. }
  3759. static inline u32
  3760. cnss_dt_type(struct cnss_plat_data *plat_priv)
  3761. {
  3762. bool is_converged_dt = of_property_read_bool(
  3763. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  3764. bool is_multi_wlan_xchg;
  3765. if (is_converged_dt)
  3766. return CNSS_DTT_CONVERGED;
  3767. is_multi_wlan_xchg = of_property_read_bool(
  3768. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  3769. if (is_multi_wlan_xchg)
  3770. return CNSS_DTT_MULTIEXCHG;
  3771. return CNSS_DTT_LEGACY;
  3772. }
  3773. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  3774. {
  3775. int ret = 0;
  3776. int retry = 0;
  3777. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  3778. return 0;
  3779. retry:
  3780. ret = cnss_power_on_device(plat_priv, true);
  3781. if (ret)
  3782. goto end;
  3783. ret = cnss_bus_init(plat_priv);
  3784. if (ret) {
  3785. if ((ret != -EPROBE_DEFER) &&
  3786. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  3787. cnss_power_off_device(plat_priv);
  3788. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  3789. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  3790. goto retry;
  3791. }
  3792. goto power_off;
  3793. }
  3794. return 0;
  3795. power_off:
  3796. cnss_power_off_device(plat_priv);
  3797. end:
  3798. return ret;
  3799. }
  3800. int cnss_wlan_hw_enable(void)
  3801. {
  3802. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3803. int ret = 0;
  3804. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  3805. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  3806. goto register_driver;
  3807. ret = cnss_wlan_device_init(plat_priv);
  3808. if (ret) {
  3809. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  3810. CNSS_ASSERT(0);
  3811. return ret;
  3812. }
  3813. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  3814. cnss_driver_event_post(plat_priv,
  3815. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3816. 0, NULL);
  3817. register_driver:
  3818. if (plat_priv->driver_ops)
  3819. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  3820. return ret;
  3821. }
  3822. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  3823. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  3824. {
  3825. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3826. int ret = 0;
  3827. if (!plat_priv)
  3828. return -ENODEV;
  3829. /* If IMS server is connected, return success without QMI send */
  3830. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  3831. cnss_pr_dbg("Ignore host request as IMS server is connected");
  3832. return ret;
  3833. }
  3834. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  3835. return ret;
  3836. }
  3837. EXPORT_SYMBOL(cnss_set_wfc_mode);
  3838. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  3839. unsigned long *thermal_state)
  3840. {
  3841. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3842. if (!tcdev || !tcdev->devdata) {
  3843. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3844. return -EINVAL;
  3845. }
  3846. cnss_tcdev = tcdev->devdata;
  3847. *thermal_state = cnss_tcdev->max_thermal_state;
  3848. return 0;
  3849. }
  3850. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  3851. unsigned long *thermal_state)
  3852. {
  3853. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3854. if (!tcdev || !tcdev->devdata) {
  3855. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3856. return -EINVAL;
  3857. }
  3858. cnss_tcdev = tcdev->devdata;
  3859. *thermal_state = cnss_tcdev->curr_thermal_state;
  3860. return 0;
  3861. }
  3862. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  3863. unsigned long thermal_state)
  3864. {
  3865. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3866. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3867. int ret = 0;
  3868. if (!tcdev || !tcdev->devdata) {
  3869. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  3870. return -EINVAL;
  3871. }
  3872. cnss_tcdev = tcdev->devdata;
  3873. if (thermal_state > cnss_tcdev->max_thermal_state)
  3874. return -EINVAL;
  3875. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  3876. thermal_state, cnss_tcdev->tcdev_id);
  3877. mutex_lock(&plat_priv->tcdev_lock);
  3878. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  3879. thermal_state,
  3880. cnss_tcdev->tcdev_id);
  3881. if (!ret)
  3882. cnss_tcdev->curr_thermal_state = thermal_state;
  3883. mutex_unlock(&plat_priv->tcdev_lock);
  3884. if (ret) {
  3885. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  3886. ret, cnss_tcdev->tcdev_id);
  3887. return ret;
  3888. }
  3889. return 0;
  3890. }
  3891. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  3892. .get_max_state = cnss_tcdev_get_max_state,
  3893. .get_cur_state = cnss_tcdev_get_cur_state,
  3894. .set_cur_state = cnss_tcdev_set_cur_state,
  3895. };
  3896. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  3897. int tcdev_id)
  3898. {
  3899. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3900. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3901. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  3902. struct device_node *dev_node;
  3903. int ret = 0;
  3904. if (!priv) {
  3905. cnss_pr_err("Platform driver is not initialized!\n");
  3906. return -ENODEV;
  3907. }
  3908. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  3909. if (!cnss_tcdev) {
  3910. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  3911. return -ENOMEM;
  3912. }
  3913. cnss_tcdev->tcdev_id = tcdev_id;
  3914. cnss_tcdev->max_thermal_state = max_state;
  3915. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  3916. "qcom,cnss_cdev%d", tcdev_id);
  3917. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  3918. if (!dev_node) {
  3919. cnss_pr_err("Failed to get cooling device node\n");
  3920. kfree(cnss_tcdev);
  3921. return -EINVAL;
  3922. }
  3923. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  3924. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  3925. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  3926. cdev_node_name,
  3927. cnss_tcdev,
  3928. &cnss_cooling_ops);
  3929. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  3930. ret = PTR_ERR(cnss_tcdev->tcdev);
  3931. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  3932. ret, cnss_tcdev->tcdev_id);
  3933. kfree(cnss_tcdev);
  3934. } else {
  3935. cnss_pr_dbg("Cooling device registered for cdev id %d",
  3936. cnss_tcdev->tcdev_id);
  3937. mutex_lock(&priv->tcdev_lock);
  3938. list_add(&cnss_tcdev->tcdev_list,
  3939. &priv->cnss_tcdev_list);
  3940. mutex_unlock(&priv->tcdev_lock);
  3941. }
  3942. } else {
  3943. cnss_pr_dbg("Cooling device registration not supported");
  3944. kfree(cnss_tcdev);
  3945. ret = -EOPNOTSUPP;
  3946. }
  3947. return ret;
  3948. }
  3949. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  3950. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  3951. {
  3952. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3953. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3954. if (!priv) {
  3955. cnss_pr_err("Platform driver is not initialized!\n");
  3956. return;
  3957. }
  3958. mutex_lock(&priv->tcdev_lock);
  3959. while (!list_empty(&priv->cnss_tcdev_list)) {
  3960. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  3961. struct cnss_thermal_cdev,
  3962. tcdev_list);
  3963. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  3964. list_del(&cnss_tcdev->tcdev_list);
  3965. kfree(cnss_tcdev);
  3966. }
  3967. mutex_unlock(&priv->tcdev_lock);
  3968. }
  3969. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  3970. int cnss_get_curr_therm_cdev_state(struct device *dev,
  3971. unsigned long *thermal_state,
  3972. int tcdev_id)
  3973. {
  3974. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  3975. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  3976. if (!priv) {
  3977. cnss_pr_err("Platform driver is not initialized!\n");
  3978. return -ENODEV;
  3979. }
  3980. mutex_lock(&priv->tcdev_lock);
  3981. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  3982. if (cnss_tcdev->tcdev_id != tcdev_id)
  3983. continue;
  3984. *thermal_state = cnss_tcdev->curr_thermal_state;
  3985. mutex_unlock(&priv->tcdev_lock);
  3986. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  3987. cnss_tcdev->curr_thermal_state, tcdev_id);
  3988. return 0;
  3989. }
  3990. mutex_unlock(&priv->tcdev_lock);
  3991. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  3992. return -EINVAL;
  3993. }
  3994. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  3995. static int cnss_probe(struct platform_device *plat_dev)
  3996. {
  3997. int ret = 0;
  3998. struct cnss_plat_data *plat_priv;
  3999. const struct of_device_id *of_id;
  4000. const struct platform_device_id *device_id;
  4001. if (cnss_get_plat_priv(plat_dev)) {
  4002. cnss_pr_err("Driver is already initialized!\n");
  4003. ret = -EEXIST;
  4004. goto out;
  4005. }
  4006. ret = cnss_plat_env_available();
  4007. if (ret)
  4008. goto out;
  4009. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4010. if (!of_id || !of_id->data) {
  4011. cnss_pr_err("Failed to find of match device!\n");
  4012. ret = -ENODEV;
  4013. goto out;
  4014. }
  4015. device_id = of_id->data;
  4016. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4017. GFP_KERNEL);
  4018. if (!plat_priv) {
  4019. ret = -ENOMEM;
  4020. goto out;
  4021. }
  4022. plat_priv->plat_dev = plat_dev;
  4023. plat_priv->dev_node = NULL;
  4024. plat_priv->device_id = device_id->driver_data;
  4025. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4026. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4027. plat_priv->dt_type);
  4028. plat_priv->use_fw_path_with_prefix =
  4029. cnss_use_fw_path_with_prefix(plat_priv);
  4030. ret = cnss_get_dev_cfg_node(plat_priv);
  4031. if (ret) {
  4032. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4033. goto reset_plat_dev;
  4034. }
  4035. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4036. if (ret)
  4037. cnss_pr_err("Failed to find bus ops name, err = %d\n",
  4038. ret);
  4039. ret = cnss_get_rc_num(plat_priv);
  4040. if (ret)
  4041. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4042. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4043. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4044. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4045. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4046. cnss_set_plat_priv(plat_dev, plat_priv);
  4047. cnss_set_device_name(plat_priv);
  4048. platform_set_drvdata(plat_dev, plat_priv);
  4049. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4050. INIT_LIST_HEAD(&plat_priv->clk_list);
  4051. cnss_get_pm_domain_info(plat_priv);
  4052. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4053. cnss_power_misc_params_init(plat_priv);
  4054. cnss_get_tcs_info(plat_priv);
  4055. cnss_get_cpr_info(plat_priv);
  4056. cnss_aop_mbox_init(plat_priv);
  4057. cnss_init_control_params(plat_priv);
  4058. ret = cnss_get_resources(plat_priv);
  4059. if (ret)
  4060. goto reset_ctx;
  4061. ret = cnss_register_esoc(plat_priv);
  4062. if (ret)
  4063. goto free_res;
  4064. ret = cnss_register_bus_scale(plat_priv);
  4065. if (ret)
  4066. goto unreg_esoc;
  4067. ret = cnss_create_sysfs(plat_priv);
  4068. if (ret)
  4069. goto unreg_bus_scale;
  4070. ret = cnss_event_work_init(plat_priv);
  4071. if (ret)
  4072. goto remove_sysfs;
  4073. ret = cnss_dms_init(plat_priv);
  4074. if (ret)
  4075. goto deinit_event_work;
  4076. ret = cnss_debugfs_create(plat_priv);
  4077. if (ret)
  4078. goto deinit_dms;
  4079. ret = cnss_misc_init(plat_priv);
  4080. if (ret)
  4081. goto destroy_debugfs;
  4082. ret = cnss_wlan_hw_disable_check(plat_priv);
  4083. if (ret)
  4084. goto deinit_misc;
  4085. /* Make sure all platform related init are done before
  4086. * device power on and bus init.
  4087. */
  4088. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4089. ret = cnss_wlan_device_init(plat_priv);
  4090. if (ret)
  4091. goto deinit_misc;
  4092. } else {
  4093. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4094. }
  4095. cnss_register_coex_service(plat_priv);
  4096. cnss_register_ims_service(plat_priv);
  4097. mutex_init(&plat_priv->tcdev_lock);
  4098. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4099. cnss_pr_info("Platform driver probed successfully.\n");
  4100. return 0;
  4101. deinit_misc:
  4102. cnss_misc_deinit(plat_priv);
  4103. destroy_debugfs:
  4104. cnss_debugfs_destroy(plat_priv);
  4105. deinit_dms:
  4106. cnss_dms_deinit(plat_priv);
  4107. deinit_event_work:
  4108. cnss_event_work_deinit(plat_priv);
  4109. remove_sysfs:
  4110. cnss_remove_sysfs(plat_priv);
  4111. unreg_bus_scale:
  4112. cnss_unregister_bus_scale(plat_priv);
  4113. unreg_esoc:
  4114. cnss_unregister_esoc(plat_priv);
  4115. free_res:
  4116. cnss_put_resources(plat_priv);
  4117. reset_ctx:
  4118. platform_set_drvdata(plat_dev, NULL);
  4119. reset_plat_dev:
  4120. cnss_clear_plat_priv(plat_priv);
  4121. out:
  4122. return ret;
  4123. }
  4124. static int cnss_remove(struct platform_device *plat_dev)
  4125. {
  4126. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4127. plat_priv->audio_iommu_domain = NULL;
  4128. cnss_genl_exit();
  4129. cnss_unregister_ims_service(plat_priv);
  4130. cnss_unregister_coex_service(plat_priv);
  4131. cnss_bus_deinit(plat_priv);
  4132. cnss_misc_deinit(plat_priv);
  4133. cnss_debugfs_destroy(plat_priv);
  4134. cnss_dms_deinit(plat_priv);
  4135. cnss_qmi_deinit(plat_priv);
  4136. cnss_event_work_deinit(plat_priv);
  4137. cnss_cancel_dms_work();
  4138. cnss_remove_sysfs(plat_priv);
  4139. cnss_unregister_bus_scale(plat_priv);
  4140. cnss_unregister_esoc(plat_priv);
  4141. cnss_put_resources(plat_priv);
  4142. if (!IS_ERR_OR_NULL(plat_priv->mbox_chan))
  4143. mbox_free_channel(plat_priv->mbox_chan);
  4144. platform_set_drvdata(plat_dev, NULL);
  4145. cnss_clear_plat_priv(plat_priv);
  4146. return 0;
  4147. }
  4148. static struct platform_driver cnss_platform_driver = {
  4149. .probe = cnss_probe,
  4150. .remove = cnss_remove,
  4151. .driver = {
  4152. .name = "cnss2",
  4153. .of_match_table = cnss_of_match_table,
  4154. #ifdef CONFIG_CNSS_ASYNC
  4155. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4156. #endif
  4157. },
  4158. };
  4159. static bool cnss_check_compatible_node(void)
  4160. {
  4161. struct device_node *dn = NULL;
  4162. for_each_matching_node(dn, cnss_of_match_table) {
  4163. if (of_device_is_available(dn)) {
  4164. cnss_allow_driver_loading = true;
  4165. return true;
  4166. }
  4167. }
  4168. return false;
  4169. }
  4170. /**
  4171. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4172. *
  4173. * Valid device tree node means a node with "compatible" property from the
  4174. * device match table and "status" property is not disabled.
  4175. *
  4176. * Return: true if valid device tree node found, false if not found
  4177. */
  4178. static bool cnss_is_valid_dt_node_found(void)
  4179. {
  4180. struct device_node *dn = NULL;
  4181. for_each_matching_node(dn, cnss_of_match_table) {
  4182. if (of_device_is_available(dn))
  4183. break;
  4184. }
  4185. if (dn)
  4186. return true;
  4187. return false;
  4188. }
  4189. static int __init cnss_initialize(void)
  4190. {
  4191. int ret = 0;
  4192. if (!cnss_is_valid_dt_node_found())
  4193. return -ENODEV;
  4194. if (!cnss_check_compatible_node())
  4195. return ret;
  4196. cnss_debug_init();
  4197. ret = platform_driver_register(&cnss_platform_driver);
  4198. if (ret)
  4199. cnss_debug_deinit();
  4200. ret = cnss_genl_init();
  4201. if (ret < 0)
  4202. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4203. return ret;
  4204. }
  4205. static void __exit cnss_exit(void)
  4206. {
  4207. cnss_genl_exit();
  4208. platform_driver_unregister(&cnss_platform_driver);
  4209. cnss_debug_deinit();
  4210. }
  4211. module_init(cnss_initialize);
  4212. module_exit(cnss_exit);
  4213. MODULE_LICENSE("GPL v2");
  4214. MODULE_DESCRIPTION("CNSS2 Platform Driver");