dp_tx.c 182 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "htt.h"
  20. #include "dp_htt.h"
  21. #include "hal_hw_headers.h"
  22. #include "dp_tx.h"
  23. #include "dp_tx_desc.h"
  24. #include "dp_peer.h"
  25. #include "dp_types.h"
  26. #include "hal_tx.h"
  27. #include "qdf_mem.h"
  28. #include "qdf_nbuf.h"
  29. #include "qdf_net_types.h"
  30. #include "qdf_module.h"
  31. #include <wlan_cfg.h>
  32. #include "dp_ipa.h"
  33. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  34. #include "if_meta_hdr.h"
  35. #endif
  36. #include "enet.h"
  37. #include "dp_internal.h"
  38. #ifdef ATH_SUPPORT_IQUE
  39. #include "dp_txrx_me.h"
  40. #endif
  41. #include "dp_hist.h"
  42. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  43. #include <wlan_dp_swlm.h>
  44. #endif
  45. #ifdef WIFI_MONITOR_SUPPORT
  46. #include <dp_mon.h>
  47. #endif
  48. #ifdef FEATURE_WDS
  49. #include "dp_txrx_wds.h"
  50. #endif
  51. #include "cdp_txrx_cmn_reg.h"
  52. #ifdef CONFIG_SAWF
  53. #include <dp_sawf.h>
  54. #endif
  55. /* Flag to skip CCE classify when mesh or tid override enabled */
  56. #define DP_TX_SKIP_CCE_CLASSIFY \
  57. (DP_TXRX_HLOS_TID_OVERRIDE_ENABLED | DP_TX_MESH_ENABLED)
  58. /* TODO Add support in TSO */
  59. #define DP_DESC_NUM_FRAG(x) 0
  60. /* disable TQM_BYPASS */
  61. #define TQM_BYPASS_WAR 0
  62. #define DP_RETRY_COUNT 7
  63. #ifdef WLAN_PEER_JITTER
  64. #define DP_AVG_JITTER_WEIGHT_DENOM 4
  65. #define DP_AVG_DELAY_WEIGHT_DENOM 3
  66. #endif
  67. #ifdef QCA_DP_TX_FW_METADATA_V2
  68. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  69. HTT_TX_TCL_METADATA_V2_PDEV_ID_SET(_var, _val)
  70. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  71. HTT_TX_TCL_METADATA_V2_VALID_HTT_SET(_var, _val)
  72. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  73. HTT_TX_TCL_METADATA_TYPE_V2_SET(_var, _val)
  74. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  75. HTT_TX_TCL_METADATA_V2_HOST_INSPECTED_SET(_var, _val)
  76. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  77. HTT_TX_TCL_METADATA_V2_PEER_ID_SET(_var, _val)
  78. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  79. HTT_TX_TCL_METADATA_V2_VDEV_ID_SET(_var, _val)
  80. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  81. HTT_TCL_METADATA_V2_TYPE_PEER_BASED
  82. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  83. HTT_TCL_METADATA_V2_TYPE_VDEV_BASED
  84. #else
  85. #define DP_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)\
  86. HTT_TX_TCL_METADATA_PDEV_ID_SET(_var, _val)
  87. #define DP_TX_TCL_METADATA_VALID_HTT_SET(_var, _val) \
  88. HTT_TX_TCL_METADATA_VALID_HTT_SET(_var, _val)
  89. #define DP_TX_TCL_METADATA_TYPE_SET(_var, _val) \
  90. HTT_TX_TCL_METADATA_TYPE_SET(_var, _val)
  91. #define DP_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val) \
  92. HTT_TX_TCL_METADATA_HOST_INSPECTED_SET(_var, _val)
  93. #define DP_TX_TCL_METADATA_PEER_ID_SET(_var, _val) \
  94. HTT_TX_TCL_METADATA_PEER_ID_SET(_var, _val)
  95. #define DP_TX_TCL_METADATA_VDEV_ID_SET(_var, _val) \
  96. HTT_TX_TCL_METADATA_VDEV_ID_SET(_var, _val)
  97. #define DP_TCL_METADATA_TYPE_PEER_BASED \
  98. HTT_TCL_METADATA_TYPE_PEER_BASED
  99. #define DP_TCL_METADATA_TYPE_VDEV_BASED \
  100. HTT_TCL_METADATA_TYPE_VDEV_BASED
  101. #endif
  102. #define DP_GET_HW_LINK_ID_FRM_PPDU_ID(PPDU_ID, LINK_ID_OFFSET, LINK_ID_BITS) \
  103. (((PPDU_ID) >> (LINK_ID_OFFSET)) & ((1 << (LINK_ID_BITS)) - 1))
  104. /*mapping between hal encrypt type and cdp_sec_type*/
  105. uint8_t sec_type_map[MAX_CDP_SEC_TYPE] = {HAL_TX_ENCRYPT_TYPE_NO_CIPHER,
  106. HAL_TX_ENCRYPT_TYPE_WEP_128,
  107. HAL_TX_ENCRYPT_TYPE_WEP_104,
  108. HAL_TX_ENCRYPT_TYPE_WEP_40,
  109. HAL_TX_ENCRYPT_TYPE_TKIP_WITH_MIC,
  110. HAL_TX_ENCRYPT_TYPE_TKIP_NO_MIC,
  111. HAL_TX_ENCRYPT_TYPE_AES_CCMP_128,
  112. HAL_TX_ENCRYPT_TYPE_WAPI,
  113. HAL_TX_ENCRYPT_TYPE_AES_CCMP_256,
  114. HAL_TX_ENCRYPT_TYPE_AES_GCMP_128,
  115. HAL_TX_ENCRYPT_TYPE_AES_GCMP_256,
  116. HAL_TX_ENCRYPT_TYPE_WAPI_GCM_SM4};
  117. qdf_export_symbol(sec_type_map);
  118. #ifdef WLAN_FEATURE_DP_TX_DESC_HISTORY
  119. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  120. {
  121. enum dp_tx_event_type type;
  122. if (flags & DP_TX_DESC_FLAG_FLUSH)
  123. type = DP_TX_DESC_FLUSH;
  124. else if (flags & DP_TX_DESC_FLAG_TX_COMP_ERR)
  125. type = DP_TX_COMP_UNMAP_ERR;
  126. else if (flags & DP_TX_DESC_FLAG_COMPLETED_TX)
  127. type = DP_TX_COMP_UNMAP;
  128. else
  129. type = DP_TX_DESC_UNMAP;
  130. return type;
  131. }
  132. static inline void
  133. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  134. qdf_nbuf_t skb, uint32_t sw_cookie,
  135. enum dp_tx_event_type type)
  136. {
  137. struct dp_tx_tcl_history *tx_tcl_history = &soc->tx_tcl_history;
  138. struct dp_tx_comp_history *tx_comp_history = &soc->tx_comp_history;
  139. struct dp_tx_desc_event *entry;
  140. uint32_t idx;
  141. uint16_t slot;
  142. switch (type) {
  143. case DP_TX_COMP_UNMAP:
  144. case DP_TX_COMP_UNMAP_ERR:
  145. case DP_TX_COMP_MSDU_EXT:
  146. if (qdf_unlikely(!tx_comp_history->allocated))
  147. return;
  148. dp_get_frag_hist_next_atomic_idx(&tx_comp_history->index, &idx,
  149. &slot,
  150. DP_TX_COMP_HIST_SLOT_SHIFT,
  151. DP_TX_COMP_HIST_PER_SLOT_MAX,
  152. DP_TX_COMP_HISTORY_SIZE);
  153. entry = &tx_comp_history->entry[slot][idx];
  154. break;
  155. case DP_TX_DESC_MAP:
  156. case DP_TX_DESC_UNMAP:
  157. case DP_TX_DESC_COOKIE:
  158. case DP_TX_DESC_FLUSH:
  159. if (qdf_unlikely(!tx_tcl_history->allocated))
  160. return;
  161. dp_get_frag_hist_next_atomic_idx(&tx_tcl_history->index, &idx,
  162. &slot,
  163. DP_TX_TCL_HIST_SLOT_SHIFT,
  164. DP_TX_TCL_HIST_PER_SLOT_MAX,
  165. DP_TX_TCL_HISTORY_SIZE);
  166. entry = &tx_tcl_history->entry[slot][idx];
  167. break;
  168. default:
  169. dp_info_rl("Invalid dp_tx_event_type: %d", type);
  170. return;
  171. }
  172. entry->skb = skb;
  173. entry->paddr = paddr;
  174. entry->sw_cookie = sw_cookie;
  175. entry->type = type;
  176. entry->ts = qdf_get_log_timestamp();
  177. }
  178. static inline void
  179. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  180. struct qdf_tso_seg_elem_t *tso_seg,
  181. qdf_nbuf_t skb, uint32_t sw_cookie,
  182. enum dp_tx_event_type type)
  183. {
  184. int i;
  185. for (i = 1; i < tso_seg->seg.num_frags; i++) {
  186. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[i].paddr,
  187. skb, sw_cookie, type);
  188. }
  189. if (!tso_seg->next)
  190. dp_tx_desc_history_add(soc, tso_seg->seg.tso_frags[0].paddr,
  191. skb, 0xFFFFFFFF, type);
  192. }
  193. static inline void
  194. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  195. qdf_nbuf_t skb, uint32_t sw_cookie,
  196. enum dp_tx_event_type type)
  197. {
  198. struct qdf_tso_seg_elem_t *curr_seg = tso_info.tso_seg_list;
  199. uint32_t num_segs = tso_info.num_segs;
  200. while (num_segs) {
  201. dp_tx_tso_seg_history_add(soc, curr_seg, skb, sw_cookie, type);
  202. curr_seg = curr_seg->next;
  203. num_segs--;
  204. }
  205. }
  206. #else
  207. static inline enum dp_tx_event_type dp_tx_get_event_type(uint32_t flags)
  208. {
  209. return DP_TX_DESC_INVAL_EVT;
  210. }
  211. static inline void
  212. dp_tx_desc_history_add(struct dp_soc *soc, dma_addr_t paddr,
  213. qdf_nbuf_t skb, uint32_t sw_cookie,
  214. enum dp_tx_event_type type)
  215. {
  216. }
  217. static inline void
  218. dp_tx_tso_seg_history_add(struct dp_soc *soc,
  219. struct qdf_tso_seg_elem_t *tso_seg,
  220. qdf_nbuf_t skb, uint32_t sw_cookie,
  221. enum dp_tx_event_type type)
  222. {
  223. }
  224. static inline void
  225. dp_tx_tso_history_add(struct dp_soc *soc, struct qdf_tso_info_t tso_info,
  226. qdf_nbuf_t skb, uint32_t sw_cookie,
  227. enum dp_tx_event_type type)
  228. {
  229. }
  230. #endif /* WLAN_FEATURE_DP_TX_DESC_HISTORY */
  231. /**
  232. * dp_is_tput_high() - Check if throughput is high
  233. *
  234. * @soc: core txrx main context
  235. *
  236. * The current function is based of the RTPM tput policy variable where RTPM is
  237. * avoided based on throughput.
  238. */
  239. static inline int dp_is_tput_high(struct dp_soc *soc)
  240. {
  241. return dp_get_rtpm_tput_policy_requirement(soc);
  242. }
  243. #if defined(FEATURE_TSO)
  244. /**
  245. * dp_tx_tso_unmap_segment() - Unmap TSO segment
  246. *
  247. * @soc: core txrx main context
  248. * @seg_desc: tso segment descriptor
  249. * @num_seg_desc: tso number segment descriptor
  250. */
  251. static void dp_tx_tso_unmap_segment(
  252. struct dp_soc *soc,
  253. struct qdf_tso_seg_elem_t *seg_desc,
  254. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  255. {
  256. TSO_DEBUG("%s: Unmap the tso segment", __func__);
  257. if (qdf_unlikely(!seg_desc)) {
  258. DP_TRACE(ERROR, "%s %d TSO desc is NULL!",
  259. __func__, __LINE__);
  260. qdf_assert(0);
  261. } else if (qdf_unlikely(!num_seg_desc)) {
  262. DP_TRACE(ERROR, "%s %d TSO num desc is NULL!",
  263. __func__, __LINE__);
  264. qdf_assert(0);
  265. } else {
  266. bool is_last_seg;
  267. /* no tso segment left to do dma unmap */
  268. if (num_seg_desc->num_seg.tso_cmn_num_seg < 1)
  269. return;
  270. is_last_seg = (num_seg_desc->num_seg.tso_cmn_num_seg == 1) ?
  271. true : false;
  272. qdf_nbuf_unmap_tso_segment(soc->osdev,
  273. seg_desc, is_last_seg);
  274. num_seg_desc->num_seg.tso_cmn_num_seg--;
  275. }
  276. }
  277. /**
  278. * dp_tx_tso_desc_release() - Release the tso segment and tso_cmn_num_seg
  279. * back to the freelist
  280. *
  281. * @soc: soc device handle
  282. * @tx_desc: Tx software descriptor
  283. */
  284. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  285. struct dp_tx_desc_s *tx_desc)
  286. {
  287. TSO_DEBUG("%s: Free the tso descriptor", __func__);
  288. if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_desc)) {
  289. dp_tx_err("SO desc is NULL!");
  290. qdf_assert(0);
  291. } else if (qdf_unlikely(!tx_desc->msdu_ext_desc->tso_num_desc)) {
  292. dp_tx_err("TSO num desc is NULL!");
  293. qdf_assert(0);
  294. } else {
  295. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  296. (struct qdf_tso_num_seg_elem_t *)tx_desc->
  297. msdu_ext_desc->tso_num_desc;
  298. /* Add the tso num segment into the free list */
  299. if (tso_num_desc->num_seg.tso_cmn_num_seg == 0) {
  300. dp_tso_num_seg_free(soc, tx_desc->pool_id,
  301. tx_desc->msdu_ext_desc->
  302. tso_num_desc);
  303. tx_desc->msdu_ext_desc->tso_num_desc = NULL;
  304. DP_STATS_INC(tx_desc->pdev, tso_stats.tso_comp, 1);
  305. }
  306. /* Add the tso segment into the free list*/
  307. dp_tx_tso_desc_free(soc,
  308. tx_desc->pool_id, tx_desc->msdu_ext_desc->
  309. tso_desc);
  310. tx_desc->msdu_ext_desc->tso_desc = NULL;
  311. }
  312. }
  313. #else
  314. static void dp_tx_tso_unmap_segment(
  315. struct dp_soc *soc,
  316. struct qdf_tso_seg_elem_t *seg_desc,
  317. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  318. {
  319. }
  320. static void dp_tx_tso_desc_release(struct dp_soc *soc,
  321. struct dp_tx_desc_s *tx_desc)
  322. {
  323. }
  324. #endif
  325. #ifdef WLAN_SUPPORT_PPEDS
  326. static inline int
  327. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  328. uint8_t desc_pool_id)
  329. {
  330. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  331. __dp_tx_outstanding_dec(soc);
  332. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  333. return 1;
  334. }
  335. return 0;
  336. }
  337. #else
  338. static inline int
  339. dp_tx_release_ds_tx_desc(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  340. uint8_t desc_pool_id)
  341. {
  342. return 0;
  343. }
  344. #endif
  345. void
  346. dp_tx_desc_release(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  347. uint8_t desc_pool_id)
  348. {
  349. struct dp_pdev *pdev = tx_desc->pdev;
  350. uint8_t comp_status = 0;
  351. if (dp_tx_release_ds_tx_desc(soc, tx_desc, desc_pool_id))
  352. return;
  353. qdf_assert(pdev);
  354. soc = pdev->soc;
  355. dp_tx_outstanding_dec(pdev);
  356. if (tx_desc->msdu_ext_desc) {
  357. if (tx_desc->frm_type == dp_tx_frm_tso)
  358. dp_tx_tso_desc_release(soc, tx_desc);
  359. if (tx_desc->flags & DP_TX_DESC_FLAG_ME)
  360. dp_tx_me_free_buf(tx_desc->pdev,
  361. tx_desc->msdu_ext_desc->me_buffer);
  362. dp_tx_ext_desc_free(soc, tx_desc->msdu_ext_desc, desc_pool_id);
  363. }
  364. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  365. qdf_atomic_dec(&soc->num_tx_exception);
  366. if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
  367. tx_desc->buffer_src)
  368. comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp,
  369. soc->hal_soc);
  370. else
  371. comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
  372. dp_tx_debug("Tx Completion Release desc %d status %d outstanding %d",
  373. tx_desc->id, comp_status,
  374. qdf_atomic_read(&pdev->num_tx_outstanding));
  375. dp_tx_desc_free(soc, tx_desc, desc_pool_id);
  376. return;
  377. }
  378. /**
  379. * dp_tx_prepare_htt_metadata() - Prepare HTT metadata for special frames
  380. * @vdev: DP vdev Handle
  381. * @nbuf: skb
  382. * @msdu_info: msdu_info required to create HTT metadata
  383. *
  384. * Prepares and fills HTT metadata in the frame pre-header for special frames
  385. * that should be transmitted using varying transmit parameters.
  386. * There are 2 VDEV modes that currently needs this special metadata -
  387. * 1) Mesh Mode
  388. * 2) DSRC Mode
  389. *
  390. * Return: HTT metadata size
  391. *
  392. */
  393. static uint8_t dp_tx_prepare_htt_metadata(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  394. struct dp_tx_msdu_info_s *msdu_info)
  395. {
  396. uint32_t *meta_data = msdu_info->meta_data;
  397. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  398. (struct htt_tx_msdu_desc_ext2_t *) meta_data;
  399. uint8_t htt_desc_size;
  400. /* Size rounded of multiple of 8 bytes */
  401. uint8_t htt_desc_size_aligned;
  402. uint8_t *hdr = NULL;
  403. /*
  404. * Metadata - HTT MSDU Extension header
  405. */
  406. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  407. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  408. if (vdev->mesh_vdev || msdu_info->is_tx_sniffer ||
  409. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->
  410. meta_data[0]) ||
  411. msdu_info->exception_fw) {
  412. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) <
  413. htt_desc_size_aligned)) {
  414. nbuf = qdf_nbuf_realloc_headroom(nbuf,
  415. htt_desc_size_aligned);
  416. if (!nbuf) {
  417. /*
  418. * qdf_nbuf_realloc_headroom won't do skb_clone
  419. * as skb_realloc_headroom does. so, no free is
  420. * needed here.
  421. */
  422. DP_STATS_INC(vdev,
  423. tx_i.dropped.headroom_insufficient,
  424. 1);
  425. qdf_print(" %s[%d] skb_realloc_headroom failed",
  426. __func__, __LINE__);
  427. return 0;
  428. }
  429. }
  430. /* Fill and add HTT metaheader */
  431. hdr = qdf_nbuf_push_head(nbuf, htt_desc_size_aligned);
  432. if (!hdr) {
  433. dp_tx_err("Error in filling HTT metadata");
  434. return 0;
  435. }
  436. qdf_mem_copy(hdr, desc_ext, htt_desc_size);
  437. } else if (vdev->opmode == wlan_op_mode_ocb) {
  438. /* Todo - Add support for DSRC */
  439. }
  440. return htt_desc_size_aligned;
  441. }
  442. /**
  443. * dp_tx_prepare_tso_ext_desc() - Prepare MSDU extension descriptor for TSO
  444. * @tso_seg: TSO segment to process
  445. * @ext_desc: Pointer to MSDU extension descriptor
  446. *
  447. * Return: void
  448. */
  449. #if defined(FEATURE_TSO)
  450. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  451. void *ext_desc)
  452. {
  453. uint8_t num_frag;
  454. uint32_t tso_flags;
  455. /*
  456. * Set tso_en, tcp_flags(NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN),
  457. * tcp_flag_mask
  458. *
  459. * Checksum enable flags are set in TCL descriptor and not in Extension
  460. * Descriptor (H/W ignores checksum_en flags in MSDU ext descriptor)
  461. */
  462. tso_flags = *(uint32_t *) &tso_seg->tso_flags;
  463. hal_tx_ext_desc_set_tso_flags(ext_desc, tso_flags);
  464. hal_tx_ext_desc_set_msdu_length(ext_desc, tso_seg->tso_flags.l2_len,
  465. tso_seg->tso_flags.ip_len);
  466. hal_tx_ext_desc_set_tcp_seq(ext_desc, tso_seg->tso_flags.tcp_seq_num);
  467. hal_tx_ext_desc_set_ip_id(ext_desc, tso_seg->tso_flags.ip_id);
  468. for (num_frag = 0; num_frag < tso_seg->num_frags; num_frag++) {
  469. uint32_t lo = 0;
  470. uint32_t hi = 0;
  471. qdf_assert_always((tso_seg->tso_frags[num_frag].paddr) &&
  472. (tso_seg->tso_frags[num_frag].length));
  473. qdf_dmaaddr_to_32s(
  474. tso_seg->tso_frags[num_frag].paddr, &lo, &hi);
  475. hal_tx_ext_desc_set_buffer(ext_desc, num_frag, lo, hi,
  476. tso_seg->tso_frags[num_frag].length);
  477. }
  478. return;
  479. }
  480. #else
  481. static void dp_tx_prepare_tso_ext_desc(struct qdf_tso_seg_t *tso_seg,
  482. void *ext_desc)
  483. {
  484. return;
  485. }
  486. #endif
  487. #if defined(FEATURE_TSO)
  488. /**
  489. * dp_tx_free_tso_seg_list() - Loop through the tso segments
  490. * allocated and free them
  491. * @soc: soc handle
  492. * @free_seg: list of tso segments
  493. * @msdu_info: msdu descriptor
  494. *
  495. * Return: void
  496. */
  497. static void dp_tx_free_tso_seg_list(
  498. struct dp_soc *soc,
  499. struct qdf_tso_seg_elem_t *free_seg,
  500. struct dp_tx_msdu_info_s *msdu_info)
  501. {
  502. struct qdf_tso_seg_elem_t *next_seg;
  503. while (free_seg) {
  504. next_seg = free_seg->next;
  505. dp_tx_tso_desc_free(soc,
  506. msdu_info->tx_queue.desc_pool_id,
  507. free_seg);
  508. free_seg = next_seg;
  509. }
  510. }
  511. /**
  512. * dp_tx_free_tso_num_seg_list() - Loop through the tso num segments
  513. * allocated and free them
  514. * @soc: soc handle
  515. * @free_num_seg: list of tso number segments
  516. * @msdu_info: msdu descriptor
  517. *
  518. * Return: void
  519. */
  520. static void dp_tx_free_tso_num_seg_list(
  521. struct dp_soc *soc,
  522. struct qdf_tso_num_seg_elem_t *free_num_seg,
  523. struct dp_tx_msdu_info_s *msdu_info)
  524. {
  525. struct qdf_tso_num_seg_elem_t *next_num_seg;
  526. while (free_num_seg) {
  527. next_num_seg = free_num_seg->next;
  528. dp_tso_num_seg_free(soc,
  529. msdu_info->tx_queue.desc_pool_id,
  530. free_num_seg);
  531. free_num_seg = next_num_seg;
  532. }
  533. }
  534. /**
  535. * dp_tx_unmap_tso_seg_list() - Loop through the tso segments
  536. * do dma unmap for each segment
  537. * @soc: soc handle
  538. * @free_seg: list of tso segments
  539. * @num_seg_desc: tso number segment descriptor
  540. *
  541. * Return: void
  542. */
  543. static void dp_tx_unmap_tso_seg_list(
  544. struct dp_soc *soc,
  545. struct qdf_tso_seg_elem_t *free_seg,
  546. struct qdf_tso_num_seg_elem_t *num_seg_desc)
  547. {
  548. struct qdf_tso_seg_elem_t *next_seg;
  549. if (qdf_unlikely(!num_seg_desc)) {
  550. DP_TRACE(ERROR, "TSO number seg desc is NULL!");
  551. return;
  552. }
  553. while (free_seg) {
  554. next_seg = free_seg->next;
  555. dp_tx_tso_unmap_segment(soc, free_seg, num_seg_desc);
  556. free_seg = next_seg;
  557. }
  558. }
  559. #ifdef FEATURE_TSO_STATS
  560. /**
  561. * dp_tso_get_stats_idx() - Retrieve the tso packet id
  562. * @pdev: pdev handle
  563. *
  564. * Return: id
  565. */
  566. static uint32_t dp_tso_get_stats_idx(struct dp_pdev *pdev)
  567. {
  568. uint32_t stats_idx;
  569. stats_idx = (((uint32_t)qdf_atomic_inc_return(&pdev->tso_idx))
  570. % CDP_MAX_TSO_PACKETS);
  571. return stats_idx;
  572. }
  573. #else
  574. static int dp_tso_get_stats_idx(struct dp_pdev *pdev)
  575. {
  576. return 0;
  577. }
  578. #endif /* FEATURE_TSO_STATS */
  579. /**
  580. * dp_tx_free_remaining_tso_desc() - do dma unmap for tso segments if any,
  581. * free the tso segments descriptor and
  582. * tso num segments descriptor
  583. * @soc: soc handle
  584. * @msdu_info: msdu descriptor
  585. * @tso_seg_unmap: flag to show if dma unmap is necessary
  586. *
  587. * Return: void
  588. */
  589. static void dp_tx_free_remaining_tso_desc(struct dp_soc *soc,
  590. struct dp_tx_msdu_info_s *msdu_info,
  591. bool tso_seg_unmap)
  592. {
  593. struct qdf_tso_info_t *tso_info = &msdu_info->u.tso_info;
  594. struct qdf_tso_seg_elem_t *free_seg = tso_info->tso_seg_list;
  595. struct qdf_tso_num_seg_elem_t *tso_num_desc =
  596. tso_info->tso_num_seg_list;
  597. /* do dma unmap for each segment */
  598. if (tso_seg_unmap)
  599. dp_tx_unmap_tso_seg_list(soc, free_seg, tso_num_desc);
  600. /* free all tso number segment descriptor though looks only have 1 */
  601. dp_tx_free_tso_num_seg_list(soc, tso_num_desc, msdu_info);
  602. /* free all tso segment descriptor */
  603. dp_tx_free_tso_seg_list(soc, free_seg, msdu_info);
  604. }
  605. /**
  606. * dp_tx_prepare_tso() - Given a jumbo msdu, prepare the TSO info
  607. * @vdev: virtual device handle
  608. * @msdu: network buffer
  609. * @msdu_info: meta data associated with the msdu
  610. *
  611. * Return: QDF_STATUS_SUCCESS success
  612. */
  613. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  614. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  615. {
  616. struct qdf_tso_seg_elem_t *tso_seg;
  617. int num_seg = qdf_nbuf_get_tso_num_seg(msdu);
  618. struct dp_soc *soc = vdev->pdev->soc;
  619. struct dp_pdev *pdev = vdev->pdev;
  620. struct qdf_tso_info_t *tso_info;
  621. struct qdf_tso_num_seg_elem_t *tso_num_seg;
  622. tso_info = &msdu_info->u.tso_info;
  623. tso_info->curr_seg = NULL;
  624. tso_info->tso_seg_list = NULL;
  625. tso_info->num_segs = num_seg;
  626. msdu_info->frm_type = dp_tx_frm_tso;
  627. tso_info->tso_num_seg_list = NULL;
  628. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  629. while (num_seg) {
  630. tso_seg = dp_tx_tso_desc_alloc(
  631. soc, msdu_info->tx_queue.desc_pool_id);
  632. if (tso_seg) {
  633. tso_seg->next = tso_info->tso_seg_list;
  634. tso_info->tso_seg_list = tso_seg;
  635. num_seg--;
  636. } else {
  637. dp_err_rl("Failed to alloc tso seg desc");
  638. DP_STATS_INC_PKT(vdev->pdev,
  639. tso_stats.tso_no_mem_dropped, 1,
  640. qdf_nbuf_len(msdu));
  641. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  642. return QDF_STATUS_E_NOMEM;
  643. }
  644. }
  645. TSO_DEBUG(" %s: num_seg: %d", __func__, num_seg);
  646. tso_num_seg = dp_tso_num_seg_alloc(soc,
  647. msdu_info->tx_queue.desc_pool_id);
  648. if (tso_num_seg) {
  649. tso_num_seg->next = tso_info->tso_num_seg_list;
  650. tso_info->tso_num_seg_list = tso_num_seg;
  651. } else {
  652. DP_TRACE(ERROR, "%s: Failed to alloc - Number of segs desc",
  653. __func__);
  654. dp_tx_free_remaining_tso_desc(soc, msdu_info, false);
  655. return QDF_STATUS_E_NOMEM;
  656. }
  657. msdu_info->num_seg =
  658. qdf_nbuf_get_tso_info(soc->osdev, msdu, tso_info);
  659. TSO_DEBUG(" %s: msdu_info->num_seg: %d", __func__,
  660. msdu_info->num_seg);
  661. if (!(msdu_info->num_seg)) {
  662. /*
  663. * Free allocated TSO seg desc and number seg desc,
  664. * do unmap for segments if dma map has done.
  665. */
  666. DP_TRACE(ERROR, "%s: Failed to get tso info", __func__);
  667. dp_tx_free_remaining_tso_desc(soc, msdu_info, true);
  668. return QDF_STATUS_E_INVAL;
  669. }
  670. dp_tx_tso_history_add(soc, msdu_info->u.tso_info,
  671. msdu, 0, DP_TX_DESC_MAP);
  672. tso_info->curr_seg = tso_info->tso_seg_list;
  673. tso_info->msdu_stats_idx = dp_tso_get_stats_idx(pdev);
  674. dp_tso_packet_update(pdev, tso_info->msdu_stats_idx,
  675. msdu, msdu_info->num_seg);
  676. dp_tso_segment_stats_update(pdev, tso_info->tso_seg_list,
  677. tso_info->msdu_stats_idx);
  678. dp_stats_tso_segment_histogram_update(pdev, msdu_info->num_seg);
  679. return QDF_STATUS_SUCCESS;
  680. }
  681. #else
  682. static QDF_STATUS dp_tx_prepare_tso(struct dp_vdev *vdev,
  683. qdf_nbuf_t msdu, struct dp_tx_msdu_info_s *msdu_info)
  684. {
  685. return QDF_STATUS_E_NOMEM;
  686. }
  687. #endif
  688. QDF_COMPILE_TIME_ASSERT(dp_tx_htt_metadata_len_check,
  689. (DP_TX_MSDU_INFO_META_DATA_DWORDS * 4 >=
  690. sizeof(struct htt_tx_msdu_desc_ext2_t)));
  691. /**
  692. * dp_tx_prepare_ext_desc() - Allocate and prepare MSDU extension descriptor
  693. * @vdev: DP Vdev handle
  694. * @msdu_info: MSDU info to be setup in MSDU extension descriptor
  695. * @desc_pool_id: Descriptor Pool ID
  696. *
  697. * Return:
  698. */
  699. static
  700. struct dp_tx_ext_desc_elem_s *dp_tx_prepare_ext_desc(struct dp_vdev *vdev,
  701. struct dp_tx_msdu_info_s *msdu_info, uint8_t desc_pool_id)
  702. {
  703. uint8_t i;
  704. uint8_t cached_ext_desc[HAL_TX_EXT_DESC_WITH_META_DATA];
  705. struct dp_tx_seg_info_s *seg_info;
  706. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  707. struct dp_soc *soc = vdev->pdev->soc;
  708. /* Allocate an extension descriptor */
  709. msdu_ext_desc = dp_tx_ext_desc_alloc(soc, desc_pool_id);
  710. qdf_mem_zero(&cached_ext_desc[0], HAL_TX_EXT_DESC_WITH_META_DATA);
  711. if (!msdu_ext_desc) {
  712. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  713. return NULL;
  714. }
  715. if (msdu_info->exception_fw &&
  716. qdf_unlikely(vdev->mesh_vdev)) {
  717. qdf_mem_copy(&cached_ext_desc[HAL_TX_EXTENSION_DESC_LEN_BYTES],
  718. &msdu_info->meta_data[0],
  719. sizeof(struct htt_tx_msdu_desc_ext2_t));
  720. qdf_atomic_inc(&soc->num_tx_exception);
  721. msdu_ext_desc->flags |= DP_TX_EXT_DESC_FLAG_METADATA_VALID;
  722. }
  723. switch (msdu_info->frm_type) {
  724. case dp_tx_frm_sg:
  725. case dp_tx_frm_me:
  726. case dp_tx_frm_raw:
  727. seg_info = msdu_info->u.sg_info.curr_seg;
  728. /* Update the buffer pointers in MSDU Extension Descriptor */
  729. for (i = 0; i < seg_info->frag_cnt; i++) {
  730. hal_tx_ext_desc_set_buffer(&cached_ext_desc[0], i,
  731. seg_info->frags[i].paddr_lo,
  732. seg_info->frags[i].paddr_hi,
  733. seg_info->frags[i].len);
  734. }
  735. break;
  736. case dp_tx_frm_tso:
  737. dp_tx_prepare_tso_ext_desc(&msdu_info->u.tso_info.curr_seg->seg,
  738. &cached_ext_desc[0]);
  739. break;
  740. default:
  741. break;
  742. }
  743. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  744. cached_ext_desc, HAL_TX_EXT_DESC_WITH_META_DATA);
  745. hal_tx_ext_desc_sync(&cached_ext_desc[0],
  746. msdu_ext_desc->vaddr);
  747. return msdu_ext_desc;
  748. }
  749. /**
  750. * dp_tx_trace_pkt() - Trace TX packet at DP layer
  751. * @soc: datapath SOC
  752. * @skb: skb to be traced
  753. * @msdu_id: msdu_id of the packet
  754. * @vdev_id: vdev_id of the packet
  755. * @op_mode: Vdev Operation mode
  756. *
  757. * Return: None
  758. */
  759. #ifdef DP_DISABLE_TX_PKT_TRACE
  760. static void dp_tx_trace_pkt(struct dp_soc *soc,
  761. qdf_nbuf_t skb, uint16_t msdu_id,
  762. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  763. {
  764. }
  765. #else
  766. static void dp_tx_trace_pkt(struct dp_soc *soc,
  767. qdf_nbuf_t skb, uint16_t msdu_id,
  768. uint8_t vdev_id, enum QDF_OPMODE op_mode)
  769. {
  770. if (dp_is_tput_high(soc))
  771. return;
  772. QDF_NBUF_CB_TX_PACKET_TRACK(skb) = QDF_NBUF_TX_PKT_DATA_TRACK;
  773. QDF_NBUF_CB_TX_DP_TRACE(skb) = 1;
  774. DPTRACE(qdf_dp_trace_ptr(skb,
  775. QDF_DP_TRACE_LI_DP_TX_PACKET_PTR_RECORD,
  776. QDF_TRACE_DEFAULT_PDEV_ID,
  777. qdf_nbuf_data_addr(skb),
  778. sizeof(qdf_nbuf_data(skb)),
  779. msdu_id, vdev_id, 0,
  780. op_mode));
  781. qdf_dp_trace_log_pkt(vdev_id, skb, QDF_TX, QDF_TRACE_DEFAULT_PDEV_ID,
  782. op_mode);
  783. DPTRACE(qdf_dp_trace_data_pkt(skb, QDF_TRACE_DEFAULT_PDEV_ID,
  784. QDF_DP_TRACE_LI_DP_TX_PACKET_RECORD,
  785. msdu_id, QDF_TX));
  786. }
  787. #endif
  788. #ifdef WLAN_DP_FEATURE_MARK_ICMP_REQ_TO_FW
  789. /**
  790. * dp_tx_is_nbuf_marked_exception() - Check if the packet has been marked as
  791. * exception by the upper layer (OS_IF)
  792. * @soc: DP soc handle
  793. * @nbuf: packet to be transmitted
  794. *
  795. * Return: 1 if the packet is marked as exception,
  796. * 0, if the packet is not marked as exception.
  797. */
  798. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  799. qdf_nbuf_t nbuf)
  800. {
  801. return QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf);
  802. }
  803. #else
  804. static inline int dp_tx_is_nbuf_marked_exception(struct dp_soc *soc,
  805. qdf_nbuf_t nbuf)
  806. {
  807. return 0;
  808. }
  809. #endif
  810. #ifdef DP_TRAFFIC_END_INDICATION
  811. /**
  812. * dp_tx_get_traffic_end_indication_pkt() - Allocate and prepare packet to send
  813. * as indication to fw to inform that
  814. * data stream has ended
  815. * @vdev: DP vdev handle
  816. * @nbuf: original buffer from network stack
  817. *
  818. * Return: NULL on failure,
  819. * nbuf on success
  820. */
  821. static inline qdf_nbuf_t
  822. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  823. qdf_nbuf_t nbuf)
  824. {
  825. /* Packet length should be enough to copy upto L3 header */
  826. uint8_t end_nbuf_len = 64;
  827. uint8_t htt_desc_size_aligned;
  828. uint8_t htt_desc_size;
  829. qdf_nbuf_t end_nbuf;
  830. if (qdf_unlikely(QDF_NBUF_CB_GET_PACKET_TYPE(nbuf) ==
  831. QDF_NBUF_CB_PACKET_TYPE_END_INDICATION)) {
  832. htt_desc_size = sizeof(struct htt_tx_msdu_desc_ext2_t);
  833. htt_desc_size_aligned = (htt_desc_size + 7) & ~0x7;
  834. end_nbuf = qdf_nbuf_queue_remove(&vdev->end_ind_pkt_q);
  835. if (!end_nbuf) {
  836. end_nbuf = qdf_nbuf_alloc(NULL,
  837. (htt_desc_size_aligned +
  838. end_nbuf_len),
  839. htt_desc_size_aligned,
  840. 8, false);
  841. if (!end_nbuf) {
  842. dp_err("Packet allocation failed");
  843. goto out;
  844. }
  845. } else {
  846. qdf_nbuf_reset(end_nbuf, htt_desc_size_aligned, 8);
  847. }
  848. qdf_mem_copy(qdf_nbuf_data(end_nbuf), qdf_nbuf_data(nbuf),
  849. end_nbuf_len);
  850. qdf_nbuf_set_pktlen(end_nbuf, end_nbuf_len);
  851. return end_nbuf;
  852. }
  853. out:
  854. return NULL;
  855. }
  856. /**
  857. * dp_tx_send_traffic_end_indication_pkt() - Send indication packet to FW
  858. * via exception path.
  859. * @vdev: DP vdev handle
  860. * @end_nbuf: skb to send as indication
  861. * @msdu_info: msdu_info of original nbuf
  862. * @peer_id: peer id
  863. *
  864. * Return: None
  865. */
  866. static inline void
  867. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  868. qdf_nbuf_t end_nbuf,
  869. struct dp_tx_msdu_info_s *msdu_info,
  870. uint16_t peer_id)
  871. {
  872. struct dp_tx_msdu_info_s e_msdu_info = {0};
  873. qdf_nbuf_t nbuf;
  874. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  875. (struct htt_tx_msdu_desc_ext2_t *)(e_msdu_info.meta_data);
  876. e_msdu_info.tx_queue = msdu_info->tx_queue;
  877. e_msdu_info.tid = msdu_info->tid;
  878. e_msdu_info.exception_fw = 1;
  879. desc_ext->host_tx_desc_pool = 1;
  880. desc_ext->traffic_end_indication = 1;
  881. nbuf = dp_tx_send_msdu_single(vdev, end_nbuf, &e_msdu_info,
  882. peer_id, NULL);
  883. if (nbuf) {
  884. dp_err("Traffic end indication packet tx failed");
  885. qdf_nbuf_free(nbuf);
  886. }
  887. }
  888. /**
  889. * dp_tx_traffic_end_indication_set_desc_flag() - Set tx descriptor flag to
  890. * mark it traffic end indication
  891. * packet.
  892. * @tx_desc: Tx descriptor pointer
  893. * @msdu_info: msdu_info structure pointer
  894. *
  895. * Return: None
  896. */
  897. static inline void
  898. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  899. struct dp_tx_msdu_info_s *msdu_info)
  900. {
  901. struct htt_tx_msdu_desc_ext2_t *desc_ext =
  902. (struct htt_tx_msdu_desc_ext2_t *)(msdu_info->meta_data);
  903. if (qdf_unlikely(desc_ext->traffic_end_indication))
  904. tx_desc->flags |= DP_TX_DESC_FLAG_TRAFFIC_END_IND;
  905. }
  906. /**
  907. * dp_tx_traffic_end_indication_enq_ind_pkt() - Enqueue the packet instead of
  908. * freeing which are associated
  909. * with traffic end indication
  910. * flagged descriptor.
  911. * @soc: dp soc handle
  912. * @desc: Tx descriptor pointer
  913. * @nbuf: buffer pointer
  914. *
  915. * Return: True if packet gets enqueued else false
  916. */
  917. static bool
  918. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  919. struct dp_tx_desc_s *desc,
  920. qdf_nbuf_t nbuf)
  921. {
  922. struct dp_vdev *vdev = NULL;
  923. if (qdf_unlikely((desc->flags &
  924. DP_TX_DESC_FLAG_TRAFFIC_END_IND) != 0)) {
  925. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  926. DP_MOD_ID_TX_COMP);
  927. if (vdev) {
  928. qdf_nbuf_queue_add(&vdev->end_ind_pkt_q, nbuf);
  929. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_COMP);
  930. return true;
  931. }
  932. }
  933. return false;
  934. }
  935. /**
  936. * dp_tx_traffic_end_indication_is_enabled() - get the feature
  937. * enable/disable status
  938. * @vdev: dp vdev handle
  939. *
  940. * Return: True if feature is enable else false
  941. */
  942. static inline bool
  943. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  944. {
  945. return qdf_unlikely(vdev->traffic_end_ind_en);
  946. }
  947. static inline qdf_nbuf_t
  948. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  949. struct dp_tx_msdu_info_s *msdu_info,
  950. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  951. {
  952. if (dp_tx_traffic_end_indication_is_enabled(vdev))
  953. end_nbuf = dp_tx_get_traffic_end_indication_pkt(vdev, nbuf);
  954. nbuf = dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  955. if (qdf_unlikely(end_nbuf))
  956. dp_tx_send_traffic_end_indication_pkt(vdev, end_nbuf,
  957. msdu_info, peer_id);
  958. return nbuf;
  959. }
  960. #else
  961. static inline qdf_nbuf_t
  962. dp_tx_get_traffic_end_indication_pkt(struct dp_vdev *vdev,
  963. qdf_nbuf_t nbuf)
  964. {
  965. return NULL;
  966. }
  967. static inline void
  968. dp_tx_send_traffic_end_indication_pkt(struct dp_vdev *vdev,
  969. qdf_nbuf_t end_nbuf,
  970. struct dp_tx_msdu_info_s *msdu_info,
  971. uint16_t peer_id)
  972. {}
  973. static inline void
  974. dp_tx_traffic_end_indication_set_desc_flag(struct dp_tx_desc_s *tx_desc,
  975. struct dp_tx_msdu_info_s *msdu_info)
  976. {}
  977. static inline bool
  978. dp_tx_traffic_end_indication_enq_ind_pkt(struct dp_soc *soc,
  979. struct dp_tx_desc_s *desc,
  980. qdf_nbuf_t nbuf)
  981. {
  982. return false;
  983. }
  984. static inline bool
  985. dp_tx_traffic_end_indication_is_enabled(struct dp_vdev *vdev)
  986. {
  987. return false;
  988. }
  989. static inline qdf_nbuf_t
  990. dp_tx_send_msdu_single_wrapper(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  991. struct dp_tx_msdu_info_s *msdu_info,
  992. uint16_t peer_id, qdf_nbuf_t end_nbuf)
  993. {
  994. return dp_tx_send_msdu_single(vdev, nbuf, msdu_info, peer_id, NULL);
  995. }
  996. #endif
  997. #if defined(QCA_SUPPORT_WDS_EXTENDED)
  998. static bool
  999. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1000. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1001. {
  1002. if (soc->features.wds_ext_ast_override_enable &&
  1003. tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1004. return true;
  1005. return false;
  1006. }
  1007. #else
  1008. static bool
  1009. dp_tx_is_wds_ast_override_en(struct dp_soc *soc,
  1010. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1011. {
  1012. return false;
  1013. }
  1014. #endif
  1015. /**
  1016. * dp_tx_prepare_desc_single() - Allocate and prepare Tx descriptor
  1017. * @vdev: DP vdev handle
  1018. * @nbuf: skb
  1019. * @desc_pool_id: Descriptor pool ID
  1020. * @msdu_info: Metadata to the fw
  1021. * @tx_exc_metadata: Handle that holds exception path metadata
  1022. *
  1023. * Allocate and prepare Tx descriptor with msdu information.
  1024. *
  1025. * Return: Pointer to Tx Descriptor on success,
  1026. * NULL on failure
  1027. */
  1028. static
  1029. struct dp_tx_desc_s *dp_tx_prepare_desc_single(struct dp_vdev *vdev,
  1030. qdf_nbuf_t nbuf, uint8_t desc_pool_id,
  1031. struct dp_tx_msdu_info_s *msdu_info,
  1032. struct cdp_tx_exception_metadata *tx_exc_metadata)
  1033. {
  1034. uint8_t align_pad;
  1035. uint8_t is_exception = 0;
  1036. uint8_t htt_hdr_size;
  1037. struct dp_tx_desc_s *tx_desc;
  1038. struct dp_pdev *pdev = vdev->pdev;
  1039. struct dp_soc *soc = pdev->soc;
  1040. if (dp_tx_limit_check(vdev, nbuf))
  1041. return NULL;
  1042. /* Allocate software Tx descriptor */
  1043. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1044. if (qdf_unlikely(!tx_desc)) {
  1045. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1046. DP_STATS_INC(vdev, tx_i.dropped.desc_na_exc_alloc_fail.num, 1);
  1047. return NULL;
  1048. }
  1049. dp_tx_outstanding_inc(pdev);
  1050. /* Initialize the SW tx descriptor */
  1051. tx_desc->nbuf = nbuf;
  1052. tx_desc->frm_type = dp_tx_frm_std;
  1053. tx_desc->tx_encap_type = ((tx_exc_metadata &&
  1054. (tx_exc_metadata->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE)) ?
  1055. tx_exc_metadata->tx_encap_type : vdev->tx_encap_type);
  1056. tx_desc->vdev_id = vdev->vdev_id;
  1057. tx_desc->pdev = pdev;
  1058. tx_desc->msdu_ext_desc = NULL;
  1059. tx_desc->pkt_offset = 0;
  1060. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1061. tx_desc->shinfo_addr = skb_end_pointer(nbuf);
  1062. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1063. vdev->qdf_opmode);
  1064. if (qdf_unlikely(vdev->multipass_en)) {
  1065. if (!dp_tx_multipass_process(soc, vdev, nbuf, msdu_info))
  1066. goto failure;
  1067. }
  1068. /* Packets marked by upper layer (OS-IF) to be sent to FW */
  1069. if (dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1070. is_exception = 1;
  1071. /* for BE chipsets if wds extension was enbled will not mark FW
  1072. * in desc will mark ast index based search for ast index.
  1073. */
  1074. if (dp_tx_is_wds_ast_override_en(soc, tx_exc_metadata))
  1075. return tx_desc;
  1076. /*
  1077. * For special modes (vdev_type == ocb or mesh), data frames should be
  1078. * transmitted using varying transmit parameters (tx spec) which include
  1079. * transmit rate, power, priority, channel, channel bandwidth , nss etc.
  1080. * These are filled in HTT MSDU descriptor and sent in frame pre-header.
  1081. * These frames are sent as exception packets to firmware.
  1082. *
  1083. * HW requirement is that metadata should always point to a
  1084. * 8-byte aligned address. So we add alignment pad to start of buffer.
  1085. * HTT Metadata should be ensured to be multiple of 8-bytes,
  1086. * to get 8-byte aligned start address along with align_pad added
  1087. *
  1088. * |-----------------------------|
  1089. * | |
  1090. * |-----------------------------| <-----Buffer Pointer Address given
  1091. * | | ^ in HW descriptor (aligned)
  1092. * | HTT Metadata | |
  1093. * | | |
  1094. * | | | Packet Offset given in descriptor
  1095. * | | |
  1096. * |-----------------------------| |
  1097. * | Alignment Pad | v
  1098. * |-----------------------------| <----- Actual buffer start address
  1099. * | SKB Data | (Unaligned)
  1100. * | |
  1101. * | |
  1102. * | |
  1103. * | |
  1104. * | |
  1105. * |-----------------------------|
  1106. */
  1107. if (qdf_unlikely((msdu_info->exception_fw)) ||
  1108. (vdev->opmode == wlan_op_mode_ocb) ||
  1109. (tx_exc_metadata &&
  1110. tx_exc_metadata->is_tx_sniffer)) {
  1111. align_pad = ((unsigned long) qdf_nbuf_data(nbuf)) & 0x7;
  1112. if (qdf_unlikely(qdf_nbuf_headroom(nbuf) < align_pad)) {
  1113. DP_STATS_INC(vdev,
  1114. tx_i.dropped.headroom_insufficient, 1);
  1115. goto failure;
  1116. }
  1117. if (qdf_nbuf_push_head(nbuf, align_pad) == NULL) {
  1118. dp_tx_err("qdf_nbuf_push_head failed");
  1119. goto failure;
  1120. }
  1121. htt_hdr_size = dp_tx_prepare_htt_metadata(vdev, nbuf,
  1122. msdu_info);
  1123. if (htt_hdr_size == 0)
  1124. goto failure;
  1125. tx_desc->length = qdf_nbuf_headlen(nbuf);
  1126. tx_desc->pkt_offset = align_pad + htt_hdr_size;
  1127. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1128. dp_tx_traffic_end_indication_set_desc_flag(tx_desc,
  1129. msdu_info);
  1130. is_exception = 1;
  1131. tx_desc->length -= tx_desc->pkt_offset;
  1132. }
  1133. #if !TQM_BYPASS_WAR
  1134. if (is_exception || tx_exc_metadata)
  1135. #endif
  1136. {
  1137. /* Temporary WAR due to TQM VP issues */
  1138. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1139. qdf_atomic_inc(&soc->num_tx_exception);
  1140. }
  1141. return tx_desc;
  1142. failure:
  1143. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1144. return NULL;
  1145. }
  1146. /**
  1147. * dp_tx_prepare_desc() - Allocate and prepare Tx descriptor for multisegment
  1148. * frame
  1149. * @vdev: DP vdev handle
  1150. * @nbuf: skb
  1151. * @msdu_info: Info to be setup in MSDU descriptor and MSDU extension descriptor
  1152. * @desc_pool_id : Descriptor Pool ID
  1153. *
  1154. * Allocate and prepare Tx descriptor with msdu and fragment descritor
  1155. * information. For frames with fragments, allocate and prepare
  1156. * an MSDU extension descriptor
  1157. *
  1158. * Return: Pointer to Tx Descriptor on success,
  1159. * NULL on failure
  1160. */
  1161. static struct dp_tx_desc_s *dp_tx_prepare_desc(struct dp_vdev *vdev,
  1162. qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info,
  1163. uint8_t desc_pool_id)
  1164. {
  1165. struct dp_tx_desc_s *tx_desc;
  1166. struct dp_tx_ext_desc_elem_s *msdu_ext_desc;
  1167. struct dp_pdev *pdev = vdev->pdev;
  1168. struct dp_soc *soc = pdev->soc;
  1169. if (dp_tx_limit_check(vdev, nbuf))
  1170. return NULL;
  1171. /* Allocate software Tx descriptor */
  1172. tx_desc = dp_tx_desc_alloc(soc, desc_pool_id);
  1173. if (!tx_desc) {
  1174. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1175. return NULL;
  1176. }
  1177. dp_tx_tso_seg_history_add(soc, msdu_info->u.tso_info.curr_seg,
  1178. nbuf, tx_desc->id, DP_TX_DESC_COOKIE);
  1179. dp_tx_outstanding_inc(pdev);
  1180. /* Initialize the SW tx descriptor */
  1181. tx_desc->nbuf = nbuf;
  1182. tx_desc->frm_type = msdu_info->frm_type;
  1183. tx_desc->tx_encap_type = vdev->tx_encap_type;
  1184. tx_desc->vdev_id = vdev->vdev_id;
  1185. tx_desc->pdev = pdev;
  1186. tx_desc->pkt_offset = 0;
  1187. dp_tx_trace_pkt(soc, nbuf, tx_desc->id, vdev->vdev_id,
  1188. vdev->qdf_opmode);
  1189. /* Handle scattered frames - TSO/SG/ME */
  1190. /* Allocate and prepare an extension descriptor for scattered frames */
  1191. msdu_ext_desc = dp_tx_prepare_ext_desc(vdev, msdu_info, desc_pool_id);
  1192. if (!msdu_ext_desc) {
  1193. dp_tx_info("Tx Extension Descriptor Alloc Fail");
  1194. goto failure;
  1195. }
  1196. #if !TQM_BYPASS_WAR
  1197. if (qdf_unlikely(msdu_info->exception_fw) ||
  1198. dp_tx_is_nbuf_marked_exception(soc, nbuf))
  1199. #endif
  1200. {
  1201. /* Temporary WAR due to TQM VP issues */
  1202. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  1203. qdf_atomic_inc(&soc->num_tx_exception);
  1204. }
  1205. tx_desc->msdu_ext_desc = msdu_ext_desc;
  1206. tx_desc->flags |= DP_TX_DESC_FLAG_FRAG;
  1207. msdu_ext_desc->tso_desc = msdu_info->u.tso_info.curr_seg;
  1208. msdu_ext_desc->tso_num_desc = msdu_info->u.tso_info.tso_num_seg_list;
  1209. tx_desc->dma_addr = msdu_ext_desc->paddr;
  1210. if (msdu_ext_desc->flags & DP_TX_EXT_DESC_FLAG_METADATA_VALID)
  1211. tx_desc->length = HAL_TX_EXT_DESC_WITH_META_DATA;
  1212. else
  1213. tx_desc->length = HAL_TX_EXTENSION_DESC_LEN_BYTES;
  1214. return tx_desc;
  1215. failure:
  1216. dp_tx_desc_release(soc, tx_desc, desc_pool_id);
  1217. return NULL;
  1218. }
  1219. /**
  1220. * dp_tx_prepare_raw() - Prepare RAW packet TX
  1221. * @vdev: DP vdev handle
  1222. * @nbuf: buffer pointer
  1223. * @seg_info: Pointer to Segment info Descriptor to be prepared
  1224. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension
  1225. * descriptor
  1226. *
  1227. * Return:
  1228. */
  1229. static qdf_nbuf_t dp_tx_prepare_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1230. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  1231. {
  1232. qdf_nbuf_t curr_nbuf = NULL;
  1233. uint16_t total_len = 0;
  1234. qdf_dma_addr_t paddr;
  1235. int32_t i;
  1236. int32_t mapped_buf_num = 0;
  1237. struct dp_tx_sg_info_s *sg_info = &msdu_info->u.sg_info;
  1238. qdf_dot3_qosframe_t *qos_wh = (qdf_dot3_qosframe_t *) nbuf->data;
  1239. DP_STATS_INC_PKT(vdev, tx_i.raw.raw_pkt, 1, qdf_nbuf_len(nbuf));
  1240. /* Continue only if frames are of DATA type */
  1241. if (!DP_FRAME_IS_DATA(qos_wh)) {
  1242. DP_STATS_INC(vdev, tx_i.raw.invalid_raw_pkt_datatype, 1);
  1243. dp_tx_debug("Pkt. recd is of not data type");
  1244. goto error;
  1245. }
  1246. /* SWAR for HW: Enable WEP bit in the AMSDU frames for RAW mode */
  1247. if (vdev->raw_mode_war &&
  1248. (qos_wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) &&
  1249. (qos_wh->i_qos[0] & IEEE80211_QOS_AMSDU))
  1250. qos_wh->i_fc[1] |= IEEE80211_FC1_WEP;
  1251. for (curr_nbuf = nbuf, i = 0; curr_nbuf;
  1252. curr_nbuf = qdf_nbuf_next(curr_nbuf), i++) {
  1253. /*
  1254. * Number of nbuf's must not exceed the size of the frags
  1255. * array in seg_info.
  1256. */
  1257. if (i >= DP_TX_MAX_NUM_FRAGS) {
  1258. dp_err_rl("nbuf cnt exceeds the max number of segs");
  1259. DP_STATS_INC(vdev, tx_i.raw.num_frags_overflow_err, 1);
  1260. goto error;
  1261. }
  1262. if (QDF_STATUS_SUCCESS !=
  1263. qdf_nbuf_map_nbytes_single(vdev->osdev,
  1264. curr_nbuf,
  1265. QDF_DMA_TO_DEVICE,
  1266. curr_nbuf->len)) {
  1267. dp_tx_err("%s dma map error ", __func__);
  1268. DP_STATS_INC(vdev, tx_i.raw.dma_map_error, 1);
  1269. goto error;
  1270. }
  1271. /* Update the count of mapped nbuf's */
  1272. mapped_buf_num++;
  1273. paddr = qdf_nbuf_get_frag_paddr(curr_nbuf, 0);
  1274. seg_info->frags[i].paddr_lo = paddr;
  1275. seg_info->frags[i].paddr_hi = ((uint64_t)paddr >> 32);
  1276. seg_info->frags[i].len = qdf_nbuf_len(curr_nbuf);
  1277. seg_info->frags[i].vaddr = (void *) curr_nbuf;
  1278. total_len += qdf_nbuf_len(curr_nbuf);
  1279. }
  1280. seg_info->frag_cnt = i;
  1281. seg_info->total_len = total_len;
  1282. seg_info->next = NULL;
  1283. sg_info->curr_seg = seg_info;
  1284. msdu_info->frm_type = dp_tx_frm_raw;
  1285. msdu_info->num_seg = 1;
  1286. return nbuf;
  1287. error:
  1288. i = 0;
  1289. while (nbuf) {
  1290. curr_nbuf = nbuf;
  1291. if (i < mapped_buf_num) {
  1292. qdf_nbuf_unmap_nbytes_single(vdev->osdev, curr_nbuf,
  1293. QDF_DMA_TO_DEVICE,
  1294. curr_nbuf->len);
  1295. i++;
  1296. }
  1297. nbuf = qdf_nbuf_next(nbuf);
  1298. qdf_nbuf_free(curr_nbuf);
  1299. }
  1300. return NULL;
  1301. }
  1302. /**
  1303. * dp_tx_raw_prepare_unset() - unmap the chain of nbufs belonging to RAW frame.
  1304. * @soc: DP soc handle
  1305. * @nbuf: Buffer pointer
  1306. *
  1307. * unmap the chain of nbufs that belong to this RAW frame.
  1308. *
  1309. * Return: None
  1310. */
  1311. static void dp_tx_raw_prepare_unset(struct dp_soc *soc,
  1312. qdf_nbuf_t nbuf)
  1313. {
  1314. qdf_nbuf_t cur_nbuf = nbuf;
  1315. do {
  1316. qdf_nbuf_unmap_nbytes_single(soc->osdev, cur_nbuf,
  1317. QDF_DMA_TO_DEVICE,
  1318. cur_nbuf->len);
  1319. cur_nbuf = qdf_nbuf_next(cur_nbuf);
  1320. } while (cur_nbuf);
  1321. }
  1322. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1323. void dp_vdev_peer_stats_update_protocol_cnt_tx(struct dp_vdev *vdev_hdl,
  1324. qdf_nbuf_t nbuf)
  1325. {
  1326. qdf_nbuf_t nbuf_local;
  1327. struct dp_vdev *vdev_local = vdev_hdl;
  1328. do {
  1329. if (qdf_likely(!((vdev_local)->peer_protocol_count_track)))
  1330. break;
  1331. nbuf_local = nbuf;
  1332. if (qdf_unlikely(((vdev_local)->tx_encap_type) ==
  1333. htt_cmn_pkt_type_raw))
  1334. break;
  1335. else if (qdf_unlikely(qdf_nbuf_is_nonlinear((nbuf_local))))
  1336. break;
  1337. else if (qdf_nbuf_is_tso((nbuf_local)))
  1338. break;
  1339. dp_vdev_peer_stats_update_protocol_cnt((vdev_local),
  1340. (nbuf_local),
  1341. NULL, 1, 0);
  1342. } while (0);
  1343. }
  1344. #endif
  1345. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1346. void dp_tx_update_stats(struct dp_soc *soc,
  1347. struct dp_tx_desc_s *tx_desc,
  1348. uint8_t ring_id)
  1349. {
  1350. uint32_t stats_len = dp_tx_get_pkt_len(tx_desc);
  1351. DP_STATS_INC_PKT(soc, tx.egress[ring_id], 1, stats_len);
  1352. }
  1353. int
  1354. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  1355. struct dp_tx_desc_s *tx_desc,
  1356. uint8_t tid,
  1357. struct dp_tx_msdu_info_s *msdu_info,
  1358. uint8_t ring_id)
  1359. {
  1360. struct dp_swlm *swlm = &soc->swlm;
  1361. union swlm_data swlm_query_data;
  1362. struct dp_swlm_tcl_data tcl_data;
  1363. QDF_STATUS status;
  1364. int ret;
  1365. if (!swlm->is_enabled)
  1366. return msdu_info->skip_hp_update;
  1367. tcl_data.nbuf = tx_desc->nbuf;
  1368. tcl_data.tid = tid;
  1369. tcl_data.ring_id = ring_id;
  1370. tcl_data.pkt_len = dp_tx_get_pkt_len(tx_desc);
  1371. tcl_data.num_ll_connections = vdev->num_latency_critical_conn;
  1372. swlm_query_data.tcl_data = &tcl_data;
  1373. status = dp_swlm_tcl_pre_check(soc, &tcl_data);
  1374. if (QDF_IS_STATUS_ERROR(status)) {
  1375. dp_swlm_tcl_reset_session_data(soc, ring_id);
  1376. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1377. return 0;
  1378. }
  1379. ret = dp_swlm_query_policy(soc, TCL_DATA, swlm_query_data);
  1380. if (ret) {
  1381. DP_STATS_INC(swlm, tcl[ring_id].coalesce_success, 1);
  1382. } else {
  1383. DP_STATS_INC(swlm, tcl[ring_id].coalesce_fail, 1);
  1384. }
  1385. return ret;
  1386. }
  1387. void
  1388. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  1389. int coalesce)
  1390. {
  1391. if (coalesce)
  1392. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1393. else
  1394. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  1395. }
  1396. static inline void
  1397. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1398. {
  1399. if (((i + 1) < msdu_info->num_seg))
  1400. msdu_info->skip_hp_update = 1;
  1401. else
  1402. msdu_info->skip_hp_update = 0;
  1403. }
  1404. static inline void
  1405. dp_flush_tcp_hp(struct dp_soc *soc, uint8_t ring_id)
  1406. {
  1407. hal_ring_handle_t hal_ring_hdl =
  1408. dp_tx_get_hal_ring_hdl(soc, ring_id);
  1409. if (dp_tx_hal_ring_access_start(soc, hal_ring_hdl)) {
  1410. dp_err("Fillmore: SRNG access start failed");
  1411. return;
  1412. }
  1413. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, 0);
  1414. }
  1415. static inline void
  1416. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1417. QDF_STATUS status,
  1418. struct dp_tx_msdu_info_s *msdu_info)
  1419. {
  1420. if (QDF_IS_STATUS_ERROR(status) && !msdu_info->skip_hp_update) {
  1421. dp_flush_tcp_hp(soc,
  1422. (msdu_info->tx_queue.ring_id & DP_TX_QUEUE_MASK));
  1423. }
  1424. }
  1425. #else
  1426. static inline void
  1427. dp_tx_is_hp_update_required(uint32_t i, struct dp_tx_msdu_info_s *msdu_info)
  1428. {
  1429. }
  1430. static inline void
  1431. dp_tx_check_and_flush_hp(struct dp_soc *soc,
  1432. QDF_STATUS status,
  1433. struct dp_tx_msdu_info_s *msdu_info)
  1434. {
  1435. }
  1436. #endif
  1437. #ifdef FEATURE_RUNTIME_PM
  1438. void
  1439. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1440. hal_ring_handle_t hal_ring_hdl,
  1441. int coalesce)
  1442. {
  1443. int ret;
  1444. /*
  1445. * Avoid runtime get and put APIs under high throughput scenarios.
  1446. */
  1447. if (dp_get_rtpm_tput_policy_requirement(soc)) {
  1448. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1449. return;
  1450. }
  1451. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  1452. if (QDF_IS_STATUS_SUCCESS(ret)) {
  1453. if (hif_system_pm_state_check(soc->hif_handle)) {
  1454. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1455. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1456. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1457. } else {
  1458. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1459. }
  1460. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  1461. } else {
  1462. dp_runtime_get(soc);
  1463. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1464. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1465. qdf_atomic_inc(&soc->tx_pending_rtpm);
  1466. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1467. dp_runtime_put(soc);
  1468. }
  1469. }
  1470. #else
  1471. #ifdef DP_POWER_SAVE
  1472. void
  1473. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  1474. hal_ring_handle_t hal_ring_hdl,
  1475. int coalesce)
  1476. {
  1477. if (hif_system_pm_state_check(soc->hif_handle)) {
  1478. dp_tx_hal_ring_access_end_reap(soc, hal_ring_hdl);
  1479. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  1480. hal_srng_inc_flush_cnt(hal_ring_hdl);
  1481. } else {
  1482. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  1483. }
  1484. }
  1485. #endif
  1486. #endif
  1487. /**
  1488. * dp_tx_get_tid() - Obtain TID to be used for this frame
  1489. * @vdev: DP vdev handle
  1490. * @nbuf: skb
  1491. * @msdu_info: msdu descriptor
  1492. *
  1493. * Extract the DSCP or PCP information from frame and map into TID value.
  1494. *
  1495. * Return: void
  1496. */
  1497. static void dp_tx_get_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1498. struct dp_tx_msdu_info_s *msdu_info)
  1499. {
  1500. uint8_t tos = 0, dscp_tid_override = 0;
  1501. uint8_t *hdr_ptr, *L3datap;
  1502. uint8_t is_mcast = 0;
  1503. qdf_ether_header_t *eh = NULL;
  1504. qdf_ethervlan_header_t *evh = NULL;
  1505. uint16_t ether_type;
  1506. qdf_llc_t *llcHdr;
  1507. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1508. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1509. if (qdf_likely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1510. eh = (qdf_ether_header_t *)nbuf->data;
  1511. hdr_ptr = (uint8_t *)(eh->ether_dhost);
  1512. L3datap = hdr_ptr + sizeof(qdf_ether_header_t);
  1513. } else {
  1514. qdf_dot3_qosframe_t *qos_wh =
  1515. (qdf_dot3_qosframe_t *) nbuf->data;
  1516. msdu_info->tid = qos_wh->i_fc[0] & DP_FC0_SUBTYPE_QOS ?
  1517. qos_wh->i_qos[0] & DP_QOS_TID : 0;
  1518. return;
  1519. }
  1520. is_mcast = DP_FRAME_IS_MULTICAST(hdr_ptr);
  1521. ether_type = eh->ether_type;
  1522. llcHdr = (qdf_llc_t *)(nbuf->data + sizeof(qdf_ether_header_t));
  1523. /*
  1524. * Check if packet is dot3 or eth2 type.
  1525. */
  1526. if (DP_FRAME_IS_LLC(ether_type) && DP_FRAME_IS_SNAP(llcHdr)) {
  1527. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE +
  1528. sizeof(*llcHdr));
  1529. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1530. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t) +
  1531. sizeof(*llcHdr);
  1532. ether_type = (uint16_t)*(nbuf->data + 2*QDF_MAC_ADDR_SIZE
  1533. + sizeof(*llcHdr) +
  1534. sizeof(qdf_net_vlanhdr_t));
  1535. } else {
  1536. L3datap = hdr_ptr + sizeof(qdf_ether_header_t) +
  1537. sizeof(*llcHdr);
  1538. }
  1539. } else {
  1540. if (ether_type == htons(ETHERTYPE_VLAN)) {
  1541. evh = (qdf_ethervlan_header_t *) eh;
  1542. ether_type = evh->ether_type;
  1543. L3datap = hdr_ptr + sizeof(qdf_ethervlan_header_t);
  1544. }
  1545. }
  1546. /*
  1547. * Find priority from IP TOS DSCP field
  1548. */
  1549. if (qdf_nbuf_is_ipv4_pkt(nbuf)) {
  1550. qdf_net_iphdr_t *ip = (qdf_net_iphdr_t *) L3datap;
  1551. if (qdf_nbuf_is_ipv4_dhcp_pkt(nbuf)) {
  1552. /* Only for unicast frames */
  1553. if (!is_mcast) {
  1554. /* send it on VO queue */
  1555. msdu_info->tid = DP_VO_TID;
  1556. }
  1557. } else {
  1558. /*
  1559. * IP frame: exclude ECN bits 0-1 and map DSCP bits 2-7
  1560. * from TOS byte.
  1561. */
  1562. tos = ip->ip_tos;
  1563. dscp_tid_override = 1;
  1564. }
  1565. } else if (qdf_nbuf_is_ipv6_pkt(nbuf)) {
  1566. /* TODO
  1567. * use flowlabel
  1568. *igmpmld cases to be handled in phase 2
  1569. */
  1570. unsigned long ver_pri_flowlabel;
  1571. unsigned long pri;
  1572. ver_pri_flowlabel = *(unsigned long *) L3datap;
  1573. pri = (ntohl(ver_pri_flowlabel) & IPV6_FLOWINFO_PRIORITY) >>
  1574. DP_IPV6_PRIORITY_SHIFT;
  1575. tos = pri;
  1576. dscp_tid_override = 1;
  1577. } else if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1578. msdu_info->tid = DP_VO_TID;
  1579. else if (qdf_nbuf_is_ipv4_arp_pkt(nbuf)) {
  1580. /* Only for unicast frames */
  1581. if (!is_mcast) {
  1582. /* send ucast arp on VO queue */
  1583. msdu_info->tid = DP_VO_TID;
  1584. }
  1585. }
  1586. /*
  1587. * Assign all MCAST packets to BE
  1588. */
  1589. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  1590. if (is_mcast) {
  1591. tos = 0;
  1592. dscp_tid_override = 1;
  1593. }
  1594. }
  1595. if (dscp_tid_override == 1) {
  1596. tos = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  1597. msdu_info->tid = pdev->dscp_tid_map[vdev->dscp_tid_map_id][tos];
  1598. }
  1599. if (msdu_info->tid >= CDP_MAX_DATA_TIDS)
  1600. msdu_info->tid = CDP_MAX_DATA_TIDS - 1;
  1601. return;
  1602. }
  1603. /**
  1604. * dp_tx_classify_tid() - Obtain TID to be used for this frame
  1605. * @vdev: DP vdev handle
  1606. * @nbuf: skb
  1607. * @msdu_info: msdu descriptor
  1608. *
  1609. * Software based TID classification is required when more than 2 DSCP-TID
  1610. * mapping tables are needed.
  1611. * Hardware supports 2 DSCP-TID mapping tables for HKv1 and 48 for HKv2.
  1612. *
  1613. * Return: void
  1614. */
  1615. static inline void dp_tx_classify_tid(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1616. struct dp_tx_msdu_info_s *msdu_info)
  1617. {
  1618. DP_TX_TID_OVERRIDE(msdu_info, nbuf);
  1619. /*
  1620. * skip_sw_tid_classification flag will set in below cases-
  1621. * 1. vdev->dscp_tid_map_id < pdev->soc->num_hw_dscp_tid_map
  1622. * 2. hlos_tid_override enabled for vdev
  1623. * 3. mesh mode enabled for vdev
  1624. */
  1625. if (qdf_likely(vdev->skip_sw_tid_classification)) {
  1626. /* Update tid in msdu_info from skb priority */
  1627. if (qdf_unlikely(vdev->skip_sw_tid_classification
  1628. & DP_TXRX_HLOS_TID_OVERRIDE_ENABLED)) {
  1629. uint32_t tid = qdf_nbuf_get_priority(nbuf);
  1630. if (tid == DP_TX_INVALID_QOS_TAG)
  1631. return;
  1632. msdu_info->tid = tid;
  1633. return;
  1634. }
  1635. return;
  1636. }
  1637. dp_tx_get_tid(vdev, nbuf, msdu_info);
  1638. }
  1639. #ifdef FEATURE_WLAN_TDLS
  1640. /**
  1641. * dp_tx_update_tdls_flags() - Update descriptor flags for TDLS frame
  1642. * @soc: datapath SOC
  1643. * @vdev: datapath vdev
  1644. * @tx_desc: TX descriptor
  1645. *
  1646. * Return: None
  1647. */
  1648. static void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1649. struct dp_vdev *vdev,
  1650. struct dp_tx_desc_s *tx_desc)
  1651. {
  1652. if (vdev) {
  1653. if (vdev->is_tdls_frame) {
  1654. tx_desc->flags |= DP_TX_DESC_FLAG_TDLS_FRAME;
  1655. vdev->is_tdls_frame = false;
  1656. }
  1657. }
  1658. }
  1659. static uint8_t dp_htt_tx_comp_get_status(struct dp_soc *soc, char *htt_desc)
  1660. {
  1661. uint8_t tx_status = HTT_TX_FW2WBM_TX_STATUS_MAX;
  1662. switch (soc->arch_id) {
  1663. case CDP_ARCH_TYPE_LI:
  1664. tx_status = HTT_TX_WBM_COMPLETION_V2_TX_STATUS_GET(htt_desc[0]);
  1665. break;
  1666. case CDP_ARCH_TYPE_BE:
  1667. tx_status = HTT_TX_WBM_COMPLETION_V3_TX_STATUS_GET(htt_desc[0]);
  1668. break;
  1669. case CDP_ARCH_TYPE_RH:
  1670. {
  1671. uint32_t *msg_word = (uint32_t *)htt_desc;
  1672. tx_status = HTT_TX_MSDU_INFO_RELEASE_REASON_GET(
  1673. *(msg_word + 3));
  1674. }
  1675. break;
  1676. default:
  1677. dp_err("Incorrect CDP_ARCH %d", soc->arch_id);
  1678. QDF_BUG(0);
  1679. }
  1680. return tx_status;
  1681. }
  1682. /**
  1683. * dp_non_std_htt_tx_comp_free_buff() - Free the non std tx packet buffer
  1684. * @soc: dp_soc handle
  1685. * @tx_desc: TX descriptor
  1686. *
  1687. * Return: None
  1688. */
  1689. static void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1690. struct dp_tx_desc_s *tx_desc)
  1691. {
  1692. uint8_t tx_status = 0;
  1693. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  1694. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1695. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id,
  1696. DP_MOD_ID_TDLS);
  1697. if (qdf_unlikely(!vdev)) {
  1698. dp_err_rl("vdev is null!");
  1699. goto error;
  1700. }
  1701. hal_tx_comp_get_htt_desc(&tx_desc->comp, htt_tx_status);
  1702. tx_status = dp_htt_tx_comp_get_status(soc, htt_tx_status);
  1703. dp_debug("vdev_id: %d tx_status: %d", tx_desc->vdev_id, tx_status);
  1704. if (vdev->tx_non_std_data_callback.func) {
  1705. qdf_nbuf_set_next(nbuf, NULL);
  1706. vdev->tx_non_std_data_callback.func(
  1707. vdev->tx_non_std_data_callback.ctxt,
  1708. nbuf, tx_status);
  1709. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1710. return;
  1711. } else {
  1712. dp_err_rl("callback func is null");
  1713. }
  1714. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  1715. error:
  1716. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE);
  1717. qdf_nbuf_free(nbuf);
  1718. }
  1719. /**
  1720. * dp_tx_msdu_single_map() - do nbuf map
  1721. * @vdev: DP vdev handle
  1722. * @tx_desc: DP TX descriptor pointer
  1723. * @nbuf: skb pointer
  1724. *
  1725. * For TDLS frame, use qdf_nbuf_map_single() to align with the unmap
  1726. * operation done in other component.
  1727. *
  1728. * Return: QDF_STATUS
  1729. */
  1730. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1731. struct dp_tx_desc_s *tx_desc,
  1732. qdf_nbuf_t nbuf)
  1733. {
  1734. if (qdf_likely(!(tx_desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME)))
  1735. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1736. nbuf,
  1737. QDF_DMA_TO_DEVICE,
  1738. nbuf->len);
  1739. else
  1740. return qdf_nbuf_map_single(vdev->osdev, nbuf,
  1741. QDF_DMA_TO_DEVICE);
  1742. }
  1743. #else
  1744. static inline void dp_tx_update_tdls_flags(struct dp_soc *soc,
  1745. struct dp_vdev *vdev,
  1746. struct dp_tx_desc_s *tx_desc)
  1747. {
  1748. }
  1749. static inline void dp_non_std_htt_tx_comp_free_buff(struct dp_soc *soc,
  1750. struct dp_tx_desc_s *tx_desc)
  1751. {
  1752. }
  1753. static inline QDF_STATUS dp_tx_msdu_single_map(struct dp_vdev *vdev,
  1754. struct dp_tx_desc_s *tx_desc,
  1755. qdf_nbuf_t nbuf)
  1756. {
  1757. return qdf_nbuf_map_nbytes_single(vdev->osdev,
  1758. nbuf,
  1759. QDF_DMA_TO_DEVICE,
  1760. nbuf->len);
  1761. }
  1762. #endif
  1763. static inline
  1764. qdf_dma_addr_t dp_tx_nbuf_map_regular(struct dp_vdev *vdev,
  1765. struct dp_tx_desc_s *tx_desc,
  1766. qdf_nbuf_t nbuf)
  1767. {
  1768. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1769. ret = dp_tx_msdu_single_map(vdev, tx_desc, nbuf);
  1770. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret)))
  1771. return 0;
  1772. return qdf_nbuf_mapped_paddr_get(nbuf);
  1773. }
  1774. static inline
  1775. void dp_tx_nbuf_unmap_regular(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1776. {
  1777. qdf_nbuf_unmap_nbytes_single_paddr(soc->osdev,
  1778. desc->nbuf,
  1779. desc->dma_addr,
  1780. QDF_DMA_TO_DEVICE,
  1781. desc->length);
  1782. }
  1783. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  1784. static inline bool
  1785. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1786. {
  1787. struct net_device *ingress_dev;
  1788. skb_frag_t *frag;
  1789. uint16_t buf_len = 0;
  1790. uint16_t linear_data_len = 0;
  1791. uint8_t *payload_addr = NULL;
  1792. ingress_dev = dev_get_by_index(dev_net(nbuf->dev), nbuf->skb_iif);
  1793. if (!ingress_dev)
  1794. return false;
  1795. if ((ingress_dev->priv_flags & IFF_PHONY_HEADROOM)) {
  1796. dev_put(ingress_dev);
  1797. frag = &(skb_shinfo(nbuf)->frags[0]);
  1798. buf_len = skb_frag_size(frag);
  1799. payload_addr = (uint8_t *)skb_frag_address(frag);
  1800. linear_data_len = skb_headlen(nbuf);
  1801. buf_len += linear_data_len;
  1802. payload_addr = payload_addr - linear_data_len;
  1803. memcpy(payload_addr, nbuf->data, linear_data_len);
  1804. msdu_info->frm_type = dp_tx_frm_rmnet;
  1805. msdu_info->buf_len = buf_len;
  1806. msdu_info->payload_addr = payload_addr;
  1807. return true;
  1808. }
  1809. dev_put(ingress_dev);
  1810. return false;
  1811. }
  1812. static inline
  1813. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1814. struct dp_tx_desc_s *tx_desc)
  1815. {
  1816. qdf_dma_addr_t paddr;
  1817. paddr = (qdf_dma_addr_t)qdf_mem_virt_to_phys(msdu_info->payload_addr);
  1818. tx_desc->length = msdu_info->buf_len;
  1819. qdf_nbuf_dma_clean_range((void *)msdu_info->payload_addr,
  1820. (void *)(msdu_info->payload_addr +
  1821. msdu_info->buf_len));
  1822. tx_desc->flags |= DP_TX_DESC_FLAG_RMNET;
  1823. return paddr;
  1824. }
  1825. #else
  1826. static inline bool
  1827. is_nbuf_frm_rmnet(qdf_nbuf_t nbuf, struct dp_tx_msdu_info_s *msdu_info)
  1828. {
  1829. return false;
  1830. }
  1831. static inline
  1832. qdf_dma_addr_t dp_tx_rmnet_nbuf_map(struct dp_tx_msdu_info_s *msdu_info,
  1833. struct dp_tx_desc_s *tx_desc)
  1834. {
  1835. return 0;
  1836. }
  1837. #endif
  1838. #if defined(QCA_DP_TX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  1839. static inline
  1840. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1841. struct dp_tx_desc_s *tx_desc,
  1842. qdf_nbuf_t nbuf)
  1843. {
  1844. if (qdf_likely(tx_desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  1845. qdf_nbuf_dma_clean_range((void *)nbuf->data,
  1846. (void *)(nbuf->data + nbuf->len));
  1847. return (qdf_dma_addr_t)qdf_mem_virt_to_phys(nbuf->data);
  1848. } else {
  1849. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1850. }
  1851. }
  1852. static inline
  1853. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1854. struct dp_tx_desc_s *desc)
  1855. {
  1856. if (qdf_unlikely(!(desc->flags &
  1857. (DP_TX_DESC_FLAG_SIMPLE | DP_TX_DESC_FLAG_RMNET))))
  1858. return dp_tx_nbuf_unmap_regular(soc, desc);
  1859. }
  1860. #else
  1861. static inline
  1862. qdf_dma_addr_t dp_tx_nbuf_map(struct dp_vdev *vdev,
  1863. struct dp_tx_desc_s *tx_desc,
  1864. qdf_nbuf_t nbuf)
  1865. {
  1866. return dp_tx_nbuf_map_regular(vdev, tx_desc, nbuf);
  1867. }
  1868. static inline
  1869. void dp_tx_nbuf_unmap(struct dp_soc *soc,
  1870. struct dp_tx_desc_s *desc)
  1871. {
  1872. return dp_tx_nbuf_unmap_regular(soc, desc);
  1873. }
  1874. #endif
  1875. #if defined(WLAN_TX_PKT_CAPTURE_ENH) || defined(FEATURE_PERPKT_INFO)
  1876. static inline
  1877. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1878. {
  1879. dp_tx_nbuf_unmap(soc, desc);
  1880. desc->flags |= DP_TX_DESC_FLAG_UNMAP_DONE;
  1881. }
  1882. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1883. {
  1884. if (qdf_likely(!(desc->flags & DP_TX_DESC_FLAG_UNMAP_DONE)))
  1885. dp_tx_nbuf_unmap(soc, desc);
  1886. }
  1887. #else
  1888. static inline
  1889. void dp_tx_enh_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1890. {
  1891. }
  1892. static inline void dp_tx_unmap(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  1893. {
  1894. dp_tx_nbuf_unmap(soc, desc);
  1895. }
  1896. #endif
  1897. #ifdef MESH_MODE_SUPPORT
  1898. /**
  1899. * dp_tx_update_mesh_flags() - Update descriptor flags for mesh VAP
  1900. * @soc: datapath SOC
  1901. * @vdev: datapath vdev
  1902. * @tx_desc: TX descriptor
  1903. *
  1904. * Return: None
  1905. */
  1906. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1907. struct dp_vdev *vdev,
  1908. struct dp_tx_desc_s *tx_desc)
  1909. {
  1910. if (qdf_unlikely(vdev->mesh_vdev))
  1911. tx_desc->flags |= DP_TX_DESC_FLAG_MESH_MODE;
  1912. }
  1913. /**
  1914. * dp_mesh_tx_comp_free_buff() - Free the mesh tx packet buffer
  1915. * @soc: dp_soc handle
  1916. * @tx_desc: TX descriptor
  1917. * @delayed_free: delay the nbuf free
  1918. *
  1919. * Return: nbuf to be freed late
  1920. */
  1921. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1922. struct dp_tx_desc_s *tx_desc,
  1923. bool delayed_free)
  1924. {
  1925. qdf_nbuf_t nbuf = tx_desc->nbuf;
  1926. struct dp_vdev *vdev = NULL;
  1927. vdev = dp_vdev_get_ref_by_id(soc, tx_desc->vdev_id, DP_MOD_ID_MESH);
  1928. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW) {
  1929. if (vdev)
  1930. DP_STATS_INC(vdev, tx_i.mesh.completion_fw, 1);
  1931. if (delayed_free)
  1932. return nbuf;
  1933. qdf_nbuf_free(nbuf);
  1934. } else {
  1935. if (vdev && vdev->osif_tx_free_ext) {
  1936. vdev->osif_tx_free_ext((nbuf));
  1937. } else {
  1938. if (delayed_free)
  1939. return nbuf;
  1940. qdf_nbuf_free(nbuf);
  1941. }
  1942. }
  1943. if (vdev)
  1944. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  1945. return NULL;
  1946. }
  1947. #else
  1948. static inline void dp_tx_update_mesh_flags(struct dp_soc *soc,
  1949. struct dp_vdev *vdev,
  1950. struct dp_tx_desc_s *tx_desc)
  1951. {
  1952. }
  1953. static inline qdf_nbuf_t dp_mesh_tx_comp_free_buff(struct dp_soc *soc,
  1954. struct dp_tx_desc_s *tx_desc,
  1955. bool delayed_free)
  1956. {
  1957. return NULL;
  1958. }
  1959. #endif
  1960. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac)
  1961. {
  1962. struct dp_pdev *pdev = NULL;
  1963. struct dp_ast_entry *src_ast_entry = NULL;
  1964. struct dp_ast_entry *dst_ast_entry = NULL;
  1965. struct dp_soc *soc = NULL;
  1966. qdf_assert(vdev);
  1967. pdev = vdev->pdev;
  1968. qdf_assert(pdev);
  1969. soc = pdev->soc;
  1970. dst_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1971. (soc, dstmac, vdev->pdev->pdev_id);
  1972. src_ast_entry = dp_peer_ast_hash_find_by_pdevid
  1973. (soc, srcmac, vdev->pdev->pdev_id);
  1974. if (dst_ast_entry && src_ast_entry) {
  1975. if (dst_ast_entry->peer_id ==
  1976. src_ast_entry->peer_id)
  1977. return 1;
  1978. }
  1979. return 0;
  1980. }
  1981. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  1982. defined(WLAN_MCAST_MLO)
  1983. /* MLO peer id for reinject*/
  1984. #define DP_MLO_MCAST_REINJECT_PEER_ID 0XFFFD
  1985. /* MLO vdev id inc offset */
  1986. #define DP_MLO_VDEV_ID_OFFSET 0x80
  1987. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1988. static inline bool
  1989. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  1990. {
  1991. if (tx_exc_metadata && tx_exc_metadata->is_wds_extended)
  1992. return true;
  1993. return false;
  1994. }
  1995. #else
  1996. static inline bool
  1997. dp_tx_wds_ext_check(struct cdp_tx_exception_metadata *tx_exc_metadata)
  1998. {
  1999. return false;
  2000. }
  2001. #endif
  2002. static inline void
  2003. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2004. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2005. {
  2006. /* wds ext enabled will not set the TO_FW bit */
  2007. if (dp_tx_wds_ext_check(tx_exc_metadata))
  2008. return;
  2009. if (!(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)) {
  2010. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2011. qdf_atomic_inc(&soc->num_tx_exception);
  2012. }
  2013. }
  2014. static inline void
  2015. dp_tx_update_mcast_param(uint16_t peer_id,
  2016. uint16_t *htt_tcl_metadata,
  2017. struct dp_vdev *vdev,
  2018. struct dp_tx_msdu_info_s *msdu_info)
  2019. {
  2020. if (peer_id == DP_MLO_MCAST_REINJECT_PEER_ID) {
  2021. *htt_tcl_metadata = 0;
  2022. DP_TX_TCL_METADATA_TYPE_SET(
  2023. *htt_tcl_metadata,
  2024. HTT_TCL_METADATA_V2_TYPE_GLOBAL_SEQ_BASED);
  2025. HTT_TX_TCL_METADATA_GLBL_SEQ_NO_SET(*htt_tcl_metadata,
  2026. msdu_info->gsn);
  2027. msdu_info->vdev_id = vdev->vdev_id + DP_MLO_VDEV_ID_OFFSET;
  2028. HTT_TX_TCL_METADATA_GLBL_SEQ_HOST_INSPECTED_SET(
  2029. *htt_tcl_metadata, 1);
  2030. } else {
  2031. msdu_info->vdev_id = vdev->vdev_id;
  2032. }
  2033. }
  2034. #else
  2035. static inline void
  2036. dp_tx_bypass_reinjection(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  2037. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2038. {
  2039. }
  2040. static inline void
  2041. dp_tx_update_mcast_param(uint16_t peer_id,
  2042. uint16_t *htt_tcl_metadata,
  2043. struct dp_vdev *vdev,
  2044. struct dp_tx_msdu_info_s *msdu_info)
  2045. {
  2046. }
  2047. #endif
  2048. #ifdef DP_TX_SW_DROP_STATS_INC
  2049. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2050. qdf_nbuf_t nbuf,
  2051. enum cdp_tx_sw_drop drop_code)
  2052. {
  2053. /* EAPOL Drop stats */
  2054. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf)) {
  2055. switch (drop_code) {
  2056. case TX_DESC_ERR:
  2057. DP_STATS_INC(pdev, eap_drop_stats.tx_desc_err, 1);
  2058. break;
  2059. case TX_HAL_RING_ACCESS_ERR:
  2060. DP_STATS_INC(pdev,
  2061. eap_drop_stats.tx_hal_ring_access_err, 1);
  2062. break;
  2063. case TX_DMA_MAP_ERR:
  2064. DP_STATS_INC(pdev, eap_drop_stats.tx_dma_map_err, 1);
  2065. break;
  2066. case TX_HW_ENQUEUE:
  2067. DP_STATS_INC(pdev, eap_drop_stats.tx_hw_enqueue, 1);
  2068. break;
  2069. case TX_SW_ENQUEUE:
  2070. DP_STATS_INC(pdev, eap_drop_stats.tx_sw_enqueue, 1);
  2071. break;
  2072. default:
  2073. dp_info_rl("Invalid eapol_drop code: %d", drop_code);
  2074. break;
  2075. }
  2076. }
  2077. }
  2078. #else
  2079. static void tx_sw_drop_stats_inc(struct dp_pdev *pdev,
  2080. qdf_nbuf_t nbuf,
  2081. enum cdp_tx_sw_drop drop_code)
  2082. {
  2083. }
  2084. #endif
  2085. qdf_nbuf_t
  2086. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2087. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  2088. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2089. {
  2090. struct dp_pdev *pdev = vdev->pdev;
  2091. struct dp_soc *soc = pdev->soc;
  2092. struct dp_tx_desc_s *tx_desc;
  2093. QDF_STATUS status;
  2094. struct dp_tx_queue *tx_q = &(msdu_info->tx_queue);
  2095. uint16_t htt_tcl_metadata = 0;
  2096. enum cdp_tx_sw_drop drop_code = TX_MAX_DROP;
  2097. uint8_t tid = msdu_info->tid;
  2098. struct cdp_tid_tx_stats *tid_stats = NULL;
  2099. qdf_dma_addr_t paddr;
  2100. /* Setup Tx descriptor for an MSDU, and MSDU extension descriptor */
  2101. tx_desc = dp_tx_prepare_desc_single(vdev, nbuf, tx_q->desc_pool_id,
  2102. msdu_info, tx_exc_metadata);
  2103. if (!tx_desc) {
  2104. dp_err_rl("Tx_desc prepare Fail vdev_id %d vdev %pK queue %d",
  2105. vdev->vdev_id, vdev, tx_q->desc_pool_id);
  2106. drop_code = TX_DESC_ERR;
  2107. goto fail_return;
  2108. }
  2109. dp_tx_update_tdls_flags(soc, vdev, tx_desc);
  2110. if (qdf_unlikely(peer_id == DP_INVALID_PEER)) {
  2111. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2112. DP_TX_TCL_METADATA_HOST_INSPECTED_SET(htt_tcl_metadata, 1);
  2113. } else if (qdf_unlikely(peer_id != HTT_INVALID_PEER)) {
  2114. DP_TX_TCL_METADATA_TYPE_SET(htt_tcl_metadata,
  2115. DP_TCL_METADATA_TYPE_PEER_BASED);
  2116. DP_TX_TCL_METADATA_PEER_ID_SET(htt_tcl_metadata,
  2117. peer_id);
  2118. dp_tx_bypass_reinjection(soc, tx_desc, tx_exc_metadata);
  2119. } else
  2120. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2121. if (msdu_info->exception_fw)
  2122. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2123. dp_tx_desc_update_fast_comp_flag(soc, tx_desc,
  2124. !pdev->enhanced_stats_en);
  2125. dp_tx_update_mesh_flags(soc, vdev, tx_desc);
  2126. if (qdf_unlikely(msdu_info->frm_type == dp_tx_frm_rmnet))
  2127. paddr = dp_tx_rmnet_nbuf_map(msdu_info, tx_desc);
  2128. else
  2129. paddr = dp_tx_nbuf_map(vdev, tx_desc, nbuf);
  2130. if (!paddr) {
  2131. /* Handle failure */
  2132. dp_err("qdf_nbuf_map failed");
  2133. DP_STATS_INC(vdev, tx_i.dropped.dma_error, 1);
  2134. drop_code = TX_DMA_MAP_ERR;
  2135. goto release_desc;
  2136. }
  2137. tx_desc->dma_addr = paddr;
  2138. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2139. tx_desc->id, DP_TX_DESC_MAP);
  2140. dp_tx_update_mcast_param(peer_id, &htt_tcl_metadata, vdev, msdu_info);
  2141. /* Enqueue the Tx MSDU descriptor to HW for transmit */
  2142. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2143. htt_tcl_metadata,
  2144. tx_exc_metadata, msdu_info);
  2145. if (status != QDF_STATUS_SUCCESS) {
  2146. dp_tx_err_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2147. tx_desc, tx_q->ring_id);
  2148. dp_tx_desc_history_add(soc, tx_desc->dma_addr, nbuf,
  2149. tx_desc->id, DP_TX_DESC_UNMAP);
  2150. dp_tx_nbuf_unmap(soc, tx_desc);
  2151. drop_code = TX_HW_ENQUEUE;
  2152. goto release_desc;
  2153. }
  2154. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2155. return NULL;
  2156. release_desc:
  2157. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2158. fail_return:
  2159. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2160. tx_sw_drop_stats_inc(pdev, nbuf, drop_code);
  2161. tid_stats = &pdev->stats.tid_stats.
  2162. tid_tx_stats[tx_q->ring_id][tid];
  2163. tid_stats->swdrop_cnt[drop_code]++;
  2164. return nbuf;
  2165. }
  2166. /**
  2167. * dp_tdls_tx_comp_free_buff() - Free non std buffer when TDLS flag is set
  2168. * @soc: Soc handle
  2169. * @desc: software Tx descriptor to be processed
  2170. *
  2171. * Return: 0 if Success
  2172. */
  2173. #ifdef FEATURE_WLAN_TDLS
  2174. static inline int
  2175. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2176. {
  2177. /* If it is TDLS mgmt, don't unmap or free the frame */
  2178. if (desc->flags & DP_TX_DESC_FLAG_TDLS_FRAME) {
  2179. dp_non_std_htt_tx_comp_free_buff(soc, desc);
  2180. return 0;
  2181. }
  2182. return 1;
  2183. }
  2184. #else
  2185. static inline int
  2186. dp_tdls_tx_comp_free_buff(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  2187. {
  2188. return 1;
  2189. }
  2190. #endif
  2191. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  2192. bool delayed_free)
  2193. {
  2194. qdf_nbuf_t nbuf = desc->nbuf;
  2195. enum dp_tx_event_type type = dp_tx_get_event_type(desc->flags);
  2196. /* nbuf already freed in vdev detach path */
  2197. if (!nbuf)
  2198. return NULL;
  2199. if (!dp_tdls_tx_comp_free_buff(soc, desc))
  2200. return NULL;
  2201. /* 0 : MSDU buffer, 1 : MLE */
  2202. if (desc->msdu_ext_desc) {
  2203. /* TSO free */
  2204. if (hal_tx_ext_desc_get_tso_enable(
  2205. desc->msdu_ext_desc->vaddr)) {
  2206. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  2207. desc->id, DP_TX_COMP_MSDU_EXT);
  2208. dp_tx_tso_seg_history_add(soc,
  2209. desc->msdu_ext_desc->tso_desc,
  2210. desc->nbuf, desc->id, type);
  2211. /* unmap eash TSO seg before free the nbuf */
  2212. dp_tx_tso_unmap_segment(soc,
  2213. desc->msdu_ext_desc->tso_desc,
  2214. desc->msdu_ext_desc->
  2215. tso_num_desc);
  2216. goto nbuf_free;
  2217. }
  2218. if (qdf_unlikely(desc->frm_type == dp_tx_frm_sg)) {
  2219. void *msdu_ext_desc = desc->msdu_ext_desc->vaddr;
  2220. qdf_dma_addr_t iova;
  2221. uint32_t frag_len;
  2222. uint32_t i;
  2223. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf,
  2224. QDF_DMA_TO_DEVICE,
  2225. qdf_nbuf_headlen(nbuf));
  2226. for (i = 1; i < DP_TX_MAX_NUM_FRAGS; i++) {
  2227. hal_tx_ext_desc_get_frag_info(msdu_ext_desc, i,
  2228. &iova,
  2229. &frag_len);
  2230. if (!iova || !frag_len)
  2231. break;
  2232. qdf_mem_unmap_page(soc->osdev, iova, frag_len,
  2233. QDF_DMA_TO_DEVICE);
  2234. }
  2235. goto nbuf_free;
  2236. }
  2237. }
  2238. /* If it's ME frame, dont unmap the cloned nbuf's */
  2239. if ((desc->flags & DP_TX_DESC_FLAG_ME) && qdf_nbuf_is_cloned(nbuf))
  2240. goto nbuf_free;
  2241. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf, desc->id, type);
  2242. dp_tx_unmap(soc, desc);
  2243. if (desc->flags & DP_TX_DESC_FLAG_MESH_MODE)
  2244. return dp_mesh_tx_comp_free_buff(soc, desc, delayed_free);
  2245. if (dp_tx_traffic_end_indication_enq_ind_pkt(soc, desc, nbuf))
  2246. return NULL;
  2247. nbuf_free:
  2248. if (delayed_free)
  2249. return nbuf;
  2250. qdf_nbuf_free(nbuf);
  2251. return NULL;
  2252. }
  2253. /**
  2254. * dp_tx_sg_unmap_buf() - Unmap scatter gather fragments
  2255. * @soc: DP soc handle
  2256. * @nbuf: skb
  2257. * @msdu_info: MSDU info
  2258. *
  2259. * Return: None
  2260. */
  2261. static inline void
  2262. dp_tx_sg_unmap_buf(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2263. struct dp_tx_msdu_info_s *msdu_info)
  2264. {
  2265. uint32_t cur_idx;
  2266. struct dp_tx_seg_info_s *seg = msdu_info->u.sg_info.curr_seg;
  2267. qdf_nbuf_unmap_nbytes_single(soc->osdev, nbuf, QDF_DMA_TO_DEVICE,
  2268. qdf_nbuf_headlen(nbuf));
  2269. for (cur_idx = 1; cur_idx < seg->frag_cnt; cur_idx++)
  2270. qdf_mem_unmap_page(soc->osdev, (qdf_dma_addr_t)
  2271. (seg->frags[cur_idx].paddr_lo | ((uint64_t)
  2272. seg->frags[cur_idx].paddr_hi) << 32),
  2273. seg->frags[cur_idx].len,
  2274. QDF_DMA_TO_DEVICE);
  2275. }
  2276. #if QDF_LOCK_STATS
  2277. noinline
  2278. #else
  2279. #endif
  2280. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2281. struct dp_tx_msdu_info_s *msdu_info)
  2282. {
  2283. uint32_t i;
  2284. struct dp_pdev *pdev = vdev->pdev;
  2285. struct dp_soc *soc = pdev->soc;
  2286. struct dp_tx_desc_s *tx_desc;
  2287. bool is_cce_classified = false;
  2288. QDF_STATUS status;
  2289. uint16_t htt_tcl_metadata = 0;
  2290. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  2291. struct cdp_tid_tx_stats *tid_stats = NULL;
  2292. uint8_t prep_desc_fail = 0, hw_enq_fail = 0;
  2293. if (msdu_info->frm_type == dp_tx_frm_me)
  2294. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2295. i = 0;
  2296. /* Print statement to track i and num_seg */
  2297. /*
  2298. * For each segment (maps to 1 MSDU) , prepare software and hardware
  2299. * descriptors using information in msdu_info
  2300. */
  2301. while (i < msdu_info->num_seg) {
  2302. /*
  2303. * Setup Tx descriptor for an MSDU, and MSDU extension
  2304. * descriptor
  2305. */
  2306. tx_desc = dp_tx_prepare_desc(vdev, nbuf, msdu_info,
  2307. tx_q->desc_pool_id);
  2308. if (!tx_desc) {
  2309. if (msdu_info->frm_type == dp_tx_frm_me) {
  2310. prep_desc_fail++;
  2311. dp_tx_me_free_buf(pdev,
  2312. (void *)(msdu_info->u.sg_info
  2313. .curr_seg->frags[0].vaddr));
  2314. if (prep_desc_fail == msdu_info->num_seg) {
  2315. /*
  2316. * Unmap is needed only if descriptor
  2317. * preparation failed for all segments.
  2318. */
  2319. qdf_nbuf_unmap(soc->osdev,
  2320. msdu_info->u.sg_info.
  2321. curr_seg->nbuf,
  2322. QDF_DMA_TO_DEVICE);
  2323. }
  2324. /*
  2325. * Free the nbuf for the current segment
  2326. * and make it point to the next in the list.
  2327. * For me, there are as many segments as there
  2328. * are no of clients.
  2329. */
  2330. qdf_nbuf_free(msdu_info->u.sg_info
  2331. .curr_seg->nbuf);
  2332. if (msdu_info->u.sg_info.curr_seg->next) {
  2333. msdu_info->u.sg_info.curr_seg =
  2334. msdu_info->u.sg_info
  2335. .curr_seg->next;
  2336. nbuf = msdu_info->u.sg_info
  2337. .curr_seg->nbuf;
  2338. }
  2339. i++;
  2340. continue;
  2341. }
  2342. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2343. dp_tx_tso_seg_history_add(
  2344. soc,
  2345. msdu_info->u.tso_info.curr_seg,
  2346. nbuf, 0, DP_TX_DESC_UNMAP);
  2347. dp_tx_tso_unmap_segment(soc,
  2348. msdu_info->u.tso_info.
  2349. curr_seg,
  2350. msdu_info->u.tso_info.
  2351. tso_num_seg_list);
  2352. if (msdu_info->u.tso_info.curr_seg->next) {
  2353. msdu_info->u.tso_info.curr_seg =
  2354. msdu_info->u.tso_info.curr_seg->next;
  2355. i++;
  2356. continue;
  2357. }
  2358. }
  2359. if (msdu_info->frm_type == dp_tx_frm_sg)
  2360. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2361. goto done;
  2362. }
  2363. if (msdu_info->frm_type == dp_tx_frm_me) {
  2364. tx_desc->msdu_ext_desc->me_buffer =
  2365. (struct dp_tx_me_buf_t *)msdu_info->
  2366. u.sg_info.curr_seg->frags[0].vaddr;
  2367. tx_desc->flags |= DP_TX_DESC_FLAG_ME;
  2368. }
  2369. if (is_cce_classified)
  2370. tx_desc->flags |= DP_TX_DESC_FLAG_TO_FW;
  2371. htt_tcl_metadata = vdev->htt_tcl_metadata;
  2372. if (msdu_info->exception_fw) {
  2373. DP_TX_TCL_METADATA_VALID_HTT_SET(htt_tcl_metadata, 1);
  2374. }
  2375. dp_tx_is_hp_update_required(i, msdu_info);
  2376. /*
  2377. * For frames with multiple segments (TSO, ME), jump to next
  2378. * segment.
  2379. */
  2380. if (msdu_info->frm_type == dp_tx_frm_tso) {
  2381. if (msdu_info->u.tso_info.curr_seg->next) {
  2382. msdu_info->u.tso_info.curr_seg =
  2383. msdu_info->u.tso_info.curr_seg->next;
  2384. /*
  2385. * If this is a jumbo nbuf, then increment the
  2386. * number of nbuf users for each additional
  2387. * segment of the msdu. This will ensure that
  2388. * the skb is freed only after receiving tx
  2389. * completion for all segments of an nbuf
  2390. */
  2391. qdf_nbuf_inc_users(nbuf);
  2392. /* Check with MCL if this is needed */
  2393. /* nbuf = msdu_info->u.tso_info.curr_seg->nbuf;
  2394. */
  2395. }
  2396. }
  2397. dp_tx_update_mcast_param(DP_INVALID_PEER,
  2398. &htt_tcl_metadata,
  2399. vdev,
  2400. msdu_info);
  2401. /*
  2402. * Enqueue the Tx MSDU descriptor to HW for transmit
  2403. */
  2404. status = soc->arch_ops.tx_hw_enqueue(soc, vdev, tx_desc,
  2405. htt_tcl_metadata,
  2406. NULL, msdu_info);
  2407. dp_tx_check_and_flush_hp(soc, status, msdu_info);
  2408. if (status != QDF_STATUS_SUCCESS) {
  2409. dp_info_rl("Tx_hw_enqueue Fail tx_desc %pK queue %d",
  2410. tx_desc, tx_q->ring_id);
  2411. dp_tx_get_tid(vdev, nbuf, msdu_info);
  2412. tid_stats = &pdev->stats.tid_stats.
  2413. tid_tx_stats[tx_q->ring_id][msdu_info->tid];
  2414. tid_stats->swdrop_cnt[TX_HW_ENQUEUE]++;
  2415. if (msdu_info->frm_type == dp_tx_frm_me) {
  2416. hw_enq_fail++;
  2417. if (hw_enq_fail == msdu_info->num_seg) {
  2418. /*
  2419. * Unmap is needed only if enqueue
  2420. * failed for all segments.
  2421. */
  2422. qdf_nbuf_unmap(soc->osdev,
  2423. msdu_info->u.sg_info.
  2424. curr_seg->nbuf,
  2425. QDF_DMA_TO_DEVICE);
  2426. }
  2427. /*
  2428. * Free the nbuf for the current segment
  2429. * and make it point to the next in the list.
  2430. * For me, there are as many segments as there
  2431. * are no of clients.
  2432. */
  2433. qdf_nbuf_free(msdu_info->u.sg_info
  2434. .curr_seg->nbuf);
  2435. dp_tx_desc_release(soc, tx_desc,
  2436. tx_q->desc_pool_id);
  2437. if (msdu_info->u.sg_info.curr_seg->next) {
  2438. msdu_info->u.sg_info.curr_seg =
  2439. msdu_info->u.sg_info
  2440. .curr_seg->next;
  2441. nbuf = msdu_info->u.sg_info
  2442. .curr_seg->nbuf;
  2443. } else
  2444. break;
  2445. i++;
  2446. continue;
  2447. }
  2448. /*
  2449. * For TSO frames, the nbuf users increment done for
  2450. * the current segment has to be reverted, since the
  2451. * hw enqueue for this segment failed
  2452. */
  2453. if (msdu_info->frm_type == dp_tx_frm_tso &&
  2454. msdu_info->u.tso_info.curr_seg) {
  2455. /*
  2456. * unmap and free current,
  2457. * retransmit remaining segments
  2458. */
  2459. dp_tx_comp_free_buf(soc, tx_desc, false);
  2460. i++;
  2461. dp_tx_desc_release(soc, tx_desc,
  2462. tx_q->desc_pool_id);
  2463. continue;
  2464. }
  2465. if (msdu_info->frm_type == dp_tx_frm_sg)
  2466. dp_tx_sg_unmap_buf(soc, nbuf, msdu_info);
  2467. dp_tx_desc_release(soc, tx_desc, tx_q->desc_pool_id);
  2468. goto done;
  2469. }
  2470. /*
  2471. * TODO
  2472. * if tso_info structure can be modified to have curr_seg
  2473. * as first element, following 2 blocks of code (for TSO and SG)
  2474. * can be combined into 1
  2475. */
  2476. /*
  2477. * For Multicast-Unicast converted packets,
  2478. * each converted frame (for a client) is represented as
  2479. * 1 segment
  2480. */
  2481. if ((msdu_info->frm_type == dp_tx_frm_sg) ||
  2482. (msdu_info->frm_type == dp_tx_frm_me)) {
  2483. if (msdu_info->u.sg_info.curr_seg->next) {
  2484. msdu_info->u.sg_info.curr_seg =
  2485. msdu_info->u.sg_info.curr_seg->next;
  2486. nbuf = msdu_info->u.sg_info.curr_seg->nbuf;
  2487. } else
  2488. break;
  2489. }
  2490. i++;
  2491. }
  2492. nbuf = NULL;
  2493. done:
  2494. return nbuf;
  2495. }
  2496. /**
  2497. * dp_tx_prepare_sg()- Extract SG info from NBUF and prepare msdu_info
  2498. * for SG frames
  2499. * @vdev: DP vdev handle
  2500. * @nbuf: skb
  2501. * @seg_info: Pointer to Segment info Descriptor to be prepared
  2502. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2503. *
  2504. * Return: NULL on success,
  2505. * nbuf when it fails to send
  2506. */
  2507. static qdf_nbuf_t dp_tx_prepare_sg(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2508. struct dp_tx_seg_info_s *seg_info, struct dp_tx_msdu_info_s *msdu_info)
  2509. {
  2510. uint32_t cur_frag, nr_frags, i;
  2511. qdf_dma_addr_t paddr;
  2512. struct dp_tx_sg_info_s *sg_info;
  2513. sg_info = &msdu_info->u.sg_info;
  2514. nr_frags = qdf_nbuf_get_nr_frags(nbuf);
  2515. if (QDF_STATUS_SUCCESS !=
  2516. qdf_nbuf_map_nbytes_single(vdev->osdev, nbuf,
  2517. QDF_DMA_TO_DEVICE,
  2518. qdf_nbuf_headlen(nbuf))) {
  2519. dp_tx_err("dma map error");
  2520. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2521. qdf_nbuf_free(nbuf);
  2522. return NULL;
  2523. }
  2524. paddr = qdf_nbuf_mapped_paddr_get(nbuf);
  2525. seg_info->frags[0].paddr_lo = paddr;
  2526. seg_info->frags[0].paddr_hi = ((uint64_t) paddr) >> 32;
  2527. seg_info->frags[0].len = qdf_nbuf_headlen(nbuf);
  2528. seg_info->frags[0].vaddr = (void *) nbuf;
  2529. for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
  2530. if (QDF_STATUS_SUCCESS != qdf_nbuf_frag_map(vdev->osdev,
  2531. nbuf, 0,
  2532. QDF_DMA_TO_DEVICE,
  2533. cur_frag)) {
  2534. dp_tx_err("frag dma map error");
  2535. DP_STATS_INC(vdev, tx_i.sg.dma_map_error, 1);
  2536. goto map_err;
  2537. }
  2538. paddr = qdf_nbuf_get_tx_frag_paddr(nbuf);
  2539. seg_info->frags[cur_frag + 1].paddr_lo = paddr;
  2540. seg_info->frags[cur_frag + 1].paddr_hi =
  2541. ((uint64_t) paddr) >> 32;
  2542. seg_info->frags[cur_frag + 1].len =
  2543. qdf_nbuf_get_frag_size(nbuf, cur_frag);
  2544. }
  2545. seg_info->frag_cnt = (cur_frag + 1);
  2546. seg_info->total_len = qdf_nbuf_len(nbuf);
  2547. seg_info->next = NULL;
  2548. sg_info->curr_seg = seg_info;
  2549. msdu_info->frm_type = dp_tx_frm_sg;
  2550. msdu_info->num_seg = 1;
  2551. return nbuf;
  2552. map_err:
  2553. /* restore paddr into nbuf before calling unmap */
  2554. qdf_nbuf_mapped_paddr_set(nbuf,
  2555. (qdf_dma_addr_t)(seg_info->frags[0].paddr_lo |
  2556. ((uint64_t)
  2557. seg_info->frags[0].paddr_hi) << 32));
  2558. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  2559. QDF_DMA_TO_DEVICE,
  2560. seg_info->frags[0].len);
  2561. for (i = 1; i <= cur_frag; i++) {
  2562. qdf_mem_unmap_page(vdev->osdev, (qdf_dma_addr_t)
  2563. (seg_info->frags[i].paddr_lo | ((uint64_t)
  2564. seg_info->frags[i].paddr_hi) << 32),
  2565. seg_info->frags[i].len,
  2566. QDF_DMA_TO_DEVICE);
  2567. }
  2568. qdf_nbuf_free(nbuf);
  2569. return NULL;
  2570. }
  2571. /**
  2572. * dp_tx_add_tx_sniffer_meta_data()- Add tx_sniffer meta hdr info
  2573. * @vdev: DP vdev handle
  2574. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2575. * @ppdu_cookie: PPDU cookie that should be replayed in the ppdu completions
  2576. *
  2577. * Return: NULL on failure,
  2578. * nbuf when extracted successfully
  2579. */
  2580. static
  2581. void dp_tx_add_tx_sniffer_meta_data(struct dp_vdev *vdev,
  2582. struct dp_tx_msdu_info_s *msdu_info,
  2583. uint16_t ppdu_cookie)
  2584. {
  2585. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2586. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2587. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2588. HTT_TX_MSDU_EXT2_DESC_FLAG_SEND_AS_STANDALONE_SET
  2589. (msdu_info->meta_data[5], 1);
  2590. HTT_TX_MSDU_EXT2_DESC_FLAG_HOST_OPAQUE_VALID_SET
  2591. (msdu_info->meta_data[5], 1);
  2592. HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_SET
  2593. (msdu_info->meta_data[6], ppdu_cookie);
  2594. msdu_info->exception_fw = 1;
  2595. msdu_info->is_tx_sniffer = 1;
  2596. }
  2597. #ifdef MESH_MODE_SUPPORT
  2598. /**
  2599. * dp_tx_extract_mesh_meta_data()- Extract mesh meta hdr info from nbuf
  2600. * and prepare msdu_info for mesh frames.
  2601. * @vdev: DP vdev handle
  2602. * @nbuf: skb
  2603. * @msdu_info: MSDU info to be setup in MSDU descriptor and MSDU extension desc.
  2604. *
  2605. * Return: NULL on failure,
  2606. * nbuf when extracted successfully
  2607. */
  2608. static
  2609. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2610. struct dp_tx_msdu_info_s *msdu_info)
  2611. {
  2612. struct meta_hdr_s *mhdr;
  2613. struct htt_tx_msdu_desc_ext2_t *meta_data =
  2614. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  2615. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  2616. if (CB_FTYPE_MESH_TX_INFO != qdf_nbuf_get_tx_ftype(nbuf)) {
  2617. msdu_info->exception_fw = 0;
  2618. goto remove_meta_hdr;
  2619. }
  2620. msdu_info->exception_fw = 1;
  2621. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  2622. meta_data->host_tx_desc_pool = 1;
  2623. meta_data->update_peer_cache = 1;
  2624. meta_data->learning_frame = 1;
  2625. if (!(mhdr->flags & METAHDR_FLAG_AUTO_RATE)) {
  2626. meta_data->power = mhdr->power;
  2627. meta_data->mcs_mask = 1 << mhdr->rate_info[0].mcs;
  2628. meta_data->nss_mask = 1 << mhdr->rate_info[0].nss;
  2629. meta_data->pream_type = mhdr->rate_info[0].preamble_type;
  2630. meta_data->retry_limit = mhdr->rate_info[0].max_tries;
  2631. meta_data->dyn_bw = 1;
  2632. meta_data->valid_pwr = 1;
  2633. meta_data->valid_mcs_mask = 1;
  2634. meta_data->valid_nss_mask = 1;
  2635. meta_data->valid_preamble_type = 1;
  2636. meta_data->valid_retries = 1;
  2637. meta_data->valid_bw_info = 1;
  2638. }
  2639. if (mhdr->flags & METAHDR_FLAG_NOENCRYPT) {
  2640. meta_data->encrypt_type = 0;
  2641. meta_data->valid_encrypt_type = 1;
  2642. meta_data->learning_frame = 0;
  2643. }
  2644. meta_data->valid_key_flags = 1;
  2645. meta_data->key_flags = (mhdr->keyix & 0x3);
  2646. remove_meta_hdr:
  2647. if (qdf_nbuf_pull_head(nbuf, sizeof(struct meta_hdr_s)) == NULL) {
  2648. dp_tx_err("qdf_nbuf_pull_head failed");
  2649. qdf_nbuf_free(nbuf);
  2650. return NULL;
  2651. }
  2652. msdu_info->tid = qdf_nbuf_get_priority(nbuf);
  2653. dp_tx_info("Meta hdr %0x %0x %0x %0x %0x %0x"
  2654. " tid %d to_fw %d",
  2655. msdu_info->meta_data[0],
  2656. msdu_info->meta_data[1],
  2657. msdu_info->meta_data[2],
  2658. msdu_info->meta_data[3],
  2659. msdu_info->meta_data[4],
  2660. msdu_info->meta_data[5],
  2661. msdu_info->tid, msdu_info->exception_fw);
  2662. return nbuf;
  2663. }
  2664. #else
  2665. static
  2666. qdf_nbuf_t dp_tx_extract_mesh_meta_data(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  2667. struct dp_tx_msdu_info_s *msdu_info)
  2668. {
  2669. return nbuf;
  2670. }
  2671. #endif
  2672. /**
  2673. * dp_check_exc_metadata() - Checks if parameters are valid
  2674. * @tx_exc: holds all exception path parameters
  2675. *
  2676. * Return: true when all the parameters are valid else false
  2677. *
  2678. */
  2679. static bool dp_check_exc_metadata(struct cdp_tx_exception_metadata *tx_exc)
  2680. {
  2681. bool invalid_tid = (tx_exc->tid >= DP_MAX_TIDS && tx_exc->tid !=
  2682. HTT_INVALID_TID);
  2683. bool invalid_encap_type =
  2684. (tx_exc->tx_encap_type > htt_cmn_pkt_num_types &&
  2685. tx_exc->tx_encap_type != CDP_INVALID_TX_ENCAP_TYPE);
  2686. bool invalid_sec_type = (tx_exc->sec_type > cdp_num_sec_types &&
  2687. tx_exc->sec_type != CDP_INVALID_SEC_TYPE);
  2688. bool invalid_cookie = (tx_exc->is_tx_sniffer == 1 &&
  2689. tx_exc->ppdu_cookie == 0);
  2690. if (tx_exc->is_intrabss_fwd)
  2691. return true;
  2692. if (invalid_tid || invalid_encap_type || invalid_sec_type ||
  2693. invalid_cookie) {
  2694. return false;
  2695. }
  2696. return true;
  2697. }
  2698. #ifdef ATH_SUPPORT_IQUE
  2699. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2700. {
  2701. qdf_ether_header_t *eh;
  2702. /* Mcast to Ucast Conversion*/
  2703. if (qdf_likely(!vdev->mcast_enhancement_en))
  2704. return true;
  2705. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2706. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) &&
  2707. !DP_FRAME_IS_BROADCAST((eh)->ether_dhost)) {
  2708. dp_verbose_debug("Mcast frm for ME %pK", vdev);
  2709. qdf_nbuf_set_next(nbuf, NULL);
  2710. DP_STATS_INC_PKT(vdev, tx_i.mcast_en.mcast_pkt, 1,
  2711. qdf_nbuf_len(nbuf));
  2712. if (dp_tx_prepare_send_me(vdev, nbuf) ==
  2713. QDF_STATUS_SUCCESS) {
  2714. return false;
  2715. }
  2716. if (qdf_unlikely(vdev->igmp_mcast_enhanc_en > 0)) {
  2717. if (dp_tx_prepare_send_igmp_me(vdev, nbuf) ==
  2718. QDF_STATUS_SUCCESS) {
  2719. return false;
  2720. }
  2721. }
  2722. }
  2723. return true;
  2724. }
  2725. #else
  2726. bool dp_tx_mcast_enhance(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2727. {
  2728. return true;
  2729. }
  2730. #endif
  2731. #ifdef QCA_SUPPORT_WDS_EXTENDED
  2732. /**
  2733. * dp_tx_mcast_drop() - Drop mcast frame if drop_tx_mcast is set in WDS_EXT
  2734. * @vdev: vdev handle
  2735. * @nbuf: skb
  2736. *
  2737. * Return: true if frame is dropped, false otherwise
  2738. */
  2739. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2740. {
  2741. /* Drop tx mcast and WDS Extended feature check */
  2742. if (qdf_unlikely((vdev->drop_tx_mcast) && (vdev->wds_ext_enabled))) {
  2743. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  2744. qdf_nbuf_data(nbuf);
  2745. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  2746. DP_STATS_INC(vdev, tx_i.dropped.tx_mcast_drop, 1);
  2747. return true;
  2748. }
  2749. }
  2750. return false;
  2751. }
  2752. #else
  2753. static inline bool dp_tx_mcast_drop(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  2754. {
  2755. return false;
  2756. }
  2757. #endif
  2758. /**
  2759. * dp_tx_per_pkt_vdev_id_check() - vdev id check for frame
  2760. * @nbuf: qdf_nbuf_t
  2761. * @vdev: struct dp_vdev *
  2762. *
  2763. * Allow packet for processing only if it is for peer client which is
  2764. * connected with same vap. Drop packet if client is connected to
  2765. * different vap.
  2766. *
  2767. * Return: QDF_STATUS
  2768. */
  2769. static inline QDF_STATUS
  2770. dp_tx_per_pkt_vdev_id_check(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  2771. {
  2772. struct dp_ast_entry *dst_ast_entry = NULL;
  2773. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2774. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost) ||
  2775. DP_FRAME_IS_BROADCAST((eh)->ether_dhost))
  2776. return QDF_STATUS_SUCCESS;
  2777. qdf_spin_lock_bh(&vdev->pdev->soc->ast_lock);
  2778. dst_ast_entry = dp_peer_ast_hash_find_by_vdevid(vdev->pdev->soc,
  2779. eh->ether_dhost,
  2780. vdev->vdev_id);
  2781. /* If there is no ast entry, return failure */
  2782. if (qdf_unlikely(!dst_ast_entry)) {
  2783. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2784. return QDF_STATUS_E_FAILURE;
  2785. }
  2786. qdf_spin_unlock_bh(&vdev->pdev->soc->ast_lock);
  2787. return QDF_STATUS_SUCCESS;
  2788. }
  2789. /**
  2790. * dp_tx_nawds_handler() - NAWDS handler
  2791. *
  2792. * @soc: DP soc handle
  2793. * @vdev: DP vdev handle
  2794. * @msdu_info: msdu_info required to create HTT metadata
  2795. * @nbuf: skb
  2796. * @sa_peer_id:
  2797. *
  2798. * This API transfers the multicast frames with the peer id
  2799. * on NAWDS enabled peer.
  2800. *
  2801. * Return: none
  2802. */
  2803. void dp_tx_nawds_handler(struct dp_soc *soc, struct dp_vdev *vdev,
  2804. struct dp_tx_msdu_info_s *msdu_info,
  2805. qdf_nbuf_t nbuf, uint16_t sa_peer_id)
  2806. {
  2807. struct dp_peer *peer = NULL;
  2808. qdf_nbuf_t nbuf_clone = NULL;
  2809. uint16_t peer_id = DP_INVALID_PEER;
  2810. struct dp_txrx_peer *txrx_peer;
  2811. uint8_t link_id = 0;
  2812. /* This check avoids pkt forwarding which is entered
  2813. * in the ast table but still doesn't have valid peerid.
  2814. */
  2815. if (sa_peer_id == HTT_INVALID_PEER)
  2816. return;
  2817. qdf_spin_lock_bh(&vdev->peer_list_lock);
  2818. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2819. txrx_peer = dp_get_txrx_peer(peer);
  2820. if (!txrx_peer)
  2821. continue;
  2822. if (!txrx_peer->bss_peer && txrx_peer->nawds_enabled) {
  2823. peer_id = peer->peer_id;
  2824. if (!dp_peer_is_primary_link_peer(peer))
  2825. continue;
  2826. /* In the case of wds ext peer mcast traffic will be
  2827. * sent as part of VLAN interface
  2828. */
  2829. if (dp_peer_is_wds_ext_peer(txrx_peer))
  2830. continue;
  2831. /* Multicast packets needs to be
  2832. * dropped in case of intra bss forwarding
  2833. */
  2834. if (sa_peer_id == txrx_peer->peer_id) {
  2835. dp_tx_debug("multicast packet");
  2836. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  2837. tx.nawds_mcast_drop,
  2838. 1, link_id);
  2839. continue;
  2840. }
  2841. nbuf_clone = qdf_nbuf_clone(nbuf);
  2842. if (!nbuf_clone) {
  2843. QDF_TRACE(QDF_MODULE_ID_DP,
  2844. QDF_TRACE_LEVEL_ERROR,
  2845. FL("nbuf clone failed"));
  2846. break;
  2847. }
  2848. nbuf_clone = dp_tx_send_msdu_single(vdev, nbuf_clone,
  2849. msdu_info, peer_id,
  2850. NULL);
  2851. if (nbuf_clone) {
  2852. dp_tx_debug("pkt send failed");
  2853. qdf_nbuf_free(nbuf_clone);
  2854. } else {
  2855. if (peer_id != DP_INVALID_PEER)
  2856. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  2857. tx.nawds_mcast,
  2858. 1, qdf_nbuf_len(nbuf), link_id);
  2859. }
  2860. }
  2861. }
  2862. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  2863. }
  2864. #ifdef WLAN_MCAST_MLO
  2865. static inline bool
  2866. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2867. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2868. {
  2869. if (!tx_exc_metadata->is_mlo_mcast && qdf_unlikely(vdev->mesh_vdev))
  2870. return true;
  2871. return false;
  2872. }
  2873. #else
  2874. static inline bool
  2875. dp_tx_check_mesh_vdev(struct dp_vdev *vdev,
  2876. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2877. {
  2878. if (qdf_unlikely(vdev->mesh_vdev))
  2879. return true;
  2880. return false;
  2881. }
  2882. #endif
  2883. qdf_nbuf_t
  2884. dp_tx_send_exception(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  2885. qdf_nbuf_t nbuf,
  2886. struct cdp_tx_exception_metadata *tx_exc_metadata)
  2887. {
  2888. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2889. struct dp_tx_msdu_info_s msdu_info;
  2890. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2891. DP_MOD_ID_TX_EXCEPTION);
  2892. if (qdf_unlikely(!vdev))
  2893. goto fail;
  2894. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  2895. if (!tx_exc_metadata)
  2896. goto fail;
  2897. msdu_info.tid = tx_exc_metadata->tid;
  2898. dp_verbose_debug("skb "QDF_MAC_ADDR_FMT,
  2899. QDF_MAC_ADDR_REF(nbuf->data));
  2900. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  2901. if (qdf_unlikely(!dp_check_exc_metadata(tx_exc_metadata))) {
  2902. dp_tx_err("Invalid parameters in exception path");
  2903. goto fail;
  2904. }
  2905. /* for peer based metadata check if peer is valid */
  2906. if (tx_exc_metadata->peer_id != CDP_INVALID_PEER) {
  2907. struct dp_peer *peer = NULL;
  2908. peer = dp_peer_get_ref_by_id(vdev->pdev->soc,
  2909. tx_exc_metadata->peer_id,
  2910. DP_MOD_ID_TX_EXCEPTION);
  2911. if (qdf_unlikely(!peer)) {
  2912. DP_STATS_INC(vdev,
  2913. tx_i.dropped.invalid_peer_id_in_exc_path,
  2914. 1);
  2915. goto fail;
  2916. }
  2917. dp_peer_unref_delete(peer, DP_MOD_ID_TX_EXCEPTION);
  2918. }
  2919. /* Basic sanity checks for unsupported packets */
  2920. /* MESH mode */
  2921. if (dp_tx_check_mesh_vdev(vdev, tx_exc_metadata)) {
  2922. dp_tx_err("Mesh mode is not supported in exception path");
  2923. goto fail;
  2924. }
  2925. /*
  2926. * Classify the frame and call corresponding
  2927. * "prepare" function which extracts the segment (TSO)
  2928. * and fragmentation information (for TSO , SG, ME, or Raw)
  2929. * into MSDU_INFO structure which is later used to fill
  2930. * SW and HW descriptors.
  2931. */
  2932. if (qdf_nbuf_is_tso(nbuf)) {
  2933. dp_verbose_debug("TSO frame %pK", vdev);
  2934. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  2935. qdf_nbuf_len(nbuf));
  2936. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  2937. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  2938. qdf_nbuf_len(nbuf));
  2939. goto fail;
  2940. }
  2941. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  2942. goto send_multiple;
  2943. }
  2944. /* SG */
  2945. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  2946. struct dp_tx_seg_info_s seg_info = {0};
  2947. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info, &msdu_info);
  2948. if (!nbuf)
  2949. goto fail;
  2950. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  2951. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  2952. qdf_nbuf_len(nbuf));
  2953. goto send_multiple;
  2954. }
  2955. if (qdf_likely(tx_exc_metadata->is_tx_sniffer)) {
  2956. DP_STATS_INC_PKT(vdev, tx_i.sniffer_rcvd, 1,
  2957. qdf_nbuf_len(nbuf));
  2958. dp_tx_add_tx_sniffer_meta_data(vdev, &msdu_info,
  2959. tx_exc_metadata->ppdu_cookie);
  2960. }
  2961. /*
  2962. * Get HW Queue to use for this frame.
  2963. * TCL supports upto 4 DMA rings, out of which 3 rings are
  2964. * dedicated for data and 1 for command.
  2965. * "queue_id" maps to one hardware ring.
  2966. * With each ring, we also associate a unique Tx descriptor pool
  2967. * to minimize lock contention for these resources.
  2968. */
  2969. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  2970. /*
  2971. * if the packet is mcast packet send through mlo_macst handler
  2972. * for all prnt_vdevs
  2973. */
  2974. if (soc->arch_ops.dp_tx_mlo_mcast_send) {
  2975. nbuf = soc->arch_ops.dp_tx_mlo_mcast_send(soc, vdev,
  2976. nbuf,
  2977. tx_exc_metadata);
  2978. if (!nbuf)
  2979. goto fail;
  2980. }
  2981. if (qdf_likely(tx_exc_metadata->is_intrabss_fwd)) {
  2982. if (qdf_unlikely(vdev->nawds_enabled)) {
  2983. /*
  2984. * This is a multicast packet
  2985. */
  2986. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  2987. tx_exc_metadata->peer_id);
  2988. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  2989. 1, qdf_nbuf_len(nbuf));
  2990. }
  2991. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  2992. DP_INVALID_PEER, NULL);
  2993. } else {
  2994. /*
  2995. * Check exception descriptors
  2996. */
  2997. if (dp_tx_exception_limit_check(vdev))
  2998. goto fail;
  2999. /* Single linear frame */
  3000. /*
  3001. * If nbuf is a simple linear frame, use send_single function to
  3002. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3003. * SRNG. There is no need to setup a MSDU extension descriptor.
  3004. */
  3005. nbuf = dp_tx_send_msdu_single(vdev, nbuf, &msdu_info,
  3006. tx_exc_metadata->peer_id,
  3007. tx_exc_metadata);
  3008. }
  3009. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3010. return nbuf;
  3011. send_multiple:
  3012. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3013. fail:
  3014. if (vdev)
  3015. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3016. dp_verbose_debug("pkt send failed");
  3017. return nbuf;
  3018. }
  3019. qdf_nbuf_t
  3020. dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3021. uint8_t vdev_id, qdf_nbuf_t nbuf,
  3022. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3023. {
  3024. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3025. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  3026. DP_MOD_ID_TX_EXCEPTION);
  3027. if (qdf_unlikely(!vdev))
  3028. goto fail;
  3029. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3030. == QDF_STATUS_E_FAILURE)) {
  3031. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3032. goto fail;
  3033. }
  3034. /* Unref count as it will again be taken inside dp_tx_exception */
  3035. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3036. return dp_tx_send_exception(soc_hdl, vdev_id, nbuf, tx_exc_metadata);
  3037. fail:
  3038. if (vdev)
  3039. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TX_EXCEPTION);
  3040. dp_verbose_debug("pkt send failed");
  3041. return nbuf;
  3042. }
  3043. #ifdef MESH_MODE_SUPPORT
  3044. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3045. qdf_nbuf_t nbuf)
  3046. {
  3047. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3048. struct meta_hdr_s *mhdr;
  3049. qdf_nbuf_t nbuf_mesh = NULL;
  3050. qdf_nbuf_t nbuf_clone = NULL;
  3051. struct dp_vdev *vdev;
  3052. uint8_t no_enc_frame = 0;
  3053. nbuf_mesh = qdf_nbuf_unshare(nbuf);
  3054. if (!nbuf_mesh) {
  3055. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3056. "qdf_nbuf_unshare failed");
  3057. return nbuf;
  3058. }
  3059. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_MESH);
  3060. if (!vdev) {
  3061. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3062. "vdev is NULL for vdev_id %d", vdev_id);
  3063. return nbuf;
  3064. }
  3065. nbuf = nbuf_mesh;
  3066. mhdr = (struct meta_hdr_s *)qdf_nbuf_data(nbuf);
  3067. if ((vdev->sec_type != cdp_sec_type_none) &&
  3068. (mhdr->flags & METAHDR_FLAG_NOENCRYPT))
  3069. no_enc_frame = 1;
  3070. if (mhdr->flags & METAHDR_FLAG_NOQOS)
  3071. qdf_nbuf_set_priority(nbuf, HTT_TX_EXT_TID_NON_QOS_MCAST_BCAST);
  3072. if ((mhdr->flags & METAHDR_FLAG_INFO_UPDATED) &&
  3073. !no_enc_frame) {
  3074. nbuf_clone = qdf_nbuf_clone(nbuf);
  3075. if (!nbuf_clone) {
  3076. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3077. "qdf_nbuf_clone failed");
  3078. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3079. return nbuf;
  3080. }
  3081. qdf_nbuf_set_tx_ftype(nbuf_clone, CB_FTYPE_MESH_TX_INFO);
  3082. }
  3083. if (nbuf_clone) {
  3084. if (!dp_tx_send(soc_hdl, vdev_id, nbuf_clone)) {
  3085. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3086. } else {
  3087. qdf_nbuf_free(nbuf_clone);
  3088. }
  3089. }
  3090. if (no_enc_frame)
  3091. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_MESH_TX_INFO);
  3092. else
  3093. qdf_nbuf_set_tx_ftype(nbuf, CB_FTYPE_INVALID);
  3094. nbuf = dp_tx_send(soc_hdl, vdev_id, nbuf);
  3095. if ((!nbuf) && no_enc_frame) {
  3096. DP_STATS_INC(vdev, tx_i.mesh.exception_fw, 1);
  3097. }
  3098. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_MESH);
  3099. return nbuf;
  3100. }
  3101. #else
  3102. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3103. qdf_nbuf_t nbuf)
  3104. {
  3105. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3106. }
  3107. #endif
  3108. #ifdef QCA_DP_TX_NBUF_AND_NBUF_DATA_PREFETCH
  3109. static inline
  3110. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3111. {
  3112. if (nbuf) {
  3113. qdf_prefetch(&nbuf->len);
  3114. qdf_prefetch(&nbuf->data);
  3115. }
  3116. }
  3117. #else
  3118. static inline
  3119. void dp_tx_prefetch_nbuf_data(qdf_nbuf_t nbuf)
  3120. {
  3121. }
  3122. #endif
  3123. #ifdef DP_UMAC_HW_RESET_SUPPORT
  3124. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3125. qdf_nbuf_t nbuf)
  3126. {
  3127. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3128. struct dp_vdev *vdev = NULL;
  3129. vdev = soc->vdev_id_map[vdev_id];
  3130. if (qdf_unlikely(!vdev))
  3131. return nbuf;
  3132. DP_STATS_INC(vdev, tx_i.dropped.drop_ingress, 1);
  3133. return nbuf;
  3134. }
  3135. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3136. qdf_nbuf_t nbuf,
  3137. struct cdp_tx_exception_metadata *tx_exc_metadata)
  3138. {
  3139. return dp_tx_drop(soc_hdl, vdev_id, nbuf);
  3140. }
  3141. #endif
  3142. #ifdef FEATURE_DIRECT_LINK
  3143. /**
  3144. * dp_vdev_tx_mark_to_fw() - Mark to_fw bit for the tx packet
  3145. * @nbuf: skb
  3146. * @vdev: DP vdev handle
  3147. *
  3148. * Return: None
  3149. */
  3150. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3151. {
  3152. if (qdf_unlikely(vdev->to_fw))
  3153. QDF_NBUF_CB_TX_PACKET_TO_FW(nbuf) = 1;
  3154. }
  3155. #else
  3156. static inline void dp_vdev_tx_mark_to_fw(qdf_nbuf_t nbuf, struct dp_vdev *vdev)
  3157. {
  3158. }
  3159. #endif
  3160. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  3161. qdf_nbuf_t nbuf)
  3162. {
  3163. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3164. uint16_t peer_id = HTT_INVALID_PEER;
  3165. /*
  3166. * doing a memzero is causing additional function call overhead
  3167. * so doing static stack clearing
  3168. */
  3169. struct dp_tx_msdu_info_s msdu_info = {0};
  3170. struct dp_vdev *vdev = NULL;
  3171. qdf_nbuf_t end_nbuf = NULL;
  3172. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3173. return nbuf;
  3174. /*
  3175. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3176. * this in per packet path.
  3177. *
  3178. * As in this path vdev memory is already protected with netdev
  3179. * tx lock
  3180. */
  3181. vdev = soc->vdev_id_map[vdev_id];
  3182. if (qdf_unlikely(!vdev))
  3183. return nbuf;
  3184. dp_vdev_tx_mark_to_fw(nbuf, vdev);
  3185. /*
  3186. * Set Default Host TID value to invalid TID
  3187. * (TID override disabled)
  3188. */
  3189. msdu_info.tid = HTT_TX_EXT_TID_INVALID;
  3190. DP_STATS_INC_PKT(vdev, tx_i.rcvd, 1, qdf_nbuf_len(nbuf));
  3191. if (qdf_unlikely(vdev->mesh_vdev)) {
  3192. qdf_nbuf_t nbuf_mesh = dp_tx_extract_mesh_meta_data(vdev, nbuf,
  3193. &msdu_info);
  3194. if (!nbuf_mesh) {
  3195. dp_verbose_debug("Extracting mesh metadata failed");
  3196. return nbuf;
  3197. }
  3198. nbuf = nbuf_mesh;
  3199. }
  3200. /*
  3201. * Get HW Queue to use for this frame.
  3202. * TCL supports upto 4 DMA rings, out of which 3 rings are
  3203. * dedicated for data and 1 for command.
  3204. * "queue_id" maps to one hardware ring.
  3205. * With each ring, we also associate a unique Tx descriptor pool
  3206. * to minimize lock contention for these resources.
  3207. */
  3208. dp_tx_get_queue(vdev, nbuf, &msdu_info.tx_queue);
  3209. DP_STATS_INC(vdev, tx_i.rcvd_per_core[msdu_info.tx_queue.desc_pool_id],
  3210. 1);
  3211. /*
  3212. * TCL H/W supports 2 DSCP-TID mapping tables.
  3213. * Table 1 - Default DSCP-TID mapping table
  3214. * Table 2 - 1 DSCP-TID override table
  3215. *
  3216. * If we need a different DSCP-TID mapping for this vap,
  3217. * call tid_classify to extract DSCP/ToS from frame and
  3218. * map to a TID and store in msdu_info. This is later used
  3219. * to fill in TCL Input descriptor (per-packet TID override).
  3220. */
  3221. dp_tx_classify_tid(vdev, nbuf, &msdu_info);
  3222. /*
  3223. * Classify the frame and call corresponding
  3224. * "prepare" function which extracts the segment (TSO)
  3225. * and fragmentation information (for TSO , SG, ME, or Raw)
  3226. * into MSDU_INFO structure which is later used to fill
  3227. * SW and HW descriptors.
  3228. */
  3229. if (qdf_nbuf_is_tso(nbuf)) {
  3230. dp_verbose_debug("TSO frame %pK", vdev);
  3231. DP_STATS_INC_PKT(vdev->pdev, tso_stats.num_tso_pkts, 1,
  3232. qdf_nbuf_len(nbuf));
  3233. if (dp_tx_prepare_tso(vdev, nbuf, &msdu_info)) {
  3234. DP_STATS_INC_PKT(vdev->pdev, tso_stats.dropped_host, 1,
  3235. qdf_nbuf_len(nbuf));
  3236. return nbuf;
  3237. }
  3238. DP_STATS_INC(vdev, tx_i.rcvd.num, msdu_info.num_seg - 1);
  3239. goto send_multiple;
  3240. }
  3241. /* SG */
  3242. if (qdf_unlikely(qdf_nbuf_is_nonlinear(nbuf))) {
  3243. if (qdf_nbuf_get_nr_frags(nbuf) > DP_TX_MAX_NUM_FRAGS - 1) {
  3244. if (qdf_unlikely(qdf_nbuf_linearize(nbuf)))
  3245. return nbuf;
  3246. } else {
  3247. struct dp_tx_seg_info_s seg_info = {0};
  3248. if (qdf_unlikely(is_nbuf_frm_rmnet(nbuf, &msdu_info)))
  3249. goto send_single;
  3250. nbuf = dp_tx_prepare_sg(vdev, nbuf, &seg_info,
  3251. &msdu_info);
  3252. if (!nbuf)
  3253. return NULL;
  3254. dp_verbose_debug("non-TSO SG frame %pK", vdev);
  3255. DP_STATS_INC_PKT(vdev, tx_i.sg.sg_pkt, 1,
  3256. qdf_nbuf_len(nbuf));
  3257. goto send_multiple;
  3258. }
  3259. }
  3260. if (qdf_unlikely(!dp_tx_mcast_enhance(vdev, nbuf)))
  3261. return NULL;
  3262. if (qdf_unlikely(dp_tx_mcast_drop(vdev, nbuf)))
  3263. return nbuf;
  3264. /* RAW */
  3265. if (qdf_unlikely(vdev->tx_encap_type == htt_cmn_pkt_type_raw)) {
  3266. struct dp_tx_seg_info_s seg_info = {0};
  3267. nbuf = dp_tx_prepare_raw(vdev, nbuf, &seg_info, &msdu_info);
  3268. if (!nbuf)
  3269. return NULL;
  3270. dp_verbose_debug("Raw frame %pK", vdev);
  3271. goto send_multiple;
  3272. }
  3273. if (qdf_unlikely(vdev->nawds_enabled)) {
  3274. qdf_ether_header_t *eh = (qdf_ether_header_t *)
  3275. qdf_nbuf_data(nbuf);
  3276. if (DP_FRAME_IS_MULTICAST((eh)->ether_dhost)) {
  3277. uint16_t sa_peer_id = DP_INVALID_PEER;
  3278. if (!soc->ast_offload_support) {
  3279. struct dp_ast_entry *ast_entry = NULL;
  3280. qdf_spin_lock_bh(&soc->ast_lock);
  3281. ast_entry = dp_peer_ast_hash_find_by_pdevid
  3282. (soc,
  3283. (uint8_t *)(eh->ether_shost),
  3284. vdev->pdev->pdev_id);
  3285. if (ast_entry)
  3286. sa_peer_id = ast_entry->peer_id;
  3287. qdf_spin_unlock_bh(&soc->ast_lock);
  3288. }
  3289. dp_tx_nawds_handler(soc, vdev, &msdu_info, nbuf,
  3290. sa_peer_id);
  3291. }
  3292. peer_id = DP_INVALID_PEER;
  3293. DP_STATS_INC_PKT(vdev, tx_i.nawds_mcast,
  3294. 1, qdf_nbuf_len(nbuf));
  3295. }
  3296. send_single:
  3297. /* Single linear frame */
  3298. /*
  3299. * If nbuf is a simple linear frame, use send_single function to
  3300. * prepare direct-buffer type TCL descriptor and enqueue to TCL
  3301. * SRNG. There is no need to setup a MSDU extension descriptor.
  3302. */
  3303. dp_tx_prefetch_nbuf_data(nbuf);
  3304. nbuf = dp_tx_send_msdu_single_wrapper(vdev, nbuf, &msdu_info,
  3305. peer_id, end_nbuf);
  3306. return nbuf;
  3307. send_multiple:
  3308. nbuf = dp_tx_send_msdu_multiple(vdev, nbuf, &msdu_info);
  3309. if (qdf_unlikely(nbuf && msdu_info.frm_type == dp_tx_frm_raw))
  3310. dp_tx_raw_prepare_unset(vdev->pdev->soc, nbuf);
  3311. return nbuf;
  3312. }
  3313. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc_hdl,
  3314. uint8_t vdev_id, qdf_nbuf_t nbuf)
  3315. {
  3316. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  3317. struct dp_vdev *vdev = NULL;
  3318. if (qdf_unlikely(vdev_id >= MAX_VDEV_CNT))
  3319. return nbuf;
  3320. /*
  3321. * dp_vdev_get_ref_by_id does does a atomic operation avoid using
  3322. * this in per packet path.
  3323. *
  3324. * As in this path vdev memory is already protected with netdev
  3325. * tx lock
  3326. */
  3327. vdev = soc->vdev_id_map[vdev_id];
  3328. if (qdf_unlikely(!vdev))
  3329. return nbuf;
  3330. if (qdf_unlikely(dp_tx_per_pkt_vdev_id_check(nbuf, vdev)
  3331. == QDF_STATUS_E_FAILURE)) {
  3332. DP_STATS_INC(vdev, tx_i.dropped.fail_per_pkt_vdev_id_check, 1);
  3333. return nbuf;
  3334. }
  3335. return dp_tx_send(soc_hdl, vdev_id, nbuf);
  3336. }
  3337. #ifdef UMAC_SUPPORT_PROXY_ARP
  3338. /**
  3339. * dp_tx_proxy_arp() - Tx proxy arp handler
  3340. * @vdev: datapath vdev handle
  3341. * @nbuf: sk buffer
  3342. *
  3343. * Return: status
  3344. */
  3345. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3346. {
  3347. if (vdev->osif_proxy_arp)
  3348. return vdev->osif_proxy_arp(vdev->osif_vdev, nbuf);
  3349. /*
  3350. * when UMAC_SUPPORT_PROXY_ARP is defined, we expect
  3351. * osif_proxy_arp has a valid function pointer assigned
  3352. * to it
  3353. */
  3354. dp_tx_err("valid function pointer for osif_proxy_arp is expected!!\n");
  3355. return QDF_STATUS_NOT_INITIALIZED;
  3356. }
  3357. #else
  3358. int dp_tx_proxy_arp(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  3359. {
  3360. return QDF_STATUS_SUCCESS;
  3361. }
  3362. #endif
  3363. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  3364. !defined(CONFIG_MLO_SINGLE_DEV)
  3365. #ifdef WLAN_MCAST_MLO
  3366. static bool
  3367. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3368. struct dp_tx_desc_s *tx_desc,
  3369. qdf_nbuf_t nbuf,
  3370. uint8_t reinject_reason)
  3371. {
  3372. if (reinject_reason == HTT_TX_FW2WBM_REINJECT_REASON_MLO_MCAST) {
  3373. if (soc->arch_ops.dp_tx_mcast_handler)
  3374. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, nbuf);
  3375. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3376. return true;
  3377. }
  3378. return false;
  3379. }
  3380. #else /* WLAN_MCAST_MLO */
  3381. static inline bool
  3382. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3383. struct dp_tx_desc_s *tx_desc,
  3384. qdf_nbuf_t nbuf,
  3385. uint8_t reinject_reason)
  3386. {
  3387. return false;
  3388. }
  3389. #endif /* WLAN_MCAST_MLO */
  3390. #else
  3391. static inline bool
  3392. dp_tx_reinject_mlo_hdl(struct dp_soc *soc, struct dp_vdev *vdev,
  3393. struct dp_tx_desc_s *tx_desc,
  3394. qdf_nbuf_t nbuf,
  3395. uint8_t reinject_reason)
  3396. {
  3397. return false;
  3398. }
  3399. #endif
  3400. void dp_tx_reinject_handler(struct dp_soc *soc,
  3401. struct dp_vdev *vdev,
  3402. struct dp_tx_desc_s *tx_desc,
  3403. uint8_t *status,
  3404. uint8_t reinject_reason)
  3405. {
  3406. struct dp_peer *peer = NULL;
  3407. uint32_t peer_id = HTT_INVALID_PEER;
  3408. qdf_nbuf_t nbuf = tx_desc->nbuf;
  3409. qdf_nbuf_t nbuf_copy = NULL;
  3410. struct dp_tx_msdu_info_s msdu_info;
  3411. #ifdef WDS_VENDOR_EXTENSION
  3412. int is_mcast = 0, is_ucast = 0;
  3413. int num_peers_3addr = 0;
  3414. qdf_ether_header_t *eth_hdr = (qdf_ether_header_t *)(qdf_nbuf_data(nbuf));
  3415. struct ieee80211_frame_addr4 *wh = (struct ieee80211_frame_addr4 *)(qdf_nbuf_data(nbuf));
  3416. #endif
  3417. struct dp_txrx_peer *txrx_peer;
  3418. qdf_assert(vdev);
  3419. dp_tx_debug("Tx reinject path");
  3420. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  3421. qdf_nbuf_len(tx_desc->nbuf));
  3422. if (dp_tx_reinject_mlo_hdl(soc, vdev, tx_desc, nbuf, reinject_reason))
  3423. return;
  3424. #ifdef WDS_VENDOR_EXTENSION
  3425. if (qdf_unlikely(vdev->tx_encap_type != htt_cmn_pkt_type_raw)) {
  3426. is_mcast = (IS_MULTICAST(wh->i_addr1)) ? 1 : 0;
  3427. } else {
  3428. is_mcast = (IS_MULTICAST(eth_hdr->ether_dhost)) ? 1 : 0;
  3429. }
  3430. is_ucast = !is_mcast;
  3431. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3432. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3433. txrx_peer = dp_get_txrx_peer(peer);
  3434. if (!txrx_peer || txrx_peer->bss_peer)
  3435. continue;
  3436. /* Detect wds peers that use 3-addr framing for mcast.
  3437. * if there are any, the bss_peer is used to send the
  3438. * the mcast frame using 3-addr format. all wds enabled
  3439. * peers that use 4-addr framing for mcast frames will
  3440. * be duplicated and sent as 4-addr frames below.
  3441. */
  3442. if (!txrx_peer->wds_enabled ||
  3443. !txrx_peer->wds_ecm.wds_tx_mcast_4addr) {
  3444. num_peers_3addr = 1;
  3445. break;
  3446. }
  3447. }
  3448. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3449. #endif
  3450. if (qdf_unlikely(vdev->mesh_vdev)) {
  3451. DP_TX_FREE_SINGLE_BUF(vdev->pdev->soc, tx_desc->nbuf);
  3452. } else {
  3453. qdf_spin_lock_bh(&vdev->peer_list_lock);
  3454. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3455. txrx_peer = dp_get_txrx_peer(peer);
  3456. if (!txrx_peer)
  3457. continue;
  3458. if ((txrx_peer->peer_id != HTT_INVALID_PEER) &&
  3459. #ifdef WDS_VENDOR_EXTENSION
  3460. /*
  3461. * . if 3-addr STA, then send on BSS Peer
  3462. * . if Peer WDS enabled and accept 4-addr mcast,
  3463. * send mcast on that peer only
  3464. * . if Peer WDS enabled and accept 4-addr ucast,
  3465. * send ucast on that peer only
  3466. */
  3467. ((txrx_peer->bss_peer && num_peers_3addr && is_mcast) ||
  3468. (txrx_peer->wds_enabled &&
  3469. ((is_mcast && txrx_peer->wds_ecm.wds_tx_mcast_4addr) ||
  3470. (is_ucast &&
  3471. txrx_peer->wds_ecm.wds_tx_ucast_4addr))))) {
  3472. #else
  3473. (txrx_peer->bss_peer &&
  3474. (dp_tx_proxy_arp(vdev, nbuf) == QDF_STATUS_SUCCESS))) {
  3475. #endif
  3476. peer_id = DP_INVALID_PEER;
  3477. nbuf_copy = qdf_nbuf_copy(nbuf);
  3478. if (!nbuf_copy) {
  3479. dp_tx_debug("nbuf copy failed");
  3480. break;
  3481. }
  3482. qdf_mem_zero(&msdu_info, sizeof(msdu_info));
  3483. dp_tx_get_queue(vdev, nbuf,
  3484. &msdu_info.tx_queue);
  3485. nbuf_copy = dp_tx_send_msdu_single(vdev,
  3486. nbuf_copy,
  3487. &msdu_info,
  3488. peer_id,
  3489. NULL);
  3490. if (nbuf_copy) {
  3491. dp_tx_debug("pkt send failed");
  3492. qdf_nbuf_free(nbuf_copy);
  3493. }
  3494. }
  3495. }
  3496. qdf_spin_unlock_bh(&vdev->peer_list_lock);
  3497. qdf_nbuf_unmap_nbytes_single(vdev->osdev, nbuf,
  3498. QDF_DMA_TO_DEVICE, nbuf->len);
  3499. qdf_nbuf_free(nbuf);
  3500. }
  3501. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3502. }
  3503. void dp_tx_inspect_handler(struct dp_soc *soc,
  3504. struct dp_vdev *vdev,
  3505. struct dp_tx_desc_s *tx_desc,
  3506. uint8_t *status)
  3507. {
  3508. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3509. "%s Tx inspect path",
  3510. __func__);
  3511. DP_STATS_INC_PKT(vdev, tx_i.inspect_pkts, 1,
  3512. qdf_nbuf_len(tx_desc->nbuf));
  3513. DP_TX_FREE_SINGLE_BUF(soc, tx_desc->nbuf);
  3514. dp_tx_desc_release(soc, tx_desc, tx_desc->pool_id);
  3515. }
  3516. #ifdef MESH_MODE_SUPPORT
  3517. /**
  3518. * dp_tx_comp_fill_tx_completion_stats() - Fill per packet Tx completion stats
  3519. * in mesh meta header
  3520. * @tx_desc: software descriptor head pointer
  3521. * @ts: pointer to tx completion stats
  3522. * Return: none
  3523. */
  3524. static
  3525. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3526. struct hal_tx_completion_status *ts)
  3527. {
  3528. qdf_nbuf_t netbuf = tx_desc->nbuf;
  3529. if (!tx_desc->msdu_ext_desc) {
  3530. if (qdf_nbuf_pull_head(netbuf, tx_desc->pkt_offset) == NULL) {
  3531. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3532. "netbuf %pK offset %d",
  3533. netbuf, tx_desc->pkt_offset);
  3534. return;
  3535. }
  3536. }
  3537. }
  3538. #else
  3539. static
  3540. void dp_tx_comp_fill_tx_completion_stats(struct dp_tx_desc_s *tx_desc,
  3541. struct hal_tx_completion_status *ts)
  3542. {
  3543. }
  3544. #endif
  3545. #ifdef CONFIG_SAWF
  3546. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3547. struct dp_vdev *vdev,
  3548. struct dp_txrx_peer *txrx_peer,
  3549. struct dp_tx_desc_s *tx_desc,
  3550. struct hal_tx_completion_status *ts,
  3551. uint8_t tid)
  3552. {
  3553. dp_sawf_tx_compl_update_peer_stats(soc, vdev, txrx_peer, tx_desc,
  3554. ts, tid);
  3555. }
  3556. static void dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3557. uint32_t nw_delay,
  3558. uint32_t sw_delay,
  3559. uint32_t hw_delay)
  3560. {
  3561. dp_peer_tid_delay_avg(tx_delay,
  3562. nw_delay,
  3563. sw_delay,
  3564. hw_delay);
  3565. }
  3566. #else
  3567. static void dp_tx_update_peer_sawf_stats(struct dp_soc *soc,
  3568. struct dp_vdev *vdev,
  3569. struct dp_txrx_peer *txrx_peer,
  3570. struct dp_tx_desc_s *tx_desc,
  3571. struct hal_tx_completion_status *ts,
  3572. uint8_t tid)
  3573. {
  3574. }
  3575. static inline void
  3576. dp_tx_compute_delay_avg(struct cdp_delay_tx_stats *tx_delay,
  3577. uint32_t nw_delay, uint32_t sw_delay,
  3578. uint32_t hw_delay)
  3579. {
  3580. }
  3581. #endif
  3582. #ifdef QCA_PEER_EXT_STATS
  3583. #ifdef WLAN_CONFIG_TX_DELAY
  3584. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3585. struct dp_tx_desc_s *tx_desc,
  3586. struct hal_tx_completion_status *ts,
  3587. struct dp_vdev *vdev)
  3588. {
  3589. struct dp_soc *soc = vdev->pdev->soc;
  3590. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3591. int64_t timestamp_ingress, timestamp_hw_enqueue;
  3592. uint32_t sw_enqueue_delay, fwhw_transmit_delay = 0;
  3593. if (!ts->valid)
  3594. return;
  3595. timestamp_ingress = qdf_nbuf_get_timestamp_us(tx_desc->nbuf);
  3596. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3597. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3598. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3599. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3600. if (!soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3601. &fwhw_transmit_delay))
  3602. dp_hist_update_stats(&tx_delay->hwtx_delay,
  3603. fwhw_transmit_delay);
  3604. dp_tx_compute_delay_avg(tx_delay, 0, sw_enqueue_delay,
  3605. fwhw_transmit_delay);
  3606. }
  3607. #else
  3608. /**
  3609. * dp_tx_compute_tid_delay() - Compute per TID delay
  3610. * @stats: Per TID delay stats
  3611. * @tx_desc: Software Tx descriptor
  3612. * @ts: Tx completion status
  3613. * @vdev: vdev
  3614. *
  3615. * Compute the software enqueue and hw enqueue delays and
  3616. * update the respective histograms
  3617. *
  3618. * Return: void
  3619. */
  3620. static void dp_tx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  3621. struct dp_tx_desc_s *tx_desc,
  3622. struct hal_tx_completion_status *ts,
  3623. struct dp_vdev *vdev)
  3624. {
  3625. struct cdp_delay_tx_stats *tx_delay = &stats->tx_delay;
  3626. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3627. uint32_t sw_enqueue_delay, fwhw_transmit_delay;
  3628. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3629. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3630. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3631. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3632. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3633. timestamp_hw_enqueue);
  3634. /*
  3635. * Update the Tx software enqueue delay and HW enque-Completion delay.
  3636. */
  3637. dp_hist_update_stats(&tx_delay->tx_swq_delay, sw_enqueue_delay);
  3638. dp_hist_update_stats(&tx_delay->hwtx_delay, fwhw_transmit_delay);
  3639. }
  3640. #endif
  3641. /**
  3642. * dp_tx_update_peer_delay_stats() - Update the peer delay stats
  3643. * @txrx_peer: DP peer context
  3644. * @tx_desc: Tx software descriptor
  3645. * @ts: Tx completion status
  3646. * @ring_id: Rx CPU context ID/CPU_ID
  3647. *
  3648. * Update the peer extended stats. These are enhanced other
  3649. * delay stats per msdu level.
  3650. *
  3651. * Return: void
  3652. */
  3653. static void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3654. struct dp_tx_desc_s *tx_desc,
  3655. struct hal_tx_completion_status *ts,
  3656. uint8_t ring_id)
  3657. {
  3658. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3659. struct dp_soc *soc = NULL;
  3660. struct dp_peer_delay_stats *delay_stats = NULL;
  3661. uint8_t tid;
  3662. soc = pdev->soc;
  3663. if (qdf_likely(!wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)))
  3664. return;
  3665. if (!txrx_peer->delay_stats)
  3666. return;
  3667. tid = ts->tid;
  3668. delay_stats = txrx_peer->delay_stats;
  3669. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3670. /*
  3671. * For non-TID packets use the TID 9
  3672. */
  3673. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3674. tid = CDP_MAX_DATA_TIDS - 1;
  3675. dp_tx_compute_tid_delay(&delay_stats->delay_tid_stats[tid][ring_id],
  3676. tx_desc, ts, txrx_peer->vdev);
  3677. }
  3678. #else
  3679. static inline
  3680. void dp_tx_update_peer_delay_stats(struct dp_txrx_peer *txrx_peer,
  3681. struct dp_tx_desc_s *tx_desc,
  3682. struct hal_tx_completion_status *ts,
  3683. uint8_t ring_id)
  3684. {
  3685. }
  3686. #endif
  3687. #ifdef WLAN_PEER_JITTER
  3688. /**
  3689. * dp_tx_jitter_get_avg_jitter() - compute the average jitter
  3690. * @curr_delay: Current delay
  3691. * @prev_delay: Previous delay
  3692. * @avg_jitter: Average Jitter
  3693. * Return: Newly Computed Average Jitter
  3694. */
  3695. static uint32_t dp_tx_jitter_get_avg_jitter(uint32_t curr_delay,
  3696. uint32_t prev_delay,
  3697. uint32_t avg_jitter)
  3698. {
  3699. uint32_t curr_jitter;
  3700. int32_t jitter_diff;
  3701. curr_jitter = qdf_abs(curr_delay - prev_delay);
  3702. if (!avg_jitter)
  3703. return curr_jitter;
  3704. jitter_diff = curr_jitter - avg_jitter;
  3705. if (jitter_diff < 0)
  3706. avg_jitter = avg_jitter -
  3707. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3708. else
  3709. avg_jitter = avg_jitter +
  3710. (qdf_abs(jitter_diff) >> DP_AVG_JITTER_WEIGHT_DENOM);
  3711. return avg_jitter;
  3712. }
  3713. /**
  3714. * dp_tx_jitter_get_avg_delay() - compute the average delay
  3715. * @curr_delay: Current delay
  3716. * @avg_delay: Average delay
  3717. * Return: Newly Computed Average Delay
  3718. */
  3719. static uint32_t dp_tx_jitter_get_avg_delay(uint32_t curr_delay,
  3720. uint32_t avg_delay)
  3721. {
  3722. int32_t delay_diff;
  3723. if (!avg_delay)
  3724. return curr_delay;
  3725. delay_diff = curr_delay - avg_delay;
  3726. if (delay_diff < 0)
  3727. avg_delay = avg_delay - (qdf_abs(delay_diff) >>
  3728. DP_AVG_DELAY_WEIGHT_DENOM);
  3729. else
  3730. avg_delay = avg_delay + (qdf_abs(delay_diff) >>
  3731. DP_AVG_DELAY_WEIGHT_DENOM);
  3732. return avg_delay;
  3733. }
  3734. #ifdef WLAN_CONFIG_TX_DELAY
  3735. /**
  3736. * dp_tx_compute_cur_delay() - get the current delay
  3737. * @soc: soc handle
  3738. * @vdev: vdev structure for data path state
  3739. * @ts: Tx completion status
  3740. * @curr_delay: current delay
  3741. * @tx_desc: tx descriptor
  3742. * Return: void
  3743. */
  3744. static
  3745. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3746. struct dp_vdev *vdev,
  3747. struct hal_tx_completion_status *ts,
  3748. uint32_t *curr_delay,
  3749. struct dp_tx_desc_s *tx_desc)
  3750. {
  3751. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3752. if (soc->arch_ops.dp_tx_compute_hw_delay)
  3753. status = soc->arch_ops.dp_tx_compute_hw_delay(soc, vdev, ts,
  3754. curr_delay);
  3755. return status;
  3756. }
  3757. #else
  3758. static
  3759. QDF_STATUS dp_tx_compute_cur_delay(struct dp_soc *soc,
  3760. struct dp_vdev *vdev,
  3761. struct hal_tx_completion_status *ts,
  3762. uint32_t *curr_delay,
  3763. struct dp_tx_desc_s *tx_desc)
  3764. {
  3765. int64_t current_timestamp, timestamp_hw_enqueue;
  3766. current_timestamp = qdf_ktime_to_us(qdf_ktime_real_get());
  3767. timestamp_hw_enqueue = qdf_ktime_to_us(tx_desc->timestamp);
  3768. *curr_delay = (uint32_t)(current_timestamp - timestamp_hw_enqueue);
  3769. return QDF_STATUS_SUCCESS;
  3770. }
  3771. #endif
  3772. /**
  3773. * dp_tx_compute_tid_jitter() - compute per tid per ring jitter
  3774. * @jitter: per tid per ring jitter stats
  3775. * @ts: Tx completion status
  3776. * @vdev: vdev structure for data path state
  3777. * @tx_desc: tx descriptor
  3778. * Return: void
  3779. */
  3780. static void dp_tx_compute_tid_jitter(struct cdp_peer_tid_stats *jitter,
  3781. struct hal_tx_completion_status *ts,
  3782. struct dp_vdev *vdev,
  3783. struct dp_tx_desc_s *tx_desc)
  3784. {
  3785. uint32_t curr_delay, avg_delay, avg_jitter, prev_delay;
  3786. struct dp_soc *soc = vdev->pdev->soc;
  3787. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  3788. if (ts->status != HAL_TX_TQM_RR_FRAME_ACKED) {
  3789. jitter->tx_drop += 1;
  3790. return;
  3791. }
  3792. status = dp_tx_compute_cur_delay(soc, vdev, ts, &curr_delay,
  3793. tx_desc);
  3794. if (QDF_IS_STATUS_SUCCESS(status)) {
  3795. avg_delay = jitter->tx_avg_delay;
  3796. avg_jitter = jitter->tx_avg_jitter;
  3797. prev_delay = jitter->tx_prev_delay;
  3798. avg_jitter = dp_tx_jitter_get_avg_jitter(curr_delay,
  3799. prev_delay,
  3800. avg_jitter);
  3801. avg_delay = dp_tx_jitter_get_avg_delay(curr_delay, avg_delay);
  3802. jitter->tx_avg_delay = avg_delay;
  3803. jitter->tx_avg_jitter = avg_jitter;
  3804. jitter->tx_prev_delay = curr_delay;
  3805. jitter->tx_total_success += 1;
  3806. } else if (status == QDF_STATUS_E_FAILURE) {
  3807. jitter->tx_avg_err += 1;
  3808. }
  3809. }
  3810. /* dp_tx_update_peer_jitter_stats() - Update the peer jitter stats
  3811. * @txrx_peer: DP peer context
  3812. * @tx_desc: Tx software descriptor
  3813. * @ts: Tx completion status
  3814. * @ring_id: Rx CPU context ID/CPU_ID
  3815. * Return: void
  3816. */
  3817. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3818. struct dp_tx_desc_s *tx_desc,
  3819. struct hal_tx_completion_status *ts,
  3820. uint8_t ring_id)
  3821. {
  3822. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  3823. struct dp_soc *soc = pdev->soc;
  3824. struct cdp_peer_tid_stats *jitter_stats = NULL;
  3825. uint8_t tid;
  3826. struct cdp_peer_tid_stats *rx_tid = NULL;
  3827. if (qdf_likely(!wlan_cfg_is_peer_jitter_stats_enabled(soc->wlan_cfg_ctx)))
  3828. return;
  3829. tid = ts->tid;
  3830. jitter_stats = txrx_peer->jitter_stats;
  3831. qdf_assert_always(jitter_stats);
  3832. qdf_assert(ring < CDP_MAX_TXRX_CTX);
  3833. /*
  3834. * For non-TID packets use the TID 9
  3835. */
  3836. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  3837. tid = CDP_MAX_DATA_TIDS - 1;
  3838. rx_tid = &jitter_stats[tid * CDP_MAX_TXRX_CTX + ring_id];
  3839. dp_tx_compute_tid_jitter(rx_tid,
  3840. ts, txrx_peer->vdev, tx_desc);
  3841. }
  3842. #else
  3843. static void dp_tx_update_peer_jitter_stats(struct dp_txrx_peer *txrx_peer,
  3844. struct dp_tx_desc_s *tx_desc,
  3845. struct hal_tx_completion_status *ts,
  3846. uint8_t ring_id)
  3847. {
  3848. }
  3849. #endif
  3850. #ifdef HW_TX_DELAY_STATS_ENABLE
  3851. /**
  3852. * dp_update_tx_delay_stats() - update the delay stats
  3853. * @vdev: vdev handle
  3854. * @delay: delay in ms or us based on the flag delay_in_us
  3855. * @tid: tid value
  3856. * @mode: type of tx delay mode
  3857. * @ring_id: ring number
  3858. * @delay_in_us: flag to indicate whether the delay is in ms or us
  3859. *
  3860. * Return: none
  3861. */
  3862. static inline
  3863. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3864. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3865. {
  3866. struct cdp_tid_tx_stats *tstats =
  3867. &vdev->stats.tid_tx_stats[ring_id][tid];
  3868. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3869. delay_in_us);
  3870. }
  3871. #else
  3872. static inline
  3873. void dp_update_tx_delay_stats(struct dp_vdev *vdev, uint32_t delay, uint8_t tid,
  3874. uint8_t mode, uint8_t ring_id, bool delay_in_us)
  3875. {
  3876. struct cdp_tid_tx_stats *tstats =
  3877. &vdev->pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  3878. dp_update_delay_stats(tstats, NULL, delay, tid, mode, ring_id,
  3879. delay_in_us);
  3880. }
  3881. #endif
  3882. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  3883. uint8_t tid, uint8_t ring_id)
  3884. {
  3885. int64_t current_timestamp, timestamp_ingress, timestamp_hw_enqueue;
  3886. uint32_t sw_enqueue_delay, fwhw_transmit_delay, interframe_delay;
  3887. uint32_t fwhw_transmit_delay_us;
  3888. if (qdf_likely(!vdev->pdev->delay_stats_flag) &&
  3889. qdf_likely(!dp_is_vdev_tx_delay_stats_enabled(vdev)))
  3890. return;
  3891. if (dp_is_vdev_tx_delay_stats_enabled(vdev)) {
  3892. fwhw_transmit_delay_us =
  3893. qdf_ktime_to_us(qdf_ktime_real_get()) -
  3894. qdf_ktime_to_us(tx_desc->timestamp);
  3895. /*
  3896. * Delay between packet enqueued to HW and Tx completion in us
  3897. */
  3898. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay_us, tid,
  3899. CDP_DELAY_STATS_FW_HW_TRANSMIT,
  3900. ring_id, true);
  3901. /*
  3902. * For MCL, only enqueue to completion delay is required
  3903. * so return if the vdev flag is enabled.
  3904. */
  3905. return;
  3906. }
  3907. current_timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  3908. timestamp_hw_enqueue = qdf_ktime_to_ms(tx_desc->timestamp);
  3909. fwhw_transmit_delay = (uint32_t)(current_timestamp -
  3910. timestamp_hw_enqueue);
  3911. if (!timestamp_hw_enqueue)
  3912. return;
  3913. /*
  3914. * Delay between packet enqueued to HW and Tx completion in ms
  3915. */
  3916. dp_update_tx_delay_stats(vdev, fwhw_transmit_delay, tid,
  3917. CDP_DELAY_STATS_FW_HW_TRANSMIT, ring_id,
  3918. false);
  3919. timestamp_ingress = qdf_nbuf_get_timestamp(tx_desc->nbuf);
  3920. sw_enqueue_delay = (uint32_t)(timestamp_hw_enqueue - timestamp_ingress);
  3921. interframe_delay = (uint32_t)(timestamp_ingress -
  3922. vdev->prev_tx_enq_tstamp);
  3923. /*
  3924. * Delay in software enqueue
  3925. */
  3926. dp_update_tx_delay_stats(vdev, sw_enqueue_delay, tid,
  3927. CDP_DELAY_STATS_SW_ENQ, ring_id,
  3928. false);
  3929. /*
  3930. * Update interframe delay stats calculated at hardstart receive point.
  3931. * Value of vdev->prev_tx_enq_tstamp will be 0 for 1st frame, so
  3932. * interframe delay will not be calculate correctly for 1st frame.
  3933. * On the other side, this will help in avoiding extra per packet check
  3934. * of !vdev->prev_tx_enq_tstamp.
  3935. */
  3936. dp_update_tx_delay_stats(vdev, interframe_delay, tid,
  3937. CDP_DELAY_STATS_TX_INTERFRAME, ring_id,
  3938. false);
  3939. vdev->prev_tx_enq_tstamp = timestamp_ingress;
  3940. }
  3941. #ifdef DISABLE_DP_STATS
  3942. static
  3943. inline void dp_update_no_ack_stats(qdf_nbuf_t nbuf,
  3944. struct dp_txrx_peer *txrx_peer,
  3945. uint8_t link_id)
  3946. {
  3947. }
  3948. #else
  3949. static inline void
  3950. dp_update_no_ack_stats(qdf_nbuf_t nbuf, struct dp_txrx_peer *txrx_peer,
  3951. uint8_t link_id)
  3952. {
  3953. enum qdf_proto_subtype subtype = QDF_PROTO_INVALID;
  3954. DPTRACE(qdf_dp_track_noack_check(nbuf, &subtype));
  3955. if (subtype != QDF_PROTO_INVALID)
  3956. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.no_ack_count[subtype],
  3957. 1, link_id);
  3958. }
  3959. #endif
  3960. #ifndef QCA_ENHANCED_STATS_SUPPORT
  3961. #ifdef DP_PEER_EXTENDED_API
  3962. static inline uint8_t
  3963. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3964. {
  3965. return txrx_peer->mpdu_retry_threshold;
  3966. }
  3967. #else
  3968. static inline uint8_t
  3969. dp_tx_get_mpdu_retry_threshold(struct dp_txrx_peer *txrx_peer)
  3970. {
  3971. return 0;
  3972. }
  3973. #endif
  3974. /**
  3975. * dp_tx_update_peer_extd_stats()- Update Tx extended path stats for peer
  3976. *
  3977. * @ts: Tx compltion status
  3978. * @txrx_peer: datapath txrx_peer handle
  3979. * @link_id: Link id
  3980. *
  3981. * Return: void
  3982. */
  3983. static inline void
  3984. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  3985. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  3986. {
  3987. uint8_t mcs, pkt_type, dst_mcs_idx;
  3988. uint8_t retry_threshold = dp_tx_get_mpdu_retry_threshold(txrx_peer);
  3989. mcs = ts->mcs;
  3990. pkt_type = ts->pkt_type;
  3991. /* do HW to SW pkt type conversion */
  3992. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  3993. hal_2_dp_pkt_type_map[pkt_type]);
  3994. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  3995. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  3996. DP_PEER_EXTD_STATS_INC(txrx_peer,
  3997. tx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  3998. 1, link_id);
  3999. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.sgi_count[ts->sgi], 1, link_id);
  4000. DP_PEER_EXTD_STATS_INC(txrx_peer, tx.bw[ts->bw], 1, link_id);
  4001. DP_PEER_EXTD_STATS_UPD(txrx_peer, tx.last_ack_rssi, ts->ack_frame_rssi,
  4002. link_id);
  4003. DP_PEER_EXTD_STATS_INC(txrx_peer,
  4004. tx.wme_ac_type[TID_TO_WME_AC(ts->tid)], 1,
  4005. link_id);
  4006. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.stbc, 1, ts->stbc, link_id);
  4007. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.ldpc, 1, ts->ldpc, link_id);
  4008. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries, 1, ts->transmit_cnt > 1,
  4009. link_id);
  4010. if (ts->first_msdu) {
  4011. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.retries_mpdu, 1,
  4012. ts->transmit_cnt > 1, link_id);
  4013. if (!retry_threshold)
  4014. return;
  4015. DP_PEER_EXTD_STATS_INCC(txrx_peer, tx.mpdu_success_with_retries,
  4016. qdf_do_div(ts->transmit_cnt,
  4017. retry_threshold),
  4018. ts->transmit_cnt > retry_threshold,
  4019. link_id);
  4020. }
  4021. }
  4022. #else
  4023. static inline void
  4024. dp_tx_update_peer_extd_stats(struct hal_tx_completion_status *ts,
  4025. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  4026. {
  4027. }
  4028. #endif
  4029. #if defined(WLAN_FEATURE_11BE_MLO) && \
  4030. (defined(QCA_ENHANCED_STATS_SUPPORT) || \
  4031. defined(DP_MLO_LINK_STATS_SUPPORT))
  4032. static inline uint8_t
  4033. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4034. struct hal_tx_completion_status *ts,
  4035. struct dp_txrx_peer *txrx_peer,
  4036. struct dp_vdev *vdev)
  4037. {
  4038. uint8_t hw_link_id = 0;
  4039. uint32_t ppdu_id;
  4040. uint8_t link_id_offset, link_id_bits;
  4041. if (!txrx_peer->is_mld_peer || !vdev->pdev->link_peer_stats)
  4042. return 0;
  4043. link_id_offset = soc->link_id_offset;
  4044. link_id_bits = soc->link_id_bits;
  4045. ppdu_id = ts->ppdu_id;
  4046. hw_link_id = ((DP_GET_HW_LINK_ID_FRM_PPDU_ID(ppdu_id, link_id_offset,
  4047. link_id_bits)) + 1);
  4048. if (hw_link_id > DP_MAX_MLO_LINKS) {
  4049. hw_link_id = 0;
  4050. DP_PEER_PER_PKT_STATS_INC(
  4051. txrx_peer,
  4052. tx.inval_link_id_pkt_cnt, 1, hw_link_id);
  4053. }
  4054. return hw_link_id;
  4055. }
  4056. #else
  4057. static inline uint8_t
  4058. dp_tx_get_link_id_from_ppdu_id(struct dp_soc *soc,
  4059. struct hal_tx_completion_status *ts,
  4060. struct dp_txrx_peer *txrx_peer,
  4061. struct dp_vdev *vdev)
  4062. {
  4063. return 0;
  4064. }
  4065. #endif
  4066. /**
  4067. * dp_tx_update_peer_stats() - Update peer stats from Tx completion indications
  4068. * per wbm ring
  4069. *
  4070. * @tx_desc: software descriptor head pointer
  4071. * @ts: Tx completion status
  4072. * @txrx_peer: peer handle
  4073. * @ring_id: ring number
  4074. * @link_id: Link id
  4075. *
  4076. * Return: None
  4077. */
  4078. static inline void
  4079. dp_tx_update_peer_stats(struct dp_tx_desc_s *tx_desc,
  4080. struct hal_tx_completion_status *ts,
  4081. struct dp_txrx_peer *txrx_peer, uint8_t ring_id,
  4082. uint8_t link_id)
  4083. {
  4084. struct dp_pdev *pdev = txrx_peer->vdev->pdev;
  4085. uint8_t tid = ts->tid;
  4086. uint32_t length;
  4087. struct cdp_tid_tx_stats *tid_stats;
  4088. if (!pdev)
  4089. return;
  4090. if (qdf_unlikely(tid >= CDP_MAX_DATA_TIDS))
  4091. tid = CDP_MAX_DATA_TIDS - 1;
  4092. tid_stats = &pdev->stats.tid_stats.tid_tx_stats[ring_id][tid];
  4093. if (ts->release_src != HAL_TX_COMP_RELEASE_SOURCE_TQM) {
  4094. dp_err_rl("Release source:%d is not from TQM", ts->release_src);
  4095. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.release_src_not_tqm, 1,
  4096. link_id);
  4097. return;
  4098. }
  4099. length = qdf_nbuf_len(tx_desc->nbuf);
  4100. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4101. if (qdf_unlikely(pdev->delay_stats_flag) ||
  4102. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(txrx_peer->vdev)))
  4103. dp_tx_compute_delay(txrx_peer->vdev, tx_desc, tid, ring_id);
  4104. if (ts->status < CDP_MAX_TX_TQM_STATUS) {
  4105. tid_stats->tqm_status_cnt[ts->status]++;
  4106. }
  4107. if (qdf_likely(ts->status == HAL_TX_TQM_RR_FRAME_ACKED)) {
  4108. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.retry_count, 1,
  4109. ts->transmit_cnt > 1, link_id);
  4110. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.multiple_retry_count,
  4111. 1, ts->transmit_cnt > 2, link_id);
  4112. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.ofdma, 1, ts->ofdma,
  4113. link_id);
  4114. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.amsdu_cnt, 1,
  4115. ts->msdu_part_of_amsdu, link_id);
  4116. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.non_amsdu_cnt, 1,
  4117. !ts->msdu_part_of_amsdu, link_id);
  4118. txrx_peer->stats[link_id].per_pkt_stats.tx.last_tx_ts =
  4119. qdf_system_ticks();
  4120. dp_tx_update_peer_extd_stats(ts, txrx_peer, link_id);
  4121. return;
  4122. }
  4123. /*
  4124. * tx_failed is ideally supposed to be updated from HTT ppdu
  4125. * completion stats. But in IPQ807X/IPQ6018 chipsets owing to
  4126. * hw limitation there are no completions for failed cases.
  4127. * Hence updating tx_failed from data path. Please note that
  4128. * if tx_failed is fixed to be from ppdu, then this has to be
  4129. * removed
  4130. */
  4131. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4132. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, tx.failed_retry_count, 1,
  4133. ts->transmit_cnt > DP_RETRY_COUNT,
  4134. link_id);
  4135. dp_update_no_ack_stats(tx_desc->nbuf, txrx_peer, link_id);
  4136. if (ts->status == HAL_TX_TQM_RR_REM_CMD_AGED) {
  4137. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.age_out, 1,
  4138. link_id);
  4139. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_REM) {
  4140. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.dropped.fw_rem, 1,
  4141. length, link_id);
  4142. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_NOTX) {
  4143. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_notx, 1,
  4144. link_id);
  4145. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TX) {
  4146. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_rem_tx, 1,
  4147. link_id);
  4148. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON1) {
  4149. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason1, 1,
  4150. link_id);
  4151. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON2) {
  4152. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason2, 1,
  4153. link_id);
  4154. } else if (ts->status == HAL_TX_TQM_RR_FW_REASON3) {
  4155. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.fw_reason3, 1,
  4156. link_id);
  4157. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_DISABLE_QUEUE) {
  4158. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4159. tx.dropped.fw_rem_queue_disable, 1,
  4160. link_id);
  4161. } else if (ts->status == HAL_TX_TQM_RR_REM_CMD_TILL_NONMATCHING) {
  4162. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4163. tx.dropped.fw_rem_no_match, 1,
  4164. link_id);
  4165. } else if (ts->status == HAL_TX_TQM_RR_DROP_THRESHOLD) {
  4166. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4167. tx.dropped.drop_threshold, 1,
  4168. link_id);
  4169. } else if (ts->status == HAL_TX_TQM_RR_LINK_DESC_UNAVAILABLE) {
  4170. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4171. tx.dropped.drop_link_desc_na, 1,
  4172. link_id);
  4173. } else if (ts->status == HAL_TX_TQM_RR_DROP_OR_INVALID_MSDU) {
  4174. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4175. tx.dropped.invalid_drop, 1,
  4176. link_id);
  4177. } else if (ts->status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4178. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  4179. tx.dropped.mcast_vdev_drop, 1,
  4180. link_id);
  4181. } else {
  4182. DP_PEER_PER_PKT_STATS_INC(txrx_peer, tx.dropped.invalid_rr, 1,
  4183. link_id);
  4184. }
  4185. }
  4186. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  4187. /**
  4188. * dp_tx_flow_pool_lock() - take flow pool lock
  4189. * @soc: core txrx main context
  4190. * @tx_desc: tx desc
  4191. *
  4192. * Return: None
  4193. */
  4194. static inline
  4195. void dp_tx_flow_pool_lock(struct dp_soc *soc,
  4196. struct dp_tx_desc_s *tx_desc)
  4197. {
  4198. struct dp_tx_desc_pool_s *pool;
  4199. uint8_t desc_pool_id;
  4200. desc_pool_id = tx_desc->pool_id;
  4201. pool = &soc->tx_desc[desc_pool_id];
  4202. qdf_spin_lock_bh(&pool->flow_pool_lock);
  4203. }
  4204. /**
  4205. * dp_tx_flow_pool_unlock() - release flow pool lock
  4206. * @soc: core txrx main context
  4207. * @tx_desc: tx desc
  4208. *
  4209. * Return: None
  4210. */
  4211. static inline
  4212. void dp_tx_flow_pool_unlock(struct dp_soc *soc,
  4213. struct dp_tx_desc_s *tx_desc)
  4214. {
  4215. struct dp_tx_desc_pool_s *pool;
  4216. uint8_t desc_pool_id;
  4217. desc_pool_id = tx_desc->pool_id;
  4218. pool = &soc->tx_desc[desc_pool_id];
  4219. qdf_spin_unlock_bh(&pool->flow_pool_lock);
  4220. }
  4221. #else
  4222. static inline
  4223. void dp_tx_flow_pool_lock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4224. {
  4225. }
  4226. static inline
  4227. void dp_tx_flow_pool_unlock(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  4228. {
  4229. }
  4230. #endif
  4231. /**
  4232. * dp_tx_notify_completion() - Notify tx completion for this desc
  4233. * @soc: core txrx main context
  4234. * @vdev: datapath vdev handle
  4235. * @tx_desc: tx desc
  4236. * @netbuf: buffer
  4237. * @status: tx status
  4238. *
  4239. * Return: none
  4240. */
  4241. static inline void dp_tx_notify_completion(struct dp_soc *soc,
  4242. struct dp_vdev *vdev,
  4243. struct dp_tx_desc_s *tx_desc,
  4244. qdf_nbuf_t netbuf,
  4245. uint8_t status)
  4246. {
  4247. void *osif_dev;
  4248. ol_txrx_completion_fp tx_compl_cbk = NULL;
  4249. uint16_t flag = BIT(QDF_TX_RX_STATUS_DOWNLOAD_SUCC);
  4250. qdf_assert(tx_desc);
  4251. if (!vdev ||
  4252. !vdev->osif_vdev) {
  4253. return;
  4254. }
  4255. osif_dev = vdev->osif_vdev;
  4256. tx_compl_cbk = vdev->tx_comp;
  4257. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4258. flag |= BIT(QDF_TX_RX_STATUS_OK);
  4259. if (tx_compl_cbk)
  4260. tx_compl_cbk(netbuf, osif_dev, flag);
  4261. }
  4262. /**
  4263. * dp_tx_sojourn_stats_process() - Collect sojourn stats
  4264. * @pdev: pdev handle
  4265. * @txrx_peer: DP peer context
  4266. * @tid: tid value
  4267. * @txdesc_ts: timestamp from txdesc
  4268. * @ppdu_id: ppdu id
  4269. * @link_id: link id
  4270. *
  4271. * Return: none
  4272. */
  4273. #ifdef FEATURE_PERPKT_INFO
  4274. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4275. struct dp_txrx_peer *txrx_peer,
  4276. uint8_t tid,
  4277. uint64_t txdesc_ts,
  4278. uint32_t ppdu_id,
  4279. uint8_t link_id)
  4280. {
  4281. uint64_t delta_ms;
  4282. struct cdp_tx_sojourn_stats *sojourn_stats;
  4283. struct dp_peer *primary_link_peer = NULL;
  4284. struct dp_soc *link_peer_soc = NULL;
  4285. if (qdf_unlikely(!pdev->enhanced_stats_en))
  4286. return;
  4287. if (qdf_unlikely(tid == HTT_INVALID_TID ||
  4288. tid >= CDP_DATA_TID_MAX))
  4289. return;
  4290. if (qdf_unlikely(!pdev->sojourn_buf))
  4291. return;
  4292. primary_link_peer = dp_get_primary_link_peer_by_id(pdev->soc,
  4293. txrx_peer->peer_id,
  4294. DP_MOD_ID_TX_COMP);
  4295. if (qdf_unlikely(!primary_link_peer))
  4296. return;
  4297. sojourn_stats = (struct cdp_tx_sojourn_stats *)
  4298. qdf_nbuf_data(pdev->sojourn_buf);
  4299. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  4300. sojourn_stats->cookie = (void *)
  4301. dp_monitor_peer_get_peerstats_ctx(link_peer_soc,
  4302. primary_link_peer);
  4303. delta_ms = qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4304. txdesc_ts;
  4305. qdf_ewma_tx_lag_add(&txrx_peer->stats[link_id].per_pkt_stats.tx.avg_sojourn_msdu[tid],
  4306. delta_ms);
  4307. sojourn_stats->sum_sojourn_msdu[tid] = delta_ms;
  4308. sojourn_stats->num_msdus[tid] = 1;
  4309. sojourn_stats->avg_sojourn_msdu[tid].internal =
  4310. txrx_peer->stats[link_id].
  4311. per_pkt_stats.tx.avg_sojourn_msdu[tid].internal;
  4312. dp_wdi_event_handler(WDI_EVENT_TX_SOJOURN_STAT, pdev->soc,
  4313. pdev->sojourn_buf, HTT_INVALID_PEER,
  4314. WDI_NO_VAL, pdev->pdev_id);
  4315. sojourn_stats->sum_sojourn_msdu[tid] = 0;
  4316. sojourn_stats->num_msdus[tid] = 0;
  4317. sojourn_stats->avg_sojourn_msdu[tid].internal = 0;
  4318. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_TX_COMP);
  4319. }
  4320. #else
  4321. static inline void dp_tx_sojourn_stats_process(struct dp_pdev *pdev,
  4322. struct dp_txrx_peer *txrx_peer,
  4323. uint8_t tid,
  4324. uint64_t txdesc_ts,
  4325. uint32_t ppdu_id)
  4326. {
  4327. }
  4328. #endif
  4329. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  4330. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  4331. struct dp_tx_desc_s *desc,
  4332. struct hal_tx_completion_status *ts)
  4333. {
  4334. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_TX_DATA, soc,
  4335. desc, ts->peer_id,
  4336. WDI_NO_VAL, desc->pdev->pdev_id);
  4337. }
  4338. #endif
  4339. void
  4340. dp_tx_comp_process_desc(struct dp_soc *soc,
  4341. struct dp_tx_desc_s *desc,
  4342. struct hal_tx_completion_status *ts,
  4343. struct dp_txrx_peer *txrx_peer)
  4344. {
  4345. uint64_t time_latency = 0;
  4346. uint16_t peer_id = DP_INVALID_PEER_ID;
  4347. /*
  4348. * m_copy/tx_capture modes are not supported for
  4349. * scatter gather packets
  4350. */
  4351. if (qdf_unlikely(!!desc->pdev->latency_capture_enable)) {
  4352. time_latency = (qdf_ktime_to_ms(qdf_ktime_real_get()) -
  4353. qdf_ktime_to_ms(desc->timestamp));
  4354. }
  4355. dp_send_completion_to_pkt_capture(soc, desc, ts);
  4356. if (dp_tx_pkt_tracepoints_enabled())
  4357. qdf_trace_dp_packet(desc->nbuf, QDF_TX,
  4358. desc->msdu_ext_desc ?
  4359. desc->msdu_ext_desc->tso_desc : NULL,
  4360. qdf_ktime_to_ms(desc->timestamp));
  4361. if (!(desc->msdu_ext_desc)) {
  4362. dp_tx_enh_unmap(soc, desc);
  4363. if (txrx_peer)
  4364. peer_id = txrx_peer->peer_id;
  4365. if (QDF_STATUS_SUCCESS ==
  4366. dp_monitor_tx_add_to_comp_queue(soc, desc, ts, peer_id)) {
  4367. return;
  4368. }
  4369. if (QDF_STATUS_SUCCESS ==
  4370. dp_get_completion_indication_for_stack(soc,
  4371. desc->pdev,
  4372. txrx_peer, ts,
  4373. desc->nbuf,
  4374. time_latency)) {
  4375. dp_send_completion_to_stack(soc,
  4376. desc->pdev,
  4377. ts->peer_id,
  4378. ts->ppdu_id,
  4379. desc->nbuf);
  4380. return;
  4381. }
  4382. }
  4383. desc->flags |= DP_TX_DESC_FLAG_COMPLETED_TX;
  4384. dp_tx_comp_free_buf(soc, desc, false);
  4385. }
  4386. #ifdef DISABLE_DP_STATS
  4387. /**
  4388. * dp_tx_update_connectivity_stats() - update tx connectivity stats
  4389. * @soc: core txrx main context
  4390. * @vdev: virtual device instance
  4391. * @tx_desc: tx desc
  4392. * @status: tx status
  4393. *
  4394. * Return: none
  4395. */
  4396. static inline
  4397. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4398. struct dp_vdev *vdev,
  4399. struct dp_tx_desc_s *tx_desc,
  4400. uint8_t status)
  4401. {
  4402. }
  4403. #else
  4404. static inline
  4405. void dp_tx_update_connectivity_stats(struct dp_soc *soc,
  4406. struct dp_vdev *vdev,
  4407. struct dp_tx_desc_s *tx_desc,
  4408. uint8_t status)
  4409. {
  4410. void *osif_dev;
  4411. ol_txrx_stats_rx_fp stats_cbk;
  4412. uint8_t pkt_type;
  4413. qdf_assert(tx_desc);
  4414. if (!vdev ||
  4415. !vdev->osif_vdev ||
  4416. !vdev->stats_cb)
  4417. return;
  4418. osif_dev = vdev->osif_vdev;
  4419. stats_cbk = vdev->stats_cb;
  4420. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_HOST_FW_SENT, &pkt_type);
  4421. if (status == HAL_TX_TQM_RR_FRAME_ACKED)
  4422. stats_cbk(tx_desc->nbuf, osif_dev, PKT_TYPE_TX_ACK_CNT,
  4423. &pkt_type);
  4424. }
  4425. #endif
  4426. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  4427. /* Mask for bit29 ~ bit31 */
  4428. #define DP_TX_TS_BIT29_31_MASK 0xE0000000
  4429. /* Timestamp value (unit us) if bit29 is set */
  4430. #define DP_TX_TS_BIT29_SET_VALUE BIT(29)
  4431. /**
  4432. * dp_tx_adjust_enqueue_buffer_ts() - adjust the enqueue buffer_timestamp
  4433. * @ack_ts: OTA ack timestamp, unit us.
  4434. * @enqueue_ts: TCL enqueue TX data to TQM timestamp, unit us.
  4435. * @base_delta_ts: base timestamp delta for ack_ts and enqueue_ts
  4436. *
  4437. * this function will restore the bit29 ~ bit31 3 bits value for
  4438. * buffer_timestamp in wbm2sw ring entry, currently buffer_timestamp only
  4439. * can support 0x7FFF * 1024 us (29 bits), but if the timestamp is >
  4440. * 0x7FFF * 1024 us, bit29~ bit31 will be lost.
  4441. *
  4442. * Return: the adjusted buffer_timestamp value
  4443. */
  4444. static inline
  4445. uint32_t dp_tx_adjust_enqueue_buffer_ts(uint32_t ack_ts,
  4446. uint32_t enqueue_ts,
  4447. uint32_t base_delta_ts)
  4448. {
  4449. uint32_t ack_buffer_ts;
  4450. uint32_t ack_buffer_ts_bit29_31;
  4451. uint32_t adjusted_enqueue_ts;
  4452. /* corresponding buffer_timestamp value when receive OTA Ack */
  4453. ack_buffer_ts = ack_ts - base_delta_ts;
  4454. ack_buffer_ts_bit29_31 = ack_buffer_ts & DP_TX_TS_BIT29_31_MASK;
  4455. /* restore the bit29 ~ bit31 value */
  4456. adjusted_enqueue_ts = ack_buffer_ts_bit29_31 | enqueue_ts;
  4457. /*
  4458. * if actual enqueue_ts value occupied 29 bits only, this enqueue_ts
  4459. * value + real UL delay overflow 29 bits, then 30th bit (bit-29)
  4460. * should not be marked, otherwise extra 0x20000000 us is added to
  4461. * enqueue_ts.
  4462. */
  4463. if (qdf_unlikely(adjusted_enqueue_ts > ack_buffer_ts))
  4464. adjusted_enqueue_ts -= DP_TX_TS_BIT29_SET_VALUE;
  4465. return adjusted_enqueue_ts;
  4466. }
  4467. QDF_STATUS
  4468. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  4469. uint32_t delta_tsf,
  4470. uint32_t *delay_us)
  4471. {
  4472. uint32_t buffer_ts;
  4473. uint32_t delay;
  4474. if (!delay_us)
  4475. return QDF_STATUS_E_INVAL;
  4476. /* Tx_rate_stats_info_valid is 0 and tsf is invalid then */
  4477. if (!ts->valid)
  4478. return QDF_STATUS_E_INVAL;
  4479. /* buffer_timestamp is in units of 1024 us and is [31:13] of
  4480. * WBM_RELEASE_RING_4. After left shift 10 bits, it's
  4481. * valid up to 29 bits.
  4482. */
  4483. buffer_ts = ts->buffer_timestamp << 10;
  4484. buffer_ts = dp_tx_adjust_enqueue_buffer_ts(ts->tsf,
  4485. buffer_ts, delta_tsf);
  4486. delay = ts->tsf - buffer_ts - delta_tsf;
  4487. if (qdf_unlikely(delay & 0x80000000)) {
  4488. dp_err_rl("delay = 0x%x (-ve)\n"
  4489. "release_src = %d\n"
  4490. "ppdu_id = 0x%x\n"
  4491. "peer_id = 0x%x\n"
  4492. "tid = 0x%x\n"
  4493. "release_reason = %d\n"
  4494. "tsf = %u (0x%x)\n"
  4495. "buffer_timestamp = %u (0x%x)\n"
  4496. "delta_tsf = %u (0x%x)\n",
  4497. delay, ts->release_src, ts->ppdu_id, ts->peer_id,
  4498. ts->tid, ts->status, ts->tsf, ts->tsf,
  4499. ts->buffer_timestamp, ts->buffer_timestamp,
  4500. delta_tsf, delta_tsf);
  4501. delay = 0;
  4502. goto end;
  4503. }
  4504. delay &= 0x1FFFFFFF; /* mask 29 BITS */
  4505. if (delay > 0x1000000) {
  4506. dp_info_rl("----------------------\n"
  4507. "Tx completion status:\n"
  4508. "----------------------\n"
  4509. "release_src = %d\n"
  4510. "ppdu_id = 0x%x\n"
  4511. "release_reason = %d\n"
  4512. "tsf = %u (0x%x)\n"
  4513. "buffer_timestamp = %u (0x%x)\n"
  4514. "delta_tsf = %u (0x%x)\n",
  4515. ts->release_src, ts->ppdu_id, ts->status,
  4516. ts->tsf, ts->tsf, ts->buffer_timestamp,
  4517. ts->buffer_timestamp, delta_tsf, delta_tsf);
  4518. return QDF_STATUS_E_FAILURE;
  4519. }
  4520. end:
  4521. *delay_us = delay;
  4522. return QDF_STATUS_SUCCESS;
  4523. }
  4524. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4525. uint32_t delta_tsf)
  4526. {
  4527. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4528. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4529. DP_MOD_ID_CDP);
  4530. if (!vdev) {
  4531. dp_err_rl("vdev %d does not exist", vdev_id);
  4532. return;
  4533. }
  4534. vdev->delta_tsf = delta_tsf;
  4535. dp_debug("vdev id %u delta_tsf %u", vdev_id, delta_tsf);
  4536. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4537. }
  4538. #endif
  4539. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  4540. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  4541. uint8_t vdev_id, bool enable)
  4542. {
  4543. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4544. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  4545. DP_MOD_ID_CDP);
  4546. if (!vdev) {
  4547. dp_err_rl("vdev %d does not exist", vdev_id);
  4548. return QDF_STATUS_E_FAILURE;
  4549. }
  4550. qdf_atomic_set(&vdev->ul_delay_report, enable);
  4551. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4552. return QDF_STATUS_SUCCESS;
  4553. }
  4554. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  4555. uint32_t *val)
  4556. {
  4557. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  4558. struct dp_vdev *vdev;
  4559. uint32_t delay_accum;
  4560. uint32_t pkts_accum;
  4561. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_CDP);
  4562. if (!vdev) {
  4563. dp_err_rl("vdev %d does not exist", vdev_id);
  4564. return QDF_STATUS_E_FAILURE;
  4565. }
  4566. if (!qdf_atomic_read(&vdev->ul_delay_report)) {
  4567. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4568. return QDF_STATUS_E_FAILURE;
  4569. }
  4570. /* Average uplink delay based on current accumulated values */
  4571. delay_accum = qdf_atomic_read(&vdev->ul_delay_accum);
  4572. pkts_accum = qdf_atomic_read(&vdev->ul_pkts_accum);
  4573. *val = delay_accum / pkts_accum;
  4574. dp_debug("uplink_delay %u delay_accum %u pkts_accum %u", *val,
  4575. delay_accum, pkts_accum);
  4576. /* Reset accumulated values to 0 */
  4577. qdf_atomic_set(&vdev->ul_delay_accum, 0);
  4578. qdf_atomic_set(&vdev->ul_pkts_accum, 0);
  4579. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  4580. return QDF_STATUS_SUCCESS;
  4581. }
  4582. static void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4583. struct hal_tx_completion_status *ts)
  4584. {
  4585. uint32_t ul_delay;
  4586. if (qdf_unlikely(!vdev)) {
  4587. dp_info_rl("vdev is null or delete in progress");
  4588. return;
  4589. }
  4590. if (!qdf_atomic_read(&vdev->ul_delay_report))
  4591. return;
  4592. if (QDF_IS_STATUS_ERROR(dp_tx_compute_hw_delay_us(ts,
  4593. vdev->delta_tsf,
  4594. &ul_delay)))
  4595. return;
  4596. ul_delay /= 1000; /* in unit of ms */
  4597. qdf_atomic_add(ul_delay, &vdev->ul_delay_accum);
  4598. qdf_atomic_inc(&vdev->ul_pkts_accum);
  4599. }
  4600. #else /* !WLAN_FEATURE_TSF_UPLINK_DELAY */
  4601. static inline
  4602. void dp_tx_update_uplink_delay(struct dp_soc *soc, struct dp_vdev *vdev,
  4603. struct hal_tx_completion_status *ts)
  4604. {
  4605. }
  4606. #endif /* WLAN_FEATURE_TSF_UPLINK_DELAY */
  4607. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  4608. struct dp_tx_desc_s *tx_desc,
  4609. struct hal_tx_completion_status *ts,
  4610. struct dp_txrx_peer *txrx_peer,
  4611. uint8_t ring_id)
  4612. {
  4613. uint32_t length;
  4614. qdf_ether_header_t *eh;
  4615. struct dp_vdev *vdev = NULL;
  4616. qdf_nbuf_t nbuf = tx_desc->nbuf;
  4617. enum qdf_dp_tx_rx_status dp_status;
  4618. uint8_t link_id = 0;
  4619. enum QDF_OPMODE op_mode = QDF_MAX_NO_OF_MODE;
  4620. if (!nbuf) {
  4621. dp_info_rl("invalid tx descriptor. nbuf NULL");
  4622. goto out;
  4623. }
  4624. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  4625. length = dp_tx_get_pkt_len(tx_desc);
  4626. dp_status = dp_tx_hw_to_qdf(ts->status);
  4627. dp_tx_comp_debug("-------------------- \n"
  4628. "Tx Completion Stats: \n"
  4629. "-------------------- \n"
  4630. "ack_frame_rssi = %d \n"
  4631. "first_msdu = %d \n"
  4632. "last_msdu = %d \n"
  4633. "msdu_part_of_amsdu = %d \n"
  4634. "rate_stats valid = %d \n"
  4635. "bw = %d \n"
  4636. "pkt_type = %d \n"
  4637. "stbc = %d \n"
  4638. "ldpc = %d \n"
  4639. "sgi = %d \n"
  4640. "mcs = %d \n"
  4641. "ofdma = %d \n"
  4642. "tones_in_ru = %d \n"
  4643. "tsf = %d \n"
  4644. "ppdu_id = %d \n"
  4645. "transmit_cnt = %d \n"
  4646. "tid = %d \n"
  4647. "peer_id = %d\n"
  4648. "tx_status = %d\n"
  4649. "tx_release_source = %d\n",
  4650. ts->ack_frame_rssi, ts->first_msdu,
  4651. ts->last_msdu, ts->msdu_part_of_amsdu,
  4652. ts->valid, ts->bw, ts->pkt_type, ts->stbc,
  4653. ts->ldpc, ts->sgi, ts->mcs, ts->ofdma,
  4654. ts->tones_in_ru, ts->tsf, ts->ppdu_id,
  4655. ts->transmit_cnt, ts->tid, ts->peer_id,
  4656. ts->status, ts->release_src);
  4657. /* Update SoC level stats */
  4658. DP_STATS_INCC(soc, tx.dropped_fw_removed, 1,
  4659. (ts->status == HAL_TX_TQM_RR_REM_CMD_REM));
  4660. if (!txrx_peer) {
  4661. dp_info_rl("peer is null or deletion in progress");
  4662. DP_STATS_INC_PKT(soc, tx.tx_invalid_peer, 1, length);
  4663. goto out_log;
  4664. }
  4665. vdev = txrx_peer->vdev;
  4666. link_id = dp_tx_get_link_id_from_ppdu_id(soc, ts, txrx_peer, vdev);
  4667. op_mode = vdev->qdf_opmode;
  4668. dp_tx_update_connectivity_stats(soc, vdev, tx_desc, ts->status);
  4669. dp_tx_update_uplink_delay(soc, vdev, ts);
  4670. /* check tx complete notification */
  4671. if (qdf_nbuf_tx_notify_comp_get(nbuf))
  4672. dp_tx_notify_completion(soc, vdev, tx_desc,
  4673. nbuf, ts->status);
  4674. /* Update per-packet stats for mesh mode */
  4675. if (qdf_unlikely(vdev->mesh_vdev) &&
  4676. !(tx_desc->flags & DP_TX_DESC_FLAG_TO_FW))
  4677. dp_tx_comp_fill_tx_completion_stats(tx_desc, ts);
  4678. /* Update peer level stats */
  4679. if (qdf_unlikely(txrx_peer->bss_peer &&
  4680. vdev->opmode == wlan_op_mode_ap)) {
  4681. if (ts->status != HAL_TX_TQM_RR_REM_CMD_REM) {
  4682. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.mcast, 1,
  4683. length, link_id);
  4684. if (txrx_peer->vdev->tx_encap_type ==
  4685. htt_cmn_pkt_type_ethernet &&
  4686. QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  4687. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4688. tx.bcast, 1,
  4689. length, link_id);
  4690. }
  4691. }
  4692. } else {
  4693. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.ucast, 1, length,
  4694. link_id);
  4695. if (ts->status == HAL_TX_TQM_RR_FRAME_ACKED) {
  4696. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, tx.tx_success,
  4697. 1, length, link_id);
  4698. if (qdf_unlikely(txrx_peer->in_twt)) {
  4699. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  4700. tx.tx_success_twt,
  4701. 1, length,
  4702. link_id);
  4703. }
  4704. }
  4705. }
  4706. dp_tx_update_peer_stats(tx_desc, ts, txrx_peer, ring_id, link_id);
  4707. dp_tx_update_peer_delay_stats(txrx_peer, tx_desc, ts, ring_id);
  4708. dp_tx_update_peer_jitter_stats(txrx_peer, tx_desc, ts, ring_id);
  4709. dp_tx_update_peer_sawf_stats(soc, vdev, txrx_peer, tx_desc,
  4710. ts, ts->tid);
  4711. dp_tx_send_pktlog(soc, vdev->pdev, tx_desc, nbuf, dp_status);
  4712. #ifdef QCA_SUPPORT_RDK_STATS
  4713. if (soc->peerstats_enabled)
  4714. dp_tx_sojourn_stats_process(vdev->pdev, txrx_peer, ts->tid,
  4715. qdf_ktime_to_ms(tx_desc->timestamp),
  4716. ts->ppdu_id, link_id);
  4717. #endif
  4718. out_log:
  4719. DPTRACE(qdf_dp_trace_ptr(tx_desc->nbuf,
  4720. QDF_DP_TRACE_LI_DP_FREE_PACKET_PTR_RECORD,
  4721. QDF_TRACE_DEFAULT_PDEV_ID,
  4722. qdf_nbuf_data_addr(nbuf),
  4723. sizeof(qdf_nbuf_data(nbuf)),
  4724. tx_desc->id, ts->status, dp_status, op_mode));
  4725. out:
  4726. return;
  4727. }
  4728. #if defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT) && \
  4729. defined(QCA_ENHANCED_STATS_SUPPORT)
  4730. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4731. uint32_t length, uint8_t tx_status,
  4732. bool update)
  4733. {
  4734. if (update || (!txrx_peer->hw_txrx_stats_en)) {
  4735. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4736. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4737. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4738. }
  4739. }
  4740. #elif defined(QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT)
  4741. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4742. uint32_t length, uint8_t tx_status,
  4743. bool update)
  4744. {
  4745. if (!txrx_peer->hw_txrx_stats_en) {
  4746. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4747. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4748. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4749. }
  4750. }
  4751. #else
  4752. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  4753. uint32_t length, uint8_t tx_status,
  4754. bool update)
  4755. {
  4756. DP_PEER_STATS_FLAT_INC_PKT(txrx_peer, comp_pkt, 1, length);
  4757. if (tx_status != HAL_TX_TQM_RR_FRAME_ACKED)
  4758. DP_PEER_STATS_FLAT_INC(txrx_peer, tx_failed, 1);
  4759. }
  4760. #endif
  4761. /**
  4762. * dp_tx_prefetch_next_nbuf_data(): Prefetch nbuf and nbuf data
  4763. * @next: descriptor of the nrxt buffer
  4764. *
  4765. * Return: none
  4766. */
  4767. #ifdef QCA_DP_RX_NBUF_AND_NBUF_DATA_PREFETCH
  4768. static inline
  4769. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4770. {
  4771. qdf_nbuf_t nbuf = NULL;
  4772. if (next)
  4773. nbuf = next->nbuf;
  4774. if (nbuf)
  4775. qdf_prefetch(nbuf);
  4776. }
  4777. #else
  4778. static inline
  4779. void dp_tx_prefetch_next_nbuf_data(struct dp_tx_desc_s *next)
  4780. {
  4781. }
  4782. #endif
  4783. /**
  4784. * dp_tx_mcast_reinject_handler() - Tx reinjected multicast packets handler
  4785. * @soc: core txrx main context
  4786. * @desc: software descriptor
  4787. *
  4788. * Return: true when packet is reinjected
  4789. */
  4790. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  4791. defined(WLAN_MCAST_MLO) && !defined(CONFIG_MLO_SINGLE_DEV)
  4792. static inline bool
  4793. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4794. {
  4795. struct dp_vdev *vdev = NULL;
  4796. if (desc->tx_status == HAL_TX_TQM_RR_MULTICAST_DROP) {
  4797. if (!soc->arch_ops.dp_tx_mcast_handler ||
  4798. !soc->arch_ops.dp_tx_is_mcast_primary)
  4799. return false;
  4800. vdev = dp_vdev_get_ref_by_id(soc, desc->vdev_id,
  4801. DP_MOD_ID_REINJECT);
  4802. if (qdf_unlikely(!vdev)) {
  4803. dp_tx_comp_info_rl("Unable to get vdev ref %d",
  4804. desc->id);
  4805. return false;
  4806. }
  4807. if (!(soc->arch_ops.dp_tx_is_mcast_primary(soc, vdev))) {
  4808. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4809. return false;
  4810. }
  4811. DP_STATS_INC_PKT(vdev, tx_i.reinject_pkts, 1,
  4812. qdf_nbuf_len(desc->nbuf));
  4813. soc->arch_ops.dp_tx_mcast_handler(soc, vdev, desc->nbuf);
  4814. dp_tx_desc_release(soc, desc, desc->pool_id);
  4815. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_REINJECT);
  4816. return true;
  4817. }
  4818. return false;
  4819. }
  4820. #else
  4821. static inline bool
  4822. dp_tx_mcast_reinject_handler(struct dp_soc *soc, struct dp_tx_desc_s *desc)
  4823. {
  4824. return false;
  4825. }
  4826. #endif
  4827. #ifdef QCA_DP_TX_NBUF_LIST_FREE
  4828. static inline void
  4829. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4830. {
  4831. qdf_nbuf_queue_head_init(nbuf_queue_head);
  4832. }
  4833. static inline void
  4834. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4835. struct dp_tx_desc_s *desc)
  4836. {
  4837. qdf_nbuf_t nbuf = NULL;
  4838. nbuf = desc->nbuf;
  4839. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_FAST))
  4840. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4841. else
  4842. qdf_nbuf_free(nbuf);
  4843. }
  4844. static inline void
  4845. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4846. qdf_nbuf_t nbuf)
  4847. {
  4848. if (!nbuf)
  4849. return;
  4850. if (nbuf->is_from_recycler)
  4851. qdf_nbuf_dev_queue_head(nbuf_queue_head, nbuf);
  4852. else
  4853. qdf_nbuf_free(nbuf);
  4854. }
  4855. static inline void
  4856. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4857. {
  4858. qdf_nbuf_dev_kfree_list(nbuf_queue_head);
  4859. }
  4860. #else
  4861. static inline void
  4862. dp_tx_nbuf_queue_head_init(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4863. {
  4864. }
  4865. static inline void
  4866. dp_tx_nbuf_dev_queue_free(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4867. struct dp_tx_desc_s *desc)
  4868. {
  4869. qdf_nbuf_free(desc->nbuf);
  4870. }
  4871. static inline void
  4872. dp_tx_nbuf_dev_queue_free_no_flag(qdf_nbuf_queue_head_t *nbuf_queue_head,
  4873. qdf_nbuf_t nbuf)
  4874. {
  4875. qdf_nbuf_free(nbuf);
  4876. }
  4877. static inline void
  4878. dp_tx_nbuf_dev_kfree_list(qdf_nbuf_queue_head_t *nbuf_queue_head)
  4879. {
  4880. }
  4881. #endif
  4882. #ifdef WLAN_SUPPORT_PPEDS
  4883. static inline void
  4884. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4885. struct dp_txrx_peer *txrx_peer,
  4886. struct hal_tx_completion_status *ts,
  4887. struct dp_tx_desc_s *desc,
  4888. uint8_t ring_id)
  4889. {
  4890. uint8_t link_id = 0;
  4891. struct dp_vdev *vdev = NULL;
  4892. if (qdf_likely(txrx_peer)) {
  4893. if (!(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4894. hal_tx_comp_get_status(&desc->comp,
  4895. ts,
  4896. soc->hal_soc);
  4897. vdev = txrx_peer->vdev;
  4898. link_id = dp_tx_get_link_id_from_ppdu_id(soc,
  4899. ts,
  4900. txrx_peer,
  4901. vdev);
  4902. if (link_id < 1 || link_id > DP_MAX_MLO_LINKS)
  4903. link_id = 0;
  4904. dp_tx_update_peer_stats(desc, ts,
  4905. txrx_peer,
  4906. ring_id,
  4907. link_id);
  4908. } else {
  4909. dp_tx_update_peer_basic_stats(txrx_peer, desc->length,
  4910. desc->tx_status, false);
  4911. }
  4912. }
  4913. }
  4914. #else
  4915. static inline void
  4916. dp_tx_update_ppeds_tx_comp_stats(struct dp_soc *soc,
  4917. struct dp_txrx_peer *txrx_peer,
  4918. struct hal_tx_completion_status *ts,
  4919. struct dp_tx_desc_s *desc,
  4920. uint8_t ring_id)
  4921. {
  4922. }
  4923. #endif
  4924. void
  4925. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  4926. struct dp_tx_desc_s *comp_head, uint8_t ring_id)
  4927. {
  4928. struct dp_tx_desc_s *desc;
  4929. struct dp_tx_desc_s *next;
  4930. struct hal_tx_completion_status ts;
  4931. struct dp_txrx_peer *txrx_peer = NULL;
  4932. uint16_t peer_id = DP_INVALID_PEER;
  4933. dp_txrx_ref_handle txrx_ref_handle = NULL;
  4934. qdf_nbuf_queue_head_t h;
  4935. desc = comp_head;
  4936. dp_tx_nbuf_queue_head_init(&h);
  4937. while (desc) {
  4938. next = desc->next;
  4939. dp_tx_prefetch_next_nbuf_data(next);
  4940. if (peer_id != desc->peer_id) {
  4941. if (txrx_peer)
  4942. dp_txrx_peer_unref_delete(txrx_ref_handle,
  4943. DP_MOD_ID_TX_COMP);
  4944. peer_id = desc->peer_id;
  4945. txrx_peer =
  4946. dp_txrx_peer_get_ref_by_id(soc, peer_id,
  4947. &txrx_ref_handle,
  4948. DP_MOD_ID_TX_COMP);
  4949. }
  4950. if (dp_tx_mcast_reinject_handler(soc, desc)) {
  4951. desc = next;
  4952. continue;
  4953. }
  4954. if (desc->flags & DP_TX_DESC_FLAG_PPEDS) {
  4955. qdf_nbuf_t nbuf;
  4956. dp_tx_update_ppeds_tx_comp_stats(soc, txrx_peer, &ts,
  4957. desc, ring_id);
  4958. if (desc->pool_id != DP_TX_PPEDS_POOL_ID) {
  4959. nbuf = desc->nbuf;
  4960. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4961. dp_tx_desc_free(soc, desc, desc->pool_id);
  4962. __dp_tx_outstanding_dec(soc);
  4963. } else {
  4964. nbuf = dp_ppeds_tx_desc_free(soc, desc);
  4965. dp_tx_nbuf_dev_queue_free_no_flag(&h, nbuf);
  4966. }
  4967. desc = next;
  4968. continue;
  4969. }
  4970. if (qdf_likely(desc->flags & DP_TX_DESC_FLAG_SIMPLE)) {
  4971. struct dp_pdev *pdev = desc->pdev;
  4972. if (qdf_likely(txrx_peer))
  4973. dp_tx_update_peer_basic_stats(txrx_peer,
  4974. desc->length,
  4975. desc->tx_status,
  4976. false);
  4977. qdf_assert(pdev);
  4978. dp_tx_outstanding_dec(pdev);
  4979. /*
  4980. * Calling a QDF WRAPPER here is creating significant
  4981. * performance impact so avoided the wrapper call here
  4982. */
  4983. dp_tx_desc_history_add(soc, desc->dma_addr, desc->nbuf,
  4984. desc->id, DP_TX_COMP_UNMAP);
  4985. dp_tx_nbuf_unmap(soc, desc);
  4986. dp_tx_nbuf_dev_queue_free(&h, desc);
  4987. dp_tx_desc_free(soc, desc, desc->pool_id);
  4988. desc = next;
  4989. continue;
  4990. }
  4991. hal_tx_comp_get_status(&desc->comp, &ts, soc->hal_soc);
  4992. dp_tx_comp_process_tx_status(soc, desc, &ts, txrx_peer,
  4993. ring_id);
  4994. dp_tx_comp_process_desc(soc, desc, &ts, txrx_peer);
  4995. dp_tx_desc_release(soc, desc, desc->pool_id);
  4996. desc = next;
  4997. }
  4998. dp_tx_nbuf_dev_kfree_list(&h);
  4999. if (txrx_peer)
  5000. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_TX_COMP);
  5001. }
  5002. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  5003. static inline
  5004. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5005. int max_reap_limit)
  5006. {
  5007. bool limit_hit = false;
  5008. limit_hit =
  5009. (num_reaped >= max_reap_limit) ? true : false;
  5010. if (limit_hit)
  5011. DP_STATS_INC(soc, tx.tx_comp_loop_pkt_limit_hit, 1);
  5012. return limit_hit;
  5013. }
  5014. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5015. {
  5016. return soc->wlan_cfg_ctx->tx_comp_enable_eol_data_check;
  5017. }
  5018. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5019. {
  5020. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  5021. return cfg->tx_comp_loop_pkt_limit;
  5022. }
  5023. #else
  5024. static inline
  5025. bool dp_tx_comp_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped,
  5026. int max_reap_limit)
  5027. {
  5028. return false;
  5029. }
  5030. static inline bool dp_tx_comp_enable_eol_data_check(struct dp_soc *soc)
  5031. {
  5032. return false;
  5033. }
  5034. static inline int dp_tx_comp_get_loop_pkt_limit(struct dp_soc *soc)
  5035. {
  5036. return 0;
  5037. }
  5038. #endif
  5039. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  5040. static inline int
  5041. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5042. int *max_reap_limit)
  5043. {
  5044. return soc->arch_ops.dp_srng_test_and_update_nf_params(soc, dp_srng,
  5045. max_reap_limit);
  5046. }
  5047. #else
  5048. static inline int
  5049. dp_srng_test_and_update_nf_params(struct dp_soc *soc, struct dp_srng *dp_srng,
  5050. int *max_reap_limit)
  5051. {
  5052. return 0;
  5053. }
  5054. #endif
  5055. #ifdef DP_TX_TRACKING
  5056. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  5057. {
  5058. if ((tx_desc->magic != DP_TX_MAGIC_PATTERN_INUSE) &&
  5059. (tx_desc->magic != DP_TX_MAGIC_PATTERN_FREE)) {
  5060. dp_err_rl("tx_desc %u is corrupted", tx_desc->id);
  5061. qdf_trigger_self_recovery(NULL, QDF_TX_DESC_LEAK);
  5062. }
  5063. }
  5064. #endif
  5065. #ifndef WLAN_SOFTUMAC_SUPPORT
  5066. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  5067. hal_ring_handle_t hal_ring_hdl, uint8_t ring_id,
  5068. uint32_t quota)
  5069. {
  5070. void *tx_comp_hal_desc;
  5071. void *last_prefetched_hw_desc = NULL;
  5072. struct dp_tx_desc_s *last_prefetched_sw_desc = NULL;
  5073. hal_soc_handle_t hal_soc;
  5074. uint8_t buffer_src;
  5075. struct dp_tx_desc_s *tx_desc = NULL;
  5076. struct dp_tx_desc_s *head_desc = NULL;
  5077. struct dp_tx_desc_s *tail_desc = NULL;
  5078. uint32_t num_processed = 0;
  5079. uint32_t count;
  5080. uint32_t num_avail_for_reap = 0;
  5081. bool force_break = false;
  5082. struct dp_srng *tx_comp_ring = &soc->tx_comp_ring[ring_id];
  5083. int max_reap_limit, ring_near_full;
  5084. uint32_t num_entries;
  5085. DP_HIST_INIT();
  5086. num_entries = hal_srng_get_num_entries(soc->hal_soc, hal_ring_hdl);
  5087. more_data:
  5088. hal_soc = soc->hal_soc;
  5089. /* Re-initialize local variables to be re-used */
  5090. head_desc = NULL;
  5091. tail_desc = NULL;
  5092. count = 0;
  5093. max_reap_limit = dp_tx_comp_get_loop_pkt_limit(soc);
  5094. ring_near_full = dp_srng_test_and_update_nf_params(soc, tx_comp_ring,
  5095. &max_reap_limit);
  5096. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  5097. dp_err("HAL RING Access Failed -- %pK", hal_ring_hdl);
  5098. return 0;
  5099. }
  5100. if (!num_avail_for_reap)
  5101. num_avail_for_reap = hal_srng_dst_num_valid(hal_soc,
  5102. hal_ring_hdl, 0);
  5103. if (num_avail_for_reap >= quota)
  5104. num_avail_for_reap = quota;
  5105. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_avail_for_reap);
  5106. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  5107. hal_ring_hdl,
  5108. num_avail_for_reap);
  5109. /* Find head descriptor from completion ring */
  5110. while (qdf_likely(num_avail_for_reap--)) {
  5111. tx_comp_hal_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  5112. if (qdf_unlikely(!tx_comp_hal_desc))
  5113. break;
  5114. buffer_src = hal_tx_comp_get_buffer_source(hal_soc,
  5115. tx_comp_hal_desc);
  5116. /* If this buffer was not released by TQM or FW, then it is not
  5117. * Tx completion indication, assert */
  5118. if (qdf_unlikely(buffer_src !=
  5119. HAL_TX_COMP_RELEASE_SOURCE_TQM) &&
  5120. (qdf_unlikely(buffer_src !=
  5121. HAL_TX_COMP_RELEASE_SOURCE_FW))) {
  5122. uint8_t wbm_internal_error;
  5123. dp_err_rl(
  5124. "Tx comp release_src != TQM | FW but from %d",
  5125. buffer_src);
  5126. hal_dump_comp_desc(tx_comp_hal_desc);
  5127. DP_STATS_INC(soc, tx.invalid_release_source, 1);
  5128. /* When WBM sees NULL buffer_addr_info in any of
  5129. * ingress rings it sends an error indication,
  5130. * with wbm_internal_error=1, to a specific ring.
  5131. * The WBM2SW ring used to indicate these errors is
  5132. * fixed in HW, and that ring is being used as Tx
  5133. * completion ring. These errors are not related to
  5134. * Tx completions, and should just be ignored
  5135. */
  5136. wbm_internal_error = hal_get_wbm_internal_error(
  5137. hal_soc,
  5138. tx_comp_hal_desc);
  5139. if (wbm_internal_error) {
  5140. dp_err_rl("Tx comp wbm_internal_error!!");
  5141. DP_STATS_INC(soc, tx.wbm_internal_error[WBM_INT_ERROR_ALL], 1);
  5142. if (HAL_TX_COMP_RELEASE_SOURCE_REO ==
  5143. buffer_src)
  5144. dp_handle_wbm_internal_error(
  5145. soc,
  5146. tx_comp_hal_desc,
  5147. hal_tx_comp_get_buffer_type(
  5148. tx_comp_hal_desc));
  5149. } else {
  5150. dp_err_rl("Tx comp wbm_internal_error false");
  5151. DP_STATS_INC(soc, tx.non_wbm_internal_err, 1);
  5152. }
  5153. continue;
  5154. }
  5155. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  5156. tx_comp_hal_desc,
  5157. &tx_desc);
  5158. if (qdf_unlikely(!tx_desc)) {
  5159. dp_err("unable to retrieve tx_desc!");
  5160. hal_dump_comp_desc(tx_comp_hal_desc);
  5161. DP_STATS_INC(soc, tx.invalid_tx_comp_desc, 1);
  5162. QDF_BUG(0);
  5163. continue;
  5164. }
  5165. tx_desc->buffer_src = buffer_src;
  5166. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5167. goto add_to_pool2;
  5168. /*
  5169. * If the release source is FW, process the HTT status
  5170. */
  5171. if (qdf_unlikely(buffer_src ==
  5172. HAL_TX_COMP_RELEASE_SOURCE_FW)) {
  5173. uint8_t htt_tx_status[HAL_TX_COMP_HTT_STATUS_LEN];
  5174. hal_tx_comp_get_htt_desc(tx_comp_hal_desc,
  5175. htt_tx_status);
  5176. /* Collect hw completion contents */
  5177. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5178. &tx_desc->comp, 1);
  5179. soc->arch_ops.dp_tx_process_htt_completion(
  5180. soc,
  5181. tx_desc,
  5182. htt_tx_status,
  5183. ring_id);
  5184. } else {
  5185. tx_desc->tx_status =
  5186. hal_tx_comp_get_tx_status(tx_comp_hal_desc);
  5187. tx_desc->buffer_src = buffer_src;
  5188. /*
  5189. * If the fast completion mode is enabled extended
  5190. * metadata from descriptor is not copied
  5191. */
  5192. if (qdf_likely(tx_desc->flags &
  5193. DP_TX_DESC_FLAG_SIMPLE))
  5194. goto add_to_pool;
  5195. /*
  5196. * If the descriptor is already freed in vdev_detach,
  5197. * continue to next descriptor
  5198. */
  5199. if (qdf_unlikely
  5200. ((tx_desc->vdev_id == DP_INVALID_VDEV_ID) &&
  5201. !tx_desc->flags)) {
  5202. dp_tx_comp_info_rl("Descriptor freed in vdev_detach %d",
  5203. tx_desc->id);
  5204. DP_STATS_INC(soc, tx.tx_comp_exception, 1);
  5205. dp_tx_desc_check_corruption(tx_desc);
  5206. continue;
  5207. }
  5208. if (qdf_unlikely(tx_desc->pdev->is_pdev_down)) {
  5209. dp_tx_comp_info_rl("pdev in down state %d",
  5210. tx_desc->id);
  5211. tx_desc->flags |= DP_TX_DESC_FLAG_TX_COMP_ERR;
  5212. dp_tx_comp_free_buf(soc, tx_desc, false);
  5213. dp_tx_desc_release(soc, tx_desc,
  5214. tx_desc->pool_id);
  5215. goto next_desc;
  5216. }
  5217. if (!(tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED) ||
  5218. !(tx_desc->flags & DP_TX_DESC_FLAG_QUEUED_TX)) {
  5219. dp_tx_comp_alert("Txdesc invalid, flgs = %x,id = %d",
  5220. tx_desc->flags, tx_desc->id);
  5221. qdf_assert_always(0);
  5222. }
  5223. /* Collect hw completion contents */
  5224. hal_tx_comp_desc_sync(tx_comp_hal_desc,
  5225. &tx_desc->comp, 1);
  5226. add_to_pool:
  5227. DP_HIST_PACKET_COUNT_INC(tx_desc->pdev->pdev_id);
  5228. add_to_pool2:
  5229. /* First ring descriptor on the cycle */
  5230. if (!head_desc) {
  5231. head_desc = tx_desc;
  5232. tail_desc = tx_desc;
  5233. }
  5234. tail_desc->next = tx_desc;
  5235. tx_desc->next = NULL;
  5236. tail_desc = tx_desc;
  5237. }
  5238. next_desc:
  5239. num_processed += !(count & DP_TX_NAPI_BUDGET_DIV_MASK);
  5240. /*
  5241. * Processed packet count is more than given quota
  5242. * stop to processing
  5243. */
  5244. count++;
  5245. dp_tx_prefetch_hw_sw_nbuf_desc(soc, hal_soc,
  5246. num_avail_for_reap,
  5247. hal_ring_hdl,
  5248. &last_prefetched_hw_desc,
  5249. &last_prefetched_sw_desc);
  5250. if (dp_tx_comp_loop_pkt_limit_hit(soc, count, max_reap_limit))
  5251. break;
  5252. }
  5253. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  5254. /* Process the reaped descriptors */
  5255. if (head_desc)
  5256. dp_tx_comp_process_desc_list(soc, head_desc, ring_id);
  5257. DP_STATS_INC(soc, tx.tx_comp[ring_id], count);
  5258. /*
  5259. * If we are processing in near-full condition, there are 3 scenario
  5260. * 1) Ring entries has reached critical state
  5261. * 2) Ring entries are still near high threshold
  5262. * 3) Ring entries are below the safe level
  5263. *
  5264. * One more loop will move the state to normal processing and yield
  5265. */
  5266. if (ring_near_full)
  5267. goto more_data;
  5268. if (dp_tx_comp_enable_eol_data_check(soc)) {
  5269. if (num_processed >= quota)
  5270. force_break = true;
  5271. if (!force_break &&
  5272. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  5273. hal_ring_hdl)) {
  5274. DP_STATS_INC(soc, tx.hp_oos2, 1);
  5275. if (!hif_exec_should_yield(soc->hif_handle,
  5276. int_ctx->dp_intr_id))
  5277. goto more_data;
  5278. num_avail_for_reap =
  5279. hal_srng_dst_num_valid_locked(soc->hal_soc,
  5280. hal_ring_hdl,
  5281. true);
  5282. if (qdf_unlikely(num_entries &&
  5283. (num_avail_for_reap >=
  5284. num_entries >> 1))) {
  5285. DP_STATS_INC(soc, tx.near_full, 1);
  5286. goto more_data;
  5287. }
  5288. }
  5289. }
  5290. DP_TX_HIST_STATS_PER_PDEV();
  5291. return num_processed;
  5292. }
  5293. #endif
  5294. #ifdef FEATURE_WLAN_TDLS
  5295. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  5296. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list)
  5297. {
  5298. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  5299. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  5300. DP_MOD_ID_TDLS);
  5301. if (!vdev) {
  5302. dp_err("vdev handle for id %d is NULL", vdev_id);
  5303. return NULL;
  5304. }
  5305. if (tx_spec & OL_TX_SPEC_NO_FREE)
  5306. vdev->is_tdls_frame = true;
  5307. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_TDLS);
  5308. return dp_tx_send(soc_hdl, vdev_id, msdu_list);
  5309. }
  5310. #endif
  5311. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  5312. {
  5313. int pdev_id;
  5314. /*
  5315. * Fill HTT TCL Metadata with Vdev ID and MAC ID
  5316. */
  5317. DP_TX_TCL_METADATA_TYPE_SET(vdev->htt_tcl_metadata,
  5318. DP_TCL_METADATA_TYPE_VDEV_BASED);
  5319. DP_TX_TCL_METADATA_VDEV_ID_SET(vdev->htt_tcl_metadata,
  5320. vdev->vdev_id);
  5321. pdev_id =
  5322. dp_get_target_pdev_id_for_host_pdev_id(vdev->pdev->soc,
  5323. vdev->pdev->pdev_id);
  5324. DP_TX_TCL_METADATA_PDEV_ID_SET(vdev->htt_tcl_metadata, pdev_id);
  5325. /*
  5326. * Set HTT Extension Valid bit to 0 by default
  5327. */
  5328. DP_TX_TCL_METADATA_VALID_HTT_SET(vdev->htt_tcl_metadata, 0);
  5329. dp_tx_vdev_update_search_flags(vdev);
  5330. return QDF_STATUS_SUCCESS;
  5331. }
  5332. #ifndef FEATURE_WDS
  5333. static inline bool dp_tx_da_search_override(struct dp_vdev *vdev)
  5334. {
  5335. return false;
  5336. }
  5337. #endif
  5338. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  5339. {
  5340. struct dp_soc *soc = vdev->pdev->soc;
  5341. /*
  5342. * Enable both AddrY (SA based search) and AddrX (Da based search)
  5343. * for TDLS link
  5344. *
  5345. * Enable AddrY (SA based search) only for non-WDS STA and
  5346. * ProxySTA VAP (in HKv1) modes.
  5347. *
  5348. * In all other VAP modes, only DA based search should be
  5349. * enabled
  5350. */
  5351. if (vdev->opmode == wlan_op_mode_sta &&
  5352. vdev->tdls_link_connected)
  5353. vdev->hal_desc_addr_search_flags =
  5354. (HAL_TX_DESC_ADDRX_EN | HAL_TX_DESC_ADDRY_EN);
  5355. else if ((vdev->opmode == wlan_op_mode_sta) &&
  5356. !dp_tx_da_search_override(vdev))
  5357. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRY_EN;
  5358. else
  5359. vdev->hal_desc_addr_search_flags = HAL_TX_DESC_ADDRX_EN;
  5360. if (vdev->opmode == wlan_op_mode_sta && !vdev->tdls_link_connected)
  5361. vdev->search_type = soc->sta_mode_search_policy;
  5362. else
  5363. vdev->search_type = HAL_TX_ADDR_SEARCH_DEFAULT;
  5364. }
  5365. #ifdef WLAN_SUPPORT_PPEDS
  5366. static inline bool
  5367. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5368. struct dp_vdev *vdev,
  5369. struct dp_tx_desc_s *tx_desc)
  5370. {
  5371. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5372. return false;
  5373. if (tx_desc->flags & DP_TX_DESC_FLAG_PPEDS)
  5374. return true;
  5375. /*
  5376. * if vdev is given, then only check whether desc
  5377. * vdev match. if vdev is NULL, then check whether
  5378. * desc pdev match.
  5379. */
  5380. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5381. (tx_desc->pdev == pdev);
  5382. }
  5383. #else
  5384. static inline bool
  5385. dp_is_tx_desc_flush_match(struct dp_pdev *pdev,
  5386. struct dp_vdev *vdev,
  5387. struct dp_tx_desc_s *tx_desc)
  5388. {
  5389. if (!(tx_desc && (tx_desc->flags & DP_TX_DESC_FLAG_ALLOCATED)))
  5390. return false;
  5391. /*
  5392. * if vdev is given, then only check whether desc
  5393. * vdev match. if vdev is NULL, then check whether
  5394. * desc pdev match.
  5395. */
  5396. return vdev ? (tx_desc->vdev_id == vdev->vdev_id) :
  5397. (tx_desc->pdev == pdev);
  5398. }
  5399. #endif
  5400. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5401. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5402. bool force_free)
  5403. {
  5404. uint8_t i;
  5405. uint32_t j;
  5406. uint32_t num_desc, page_id, offset;
  5407. uint16_t num_desc_per_page;
  5408. struct dp_soc *soc = pdev->soc;
  5409. struct dp_tx_desc_s *tx_desc = NULL;
  5410. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5411. if (!vdev && !force_free) {
  5412. dp_err("Reset TX desc vdev, Vdev param is required!");
  5413. return;
  5414. }
  5415. for (i = 0; i < MAX_TXDESC_POOLS; i++) {
  5416. tx_desc_pool = &soc->tx_desc[i];
  5417. if (!(tx_desc_pool->pool_size) ||
  5418. IS_TX_DESC_POOL_STATUS_INACTIVE(tx_desc_pool) ||
  5419. !(tx_desc_pool->desc_pages.cacheable_pages))
  5420. continue;
  5421. /*
  5422. * Add flow pool lock protection in case pool is freed
  5423. * due to all tx_desc is recycled when handle TX completion.
  5424. * this is not necessary when do force flush as:
  5425. * a. double lock will happen if dp_tx_desc_release is
  5426. * also trying to acquire it.
  5427. * b. dp interrupt has been disabled before do force TX desc
  5428. * flush in dp_pdev_deinit().
  5429. */
  5430. if (!force_free)
  5431. qdf_spin_lock_bh(&tx_desc_pool->flow_pool_lock);
  5432. num_desc = tx_desc_pool->pool_size;
  5433. num_desc_per_page =
  5434. tx_desc_pool->desc_pages.num_element_per_page;
  5435. for (j = 0; j < num_desc; j++) {
  5436. page_id = j / num_desc_per_page;
  5437. offset = j % num_desc_per_page;
  5438. if (qdf_unlikely(!(tx_desc_pool->
  5439. desc_pages.cacheable_pages)))
  5440. break;
  5441. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5442. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5443. /*
  5444. * Free TX desc if force free is
  5445. * required, otherwise only reset vdev
  5446. * in this TX desc.
  5447. */
  5448. if (force_free) {
  5449. tx_desc->flags |= DP_TX_DESC_FLAG_FLUSH;
  5450. dp_tx_comp_free_buf(soc, tx_desc,
  5451. false);
  5452. dp_tx_desc_release(soc, tx_desc, i);
  5453. } else {
  5454. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5455. }
  5456. }
  5457. }
  5458. if (!force_free)
  5459. qdf_spin_unlock_bh(&tx_desc_pool->flow_pool_lock);
  5460. }
  5461. }
  5462. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5463. /**
  5464. * dp_tx_desc_reset_vdev() - reset vdev to NULL in TX Desc
  5465. *
  5466. * @soc: Handle to DP soc structure
  5467. * @tx_desc: pointer of one TX desc
  5468. * @desc_pool_id: TX Desc pool id
  5469. */
  5470. static inline void
  5471. dp_tx_desc_reset_vdev(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc,
  5472. uint8_t desc_pool_id)
  5473. {
  5474. TX_DESC_LOCK_LOCK(&soc->tx_desc[desc_pool_id].lock);
  5475. tx_desc->vdev_id = DP_INVALID_VDEV_ID;
  5476. TX_DESC_LOCK_UNLOCK(&soc->tx_desc[desc_pool_id].lock);
  5477. }
  5478. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  5479. bool force_free)
  5480. {
  5481. uint8_t i, num_pool;
  5482. uint32_t j;
  5483. uint32_t num_desc, page_id, offset;
  5484. uint16_t num_desc_per_page;
  5485. struct dp_soc *soc = pdev->soc;
  5486. struct dp_tx_desc_s *tx_desc = NULL;
  5487. struct dp_tx_desc_pool_s *tx_desc_pool = NULL;
  5488. if (!vdev && !force_free) {
  5489. dp_err("Reset TX desc vdev, Vdev param is required!");
  5490. return;
  5491. }
  5492. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5493. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5494. for (i = 0; i < num_pool; i++) {
  5495. tx_desc_pool = &soc->tx_desc[i];
  5496. if (!tx_desc_pool->desc_pages.cacheable_pages)
  5497. continue;
  5498. num_desc_per_page =
  5499. tx_desc_pool->desc_pages.num_element_per_page;
  5500. for (j = 0; j < num_desc; j++) {
  5501. page_id = j / num_desc_per_page;
  5502. offset = j % num_desc_per_page;
  5503. tx_desc = dp_tx_desc_find(soc, i, page_id, offset);
  5504. if (dp_is_tx_desc_flush_match(pdev, vdev, tx_desc)) {
  5505. if (force_free) {
  5506. dp_tx_comp_free_buf(soc, tx_desc,
  5507. false);
  5508. dp_tx_desc_release(soc, tx_desc, i);
  5509. } else {
  5510. dp_tx_desc_reset_vdev(soc, tx_desc,
  5511. i);
  5512. }
  5513. }
  5514. }
  5515. }
  5516. }
  5517. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5518. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  5519. {
  5520. struct dp_pdev *pdev = vdev->pdev;
  5521. /* Reset TX desc associated to this Vdev as NULL */
  5522. dp_tx_desc_flush(pdev, vdev, false);
  5523. return QDF_STATUS_SUCCESS;
  5524. }
  5525. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5526. /* Pools will be allocated dynamically */
  5527. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5528. int num_desc)
  5529. {
  5530. uint8_t i;
  5531. for (i = 0; i < num_pool; i++) {
  5532. qdf_spinlock_create(&soc->tx_desc[i].flow_pool_lock);
  5533. soc->tx_desc[i].status = FLOW_POOL_INACTIVE;
  5534. }
  5535. return QDF_STATUS_SUCCESS;
  5536. }
  5537. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5538. uint32_t num_desc)
  5539. {
  5540. return QDF_STATUS_SUCCESS;
  5541. }
  5542. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5543. {
  5544. }
  5545. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5546. {
  5547. uint8_t i;
  5548. for (i = 0; i < num_pool; i++)
  5549. qdf_spinlock_destroy(&soc->tx_desc[i].flow_pool_lock);
  5550. }
  5551. #else /* QCA_LL_TX_FLOW_CONTROL_V2! */
  5552. static QDF_STATUS dp_tx_alloc_static_pools(struct dp_soc *soc, int num_pool,
  5553. uint32_t num_desc)
  5554. {
  5555. uint8_t i, count;
  5556. /* Allocate software Tx descriptor pools */
  5557. for (i = 0; i < num_pool; i++) {
  5558. if (dp_tx_desc_pool_alloc(soc, i, num_desc)) {
  5559. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5560. FL("Tx Desc Pool alloc %d failed %pK"),
  5561. i, soc);
  5562. goto fail;
  5563. }
  5564. }
  5565. return QDF_STATUS_SUCCESS;
  5566. fail:
  5567. for (count = 0; count < i; count++)
  5568. dp_tx_desc_pool_free(soc, count);
  5569. return QDF_STATUS_E_NOMEM;
  5570. }
  5571. static QDF_STATUS dp_tx_init_static_pools(struct dp_soc *soc, int num_pool,
  5572. uint32_t num_desc)
  5573. {
  5574. uint8_t i;
  5575. for (i = 0; i < num_pool; i++) {
  5576. if (dp_tx_desc_pool_init(soc, i, num_desc)) {
  5577. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5578. FL("Tx Desc Pool init %d failed %pK"),
  5579. i, soc);
  5580. return QDF_STATUS_E_NOMEM;
  5581. }
  5582. }
  5583. return QDF_STATUS_SUCCESS;
  5584. }
  5585. static void dp_tx_deinit_static_pools(struct dp_soc *soc, int num_pool)
  5586. {
  5587. uint8_t i;
  5588. for (i = 0; i < num_pool; i++)
  5589. dp_tx_desc_pool_deinit(soc, i);
  5590. }
  5591. static void dp_tx_delete_static_pools(struct dp_soc *soc, int num_pool)
  5592. {
  5593. uint8_t i;
  5594. for (i = 0; i < num_pool; i++)
  5595. dp_tx_desc_pool_free(soc, i);
  5596. }
  5597. #endif /* !QCA_LL_TX_FLOW_CONTROL_V2 */
  5598. /**
  5599. * dp_tx_tso_cmn_desc_pool_deinit() - de-initialize TSO descriptors
  5600. * @soc: core txrx main context
  5601. * @num_pool: number of pools
  5602. *
  5603. */
  5604. static void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool)
  5605. {
  5606. dp_tx_tso_desc_pool_deinit(soc, num_pool);
  5607. dp_tx_tso_num_seg_pool_deinit(soc, num_pool);
  5608. }
  5609. /**
  5610. * dp_tx_tso_cmn_desc_pool_free() - free TSO descriptors
  5611. * @soc: core txrx main context
  5612. * @num_pool: number of pools
  5613. *
  5614. */
  5615. static void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool)
  5616. {
  5617. dp_tx_tso_desc_pool_free(soc, num_pool);
  5618. dp_tx_tso_num_seg_pool_free(soc, num_pool);
  5619. }
  5620. #ifndef WLAN_SOFTUMAC_SUPPORT
  5621. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5622. {
  5623. uint8_t num_pool;
  5624. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5625. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5626. dp_tx_ext_desc_pool_free(soc, num_pool);
  5627. dp_tx_delete_static_pools(soc, num_pool);
  5628. }
  5629. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5630. {
  5631. uint8_t num_pool;
  5632. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5633. dp_tx_flow_control_deinit(soc);
  5634. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5635. dp_tx_ext_desc_pool_deinit(soc, num_pool);
  5636. dp_tx_deinit_static_pools(soc, num_pool);
  5637. }
  5638. #else
  5639. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  5640. {
  5641. uint8_t num_pool;
  5642. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5643. dp_tx_delete_static_pools(soc, num_pool);
  5644. }
  5645. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  5646. {
  5647. uint8_t num_pool;
  5648. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5649. dp_tx_flow_control_deinit(soc);
  5650. dp_tx_deinit_static_pools(soc, num_pool);
  5651. }
  5652. #endif /*WLAN_SOFTUMAC_SUPPORT*/
  5653. /**
  5654. * dp_tx_tso_cmn_desc_pool_alloc() - TSO cmn desc pool allocator
  5655. * @soc: DP soc handle
  5656. * @num_pool: Number of pools
  5657. * @num_desc: Number of descriptors
  5658. *
  5659. * Reserve TSO descriptor buffers
  5660. *
  5661. * Return: QDF_STATUS_E_FAILURE on failure or
  5662. * QDF_STATUS_SUCCESS on success
  5663. */
  5664. static QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  5665. uint8_t num_pool,
  5666. uint32_t num_desc)
  5667. {
  5668. if (dp_tx_tso_desc_pool_alloc(soc, num_pool, num_desc)) {
  5669. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5670. return QDF_STATUS_E_FAILURE;
  5671. }
  5672. if (dp_tx_tso_num_seg_pool_alloc(soc, num_pool, num_desc)) {
  5673. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5674. num_pool, soc);
  5675. return QDF_STATUS_E_FAILURE;
  5676. }
  5677. return QDF_STATUS_SUCCESS;
  5678. }
  5679. /**
  5680. * dp_tx_tso_cmn_desc_pool_init() - TSO cmn desc pool init
  5681. * @soc: DP soc handle
  5682. * @num_pool: Number of pools
  5683. * @num_desc: Number of descriptors
  5684. *
  5685. * Initialize TSO descriptor pools
  5686. *
  5687. * Return: QDF_STATUS_E_FAILURE on failure or
  5688. * QDF_STATUS_SUCCESS on success
  5689. */
  5690. static QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  5691. uint8_t num_pool,
  5692. uint32_t num_desc)
  5693. {
  5694. if (dp_tx_tso_desc_pool_init(soc, num_pool, num_desc)) {
  5695. dp_err("TSO Desc Pool alloc %d failed %pK", num_pool, soc);
  5696. return QDF_STATUS_E_FAILURE;
  5697. }
  5698. if (dp_tx_tso_num_seg_pool_init(soc, num_pool, num_desc)) {
  5699. dp_err("TSO Num of seg Pool alloc %d failed %pK",
  5700. num_pool, soc);
  5701. return QDF_STATUS_E_FAILURE;
  5702. }
  5703. return QDF_STATUS_SUCCESS;
  5704. }
  5705. #ifndef WLAN_SOFTUMAC_SUPPORT
  5706. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5707. {
  5708. uint8_t num_pool;
  5709. uint32_t num_desc;
  5710. uint32_t num_ext_desc;
  5711. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5712. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5713. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5714. dp_info("Tx Desc Alloc num_pool: %d descs: %d", num_pool, num_desc);
  5715. if ((num_pool > MAX_TXDESC_POOLS) ||
  5716. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5717. goto fail1;
  5718. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5719. goto fail1;
  5720. if (dp_tx_ext_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5721. goto fail2;
  5722. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5723. return QDF_STATUS_SUCCESS;
  5724. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5725. goto fail3;
  5726. return QDF_STATUS_SUCCESS;
  5727. fail3:
  5728. dp_tx_ext_desc_pool_free(soc, num_pool);
  5729. fail2:
  5730. dp_tx_delete_static_pools(soc, num_pool);
  5731. fail1:
  5732. return QDF_STATUS_E_RESOURCES;
  5733. }
  5734. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5735. {
  5736. uint8_t num_pool;
  5737. uint32_t num_desc;
  5738. uint32_t num_ext_desc;
  5739. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5740. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5741. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5742. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5743. goto fail1;
  5744. if (dp_tx_ext_desc_pool_init(soc, num_pool, num_ext_desc))
  5745. goto fail2;
  5746. if (wlan_cfg_is_tso_desc_attach_defer(soc->wlan_cfg_ctx))
  5747. return QDF_STATUS_SUCCESS;
  5748. if (dp_tx_tso_cmn_desc_pool_init(soc, num_pool, num_ext_desc))
  5749. goto fail3;
  5750. dp_tx_flow_control_init(soc);
  5751. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5752. return QDF_STATUS_SUCCESS;
  5753. fail3:
  5754. dp_tx_ext_desc_pool_deinit(soc, num_pool);
  5755. fail2:
  5756. dp_tx_deinit_static_pools(soc, num_pool);
  5757. fail1:
  5758. return QDF_STATUS_E_RESOURCES;
  5759. }
  5760. #else
  5761. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  5762. {
  5763. uint8_t num_pool;
  5764. uint32_t num_desc;
  5765. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5766. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5768. "%s Tx Desc Alloc num_pool = %d, descs = %d",
  5769. __func__, num_pool, num_desc);
  5770. if ((num_pool > MAX_TXDESC_POOLS) ||
  5771. (num_desc > WLAN_CFG_NUM_TX_DESC_MAX))
  5772. return QDF_STATUS_E_RESOURCES;
  5773. if (dp_tx_alloc_static_pools(soc, num_pool, num_desc))
  5774. return QDF_STATUS_E_RESOURCES;
  5775. return QDF_STATUS_SUCCESS;
  5776. }
  5777. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  5778. {
  5779. uint8_t num_pool;
  5780. uint32_t num_desc;
  5781. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5782. num_desc = wlan_cfg_get_num_tx_desc(soc->wlan_cfg_ctx);
  5783. if (dp_tx_init_static_pools(soc, num_pool, num_desc))
  5784. return QDF_STATUS_E_RESOURCES;
  5785. dp_tx_flow_control_init(soc);
  5786. soc->process_tx_status = CONFIG_PROCESS_TX_STATUS;
  5787. return QDF_STATUS_SUCCESS;
  5788. }
  5789. #endif
  5790. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc)
  5791. {
  5792. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5793. uint8_t num_pool;
  5794. uint32_t num_ext_desc;
  5795. num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5796. num_ext_desc = wlan_cfg_get_num_tx_ext_desc(soc->wlan_cfg_ctx);
  5797. if (dp_tx_tso_cmn_desc_pool_alloc(soc, num_pool, num_ext_desc))
  5798. return QDF_STATUS_E_FAILURE;
  5799. if (dp_tx_tso_cmn_desc_pool_init(soc, num_pool, num_ext_desc))
  5800. return QDF_STATUS_E_FAILURE;
  5801. return QDF_STATUS_SUCCESS;
  5802. }
  5803. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc)
  5804. {
  5805. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  5806. uint8_t num_pool = wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  5807. dp_tx_tso_cmn_desc_pool_deinit(soc, num_pool);
  5808. dp_tx_tso_cmn_desc_pool_free(soc, num_pool);
  5809. return QDF_STATUS_SUCCESS;
  5810. }
  5811. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  5812. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  5813. enum qdf_pkt_timestamp_index index, uint64_t time,
  5814. qdf_nbuf_t nbuf)
  5815. {
  5816. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled())) {
  5817. uint64_t tsf_time;
  5818. if (vdev->get_tsf_time) {
  5819. vdev->get_tsf_time(vdev->osif_vdev, time, &tsf_time);
  5820. qdf_add_dp_pkt_timestamp(nbuf, index, tsf_time);
  5821. }
  5822. }
  5823. }
  5824. void dp_pkt_get_timestamp(uint64_t *time)
  5825. {
  5826. if (qdf_unlikely(qdf_is_dp_pkt_timestamp_enabled()))
  5827. *time = qdf_get_log_timestamp();
  5828. }
  5829. #endif
  5830. #ifdef QCA_MULTIPASS_SUPPORT
  5831. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  5832. struct dp_tx_msdu_info_s *msdu_info,
  5833. uint16_t group_key)
  5834. {
  5835. struct htt_tx_msdu_desc_ext2_t *meta_data =
  5836. (struct htt_tx_msdu_desc_ext2_t *)&msdu_info->meta_data[0];
  5837. qdf_mem_zero(meta_data, sizeof(struct htt_tx_msdu_desc_ext2_t));
  5838. /*
  5839. * When attempting to send a multicast packet with multi-passphrase,
  5840. * host shall add HTT EXT meta data "struct htt_tx_msdu_desc_ext2_t"
  5841. * ref htt.h indicating the group_id field in "key_flags" also having
  5842. * "valid_key_flags" as 1. Assign “key_flags = group_key_ix”.
  5843. */
  5844. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info->meta_data[0],
  5845. 1);
  5846. HTT_TX_MSDU_EXT2_DESC_KEY_FLAGS_SET(msdu_info->meta_data[2], group_key);
  5847. }
  5848. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP) && \
  5849. defined(WLAN_MCAST_MLO)
  5850. /**
  5851. * dp_tx_need_mcast_reinject() - If frame needs to be processed in reinject path
  5852. * @vdev: DP vdev handle
  5853. *
  5854. * Return: true if reinject handling is required else false
  5855. */
  5856. static inline bool
  5857. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5858. {
  5859. if (vdev->mlo_vdev && vdev->opmode == wlan_op_mode_ap)
  5860. return true;
  5861. return false;
  5862. }
  5863. #else
  5864. static inline bool
  5865. dp_tx_need_mcast_reinject(struct dp_vdev *vdev)
  5866. {
  5867. return false;
  5868. }
  5869. #endif
  5870. /**
  5871. * dp_tx_need_multipass_process() - If frame needs multipass phrase processing
  5872. * @soc: dp soc handle
  5873. * @vdev: DP vdev handle
  5874. * @buf: frame
  5875. * @vlan_id: vlan id of frame
  5876. *
  5877. * Return: whether peer is special or classic
  5878. */
  5879. static
  5880. uint8_t dp_tx_need_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  5881. qdf_nbuf_t buf, uint16_t *vlan_id)
  5882. {
  5883. struct dp_txrx_peer *txrx_peer = NULL;
  5884. struct dp_peer *peer = NULL;
  5885. qdf_ether_header_t *eh = (qdf_ether_header_t *)qdf_nbuf_data(buf);
  5886. struct vlan_ethhdr *veh = NULL;
  5887. bool not_vlan = ((vdev->tx_encap_type == htt_cmn_pkt_type_raw) ||
  5888. (htons(eh->ether_type) != ETH_P_8021Q));
  5889. if (qdf_unlikely(not_vlan))
  5890. return DP_VLAN_UNTAGGED;
  5891. veh = (struct vlan_ethhdr *)eh;
  5892. *vlan_id = (ntohs(veh->h_vlan_TCI) & VLAN_VID_MASK);
  5893. if (qdf_unlikely(DP_FRAME_IS_MULTICAST((eh)->ether_dhost))) {
  5894. /* look for handling of multicast packets in reinject path */
  5895. if (dp_tx_need_mcast_reinject(vdev))
  5896. return DP_VLAN_UNTAGGED;
  5897. qdf_spin_lock_bh(&vdev->mpass_peer_mutex);
  5898. TAILQ_FOREACH(txrx_peer, &vdev->mpass_peer_list,
  5899. mpass_peer_list_elem) {
  5900. if (*vlan_id == txrx_peer->vlan_id) {
  5901. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5902. return DP_VLAN_TAGGED_MULTICAST;
  5903. }
  5904. }
  5905. qdf_spin_unlock_bh(&vdev->mpass_peer_mutex);
  5906. return DP_VLAN_UNTAGGED;
  5907. }
  5908. peer = dp_peer_find_hash_find(soc, eh->ether_dhost, 0, DP_VDEV_ALL,
  5909. DP_MOD_ID_TX_MULTIPASS);
  5910. if (qdf_unlikely(!peer))
  5911. return DP_VLAN_UNTAGGED;
  5912. /*
  5913. * Do not drop the frame when vlan_id doesn't match.
  5914. * Send the frame as it is.
  5915. */
  5916. if (*vlan_id == peer->txrx_peer->vlan_id) {
  5917. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5918. return DP_VLAN_TAGGED_UNICAST;
  5919. }
  5920. dp_peer_unref_delete(peer, DP_MOD_ID_TX_MULTIPASS);
  5921. return DP_VLAN_UNTAGGED;
  5922. }
  5923. #ifndef WLAN_REPEATER_NOT_SUPPORTED
  5924. static inline void
  5925. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  5926. qdf_nbuf_t nbuf,
  5927. struct dp_tx_msdu_info_s *msdu_info)
  5928. {
  5929. qdf_nbuf_t nbuf_copy = NULL;
  5930. /* AP can have classic clients, special clients &
  5931. * classic repeaters.
  5932. * 1. Classic clients & special client:
  5933. * Remove vlan header, find corresponding group key
  5934. * index, fill in metaheader and enqueue multicast
  5935. * frame to TCL.
  5936. * 2. Classic repeater:
  5937. * Pass through to classic repeater with vlan tag
  5938. * intact without any group key index. Hardware
  5939. * will know which key to use to send frame to
  5940. * repeater.
  5941. */
  5942. nbuf_copy = qdf_nbuf_copy(nbuf);
  5943. /*
  5944. * Send multicast frame to special peers even
  5945. * if pass through to classic repeater fails.
  5946. */
  5947. if (nbuf_copy) {
  5948. struct dp_tx_msdu_info_s msdu_info_copy;
  5949. qdf_mem_zero(&msdu_info_copy, sizeof(msdu_info_copy));
  5950. msdu_info_copy.tid = HTT_TX_EXT_TID_INVALID;
  5951. HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_SET(msdu_info_copy.meta_data[0], 1);
  5952. nbuf_copy = dp_tx_send_msdu_single(vdev, nbuf_copy,
  5953. &msdu_info_copy,
  5954. HTT_INVALID_PEER, NULL);
  5955. if (nbuf_copy) {
  5956. qdf_nbuf_free(nbuf_copy);
  5957. dp_info_rl("nbuf_copy send failed");
  5958. }
  5959. }
  5960. }
  5961. #else
  5962. static inline void
  5963. dp_tx_multipass_send_pkt_to_repeater(struct dp_soc *soc, struct dp_vdev *vdev,
  5964. qdf_nbuf_t nbuf,
  5965. struct dp_tx_msdu_info_s *msdu_info)
  5966. {
  5967. }
  5968. #endif
  5969. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  5970. qdf_nbuf_t nbuf,
  5971. struct dp_tx_msdu_info_s *msdu_info)
  5972. {
  5973. uint16_t vlan_id = 0;
  5974. uint16_t group_key = 0;
  5975. uint8_t is_spcl_peer = DP_VLAN_UNTAGGED;
  5976. if (HTT_TX_MSDU_EXT2_DESC_FLAG_VALID_KEY_FLAGS_GET(msdu_info->meta_data[0]))
  5977. return true;
  5978. is_spcl_peer = dp_tx_need_multipass_process(soc, vdev, nbuf, &vlan_id);
  5979. if ((is_spcl_peer != DP_VLAN_TAGGED_MULTICAST) &&
  5980. (is_spcl_peer != DP_VLAN_TAGGED_UNICAST))
  5981. return true;
  5982. if (is_spcl_peer == DP_VLAN_TAGGED_UNICAST) {
  5983. dp_tx_remove_vlan_tag(vdev, nbuf);
  5984. return true;
  5985. }
  5986. dp_tx_multipass_send_pkt_to_repeater(soc, vdev, nbuf, msdu_info);
  5987. group_key = vdev->iv_vlan_map[vlan_id];
  5988. /*
  5989. * If group key is not installed, drop the frame.
  5990. */
  5991. if (!group_key)
  5992. return false;
  5993. dp_tx_remove_vlan_tag(vdev, nbuf);
  5994. dp_tx_add_groupkey_metadata(vdev, msdu_info, group_key);
  5995. msdu_info->exception_fw = 1;
  5996. return true;
  5997. }
  5998. #endif /* QCA_MULTIPASS_SUPPORT */