dsi_panel.c 116 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  34. {
  35. char *bp;
  36. bp = buf;
  37. /* First 7 bytes are cmd header */
  38. *bp++ = 0x0A;
  39. *bp++ = 1;
  40. *bp++ = 0;
  41. *bp++ = 0;
  42. *bp++ = pps_delay_ms;
  43. *bp++ = 0;
  44. *bp++ = 128;
  45. }
  46. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  47. char *buf, int pps_id, u32 size)
  48. {
  49. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  50. buf += DSI_CMD_PPS_HDR_SIZE;
  51. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  52. size);
  53. }
  54. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  55. char *buf, int pps_id, u32 size)
  56. {
  57. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  58. buf += DSI_CMD_PPS_HDR_SIZE;
  59. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  60. size);
  61. }
  62. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  63. {
  64. int rc = 0;
  65. int i;
  66. struct regulator *vreg = NULL;
  67. for (i = 0; i < panel->power_info.count; i++) {
  68. vreg = devm_regulator_get(panel->parent,
  69. panel->power_info.vregs[i].vreg_name);
  70. rc = PTR_RET(vreg);
  71. if (rc) {
  72. DSI_ERR("failed to get %s regulator\n",
  73. panel->power_info.vregs[i].vreg_name);
  74. goto error_put;
  75. }
  76. panel->power_info.vregs[i].vreg = vreg;
  77. }
  78. return rc;
  79. error_put:
  80. for (i = i - 1; i >= 0; i--) {
  81. devm_regulator_put(panel->power_info.vregs[i].vreg);
  82. panel->power_info.vregs[i].vreg = NULL;
  83. }
  84. return rc;
  85. }
  86. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  87. {
  88. int rc = 0;
  89. int i;
  90. for (i = panel->power_info.count - 1; i >= 0; i--)
  91. devm_regulator_put(panel->power_info.vregs[i].vreg);
  92. return rc;
  93. }
  94. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  95. {
  96. int rc = 0;
  97. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  98. if (gpio_is_valid(r_config->reset_gpio)) {
  99. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  100. if (rc) {
  101. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  102. goto error;
  103. }
  104. }
  105. if (gpio_is_valid(r_config->disp_en_gpio)) {
  106. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  107. if (rc) {
  108. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  109. goto error_release_reset;
  110. }
  111. }
  112. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  113. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  114. if (rc) {
  115. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  116. goto error_release_disp_en;
  117. }
  118. }
  119. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  120. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  121. if (rc) {
  122. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  123. goto error_release_mode_sel;
  124. }
  125. }
  126. if (gpio_is_valid(panel->panel_test_gpio)) {
  127. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  128. if (rc) {
  129. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  130. rc);
  131. panel->panel_test_gpio = -1;
  132. rc = 0;
  133. }
  134. }
  135. goto error;
  136. error_release_mode_sel:
  137. if (gpio_is_valid(panel->bl_config.en_gpio))
  138. gpio_free(panel->bl_config.en_gpio);
  139. error_release_disp_en:
  140. if (gpio_is_valid(r_config->disp_en_gpio))
  141. gpio_free(r_config->disp_en_gpio);
  142. error_release_reset:
  143. if (gpio_is_valid(r_config->reset_gpio))
  144. gpio_free(r_config->reset_gpio);
  145. error:
  146. return rc;
  147. }
  148. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  149. {
  150. int rc = 0;
  151. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  152. if (gpio_is_valid(r_config->reset_gpio))
  153. gpio_free(r_config->reset_gpio);
  154. if (gpio_is_valid(r_config->disp_en_gpio))
  155. gpio_free(r_config->disp_en_gpio);
  156. if (gpio_is_valid(panel->bl_config.en_gpio))
  157. gpio_free(panel->bl_config.en_gpio);
  158. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  159. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  160. if (gpio_is_valid(panel->panel_test_gpio))
  161. gpio_free(panel->panel_test_gpio);
  162. return rc;
  163. }
  164. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  165. {
  166. struct dsi_panel_reset_config *r_config;
  167. if (!panel) {
  168. DSI_ERR("Invalid panel param\n");
  169. return -EINVAL;
  170. }
  171. r_config = &panel->reset_config;
  172. if (!r_config) {
  173. DSI_ERR("Invalid panel reset configuration\n");
  174. return -EINVAL;
  175. }
  176. if (gpio_is_valid(r_config->reset_gpio)) {
  177. gpio_set_value(r_config->reset_gpio, 0);
  178. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  179. DSI_INFO("GPIO pulled low to simulate ESD\n");
  180. return 0;
  181. }
  182. DSI_ERR("failed to pull down gpio\n");
  183. return -EINVAL;
  184. }
  185. static int dsi_panel_reset(struct dsi_panel *panel)
  186. {
  187. int rc = 0;
  188. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  189. int i;
  190. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  191. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  192. if (rc) {
  193. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  194. goto exit;
  195. }
  196. }
  197. if (r_config->count) {
  198. rc = gpio_direction_output(r_config->reset_gpio,
  199. r_config->sequence[0].level);
  200. if (rc) {
  201. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  202. goto exit;
  203. }
  204. }
  205. for (i = 0; i < r_config->count; i++) {
  206. gpio_set_value(r_config->reset_gpio,
  207. r_config->sequence[i].level);
  208. if (r_config->sequence[i].sleep_ms)
  209. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  210. (r_config->sequence[i].sleep_ms * 1000) + 100);
  211. }
  212. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  213. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  214. if (rc)
  215. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  216. }
  217. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  218. bool out = true;
  219. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  220. || (panel->reset_config.mode_sel_state
  221. == MODE_GPIO_LOW))
  222. out = false;
  223. else if ((panel->reset_config.mode_sel_state
  224. == MODE_SEL_SINGLE_PORT) ||
  225. (panel->reset_config.mode_sel_state
  226. == MODE_GPIO_HIGH))
  227. out = true;
  228. rc = gpio_direction_output(
  229. panel->reset_config.lcd_mode_sel_gpio, out);
  230. if (rc)
  231. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  232. }
  233. if (gpio_is_valid(panel->panel_test_gpio)) {
  234. rc = gpio_direction_input(panel->panel_test_gpio);
  235. if (rc)
  236. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  237. rc);
  238. }
  239. exit:
  240. return rc;
  241. }
  242. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  243. {
  244. int rc = 0;
  245. struct pinctrl_state *state;
  246. if (panel->host_config.ext_bridge_mode)
  247. return 0;
  248. if (!panel->pinctrl.pinctrl)
  249. return 0;
  250. if (enable)
  251. state = panel->pinctrl.active;
  252. else
  253. state = panel->pinctrl.suspend;
  254. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  255. if (rc)
  256. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  257. panel->name, rc);
  258. return rc;
  259. }
  260. static int dsi_panel_power_on(struct dsi_panel *panel)
  261. {
  262. int rc = 0;
  263. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  264. if (rc) {
  265. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  266. panel->name, rc);
  267. goto exit;
  268. }
  269. rc = dsi_panel_set_pinctrl_state(panel, true);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  272. goto error_disable_vregs;
  273. }
  274. rc = dsi_panel_reset(panel);
  275. if (rc) {
  276. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  277. goto error_disable_gpio;
  278. }
  279. goto exit;
  280. error_disable_gpio:
  281. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  282. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  283. if (gpio_is_valid(panel->bl_config.en_gpio))
  284. gpio_set_value(panel->bl_config.en_gpio, 0);
  285. (void)dsi_panel_set_pinctrl_state(panel, false);
  286. error_disable_vregs:
  287. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  288. exit:
  289. return rc;
  290. }
  291. static int dsi_panel_power_off(struct dsi_panel *panel)
  292. {
  293. int rc = 0;
  294. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  295. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  296. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  297. !panel->reset_gpio_always_on)
  298. gpio_set_value(panel->reset_config.reset_gpio, 0);
  299. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  300. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  301. if (gpio_is_valid(panel->panel_test_gpio)) {
  302. rc = gpio_direction_input(panel->panel_test_gpio);
  303. if (rc)
  304. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  305. rc);
  306. }
  307. rc = dsi_panel_set_pinctrl_state(panel, false);
  308. if (rc) {
  309. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  310. rc);
  311. }
  312. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  313. if (rc)
  314. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  315. panel->name, rc);
  316. return rc;
  317. }
  318. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  319. enum dsi_cmd_set_type type)
  320. {
  321. int rc = 0, i = 0;
  322. ssize_t len;
  323. struct dsi_cmd_desc *cmds;
  324. u32 count;
  325. enum dsi_cmd_set_state state;
  326. struct dsi_display_mode *mode;
  327. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  328. if (!panel || !panel->cur_mode)
  329. return -EINVAL;
  330. mode = panel->cur_mode;
  331. cmds = mode->priv_info->cmd_sets[type].cmds;
  332. count = mode->priv_info->cmd_sets[type].count;
  333. state = mode->priv_info->cmd_sets[type].state;
  334. SDE_EVT32(type, state, count);
  335. if (count == 0) {
  336. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  337. panel->name, type);
  338. goto error;
  339. }
  340. for (i = 0; i < count; i++) {
  341. if (state == DSI_CMD_SET_STATE_LP)
  342. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  343. if (cmds->last_command)
  344. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  345. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  346. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  347. len = ops->transfer(panel->host, &cmds->msg);
  348. if (len < 0) {
  349. rc = len;
  350. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  351. goto error;
  352. }
  353. if (cmds->post_wait_ms)
  354. usleep_range(cmds->post_wait_ms*1000,
  355. ((cmds->post_wait_ms*1000)+10));
  356. cmds++;
  357. }
  358. error:
  359. return rc;
  360. }
  361. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  362. {
  363. int rc = 0;
  364. if (panel->host_config.ext_bridge_mode)
  365. return 0;
  366. devm_pinctrl_put(panel->pinctrl.pinctrl);
  367. return rc;
  368. }
  369. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  370. {
  371. int rc = 0;
  372. if (panel->host_config.ext_bridge_mode)
  373. return 0;
  374. /* TODO: pinctrl is defined in dsi dt node */
  375. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  376. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  377. rc = PTR_ERR(panel->pinctrl.pinctrl);
  378. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  379. goto error;
  380. }
  381. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  382. "panel_active");
  383. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  384. rc = PTR_ERR(panel->pinctrl.active);
  385. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  386. goto error;
  387. }
  388. panel->pinctrl.suspend =
  389. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  390. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  391. rc = PTR_ERR(panel->pinctrl.suspend);
  392. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  393. goto error;
  394. }
  395. panel->pinctrl.pwm_pin =
  396. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  397. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  398. panel->pinctrl.pwm_pin = NULL;
  399. DSI_DEBUG("failed to get pinctrl pwm_pin");
  400. }
  401. error:
  402. return rc;
  403. }
  404. static int dsi_panel_wled_register(struct dsi_panel *panel,
  405. struct dsi_backlight_config *bl)
  406. {
  407. struct backlight_device *bd;
  408. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  409. if (!bd) {
  410. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  411. panel->name, -EPROBE_DEFER);
  412. return -EPROBE_DEFER;
  413. }
  414. bl->raw_bd = bd;
  415. return 0;
  416. }
  417. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  418. u32 bl_lvl)
  419. {
  420. int rc = 0;
  421. unsigned long mode_flags = 0;
  422. struct mipi_dsi_device *dsi = NULL;
  423. if (!panel || (bl_lvl > 0xffff)) {
  424. DSI_ERR("invalid params\n");
  425. return -EINVAL;
  426. }
  427. dsi = &panel->mipi_device;
  428. if (unlikely(panel->bl_config.lp_mode)) {
  429. mode_flags = dsi->mode_flags;
  430. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  431. }
  432. if (panel->bl_config.bl_inverted_dbv)
  433. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  434. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  435. if (rc < 0)
  436. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  437. if (unlikely(panel->bl_config.lp_mode))
  438. dsi->mode_flags = mode_flags;
  439. return rc;
  440. }
  441. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  442. u32 bl_lvl)
  443. {
  444. int rc = 0;
  445. u32 duty = 0;
  446. u32 period_ns = 0;
  447. struct dsi_backlight_config *bl;
  448. if (!panel) {
  449. DSI_ERR("Invalid Params\n");
  450. return -EINVAL;
  451. }
  452. bl = &panel->bl_config;
  453. if (!bl->pwm_bl) {
  454. DSI_ERR("pwm device not found\n");
  455. return -EINVAL;
  456. }
  457. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  458. duty = bl_lvl * period_ns;
  459. duty /= bl->bl_max_level;
  460. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  461. if (rc) {
  462. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  463. rc);
  464. goto error;
  465. }
  466. if (bl_lvl == 0 && bl->pwm_enabled) {
  467. pwm_disable(bl->pwm_bl);
  468. bl->pwm_enabled = false;
  469. return 0;
  470. }
  471. if (bl_lvl != 0 && !bl->pwm_enabled) {
  472. rc = pwm_enable(bl->pwm_bl);
  473. if (rc) {
  474. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  475. rc);
  476. goto error;
  477. }
  478. bl->pwm_enabled = true;
  479. }
  480. error:
  481. return rc;
  482. }
  483. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  484. {
  485. int rc = 0;
  486. struct dsi_backlight_config *bl = &panel->bl_config;
  487. if (panel->host_config.ext_bridge_mode)
  488. return 0;
  489. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  490. switch (bl->type) {
  491. case DSI_BACKLIGHT_WLED:
  492. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  493. break;
  494. case DSI_BACKLIGHT_DCS:
  495. rc = dsi_panel_update_backlight(panel, bl_lvl);
  496. break;
  497. case DSI_BACKLIGHT_EXTERNAL:
  498. break;
  499. case DSI_BACKLIGHT_PWM:
  500. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  501. break;
  502. default:
  503. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  504. rc = -ENOTSUPP;
  505. }
  506. return rc;
  507. }
  508. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  509. {
  510. u32 cur_bl_level;
  511. struct backlight_device *bd = bl->raw_bd;
  512. /* default the brightness level to 50% */
  513. cur_bl_level = bl->bl_max_level >> 1;
  514. switch (bl->type) {
  515. case DSI_BACKLIGHT_WLED:
  516. /* Try to query the backlight level from the backlight device */
  517. if (bd->ops && bd->ops->get_brightness)
  518. cur_bl_level = bd->ops->get_brightness(bd);
  519. break;
  520. case DSI_BACKLIGHT_DCS:
  521. case DSI_BACKLIGHT_EXTERNAL:
  522. case DSI_BACKLIGHT_PWM:
  523. default:
  524. /*
  525. * Ideally, we should read the backlight level from the
  526. * panel. For now, just set it default value.
  527. */
  528. break;
  529. }
  530. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  531. return cur_bl_level;
  532. }
  533. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  534. {
  535. struct dsi_backlight_config *bl = &panel->bl_config;
  536. bl->bl_level = dsi_panel_get_brightness(bl);
  537. }
  538. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  539. {
  540. int rc = 0;
  541. struct dsi_backlight_config *bl = &panel->bl_config;
  542. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  543. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  544. rc = PTR_ERR(bl->pwm_bl);
  545. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  546. rc);
  547. return rc;
  548. }
  549. if (panel->pinctrl.pwm_pin) {
  550. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  551. panel->pinctrl.pwm_pin);
  552. if (rc)
  553. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  554. panel->name, rc);
  555. }
  556. return 0;
  557. }
  558. static int dsi_panel_bl_register(struct dsi_panel *panel)
  559. {
  560. int rc = 0;
  561. struct dsi_backlight_config *bl = &panel->bl_config;
  562. if (panel->host_config.ext_bridge_mode)
  563. return 0;
  564. switch (bl->type) {
  565. case DSI_BACKLIGHT_WLED:
  566. rc = dsi_panel_wled_register(panel, bl);
  567. break;
  568. case DSI_BACKLIGHT_DCS:
  569. break;
  570. case DSI_BACKLIGHT_EXTERNAL:
  571. break;
  572. case DSI_BACKLIGHT_PWM:
  573. rc = dsi_panel_pwm_register(panel);
  574. break;
  575. default:
  576. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  577. rc = -ENOTSUPP;
  578. goto error;
  579. }
  580. error:
  581. return rc;
  582. }
  583. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  584. {
  585. struct dsi_backlight_config *bl = &panel->bl_config;
  586. devm_pwm_put(panel->parent, bl->pwm_bl);
  587. }
  588. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  589. {
  590. int rc = 0;
  591. struct dsi_backlight_config *bl = &panel->bl_config;
  592. if (panel->host_config.ext_bridge_mode)
  593. return 0;
  594. switch (bl->type) {
  595. case DSI_BACKLIGHT_WLED:
  596. break;
  597. case DSI_BACKLIGHT_DCS:
  598. break;
  599. case DSI_BACKLIGHT_EXTERNAL:
  600. break;
  601. case DSI_BACKLIGHT_PWM:
  602. dsi_panel_pwm_unregister(panel);
  603. break;
  604. default:
  605. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  606. rc = -ENOTSUPP;
  607. goto error;
  608. }
  609. error:
  610. return rc;
  611. }
  612. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  613. struct dsi_parser_utils *utils)
  614. {
  615. int rc = 0;
  616. u64 tmp64 = 0;
  617. struct dsi_display_mode *display_mode;
  618. struct dsi_display_mode_priv_info *priv_info;
  619. display_mode = container_of(mode, struct dsi_display_mode, timing);
  620. priv_info = display_mode->priv_info;
  621. rc = utils->read_u64(utils->data,
  622. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  623. if (rc == -EOVERFLOW) {
  624. tmp64 = 0;
  625. rc = utils->read_u32(utils->data,
  626. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  627. }
  628. mode->clk_rate_hz = !rc ? tmp64 : 0;
  629. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  630. mode->pclk_scale.numer = 1;
  631. mode->pclk_scale.denom = 1;
  632. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  633. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  634. &mode->mdp_transfer_time_us);
  635. if (!rc)
  636. display_mode->priv_info->mdp_transfer_time_us =
  637. mode->mdp_transfer_time_us;
  638. else
  639. display_mode->priv_info->mdp_transfer_time_us = 0;
  640. rc = utils->read_u32(utils->data,
  641. "qcom,mdss-dsi-panel-framerate",
  642. &mode->refresh_rate);
  643. if (rc) {
  644. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  645. rc);
  646. goto error;
  647. }
  648. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  649. &mode->h_active);
  650. if (rc) {
  651. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  652. rc);
  653. goto error;
  654. }
  655. rc = utils->read_u32(utils->data,
  656. "qcom,mdss-dsi-h-front-porch",
  657. &mode->h_front_porch);
  658. if (rc) {
  659. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  660. rc);
  661. goto error;
  662. }
  663. rc = utils->read_u32(utils->data,
  664. "qcom,mdss-dsi-h-back-porch",
  665. &mode->h_back_porch);
  666. if (rc) {
  667. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  668. rc);
  669. goto error;
  670. }
  671. rc = utils->read_u32(utils->data,
  672. "qcom,mdss-dsi-h-pulse-width",
  673. &mode->h_sync_width);
  674. if (rc) {
  675. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  676. rc);
  677. goto error;
  678. }
  679. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  680. &mode->h_skew);
  681. if (rc)
  682. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  683. rc);
  684. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  685. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  686. mode->h_sync_width);
  687. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  688. &mode->v_active);
  689. if (rc) {
  690. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  691. rc);
  692. goto error;
  693. }
  694. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  695. &mode->v_back_porch);
  696. if (rc) {
  697. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  698. rc);
  699. goto error;
  700. }
  701. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  702. &mode->v_front_porch);
  703. if (rc) {
  704. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  705. rc);
  706. goto error;
  707. }
  708. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  709. &mode->v_sync_width);
  710. if (rc) {
  711. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  712. rc);
  713. goto error;
  714. }
  715. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  716. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  717. mode->v_sync_width);
  718. error:
  719. return rc;
  720. }
  721. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  722. struct dsi_parser_utils *utils,
  723. const char *name)
  724. {
  725. int rc = 0;
  726. u32 bpp = 0;
  727. enum dsi_pixel_format fmt;
  728. const char *packing;
  729. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  730. if (rc) {
  731. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  732. name, rc);
  733. return rc;
  734. }
  735. host->bpp = bpp;
  736. switch (bpp) {
  737. case 3:
  738. fmt = DSI_PIXEL_FORMAT_RGB111;
  739. break;
  740. case 8:
  741. fmt = DSI_PIXEL_FORMAT_RGB332;
  742. break;
  743. case 12:
  744. fmt = DSI_PIXEL_FORMAT_RGB444;
  745. break;
  746. case 16:
  747. fmt = DSI_PIXEL_FORMAT_RGB565;
  748. break;
  749. case 18:
  750. fmt = DSI_PIXEL_FORMAT_RGB666;
  751. break;
  752. case 24:
  753. default:
  754. fmt = DSI_PIXEL_FORMAT_RGB888;
  755. break;
  756. }
  757. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  758. packing = utils->get_property(utils->data,
  759. "qcom,mdss-dsi-pixel-packing",
  760. NULL);
  761. if (packing && !strcmp(packing, "loose"))
  762. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  763. }
  764. host->dst_format = fmt;
  765. return rc;
  766. }
  767. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  768. struct dsi_parser_utils *utils,
  769. const char *name)
  770. {
  771. int rc = 0;
  772. bool lane_enabled;
  773. u32 num_of_lanes = 0;
  774. lane_enabled = utils->read_bool(utils->data,
  775. "qcom,mdss-dsi-lane-0-state");
  776. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  777. lane_enabled = utils->read_bool(utils->data,
  778. "qcom,mdss-dsi-lane-1-state");
  779. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  780. lane_enabled = utils->read_bool(utils->data,
  781. "qcom,mdss-dsi-lane-2-state");
  782. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  783. lane_enabled = utils->read_bool(utils->data,
  784. "qcom,mdss-dsi-lane-3-state");
  785. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  786. if (host->data_lanes & DSI_DATA_LANE_0)
  787. num_of_lanes++;
  788. if (host->data_lanes & DSI_DATA_LANE_1)
  789. num_of_lanes++;
  790. if (host->data_lanes & DSI_DATA_LANE_2)
  791. num_of_lanes++;
  792. if (host->data_lanes & DSI_DATA_LANE_3)
  793. num_of_lanes++;
  794. host->num_data_lanes = num_of_lanes;
  795. if (host->data_lanes == 0) {
  796. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  797. rc = -EINVAL;
  798. }
  799. return rc;
  800. }
  801. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  802. struct dsi_parser_utils *utils,
  803. const char *name)
  804. {
  805. int rc = 0;
  806. const char *swap_mode;
  807. swap_mode = utils->get_property(utils->data,
  808. "qcom,mdss-dsi-color-order", NULL);
  809. if (swap_mode) {
  810. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  811. host->swap_mode = DSI_COLOR_SWAP_RGB;
  812. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  813. host->swap_mode = DSI_COLOR_SWAP_RBG;
  814. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  815. host->swap_mode = DSI_COLOR_SWAP_BRG;
  816. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  817. host->swap_mode = DSI_COLOR_SWAP_GRB;
  818. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  819. host->swap_mode = DSI_COLOR_SWAP_GBR;
  820. } else {
  821. DSI_ERR("[%s] Unrecognized color order-%s\n",
  822. name, swap_mode);
  823. rc = -EINVAL;
  824. }
  825. } else {
  826. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  827. host->swap_mode = DSI_COLOR_SWAP_RGB;
  828. }
  829. /* bit swap on color channel is not defined in dt */
  830. host->bit_swap_red = false;
  831. host->bit_swap_green = false;
  832. host->bit_swap_blue = false;
  833. return rc;
  834. }
  835. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  836. struct dsi_parser_utils *utils,
  837. const char *name)
  838. {
  839. const char *trig;
  840. int rc = 0;
  841. trig = utils->get_property(utils->data,
  842. "qcom,mdss-dsi-mdp-trigger", NULL);
  843. if (trig) {
  844. if (!strcmp(trig, "none")) {
  845. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  846. } else if (!strcmp(trig, "trigger_te")) {
  847. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  848. } else if (!strcmp(trig, "trigger_sw")) {
  849. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  850. } else if (!strcmp(trig, "trigger_sw_te")) {
  851. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  852. } else {
  853. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  854. name, trig);
  855. rc = -EINVAL;
  856. }
  857. } else {
  858. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  859. name);
  860. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  861. }
  862. trig = utils->get_property(utils->data,
  863. "qcom,mdss-dsi-dma-trigger", NULL);
  864. if (trig) {
  865. if (!strcmp(trig, "none")) {
  866. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  867. } else if (!strcmp(trig, "trigger_te")) {
  868. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  869. } else if (!strcmp(trig, "trigger_sw")) {
  870. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  871. } else if (!strcmp(trig, "trigger_sw_seof")) {
  872. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  873. } else if (!strcmp(trig, "trigger_sw_te")) {
  874. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  875. } else {
  876. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  877. name, trig);
  878. rc = -EINVAL;
  879. }
  880. } else {
  881. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  882. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  883. }
  884. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  885. &host->te_mode);
  886. if (rc) {
  887. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  888. host->te_mode = 1;
  889. rc = 0;
  890. }
  891. return rc;
  892. }
  893. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  894. struct dsi_parser_utils *utils,
  895. const char *name)
  896. {
  897. u32 val = 0, line_no = 0, window = 0;
  898. int rc = 0;
  899. bool panel_cphy_mode = false;
  900. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  901. if (!rc) {
  902. host->t_clk_post = val;
  903. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  904. }
  905. val = 0;
  906. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  907. if (!rc) {
  908. host->t_clk_pre = val;
  909. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  910. }
  911. host->ignore_rx_eot = utils->read_bool(utils->data,
  912. "qcom,mdss-dsi-rx-eot-ignore");
  913. host->append_tx_eot = utils->read_bool(utils->data,
  914. "qcom,mdss-dsi-tx-eot-append");
  915. host->ext_bridge_mode = utils->read_bool(utils->data,
  916. "qcom,mdss-dsi-ext-bridge-mode");
  917. host->force_hs_clk_lane = utils->read_bool(utils->data,
  918. "qcom,mdss-dsi-force-clock-lane-hs");
  919. panel_cphy_mode = utils->read_bool(utils->data,
  920. "qcom,panel-cphy-mode");
  921. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  922. : DSI_PHY_TYPE_DPHY;
  923. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  924. &line_no);
  925. if (rc)
  926. host->dma_sched_line = 0;
  927. else
  928. host->dma_sched_line = line_no;
  929. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  930. &window);
  931. if (rc)
  932. host->dma_sched_window = 0;
  933. else
  934. host->dma_sched_window = window;
  935. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  936. host->dma_sched_line, host->dma_sched_window);
  937. return 0;
  938. }
  939. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  940. struct dsi_parser_utils *utils,
  941. const char *name)
  942. {
  943. int rc = 0;
  944. u32 val = 0;
  945. bool supported = false;
  946. struct dsi_split_link_config *split_link = &host->split_link;
  947. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  948. if (!supported) {
  949. DSI_DEBUG("[%s] Split link is not supported\n", name);
  950. split_link->split_link_enabled = false;
  951. return;
  952. }
  953. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  954. if (rc || val < 1) {
  955. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  956. split_link->num_sublinks = 2;
  957. } else {
  958. split_link->num_sublinks = val;
  959. }
  960. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  961. if (rc || val < 1) {
  962. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  963. split_link->lanes_per_sublink = 2;
  964. } else {
  965. split_link->lanes_per_sublink = val;
  966. }
  967. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  968. split_link->num_sublinks, split_link->lanes_per_sublink);
  969. split_link->split_link_enabled = true;
  970. }
  971. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  972. {
  973. int rc = 0;
  974. struct dsi_parser_utils *utils = &panel->utils;
  975. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  976. panel->name);
  977. if (rc) {
  978. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  979. panel->name, rc);
  980. goto error;
  981. }
  982. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  983. panel->name);
  984. if (rc) {
  985. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  986. panel->name, rc);
  987. goto error;
  988. }
  989. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  990. panel->name);
  991. if (rc) {
  992. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  993. panel->name, rc);
  994. goto error;
  995. }
  996. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  997. panel->name);
  998. if (rc) {
  999. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1000. panel->name, rc);
  1001. goto error;
  1002. }
  1003. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1004. panel->name);
  1005. if (rc) {
  1006. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1007. panel->name, rc);
  1008. goto error;
  1009. }
  1010. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1011. panel->name);
  1012. error:
  1013. return rc;
  1014. }
  1015. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1016. struct device_node *of_node)
  1017. {
  1018. int rc = 0;
  1019. u32 val = 0, i;
  1020. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1021. struct dsi_parser_utils *utils = &panel->utils;
  1022. const char *name = panel->name;
  1023. /**
  1024. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1025. * video mode when there is only one qsync min fps present.
  1026. */
  1027. rc = of_property_read_u32(of_node,
  1028. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1029. &val);
  1030. if (rc)
  1031. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1032. panel->name, rc);
  1033. qsync_caps->qsync_min_fps = val;
  1034. /**
  1035. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1036. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1037. * is defined.
  1038. */
  1039. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1040. "qcom,dsi-supported-qsync-min-fps-list");
  1041. if (qsync_caps->qsync_min_fps_list_len < 1)
  1042. goto qsync_support;
  1043. /**
  1044. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1045. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1046. */
  1047. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1048. qsync_caps->qsync_min_fps) {
  1049. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1050. name);
  1051. rc = -EINVAL;
  1052. goto error;
  1053. }
  1054. if (panel->dfps_caps.dfps_list_len !=
  1055. qsync_caps->qsync_min_fps_list_len) {
  1056. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1057. rc = -EINVAL;
  1058. goto error;
  1059. }
  1060. qsync_caps->qsync_min_fps_list =
  1061. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1062. GFP_KERNEL);
  1063. if (!qsync_caps->qsync_min_fps_list) {
  1064. rc = -ENOMEM;
  1065. goto error;
  1066. }
  1067. rc = utils->read_u32_array(utils->data,
  1068. "qcom,dsi-supported-qsync-min-fps-list",
  1069. qsync_caps->qsync_min_fps_list,
  1070. qsync_caps->qsync_min_fps_list_len);
  1071. if (rc) {
  1072. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1073. rc = -EINVAL;
  1074. goto error;
  1075. }
  1076. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1077. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1078. if (qsync_caps->qsync_min_fps_list[i] <
  1079. qsync_caps->qsync_min_fps)
  1080. qsync_caps->qsync_min_fps =
  1081. qsync_caps->qsync_min_fps_list[i];
  1082. }
  1083. qsync_support:
  1084. /* allow qsync support only if DFPS is with VFP approach */
  1085. if ((panel->dfps_caps.dfps_support) &&
  1086. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1087. panel->qsync_caps.qsync_min_fps = 0;
  1088. error:
  1089. if (rc < 0) {
  1090. qsync_caps->qsync_min_fps = 0;
  1091. qsync_caps->qsync_min_fps_list_len = 0;
  1092. }
  1093. return rc;
  1094. }
  1095. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1096. {
  1097. int rc = 0;
  1098. bool supported = false;
  1099. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1100. struct dsi_parser_utils *utils = &panel->utils;
  1101. const char *name = panel->name;
  1102. const char *type;
  1103. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1104. if (!supported) {
  1105. dyn_clk_caps->dyn_clk_support = false;
  1106. return rc;
  1107. }
  1108. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1109. "qcom,dsi-dyn-clk-list");
  1110. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1111. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1112. return -EINVAL;
  1113. }
  1114. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1115. sizeof(u32), GFP_KERNEL);
  1116. if (!dyn_clk_caps->bit_clk_list)
  1117. return -ENOMEM;
  1118. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1119. dyn_clk_caps->bit_clk_list,
  1120. dyn_clk_caps->bit_clk_list_len);
  1121. if (rc) {
  1122. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1123. return -EINVAL;
  1124. }
  1125. dyn_clk_caps->dyn_clk_support = true;
  1126. type = utils->get_property(utils->data,
  1127. "qcom,dsi-dyn-clk-type", NULL);
  1128. if (!type) {
  1129. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1130. dyn_clk_caps->maintain_const_fps = false;
  1131. return 0;
  1132. }
  1133. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1134. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1135. dyn_clk_caps->maintain_const_fps = true;
  1136. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1137. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1138. dyn_clk_caps->maintain_const_fps = true;
  1139. } else {
  1140. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1141. dyn_clk_caps->maintain_const_fps = false;
  1142. }
  1143. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1144. return 0;
  1145. }
  1146. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1147. {
  1148. int rc = 0;
  1149. bool supported = false;
  1150. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1151. struct dsi_parser_utils *utils = &panel->utils;
  1152. const char *name = panel->name;
  1153. const char *type;
  1154. u32 i;
  1155. supported = utils->read_bool(utils->data,
  1156. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1157. if (!supported) {
  1158. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1159. dfps_caps->dfps_support = false;
  1160. return rc;
  1161. }
  1162. type = utils->get_property(utils->data,
  1163. "qcom,mdss-dsi-pan-fps-update", NULL);
  1164. if (!type) {
  1165. DSI_ERR("[%s] dfps type not defined\n", name);
  1166. rc = -EINVAL;
  1167. goto error;
  1168. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1169. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1170. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1171. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1172. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1173. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1174. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1175. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1176. } else {
  1177. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1178. rc = -EINVAL;
  1179. goto error;
  1180. }
  1181. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1182. "qcom,dsi-supported-dfps-list");
  1183. if (dfps_caps->dfps_list_len < 1) {
  1184. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1185. rc = -EINVAL;
  1186. goto error;
  1187. }
  1188. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1189. GFP_KERNEL);
  1190. if (!dfps_caps->dfps_list) {
  1191. rc = -ENOMEM;
  1192. goto error;
  1193. }
  1194. rc = utils->read_u32_array(utils->data,
  1195. "qcom,dsi-supported-dfps-list",
  1196. dfps_caps->dfps_list,
  1197. dfps_caps->dfps_list_len);
  1198. if (rc) {
  1199. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1200. rc = -EINVAL;
  1201. goto error;
  1202. }
  1203. dfps_caps->dfps_support = true;
  1204. /* calculate max and min fps */
  1205. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1206. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1207. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1208. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1209. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1210. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1211. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1212. }
  1213. error:
  1214. return rc;
  1215. }
  1216. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1217. struct dsi_parser_utils *utils,
  1218. const char *name)
  1219. {
  1220. int rc = 0;
  1221. const char *traffic_mode;
  1222. u32 vc_id = 0;
  1223. u32 val = 0;
  1224. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1225. if (rc) {
  1226. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1227. cfg->pulse_mode_hsa_he = false;
  1228. } else if (val == 1) {
  1229. cfg->pulse_mode_hsa_he = true;
  1230. } else if (val == 0) {
  1231. cfg->pulse_mode_hsa_he = false;
  1232. } else {
  1233. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1234. name);
  1235. rc = -EINVAL;
  1236. goto error;
  1237. }
  1238. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1239. "qcom,mdss-dsi-hfp-power-mode");
  1240. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1241. "qcom,mdss-dsi-hbp-power-mode");
  1242. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1243. "qcom,mdss-dsi-hsa-power-mode");
  1244. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1245. "qcom,mdss-dsi-last-line-interleave");
  1246. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1247. "qcom,mdss-dsi-bllp-eof-power-mode");
  1248. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1249. "qcom,mdss-dsi-bllp-power-mode");
  1250. traffic_mode = utils->get_property(utils->data,
  1251. "qcom,mdss-dsi-traffic-mode",
  1252. NULL);
  1253. if (!traffic_mode) {
  1254. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1255. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1256. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1257. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1258. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1259. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1260. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1261. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1262. } else {
  1263. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1264. traffic_mode);
  1265. rc = -EINVAL;
  1266. goto error;
  1267. }
  1268. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1269. &vc_id);
  1270. if (rc) {
  1271. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1272. cfg->vc_id = 0;
  1273. } else {
  1274. cfg->vc_id = vc_id;
  1275. }
  1276. error:
  1277. return rc;
  1278. }
  1279. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1280. struct dsi_parser_utils *utils,
  1281. const char *name)
  1282. {
  1283. u32 val = 0;
  1284. int rc = 0;
  1285. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1286. if (rc) {
  1287. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1288. cfg->wr_mem_start = 0x2C;
  1289. } else {
  1290. cfg->wr_mem_start = val;
  1291. }
  1292. val = 0;
  1293. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1294. &val);
  1295. if (rc) {
  1296. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1297. cfg->wr_mem_continue = 0x3C;
  1298. } else {
  1299. cfg->wr_mem_continue = val;
  1300. }
  1301. /* TODO: fix following */
  1302. cfg->max_cmd_packets_interleave = 0;
  1303. val = 0;
  1304. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1305. &val);
  1306. if (rc) {
  1307. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1308. cfg->insert_dcs_command = true;
  1309. } else if (val == 1) {
  1310. cfg->insert_dcs_command = true;
  1311. } else if (val == 0) {
  1312. cfg->insert_dcs_command = false;
  1313. } else {
  1314. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1315. name);
  1316. rc = -EINVAL;
  1317. goto error;
  1318. }
  1319. error:
  1320. return rc;
  1321. }
  1322. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1323. {
  1324. int rc = 0;
  1325. struct dsi_parser_utils *utils = &panel->utils;
  1326. bool panel_mode_switch_enabled;
  1327. enum dsi_op_mode panel_mode;
  1328. const char *mode;
  1329. mode = utils->get_property(utils->data,
  1330. "qcom,mdss-dsi-panel-type", NULL);
  1331. if (!mode) {
  1332. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1333. panel_mode = DSI_OP_VIDEO_MODE;
  1334. } else if (!strcmp(mode, "dsi_video_mode")) {
  1335. panel_mode = DSI_OP_VIDEO_MODE;
  1336. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1337. panel_mode = DSI_OP_CMD_MODE;
  1338. } else {
  1339. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1340. rc = -EINVAL;
  1341. goto error;
  1342. }
  1343. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1344. "qcom,mdss-dsi-panel-mode-switch");
  1345. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1346. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1347. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1348. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1349. utils,
  1350. panel->name);
  1351. if (rc) {
  1352. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1353. panel->name, rc);
  1354. goto error;
  1355. }
  1356. }
  1357. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1358. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1359. utils,
  1360. panel->name);
  1361. if (rc) {
  1362. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1363. panel->name, rc);
  1364. goto error;
  1365. }
  1366. }
  1367. panel->poms_align_vsync = utils->read_bool(utils->data,
  1368. "qcom,poms-align-panel-vsync");
  1369. panel->panel_mode = panel_mode;
  1370. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1371. error:
  1372. return rc;
  1373. }
  1374. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1375. {
  1376. int rc = 0;
  1377. u32 val = 0;
  1378. const char *str;
  1379. struct dsi_panel_phy_props *props = &panel->phy_props;
  1380. struct dsi_parser_utils *utils = &panel->utils;
  1381. const char *name = panel->name;
  1382. rc = utils->read_u32(utils->data,
  1383. "qcom,mdss-pan-physical-width-dimension", &val);
  1384. if (rc) {
  1385. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1386. props->panel_width_mm = 0;
  1387. rc = 0;
  1388. } else {
  1389. props->panel_width_mm = val;
  1390. }
  1391. rc = utils->read_u32(utils->data,
  1392. "qcom,mdss-pan-physical-height-dimension",
  1393. &val);
  1394. if (rc) {
  1395. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1396. props->panel_height_mm = 0;
  1397. rc = 0;
  1398. } else {
  1399. props->panel_height_mm = val;
  1400. }
  1401. str = utils->get_property(utils->data,
  1402. "qcom,mdss-dsi-panel-orientation", NULL);
  1403. if (!str) {
  1404. props->rotation = DSI_PANEL_ROTATE_NONE;
  1405. } else if (!strcmp(str, "180")) {
  1406. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1407. } else if (!strcmp(str, "hflip")) {
  1408. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1409. } else if (!strcmp(str, "vflip")) {
  1410. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1411. } else {
  1412. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1413. rc = -EINVAL;
  1414. goto error;
  1415. }
  1416. error:
  1417. return rc;
  1418. }
  1419. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1420. "qcom,mdss-dsi-pre-on-command",
  1421. "qcom,mdss-dsi-on-command",
  1422. "qcom,mdss-dsi-post-panel-on-command",
  1423. "qcom,mdss-dsi-pre-off-command",
  1424. "qcom,mdss-dsi-off-command",
  1425. "qcom,mdss-dsi-post-off-command",
  1426. "qcom,mdss-dsi-pre-res-switch",
  1427. "qcom,mdss-dsi-res-switch",
  1428. "qcom,mdss-dsi-post-res-switch",
  1429. "qcom,cmd-to-video-mode-switch-commands",
  1430. "qcom,cmd-to-video-mode-post-switch-commands",
  1431. "qcom,video-to-cmd-mode-switch-commands",
  1432. "qcom,video-to-cmd-mode-post-switch-commands",
  1433. "qcom,mdss-dsi-panel-status-command",
  1434. "qcom,mdss-dsi-lp1-command",
  1435. "qcom,mdss-dsi-lp2-command",
  1436. "qcom,mdss-dsi-nolp-command",
  1437. "PPS not parsed from DTSI, generated dynamically",
  1438. "ROI not parsed from DTSI, generated dynamically",
  1439. "qcom,mdss-dsi-timing-switch-command",
  1440. "qcom,mdss-dsi-post-mode-switch-on-command",
  1441. "qcom,mdss-dsi-qsync-on-commands",
  1442. "qcom,mdss-dsi-qsync-off-commands",
  1443. };
  1444. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1445. "qcom,mdss-dsi-pre-on-command-state",
  1446. "qcom,mdss-dsi-on-command-state",
  1447. "qcom,mdss-dsi-post-on-command-state",
  1448. "qcom,mdss-dsi-pre-off-command-state",
  1449. "qcom,mdss-dsi-off-command-state",
  1450. "qcom,mdss-dsi-post-off-command-state",
  1451. "qcom,mdss-dsi-pre-res-switch-state",
  1452. "qcom,mdss-dsi-res-switch-state",
  1453. "qcom,mdss-dsi-post-res-switch-state",
  1454. "qcom,cmd-to-video-mode-switch-commands-state",
  1455. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1456. "qcom,video-to-cmd-mode-switch-commands-state",
  1457. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1458. "qcom,mdss-dsi-panel-status-command-state",
  1459. "qcom,mdss-dsi-lp1-command-state",
  1460. "qcom,mdss-dsi-lp2-command-state",
  1461. "qcom,mdss-dsi-nolp-command-state",
  1462. "PPS not parsed from DTSI, generated dynamically",
  1463. "ROI not parsed from DTSI, generated dynamically",
  1464. "qcom,mdss-dsi-timing-switch-command-state",
  1465. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1466. "qcom,mdss-dsi-qsync-on-commands-state",
  1467. "qcom,mdss-dsi-qsync-off-commands-state",
  1468. };
  1469. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1470. {
  1471. const u32 cmd_set_min_size = 7;
  1472. u32 count = 0;
  1473. u32 packet_length;
  1474. u32 tmp;
  1475. while (length >= cmd_set_min_size) {
  1476. packet_length = cmd_set_min_size;
  1477. tmp = ((data[5] << 8) | (data[6]));
  1478. packet_length += tmp;
  1479. if (packet_length > length) {
  1480. DSI_ERR("format error\n");
  1481. return -EINVAL;
  1482. }
  1483. length -= packet_length;
  1484. data += packet_length;
  1485. count++;
  1486. }
  1487. *cnt = count;
  1488. return 0;
  1489. }
  1490. int dsi_panel_create_cmd_packets(const char *data,
  1491. u32 length,
  1492. u32 count,
  1493. struct dsi_cmd_desc *cmd)
  1494. {
  1495. int rc = 0;
  1496. int i, j;
  1497. u8 *payload;
  1498. for (i = 0; i < count; i++) {
  1499. u32 size;
  1500. cmd[i].msg.type = data[0];
  1501. cmd[i].last_command = (data[1] == 1);
  1502. cmd[i].msg.channel = data[2];
  1503. cmd[i].msg.flags |= data[3];
  1504. cmd[i].msg.ctrl = 0;
  1505. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1506. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1507. size = cmd[i].msg.tx_len * sizeof(u8);
  1508. payload = kzalloc(size, GFP_KERNEL);
  1509. if (!payload) {
  1510. rc = -ENOMEM;
  1511. goto error_free_payloads;
  1512. }
  1513. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1514. payload[j] = data[7 + j];
  1515. cmd[i].msg.tx_buf = payload;
  1516. data += (7 + cmd[i].msg.tx_len);
  1517. }
  1518. return rc;
  1519. error_free_payloads:
  1520. for (i = i - 1; i >= 0; i--) {
  1521. cmd--;
  1522. kfree(cmd->msg.tx_buf);
  1523. }
  1524. return rc;
  1525. }
  1526. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1527. {
  1528. u32 i = 0;
  1529. struct dsi_cmd_desc *cmd;
  1530. for (i = 0; i < set->count; i++) {
  1531. cmd = &set->cmds[i];
  1532. kfree(cmd->msg.tx_buf);
  1533. }
  1534. }
  1535. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1536. {
  1537. kfree(set->cmds);
  1538. }
  1539. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1540. u32 packet_count)
  1541. {
  1542. u32 size;
  1543. size = packet_count * sizeof(*cmd->cmds);
  1544. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1545. if (!cmd->cmds)
  1546. return -ENOMEM;
  1547. cmd->count = packet_count;
  1548. return 0;
  1549. }
  1550. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1551. enum dsi_cmd_set_type type,
  1552. struct dsi_parser_utils *utils)
  1553. {
  1554. int rc = 0;
  1555. u32 length = 0;
  1556. const char *data;
  1557. const char *state;
  1558. u32 packet_count = 0;
  1559. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1560. &length);
  1561. if (!data) {
  1562. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1563. rc = -ENOTSUPP;
  1564. goto error;
  1565. }
  1566. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1567. cmd_set_prop_map[type], length);
  1568. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1569. 8, 1, data, length, false);
  1570. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1571. if (rc) {
  1572. DSI_ERR("commands failed, rc=%d\n", rc);
  1573. goto error;
  1574. }
  1575. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1576. packet_count, length);
  1577. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1578. if (rc) {
  1579. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1580. goto error;
  1581. }
  1582. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1583. cmd->cmds);
  1584. if (rc) {
  1585. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1586. goto error_free_mem;
  1587. }
  1588. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1589. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1590. cmd->state = DSI_CMD_SET_STATE_LP;
  1591. } else if (!strcmp(state, "dsi_hs_mode")) {
  1592. cmd->state = DSI_CMD_SET_STATE_HS;
  1593. } else {
  1594. DSI_ERR("[%s] command state unrecognized-%s\n",
  1595. cmd_set_state_map[type], state);
  1596. goto error_free_mem;
  1597. }
  1598. return rc;
  1599. error_free_mem:
  1600. kfree(cmd->cmds);
  1601. cmd->cmds = NULL;
  1602. error:
  1603. return rc;
  1604. }
  1605. static int dsi_panel_parse_cmd_sets(
  1606. struct dsi_display_mode_priv_info *priv_info,
  1607. struct dsi_parser_utils *utils)
  1608. {
  1609. int rc = 0;
  1610. struct dsi_panel_cmd_set *set;
  1611. u32 i;
  1612. if (!priv_info) {
  1613. DSI_ERR("invalid mode priv info\n");
  1614. return -EINVAL;
  1615. }
  1616. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1617. set = &priv_info->cmd_sets[i];
  1618. set->type = i;
  1619. set->count = 0;
  1620. if (i == DSI_CMD_SET_PPS) {
  1621. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1622. if (rc)
  1623. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1624. i, rc);
  1625. set->state = DSI_CMD_SET_STATE_LP;
  1626. } else {
  1627. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1628. if (rc)
  1629. DSI_DEBUG("failed to parse set %d\n", i);
  1630. }
  1631. }
  1632. rc = 0;
  1633. return rc;
  1634. }
  1635. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1636. {
  1637. int rc = 0;
  1638. int i;
  1639. u32 length = 0;
  1640. u32 count = 0;
  1641. u32 size = 0;
  1642. u32 *arr_32 = NULL;
  1643. const u32 *arr;
  1644. struct dsi_parser_utils *utils = &panel->utils;
  1645. struct dsi_reset_seq *seq;
  1646. if (panel->host_config.ext_bridge_mode)
  1647. return 0;
  1648. arr = utils->get_property(utils->data,
  1649. "qcom,mdss-dsi-reset-sequence", &length);
  1650. if (!arr) {
  1651. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1652. rc = -EINVAL;
  1653. goto error;
  1654. }
  1655. if (length & 0x1) {
  1656. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1657. panel->name);
  1658. rc = -EINVAL;
  1659. goto error;
  1660. }
  1661. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1662. length = length / sizeof(u32);
  1663. size = length * sizeof(u32);
  1664. arr_32 = kzalloc(size, GFP_KERNEL);
  1665. if (!arr_32) {
  1666. rc = -ENOMEM;
  1667. goto error;
  1668. }
  1669. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1670. arr_32, length);
  1671. if (rc) {
  1672. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1673. goto error_free_arr_32;
  1674. }
  1675. count = length / 2;
  1676. size = count * sizeof(*seq);
  1677. seq = kzalloc(size, GFP_KERNEL);
  1678. if (!seq) {
  1679. rc = -ENOMEM;
  1680. goto error_free_arr_32;
  1681. }
  1682. panel->reset_config.sequence = seq;
  1683. panel->reset_config.count = count;
  1684. for (i = 0; i < length; i += 2) {
  1685. seq->level = arr_32[i];
  1686. seq->sleep_ms = arr_32[i + 1];
  1687. seq++;
  1688. }
  1689. error_free_arr_32:
  1690. kfree(arr_32);
  1691. error:
  1692. return rc;
  1693. }
  1694. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1695. {
  1696. struct dsi_parser_utils *utils = &panel->utils;
  1697. const char *string;
  1698. int i, rc = 0;
  1699. panel->ulps_feature_enabled =
  1700. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1701. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1702. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1703. panel->ulps_suspend_enabled =
  1704. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1705. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1706. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1707. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1708. "qcom,mdss-dsi-te-using-wd");
  1709. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1710. "qcom,cmd-sync-wait-broadcast");
  1711. panel->lp11_init = utils->read_bool(utils->data,
  1712. "qcom,mdss-dsi-lp11-init");
  1713. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1714. "qcom,platform-reset-gpio-always-on");
  1715. panel->spr_info.enable = false;
  1716. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1717. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1718. if (!rc) {
  1719. // find match for pack-type string
  1720. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1721. if (msm_spr_pack_type_str[i] &&
  1722. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1723. panel->spr_info.enable = true;
  1724. panel->spr_info.pack_type = i;
  1725. break;
  1726. }
  1727. }
  1728. }
  1729. pr_debug("%s source side spr packing, pack-type %s\n",
  1730. panel->spr_info.enable ? "enable" : "disable",
  1731. panel->spr_info.enable ?
  1732. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1733. return 0;
  1734. }
  1735. static int dsi_panel_parse_jitter_config(
  1736. struct dsi_display_mode *mode,
  1737. struct dsi_parser_utils *utils)
  1738. {
  1739. int rc;
  1740. struct dsi_display_mode_priv_info *priv_info;
  1741. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1742. u64 jitter_val = 0;
  1743. priv_info = mode->priv_info;
  1744. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1745. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1746. if (rc) {
  1747. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1748. } else {
  1749. jitter_val = jitter[0];
  1750. jitter_val = div_u64(jitter_val, jitter[1]);
  1751. }
  1752. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1753. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1754. priv_info->panel_jitter_denom =
  1755. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1756. } else {
  1757. priv_info->panel_jitter_numer = jitter[0];
  1758. priv_info->panel_jitter_denom = jitter[1];
  1759. }
  1760. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1761. &priv_info->panel_prefill_lines);
  1762. if (rc) {
  1763. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1764. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1765. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1766. } else if (priv_info->panel_prefill_lines >=
  1767. DSI_V_TOTAL(&mode->timing)) {
  1768. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1769. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1770. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1771. }
  1772. return 0;
  1773. }
  1774. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1775. {
  1776. int rc = 0;
  1777. char *supply_name;
  1778. if (panel->host_config.ext_bridge_mode)
  1779. return 0;
  1780. if (!strcmp(panel->type, "primary"))
  1781. supply_name = "qcom,panel-supply-entries";
  1782. else
  1783. supply_name = "qcom,panel-sec-supply-entries";
  1784. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1785. &panel->power_info, supply_name);
  1786. if (rc) {
  1787. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1788. goto error;
  1789. }
  1790. error:
  1791. return rc;
  1792. }
  1793. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1794. struct msm_io_res *io_res)
  1795. {
  1796. struct list_head temp_head;
  1797. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1798. struct list_head *mem_list = &io_res->mem;
  1799. int i, rc = 0, address_count, pin_count;
  1800. u32 *pins = NULL, *address = NULL;
  1801. u32 base, size;
  1802. struct dsi_parser_utils *utils = &panel->utils;
  1803. INIT_LIST_HEAD(&temp_head);
  1804. address_count = utils->count_u32_elems(utils->data,
  1805. "qcom,dsi-panel-gpio-address");
  1806. if (address_count != 2) {
  1807. DSI_DEBUG("panel gpio address not defined\n");
  1808. return 0;
  1809. }
  1810. address = kzalloc(sizeof(u32) * address_count, GFP_KERNEL);
  1811. if (!address)
  1812. return -ENOMEM;
  1813. rc = utils->read_u32_array(utils->data, "qcom,dsi-panel-gpio-address",
  1814. address, address_count);
  1815. if (rc) {
  1816. DSI_ERR("panel gpio address not defined correctly\n");
  1817. goto end;
  1818. }
  1819. base = address[0];
  1820. size = address[1];
  1821. pin_count = utils->count_u32_elems(utils->data,
  1822. "qcom,dsi-panel-gpio-pins");
  1823. if (pin_count < 0) {
  1824. DSI_ERR("panel gpio pins not defined\n");
  1825. rc = pin_count;
  1826. goto end;
  1827. }
  1828. pins = kzalloc(sizeof(u32) * pin_count, GFP_KERNEL);
  1829. if (!pins) {
  1830. rc = -ENOMEM;
  1831. goto end;
  1832. }
  1833. rc = utils->read_u32_array(utils->data, "qcom,dsi-panel-gpio-pins",
  1834. pins, pin_count);
  1835. if (rc) {
  1836. DSI_ERR("panel gpio pins not defined correctly\n");
  1837. goto end;
  1838. }
  1839. for (i = 0; i < pin_count; i++) {
  1840. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1841. if (!io_mem) {
  1842. rc = -ENOMEM;
  1843. goto parse_fail;
  1844. }
  1845. io_mem->base = base + (pins[i] * size);
  1846. io_mem->size = size;
  1847. list_add(&io_mem->list, &temp_head);
  1848. }
  1849. list_splice(&temp_head, mem_list);
  1850. goto end;
  1851. parse_fail:
  1852. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1853. list_del(&pos->list);
  1854. kzfree(pos);
  1855. }
  1856. end:
  1857. kzfree(pins);
  1858. kzfree(address);
  1859. return rc;
  1860. }
  1861. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1862. {
  1863. int rc = 0;
  1864. const char *data;
  1865. struct dsi_parser_utils *utils = &panel->utils;
  1866. char *reset_gpio_name, *mode_set_gpio_name;
  1867. if (!strcmp(panel->type, "primary")) {
  1868. reset_gpio_name = "qcom,platform-reset-gpio";
  1869. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1870. } else {
  1871. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1872. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1873. }
  1874. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1875. reset_gpio_name, 0);
  1876. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1877. !panel->host_config.ext_bridge_mode) {
  1878. rc = panel->reset_config.reset_gpio;
  1879. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1880. goto error;
  1881. }
  1882. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1883. "qcom,5v-boost-gpio",
  1884. 0);
  1885. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1886. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1887. panel->name, rc);
  1888. panel->reset_config.disp_en_gpio =
  1889. utils->get_named_gpio(utils->data,
  1890. "qcom,platform-en-gpio", 0);
  1891. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1892. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1893. panel->name, rc);
  1894. }
  1895. }
  1896. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1897. utils->data, mode_set_gpio_name, 0);
  1898. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1899. DSI_DEBUG("mode gpio not specified\n");
  1900. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1901. data = utils->get_property(utils->data,
  1902. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1903. if (data) {
  1904. if (!strcmp(data, "single_port"))
  1905. panel->reset_config.mode_sel_state =
  1906. MODE_SEL_SINGLE_PORT;
  1907. else if (!strcmp(data, "dual_port"))
  1908. panel->reset_config.mode_sel_state =
  1909. MODE_SEL_DUAL_PORT;
  1910. else if (!strcmp(data, "high"))
  1911. panel->reset_config.mode_sel_state =
  1912. MODE_GPIO_HIGH;
  1913. else if (!strcmp(data, "low"))
  1914. panel->reset_config.mode_sel_state =
  1915. MODE_GPIO_LOW;
  1916. } else {
  1917. /* Set default mode as SPLIT mode */
  1918. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1919. }
  1920. /* TODO: release memory */
  1921. rc = dsi_panel_parse_reset_sequence(panel);
  1922. if (rc) {
  1923. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1924. panel->name, rc);
  1925. goto error;
  1926. }
  1927. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1928. "qcom,mdss-dsi-panel-test-pin",
  1929. 0);
  1930. if (!gpio_is_valid(panel->panel_test_gpio))
  1931. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1932. __LINE__);
  1933. error:
  1934. return rc;
  1935. }
  1936. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1937. {
  1938. int rc = 0;
  1939. u32 val;
  1940. struct dsi_backlight_config *config = &panel->bl_config;
  1941. struct dsi_parser_utils *utils = &panel->utils;
  1942. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1943. &val);
  1944. if (rc) {
  1945. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1946. goto error;
  1947. }
  1948. config->pwm_period_usecs = val;
  1949. error:
  1950. return rc;
  1951. }
  1952. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1953. {
  1954. int rc = 0;
  1955. u32 val = 0;
  1956. const char *bl_type = NULL;
  1957. const char *data = NULL;
  1958. const char *state = NULL;
  1959. struct dsi_parser_utils *utils = &panel->utils;
  1960. char *bl_name = NULL;
  1961. if (!strcmp(panel->type, "primary"))
  1962. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1963. else
  1964. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1965. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1966. if (!bl_type) {
  1967. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1968. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1969. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1970. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1971. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1972. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1973. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1974. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1975. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1976. } else {
  1977. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1978. panel->name, bl_type);
  1979. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1980. }
  1981. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1982. if (!data) {
  1983. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1984. } else if (!strcmp(data, "delay_until_first_frame")) {
  1985. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1986. } else {
  1987. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1988. panel->name, data);
  1989. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1990. }
  1991. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1992. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1993. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1994. if (rc) {
  1995. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1996. panel->name);
  1997. panel->bl_config.bl_min_level = 0;
  1998. } else {
  1999. panel->bl_config.bl_min_level = val;
  2000. }
  2001. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2002. if (rc) {
  2003. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2004. panel->name);
  2005. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2006. } else {
  2007. panel->bl_config.bl_max_level = val;
  2008. }
  2009. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2010. &val);
  2011. if (rc) {
  2012. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2013. panel->name);
  2014. panel->bl_config.brightness_max_level = 255;
  2015. rc = 0;
  2016. } else {
  2017. panel->bl_config.brightness_max_level = val;
  2018. }
  2019. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2020. "qcom,mdss-dsi-bl-inverted-dbv");
  2021. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2022. if (!state || !strcmp(state, "dsi_hs_mode"))
  2023. panel->bl_config.lp_mode = false;
  2024. else if (!strcmp(state, "dsi_lp_mode"))
  2025. panel->bl_config.lp_mode = true;
  2026. else
  2027. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2028. state);
  2029. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2030. rc = dsi_panel_parse_bl_pwm_config(panel);
  2031. if (rc) {
  2032. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2033. panel->name, rc);
  2034. goto error;
  2035. }
  2036. }
  2037. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2038. "qcom,platform-bklight-en-gpio",
  2039. 0);
  2040. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2041. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2042. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2043. panel->name, rc);
  2044. rc = -EPROBE_DEFER;
  2045. goto error;
  2046. } else {
  2047. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2048. panel->name, rc);
  2049. rc = 0;
  2050. goto error;
  2051. }
  2052. }
  2053. error:
  2054. return rc;
  2055. }
  2056. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2057. struct dsi_parser_utils *utils)
  2058. {
  2059. const char *data;
  2060. u32 len, i;
  2061. int rc = 0;
  2062. struct dsi_display_mode_priv_info *priv_info;
  2063. u64 pixel_clk_khz;
  2064. if (!mode || !mode->priv_info)
  2065. return -EINVAL;
  2066. priv_info = mode->priv_info;
  2067. data = utils->get_property(utils->data,
  2068. "qcom,mdss-dsi-panel-phy-timings", &len);
  2069. if (!data) {
  2070. DSI_DEBUG("Unable to read Phy timing settings\n");
  2071. } else {
  2072. priv_info->phy_timing_val =
  2073. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2074. if (!priv_info->phy_timing_val)
  2075. return -EINVAL;
  2076. for (i = 0; i < len; i++)
  2077. priv_info->phy_timing_val[i] = data[i];
  2078. priv_info->phy_timing_len = len;
  2079. }
  2080. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2081. /*
  2082. * For command mode we update the pclk as part of
  2083. * function dsi_panel_calc_dsi_transfer_time( )
  2084. * as we set it based on dsi clock or mdp transfer time.
  2085. */
  2086. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2087. DSI_V_TOTAL(&mode->timing) *
  2088. mode->timing.refresh_rate);
  2089. do_div(pixel_clk_khz, 1000);
  2090. mode->pixel_clk_khz = pixel_clk_khz;
  2091. }
  2092. return rc;
  2093. }
  2094. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2095. struct dsi_parser_utils *utils)
  2096. {
  2097. u32 data;
  2098. int rc = -EINVAL;
  2099. int intf_width;
  2100. const char *compression;
  2101. struct dsi_display_mode_priv_info *priv_info;
  2102. if (!mode || !mode->priv_info)
  2103. return -EINVAL;
  2104. priv_info = mode->priv_info;
  2105. priv_info->dsc_enabled = false;
  2106. compression = utils->get_property(utils->data,
  2107. "qcom,compression-mode", NULL);
  2108. if (compression && !strcmp(compression, "dsc"))
  2109. priv_info->dsc_enabled = true;
  2110. if (!priv_info->dsc_enabled) {
  2111. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2112. return 0;
  2113. }
  2114. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2115. if (rc) {
  2116. priv_info->dsc.config.dsc_version_major = 0x1;
  2117. priv_info->dsc.config.dsc_version_minor = 0x1;
  2118. rc = 0;
  2119. } else {
  2120. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2121. * major version information
  2122. */
  2123. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2124. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2125. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  2126. ((priv_info->dsc.config.dsc_version_minor
  2127. != 0x1) ||
  2128. (priv_info->dsc.config.dsc_version_minor
  2129. != 0x2))) {
  2130. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2131. __func__,
  2132. priv_info->dsc.config.dsc_version_major,
  2133. priv_info->dsc.config.dsc_version_minor
  2134. );
  2135. rc = -EINVAL;
  2136. goto error;
  2137. }
  2138. }
  2139. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2140. if (rc) {
  2141. priv_info->dsc.scr_rev = 0x0;
  2142. rc = 0;
  2143. } else {
  2144. priv_info->dsc.scr_rev = data & 0xff;
  2145. /* only one scr rev supported */
  2146. if (priv_info->dsc.scr_rev > 0x1) {
  2147. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2148. __func__, priv_info->dsc.scr_rev);
  2149. rc = -EINVAL;
  2150. goto error;
  2151. }
  2152. }
  2153. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2154. if (rc) {
  2155. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2156. goto error;
  2157. }
  2158. priv_info->dsc.config.slice_height = data;
  2159. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2160. if (rc) {
  2161. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2162. goto error;
  2163. }
  2164. priv_info->dsc.config.slice_width = data;
  2165. intf_width = mode->timing.h_active;
  2166. if (intf_width % priv_info->dsc.config.slice_width) {
  2167. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2168. intf_width, priv_info->dsc.config.slice_width);
  2169. rc = -EINVAL;
  2170. goto error;
  2171. }
  2172. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2173. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2174. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2175. if (rc) {
  2176. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2177. goto error;
  2178. } else if (!data || (data > 2)) {
  2179. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2180. goto error;
  2181. }
  2182. priv_info->dsc.slice_per_pkt = data;
  2183. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2184. &data);
  2185. if (rc) {
  2186. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2187. goto error;
  2188. }
  2189. priv_info->dsc.config.bits_per_component = data;
  2190. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2191. if (rc) {
  2192. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2193. data = 0;
  2194. }
  2195. priv_info->dsc.pps_delay_ms = data;
  2196. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2197. &data);
  2198. if (rc) {
  2199. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2200. goto error;
  2201. }
  2202. priv_info->dsc.config.bits_per_pixel = data << 4;
  2203. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2204. &data);
  2205. if (rc) {
  2206. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2207. rc = 0;
  2208. data = MSM_CHROMA_444;
  2209. }
  2210. priv_info->dsc.chroma_format = data;
  2211. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2212. &data);
  2213. if (rc) {
  2214. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2215. rc = 0;
  2216. data = MSM_RGB;
  2217. }
  2218. priv_info->dsc.source_color_space = data;
  2219. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2220. "qcom,mdss-dsc-block-prediction-enable");
  2221. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2222. priv_info->dsc.config.slice_width);
  2223. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2224. priv_info->dsc.scr_rev);
  2225. if (rc) {
  2226. DSI_DEBUG("failed populating dsc params\n");
  2227. rc = -EINVAL;
  2228. goto error;
  2229. }
  2230. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2231. if (rc) {
  2232. DSI_DEBUG("failed populating other dsc params\n");
  2233. rc = -EINVAL;
  2234. goto error;
  2235. }
  2236. priv_info->pclk_scale.numer =
  2237. priv_info->dsc.config.bits_per_pixel >> 4;
  2238. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2239. priv_info->dsc.chroma_format,
  2240. priv_info->dsc.config.bits_per_component);
  2241. mode->timing.dsc_enabled = true;
  2242. mode->timing.dsc = &priv_info->dsc;
  2243. mode->timing.pclk_scale = priv_info->pclk_scale;
  2244. error:
  2245. return rc;
  2246. }
  2247. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2248. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2249. {
  2250. u32 data;
  2251. int rc = -EINVAL;
  2252. const char *compression;
  2253. struct dsi_display_mode_priv_info *priv_info;
  2254. int intf_width;
  2255. if (!mode || !mode->priv_info)
  2256. return -EINVAL;
  2257. priv_info = mode->priv_info;
  2258. priv_info->vdc_enabled = false;
  2259. compression = utils->get_property(utils->data,
  2260. "qcom,compression-mode", NULL);
  2261. if (compression && !strcmp(compression, "vdc"))
  2262. priv_info->vdc_enabled = true;
  2263. if (!priv_info->vdc_enabled) {
  2264. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2265. return 0;
  2266. }
  2267. priv_info->vdc.panel_mode = panel_mode;
  2268. priv_info->vdc.traffic_mode = traffic_mode;
  2269. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2270. if (rc) {
  2271. priv_info->vdc.version_major = 0x1;
  2272. priv_info->vdc.version_minor = 0x2;
  2273. priv_info->vdc.version_release = 0x0;
  2274. rc = 0;
  2275. } else {
  2276. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2277. * major version information
  2278. */
  2279. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2280. priv_info->vdc.version_minor = data & 0x0F;
  2281. if ((priv_info->vdc.version_major != 0x1) &&
  2282. ((priv_info->vdc.version_minor
  2283. != 0x2))) {
  2284. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2285. __func__,
  2286. priv_info->vdc.version_major,
  2287. priv_info->vdc.version_minor
  2288. );
  2289. rc = -EINVAL;
  2290. goto error;
  2291. }
  2292. }
  2293. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2294. if (rc) {
  2295. priv_info->vdc.version_release = 0x0;
  2296. rc = 0;
  2297. } else {
  2298. priv_info->vdc.version_release = data & 0xff;
  2299. /* only one release version is supported */
  2300. if (priv_info->vdc.version_release != 0x0) {
  2301. DSI_ERR("unsupported vdc release version %d\n",
  2302. priv_info->vdc.version_release);
  2303. rc = -EINVAL;
  2304. goto error;
  2305. }
  2306. }
  2307. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2308. priv_info->vdc.version_major,
  2309. priv_info->vdc.version_minor,
  2310. priv_info->vdc.version_release);
  2311. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2312. if (rc) {
  2313. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2314. goto error;
  2315. }
  2316. priv_info->vdc.slice_height = data;
  2317. /* slice height should be atleast 16 lines */
  2318. if (priv_info->vdc.slice_height < 16) {
  2319. DSI_ERR("invalid slice height %d\n",
  2320. priv_info->vdc.slice_height);
  2321. rc = -EINVAL;
  2322. goto error;
  2323. }
  2324. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2325. if (rc) {
  2326. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2327. goto error;
  2328. }
  2329. priv_info->vdc.slice_width = data;
  2330. /*
  2331. * slide-width should be multiple of 8
  2332. * slice-width should be atlease 64 pixels
  2333. */
  2334. if ((priv_info->vdc.slice_width & 7) ||
  2335. (priv_info->vdc.slice_width < 64)) {
  2336. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2337. rc = -EINVAL;
  2338. goto error;
  2339. }
  2340. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2341. if (rc) {
  2342. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2343. goto error;
  2344. } else if (!data || (data > 2)) {
  2345. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2346. rc = -EINVAL;
  2347. goto error;
  2348. }
  2349. intf_width = mode->timing.h_active;
  2350. priv_info->vdc.slice_per_pkt = data;
  2351. priv_info->vdc.frame_width = mode->timing.h_active;
  2352. priv_info->vdc.frame_height = mode->timing.v_active;
  2353. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2354. &data);
  2355. if (rc) {
  2356. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2357. goto error;
  2358. }
  2359. priv_info->vdc.bits_per_component = data;
  2360. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2361. if (rc) {
  2362. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2363. data = 0;
  2364. }
  2365. priv_info->vdc.pps_delay_ms = data;
  2366. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2367. &data);
  2368. if (rc) {
  2369. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2370. goto error;
  2371. }
  2372. priv_info->vdc.bits_per_pixel = data << 4;
  2373. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2374. &data);
  2375. if (rc) {
  2376. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2377. rc = 0;
  2378. data = MSM_CHROMA_444;
  2379. }
  2380. priv_info->vdc.chroma_format = data;
  2381. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2382. &data);
  2383. if (rc) {
  2384. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2385. rc = 0;
  2386. data = MSM_RGB;
  2387. }
  2388. priv_info->vdc.source_color_space = data;
  2389. rc = sde_vdc_populate_config(&priv_info->vdc,
  2390. intf_width, traffic_mode);
  2391. if (rc) {
  2392. DSI_DEBUG("failed populating vdc config\n");
  2393. rc = -EINVAL;
  2394. goto error;
  2395. }
  2396. priv_info->pclk_scale.numer =
  2397. priv_info->vdc.bits_per_pixel >> 4;
  2398. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2399. priv_info->vdc.chroma_format,
  2400. priv_info->vdc.bits_per_component);
  2401. mode->timing.vdc_enabled = true;
  2402. mode->timing.vdc = &priv_info->vdc;
  2403. mode->timing.pclk_scale = priv_info->pclk_scale;
  2404. error:
  2405. return rc;
  2406. }
  2407. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2408. {
  2409. int rc = 0;
  2410. struct drm_panel_hdr_properties *hdr_prop;
  2411. struct dsi_parser_utils *utils = &panel->utils;
  2412. hdr_prop = &panel->hdr_props;
  2413. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2414. "qcom,mdss-dsi-panel-hdr-enabled");
  2415. if (hdr_prop->hdr_enabled) {
  2416. rc = utils->read_u32_array(utils->data,
  2417. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2418. hdr_prop->display_primaries,
  2419. DISPLAY_PRIMARIES_MAX);
  2420. if (rc) {
  2421. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2422. __func__, __LINE__, rc);
  2423. hdr_prop->hdr_enabled = false;
  2424. return rc;
  2425. }
  2426. rc = utils->read_u32(utils->data,
  2427. "qcom,mdss-dsi-panel-peak-brightness",
  2428. &(hdr_prop->peak_brightness));
  2429. if (rc) {
  2430. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2431. __func__, __LINE__, rc);
  2432. hdr_prop->hdr_enabled = false;
  2433. return rc;
  2434. }
  2435. rc = utils->read_u32(utils->data,
  2436. "qcom,mdss-dsi-panel-blackness-level",
  2437. &(hdr_prop->blackness_level));
  2438. if (rc) {
  2439. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2440. __func__, __LINE__, rc);
  2441. hdr_prop->hdr_enabled = false;
  2442. return rc;
  2443. }
  2444. }
  2445. return 0;
  2446. }
  2447. static int dsi_panel_parse_topology(
  2448. struct dsi_display_mode_priv_info *priv_info,
  2449. struct dsi_parser_utils *utils,
  2450. int topology_override)
  2451. {
  2452. struct msm_display_topology *topology;
  2453. u32 top_count, top_sel, *array = NULL;
  2454. int i, len = 0;
  2455. int rc = -EINVAL;
  2456. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2457. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2458. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2459. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2460. return rc;
  2461. }
  2462. top_count = len / TOPOLOGY_SET_LEN;
  2463. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2464. if (!array)
  2465. return -ENOMEM;
  2466. rc = utils->read_u32_array(utils->data,
  2467. "qcom,display-topology", array, len);
  2468. if (rc) {
  2469. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2470. goto read_fail;
  2471. }
  2472. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2473. if (!topology) {
  2474. rc = -ENOMEM;
  2475. goto read_fail;
  2476. }
  2477. for (i = 0; i < top_count; i++) {
  2478. struct msm_display_topology *top = &topology[i];
  2479. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2480. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2481. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2482. }
  2483. if (topology_override >= 0 && topology_override < top_count) {
  2484. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2485. topology_override,
  2486. topology[topology_override].num_lm,
  2487. topology[topology_override].num_enc,
  2488. topology[topology_override].num_intf);
  2489. top_sel = topology_override;
  2490. goto parse_done;
  2491. }
  2492. rc = utils->read_u32(utils->data,
  2493. "qcom,default-topology-index", &top_sel);
  2494. if (rc) {
  2495. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2496. goto parse_fail;
  2497. }
  2498. if (top_sel >= top_count) {
  2499. rc = -EINVAL;
  2500. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2501. rc);
  2502. goto parse_fail;
  2503. }
  2504. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2505. topology[top_sel].num_lm,
  2506. topology[top_sel].num_enc,
  2507. topology[top_sel].num_intf);
  2508. parse_done:
  2509. memcpy(&priv_info->topology, &topology[top_sel],
  2510. sizeof(struct msm_display_topology));
  2511. parse_fail:
  2512. kfree(topology);
  2513. read_fail:
  2514. kfree(array);
  2515. return rc;
  2516. }
  2517. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2518. struct msm_roi_alignment *align)
  2519. {
  2520. int len = 0, rc = 0;
  2521. u32 value[6];
  2522. struct property *data;
  2523. if (!align)
  2524. return -EINVAL;
  2525. memset(align, 0, sizeof(*align));
  2526. data = utils->find_property(utils->data,
  2527. "qcom,panel-roi-alignment", &len);
  2528. len /= sizeof(u32);
  2529. if (!data) {
  2530. DSI_ERR("panel roi alignment not found\n");
  2531. rc = -EINVAL;
  2532. } else if (len != 6) {
  2533. DSI_ERR("incorrect roi alignment len %d\n", len);
  2534. rc = -EINVAL;
  2535. } else {
  2536. rc = utils->read_u32_array(utils->data,
  2537. "qcom,panel-roi-alignment", value, len);
  2538. if (rc)
  2539. DSI_DEBUG("error reading panel roi alignment values\n");
  2540. else {
  2541. align->xstart_pix_align = value[0];
  2542. align->ystart_pix_align = value[1];
  2543. align->width_pix_align = value[2];
  2544. align->height_pix_align = value[3];
  2545. align->min_width = value[4];
  2546. align->min_height = value[5];
  2547. }
  2548. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2549. align->xstart_pix_align,
  2550. align->width_pix_align,
  2551. align->ystart_pix_align,
  2552. align->height_pix_align,
  2553. align->min_width,
  2554. align->min_height);
  2555. }
  2556. return rc;
  2557. }
  2558. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2559. struct dsi_parser_utils *utils)
  2560. {
  2561. struct msm_roi_caps *roi_caps = NULL;
  2562. const char *data;
  2563. int rc = 0;
  2564. if (!mode || !mode->priv_info) {
  2565. DSI_ERR("invalid arguments\n");
  2566. return -EINVAL;
  2567. }
  2568. roi_caps = &mode->priv_info->roi_caps;
  2569. memset(roi_caps, 0, sizeof(*roi_caps));
  2570. data = utils->get_property(utils->data,
  2571. "qcom,partial-update-enabled", NULL);
  2572. if (data) {
  2573. if (!strcmp(data, "dual_roi"))
  2574. roi_caps->num_roi = 2;
  2575. else if (!strcmp(data, "single_roi"))
  2576. roi_caps->num_roi = 1;
  2577. else {
  2578. DSI_INFO(
  2579. "invalid value for qcom,partial-update-enabled: %s\n",
  2580. data);
  2581. return 0;
  2582. }
  2583. } else {
  2584. DSI_DEBUG("partial update disabled as the property is not set\n");
  2585. return 0;
  2586. }
  2587. roi_caps->merge_rois = utils->read_bool(utils->data,
  2588. "qcom,partial-update-roi-merge");
  2589. roi_caps->enabled = roi_caps->num_roi > 0;
  2590. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2591. roi_caps->enabled);
  2592. if (roi_caps->enabled)
  2593. rc = dsi_panel_parse_roi_alignment(utils,
  2594. &roi_caps->align);
  2595. if (rc)
  2596. memset(roi_caps, 0, sizeof(*roi_caps));
  2597. return rc;
  2598. }
  2599. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2600. struct dsi_parser_utils *utils)
  2601. {
  2602. bool vid_mode_support, cmd_mode_support;
  2603. if (!mode || !mode->priv_info) {
  2604. DSI_ERR("invalid arguments\n");
  2605. return -EINVAL;
  2606. }
  2607. vid_mode_support = utils->read_bool(utils->data,
  2608. "qcom,mdss-dsi-video-mode");
  2609. cmd_mode_support = utils->read_bool(utils->data,
  2610. "qcom,mdss-dsi-cmd-mode");
  2611. if (cmd_mode_support)
  2612. mode->panel_mode = DSI_OP_CMD_MODE;
  2613. else if (vid_mode_support)
  2614. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2615. else
  2616. return -EINVAL;
  2617. return 0;
  2618. };
  2619. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2620. {
  2621. int dms_enabled;
  2622. const char *data;
  2623. struct dsi_parser_utils *utils = &panel->utils;
  2624. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2625. dms_enabled = utils->read_bool(utils->data,
  2626. "qcom,dynamic-mode-switch-enabled");
  2627. if (!dms_enabled)
  2628. return 0;
  2629. data = utils->get_property(utils->data,
  2630. "qcom,dynamic-mode-switch-type", NULL);
  2631. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2632. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2633. } else {
  2634. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2635. panel->name, data);
  2636. return -EINVAL;
  2637. }
  2638. return 0;
  2639. };
  2640. /*
  2641. * The length of all the valid values to be checked should not be greater
  2642. * than the length of returned data from read command.
  2643. */
  2644. static bool
  2645. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2646. {
  2647. int i;
  2648. struct drm_panel_esd_config *config = &panel->esd_config;
  2649. for (i = 0; i < count; ++i) {
  2650. if (config->status_valid_params[i] >
  2651. config->status_cmds_rlen[i]) {
  2652. DSI_DEBUG("ignore valid params\n");
  2653. return false;
  2654. }
  2655. }
  2656. return true;
  2657. }
  2658. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2659. char *prop_key, u32 **target, u32 cmd_cnt)
  2660. {
  2661. int tmp;
  2662. if (!utils->find_property(utils->data, prop_key, &tmp))
  2663. return false;
  2664. tmp /= sizeof(u32);
  2665. if (tmp != cmd_cnt) {
  2666. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2667. tmp, cmd_cnt);
  2668. return false;
  2669. }
  2670. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2671. if (IS_ERR_OR_NULL(*target)) {
  2672. DSI_ERR("Error allocating memory for property\n");
  2673. return false;
  2674. }
  2675. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2676. DSI_ERR("cannot get values from dts\n");
  2677. kfree(*target);
  2678. *target = NULL;
  2679. return false;
  2680. }
  2681. return true;
  2682. }
  2683. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2684. {
  2685. kfree(esd_config->status_buf);
  2686. kfree(esd_config->return_buf);
  2687. kfree(esd_config->status_value);
  2688. kfree(esd_config->status_valid_params);
  2689. kfree(esd_config->status_cmds_rlen);
  2690. kfree(esd_config->status_cmd.cmds);
  2691. }
  2692. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2693. {
  2694. struct drm_panel_esd_config *esd_config;
  2695. int rc = 0;
  2696. u32 tmp;
  2697. u32 i, status_len, *lenp;
  2698. struct property *data;
  2699. struct dsi_parser_utils *utils = &panel->utils;
  2700. if (!panel) {
  2701. DSI_ERR("Invalid Params\n");
  2702. return -EINVAL;
  2703. }
  2704. esd_config = &panel->esd_config;
  2705. if (!esd_config)
  2706. return -EINVAL;
  2707. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2708. DSI_CMD_SET_PANEL_STATUS, utils);
  2709. if (!esd_config->status_cmd.count) {
  2710. DSI_ERR("panel status command parsing failed\n");
  2711. rc = -EINVAL;
  2712. goto error;
  2713. }
  2714. if (!dsi_panel_parse_esd_status_len(utils,
  2715. "qcom,mdss-dsi-panel-status-read-length",
  2716. &panel->esd_config.status_cmds_rlen,
  2717. esd_config->status_cmd.count)) {
  2718. DSI_ERR("Invalid status read length\n");
  2719. rc = -EINVAL;
  2720. goto error1;
  2721. }
  2722. if (dsi_panel_parse_esd_status_len(utils,
  2723. "qcom,mdss-dsi-panel-status-valid-params",
  2724. &panel->esd_config.status_valid_params,
  2725. esd_config->status_cmd.count)) {
  2726. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2727. esd_config->status_cmd.count)) {
  2728. rc = -EINVAL;
  2729. goto error2;
  2730. }
  2731. }
  2732. status_len = 0;
  2733. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2734. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2735. status_len += lenp[i];
  2736. if (!status_len) {
  2737. rc = -EINVAL;
  2738. goto error2;
  2739. }
  2740. /*
  2741. * Some panel may need multiple read commands to properly
  2742. * check panel status. Do a sanity check for proper status
  2743. * value which will be compared with the value read by dsi
  2744. * controller during ESD check. Also check if multiple read
  2745. * commands are there then, there should be corresponding
  2746. * status check values for each read command.
  2747. */
  2748. data = utils->find_property(utils->data,
  2749. "qcom,mdss-dsi-panel-status-value", &tmp);
  2750. tmp /= sizeof(u32);
  2751. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2752. esd_config->groups = tmp / status_len;
  2753. } else {
  2754. DSI_ERR("error parse panel-status-value\n");
  2755. rc = -EINVAL;
  2756. goto error2;
  2757. }
  2758. esd_config->status_value =
  2759. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2760. GFP_KERNEL);
  2761. if (!esd_config->status_value) {
  2762. rc = -ENOMEM;
  2763. goto error2;
  2764. }
  2765. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2766. sizeof(unsigned char), GFP_KERNEL);
  2767. if (!esd_config->return_buf) {
  2768. rc = -ENOMEM;
  2769. goto error3;
  2770. }
  2771. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2772. if (!esd_config->status_buf) {
  2773. rc = -ENOMEM;
  2774. goto error4;
  2775. }
  2776. rc = utils->read_u32_array(utils->data,
  2777. "qcom,mdss-dsi-panel-status-value",
  2778. esd_config->status_value, esd_config->groups * status_len);
  2779. if (rc) {
  2780. DSI_DEBUG("error reading panel status values\n");
  2781. memset(esd_config->status_value, 0,
  2782. esd_config->groups * status_len);
  2783. }
  2784. return 0;
  2785. error4:
  2786. kfree(esd_config->return_buf);
  2787. error3:
  2788. kfree(esd_config->status_value);
  2789. error2:
  2790. kfree(esd_config->status_valid_params);
  2791. kfree(esd_config->status_cmds_rlen);
  2792. error1:
  2793. kfree(esd_config->status_cmd.cmds);
  2794. error:
  2795. return rc;
  2796. }
  2797. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2798. {
  2799. int rc = 0;
  2800. const char *string;
  2801. struct drm_panel_esd_config *esd_config;
  2802. struct dsi_parser_utils *utils = &panel->utils;
  2803. u8 *esd_mode = NULL;
  2804. esd_config = &panel->esd_config;
  2805. esd_config->status_mode = ESD_MODE_MAX;
  2806. esd_config->esd_enabled = utils->read_bool(utils->data,
  2807. "qcom,esd-check-enabled");
  2808. if (!esd_config->esd_enabled)
  2809. return 0;
  2810. rc = utils->read_string(utils->data,
  2811. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2812. if (!rc) {
  2813. if (!strcmp(string, "bta_check")) {
  2814. esd_config->status_mode = ESD_MODE_SW_BTA;
  2815. } else if (!strcmp(string, "reg_read")) {
  2816. esd_config->status_mode = ESD_MODE_REG_READ;
  2817. } else if (!strcmp(string, "te_signal_check")) {
  2818. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2819. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2820. } else {
  2821. DSI_ERR("TE-ESD not valid for video mode\n");
  2822. rc = -EINVAL;
  2823. goto error;
  2824. }
  2825. } else {
  2826. DSI_ERR("No valid panel-status-check-mode string\n");
  2827. rc = -EINVAL;
  2828. goto error;
  2829. }
  2830. } else {
  2831. DSI_DEBUG("status check method not defined!\n");
  2832. rc = -EINVAL;
  2833. goto error;
  2834. }
  2835. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2836. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2837. if (rc) {
  2838. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2839. rc);
  2840. goto error;
  2841. }
  2842. esd_mode = "register_read";
  2843. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2844. esd_mode = "bta_trigger";
  2845. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2846. esd_mode = "te_check";
  2847. }
  2848. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2849. return 0;
  2850. error:
  2851. panel->esd_config.esd_enabled = false;
  2852. return rc;
  2853. }
  2854. static void dsi_panel_update_util(struct dsi_panel *panel,
  2855. struct device_node *parser_node)
  2856. {
  2857. struct dsi_parser_utils *utils = &panel->utils;
  2858. if (parser_node) {
  2859. *utils = *dsi_parser_get_parser_utils();
  2860. utils->data = parser_node;
  2861. DSI_DEBUG("switching to parser APIs\n");
  2862. goto end;
  2863. }
  2864. *utils = *dsi_parser_get_of_utils();
  2865. utils->data = panel->panel_of_node;
  2866. end:
  2867. utils->node = panel->panel_of_node;
  2868. }
  2869. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2870. {
  2871. return 0;
  2872. }
  2873. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2874. {
  2875. if (trusted_vm_env) {
  2876. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2877. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2878. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2879. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2880. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2881. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2882. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2883. } else {
  2884. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2885. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2886. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2887. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2888. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2889. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2890. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2891. }
  2892. }
  2893. struct dsi_panel *dsi_panel_get(struct device *parent,
  2894. struct device_node *of_node,
  2895. struct device_node *parser_node,
  2896. const char *type,
  2897. int topology_override,
  2898. bool trusted_vm_env)
  2899. {
  2900. struct dsi_panel *panel;
  2901. struct dsi_parser_utils *utils;
  2902. const char *panel_physical_type;
  2903. int rc = 0;
  2904. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2905. if (!panel)
  2906. return ERR_PTR(-ENOMEM);
  2907. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2908. panel->panel_of_node = of_node;
  2909. panel->parent = parent;
  2910. panel->type = type;
  2911. dsi_panel_update_util(panel, parser_node);
  2912. utils = &panel->utils;
  2913. panel->name = utils->get_property(utils->data,
  2914. "qcom,mdss-dsi-panel-name", NULL);
  2915. if (!panel->name)
  2916. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2917. /*
  2918. * Set panel type to LCD as default.
  2919. */
  2920. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2921. panel_physical_type = utils->get_property(utils->data,
  2922. "qcom,mdss-dsi-panel-physical-type", NULL);
  2923. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2924. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2925. rc = dsi_panel_parse_host_config(panel);
  2926. if (rc) {
  2927. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2928. rc);
  2929. goto error;
  2930. }
  2931. rc = dsi_panel_parse_panel_mode(panel);
  2932. if (rc) {
  2933. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2934. rc);
  2935. goto error;
  2936. }
  2937. rc = dsi_panel_parse_dfps_caps(panel);
  2938. if (rc)
  2939. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2940. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2941. if (rc)
  2942. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2943. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2944. if (rc)
  2945. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2946. rc = dsi_panel_parse_phy_props(panel);
  2947. if (rc) {
  2948. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2949. rc);
  2950. goto error;
  2951. }
  2952. rc = panel->panel_ops.parse_gpios(panel);
  2953. if (rc) {
  2954. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2955. goto error;
  2956. }
  2957. rc = dsi_panel_parse_power_cfg(panel);
  2958. if (rc)
  2959. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2960. rc = dsi_panel_parse_bl_config(panel);
  2961. if (rc) {
  2962. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2963. if (rc == -EPROBE_DEFER)
  2964. goto error;
  2965. }
  2966. rc = dsi_panel_parse_misc_features(panel);
  2967. if (rc)
  2968. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2969. rc = dsi_panel_parse_hdr_config(panel);
  2970. if (rc)
  2971. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2972. rc = dsi_panel_get_mode_count(panel);
  2973. if (rc) {
  2974. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2975. goto error;
  2976. }
  2977. rc = dsi_panel_parse_dms_info(panel);
  2978. if (rc)
  2979. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2980. rc = dsi_panel_parse_esd_config(panel);
  2981. if (rc)
  2982. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2983. rc = dsi_panel_vreg_get(panel);
  2984. if (rc) {
  2985. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2986. panel->name, rc);
  2987. goto error;
  2988. }
  2989. panel->power_mode = SDE_MODE_DPMS_OFF;
  2990. drm_panel_init(&panel->drm_panel);
  2991. panel->drm_panel.dev = &panel->mipi_device.dev;
  2992. panel->mipi_device.dev.of_node = of_node;
  2993. rc = drm_panel_add(&panel->drm_panel);
  2994. if (rc)
  2995. goto error_vreg_put;
  2996. mutex_init(&panel->panel_lock);
  2997. return panel;
  2998. error_vreg_put:
  2999. (void)dsi_panel_vreg_put(panel);
  3000. error:
  3001. kfree(panel);
  3002. return ERR_PTR(rc);
  3003. }
  3004. void dsi_panel_put(struct dsi_panel *panel)
  3005. {
  3006. drm_panel_remove(&panel->drm_panel);
  3007. /* free resources allocated for ESD check */
  3008. dsi_panel_esd_config_deinit(&panel->esd_config);
  3009. kfree(panel);
  3010. }
  3011. int dsi_panel_drv_init(struct dsi_panel *panel,
  3012. struct mipi_dsi_host *host)
  3013. {
  3014. int rc = 0;
  3015. struct mipi_dsi_device *dev;
  3016. if (!panel || !host) {
  3017. DSI_ERR("invalid params\n");
  3018. return -EINVAL;
  3019. }
  3020. mutex_lock(&panel->panel_lock);
  3021. dev = &panel->mipi_device;
  3022. dev->host = host;
  3023. /*
  3024. * We dont have device structure since panel is not a device node.
  3025. * When using drm panel framework, the device is probed when the host is
  3026. * create.
  3027. */
  3028. dev->channel = 0;
  3029. dev->lanes = 4;
  3030. panel->host = host;
  3031. rc = panel->panel_ops.pinctrl_init(panel);
  3032. if (rc) {
  3033. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3034. panel->name, rc);
  3035. goto exit;
  3036. }
  3037. rc = panel->panel_ops.gpio_request(panel);
  3038. if (rc) {
  3039. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3040. rc);
  3041. goto error_pinctrl_deinit;
  3042. }
  3043. rc = panel->panel_ops.bl_register(panel);
  3044. if (rc) {
  3045. if (rc != -EPROBE_DEFER)
  3046. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3047. panel->name, rc);
  3048. goto error_gpio_release;
  3049. }
  3050. goto exit;
  3051. error_gpio_release:
  3052. (void)dsi_panel_gpio_release(panel);
  3053. error_pinctrl_deinit:
  3054. (void)dsi_panel_pinctrl_deinit(panel);
  3055. exit:
  3056. mutex_unlock(&panel->panel_lock);
  3057. return rc;
  3058. }
  3059. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3060. {
  3061. int rc = 0;
  3062. if (!panel) {
  3063. DSI_ERR("invalid params\n");
  3064. return -EINVAL;
  3065. }
  3066. mutex_lock(&panel->panel_lock);
  3067. rc = panel->panel_ops.bl_unregister(panel);
  3068. if (rc)
  3069. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3070. panel->name, rc);
  3071. rc = panel->panel_ops.gpio_release(panel);
  3072. if (rc)
  3073. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3074. rc);
  3075. rc = panel->panel_ops.pinctrl_deinit(panel);
  3076. if (rc)
  3077. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3078. rc);
  3079. rc = dsi_panel_vreg_put(panel);
  3080. if (rc)
  3081. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3082. panel->host = NULL;
  3083. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3084. mutex_unlock(&panel->panel_lock);
  3085. return rc;
  3086. }
  3087. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3088. struct dsi_display_mode *mode)
  3089. {
  3090. return 0;
  3091. }
  3092. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3093. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3094. {
  3095. const char *compression;
  3096. u32 *array = NULL, top_count, len, i;
  3097. int rc = -EINVAL;
  3098. bool dsc_enable = false;
  3099. *dsc_count = 0;
  3100. *lm_count = 0;
  3101. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3102. if (compression && !strcmp(compression, "dsc"))
  3103. dsc_enable = true;
  3104. len = utils->count_u32_elems(node, "qcom,display-topology");
  3105. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3106. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3107. return rc;
  3108. top_count = len / TOPOLOGY_SET_LEN;
  3109. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3110. if (!array)
  3111. return -ENOMEM;
  3112. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3113. if (rc) {
  3114. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3115. goto read_fail;
  3116. }
  3117. for (i = 0; i < top_count; i++) {
  3118. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3119. if (dsc_enable)
  3120. *dsc_count = max(*dsc_count,
  3121. array[i * TOPOLOGY_SET_LEN + 1]);
  3122. }
  3123. read_fail:
  3124. kfree(array);
  3125. return 0;
  3126. }
  3127. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3128. {
  3129. const u32 SINGLE_MODE_SUPPORT = 1;
  3130. struct dsi_parser_utils *utils;
  3131. struct device_node *timings_np, *child_np;
  3132. int num_dfps_rates, num_bit_clks;
  3133. int num_video_modes = 0, num_cmd_modes = 0;
  3134. int count, rc = 0;
  3135. u32 dsc_count = 0, lm_count = 0;
  3136. if (!panel) {
  3137. DSI_ERR("invalid params\n");
  3138. return -EINVAL;
  3139. }
  3140. utils = &panel->utils;
  3141. panel->num_timing_nodes = 0;
  3142. timings_np = utils->get_child_by_name(utils->data,
  3143. "qcom,mdss-dsi-display-timings");
  3144. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3145. DSI_ERR("no display timing nodes defined\n");
  3146. rc = -EINVAL;
  3147. goto error;
  3148. }
  3149. count = utils->get_child_count(timings_np);
  3150. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3151. count > DSI_MODE_MAX) {
  3152. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3153. rc = -EINVAL;
  3154. goto error;
  3155. }
  3156. /* No multiresolution support is available for video mode panels.
  3157. * Multi-mode is supported for video mode during POMS is enabled.
  3158. */
  3159. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3160. !panel->host_config.ext_bridge_mode &&
  3161. !panel->panel_mode_switch_enabled)
  3162. count = SINGLE_MODE_SUPPORT;
  3163. panel->num_timing_nodes = count;
  3164. dsi_for_each_child_node(timings_np, child_np) {
  3165. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3166. num_video_modes++;
  3167. else if (utils->read_bool(child_np,
  3168. "qcom,mdss-dsi-cmd-mode"))
  3169. num_cmd_modes++;
  3170. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3171. num_video_modes++;
  3172. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3173. num_cmd_modes++;
  3174. dsi_panel_get_max_res_count(utils, child_np,
  3175. &dsc_count, &lm_count);
  3176. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3177. panel->lm_count = max(lm_count, panel->lm_count);
  3178. }
  3179. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3180. panel->dfps_caps.dfps_list_len;
  3181. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3182. panel->dyn_clk_caps.bit_clk_list_len;
  3183. /*
  3184. * Inflate num_of_modes by fps and bit clks in dfps.
  3185. * Single command mode for video mode panels supporting
  3186. * panel operating mode switch.
  3187. */
  3188. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3189. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3190. (panel->panel_mode_switch_enabled))
  3191. num_cmd_modes = 1;
  3192. else
  3193. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3194. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3195. error:
  3196. return rc;
  3197. }
  3198. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3199. struct dsi_panel_phy_props *phy_props)
  3200. {
  3201. int rc = 0;
  3202. if (!panel || !phy_props) {
  3203. DSI_ERR("invalid params\n");
  3204. return -EINVAL;
  3205. }
  3206. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3207. return rc;
  3208. }
  3209. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3210. struct dsi_dfps_capabilities *dfps_caps)
  3211. {
  3212. int rc = 0;
  3213. if (!panel || !dfps_caps) {
  3214. DSI_ERR("invalid params\n");
  3215. return -EINVAL;
  3216. }
  3217. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3218. return rc;
  3219. }
  3220. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3221. {
  3222. int i;
  3223. if (!mode->priv_info)
  3224. return;
  3225. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3226. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3227. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3228. }
  3229. kfree(mode->priv_info);
  3230. }
  3231. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3232. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3233. {
  3234. u32 frame_time_us, nslices;
  3235. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3236. dsi_transfer_time_us, pixel_clk_khz;
  3237. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3238. struct dsi_mode_info *timing = &mode->timing;
  3239. struct dsi_display_mode *display_mode;
  3240. u32 jitter_numer, jitter_denom, prefill_lines;
  3241. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3242. u16 bpp;
  3243. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3244. * + 1 byte dcs data command.
  3245. */
  3246. const u32 packet_overhead = 56;
  3247. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3248. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3249. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3250. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3251. if (timing->refresh_rate >= 120)
  3252. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3253. if (timing->dsc_enabled) {
  3254. nslices = (timing->h_active)/(dsc->config.slice_width);
  3255. /* (slice width x bit-per-pixel + packet overhead) x
  3256. * number of slices x height x fps / lane
  3257. */
  3258. bpp = DSC_BPP(dsc->config);
  3259. bits_per_line = ((dsc->config.slice_width * bpp) +
  3260. packet_overhead) * nslices;
  3261. bits_per_line = bits_per_line / (config->num_data_lanes);
  3262. min_bitclk_hz = (bits_per_line * timing->v_active *
  3263. timing->refresh_rate);
  3264. } else {
  3265. total_active_pixels = ((dsi_h_active_dce(timing)
  3266. * timing->v_active));
  3267. /* calculate the actual bitclk needed to transfer the frame */
  3268. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3269. (config->bpp));
  3270. do_div(min_bitclk_hz, config->num_data_lanes);
  3271. }
  3272. timing->min_dsi_clk_hz = min_bitclk_hz;
  3273. min_threshold_us = mult_frac(frame_time_us,
  3274. jitter_numer, (jitter_denom * 100));
  3275. /*
  3276. * Increase the prefill_lines proportionately as recommended
  3277. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3278. */
  3279. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3280. timing->refresh_rate, 60);
  3281. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3282. (timing->v_active));
  3283. /*
  3284. * Threshold is sum of panel jitter time, prefill line time
  3285. * plus 64usec buffer time.
  3286. */
  3287. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3288. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3289. if (timing->clk_rate_hz) {
  3290. /* adjust the transfer time proportionately for bit clk*/
  3291. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3292. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3293. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3294. } else if (mode->priv_info->mdp_transfer_time_us) {
  3295. max_transfer_us = frame_time_us - min_threshold_us;
  3296. mode->priv_info->mdp_transfer_time_us = min(
  3297. mode->priv_info->mdp_transfer_time_us,
  3298. max_transfer_us);
  3299. timing->dsi_transfer_time_us =
  3300. mode->priv_info->mdp_transfer_time_us;
  3301. } else {
  3302. if (min_threshold_us > frame_threshold_us)
  3303. frame_threshold_us = min_threshold_us;
  3304. timing->dsi_transfer_time_us = frame_time_us -
  3305. frame_threshold_us;
  3306. }
  3307. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3308. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3309. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3310. timing->mdp_transfer_time_us =
  3311. mode->priv_info->mdp_transfer_time_us;
  3312. }
  3313. /* Calculate pclk_khz to update modeinfo */
  3314. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3315. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3316. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3317. do_div(pixel_clk_khz, config->bpp);
  3318. display_mode->pixel_clk_khz = pixel_clk_khz;
  3319. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3320. }
  3321. int dsi_panel_get_mode(struct dsi_panel *panel,
  3322. u32 index, struct dsi_display_mode *mode,
  3323. int topology_override)
  3324. {
  3325. struct device_node *timings_np, *child_np;
  3326. struct dsi_parser_utils *utils;
  3327. struct dsi_display_mode_priv_info *prv_info;
  3328. u32 child_idx = 0;
  3329. int rc = 0, num_timings;
  3330. int traffic_mode;
  3331. int panel_mode;
  3332. void *utils_data = NULL;
  3333. if (!panel || !mode) {
  3334. DSI_ERR("invalid params\n");
  3335. return -EINVAL;
  3336. }
  3337. mutex_lock(&panel->panel_lock);
  3338. utils = &panel->utils;
  3339. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3340. if (!mode->priv_info) {
  3341. rc = -ENOMEM;
  3342. goto done;
  3343. }
  3344. prv_info = mode->priv_info;
  3345. timings_np = utils->get_child_by_name(utils->data,
  3346. "qcom,mdss-dsi-display-timings");
  3347. if (!timings_np) {
  3348. DSI_ERR("no display timing nodes defined\n");
  3349. rc = -EINVAL;
  3350. goto parse_fail;
  3351. }
  3352. num_timings = utils->get_child_count(timings_np);
  3353. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3354. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3355. rc = -EINVAL;
  3356. goto parse_fail;
  3357. }
  3358. utils_data = utils->data;
  3359. traffic_mode = panel->video_config.traffic_mode;
  3360. panel_mode = panel->panel_mode;
  3361. dsi_for_each_child_node(timings_np, child_np) {
  3362. if (index != child_idx++)
  3363. continue;
  3364. utils->data = child_np;
  3365. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3366. if (rc) {
  3367. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3368. goto parse_fail;
  3369. }
  3370. rc = dsi_panel_parse_dsc_params(mode, utils);
  3371. if (rc) {
  3372. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3373. goto parse_fail;
  3374. }
  3375. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3376. panel_mode);
  3377. if (rc) {
  3378. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3379. goto parse_fail;
  3380. }
  3381. rc = dsi_panel_parse_topology(prv_info, utils,
  3382. topology_override);
  3383. if (rc) {
  3384. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3385. goto parse_fail;
  3386. }
  3387. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3388. if (rc) {
  3389. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3390. goto parse_fail;
  3391. }
  3392. rc = dsi_panel_parse_jitter_config(mode, utils);
  3393. if (rc)
  3394. DSI_ERR(
  3395. "failed to parse panel jitter config, rc=%d\n", rc);
  3396. rc = dsi_panel_parse_phy_timing(mode, utils);
  3397. if (rc) {
  3398. DSI_ERR(
  3399. "failed to parse panel phy timings, rc=%d\n", rc);
  3400. goto parse_fail;
  3401. }
  3402. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3403. if (rc)
  3404. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3405. if (panel->panel_mode_switch_enabled) {
  3406. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3407. if (rc) {
  3408. rc = 0;
  3409. mode->panel_mode = panel->panel_mode;
  3410. DSI_INFO(
  3411. "POMS: panel mode isn't specified in timing[%d]\n",
  3412. child_idx);
  3413. }
  3414. } else {
  3415. mode->panel_mode = panel->panel_mode;
  3416. }
  3417. }
  3418. goto done;
  3419. parse_fail:
  3420. kfree(mode->priv_info);
  3421. mode->priv_info = NULL;
  3422. done:
  3423. utils->data = utils_data;
  3424. mutex_unlock(&panel->panel_lock);
  3425. return rc;
  3426. }
  3427. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3428. struct dsi_display_mode *mode,
  3429. struct dsi_host_config *config)
  3430. {
  3431. int rc = 0;
  3432. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3433. if (!panel || !mode || !config) {
  3434. DSI_ERR("invalid params\n");
  3435. return -EINVAL;
  3436. }
  3437. mutex_lock(&panel->panel_lock);
  3438. config->panel_mode = panel->panel_mode;
  3439. memcpy(&config->common_config, &panel->host_config,
  3440. sizeof(config->common_config));
  3441. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3442. memcpy(&config->u.video_engine, &panel->video_config,
  3443. sizeof(config->u.video_engine));
  3444. } else {
  3445. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3446. sizeof(config->u.cmd_engine));
  3447. }
  3448. memcpy(&config->video_timing, &mode->timing,
  3449. sizeof(config->video_timing));
  3450. config->video_timing.mdp_transfer_time_us =
  3451. mode->priv_info->mdp_transfer_time_us;
  3452. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3453. config->video_timing.dsc = &mode->priv_info->dsc;
  3454. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3455. config->video_timing.vdc = &mode->priv_info->vdc;
  3456. if (dyn_clk_caps->dyn_clk_support)
  3457. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3458. else
  3459. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3460. config->esc_clk_rate_hz = 19200000;
  3461. mutex_unlock(&panel->panel_lock);
  3462. return rc;
  3463. }
  3464. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3465. {
  3466. int rc = 0;
  3467. if (!panel) {
  3468. DSI_ERR("invalid params\n");
  3469. return -EINVAL;
  3470. }
  3471. mutex_lock(&panel->panel_lock);
  3472. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3473. if (panel->lp11_init)
  3474. goto error;
  3475. rc = dsi_panel_power_on(panel);
  3476. if (rc) {
  3477. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3478. goto error;
  3479. }
  3480. error:
  3481. mutex_unlock(&panel->panel_lock);
  3482. return rc;
  3483. }
  3484. int dsi_panel_update_pps(struct dsi_panel *panel)
  3485. {
  3486. int rc = 0;
  3487. struct dsi_panel_cmd_set *set = NULL;
  3488. struct dsi_display_mode_priv_info *priv_info = NULL;
  3489. if (!panel || !panel->cur_mode) {
  3490. DSI_ERR("invalid params\n");
  3491. return -EINVAL;
  3492. }
  3493. mutex_lock(&panel->panel_lock);
  3494. priv_info = panel->cur_mode->priv_info;
  3495. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3496. if (priv_info->dsc_enabled)
  3497. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3498. panel->dce_pps_cmd, 0,
  3499. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3500. else if (priv_info->vdc_enabled)
  3501. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3502. panel->dce_pps_cmd, 0,
  3503. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3504. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3505. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3506. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3507. if (rc) {
  3508. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3509. goto error;
  3510. }
  3511. }
  3512. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3513. if (rc) {
  3514. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3515. panel->name, rc);
  3516. }
  3517. dsi_panel_destroy_cmd_packets(set);
  3518. error:
  3519. mutex_unlock(&panel->panel_lock);
  3520. return rc;
  3521. }
  3522. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3523. {
  3524. int rc = 0;
  3525. if (!panel) {
  3526. DSI_ERR("invalid params\n");
  3527. return -EINVAL;
  3528. }
  3529. mutex_lock(&panel->panel_lock);
  3530. if (!panel->panel_initialized)
  3531. goto exit;
  3532. /*
  3533. * Consider LP1->LP2->LP1.
  3534. * If the panel is already in LP mode, do not need to
  3535. * set the regulator.
  3536. * IBB and AB power mode would be set at the same time
  3537. * in PMIC driver, so we only call ibb setting that is enough.
  3538. */
  3539. if (dsi_panel_is_type_oled(panel) &&
  3540. panel->power_mode != SDE_MODE_DPMS_LP2)
  3541. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3542. "ibb", REGULATOR_MODE_IDLE);
  3543. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3544. if (rc)
  3545. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3546. panel->name, rc);
  3547. exit:
  3548. mutex_unlock(&panel->panel_lock);
  3549. return rc;
  3550. }
  3551. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3552. {
  3553. int rc = 0;
  3554. if (!panel) {
  3555. DSI_ERR("invalid params\n");
  3556. return -EINVAL;
  3557. }
  3558. mutex_lock(&panel->panel_lock);
  3559. if (!panel->panel_initialized)
  3560. goto exit;
  3561. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3562. if (rc)
  3563. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3564. panel->name, rc);
  3565. exit:
  3566. mutex_unlock(&panel->panel_lock);
  3567. return rc;
  3568. }
  3569. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3570. {
  3571. int rc = 0;
  3572. if (!panel) {
  3573. DSI_ERR("invalid params\n");
  3574. return -EINVAL;
  3575. }
  3576. mutex_lock(&panel->panel_lock);
  3577. if (!panel->panel_initialized)
  3578. goto exit;
  3579. /*
  3580. * Consider about LP1->LP2->NOLP.
  3581. */
  3582. if (dsi_panel_is_type_oled(panel) &&
  3583. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3584. panel->power_mode == SDE_MODE_DPMS_LP2))
  3585. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3586. "ibb", REGULATOR_MODE_NORMAL);
  3587. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3588. if (rc)
  3589. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3590. panel->name, rc);
  3591. exit:
  3592. mutex_unlock(&panel->panel_lock);
  3593. return rc;
  3594. }
  3595. int dsi_panel_prepare(struct dsi_panel *panel)
  3596. {
  3597. int rc = 0;
  3598. if (!panel) {
  3599. DSI_ERR("invalid params\n");
  3600. return -EINVAL;
  3601. }
  3602. mutex_lock(&panel->panel_lock);
  3603. if (panel->lp11_init) {
  3604. rc = dsi_panel_power_on(panel);
  3605. if (rc) {
  3606. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3607. panel->name, rc);
  3608. goto error;
  3609. }
  3610. }
  3611. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3612. if (rc) {
  3613. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3614. panel->name, rc);
  3615. goto error;
  3616. }
  3617. error:
  3618. mutex_unlock(&panel->panel_lock);
  3619. return rc;
  3620. }
  3621. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3622. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3623. {
  3624. static const int ROI_CMD_LEN = 5;
  3625. int rc = 0;
  3626. /* DTYPE_DCS_LWRITE */
  3627. char *caset, *paset;
  3628. set->cmds = NULL;
  3629. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3630. if (!caset) {
  3631. rc = -ENOMEM;
  3632. goto exit;
  3633. }
  3634. caset[0] = 0x2a;
  3635. caset[1] = (roi->x & 0xFF00) >> 8;
  3636. caset[2] = roi->x & 0xFF;
  3637. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3638. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3639. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3640. if (!paset) {
  3641. rc = -ENOMEM;
  3642. goto error_free_mem;
  3643. }
  3644. paset[0] = 0x2b;
  3645. paset[1] = (roi->y & 0xFF00) >> 8;
  3646. paset[2] = roi->y & 0xFF;
  3647. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3648. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3649. set->type = DSI_CMD_SET_ROI;
  3650. set->state = DSI_CMD_SET_STATE_LP;
  3651. set->count = 2; /* send caset + paset together */
  3652. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3653. if (!set->cmds) {
  3654. rc = -ENOMEM;
  3655. goto error_free_mem;
  3656. }
  3657. set->cmds[0].msg.channel = 0;
  3658. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3659. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3660. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3661. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3662. set->cmds[0].msg.tx_buf = caset;
  3663. set->cmds[0].msg.rx_len = 0;
  3664. set->cmds[0].msg.rx_buf = 0;
  3665. set->cmds[0].msg.wait_ms = 0;
  3666. set->cmds[0].last_command = 0;
  3667. set->cmds[0].post_wait_ms = 0;
  3668. set->cmds[1].msg.channel = 0;
  3669. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3670. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3671. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3672. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3673. set->cmds[1].msg.tx_buf = paset;
  3674. set->cmds[1].msg.rx_len = 0;
  3675. set->cmds[1].msg.rx_buf = 0;
  3676. set->cmds[1].msg.wait_ms = 0;
  3677. set->cmds[1].last_command = 1;
  3678. set->cmds[1].post_wait_ms = 0;
  3679. goto exit;
  3680. error_free_mem:
  3681. kfree(caset);
  3682. kfree(paset);
  3683. kfree(set->cmds);
  3684. exit:
  3685. return rc;
  3686. }
  3687. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3688. int ctrl_idx)
  3689. {
  3690. int rc = 0;
  3691. if (!panel) {
  3692. DSI_ERR("invalid params\n");
  3693. return -EINVAL;
  3694. }
  3695. mutex_lock(&panel->panel_lock);
  3696. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3697. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3698. if (rc)
  3699. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3700. panel->name, rc);
  3701. mutex_unlock(&panel->panel_lock);
  3702. return rc;
  3703. }
  3704. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3705. int ctrl_idx)
  3706. {
  3707. int rc = 0;
  3708. if (!panel) {
  3709. DSI_ERR("invalid params\n");
  3710. return -EINVAL;
  3711. }
  3712. mutex_lock(&panel->panel_lock);
  3713. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3714. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3715. if (rc)
  3716. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3717. panel->name, rc);
  3718. mutex_unlock(&panel->panel_lock);
  3719. return rc;
  3720. }
  3721. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3722. struct dsi_rect *roi)
  3723. {
  3724. int rc = 0;
  3725. struct dsi_panel_cmd_set *set;
  3726. struct dsi_display_mode_priv_info *priv_info;
  3727. if (!panel || !panel->cur_mode) {
  3728. DSI_ERR("Invalid params\n");
  3729. return -EINVAL;
  3730. }
  3731. priv_info = panel->cur_mode->priv_info;
  3732. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3733. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3734. if (rc) {
  3735. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3736. panel->name, rc);
  3737. return rc;
  3738. }
  3739. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3740. roi->x, roi->y, roi->w, roi->h);
  3741. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3742. mutex_lock(&panel->panel_lock);
  3743. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3744. if (rc)
  3745. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3746. panel->name, rc);
  3747. mutex_unlock(&panel->panel_lock);
  3748. dsi_panel_destroy_cmd_packets(set);
  3749. dsi_panel_dealloc_cmd_packets(set);
  3750. return rc;
  3751. }
  3752. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3753. {
  3754. int rc = 0;
  3755. if (!panel) {
  3756. DSI_ERR("Invalid params\n");
  3757. return -EINVAL;
  3758. }
  3759. mutex_lock(&panel->panel_lock);
  3760. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3761. if (rc)
  3762. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3763. panel->name, rc);
  3764. mutex_unlock(&panel->panel_lock);
  3765. return rc;
  3766. }
  3767. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3768. {
  3769. int rc = 0;
  3770. if (!panel) {
  3771. DSI_ERR("Invalid params\n");
  3772. return -EINVAL;
  3773. }
  3774. mutex_lock(&panel->panel_lock);
  3775. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3776. if (rc)
  3777. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3778. panel->name, rc);
  3779. mutex_unlock(&panel->panel_lock);
  3780. return rc;
  3781. }
  3782. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3783. {
  3784. int rc = 0;
  3785. if (!panel) {
  3786. DSI_ERR("Invalid params\n");
  3787. return -EINVAL;
  3788. }
  3789. mutex_lock(&panel->panel_lock);
  3790. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3791. if (rc)
  3792. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3793. panel->name, rc);
  3794. mutex_unlock(&panel->panel_lock);
  3795. return rc;
  3796. }
  3797. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3798. {
  3799. int rc = 0;
  3800. if (!panel) {
  3801. DSI_ERR("Invalid params\n");
  3802. return -EINVAL;
  3803. }
  3804. mutex_lock(&panel->panel_lock);
  3805. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3806. if (rc)
  3807. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3808. panel->name, rc);
  3809. mutex_unlock(&panel->panel_lock);
  3810. return rc;
  3811. }
  3812. int dsi_panel_switch(struct dsi_panel *panel)
  3813. {
  3814. int rc = 0;
  3815. if (!panel) {
  3816. DSI_ERR("Invalid params\n");
  3817. return -EINVAL;
  3818. }
  3819. mutex_lock(&panel->panel_lock);
  3820. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3821. if (rc)
  3822. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3823. panel->name, rc);
  3824. mutex_unlock(&panel->panel_lock);
  3825. return rc;
  3826. }
  3827. int dsi_panel_post_switch(struct dsi_panel *panel)
  3828. {
  3829. int rc = 0;
  3830. if (!panel) {
  3831. DSI_ERR("Invalid params\n");
  3832. return -EINVAL;
  3833. }
  3834. mutex_lock(&panel->panel_lock);
  3835. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3836. if (rc)
  3837. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3838. panel->name, rc);
  3839. mutex_unlock(&panel->panel_lock);
  3840. return rc;
  3841. }
  3842. int dsi_panel_enable(struct dsi_panel *panel)
  3843. {
  3844. int rc = 0;
  3845. if (!panel) {
  3846. DSI_ERR("Invalid params\n");
  3847. return -EINVAL;
  3848. }
  3849. mutex_lock(&panel->panel_lock);
  3850. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3851. if (rc)
  3852. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3853. panel->name, rc);
  3854. else
  3855. panel->panel_initialized = true;
  3856. mutex_unlock(&panel->panel_lock);
  3857. return rc;
  3858. }
  3859. int dsi_panel_post_enable(struct dsi_panel *panel)
  3860. {
  3861. int rc = 0;
  3862. if (!panel) {
  3863. DSI_ERR("invalid params\n");
  3864. return -EINVAL;
  3865. }
  3866. mutex_lock(&panel->panel_lock);
  3867. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3868. if (rc) {
  3869. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3870. panel->name, rc);
  3871. goto error;
  3872. }
  3873. error:
  3874. mutex_unlock(&panel->panel_lock);
  3875. return rc;
  3876. }
  3877. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3878. {
  3879. int rc = 0;
  3880. if (!panel) {
  3881. DSI_ERR("invalid params\n");
  3882. return -EINVAL;
  3883. }
  3884. mutex_lock(&panel->panel_lock);
  3885. if (gpio_is_valid(panel->bl_config.en_gpio))
  3886. gpio_set_value(panel->bl_config.en_gpio, 0);
  3887. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3888. if (rc) {
  3889. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3890. panel->name, rc);
  3891. goto error;
  3892. }
  3893. error:
  3894. mutex_unlock(&panel->panel_lock);
  3895. return rc;
  3896. }
  3897. int dsi_panel_disable(struct dsi_panel *panel)
  3898. {
  3899. int rc = 0;
  3900. if (!panel) {
  3901. DSI_ERR("invalid params\n");
  3902. return -EINVAL;
  3903. }
  3904. mutex_lock(&panel->panel_lock);
  3905. /* Avoid sending panel off commands when ESD recovery is underway */
  3906. if (!atomic_read(&panel->esd_recovery_pending)) {
  3907. /*
  3908. * Need to set IBB/AB regulator mode to STANDBY,
  3909. * if panel is going off from AOD mode.
  3910. */
  3911. if (dsi_panel_is_type_oled(panel) &&
  3912. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3913. panel->power_mode == SDE_MODE_DPMS_LP2))
  3914. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3915. "ibb", REGULATOR_MODE_STANDBY);
  3916. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3917. if (rc) {
  3918. /*
  3919. * Sending panel off commands may fail when DSI
  3920. * controller is in a bad state. These failures can be
  3921. * ignored since controller will go for full reset on
  3922. * subsequent display enable anyway.
  3923. */
  3924. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3925. panel->name, rc);
  3926. rc = 0;
  3927. }
  3928. }
  3929. panel->panel_initialized = false;
  3930. panel->power_mode = SDE_MODE_DPMS_OFF;
  3931. mutex_unlock(&panel->panel_lock);
  3932. return rc;
  3933. }
  3934. int dsi_panel_unprepare(struct dsi_panel *panel)
  3935. {
  3936. int rc = 0;
  3937. if (!panel) {
  3938. DSI_ERR("invalid params\n");
  3939. return -EINVAL;
  3940. }
  3941. mutex_lock(&panel->panel_lock);
  3942. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3943. if (rc) {
  3944. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3945. panel->name, rc);
  3946. goto error;
  3947. }
  3948. error:
  3949. mutex_unlock(&panel->panel_lock);
  3950. return rc;
  3951. }
  3952. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3953. {
  3954. int rc = 0;
  3955. if (!panel) {
  3956. DSI_ERR("invalid params\n");
  3957. return -EINVAL;
  3958. }
  3959. mutex_lock(&panel->panel_lock);
  3960. rc = dsi_panel_power_off(panel);
  3961. if (rc) {
  3962. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3963. panel->name, rc);
  3964. goto error;
  3965. }
  3966. error:
  3967. mutex_unlock(&panel->panel_lock);
  3968. return rc;
  3969. }