dp_rx.c 87 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186
  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DP_RATETABLE_SUPPORT
  42. #include "dp_ratetable.h"
  43. #endif
  44. #ifndef WLAN_SOFTUMAC_SUPPORT /* WLAN_SOFTUMAC_SUPPORT */
  45. #ifdef DUP_RX_DESC_WAR
  46. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  47. hal_ring_handle_t hal_ring,
  48. hal_ring_desc_t ring_desc,
  49. struct dp_rx_desc *rx_desc)
  50. {
  51. void *hal_soc = soc->hal_soc;
  52. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  53. dp_rx_desc_dump(rx_desc);
  54. }
  55. #else
  56. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  57. hal_ring_handle_t hal_ring_hdl,
  58. hal_ring_desc_t ring_desc,
  59. struct dp_rx_desc *rx_desc)
  60. {
  61. hal_soc_handle_t hal_soc = soc->hal_soc;
  62. dp_rx_desc_dump(rx_desc);
  63. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  64. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  65. qdf_assert_always(0);
  66. }
  67. #endif
  68. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  69. #ifdef RX_DESC_SANITY_WAR
  70. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  71. hal_ring_handle_t hal_ring_hdl,
  72. hal_ring_desc_t ring_desc,
  73. struct dp_rx_desc *rx_desc)
  74. {
  75. uint8_t return_buffer_manager;
  76. if (qdf_unlikely(!rx_desc)) {
  77. /*
  78. * This is an unlikely case where the cookie obtained
  79. * from the ring_desc is invalid and hence we are not
  80. * able to find the corresponding rx_desc
  81. */
  82. goto fail;
  83. }
  84. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  85. if (qdf_unlikely(!(return_buffer_manager ==
  86. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  87. return_buffer_manager ==
  88. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  89. goto fail;
  90. }
  91. return QDF_STATUS_SUCCESS;
  92. fail:
  93. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  94. dp_err("Ring Desc:");
  95. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  96. ring_desc);
  97. return QDF_STATUS_E_NULL_VALUE;
  98. }
  99. #endif
  100. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  101. hal_ring_handle_t hal_ring_hdl,
  102. uint32_t num_entries,
  103. bool *near_full)
  104. {
  105. uint32_t num_pending = 0;
  106. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  107. hal_ring_hdl,
  108. true);
  109. if (num_entries && (num_pending >= num_entries >> 1))
  110. *near_full = true;
  111. else
  112. *near_full = false;
  113. return num_pending;
  114. }
  115. #ifdef RX_DESC_DEBUG_CHECK
  116. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  117. hal_ring_desc_t ring_desc,
  118. struct dp_rx_desc *rx_desc)
  119. {
  120. struct hal_buf_info hbi;
  121. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  122. /* Sanity check for possible buffer paddr corruption */
  123. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  124. return QDF_STATUS_SUCCESS;
  125. return QDF_STATUS_E_FAILURE;
  126. }
  127. /**
  128. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  129. * out of bound access from H.W
  130. *
  131. * @soc: DP soc
  132. * @pkt_len: Packet length received from H.W
  133. *
  134. * Return: NONE
  135. */
  136. static inline void
  137. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  138. uint32_t pkt_len)
  139. {
  140. struct rx_desc_pool *rx_desc_pool;
  141. rx_desc_pool = &soc->rx_desc_buf[0];
  142. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  143. }
  144. #else
  145. static inline void
  146. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  147. #endif
  148. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  149. void
  150. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  151. hal_ring_desc_t ring_desc)
  152. {
  153. struct dp_buf_info_record *record;
  154. struct hal_buf_info hbi;
  155. uint32_t idx;
  156. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  157. return;
  158. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  159. /* buffer_addr_info is the first element of ring_desc */
  160. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  161. &hbi);
  162. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  163. DP_RX_HIST_MAX);
  164. /* No NULL check needed for record since its an array */
  165. record = &soc->rx_ring_history[ring_num]->entry[idx];
  166. record->timestamp = qdf_get_log_timestamp();
  167. record->hbi.paddr = hbi.paddr;
  168. record->hbi.sw_cookie = hbi.sw_cookie;
  169. record->hbi.rbm = hbi.rbm;
  170. }
  171. #endif
  172. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  173. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  174. uint8_t *rx_tlv,
  175. qdf_nbuf_t nbuf)
  176. {
  177. struct dp_soc *soc;
  178. if (!pdev->is_first_wakeup_packet)
  179. return;
  180. soc = pdev->soc;
  181. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  182. qdf_nbuf_mark_wakeup_frame(nbuf);
  183. dp_info("First packet after WOW Wakeup rcvd");
  184. }
  185. }
  186. #endif
  187. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  188. #endif /* WLAN_SOFTUMAC_SUPPORT */
  189. /**
  190. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  191. *
  192. * @dp_soc: struct dp_soc *
  193. * @nbuf_frag_info_t: nbuf frag info
  194. * @dp_pdev: struct dp_pdev *
  195. * @rx_desc_pool: Rx desc pool
  196. *
  197. * Return: QDF_STATUS
  198. */
  199. #ifdef DP_RX_MON_MEM_FRAG
  200. static inline QDF_STATUS
  201. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  202. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  203. struct dp_pdev *dp_pdev,
  204. struct rx_desc_pool *rx_desc_pool)
  205. {
  206. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  207. (nbuf_frag_info_t->virt_addr).vaddr =
  208. qdf_frag_alloc(NULL, rx_desc_pool->buf_size);
  209. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  210. dp_err("Frag alloc failed");
  211. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  212. return QDF_STATUS_E_NOMEM;
  213. }
  214. ret = qdf_mem_map_page(dp_soc->osdev,
  215. (nbuf_frag_info_t->virt_addr).vaddr,
  216. QDF_DMA_FROM_DEVICE,
  217. rx_desc_pool->buf_size,
  218. &nbuf_frag_info_t->paddr);
  219. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  220. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  221. dp_err("Frag map failed");
  222. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  223. return QDF_STATUS_E_FAULT;
  224. }
  225. return QDF_STATUS_SUCCESS;
  226. }
  227. #else
  228. static inline QDF_STATUS
  229. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  230. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  231. struct dp_pdev *dp_pdev,
  232. struct rx_desc_pool *rx_desc_pool)
  233. {
  234. return QDF_STATUS_SUCCESS;
  235. }
  236. #endif /* DP_RX_MON_MEM_FRAG */
  237. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  238. /**
  239. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  240. * @soc: Datapath soc structure
  241. * @ring_num: Refill ring number
  242. * @hal_ring_hdl:
  243. * @num_req: number of buffers requested for refill
  244. * @num_refill: number of buffers refilled
  245. *
  246. * Return: None
  247. */
  248. static inline void
  249. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  250. hal_ring_handle_t hal_ring_hdl,
  251. uint32_t num_req, uint32_t num_refill)
  252. {
  253. struct dp_refill_info_record *record;
  254. uint32_t idx;
  255. uint32_t tp;
  256. uint32_t hp;
  257. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  258. !soc->rx_refill_ring_history[ring_num]))
  259. return;
  260. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  261. DP_RX_REFILL_HIST_MAX);
  262. /* No NULL check needed for record since its an array */
  263. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  264. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  265. record->timestamp = qdf_get_log_timestamp();
  266. record->num_req = num_req;
  267. record->num_refill = num_refill;
  268. record->hp = hp;
  269. record->tp = tp;
  270. }
  271. #else
  272. static inline void
  273. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  274. hal_ring_handle_t hal_ring_hdl,
  275. uint32_t num_req, uint32_t num_refill)
  276. {
  277. }
  278. #endif
  279. /**
  280. * dp_pdev_nbuf_alloc_and_map_replenish() - Allocate nbuf for desc buffer and
  281. * map
  282. * @dp_soc: struct dp_soc *
  283. * @mac_id: Mac id
  284. * @num_entries_avail: num_entries_avail
  285. * @nbuf_frag_info_t: nbuf frag info
  286. * @dp_pdev: struct dp_pdev *
  287. * @rx_desc_pool: Rx desc pool
  288. *
  289. * Return: QDF_STATUS
  290. */
  291. static inline QDF_STATUS
  292. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  293. uint32_t mac_id,
  294. uint32_t num_entries_avail,
  295. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  296. struct dp_pdev *dp_pdev,
  297. struct rx_desc_pool *rx_desc_pool)
  298. {
  299. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  300. (nbuf_frag_info_t->virt_addr).nbuf =
  301. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  302. mac_id,
  303. rx_desc_pool,
  304. num_entries_avail);
  305. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  306. dp_err("nbuf alloc failed");
  307. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  308. return QDF_STATUS_E_NOMEM;
  309. }
  310. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  311. nbuf_frag_info_t);
  312. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  313. dp_rx_buffer_pool_nbuf_free(dp_soc,
  314. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  315. dp_err("nbuf map failed");
  316. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  317. return QDF_STATUS_E_FAULT;
  318. }
  319. nbuf_frag_info_t->paddr =
  320. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  321. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, (qdf_nbuf_t)(
  322. (nbuf_frag_info_t->virt_addr).nbuf),
  323. rx_desc_pool->buf_size,
  324. true, __func__, __LINE__);
  325. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  326. &nbuf_frag_info_t->paddr,
  327. rx_desc_pool);
  328. if (ret == QDF_STATUS_E_FAILURE) {
  329. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  330. return QDF_STATUS_E_ADDRNOTAVAIL;
  331. }
  332. return QDF_STATUS_SUCCESS;
  333. }
  334. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  335. QDF_STATUS
  336. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  337. struct dp_srng *dp_rxdma_srng,
  338. struct rx_desc_pool *rx_desc_pool)
  339. {
  340. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  341. uint32_t count;
  342. void *rxdma_ring_entry;
  343. union dp_rx_desc_list_elem_t *next = NULL;
  344. void *rxdma_srng;
  345. qdf_nbuf_t nbuf;
  346. qdf_dma_addr_t paddr;
  347. uint16_t num_entries_avail = 0;
  348. uint16_t num_alloc_desc = 0;
  349. union dp_rx_desc_list_elem_t *desc_list = NULL;
  350. union dp_rx_desc_list_elem_t *tail = NULL;
  351. int sync_hw_ptr = 0;
  352. rxdma_srng = dp_rxdma_srng->hal_srng;
  353. if (qdf_unlikely(!dp_pdev)) {
  354. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  355. return QDF_STATUS_E_FAILURE;
  356. }
  357. if (qdf_unlikely(!rxdma_srng)) {
  358. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  359. return QDF_STATUS_E_FAILURE;
  360. }
  361. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  362. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  363. rxdma_srng,
  364. sync_hw_ptr);
  365. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  366. soc, num_entries_avail);
  367. if (qdf_unlikely(num_entries_avail <
  368. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  369. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  370. return QDF_STATUS_E_FAILURE;
  371. }
  372. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  373. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  374. rx_desc_pool,
  375. num_entries_avail,
  376. &desc_list,
  377. &tail);
  378. if (!num_alloc_desc) {
  379. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  380. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  381. num_entries_avail);
  382. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  383. return QDF_STATUS_E_NOMEM;
  384. }
  385. for (count = 0; count < num_alloc_desc; count++) {
  386. next = desc_list->next;
  387. qdf_prefetch(next);
  388. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  389. if (qdf_unlikely(!nbuf)) {
  390. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  391. break;
  392. }
  393. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  394. rx_desc_pool->buf_size);
  395. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  396. rxdma_srng);
  397. qdf_assert_always(rxdma_ring_entry);
  398. desc_list->rx_desc.nbuf = nbuf;
  399. desc_list->rx_desc.rx_buf_start = nbuf->data;
  400. desc_list->rx_desc.unmapped = 0;
  401. /* rx_desc.in_use should be zero at this time*/
  402. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  403. desc_list->rx_desc.in_use = 1;
  404. desc_list->rx_desc.in_err_state = 0;
  405. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  406. paddr,
  407. desc_list->rx_desc.cookie,
  408. rx_desc_pool->owner);
  409. desc_list = next;
  410. }
  411. qdf_dsb();
  412. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  413. /* No need to count the number of bytes received during replenish.
  414. * Therefore set replenish.pkts.bytes as 0.
  415. */
  416. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  417. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  418. /*
  419. * add any available free desc back to the free list
  420. */
  421. if (desc_list)
  422. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  423. mac_id, rx_desc_pool);
  424. return QDF_STATUS_SUCCESS;
  425. }
  426. QDF_STATUS
  427. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  428. struct dp_srng *dp_rxdma_srng,
  429. struct rx_desc_pool *rx_desc_pool,
  430. uint32_t num_req_buffers,
  431. union dp_rx_desc_list_elem_t **desc_list,
  432. union dp_rx_desc_list_elem_t **tail)
  433. {
  434. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  435. uint32_t count;
  436. void *rxdma_ring_entry;
  437. union dp_rx_desc_list_elem_t *next;
  438. void *rxdma_srng;
  439. qdf_nbuf_t nbuf;
  440. qdf_nbuf_t nbuf_next;
  441. qdf_nbuf_t nbuf_head = NULL;
  442. qdf_nbuf_t nbuf_tail = NULL;
  443. qdf_dma_addr_t paddr;
  444. rxdma_srng = dp_rxdma_srng->hal_srng;
  445. if (qdf_unlikely(!dp_pdev)) {
  446. dp_rx_err("%pK: pdev is null for mac_id = %d",
  447. soc, mac_id);
  448. return QDF_STATUS_E_FAILURE;
  449. }
  450. if (qdf_unlikely(!rxdma_srng)) {
  451. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  452. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  453. return QDF_STATUS_E_FAILURE;
  454. }
  455. /* Allocate required number of nbufs */
  456. for (count = 0; count < num_req_buffers; count++) {
  457. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  458. if (qdf_unlikely(!nbuf)) {
  459. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  460. /* Update num_req_buffers to nbufs allocated count */
  461. num_req_buffers = count;
  462. break;
  463. }
  464. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  465. rx_desc_pool->buf_size);
  466. QDF_NBUF_CB_PADDR(nbuf) = paddr;
  467. DP_RX_LIST_APPEND(nbuf_head,
  468. nbuf_tail,
  469. nbuf);
  470. }
  471. qdf_dsb();
  472. nbuf = nbuf_head;
  473. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  474. for (count = 0; count < num_req_buffers; count++) {
  475. next = (*desc_list)->next;
  476. nbuf_next = nbuf->next;
  477. qdf_prefetch(next);
  478. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  479. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  480. if (!rxdma_ring_entry)
  481. break;
  482. (*desc_list)->rx_desc.nbuf = nbuf;
  483. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  484. (*desc_list)->rx_desc.unmapped = 0;
  485. /* rx_desc.in_use should be zero at this time*/
  486. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  487. (*desc_list)->rx_desc.in_use = 1;
  488. (*desc_list)->rx_desc.in_err_state = 0;
  489. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  490. QDF_NBUF_CB_PADDR(nbuf),
  491. (*desc_list)->rx_desc.cookie,
  492. rx_desc_pool->owner);
  493. *desc_list = next;
  494. nbuf = nbuf_next;
  495. }
  496. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  497. /* No need to count the number of bytes received during replenish.
  498. * Therefore set replenish.pkts.bytes as 0.
  499. */
  500. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  501. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  502. /*
  503. * add any available free desc back to the free list
  504. */
  505. if (*desc_list)
  506. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  507. mac_id, rx_desc_pool);
  508. while (nbuf) {
  509. nbuf_next = nbuf->next;
  510. dp_rx_nbuf_unmap_pool(soc, rx_desc_pool, nbuf);
  511. qdf_nbuf_free(nbuf);
  512. nbuf = nbuf_next;
  513. }
  514. return QDF_STATUS_SUCCESS;
  515. }
  516. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  517. uint32_t mac_id,
  518. struct dp_srng *dp_rxdma_srng,
  519. struct rx_desc_pool *rx_desc_pool,
  520. uint32_t num_req_buffers)
  521. {
  522. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  523. uint32_t count;
  524. uint32_t nr_descs = 0;
  525. void *rxdma_ring_entry;
  526. union dp_rx_desc_list_elem_t *next;
  527. void *rxdma_srng;
  528. qdf_nbuf_t nbuf;
  529. qdf_dma_addr_t paddr;
  530. union dp_rx_desc_list_elem_t *desc_list = NULL;
  531. union dp_rx_desc_list_elem_t *tail = NULL;
  532. rxdma_srng = dp_rxdma_srng->hal_srng;
  533. if (qdf_unlikely(!dp_pdev)) {
  534. dp_rx_err("%pK: pdev is null for mac_id = %d",
  535. soc, mac_id);
  536. return QDF_STATUS_E_FAILURE;
  537. }
  538. if (qdf_unlikely(!rxdma_srng)) {
  539. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  540. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  541. return QDF_STATUS_E_FAILURE;
  542. }
  543. dp_rx_debug("%pK: requested %d buffers for replenish",
  544. soc, num_req_buffers);
  545. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  546. num_req_buffers, &desc_list, &tail);
  547. if (!nr_descs) {
  548. dp_err("no free rx_descs in freelist");
  549. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  550. return QDF_STATUS_E_NOMEM;
  551. }
  552. dp_debug("got %u RX descs for driver attach", nr_descs);
  553. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  554. for (count = 0; count < nr_descs; count++) {
  555. next = desc_list->next;
  556. qdf_prefetch(next);
  557. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  558. if (qdf_unlikely(!nbuf)) {
  559. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  560. break;
  561. }
  562. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  563. rx_desc_pool->buf_size);
  564. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  565. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  566. if (!rxdma_ring_entry)
  567. break;
  568. qdf_assert_always(rxdma_ring_entry);
  569. desc_list->rx_desc.nbuf = nbuf;
  570. desc_list->rx_desc.rx_buf_start = nbuf->data;
  571. desc_list->rx_desc.unmapped = 0;
  572. /* rx_desc.in_use should be zero at this time*/
  573. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  574. desc_list->rx_desc.in_use = 1;
  575. desc_list->rx_desc.in_err_state = 0;
  576. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  577. paddr,
  578. desc_list->rx_desc.cookie,
  579. rx_desc_pool->owner);
  580. desc_list = next;
  581. }
  582. qdf_dsb();
  583. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  584. /* No need to count the number of bytes received during replenish.
  585. * Therefore set replenish.pkts.bytes as 0.
  586. */
  587. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  588. return QDF_STATUS_SUCCESS;
  589. }
  590. #endif
  591. #ifdef DP_UMAC_HW_RESET_SUPPORT
  592. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  593. static inline
  594. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  595. uint32_t buf_size)
  596. {
  597. return dp_rx_nbuf_sync_no_dsb(dp_soc, nbuf, buf_size);
  598. }
  599. #else
  600. static inline
  601. qdf_dma_addr_t dp_rx_rep_retrieve_paddr(struct dp_soc *dp_soc, qdf_nbuf_t nbuf,
  602. uint32_t buf_size)
  603. {
  604. return qdf_nbuf_get_frag_paddr(nbuf, 0);
  605. }
  606. #endif
  607. /**
  608. * dp_rx_desc_replenish() - Replenish the rx descriptors one at a time
  609. * @soc: core txrx main context
  610. * @dp_rxdma_srng: rxdma ring
  611. * @rx_desc_pool: rx descriptor pool
  612. * @rx_desc:rx descriptor
  613. *
  614. * Return: void
  615. */
  616. static inline
  617. void dp_rx_desc_replenish(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  618. struct rx_desc_pool *rx_desc_pool,
  619. struct dp_rx_desc *rx_desc)
  620. {
  621. void *rxdma_srng;
  622. void *rxdma_ring_entry;
  623. qdf_dma_addr_t paddr;
  624. rxdma_srng = dp_rxdma_srng->hal_srng;
  625. /* No one else should be accessing the srng at this point */
  626. hal_srng_access_start_unlocked(soc->hal_soc, rxdma_srng);
  627. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  628. qdf_assert_always(rxdma_ring_entry);
  629. rx_desc->in_err_state = 0;
  630. paddr = dp_rx_rep_retrieve_paddr(soc, rx_desc->nbuf,
  631. rx_desc_pool->buf_size);
  632. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry, paddr,
  633. rx_desc->cookie, rx_desc_pool->owner);
  634. hal_srng_access_end_unlocked(soc->hal_soc, rxdma_srng);
  635. }
  636. void dp_rx_desc_reuse(struct dp_soc *soc, qdf_nbuf_t *nbuf_list)
  637. {
  638. int mac_id, i, j;
  639. union dp_rx_desc_list_elem_t *head = NULL;
  640. union dp_rx_desc_list_elem_t *tail = NULL;
  641. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  642. struct dp_srng *dp_rxdma_srng =
  643. &soc->rx_refill_buf_ring[mac_id];
  644. struct rx_desc_pool *rx_desc_pool = &soc->rx_desc_buf[mac_id];
  645. uint32_t rx_sw_desc_num = rx_desc_pool->pool_size;
  646. /* Only fill up 1/3 of the ring size */
  647. uint32_t num_req_decs;
  648. if (!dp_rxdma_srng || !dp_rxdma_srng->hal_srng ||
  649. !rx_desc_pool->array)
  650. continue;
  651. num_req_decs = dp_rxdma_srng->num_entries / 3;
  652. for (i = 0, j = 0; i < rx_sw_desc_num; i++) {
  653. struct dp_rx_desc *rx_desc =
  654. (struct dp_rx_desc *)&rx_desc_pool->array[i];
  655. if (rx_desc->in_use) {
  656. if (j < (dp_rxdma_srng->num_entries - 1)) {
  657. dp_rx_desc_replenish(soc, dp_rxdma_srng,
  658. rx_desc_pool,
  659. rx_desc);
  660. } else {
  661. dp_rx_nbuf_unmap(soc, rx_desc, 0);
  662. rx_desc->unmapped = 0;
  663. rx_desc->nbuf->next = *nbuf_list;
  664. *nbuf_list = rx_desc->nbuf;
  665. dp_rx_add_to_free_desc_list(&head,
  666. &tail,
  667. rx_desc);
  668. }
  669. j++;
  670. }
  671. }
  672. if (head)
  673. dp_rx_add_desc_list_to_free_list(soc, &head, &tail,
  674. mac_id, rx_desc_pool);
  675. /* If num of descs in use were less, then we need to replenish
  676. * the ring with some buffers
  677. */
  678. head = NULL;
  679. tail = NULL;
  680. if (j < (num_req_decs - 1))
  681. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  682. rx_desc_pool,
  683. ((num_req_decs - 1) - j),
  684. &head, &tail, true);
  685. }
  686. }
  687. #endif
  688. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  689. struct dp_srng *dp_rxdma_srng,
  690. struct rx_desc_pool *rx_desc_pool,
  691. uint32_t num_req_buffers,
  692. union dp_rx_desc_list_elem_t **desc_list,
  693. union dp_rx_desc_list_elem_t **tail,
  694. bool req_only, const char *func_name)
  695. {
  696. uint32_t num_alloc_desc;
  697. uint16_t num_desc_to_free = 0;
  698. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  699. uint32_t num_entries_avail;
  700. uint32_t count;
  701. uint32_t extra_buffers;
  702. int sync_hw_ptr = 1;
  703. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  704. void *rxdma_ring_entry;
  705. union dp_rx_desc_list_elem_t *next;
  706. QDF_STATUS ret;
  707. void *rxdma_srng;
  708. union dp_rx_desc_list_elem_t *desc_list_append = NULL;
  709. union dp_rx_desc_list_elem_t *tail_append = NULL;
  710. union dp_rx_desc_list_elem_t *temp_list = NULL;
  711. rxdma_srng = dp_rxdma_srng->hal_srng;
  712. if (qdf_unlikely(!dp_pdev)) {
  713. dp_rx_err("%pK: pdev is null for mac_id = %d",
  714. dp_soc, mac_id);
  715. return QDF_STATUS_E_FAILURE;
  716. }
  717. if (qdf_unlikely(!rxdma_srng)) {
  718. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  719. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  720. return QDF_STATUS_E_FAILURE;
  721. }
  722. dp_verbose_debug("%pK: requested %d buffers for replenish",
  723. dp_soc, num_req_buffers);
  724. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  725. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  726. rxdma_srng,
  727. sync_hw_ptr);
  728. dp_verbose_debug("%pK: no of available entries in rxdma ring: %d",
  729. dp_soc, num_entries_avail);
  730. if (!req_only && !(*desc_list) && (num_entries_avail >
  731. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  732. num_req_buffers = num_entries_avail;
  733. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  734. } else if (num_entries_avail < num_req_buffers) {
  735. num_desc_to_free = num_req_buffers - num_entries_avail;
  736. num_req_buffers = num_entries_avail;
  737. } else if ((*desc_list) &&
  738. dp_rxdma_srng->num_entries - num_entries_avail <
  739. CRITICAL_BUFFER_THRESHOLD) {
  740. /* set extra buffers to CRITICAL_BUFFER_THRESHOLD only if
  741. * total buff requested after adding extra buffers is less
  742. * than or equal to num entries available, else set it to max
  743. * possible additional buffers available at that moment
  744. */
  745. extra_buffers =
  746. ((num_req_buffers + CRITICAL_BUFFER_THRESHOLD) > num_entries_avail) ?
  747. (num_entries_avail - num_req_buffers) :
  748. CRITICAL_BUFFER_THRESHOLD;
  749. /* Append some free descriptors to tail */
  750. num_alloc_desc =
  751. dp_rx_get_free_desc_list(dp_soc, mac_id,
  752. rx_desc_pool,
  753. extra_buffers,
  754. &desc_list_append,
  755. &tail_append);
  756. if (num_alloc_desc) {
  757. temp_list = *desc_list;
  758. *desc_list = desc_list_append;
  759. tail_append->next = temp_list;
  760. num_req_buffers += num_alloc_desc;
  761. DP_STATS_DEC(dp_pdev,
  762. replenish.free_list,
  763. num_alloc_desc);
  764. } else
  765. dp_err_rl("%pK: no free rx_descs in freelist", dp_soc);
  766. }
  767. if (qdf_unlikely(!num_req_buffers)) {
  768. num_desc_to_free = num_req_buffers;
  769. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  770. goto free_descs;
  771. }
  772. /*
  773. * if desc_list is NULL, allocate the descs from freelist
  774. */
  775. if (!(*desc_list)) {
  776. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  777. rx_desc_pool,
  778. num_req_buffers,
  779. desc_list,
  780. tail);
  781. if (!num_alloc_desc) {
  782. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  783. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  784. num_req_buffers);
  785. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  786. return QDF_STATUS_E_NOMEM;
  787. }
  788. dp_verbose_debug("%pK: %d rx desc allocated", dp_soc,
  789. num_alloc_desc);
  790. num_req_buffers = num_alloc_desc;
  791. }
  792. count = 0;
  793. while (count < num_req_buffers) {
  794. /* Flag is set while pdev rx_desc_pool initialization */
  795. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  796. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  797. &nbuf_frag_info,
  798. dp_pdev,
  799. rx_desc_pool);
  800. else
  801. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  802. mac_id,
  803. num_entries_avail, &nbuf_frag_info,
  804. dp_pdev, rx_desc_pool);
  805. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  806. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  807. continue;
  808. break;
  809. }
  810. count++;
  811. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  812. rxdma_srng);
  813. qdf_assert_always(rxdma_ring_entry);
  814. next = (*desc_list)->next;
  815. /* Flag is set while pdev rx_desc_pool initialization */
  816. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  817. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  818. &nbuf_frag_info);
  819. else
  820. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  821. &nbuf_frag_info);
  822. /* rx_desc.in_use should be zero at this time*/
  823. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  824. (*desc_list)->rx_desc.in_use = 1;
  825. (*desc_list)->rx_desc.in_err_state = 0;
  826. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  827. func_name, RX_DESC_REPLENISHED);
  828. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  829. nbuf_frag_info.virt_addr.nbuf,
  830. (unsigned long long)(nbuf_frag_info.paddr),
  831. (*desc_list)->rx_desc.cookie);
  832. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  833. nbuf_frag_info.paddr,
  834. (*desc_list)->rx_desc.cookie,
  835. rx_desc_pool->owner);
  836. *desc_list = next;
  837. }
  838. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  839. num_req_buffers, count);
  840. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  841. dp_rx_schedule_refill_thread(dp_soc);
  842. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  843. count, num_desc_to_free);
  844. /* No need to count the number of bytes received during replenish.
  845. * Therefore set replenish.pkts.bytes as 0.
  846. */
  847. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  848. DP_STATS_INC(dp_pdev, replenish.free_list, num_req_buffers - count);
  849. free_descs:
  850. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  851. /*
  852. * add any available free desc back to the free list
  853. */
  854. if (*desc_list)
  855. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  856. mac_id, rx_desc_pool);
  857. return QDF_STATUS_SUCCESS;
  858. }
  859. qdf_export_symbol(__dp_rx_buffers_replenish);
  860. void
  861. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  862. struct dp_txrx_peer *txrx_peer, uint8_t link_id)
  863. {
  864. qdf_nbuf_t deliver_list_head = NULL;
  865. qdf_nbuf_t deliver_list_tail = NULL;
  866. qdf_nbuf_t nbuf;
  867. nbuf = nbuf_list;
  868. while (nbuf) {
  869. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  870. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  871. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  872. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  873. qdf_nbuf_len(nbuf), link_id);
  874. /*
  875. * reset the chfrag_start and chfrag_end bits in nbuf cb
  876. * as this is a non-amsdu pkt and RAW mode simulation expects
  877. * these bit s to be 0 for non-amsdu pkt.
  878. */
  879. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  880. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  881. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  882. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  883. }
  884. nbuf = next;
  885. }
  886. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  887. &deliver_list_tail);
  888. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  889. }
  890. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  891. #ifndef FEATURE_WDS
  892. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  893. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  894. {
  895. }
  896. #endif
  897. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  898. /**
  899. * dp_classify_critical_pkts() - API for marking critical packets
  900. * @soc: dp_soc context
  901. * @vdev: vdev on which packet is to be sent
  902. * @nbuf: nbuf that has to be classified
  903. *
  904. * The function parses the packet, identifies whether its a critical frame and
  905. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  906. * Code for marking which frames are CRITICAL is accessed via callback.
  907. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  908. *
  909. * Return: None
  910. */
  911. static
  912. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  913. qdf_nbuf_t nbuf)
  914. {
  915. if (vdev->tx_classify_critical_pkt_cb)
  916. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  917. }
  918. #else
  919. static inline
  920. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  921. qdf_nbuf_t nbuf)
  922. {
  923. }
  924. #endif
  925. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  926. static inline
  927. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  928. {
  929. qdf_nbuf_set_queue_mapping(nbuf, ring_id);
  930. }
  931. #else
  932. static inline
  933. void dp_rx_nbuf_queue_mapping_set(qdf_nbuf_t nbuf, uint8_t ring_id)
  934. {
  935. }
  936. #endif
  937. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  938. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  939. struct cdp_tid_rx_stats *tid_stats,
  940. uint8_t link_id)
  941. {
  942. uint16_t len;
  943. qdf_nbuf_t nbuf_copy;
  944. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  945. nbuf))
  946. return true;
  947. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf, link_id))
  948. return false;
  949. /* If the source peer in the isolation list
  950. * then dont forward instead push to bridge stack
  951. */
  952. if (dp_get_peer_isolation(ta_peer))
  953. return false;
  954. nbuf_copy = qdf_nbuf_copy(nbuf);
  955. if (!nbuf_copy)
  956. return false;
  957. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  958. qdf_mem_set(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  959. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  960. if (soc->arch_ops.dp_rx_intrabss_mcast_handler(soc, ta_peer,
  961. nbuf_copy,
  962. tid_stats,
  963. link_id))
  964. return false;
  965. /* Don't send packets if tx is paused */
  966. if (!soc->is_tx_pause &&
  967. !dp_tx_send((struct cdp_soc_t *)soc,
  968. ta_peer->vdev->vdev_id, nbuf_copy)) {
  969. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  970. len, link_id);
  971. tid_stats->intrabss_cnt++;
  972. } else {
  973. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  974. len, link_id);
  975. tid_stats->fail_cnt[INTRABSS_DROP]++;
  976. dp_rx_nbuf_free(nbuf_copy);
  977. }
  978. return false;
  979. }
  980. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  981. uint8_t tx_vdev_id,
  982. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  983. struct cdp_tid_rx_stats *tid_stats,
  984. uint8_t link_id)
  985. {
  986. uint16_t len;
  987. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  988. /* linearize the nbuf just before we send to
  989. * dp_tx_send()
  990. */
  991. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  992. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  993. return false;
  994. nbuf = qdf_nbuf_unshare(nbuf);
  995. if (!nbuf) {
  996. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  997. rx.intra_bss.fail,
  998. 1, len, link_id);
  999. /* return true even though the pkt is
  1000. * not forwarded. Basically skb_unshare
  1001. * failed and we want to continue with
  1002. * next nbuf.
  1003. */
  1004. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1005. return false;
  1006. }
  1007. }
  1008. qdf_mem_set(nbuf->cb, 0x0, sizeof(nbuf->cb));
  1009. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  1010. /* Don't send packets if tx is paused */
  1011. if (!soc->is_tx_pause && !dp_tx_send((struct cdp_soc_t *)soc,
  1012. tx_vdev_id, nbuf)) {
  1013. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  1014. len, link_id);
  1015. } else {
  1016. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  1017. len, link_id);
  1018. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1019. return false;
  1020. }
  1021. return true;
  1022. }
  1023. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1024. #ifdef MESH_MODE_SUPPORT
  1025. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1026. uint8_t *rx_tlv_hdr,
  1027. struct dp_txrx_peer *txrx_peer)
  1028. {
  1029. struct mesh_recv_hdr_s *rx_info = NULL;
  1030. uint32_t pkt_type;
  1031. uint32_t nss;
  1032. uint32_t rate_mcs;
  1033. uint32_t bw;
  1034. uint8_t primary_chan_num;
  1035. uint32_t center_chan_freq;
  1036. struct dp_soc *soc = vdev->pdev->soc;
  1037. struct dp_peer *peer;
  1038. struct dp_peer *primary_link_peer;
  1039. struct dp_soc *link_peer_soc;
  1040. cdp_peer_stats_param_t buf = {0};
  1041. /* fill recv mesh stats */
  1042. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  1043. /* upper layers are responsible to free this memory */
  1044. if (!rx_info) {
  1045. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  1046. vdev->pdev->soc);
  1047. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  1048. return;
  1049. }
  1050. rx_info->rs_flags = MESH_RXHDR_VER1;
  1051. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1052. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  1053. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  1054. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  1055. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  1056. if (peer) {
  1057. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  1058. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  1059. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  1060. rx_tlv_hdr);
  1061. if (vdev->osif_get_key)
  1062. vdev->osif_get_key(vdev->osif_vdev,
  1063. &rx_info->rs_decryptkey[0],
  1064. &peer->mac_addr.raw[0],
  1065. rx_info->rs_keyix);
  1066. }
  1067. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  1068. }
  1069. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  1070. txrx_peer->peer_id,
  1071. DP_MOD_ID_MESH);
  1072. if (qdf_likely(primary_link_peer)) {
  1073. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  1074. dp_monitor_peer_get_stats_param(link_peer_soc,
  1075. primary_link_peer,
  1076. cdp_peer_rx_snr, &buf);
  1077. rx_info->rs_snr = buf.rx_snr;
  1078. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  1079. }
  1080. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  1081. soc = vdev->pdev->soc;
  1082. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  1083. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  1084. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  1085. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  1086. soc->ctrl_psoc,
  1087. vdev->pdev->pdev_id,
  1088. center_chan_freq);
  1089. }
  1090. rx_info->rs_channel = primary_chan_num;
  1091. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1092. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1093. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1094. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1095. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  1096. (bw << 24);
  1097. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  1098. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  1099. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  1100. rx_info->rs_flags,
  1101. rx_info->rs_rssi,
  1102. rx_info->rs_channel,
  1103. rx_info->rs_ratephy1,
  1104. rx_info->rs_keyix,
  1105. rx_info->rs_snr);
  1106. }
  1107. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1108. uint8_t *rx_tlv_hdr)
  1109. {
  1110. union dp_align_mac_addr mac_addr;
  1111. struct dp_soc *soc = vdev->pdev->soc;
  1112. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  1113. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  1114. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1115. rx_tlv_hdr))
  1116. return QDF_STATUS_SUCCESS;
  1117. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  1118. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1119. rx_tlv_hdr))
  1120. return QDF_STATUS_SUCCESS;
  1121. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  1122. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  1123. rx_tlv_hdr) &&
  1124. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  1125. rx_tlv_hdr))
  1126. return QDF_STATUS_SUCCESS;
  1127. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  1128. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  1129. rx_tlv_hdr,
  1130. &mac_addr.raw[0]))
  1131. return QDF_STATUS_E_FAILURE;
  1132. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1133. &vdev->mac_addr.raw[0],
  1134. QDF_MAC_ADDR_SIZE))
  1135. return QDF_STATUS_SUCCESS;
  1136. }
  1137. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  1138. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  1139. rx_tlv_hdr,
  1140. &mac_addr.raw[0]))
  1141. return QDF_STATUS_E_FAILURE;
  1142. if (!qdf_mem_cmp(&mac_addr.raw[0],
  1143. &vdev->mac_addr.raw[0],
  1144. QDF_MAC_ADDR_SIZE))
  1145. return QDF_STATUS_SUCCESS;
  1146. }
  1147. }
  1148. return QDF_STATUS_E_FAILURE;
  1149. }
  1150. #else
  1151. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1152. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  1153. {
  1154. }
  1155. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  1156. uint8_t *rx_tlv_hdr)
  1157. {
  1158. return QDF_STATUS_E_FAILURE;
  1159. }
  1160. #endif
  1161. #ifdef RX_PEER_INVALID_ENH
  1162. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1163. uint8_t mac_id)
  1164. {
  1165. struct dp_invalid_peer_msg msg;
  1166. struct dp_vdev *vdev = NULL;
  1167. struct dp_pdev *pdev = NULL;
  1168. struct ieee80211_frame *wh;
  1169. qdf_nbuf_t curr_nbuf, next_nbuf;
  1170. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1171. uint8_t *rx_pkt_hdr = NULL;
  1172. int i = 0;
  1173. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  1174. dp_rx_debug("%pK: Drop decapped frames", soc);
  1175. goto free;
  1176. }
  1177. /* In RAW packet, packet header will be part of data */
  1178. rx_pkt_hdr = rx_tlv_hdr + soc->rx_pkt_tlv_size;
  1179. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1180. if (!DP_FRAME_IS_DATA(wh)) {
  1181. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  1182. goto free;
  1183. }
  1184. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1185. dp_rx_err("%pK: Invalid nbuf length", soc);
  1186. goto free;
  1187. }
  1188. /* In DMAC case the rx_desc_pools are common across PDEVs
  1189. * so PDEV cannot be derived from the pool_id.
  1190. *
  1191. * link_id need to derived from the TLV tag word which is
  1192. * disabled by default. For now adding a WAR to get vdev
  1193. * with brute force this need to fixed with word based subscription
  1194. * support is added by enabling TLV tag word
  1195. */
  1196. if (soc->features.dmac_cmn_src_rxbuf_ring_enabled) {
  1197. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1198. pdev = soc->pdev_list[i];
  1199. if (!pdev || qdf_unlikely(pdev->is_pdev_down))
  1200. continue;
  1201. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1202. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1203. QDF_MAC_ADDR_SIZE) == 0) {
  1204. goto out;
  1205. }
  1206. }
  1207. }
  1208. } else {
  1209. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1210. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1211. dp_rx_err("%pK: PDEV %s",
  1212. soc, !pdev ? "not found" : "down");
  1213. goto free;
  1214. }
  1215. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1216. QDF_STATUS_SUCCESS)
  1217. return 0;
  1218. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1219. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1220. QDF_MAC_ADDR_SIZE) == 0) {
  1221. goto out;
  1222. }
  1223. }
  1224. }
  1225. if (!vdev) {
  1226. dp_rx_err("%pK: VDEV not found", soc);
  1227. goto free;
  1228. }
  1229. out:
  1230. msg.wh = wh;
  1231. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1232. msg.nbuf = mpdu;
  1233. msg.vdev_id = vdev->vdev_id;
  1234. /*
  1235. * NOTE: Only valid for HKv1.
  1236. * If smart monitor mode is enabled on RE, we are getting invalid
  1237. * peer frames with RA as STA mac of RE and the TA not matching
  1238. * with any NAC list or the the BSSID.Such frames need to dropped
  1239. * in order to avoid HM_WDS false addition.
  1240. */
  1241. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1242. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1243. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1244. soc, wh->i_addr1);
  1245. goto free;
  1246. }
  1247. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1248. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1249. pdev->pdev_id, &msg);
  1250. }
  1251. free:
  1252. /* Drop and free packet */
  1253. curr_nbuf = mpdu;
  1254. while (curr_nbuf) {
  1255. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1256. dp_rx_nbuf_free(curr_nbuf);
  1257. curr_nbuf = next_nbuf;
  1258. }
  1259. return 0;
  1260. }
  1261. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1262. qdf_nbuf_t mpdu, bool mpdu_done,
  1263. uint8_t mac_id)
  1264. {
  1265. /* Only trigger the process when mpdu is completed */
  1266. if (mpdu_done)
  1267. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1268. }
  1269. #else
  1270. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1271. uint8_t mac_id)
  1272. {
  1273. qdf_nbuf_t curr_nbuf, next_nbuf;
  1274. struct dp_pdev *pdev;
  1275. struct dp_vdev *vdev = NULL;
  1276. struct ieee80211_frame *wh;
  1277. struct dp_peer *peer = NULL;
  1278. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1279. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1280. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1281. if (!DP_FRAME_IS_DATA(wh)) {
  1282. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1283. "only for data frames");
  1284. goto free;
  1285. }
  1286. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1287. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  1288. goto free;
  1289. }
  1290. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1291. if (!pdev) {
  1292. dp_rx_info_rl("%pK: PDEV not found", soc);
  1293. goto free;
  1294. }
  1295. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1296. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1297. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1298. QDF_MAC_ADDR_SIZE) == 0) {
  1299. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1300. goto out;
  1301. }
  1302. }
  1303. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1304. if (!vdev) {
  1305. dp_rx_info_rl("%pK: VDEV not found", soc);
  1306. goto free;
  1307. }
  1308. out:
  1309. if (vdev->opmode == wlan_op_mode_ap) {
  1310. peer = dp_peer_find_hash_find(soc, wh->i_addr2, 0,
  1311. vdev->vdev_id,
  1312. DP_MOD_ID_RX_ERR);
  1313. /* If SA is a valid peer in vdev,
  1314. * don't send disconnect
  1315. */
  1316. if (peer) {
  1317. dp_peer_unref_delete(peer, DP_MOD_ID_RX_ERR);
  1318. DP_STATS_INC(soc, rx.err.decrypt_err_drop, 1);
  1319. dp_err_rl("invalid peer frame with correct SA/RA is freed");
  1320. goto free;
  1321. }
  1322. }
  1323. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1324. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1325. free:
  1326. /* Drop and free packet */
  1327. curr_nbuf = mpdu;
  1328. while (curr_nbuf) {
  1329. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1330. dp_rx_nbuf_free(curr_nbuf);
  1331. curr_nbuf = next_nbuf;
  1332. }
  1333. /* Reset the head and tail pointers */
  1334. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1335. if (pdev) {
  1336. pdev->invalid_peer_head_msdu = NULL;
  1337. pdev->invalid_peer_tail_msdu = NULL;
  1338. }
  1339. return 0;
  1340. }
  1341. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1342. qdf_nbuf_t mpdu, bool mpdu_done,
  1343. uint8_t mac_id)
  1344. {
  1345. /* Process the nbuf */
  1346. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1347. }
  1348. #endif
  1349. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1350. #ifdef RECEIVE_OFFLOAD
  1351. /**
  1352. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1353. * @soc: dp soc handle
  1354. * @msdu: MSDU for which the offload info is to be printed
  1355. *
  1356. * Return: None
  1357. */
  1358. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1359. qdf_nbuf_t msdu)
  1360. {
  1361. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1362. dp_verbose_debug("lro_eligible 0x%x",
  1363. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1364. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1365. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1366. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1367. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1368. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1369. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1370. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1371. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1372. dp_verbose_debug("---------------------------------------------------------");
  1373. }
  1374. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1375. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1376. {
  1377. struct hal_offload_info offload_info;
  1378. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1379. return;
  1380. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1381. return;
  1382. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1383. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1384. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1385. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1386. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1387. rx_tlv);
  1388. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1389. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1390. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1391. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1392. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1393. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1394. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1395. dp_rx_print_offload_info(soc, msdu);
  1396. }
  1397. #endif /* RECEIVE_OFFLOAD */
  1398. /**
  1399. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1400. *
  1401. * @soc: DP soc handle
  1402. * @nbuf: pointer to msdu.
  1403. * @mpdu_len: mpdu length
  1404. * @l3_pad_len: L3 padding length by HW
  1405. *
  1406. * Return: returns true if nbuf is last msdu of mpdu else returns false.
  1407. */
  1408. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1409. qdf_nbuf_t nbuf,
  1410. uint16_t *mpdu_len,
  1411. uint32_t l3_pad_len)
  1412. {
  1413. bool last_nbuf;
  1414. uint32_t pkt_hdr_size;
  1415. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1416. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1417. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1418. last_nbuf = false;
  1419. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1420. } else {
  1421. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1422. last_nbuf = true;
  1423. *mpdu_len = 0;
  1424. }
  1425. return last_nbuf;
  1426. }
  1427. /**
  1428. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1429. *
  1430. * @soc: DP soc handle
  1431. * @nbuf: pointer to msdu.
  1432. *
  1433. * Return: returns padding length in bytes.
  1434. */
  1435. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1436. qdf_nbuf_t nbuf)
  1437. {
  1438. uint32_t l3_hdr_pad = 0;
  1439. uint8_t *rx_tlv_hdr;
  1440. struct hal_rx_msdu_metadata msdu_metadata;
  1441. while (nbuf) {
  1442. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1443. /* scattered msdu end with continuation is 0 */
  1444. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1445. hal_rx_msdu_metadata_get(soc->hal_soc,
  1446. rx_tlv_hdr,
  1447. &msdu_metadata);
  1448. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1449. break;
  1450. }
  1451. nbuf = nbuf->next;
  1452. }
  1453. return l3_hdr_pad;
  1454. }
  1455. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1456. {
  1457. qdf_nbuf_t parent, frag_list, next = NULL;
  1458. uint16_t frag_list_len = 0;
  1459. uint16_t mpdu_len;
  1460. bool last_nbuf;
  1461. uint32_t l3_hdr_pad_offset = 0;
  1462. /*
  1463. * Use msdu len got from REO entry descriptor instead since
  1464. * there is case the RX PKT TLV is corrupted while msdu_len
  1465. * from REO descriptor is right for non-raw RX scatter msdu.
  1466. */
  1467. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1468. /*
  1469. * this is a case where the complete msdu fits in one single nbuf.
  1470. * in this case HW sets both start and end bit and we only need to
  1471. * reset these bits for RAW mode simulator to decap the pkt
  1472. */
  1473. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1474. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1475. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1476. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1477. return nbuf;
  1478. }
  1479. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1480. /*
  1481. * This is a case where we have multiple msdus (A-MSDU) spread across
  1482. * multiple nbufs. here we create a fraglist out of these nbufs.
  1483. *
  1484. * the moment we encounter a nbuf with continuation bit set we
  1485. * know for sure we have an MSDU which is spread across multiple
  1486. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1487. */
  1488. parent = nbuf;
  1489. frag_list = nbuf->next;
  1490. nbuf = nbuf->next;
  1491. /*
  1492. * set the start bit in the first nbuf we encounter with continuation
  1493. * bit set. This has the proper mpdu length set as it is the first
  1494. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1495. * nbufs will form the frag_list of the parent nbuf.
  1496. */
  1497. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1498. /*
  1499. * L3 header padding is only needed for the 1st buffer
  1500. * in a scattered msdu
  1501. */
  1502. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1503. l3_hdr_pad_offset);
  1504. /*
  1505. * MSDU cont bit is set but reported MPDU length can fit
  1506. * in to single buffer
  1507. *
  1508. * Increment error stats and avoid SG list creation
  1509. */
  1510. if (last_nbuf) {
  1511. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1512. qdf_nbuf_pull_head(parent,
  1513. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1514. return parent;
  1515. }
  1516. /*
  1517. * this is where we set the length of the fragments which are
  1518. * associated to the parent nbuf. We iterate through the frag_list
  1519. * till we hit the last_nbuf of the list.
  1520. */
  1521. do {
  1522. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1523. qdf_nbuf_pull_head(nbuf,
  1524. soc->rx_pkt_tlv_size);
  1525. frag_list_len += qdf_nbuf_len(nbuf);
  1526. if (last_nbuf) {
  1527. next = nbuf->next;
  1528. nbuf->next = NULL;
  1529. break;
  1530. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1531. dp_err("Invalid packet length\n");
  1532. qdf_assert_always(0);
  1533. }
  1534. nbuf = nbuf->next;
  1535. } while (!last_nbuf);
  1536. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1537. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1538. parent->next = next;
  1539. qdf_nbuf_pull_head(parent,
  1540. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1541. return parent;
  1542. }
  1543. #ifdef DP_RX_SG_FRAME_SUPPORT
  1544. bool dp_rx_is_sg_supported(void)
  1545. {
  1546. return true;
  1547. }
  1548. #else
  1549. bool dp_rx_is_sg_supported(void)
  1550. {
  1551. return false;
  1552. }
  1553. #endif
  1554. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1555. #ifdef QCA_PEER_EXT_STATS
  1556. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1557. qdf_nbuf_t nbuf)
  1558. {
  1559. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1560. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1561. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1562. }
  1563. #endif /* QCA_PEER_EXT_STATS */
  1564. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1565. {
  1566. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1567. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1568. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1569. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1570. uint32_t interframe_delay =
  1571. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1572. struct cdp_tid_rx_stats *rstats =
  1573. &vdev->pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1574. dp_update_delay_stats(NULL, rstats, to_stack, tid,
  1575. CDP_DELAY_STATS_REAP_STACK, ring_id, false);
  1576. /*
  1577. * Update interframe delay stats calculated at deliver_data_ol point.
  1578. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1579. * interframe delay will not be calculate correctly for 1st frame.
  1580. * On the other side, this will help in avoiding extra per packet check
  1581. * of vdev->prev_rx_deliver_tstamp.
  1582. */
  1583. dp_update_delay_stats(NULL, rstats, interframe_delay, tid,
  1584. CDP_DELAY_STATS_RX_INTERFRAME, ring_id, false);
  1585. vdev->prev_rx_deliver_tstamp = current_ts;
  1586. }
  1587. /**
  1588. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1589. * @pdev: dp pdev reference
  1590. * @buf_list: buffer list to be dropepd
  1591. *
  1592. * Return: int (number of bufs dropped)
  1593. */
  1594. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1595. qdf_nbuf_t buf_list)
  1596. {
  1597. struct cdp_tid_rx_stats *stats = NULL;
  1598. uint8_t tid = 0, ring_id = 0;
  1599. int num_dropped = 0;
  1600. qdf_nbuf_t buf, next_buf;
  1601. buf = buf_list;
  1602. while (buf) {
  1603. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1604. next_buf = qdf_nbuf_queue_next(buf);
  1605. tid = qdf_nbuf_get_tid_val(buf);
  1606. if (qdf_likely(pdev)) {
  1607. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1608. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1609. stats->delivered_to_stack--;
  1610. }
  1611. dp_rx_nbuf_free(buf);
  1612. buf = next_buf;
  1613. num_dropped++;
  1614. }
  1615. return num_dropped;
  1616. }
  1617. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1618. /**
  1619. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1620. * @soc: core txrx main context
  1621. * @vdev: vdev
  1622. * @txrx_peer: txrx peer
  1623. * @nbuf_head: skb list head
  1624. *
  1625. * Return: true if packet is delivered to netdev per STA.
  1626. */
  1627. static inline bool
  1628. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1629. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1630. {
  1631. /*
  1632. * When extended WDS is disabled, frames are sent to AP netdevice.
  1633. */
  1634. if (qdf_likely(!vdev->wds_ext_enabled))
  1635. return false;
  1636. /*
  1637. * There can be 2 cases:
  1638. * 1. Send frame to parent netdev if its not for netdev per STA
  1639. * 2. If frame is meant for netdev per STA:
  1640. * a. Send frame to appropriate netdev using registered fp.
  1641. * b. If fp is NULL, drop the frames.
  1642. */
  1643. if (!txrx_peer->wds_ext.init)
  1644. return false;
  1645. if (txrx_peer->osif_rx)
  1646. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1647. else
  1648. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1649. return true;
  1650. }
  1651. #else
  1652. static inline bool
  1653. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1654. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1655. {
  1656. return false;
  1657. }
  1658. #endif
  1659. #ifdef PEER_CACHE_RX_PKTS
  1660. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1661. {
  1662. struct dp_peer_cached_bufq *bufqi;
  1663. struct dp_rx_cached_buf *cache_buf = NULL;
  1664. ol_txrx_rx_fp data_rx = NULL;
  1665. int num_buff_elem;
  1666. QDF_STATUS status;
  1667. /*
  1668. * Flush dp cached frames only for mld peers and legacy peers, as
  1669. * link peers don't store cached frames
  1670. */
  1671. if (IS_MLO_DP_LINK_PEER(peer))
  1672. return;
  1673. if (!peer->txrx_peer) {
  1674. dp_err("txrx_peer NULL!! peer mac_addr("QDF_MAC_ADDR_FMT")",
  1675. QDF_MAC_ADDR_REF(peer->mac_addr.raw));
  1676. return;
  1677. }
  1678. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1679. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1680. return;
  1681. }
  1682. qdf_spin_lock_bh(&peer->peer_info_lock);
  1683. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1684. data_rx = peer->vdev->osif_rx;
  1685. else
  1686. drop = true;
  1687. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1688. bufqi = &peer->txrx_peer->bufq_info;
  1689. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1690. qdf_list_remove_front(&bufqi->cached_bufq,
  1691. (qdf_list_node_t **)&cache_buf);
  1692. while (cache_buf) {
  1693. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1694. cache_buf->buf);
  1695. bufqi->entries -= num_buff_elem;
  1696. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1697. if (drop) {
  1698. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1699. cache_buf->buf);
  1700. } else {
  1701. /* Flush the cached frames to OSIF DEV */
  1702. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1703. if (status != QDF_STATUS_SUCCESS)
  1704. bufqi->dropped = dp_rx_drop_nbuf_list(
  1705. peer->vdev->pdev,
  1706. cache_buf->buf);
  1707. }
  1708. qdf_mem_free(cache_buf);
  1709. cache_buf = NULL;
  1710. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1711. qdf_list_remove_front(&bufqi->cached_bufq,
  1712. (qdf_list_node_t **)&cache_buf);
  1713. }
  1714. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1715. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1716. }
  1717. /**
  1718. * dp_rx_enqueue_rx() - cache rx frames
  1719. * @peer: peer
  1720. * @txrx_peer: DP txrx_peer
  1721. * @rx_buf_list: cache buffer list
  1722. *
  1723. * Return: None
  1724. */
  1725. static QDF_STATUS
  1726. dp_rx_enqueue_rx(struct dp_peer *peer,
  1727. struct dp_txrx_peer *txrx_peer,
  1728. qdf_nbuf_t rx_buf_list)
  1729. {
  1730. struct dp_rx_cached_buf *cache_buf;
  1731. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1732. int num_buff_elem;
  1733. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1734. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1735. struct dp_peer *ta_peer = NULL;
  1736. /*
  1737. * If peer id is invalid which likely peer map has not completed,
  1738. * then need caller provide dp_peer pointer, else it's ok to use
  1739. * txrx_peer->peer_id to get dp_peer.
  1740. */
  1741. if (peer) {
  1742. if (QDF_STATUS_SUCCESS ==
  1743. dp_peer_get_ref(soc, peer, DP_MOD_ID_RX))
  1744. ta_peer = peer;
  1745. } else {
  1746. ta_peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1747. DP_MOD_ID_RX);
  1748. }
  1749. if (!ta_peer) {
  1750. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1751. rx_buf_list);
  1752. return QDF_STATUS_E_INVAL;
  1753. }
  1754. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1755. bufqi->dropped);
  1756. if (!ta_peer->valid) {
  1757. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1758. rx_buf_list);
  1759. ret = QDF_STATUS_E_INVAL;
  1760. goto fail;
  1761. }
  1762. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1763. if (bufqi->entries >= bufqi->thresh) {
  1764. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1765. rx_buf_list);
  1766. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1767. ret = QDF_STATUS_E_RESOURCES;
  1768. goto fail;
  1769. }
  1770. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1771. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1772. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1773. if (!cache_buf) {
  1774. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1775. "Failed to allocate buf to cache rx frames");
  1776. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1777. rx_buf_list);
  1778. ret = QDF_STATUS_E_NOMEM;
  1779. goto fail;
  1780. }
  1781. cache_buf->buf = rx_buf_list;
  1782. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1783. qdf_list_insert_back(&bufqi->cached_bufq,
  1784. &cache_buf->node);
  1785. bufqi->entries += num_buff_elem;
  1786. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1787. fail:
  1788. dp_peer_unref_delete(ta_peer, DP_MOD_ID_RX);
  1789. return ret;
  1790. }
  1791. static inline
  1792. bool dp_rx_is_peer_cache_bufq_supported(void)
  1793. {
  1794. return true;
  1795. }
  1796. #else
  1797. static inline
  1798. bool dp_rx_is_peer_cache_bufq_supported(void)
  1799. {
  1800. return false;
  1801. }
  1802. static inline QDF_STATUS
  1803. dp_rx_enqueue_rx(struct dp_peer *peer,
  1804. struct dp_txrx_peer *txrx_peer,
  1805. qdf_nbuf_t rx_buf_list)
  1806. {
  1807. return QDF_STATUS_SUCCESS;
  1808. }
  1809. #endif
  1810. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1811. /**
  1812. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1813. * using the appropriate call back functions.
  1814. * @soc: soc
  1815. * @vdev: vdev
  1816. * @txrx_peer: peer
  1817. * @nbuf_head: skb list head
  1818. *
  1819. * Return: None
  1820. */
  1821. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1822. struct dp_vdev *vdev,
  1823. struct dp_txrx_peer *txrx_peer,
  1824. qdf_nbuf_t nbuf_head)
  1825. {
  1826. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1827. txrx_peer, nbuf_head)))
  1828. return;
  1829. /* Function pointer initialized only when FISA is enabled */
  1830. if (vdev->osif_fisa_rx)
  1831. /* on failure send it via regular path */
  1832. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1833. else
  1834. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1835. }
  1836. #else
  1837. /**
  1838. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1839. * using the appropriate call back functions.
  1840. * @soc: soc
  1841. * @vdev: vdev
  1842. * @txrx_peer: txrx peer
  1843. * @nbuf_head: skb list head
  1844. *
  1845. * Check the return status of the call back function and drop
  1846. * the packets if the return status indicates a failure.
  1847. *
  1848. * Return: None
  1849. */
  1850. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1851. struct dp_vdev *vdev,
  1852. struct dp_txrx_peer *txrx_peer,
  1853. qdf_nbuf_t nbuf_head)
  1854. {
  1855. int num_nbuf = 0;
  1856. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1857. /* Function pointer initialized only when FISA is enabled */
  1858. if (vdev->osif_fisa_rx)
  1859. /* on failure send it via regular path */
  1860. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1861. else if (vdev->osif_rx)
  1862. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1863. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1864. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1865. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1866. if (txrx_peer)
  1867. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1868. num_nbuf);
  1869. }
  1870. }
  1871. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1872. /**
  1873. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1874. * @soc: DP soc
  1875. * @vdev: DP vdev handle
  1876. * @txrx_peer: pointer to the txrx peer object
  1877. * @nbuf_head: skb list head
  1878. *
  1879. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1880. * QDF_STATUS_E_FAILURE
  1881. */
  1882. static inline QDF_STATUS
  1883. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1884. struct dp_vdev *vdev,
  1885. struct dp_txrx_peer *txrx_peer,
  1886. qdf_nbuf_t nbuf_head)
  1887. {
  1888. int num_nbuf;
  1889. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1890. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1891. /*
  1892. * This is a special case where vdev is invalid,
  1893. * so we cannot know the pdev to which this packet
  1894. * belonged. Hence we update the soc rx error stats.
  1895. */
  1896. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1897. return QDF_STATUS_E_FAILURE;
  1898. }
  1899. /*
  1900. * highly unlikely to have a vdev without a registered rx
  1901. * callback function. if so let us free the nbuf_list.
  1902. */
  1903. if (qdf_unlikely(!vdev->osif_rx)) {
  1904. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  1905. dp_rx_enqueue_rx(NULL, txrx_peer, nbuf_head);
  1906. } else {
  1907. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1908. nbuf_head);
  1909. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  1910. vdev->pdev->enhanced_stats_en);
  1911. }
  1912. return QDF_STATUS_E_FAILURE;
  1913. }
  1914. return QDF_STATUS_SUCCESS;
  1915. }
  1916. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1917. struct dp_vdev *vdev,
  1918. struct dp_txrx_peer *txrx_peer,
  1919. qdf_nbuf_t nbuf_head,
  1920. qdf_nbuf_t nbuf_tail)
  1921. {
  1922. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1923. QDF_STATUS_SUCCESS)
  1924. return QDF_STATUS_E_FAILURE;
  1925. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1926. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1927. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1928. &nbuf_tail);
  1929. }
  1930. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  1931. return QDF_STATUS_SUCCESS;
  1932. }
  1933. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1934. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1935. struct dp_vdev *vdev,
  1936. struct dp_txrx_peer *txrx_peer,
  1937. qdf_nbuf_t nbuf_head,
  1938. qdf_nbuf_t nbuf_tail)
  1939. {
  1940. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1941. QDF_STATUS_SUCCESS)
  1942. return QDF_STATUS_E_FAILURE;
  1943. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  1944. return QDF_STATUS_SUCCESS;
  1945. }
  1946. #endif
  1947. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1948. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1949. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  1950. { \
  1951. qdf_nbuf_t nbuf_local; \
  1952. struct dp_txrx_peer *txrx_peer_local; \
  1953. struct dp_vdev *vdev_local = vdev_hdl; \
  1954. do { \
  1955. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1956. break; \
  1957. nbuf_local = nbuf; \
  1958. txrx_peer_local = txrx_peer; \
  1959. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1960. break; \
  1961. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1962. break; \
  1963. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1964. (nbuf_local), \
  1965. (txrx_peer_local), 0, 1); \
  1966. } while (0); \
  1967. }
  1968. #else
  1969. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  1970. #endif
  1971. #ifdef FEATURE_RX_LINKSPEED_ROAM_TRIGGER
  1972. /**
  1973. * dp_rx_rates_stats_update() - update rate stats
  1974. * from rx msdu.
  1975. * @soc: datapath soc handle
  1976. * @nbuf: received msdu buffer
  1977. * @rx_tlv_hdr: rx tlv header
  1978. * @txrx_peer: datapath txrx_peer handle
  1979. * @sgi: Short Guard Interval
  1980. * @mcs: Modulation and Coding Set
  1981. * @nss: Number of Spatial Streams
  1982. * @bw: BandWidth
  1983. * @pkt_type: Corresponds to preamble
  1984. * @link_id: Link Id on which packet is received
  1985. *
  1986. * To be precisely record rates, following factors are considered:
  1987. * Exclude specific frames, ARP, DHCP, ssdp, etc.
  1988. * Make sure to affect rx throughput as least as possible.
  1989. *
  1990. * Return: void
  1991. */
  1992. static void
  1993. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1994. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  1995. uint32_t sgi, uint32_t mcs,
  1996. uint32_t nss, uint32_t bw, uint32_t pkt_type,
  1997. uint8_t link_id)
  1998. {
  1999. uint32_t rix;
  2000. uint16_t ratecode;
  2001. uint32_t avg_rx_rate;
  2002. uint32_t ratekbps;
  2003. enum cdp_punctured_modes punc_mode = NO_PUNCTURE;
  2004. if (soc->high_throughput ||
  2005. dp_rx_data_is_specific(soc->hal_soc, rx_tlv_hdr, nbuf)) {
  2006. return;
  2007. }
  2008. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.rx_rate, mcs, link_id);
  2009. /* In 11b mode, the nss we get from tlv is 0, invalid and should be 1 */
  2010. if (qdf_unlikely(pkt_type == DOT11_B))
  2011. nss = 1;
  2012. /* here pkt_type corresponds to preamble */
  2013. ratekbps = dp_getrateindex(sgi,
  2014. mcs,
  2015. nss - 1,
  2016. pkt_type,
  2017. bw,
  2018. punc_mode,
  2019. &rix,
  2020. &ratecode);
  2021. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.last_rx_rate, ratekbps, link_id);
  2022. avg_rx_rate =
  2023. dp_ath_rate_lpf(
  2024. txrx_peer->stats[link_id].extd_stats.rx.avg_rx_rate,
  2025. ratekbps);
  2026. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.avg_rx_rate, avg_rx_rate, link_id);
  2027. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.nss_info, nss, link_id);
  2028. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.mcs_info, mcs, link_id);
  2029. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.bw_info, bw, link_id);
  2030. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.gi_info, sgi, link_id);
  2031. DP_PEER_EXTD_STATS_UPD(txrx_peer, rx.preamble_info, pkt_type, link_id);
  2032. }
  2033. #else
  2034. static inline void
  2035. dp_rx_rates_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2036. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *txrx_peer,
  2037. uint32_t sgi, uint32_t mcs,
  2038. uint32_t nss, uint32_t bw, uint32_t pkt_type)
  2039. {
  2040. }
  2041. #endif /* FEATURE_RX_LINKSPEED_ROAM_TRIGGER */
  2042. #ifndef QCA_ENHANCED_STATS_SUPPORT
  2043. /**
  2044. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  2045. *
  2046. * @soc: datapath soc handle
  2047. * @nbuf: received msdu buffer
  2048. * @rx_tlv_hdr: rx tlv header
  2049. * @txrx_peer: datapath txrx_peer handle
  2050. * @link_id: link id on which the packet is received
  2051. *
  2052. * Return: void
  2053. */
  2054. static inline
  2055. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2056. uint8_t *rx_tlv_hdr,
  2057. struct dp_txrx_peer *txrx_peer,
  2058. uint8_t link_id)
  2059. {
  2060. bool is_ampdu;
  2061. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  2062. uint8_t dst_mcs_idx;
  2063. /*
  2064. * TODO - For KIWI this field is present in ring_desc
  2065. * Try to use ring desc instead of tlv.
  2066. */
  2067. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  2068. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu, link_id);
  2069. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu),
  2070. link_id);
  2071. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  2072. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  2073. tid = qdf_nbuf_get_tid_val(nbuf);
  2074. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  2075. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  2076. rx_tlv_hdr);
  2077. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  2078. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  2079. /* do HW to SW pkt type conversion */
  2080. pkt_type = (pkt_type >= HAL_DOT11_MAX ? DOT11_MAX :
  2081. hal_2_dp_pkt_type_map[pkt_type]);
  2082. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  2083. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2084. link_id);
  2085. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  2086. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)),
  2087. link_id);
  2088. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1, link_id);
  2089. /*
  2090. * only if nss > 0 and pkt_type is 11N/AC/AX,
  2091. * then increase index [nss - 1] in array counter.
  2092. */
  2093. if (nss > 0 && CDP_IS_PKT_TYPE_SUPPORT_NSS(pkt_type))
  2094. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1, link_id);
  2095. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1, link_id);
  2096. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  2097. hal_rx_tlv_mic_err_get(soc->hal_soc,
  2098. rx_tlv_hdr), link_id);
  2099. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  2100. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  2101. rx_tlv_hdr), link_id);
  2102. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1,
  2103. link_id);
  2104. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1,
  2105. link_id);
  2106. dst_mcs_idx = dp_get_mcs_array_index_by_pkt_type_mcs(pkt_type, mcs);
  2107. if (MCS_INVALID_ARRAY_INDEX != dst_mcs_idx)
  2108. DP_PEER_EXTD_STATS_INC(txrx_peer,
  2109. rx.pkt_type[pkt_type].mcs_count[dst_mcs_idx],
  2110. 1, link_id);
  2111. dp_rx_rates_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  2112. sgi, mcs, nss, bw, pkt_type, link_id);
  2113. }
  2114. #else
  2115. static inline
  2116. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2117. uint8_t *rx_tlv_hdr,
  2118. struct dp_txrx_peer *txrx_peer,
  2119. uint8_t link_id)
  2120. {
  2121. }
  2122. #endif
  2123. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  2124. static inline void
  2125. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2126. qdf_nbuf_t nbuf, uint8_t link_id)
  2127. {
  2128. uint8_t lmac_id = qdf_nbuf_get_lmac_id(nbuf);
  2129. if (qdf_unlikely(lmac_id >= CDP_MAX_LMACS)) {
  2130. dp_err_rl("Invalid lmac_id: %u vdev_id: %u",
  2131. lmac_id, QDF_NBUF_CB_RX_VDEV_ID(nbuf));
  2132. if (qdf_likely(txrx_peer))
  2133. dp_err_rl("peer_id: %u", txrx_peer->peer_id);
  2134. return;
  2135. }
  2136. /* only count stats per lmac for MLO connection*/
  2137. DP_PEER_PER_PKT_STATS_INCC_PKT(txrx_peer, rx.rx_lmac[lmac_id], 1,
  2138. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  2139. txrx_peer->is_mld_peer, link_id);
  2140. }
  2141. #else
  2142. static inline void
  2143. dp_peer_update_rx_pkt_per_lmac(struct dp_txrx_peer *txrx_peer,
  2144. qdf_nbuf_t nbuf, uint8_t link_id)
  2145. {
  2146. }
  2147. #endif
  2148. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2149. uint8_t *rx_tlv_hdr,
  2150. struct dp_txrx_peer *txrx_peer,
  2151. uint8_t ring_id,
  2152. struct cdp_tid_rx_stats *tid_stats,
  2153. uint8_t link_id)
  2154. {
  2155. bool is_not_amsdu;
  2156. struct dp_vdev *vdev = txrx_peer->vdev;
  2157. uint8_t enh_flag;
  2158. qdf_ether_header_t *eh;
  2159. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2160. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  2161. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  2162. qdf_nbuf_is_rx_chfrag_end(nbuf);
  2163. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  2164. msdu_len, link_id);
  2165. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  2166. is_not_amsdu, link_id);
  2167. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1,
  2168. !is_not_amsdu, link_id);
  2169. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  2170. qdf_nbuf_is_rx_retry_flag(nbuf), link_id);
  2171. dp_peer_update_rx_pkt_per_lmac(txrx_peer, nbuf, link_id);
  2172. tid_stats->msdu_cnt++;
  2173. enh_flag = vdev->pdev->enhanced_stats_en;
  2174. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  2175. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  2176. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  2177. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag, link_id);
  2178. tid_stats->mcast_msdu_cnt++;
  2179. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  2180. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len,
  2181. enh_flag, link_id);
  2182. tid_stats->bcast_msdu_cnt++;
  2183. }
  2184. } else {
  2185. DP_PEER_UC_INCC_PKT(txrx_peer, 1, msdu_len,
  2186. enh_flag, link_id);
  2187. }
  2188. txrx_peer->stats[link_id].per_pkt_stats.rx.last_rx_ts =
  2189. qdf_system_ticks();
  2190. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr,
  2191. txrx_peer, link_id);
  2192. }
  2193. #ifndef WDS_VENDOR_EXTENSION
  2194. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  2195. struct dp_vdev *vdev,
  2196. struct dp_txrx_peer *txrx_peer)
  2197. {
  2198. return 1;
  2199. }
  2200. #endif
  2201. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  2202. #ifdef DP_RX_UDP_OVER_PEER_ROAM
  2203. /**
  2204. * dp_rx_is_udp_allowed_over_roam_peer() - check if udp data received
  2205. * during roaming
  2206. * @vdev: dp_vdev pointer
  2207. * @rx_tlv_hdr: rx tlv header
  2208. * @nbuf: pkt skb pointer
  2209. *
  2210. * This function will check if rx udp data is received from authorised
  2211. * roamed peer before peer map indication is received from FW after
  2212. * roaming. This is needed for VoIP scenarios in which packet loss
  2213. * expected during roaming is minimal.
  2214. *
  2215. * Return: bool
  2216. */
  2217. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2218. uint8_t *rx_tlv_hdr,
  2219. qdf_nbuf_t nbuf)
  2220. {
  2221. char *hdr_desc;
  2222. struct ieee80211_frame *wh = NULL;
  2223. hdr_desc = hal_rx_desc_get_80211_hdr(vdev->pdev->soc->hal_soc,
  2224. rx_tlv_hdr);
  2225. wh = (struct ieee80211_frame *)hdr_desc;
  2226. if (vdev->roaming_peer_status ==
  2227. WLAN_ROAM_PEER_AUTH_STATUS_AUTHENTICATED &&
  2228. !qdf_mem_cmp(vdev->roaming_peer_mac.raw, wh->i_addr2,
  2229. QDF_MAC_ADDR_SIZE) && (qdf_nbuf_is_ipv4_udp_pkt(nbuf) ||
  2230. qdf_nbuf_is_ipv6_udp_pkt(nbuf)))
  2231. return true;
  2232. return false;
  2233. }
  2234. #else
  2235. static bool dp_rx_is_udp_allowed_over_roam_peer(struct dp_vdev *vdev,
  2236. uint8_t *rx_tlv_hdr,
  2237. qdf_nbuf_t nbuf)
  2238. {
  2239. return false;
  2240. }
  2241. #endif
  2242. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2243. {
  2244. uint16_t peer_id;
  2245. uint8_t vdev_id;
  2246. struct dp_vdev *vdev = NULL;
  2247. uint32_t l2_hdr_offset = 0;
  2248. uint16_t msdu_len = 0;
  2249. uint32_t pkt_len = 0;
  2250. uint8_t *rx_tlv_hdr;
  2251. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  2252. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  2253. bool is_special_frame = false;
  2254. struct dp_peer *peer = NULL;
  2255. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2256. if (peer_id > soc->max_peer_id)
  2257. goto deliver_fail;
  2258. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2259. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2260. if (!vdev || vdev->delete.pending)
  2261. goto deliver_fail;
  2262. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2263. goto deliver_fail;
  2264. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2265. l2_hdr_offset =
  2266. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2267. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2268. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2269. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2270. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2271. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2272. is_special_frame = dp_rx_is_special_frame(nbuf, frame_mask);
  2273. if (qdf_likely(vdev->osif_rx)) {
  2274. if (is_special_frame ||
  2275. dp_rx_is_udp_allowed_over_roam_peer(vdev, rx_tlv_hdr,
  2276. nbuf)) {
  2277. qdf_nbuf_set_exc_frame(nbuf, 1);
  2278. if (QDF_STATUS_SUCCESS !=
  2279. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2280. goto deliver_fail;
  2281. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2282. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2283. return;
  2284. }
  2285. } else if (is_special_frame) {
  2286. /*
  2287. * If MLO connection, txrx_peer for link peer does not exist,
  2288. * try to store these RX packets to txrx_peer's bufq of MLD
  2289. * peer until vdev->osif_rx is registered from CP and flush
  2290. * them to stack.
  2291. */
  2292. peer = dp_peer_get_tgt_peer_by_id(soc, peer_id,
  2293. DP_MOD_ID_RX);
  2294. if (!peer)
  2295. goto deliver_fail;
  2296. /* only check for MLO connection */
  2297. if (IS_MLO_DP_MLD_PEER(peer) && peer->txrx_peer &&
  2298. dp_rx_is_peer_cache_bufq_supported()) {
  2299. qdf_nbuf_set_exc_frame(nbuf, 1);
  2300. if (QDF_STATUS_SUCCESS ==
  2301. dp_rx_enqueue_rx(peer, peer->txrx_peer, nbuf)) {
  2302. DP_STATS_INC(soc,
  2303. rx.err.pkt_delivered_no_peer,
  2304. 1);
  2305. } else {
  2306. DP_STATS_INC(soc,
  2307. rx.err.rx_invalid_peer.num,
  2308. 1);
  2309. }
  2310. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2311. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2312. return;
  2313. }
  2314. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2315. }
  2316. deliver_fail:
  2317. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2318. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2319. dp_rx_nbuf_free(nbuf);
  2320. if (vdev)
  2321. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2322. }
  2323. #else
  2324. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2325. {
  2326. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2327. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2328. dp_rx_nbuf_free(nbuf);
  2329. }
  2330. #endif
  2331. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2332. #ifdef WLAN_SUPPORT_RX_FISA
  2333. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2334. {
  2335. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2336. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2337. }
  2338. #else
  2339. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2340. {
  2341. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2342. }
  2343. #endif
  2344. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2345. #ifdef DP_RX_DROP_RAW_FRM
  2346. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2347. {
  2348. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2349. dp_rx_nbuf_free(nbuf);
  2350. return true;
  2351. }
  2352. return false;
  2353. }
  2354. #endif
  2355. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2356. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2357. {
  2358. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2359. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2360. }
  2361. #endif
  2362. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2363. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2364. uint16_t peer_id, uint32_t is_offload,
  2365. qdf_nbuf_t netbuf)
  2366. {
  2367. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2368. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2369. peer_id, is_offload, pdev->pdev_id);
  2370. }
  2371. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2372. uint32_t is_offload)
  2373. {
  2374. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2375. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2376. soc, nbuf, HTT_INVALID_VDEV,
  2377. is_offload, 0);
  2378. }
  2379. #endif
  2380. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2381. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2382. {
  2383. QDF_STATUS ret;
  2384. if (vdev->osif_rx_flush) {
  2385. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2386. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2387. dp_err("Failed to flush rx pkts for vdev %d\n",
  2388. vdev->vdev_id);
  2389. return ret;
  2390. }
  2391. }
  2392. return QDF_STATUS_SUCCESS;
  2393. }
  2394. static QDF_STATUS
  2395. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2396. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2397. struct dp_pdev *dp_pdev,
  2398. struct rx_desc_pool *rx_desc_pool)
  2399. {
  2400. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2401. (nbuf_frag_info_t->virt_addr).nbuf =
  2402. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2403. RX_BUFFER_RESERVATION,
  2404. rx_desc_pool->buf_alignment, FALSE);
  2405. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2406. dp_err("nbuf alloc failed");
  2407. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2408. return ret;
  2409. }
  2410. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2411. (nbuf_frag_info_t->virt_addr).nbuf,
  2412. QDF_DMA_FROM_DEVICE,
  2413. rx_desc_pool->buf_size);
  2414. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2415. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2416. dp_err("nbuf map failed");
  2417. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2418. return ret;
  2419. }
  2420. nbuf_frag_info_t->paddr =
  2421. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2422. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2423. &nbuf_frag_info_t->paddr,
  2424. rx_desc_pool);
  2425. if (ret == QDF_STATUS_E_FAILURE) {
  2426. dp_err("nbuf check x86 failed");
  2427. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2428. return ret;
  2429. }
  2430. return QDF_STATUS_SUCCESS;
  2431. }
  2432. QDF_STATUS
  2433. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2434. struct dp_srng *dp_rxdma_srng,
  2435. struct rx_desc_pool *rx_desc_pool,
  2436. uint32_t num_req_buffers)
  2437. {
  2438. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2439. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2440. union dp_rx_desc_list_elem_t *next;
  2441. void *rxdma_ring_entry;
  2442. qdf_dma_addr_t paddr;
  2443. struct dp_rx_nbuf_frag_info *nf_info;
  2444. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2445. uint32_t buffer_index, nbuf_ptrs_per_page;
  2446. qdf_nbuf_t nbuf;
  2447. QDF_STATUS ret;
  2448. int page_idx, total_pages;
  2449. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2450. union dp_rx_desc_list_elem_t *tail = NULL;
  2451. int sync_hw_ptr = 1;
  2452. uint32_t num_entries_avail;
  2453. if (qdf_unlikely(!dp_pdev)) {
  2454. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2455. dp_soc, mac_id);
  2456. return QDF_STATUS_E_FAILURE;
  2457. }
  2458. if (qdf_unlikely(!rxdma_srng)) {
  2459. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2460. return QDF_STATUS_E_FAILURE;
  2461. }
  2462. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2463. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2464. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2465. rxdma_srng,
  2466. sync_hw_ptr);
  2467. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2468. if (!num_entries_avail) {
  2469. dp_err("Num of available entries is zero, nothing to do");
  2470. return QDF_STATUS_E_NOMEM;
  2471. }
  2472. if (num_entries_avail < num_req_buffers)
  2473. num_req_buffers = num_entries_avail;
  2474. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2475. num_req_buffers, &desc_list, &tail);
  2476. if (!nr_descs) {
  2477. dp_err("no free rx_descs in freelist");
  2478. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2479. return QDF_STATUS_E_NOMEM;
  2480. }
  2481. dp_debug("got %u RX descs for driver attach", nr_descs);
  2482. /*
  2483. * Try to allocate pointers to the nbuf one page at a time.
  2484. * Take pointers that can fit in one page of memory and
  2485. * iterate through the total descriptors that need to be
  2486. * allocated in order of pages. Reuse the pointers that
  2487. * have been allocated to fit in one page across each
  2488. * iteration to index into the nbuf.
  2489. */
  2490. total_pages = (nr_descs * sizeof(*nf_info)) / DP_BLOCKMEM_SIZE;
  2491. /*
  2492. * Add an extra page to store the remainder if any
  2493. */
  2494. if ((nr_descs * sizeof(*nf_info)) % DP_BLOCKMEM_SIZE)
  2495. total_pages++;
  2496. nf_info = qdf_mem_malloc(DP_BLOCKMEM_SIZE);
  2497. if (!nf_info) {
  2498. dp_err("failed to allocate nbuf array");
  2499. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2500. QDF_BUG(0);
  2501. return QDF_STATUS_E_NOMEM;
  2502. }
  2503. nbuf_ptrs_per_page = DP_BLOCKMEM_SIZE / sizeof(*nf_info);
  2504. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2505. qdf_mem_zero(nf_info, DP_BLOCKMEM_SIZE);
  2506. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2507. /*
  2508. * The last page of buffer pointers may not be required
  2509. * completely based on the number of descriptors. Below
  2510. * check will ensure we are allocating only the
  2511. * required number of descriptors.
  2512. */
  2513. if (nr_nbuf_total >= nr_descs)
  2514. break;
  2515. /* Flag is set while pdev rx_desc_pool initialization */
  2516. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2517. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2518. &nf_info[nr_nbuf], dp_pdev,
  2519. rx_desc_pool);
  2520. else
  2521. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2522. &nf_info[nr_nbuf], dp_pdev,
  2523. rx_desc_pool);
  2524. if (QDF_IS_STATUS_ERROR(ret))
  2525. break;
  2526. nr_nbuf_total++;
  2527. }
  2528. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2529. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2530. rxdma_ring_entry =
  2531. hal_srng_src_get_next(dp_soc->hal_soc,
  2532. rxdma_srng);
  2533. qdf_assert_always(rxdma_ring_entry);
  2534. next = desc_list->next;
  2535. paddr = nf_info[buffer_index].paddr;
  2536. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2537. /* Flag is set while pdev rx_desc_pool initialization */
  2538. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2539. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2540. &nf_info[buffer_index]);
  2541. else
  2542. dp_rx_desc_prep(&desc_list->rx_desc,
  2543. &nf_info[buffer_index]);
  2544. desc_list->rx_desc.in_use = 1;
  2545. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2546. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2547. __func__,
  2548. RX_DESC_REPLENISHED);
  2549. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2550. desc_list->rx_desc.cookie,
  2551. rx_desc_pool->owner);
  2552. dp_ipa_handle_rx_buf_smmu_mapping(
  2553. dp_soc, nbuf,
  2554. rx_desc_pool->buf_size, true,
  2555. __func__, __LINE__);
  2556. dp_audio_smmu_map(dp_soc->osdev,
  2557. qdf_mem_paddr_from_dmaaddr(dp_soc->osdev,
  2558. QDF_NBUF_CB_PADDR(nbuf)),
  2559. QDF_NBUF_CB_PADDR(nbuf),
  2560. rx_desc_pool->buf_size);
  2561. desc_list = next;
  2562. }
  2563. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2564. rxdma_srng, nr_nbuf, nr_nbuf);
  2565. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2566. }
  2567. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2568. qdf_mem_free(nf_info);
  2569. if (!nr_nbuf_total) {
  2570. dp_err("No nbuf's allocated");
  2571. QDF_BUG(0);
  2572. return QDF_STATUS_E_RESOURCES;
  2573. }
  2574. /* No need to count the number of bytes received during replenish.
  2575. * Therefore set replenish.pkts.bytes as 0.
  2576. */
  2577. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2578. return QDF_STATUS_SUCCESS;
  2579. }
  2580. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2581. #ifdef DP_RX_MON_MEM_FRAG
  2582. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2583. bool is_mon_dest_desc)
  2584. {
  2585. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2586. if (is_mon_dest_desc)
  2587. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2588. }
  2589. #else
  2590. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2591. bool is_mon_dest_desc)
  2592. {
  2593. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2594. if (is_mon_dest_desc)
  2595. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2596. }
  2597. #endif
  2598. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2599. QDF_STATUS
  2600. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2601. {
  2602. struct dp_soc *soc = pdev->soc;
  2603. uint32_t rxdma_entries;
  2604. uint32_t rx_sw_desc_num;
  2605. struct dp_srng *dp_rxdma_srng;
  2606. struct rx_desc_pool *rx_desc_pool;
  2607. uint32_t status = QDF_STATUS_SUCCESS;
  2608. int mac_for_pdev;
  2609. mac_for_pdev = pdev->lmac_id;
  2610. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2611. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2612. soc, mac_for_pdev);
  2613. return status;
  2614. }
  2615. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2616. rxdma_entries = dp_rxdma_srng->num_entries;
  2617. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2618. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2619. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2620. status = dp_rx_desc_pool_alloc(soc,
  2621. rx_sw_desc_num,
  2622. rx_desc_pool);
  2623. if (status != QDF_STATUS_SUCCESS)
  2624. return status;
  2625. return status;
  2626. }
  2627. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2628. {
  2629. int mac_for_pdev = pdev->lmac_id;
  2630. struct dp_soc *soc = pdev->soc;
  2631. struct rx_desc_pool *rx_desc_pool;
  2632. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2633. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2634. }
  2635. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2636. {
  2637. int mac_for_pdev = pdev->lmac_id;
  2638. struct dp_soc *soc = pdev->soc;
  2639. uint32_t rxdma_entries;
  2640. uint32_t rx_sw_desc_num;
  2641. struct dp_srng *dp_rxdma_srng;
  2642. struct rx_desc_pool *rx_desc_pool;
  2643. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2644. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2645. /*
  2646. * If NSS is enabled, rx_desc_pool is already filled.
  2647. * Hence, just disable desc_pool frag flag.
  2648. */
  2649. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2650. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2651. soc, mac_for_pdev);
  2652. return QDF_STATUS_SUCCESS;
  2653. }
  2654. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2655. return QDF_STATUS_E_NOMEM;
  2656. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2657. rxdma_entries = dp_rxdma_srng->num_entries;
  2658. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2659. rx_sw_desc_num =
  2660. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2661. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2662. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2663. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2664. /* Disable monitor dest processing via frag */
  2665. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2666. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2667. rx_sw_desc_num, rx_desc_pool);
  2668. return QDF_STATUS_SUCCESS;
  2669. }
  2670. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2671. {
  2672. int mac_for_pdev = pdev->lmac_id;
  2673. struct dp_soc *soc = pdev->soc;
  2674. struct rx_desc_pool *rx_desc_pool;
  2675. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2676. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2677. }
  2678. QDF_STATUS
  2679. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2680. {
  2681. int mac_for_pdev = pdev->lmac_id;
  2682. struct dp_soc *soc = pdev->soc;
  2683. struct dp_srng *dp_rxdma_srng;
  2684. struct rx_desc_pool *rx_desc_pool;
  2685. uint32_t rxdma_entries;
  2686. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2687. rxdma_entries = dp_rxdma_srng->num_entries;
  2688. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2689. /* Initialize RX buffer pool which will be
  2690. * used during low memory conditions
  2691. */
  2692. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2693. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2694. dp_rxdma_srng,
  2695. rx_desc_pool,
  2696. rxdma_entries - 1);
  2697. }
  2698. void
  2699. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2700. {
  2701. int mac_for_pdev = pdev->lmac_id;
  2702. struct dp_soc *soc = pdev->soc;
  2703. struct rx_desc_pool *rx_desc_pool;
  2704. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2705. dp_rx_desc_nbuf_free(soc, rx_desc_pool, false);
  2706. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2707. }
  2708. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2709. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2710. struct dp_txrx_peer *txrx_peer,
  2711. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2712. uint8_t *rx_tlv_hdr)
  2713. {
  2714. uint32_t l2_hdr_offset = 0;
  2715. uint16_t msdu_len = 0;
  2716. uint32_t skip_len;
  2717. l2_hdr_offset =
  2718. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2719. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2720. skip_len = l2_hdr_offset;
  2721. } else {
  2722. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2723. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2724. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2725. }
  2726. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2727. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2728. qdf_nbuf_pull_head(nbuf, skip_len);
  2729. if (txrx_peer->vdev) {
  2730. dp_rx_send_pktlog(soc, txrx_peer->vdev->pdev, nbuf,
  2731. QDF_TX_RX_STATUS_OK);
  2732. }
  2733. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2734. dp_info("special frame, mpdu sn 0x%x",
  2735. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2736. qdf_nbuf_set_exc_frame(nbuf, 1);
  2737. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2738. nbuf, NULL);
  2739. return true;
  2740. }
  2741. return false;
  2742. }
  2743. #endif