dsi_panel.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define MIN_PREFILL_LINES 35
  31. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  32. {
  33. char *bp;
  34. bp = buf;
  35. /* First 7 bytes are cmd header */
  36. *bp++ = 0x0A;
  37. *bp++ = 1;
  38. *bp++ = 0;
  39. *bp++ = 0;
  40. *bp++ = pps_delay_ms;
  41. *bp++ = 0;
  42. *bp++ = 128;
  43. }
  44. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  45. char *buf, int pps_id, u32 size)
  46. {
  47. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  48. buf += DSI_CMD_PPS_HDR_SIZE;
  49. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  50. size);
  51. }
  52. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  53. char *buf, int pps_id, u32 size)
  54. {
  55. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  56. buf += DSI_CMD_PPS_HDR_SIZE;
  57. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  58. size);
  59. }
  60. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  61. {
  62. int rc = 0;
  63. int i;
  64. struct regulator *vreg = NULL;
  65. for (i = 0; i < panel->power_info.count; i++) {
  66. vreg = devm_regulator_get(panel->parent,
  67. panel->power_info.vregs[i].vreg_name);
  68. rc = PTR_RET(vreg);
  69. if (rc) {
  70. DSI_ERR("failed to get %s regulator\n",
  71. panel->power_info.vregs[i].vreg_name);
  72. goto error_put;
  73. }
  74. panel->power_info.vregs[i].vreg = vreg;
  75. }
  76. return rc;
  77. error_put:
  78. for (i = i - 1; i >= 0; i--) {
  79. devm_regulator_put(panel->power_info.vregs[i].vreg);
  80. panel->power_info.vregs[i].vreg = NULL;
  81. }
  82. return rc;
  83. }
  84. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  85. {
  86. int rc = 0;
  87. int i;
  88. for (i = panel->power_info.count - 1; i >= 0; i--)
  89. devm_regulator_put(panel->power_info.vregs[i].vreg);
  90. return rc;
  91. }
  92. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  93. {
  94. int rc = 0;
  95. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  96. if (gpio_is_valid(r_config->reset_gpio)) {
  97. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  98. if (rc) {
  99. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  100. goto error;
  101. }
  102. }
  103. if (gpio_is_valid(r_config->disp_en_gpio)) {
  104. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  105. if (rc) {
  106. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  107. goto error_release_reset;
  108. }
  109. }
  110. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  111. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  112. if (rc) {
  113. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  114. goto error_release_disp_en;
  115. }
  116. }
  117. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  118. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  119. if (rc) {
  120. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  121. goto error_release_mode_sel;
  122. }
  123. }
  124. if (gpio_is_valid(panel->panel_test_gpio)) {
  125. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  126. if (rc) {
  127. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  128. rc);
  129. panel->panel_test_gpio = -1;
  130. rc = 0;
  131. }
  132. }
  133. goto error;
  134. error_release_mode_sel:
  135. if (gpio_is_valid(panel->bl_config.en_gpio))
  136. gpio_free(panel->bl_config.en_gpio);
  137. error_release_disp_en:
  138. if (gpio_is_valid(r_config->disp_en_gpio))
  139. gpio_free(r_config->disp_en_gpio);
  140. error_release_reset:
  141. if (gpio_is_valid(r_config->reset_gpio))
  142. gpio_free(r_config->reset_gpio);
  143. error:
  144. return rc;
  145. }
  146. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  147. {
  148. int rc = 0;
  149. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  150. if (gpio_is_valid(r_config->reset_gpio))
  151. gpio_free(r_config->reset_gpio);
  152. if (gpio_is_valid(r_config->disp_en_gpio))
  153. gpio_free(r_config->disp_en_gpio);
  154. if (gpio_is_valid(panel->bl_config.en_gpio))
  155. gpio_free(panel->bl_config.en_gpio);
  156. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  157. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  158. if (gpio_is_valid(panel->panel_test_gpio))
  159. gpio_free(panel->panel_test_gpio);
  160. return rc;
  161. }
  162. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  163. {
  164. struct dsi_panel_reset_config *r_config;
  165. if (!panel) {
  166. DSI_ERR("Invalid panel param\n");
  167. return -EINVAL;
  168. }
  169. r_config = &panel->reset_config;
  170. if (!r_config) {
  171. DSI_ERR("Invalid panel reset configuration\n");
  172. return -EINVAL;
  173. }
  174. if (gpio_is_valid(r_config->reset_gpio)) {
  175. gpio_set_value(r_config->reset_gpio, 0);
  176. DSI_INFO("GPIO pulled low to simulate ESD\n");
  177. return 0;
  178. }
  179. DSI_ERR("failed to pull down gpio\n");
  180. return -EINVAL;
  181. }
  182. static int dsi_panel_reset(struct dsi_panel *panel)
  183. {
  184. int rc = 0;
  185. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  186. int i;
  187. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  188. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  189. if (rc) {
  190. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  191. goto exit;
  192. }
  193. }
  194. if (r_config->count) {
  195. rc = gpio_direction_output(r_config->reset_gpio,
  196. r_config->sequence[0].level);
  197. if (rc) {
  198. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  199. goto exit;
  200. }
  201. }
  202. for (i = 0; i < r_config->count; i++) {
  203. gpio_set_value(r_config->reset_gpio,
  204. r_config->sequence[i].level);
  205. if (r_config->sequence[i].sleep_ms)
  206. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  207. (r_config->sequence[i].sleep_ms * 1000) + 100);
  208. }
  209. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  210. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  211. if (rc)
  212. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  213. }
  214. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  215. bool out = true;
  216. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  217. || (panel->reset_config.mode_sel_state
  218. == MODE_GPIO_LOW))
  219. out = false;
  220. else if ((panel->reset_config.mode_sel_state
  221. == MODE_SEL_SINGLE_PORT) ||
  222. (panel->reset_config.mode_sel_state
  223. == MODE_GPIO_HIGH))
  224. out = true;
  225. rc = gpio_direction_output(
  226. panel->reset_config.lcd_mode_sel_gpio, out);
  227. if (rc)
  228. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  229. }
  230. if (gpio_is_valid(panel->panel_test_gpio)) {
  231. rc = gpio_direction_input(panel->panel_test_gpio);
  232. if (rc)
  233. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  234. rc);
  235. }
  236. exit:
  237. return rc;
  238. }
  239. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  240. {
  241. int rc = 0;
  242. struct pinctrl_state *state;
  243. if (panel->host_config.ext_bridge_mode)
  244. return 0;
  245. if (enable)
  246. state = panel->pinctrl.active;
  247. else
  248. state = panel->pinctrl.suspend;
  249. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  250. if (rc)
  251. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  252. panel->name, rc);
  253. return rc;
  254. }
  255. static int dsi_panel_power_on(struct dsi_panel *panel)
  256. {
  257. int rc = 0;
  258. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  259. if (rc) {
  260. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  261. panel->name, rc);
  262. goto exit;
  263. }
  264. rc = dsi_panel_set_pinctrl_state(panel, true);
  265. if (rc) {
  266. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  267. goto error_disable_vregs;
  268. }
  269. rc = dsi_panel_reset(panel);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  272. goto error_disable_gpio;
  273. }
  274. goto exit;
  275. error_disable_gpio:
  276. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  277. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  278. if (gpio_is_valid(panel->bl_config.en_gpio))
  279. gpio_set_value(panel->bl_config.en_gpio, 0);
  280. (void)dsi_panel_set_pinctrl_state(panel, false);
  281. error_disable_vregs:
  282. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  283. exit:
  284. return rc;
  285. }
  286. static int dsi_panel_power_off(struct dsi_panel *panel)
  287. {
  288. int rc = 0;
  289. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  290. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  291. if (gpio_is_valid(panel->reset_config.reset_gpio))
  292. gpio_set_value(panel->reset_config.reset_gpio, 0);
  293. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  294. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  295. if (gpio_is_valid(panel->panel_test_gpio)) {
  296. rc = gpio_direction_input(panel->panel_test_gpio);
  297. if (rc)
  298. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  299. rc);
  300. }
  301. rc = dsi_panel_set_pinctrl_state(panel, false);
  302. if (rc) {
  303. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  304. rc);
  305. }
  306. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  307. if (rc)
  308. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  309. panel->name, rc);
  310. return rc;
  311. }
  312. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  313. enum dsi_cmd_set_type type)
  314. {
  315. int rc = 0, i = 0;
  316. ssize_t len;
  317. struct dsi_cmd_desc *cmds;
  318. u32 count;
  319. enum dsi_cmd_set_state state;
  320. struct dsi_display_mode *mode;
  321. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  322. if (!panel || !panel->cur_mode)
  323. return -EINVAL;
  324. mode = panel->cur_mode;
  325. cmds = mode->priv_info->cmd_sets[type].cmds;
  326. count = mode->priv_info->cmd_sets[type].count;
  327. state = mode->priv_info->cmd_sets[type].state;
  328. if (count == 0) {
  329. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  330. panel->name, type);
  331. goto error;
  332. }
  333. for (i = 0; i < count; i++) {
  334. if (state == DSI_CMD_SET_STATE_LP)
  335. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  336. if (cmds->last_command)
  337. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  338. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  339. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  340. len = ops->transfer(panel->host, &cmds->msg);
  341. if (len < 0) {
  342. rc = len;
  343. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  344. goto error;
  345. }
  346. if (cmds->post_wait_ms)
  347. usleep_range(cmds->post_wait_ms*1000,
  348. ((cmds->post_wait_ms*1000)+10));
  349. cmds++;
  350. }
  351. error:
  352. return rc;
  353. }
  354. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  355. {
  356. int rc = 0;
  357. if (panel->host_config.ext_bridge_mode)
  358. return 0;
  359. devm_pinctrl_put(panel->pinctrl.pinctrl);
  360. return rc;
  361. }
  362. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  363. {
  364. int rc = 0;
  365. if (panel->host_config.ext_bridge_mode)
  366. return 0;
  367. /* TODO: pinctrl is defined in dsi dt node */
  368. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  369. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  370. rc = PTR_ERR(panel->pinctrl.pinctrl);
  371. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  372. goto error;
  373. }
  374. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  375. "panel_active");
  376. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  377. rc = PTR_ERR(panel->pinctrl.active);
  378. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  379. goto error;
  380. }
  381. panel->pinctrl.suspend =
  382. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  383. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  384. rc = PTR_ERR(panel->pinctrl.suspend);
  385. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  386. goto error;
  387. }
  388. error:
  389. return rc;
  390. }
  391. static int dsi_panel_wled_register(struct dsi_panel *panel,
  392. struct dsi_backlight_config *bl)
  393. {
  394. struct backlight_device *bd;
  395. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  396. if (!bd) {
  397. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  398. panel->name, -EPROBE_DEFER);
  399. return -EPROBE_DEFER;
  400. }
  401. bl->raw_bd = bd;
  402. return 0;
  403. }
  404. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  405. u32 bl_lvl)
  406. {
  407. int rc = 0;
  408. struct mipi_dsi_device *dsi;
  409. if (!panel || (bl_lvl > 0xffff)) {
  410. DSI_ERR("invalid params\n");
  411. return -EINVAL;
  412. }
  413. dsi = &panel->mipi_device;
  414. if (panel->bl_config.bl_inverted_dbv)
  415. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  416. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  417. if (rc < 0)
  418. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  419. return rc;
  420. }
  421. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  422. u32 bl_lvl)
  423. {
  424. int rc = 0;
  425. u32 duty = 0;
  426. u32 period_ns = 0;
  427. struct dsi_backlight_config *bl;
  428. if (!panel) {
  429. DSI_ERR("Invalid Params\n");
  430. return -EINVAL;
  431. }
  432. bl = &panel->bl_config;
  433. if (!bl->pwm_bl) {
  434. DSI_ERR("pwm device not found\n");
  435. return -EINVAL;
  436. }
  437. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  438. duty = bl_lvl * period_ns;
  439. duty /= bl->bl_max_level;
  440. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  441. if (rc) {
  442. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  443. rc);
  444. goto error;
  445. }
  446. if (bl_lvl == 0 && bl->pwm_enabled) {
  447. pwm_disable(bl->pwm_bl);
  448. bl->pwm_enabled = false;
  449. return 0;
  450. }
  451. if (!bl->pwm_enabled) {
  452. rc = pwm_enable(bl->pwm_bl);
  453. if (rc) {
  454. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  455. rc);
  456. goto error;
  457. }
  458. bl->pwm_enabled = true;
  459. }
  460. error:
  461. return rc;
  462. }
  463. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  464. {
  465. int rc = 0;
  466. struct dsi_backlight_config *bl = &panel->bl_config;
  467. if (panel->host_config.ext_bridge_mode)
  468. return 0;
  469. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  470. switch (bl->type) {
  471. case DSI_BACKLIGHT_WLED:
  472. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  473. break;
  474. case DSI_BACKLIGHT_DCS:
  475. rc = dsi_panel_update_backlight(panel, bl_lvl);
  476. break;
  477. case DSI_BACKLIGHT_EXTERNAL:
  478. break;
  479. case DSI_BACKLIGHT_PWM:
  480. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  481. break;
  482. default:
  483. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  484. rc = -ENOTSUPP;
  485. }
  486. return rc;
  487. }
  488. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  489. {
  490. u32 cur_bl_level;
  491. struct backlight_device *bd = bl->raw_bd;
  492. /* default the brightness level to 50% */
  493. cur_bl_level = bl->bl_max_level >> 1;
  494. switch (bl->type) {
  495. case DSI_BACKLIGHT_WLED:
  496. /* Try to query the backlight level from the backlight device */
  497. if (bd->ops && bd->ops->get_brightness)
  498. cur_bl_level = bd->ops->get_brightness(bd);
  499. break;
  500. case DSI_BACKLIGHT_DCS:
  501. case DSI_BACKLIGHT_EXTERNAL:
  502. case DSI_BACKLIGHT_PWM:
  503. default:
  504. /*
  505. * Ideally, we should read the backlight level from the
  506. * panel. For now, just set it default value.
  507. */
  508. break;
  509. }
  510. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  511. return cur_bl_level;
  512. }
  513. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  514. {
  515. struct dsi_backlight_config *bl = &panel->bl_config;
  516. bl->bl_level = dsi_panel_get_brightness(bl);
  517. }
  518. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  519. {
  520. int rc = 0;
  521. struct dsi_backlight_config *bl = &panel->bl_config;
  522. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  523. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  524. rc = PTR_ERR(bl->pwm_bl);
  525. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  526. rc);
  527. return rc;
  528. }
  529. return 0;
  530. }
  531. static int dsi_panel_bl_register(struct dsi_panel *panel)
  532. {
  533. int rc = 0;
  534. struct dsi_backlight_config *bl = &panel->bl_config;
  535. if (panel->host_config.ext_bridge_mode)
  536. return 0;
  537. switch (bl->type) {
  538. case DSI_BACKLIGHT_WLED:
  539. rc = dsi_panel_wled_register(panel, bl);
  540. break;
  541. case DSI_BACKLIGHT_DCS:
  542. break;
  543. case DSI_BACKLIGHT_EXTERNAL:
  544. break;
  545. case DSI_BACKLIGHT_PWM:
  546. rc = dsi_panel_pwm_register(panel);
  547. break;
  548. default:
  549. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  550. rc = -ENOTSUPP;
  551. goto error;
  552. }
  553. error:
  554. return rc;
  555. }
  556. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  557. {
  558. struct dsi_backlight_config *bl = &panel->bl_config;
  559. devm_pwm_put(panel->parent, bl->pwm_bl);
  560. }
  561. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  562. {
  563. int rc = 0;
  564. struct dsi_backlight_config *bl = &panel->bl_config;
  565. if (panel->host_config.ext_bridge_mode)
  566. return 0;
  567. switch (bl->type) {
  568. case DSI_BACKLIGHT_WLED:
  569. break;
  570. case DSI_BACKLIGHT_DCS:
  571. break;
  572. case DSI_BACKLIGHT_EXTERNAL:
  573. break;
  574. case DSI_BACKLIGHT_PWM:
  575. dsi_panel_pwm_unregister(panel);
  576. break;
  577. default:
  578. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  579. rc = -ENOTSUPP;
  580. goto error;
  581. }
  582. error:
  583. return rc;
  584. }
  585. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  586. struct dsi_parser_utils *utils)
  587. {
  588. int rc = 0;
  589. u64 tmp64 = 0;
  590. struct dsi_display_mode *display_mode;
  591. struct dsi_display_mode_priv_info *priv_info;
  592. display_mode = container_of(mode, struct dsi_display_mode, timing);
  593. priv_info = display_mode->priv_info;
  594. rc = utils->read_u64(utils->data,
  595. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  596. if (rc == -EOVERFLOW) {
  597. tmp64 = 0;
  598. rc = utils->read_u32(utils->data,
  599. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  600. }
  601. mode->clk_rate_hz = !rc ? tmp64 : 0;
  602. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  603. mode->pclk_scale.numer = 1;
  604. mode->pclk_scale.denom = 1;
  605. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  606. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  607. &mode->mdp_transfer_time_us);
  608. if (!rc)
  609. display_mode->priv_info->mdp_transfer_time_us =
  610. mode->mdp_transfer_time_us;
  611. else
  612. display_mode->priv_info->mdp_transfer_time_us = 0;
  613. rc = utils->read_u32(utils->data,
  614. "qcom,mdss-dsi-panel-framerate",
  615. &mode->refresh_rate);
  616. if (rc) {
  617. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  618. rc);
  619. goto error;
  620. }
  621. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  622. &mode->h_active);
  623. if (rc) {
  624. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  625. rc);
  626. goto error;
  627. }
  628. rc = utils->read_u32(utils->data,
  629. "qcom,mdss-dsi-h-front-porch",
  630. &mode->h_front_porch);
  631. if (rc) {
  632. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  633. rc);
  634. goto error;
  635. }
  636. rc = utils->read_u32(utils->data,
  637. "qcom,mdss-dsi-h-back-porch",
  638. &mode->h_back_porch);
  639. if (rc) {
  640. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  641. rc);
  642. goto error;
  643. }
  644. rc = utils->read_u32(utils->data,
  645. "qcom,mdss-dsi-h-pulse-width",
  646. &mode->h_sync_width);
  647. if (rc) {
  648. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  649. rc);
  650. goto error;
  651. }
  652. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  653. &mode->h_skew);
  654. if (rc)
  655. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  656. rc);
  657. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  658. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  659. mode->h_sync_width);
  660. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  661. &mode->v_active);
  662. if (rc) {
  663. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  664. rc);
  665. goto error;
  666. }
  667. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  668. &mode->v_back_porch);
  669. if (rc) {
  670. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  671. rc);
  672. goto error;
  673. }
  674. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  675. &mode->v_front_porch);
  676. if (rc) {
  677. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  678. rc);
  679. goto error;
  680. }
  681. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  682. &mode->v_sync_width);
  683. if (rc) {
  684. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  685. rc);
  686. goto error;
  687. }
  688. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  689. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  690. mode->v_sync_width);
  691. error:
  692. return rc;
  693. }
  694. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  695. struct dsi_parser_utils *utils,
  696. const char *name)
  697. {
  698. int rc = 0;
  699. u32 bpp = 0;
  700. enum dsi_pixel_format fmt;
  701. const char *packing;
  702. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  703. if (rc) {
  704. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  705. name, rc);
  706. return rc;
  707. }
  708. host->bpp = bpp;
  709. switch (bpp) {
  710. case 3:
  711. fmt = DSI_PIXEL_FORMAT_RGB111;
  712. break;
  713. case 8:
  714. fmt = DSI_PIXEL_FORMAT_RGB332;
  715. break;
  716. case 12:
  717. fmt = DSI_PIXEL_FORMAT_RGB444;
  718. break;
  719. case 16:
  720. fmt = DSI_PIXEL_FORMAT_RGB565;
  721. break;
  722. case 18:
  723. fmt = DSI_PIXEL_FORMAT_RGB666;
  724. break;
  725. case 24:
  726. default:
  727. fmt = DSI_PIXEL_FORMAT_RGB888;
  728. break;
  729. }
  730. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  731. packing = utils->get_property(utils->data,
  732. "qcom,mdss-dsi-pixel-packing",
  733. NULL);
  734. if (packing && !strcmp(packing, "loose"))
  735. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  736. }
  737. host->dst_format = fmt;
  738. return rc;
  739. }
  740. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  741. struct dsi_parser_utils *utils,
  742. const char *name)
  743. {
  744. int rc = 0;
  745. bool lane_enabled;
  746. u32 num_of_lanes = 0;
  747. lane_enabled = utils->read_bool(utils->data,
  748. "qcom,mdss-dsi-lane-0-state");
  749. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  750. lane_enabled = utils->read_bool(utils->data,
  751. "qcom,mdss-dsi-lane-1-state");
  752. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  753. lane_enabled = utils->read_bool(utils->data,
  754. "qcom,mdss-dsi-lane-2-state");
  755. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  756. lane_enabled = utils->read_bool(utils->data,
  757. "qcom,mdss-dsi-lane-3-state");
  758. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  759. if (host->data_lanes & DSI_DATA_LANE_0)
  760. num_of_lanes++;
  761. if (host->data_lanes & DSI_DATA_LANE_1)
  762. num_of_lanes++;
  763. if (host->data_lanes & DSI_DATA_LANE_2)
  764. num_of_lanes++;
  765. if (host->data_lanes & DSI_DATA_LANE_3)
  766. num_of_lanes++;
  767. host->num_data_lanes = num_of_lanes;
  768. if (host->data_lanes == 0) {
  769. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  770. rc = -EINVAL;
  771. }
  772. return rc;
  773. }
  774. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  775. struct dsi_parser_utils *utils,
  776. const char *name)
  777. {
  778. int rc = 0;
  779. const char *swap_mode;
  780. swap_mode = utils->get_property(utils->data,
  781. "qcom,mdss-dsi-color-order", NULL);
  782. if (swap_mode) {
  783. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  784. host->swap_mode = DSI_COLOR_SWAP_RGB;
  785. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  786. host->swap_mode = DSI_COLOR_SWAP_RBG;
  787. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  788. host->swap_mode = DSI_COLOR_SWAP_BRG;
  789. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  790. host->swap_mode = DSI_COLOR_SWAP_GRB;
  791. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  792. host->swap_mode = DSI_COLOR_SWAP_GBR;
  793. } else {
  794. DSI_ERR("[%s] Unrecognized color order-%s\n",
  795. name, swap_mode);
  796. rc = -EINVAL;
  797. }
  798. } else {
  799. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  800. host->swap_mode = DSI_COLOR_SWAP_RGB;
  801. }
  802. /* bit swap on color channel is not defined in dt */
  803. host->bit_swap_red = false;
  804. host->bit_swap_green = false;
  805. host->bit_swap_blue = false;
  806. return rc;
  807. }
  808. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  809. struct dsi_parser_utils *utils,
  810. const char *name)
  811. {
  812. const char *trig;
  813. int rc = 0;
  814. trig = utils->get_property(utils->data,
  815. "qcom,mdss-dsi-mdp-trigger", NULL);
  816. if (trig) {
  817. if (!strcmp(trig, "none")) {
  818. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  819. } else if (!strcmp(trig, "trigger_te")) {
  820. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  821. } else if (!strcmp(trig, "trigger_sw")) {
  822. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  823. } else if (!strcmp(trig, "trigger_sw_te")) {
  824. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  825. } else {
  826. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  827. name, trig);
  828. rc = -EINVAL;
  829. }
  830. } else {
  831. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  832. name);
  833. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  834. }
  835. trig = utils->get_property(utils->data,
  836. "qcom,mdss-dsi-dma-trigger", NULL);
  837. if (trig) {
  838. if (!strcmp(trig, "none")) {
  839. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  840. } else if (!strcmp(trig, "trigger_te")) {
  841. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  842. } else if (!strcmp(trig, "trigger_sw")) {
  843. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  844. } else if (!strcmp(trig, "trigger_sw_seof")) {
  845. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  846. } else if (!strcmp(trig, "trigger_sw_te")) {
  847. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  848. } else {
  849. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  850. name, trig);
  851. rc = -EINVAL;
  852. }
  853. } else {
  854. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  855. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  856. }
  857. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  858. &host->te_mode);
  859. if (rc) {
  860. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  861. host->te_mode = 1;
  862. rc = 0;
  863. }
  864. return rc;
  865. }
  866. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  867. struct dsi_parser_utils *utils,
  868. const char *name)
  869. {
  870. u32 val = 0;
  871. int rc = 0;
  872. bool panel_cphy_mode = false;
  873. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  874. if (!rc) {
  875. host->t_clk_post = val;
  876. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  877. }
  878. val = 0;
  879. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  880. if (!rc) {
  881. host->t_clk_pre = val;
  882. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  883. }
  884. host->ignore_rx_eot = utils->read_bool(utils->data,
  885. "qcom,mdss-dsi-rx-eot-ignore");
  886. host->append_tx_eot = utils->read_bool(utils->data,
  887. "qcom,mdss-dsi-tx-eot-append");
  888. host->ext_bridge_mode = utils->read_bool(utils->data,
  889. "qcom,mdss-dsi-ext-bridge-mode");
  890. host->force_hs_clk_lane = utils->read_bool(utils->data,
  891. "qcom,mdss-dsi-force-clock-lane-hs");
  892. panel_cphy_mode = utils->read_bool(utils->data,
  893. "qcom,panel-cphy-mode");
  894. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  895. : DSI_PHY_TYPE_DPHY;
  896. return 0;
  897. }
  898. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  899. struct dsi_parser_utils *utils,
  900. const char *name)
  901. {
  902. int rc = 0;
  903. u32 val = 0;
  904. bool supported = false;
  905. struct dsi_split_link_config *split_link = &host->split_link;
  906. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  907. if (!supported) {
  908. DSI_DEBUG("[%s] Split link is not supported\n", name);
  909. split_link->split_link_enabled = false;
  910. return;
  911. }
  912. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  913. if (rc || val < 1) {
  914. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  915. split_link->num_sublinks = 2;
  916. } else {
  917. split_link->num_sublinks = val;
  918. }
  919. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  920. if (rc || val < 1) {
  921. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  922. split_link->lanes_per_sublink = 2;
  923. } else {
  924. split_link->lanes_per_sublink = val;
  925. }
  926. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  927. split_link->num_sublinks, split_link->lanes_per_sublink);
  928. split_link->split_link_enabled = true;
  929. }
  930. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  931. {
  932. int rc = 0;
  933. struct dsi_parser_utils *utils = &panel->utils;
  934. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  935. panel->name);
  936. if (rc) {
  937. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  938. panel->name, rc);
  939. goto error;
  940. }
  941. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  942. panel->name);
  943. if (rc) {
  944. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  945. panel->name, rc);
  946. goto error;
  947. }
  948. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  949. panel->name);
  950. if (rc) {
  951. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  952. panel->name, rc);
  953. goto error;
  954. }
  955. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  956. panel->name);
  957. if (rc) {
  958. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  959. panel->name, rc);
  960. goto error;
  961. }
  962. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  963. panel->name);
  964. if (rc) {
  965. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  966. panel->name, rc);
  967. goto error;
  968. }
  969. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  970. panel->name);
  971. error:
  972. return rc;
  973. }
  974. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  975. struct device_node *of_node)
  976. {
  977. int rc = 0;
  978. u32 val = 0;
  979. rc = of_property_read_u32(of_node,
  980. "qcom,mdss-dsi-qsync-min-refresh-rate",
  981. &val);
  982. if (rc)
  983. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  984. panel->name, rc);
  985. panel->qsync_min_fps = val;
  986. return rc;
  987. }
  988. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  989. {
  990. int rc = 0;
  991. bool supported = false;
  992. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  993. struct dsi_parser_utils *utils = &panel->utils;
  994. const char *name = panel->name;
  995. const char *type;
  996. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  997. if (!supported) {
  998. dyn_clk_caps->dyn_clk_support = false;
  999. return rc;
  1000. }
  1001. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1002. "qcom,dsi-dyn-clk-list");
  1003. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1004. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1005. return -EINVAL;
  1006. }
  1007. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1008. sizeof(u32), GFP_KERNEL);
  1009. if (!dyn_clk_caps->bit_clk_list)
  1010. return -ENOMEM;
  1011. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1012. dyn_clk_caps->bit_clk_list,
  1013. dyn_clk_caps->bit_clk_list_len);
  1014. if (rc) {
  1015. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1016. return -EINVAL;
  1017. }
  1018. dyn_clk_caps->dyn_clk_support = true;
  1019. type = utils->get_property(utils->data,
  1020. "qcom,dsi-dyn-clk-type", NULL);
  1021. if (!type) {
  1022. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1023. dyn_clk_caps->maintain_const_fps = false;
  1024. return 0;
  1025. }
  1026. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1027. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1028. dyn_clk_caps->maintain_const_fps = true;
  1029. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1030. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1031. dyn_clk_caps->maintain_const_fps = true;
  1032. } else {
  1033. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1034. dyn_clk_caps->maintain_const_fps = false;
  1035. }
  1036. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1037. return 0;
  1038. }
  1039. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1040. {
  1041. int rc = 0;
  1042. bool supported = false;
  1043. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1044. struct dsi_parser_utils *utils = &panel->utils;
  1045. const char *name = panel->name;
  1046. const char *type;
  1047. u32 i;
  1048. supported = utils->read_bool(utils->data,
  1049. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1050. if (!supported) {
  1051. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1052. dfps_caps->dfps_support = false;
  1053. return rc;
  1054. }
  1055. type = utils->get_property(utils->data,
  1056. "qcom,mdss-dsi-pan-fps-update", NULL);
  1057. if (!type) {
  1058. DSI_ERR("[%s] dfps type not defined\n", name);
  1059. rc = -EINVAL;
  1060. goto error;
  1061. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1062. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1063. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1064. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1065. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1066. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1067. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1068. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1069. } else {
  1070. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1071. rc = -EINVAL;
  1072. goto error;
  1073. }
  1074. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1075. "qcom,dsi-supported-dfps-list");
  1076. if (dfps_caps->dfps_list_len < 1) {
  1077. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1078. rc = -EINVAL;
  1079. goto error;
  1080. }
  1081. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1082. GFP_KERNEL);
  1083. if (!dfps_caps->dfps_list) {
  1084. rc = -ENOMEM;
  1085. goto error;
  1086. }
  1087. rc = utils->read_u32_array(utils->data,
  1088. "qcom,dsi-supported-dfps-list",
  1089. dfps_caps->dfps_list,
  1090. dfps_caps->dfps_list_len);
  1091. if (rc) {
  1092. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1093. rc = -EINVAL;
  1094. goto error;
  1095. }
  1096. dfps_caps->dfps_support = true;
  1097. /* calculate max and min fps */
  1098. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1099. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1100. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1101. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1102. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1103. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1104. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1105. }
  1106. error:
  1107. return rc;
  1108. }
  1109. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1110. struct dsi_parser_utils *utils,
  1111. const char *name)
  1112. {
  1113. int rc = 0;
  1114. const char *traffic_mode;
  1115. u32 vc_id = 0;
  1116. u32 val = 0;
  1117. u32 line_no = 0;
  1118. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1119. if (rc) {
  1120. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1121. cfg->pulse_mode_hsa_he = false;
  1122. } else if (val == 1) {
  1123. cfg->pulse_mode_hsa_he = true;
  1124. } else if (val == 0) {
  1125. cfg->pulse_mode_hsa_he = false;
  1126. } else {
  1127. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1128. name);
  1129. rc = -EINVAL;
  1130. goto error;
  1131. }
  1132. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1133. "qcom,mdss-dsi-hfp-power-mode");
  1134. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1135. "qcom,mdss-dsi-hbp-power-mode");
  1136. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1137. "qcom,mdss-dsi-hsa-power-mode");
  1138. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1139. "qcom,mdss-dsi-last-line-interleave");
  1140. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1141. "qcom,mdss-dsi-bllp-eof-power-mode");
  1142. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1143. "qcom,mdss-dsi-bllp-power-mode");
  1144. traffic_mode = utils->get_property(utils->data,
  1145. "qcom,mdss-dsi-traffic-mode",
  1146. NULL);
  1147. if (!traffic_mode) {
  1148. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1149. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1150. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1151. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1152. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1153. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1154. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1155. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1156. } else {
  1157. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1158. traffic_mode);
  1159. rc = -EINVAL;
  1160. goto error;
  1161. }
  1162. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1163. &vc_id);
  1164. if (rc) {
  1165. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1166. cfg->vc_id = 0;
  1167. } else {
  1168. cfg->vc_id = vc_id;
  1169. }
  1170. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1171. &line_no);
  1172. if (rc) {
  1173. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1174. cfg->dma_sched_line = 0x1;
  1175. /* do not fail since we have default value */
  1176. rc = 0;
  1177. } else {
  1178. cfg->dma_sched_line = line_no;
  1179. }
  1180. error:
  1181. return rc;
  1182. }
  1183. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1184. struct dsi_parser_utils *utils,
  1185. const char *name)
  1186. {
  1187. u32 val = 0;
  1188. int rc = 0;
  1189. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1190. if (rc) {
  1191. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1192. cfg->wr_mem_start = 0x2C;
  1193. } else {
  1194. cfg->wr_mem_start = val;
  1195. }
  1196. val = 0;
  1197. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1198. &val);
  1199. if (rc) {
  1200. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1201. cfg->wr_mem_continue = 0x3C;
  1202. } else {
  1203. cfg->wr_mem_continue = val;
  1204. }
  1205. /* TODO: fix following */
  1206. cfg->max_cmd_packets_interleave = 0;
  1207. val = 0;
  1208. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1209. &val);
  1210. if (rc) {
  1211. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1212. cfg->insert_dcs_command = true;
  1213. } else if (val == 1) {
  1214. cfg->insert_dcs_command = true;
  1215. } else if (val == 0) {
  1216. cfg->insert_dcs_command = false;
  1217. } else {
  1218. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1219. name);
  1220. rc = -EINVAL;
  1221. goto error;
  1222. }
  1223. error:
  1224. return rc;
  1225. }
  1226. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1227. {
  1228. int rc = 0;
  1229. struct dsi_parser_utils *utils = &panel->utils;
  1230. bool panel_mode_switch_enabled;
  1231. enum dsi_op_mode panel_mode;
  1232. const char *mode;
  1233. mode = utils->get_property(utils->data,
  1234. "qcom,mdss-dsi-panel-type", NULL);
  1235. if (!mode) {
  1236. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1237. panel_mode = DSI_OP_VIDEO_MODE;
  1238. } else if (!strcmp(mode, "dsi_video_mode")) {
  1239. panel_mode = DSI_OP_VIDEO_MODE;
  1240. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1241. panel_mode = DSI_OP_CMD_MODE;
  1242. } else {
  1243. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1244. rc = -EINVAL;
  1245. goto error;
  1246. }
  1247. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1248. "qcom,mdss-dsi-panel-mode-switch");
  1249. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1250. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1251. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1252. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1253. utils,
  1254. panel->name);
  1255. if (rc) {
  1256. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1257. panel->name, rc);
  1258. goto error;
  1259. }
  1260. }
  1261. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1262. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1263. utils,
  1264. panel->name);
  1265. if (rc) {
  1266. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1267. panel->name, rc);
  1268. goto error;
  1269. }
  1270. }
  1271. panel->poms_align_vsync = utils->read_bool(utils->data,
  1272. "qcom,poms-align-panel-vsync");
  1273. panel->panel_mode = panel_mode;
  1274. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1275. error:
  1276. return rc;
  1277. }
  1278. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1279. {
  1280. int rc = 0;
  1281. u32 val = 0;
  1282. const char *str;
  1283. struct dsi_panel_phy_props *props = &panel->phy_props;
  1284. struct dsi_parser_utils *utils = &panel->utils;
  1285. const char *name = panel->name;
  1286. rc = utils->read_u32(utils->data,
  1287. "qcom,mdss-pan-physical-width-dimension", &val);
  1288. if (rc) {
  1289. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1290. props->panel_width_mm = 0;
  1291. rc = 0;
  1292. } else {
  1293. props->panel_width_mm = val;
  1294. }
  1295. rc = utils->read_u32(utils->data,
  1296. "qcom,mdss-pan-physical-height-dimension",
  1297. &val);
  1298. if (rc) {
  1299. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1300. props->panel_height_mm = 0;
  1301. rc = 0;
  1302. } else {
  1303. props->panel_height_mm = val;
  1304. }
  1305. str = utils->get_property(utils->data,
  1306. "qcom,mdss-dsi-panel-orientation", NULL);
  1307. if (!str) {
  1308. props->rotation = DSI_PANEL_ROTATE_NONE;
  1309. } else if (!strcmp(str, "180")) {
  1310. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1311. } else if (!strcmp(str, "hflip")) {
  1312. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1313. } else if (!strcmp(str, "vflip")) {
  1314. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1315. } else {
  1316. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1317. rc = -EINVAL;
  1318. goto error;
  1319. }
  1320. error:
  1321. return rc;
  1322. }
  1323. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1324. "qcom,mdss-dsi-pre-on-command",
  1325. "qcom,mdss-dsi-on-command",
  1326. "qcom,mdss-dsi-post-panel-on-command",
  1327. "qcom,mdss-dsi-pre-off-command",
  1328. "qcom,mdss-dsi-off-command",
  1329. "qcom,mdss-dsi-post-off-command",
  1330. "qcom,mdss-dsi-pre-res-switch",
  1331. "qcom,mdss-dsi-res-switch",
  1332. "qcom,mdss-dsi-post-res-switch",
  1333. "qcom,cmd-to-video-mode-switch-commands",
  1334. "qcom,cmd-to-video-mode-post-switch-commands",
  1335. "qcom,video-to-cmd-mode-switch-commands",
  1336. "qcom,video-to-cmd-mode-post-switch-commands",
  1337. "qcom,mdss-dsi-panel-status-command",
  1338. "qcom,mdss-dsi-lp1-command",
  1339. "qcom,mdss-dsi-lp2-command",
  1340. "qcom,mdss-dsi-nolp-command",
  1341. "PPS not parsed from DTSI, generated dynamically",
  1342. "ROI not parsed from DTSI, generated dynamically",
  1343. "qcom,mdss-dsi-timing-switch-command",
  1344. "qcom,mdss-dsi-post-mode-switch-on-command",
  1345. "qcom,mdss-dsi-qsync-on-commands",
  1346. "qcom,mdss-dsi-qsync-off-commands",
  1347. };
  1348. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1349. "qcom,mdss-dsi-pre-on-command-state",
  1350. "qcom,mdss-dsi-on-command-state",
  1351. "qcom,mdss-dsi-post-on-command-state",
  1352. "qcom,mdss-dsi-pre-off-command-state",
  1353. "qcom,mdss-dsi-off-command-state",
  1354. "qcom,mdss-dsi-post-off-command-state",
  1355. "qcom,mdss-dsi-pre-res-switch-state",
  1356. "qcom,mdss-dsi-res-switch-state",
  1357. "qcom,mdss-dsi-post-res-switch-state",
  1358. "qcom,cmd-to-video-mode-switch-commands-state",
  1359. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1360. "qcom,video-to-cmd-mode-switch-commands-state",
  1361. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1362. "qcom,mdss-dsi-panel-status-command-state",
  1363. "qcom,mdss-dsi-lp1-command-state",
  1364. "qcom,mdss-dsi-lp2-command-state",
  1365. "qcom,mdss-dsi-nolp-command-state",
  1366. "PPS not parsed from DTSI, generated dynamically",
  1367. "ROI not parsed from DTSI, generated dynamically",
  1368. "qcom,mdss-dsi-timing-switch-command-state",
  1369. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1370. "qcom,mdss-dsi-qsync-on-commands-state",
  1371. "qcom,mdss-dsi-qsync-off-commands-state",
  1372. };
  1373. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1374. {
  1375. const u32 cmd_set_min_size = 7;
  1376. u32 count = 0;
  1377. u32 packet_length;
  1378. u32 tmp;
  1379. while (length >= cmd_set_min_size) {
  1380. packet_length = cmd_set_min_size;
  1381. tmp = ((data[5] << 8) | (data[6]));
  1382. packet_length += tmp;
  1383. if (packet_length > length) {
  1384. DSI_ERR("format error\n");
  1385. return -EINVAL;
  1386. }
  1387. length -= packet_length;
  1388. data += packet_length;
  1389. count++;
  1390. }
  1391. *cnt = count;
  1392. return 0;
  1393. }
  1394. static int dsi_panel_create_cmd_packets(const char *data,
  1395. u32 length,
  1396. u32 count,
  1397. struct dsi_cmd_desc *cmd)
  1398. {
  1399. int rc = 0;
  1400. int i, j;
  1401. u8 *payload;
  1402. for (i = 0; i < count; i++) {
  1403. u32 size;
  1404. cmd[i].msg.type = data[0];
  1405. cmd[i].last_command = (data[1] == 1);
  1406. cmd[i].msg.channel = data[2];
  1407. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1408. cmd[i].msg.ctrl = 0;
  1409. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1410. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1411. size = cmd[i].msg.tx_len * sizeof(u8);
  1412. payload = kzalloc(size, GFP_KERNEL);
  1413. if (!payload) {
  1414. rc = -ENOMEM;
  1415. goto error_free_payloads;
  1416. }
  1417. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1418. payload[j] = data[7 + j];
  1419. cmd[i].msg.tx_buf = payload;
  1420. data += (7 + cmd[i].msg.tx_len);
  1421. }
  1422. return rc;
  1423. error_free_payloads:
  1424. for (i = i - 1; i >= 0; i--) {
  1425. cmd--;
  1426. kfree(cmd->msg.tx_buf);
  1427. }
  1428. return rc;
  1429. }
  1430. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1431. {
  1432. u32 i = 0;
  1433. struct dsi_cmd_desc *cmd;
  1434. for (i = 0; i < set->count; i++) {
  1435. cmd = &set->cmds[i];
  1436. kfree(cmd->msg.tx_buf);
  1437. }
  1438. }
  1439. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1440. {
  1441. kfree(set->cmds);
  1442. }
  1443. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1444. u32 packet_count)
  1445. {
  1446. u32 size;
  1447. size = packet_count * sizeof(*cmd->cmds);
  1448. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1449. if (!cmd->cmds)
  1450. return -ENOMEM;
  1451. cmd->count = packet_count;
  1452. return 0;
  1453. }
  1454. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1455. enum dsi_cmd_set_type type,
  1456. struct dsi_parser_utils *utils)
  1457. {
  1458. int rc = 0;
  1459. u32 length = 0;
  1460. const char *data;
  1461. const char *state;
  1462. u32 packet_count = 0;
  1463. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1464. &length);
  1465. if (!data) {
  1466. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1467. rc = -ENOTSUPP;
  1468. goto error;
  1469. }
  1470. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1471. cmd_set_prop_map[type], length);
  1472. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1473. 8, 1, data, length, false);
  1474. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1475. if (rc) {
  1476. DSI_ERR("commands failed, rc=%d\n", rc);
  1477. goto error;
  1478. }
  1479. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1480. packet_count, length);
  1481. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1482. if (rc) {
  1483. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1484. goto error;
  1485. }
  1486. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1487. cmd->cmds);
  1488. if (rc) {
  1489. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1490. goto error_free_mem;
  1491. }
  1492. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1493. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1494. cmd->state = DSI_CMD_SET_STATE_LP;
  1495. } else if (!strcmp(state, "dsi_hs_mode")) {
  1496. cmd->state = DSI_CMD_SET_STATE_HS;
  1497. } else {
  1498. DSI_ERR("[%s] command state unrecognized-%s\n",
  1499. cmd_set_state_map[type], state);
  1500. goto error_free_mem;
  1501. }
  1502. return rc;
  1503. error_free_mem:
  1504. kfree(cmd->cmds);
  1505. cmd->cmds = NULL;
  1506. error:
  1507. return rc;
  1508. }
  1509. static int dsi_panel_parse_cmd_sets(
  1510. struct dsi_display_mode_priv_info *priv_info,
  1511. struct dsi_parser_utils *utils)
  1512. {
  1513. int rc = 0;
  1514. struct dsi_panel_cmd_set *set;
  1515. u32 i;
  1516. if (!priv_info) {
  1517. DSI_ERR("invalid mode priv info\n");
  1518. return -EINVAL;
  1519. }
  1520. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1521. set = &priv_info->cmd_sets[i];
  1522. set->type = i;
  1523. set->count = 0;
  1524. if (i == DSI_CMD_SET_PPS) {
  1525. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1526. if (rc)
  1527. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1528. i, rc);
  1529. set->state = DSI_CMD_SET_STATE_LP;
  1530. } else {
  1531. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1532. if (rc)
  1533. DSI_DEBUG("failed to parse set %d\n", i);
  1534. }
  1535. }
  1536. rc = 0;
  1537. return rc;
  1538. }
  1539. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1540. {
  1541. int rc = 0;
  1542. int i;
  1543. u32 length = 0;
  1544. u32 count = 0;
  1545. u32 size = 0;
  1546. u32 *arr_32 = NULL;
  1547. const u32 *arr;
  1548. struct dsi_parser_utils *utils = &panel->utils;
  1549. struct dsi_reset_seq *seq;
  1550. if (panel->host_config.ext_bridge_mode)
  1551. return 0;
  1552. arr = utils->get_property(utils->data,
  1553. "qcom,mdss-dsi-reset-sequence", &length);
  1554. if (!arr) {
  1555. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1556. rc = -EINVAL;
  1557. goto error;
  1558. }
  1559. if (length & 0x1) {
  1560. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1561. panel->name);
  1562. rc = -EINVAL;
  1563. goto error;
  1564. }
  1565. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1566. length = length / sizeof(u32);
  1567. size = length * sizeof(u32);
  1568. arr_32 = kzalloc(size, GFP_KERNEL);
  1569. if (!arr_32) {
  1570. rc = -ENOMEM;
  1571. goto error;
  1572. }
  1573. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1574. arr_32, length);
  1575. if (rc) {
  1576. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1577. goto error_free_arr_32;
  1578. }
  1579. count = length / 2;
  1580. size = count * sizeof(*seq);
  1581. seq = kzalloc(size, GFP_KERNEL);
  1582. if (!seq) {
  1583. rc = -ENOMEM;
  1584. goto error_free_arr_32;
  1585. }
  1586. panel->reset_config.sequence = seq;
  1587. panel->reset_config.count = count;
  1588. for (i = 0; i < length; i += 2) {
  1589. seq->level = arr_32[i];
  1590. seq->sleep_ms = arr_32[i + 1];
  1591. seq++;
  1592. }
  1593. error_free_arr_32:
  1594. kfree(arr_32);
  1595. error:
  1596. return rc;
  1597. }
  1598. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1599. {
  1600. struct dsi_parser_utils *utils = &panel->utils;
  1601. const char *string;
  1602. int i, rc = 0;
  1603. panel->ulps_feature_enabled =
  1604. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1605. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1606. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1607. panel->ulps_suspend_enabled =
  1608. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1609. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1610. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1611. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1612. "qcom,mdss-dsi-te-using-wd");
  1613. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1614. "qcom,cmd-sync-wait-broadcast");
  1615. panel->lp11_init = utils->read_bool(utils->data,
  1616. "qcom,mdss-dsi-lp11-init");
  1617. panel->spr_info.enable = false;
  1618. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1619. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1620. if (!rc) {
  1621. // find match for pack-type string
  1622. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1623. if (msm_spr_pack_type_str[i] &&
  1624. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1625. panel->spr_info.enable = true;
  1626. panel->spr_info.pack_type = i;
  1627. break;
  1628. }
  1629. }
  1630. }
  1631. pr_debug("%s source side spr packing, pack-type %s\n",
  1632. panel->spr_info.enable ? "enable" : "disable",
  1633. panel->spr_info.enable ?
  1634. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1635. return 0;
  1636. }
  1637. static int dsi_panel_parse_jitter_config(
  1638. struct dsi_display_mode *mode,
  1639. struct dsi_parser_utils *utils)
  1640. {
  1641. int rc;
  1642. struct dsi_display_mode_priv_info *priv_info;
  1643. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1644. u64 jitter_val = 0;
  1645. priv_info = mode->priv_info;
  1646. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1647. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1648. if (rc) {
  1649. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1650. } else {
  1651. jitter_val = jitter[0];
  1652. jitter_val = div_u64(jitter_val, jitter[1]);
  1653. }
  1654. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1655. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1656. priv_info->panel_jitter_denom =
  1657. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1658. } else {
  1659. priv_info->panel_jitter_numer = jitter[0];
  1660. priv_info->panel_jitter_denom = jitter[1];
  1661. }
  1662. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1663. &priv_info->panel_prefill_lines);
  1664. if (rc) {
  1665. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1666. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1667. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1668. } else if (priv_info->panel_prefill_lines >=
  1669. DSI_V_TOTAL(&mode->timing)) {
  1670. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1671. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1672. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1673. }
  1674. return 0;
  1675. }
  1676. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1677. {
  1678. int rc = 0;
  1679. char *supply_name;
  1680. if (panel->host_config.ext_bridge_mode)
  1681. return 0;
  1682. if (!strcmp(panel->type, "primary"))
  1683. supply_name = "qcom,panel-supply-entries";
  1684. else
  1685. supply_name = "qcom,panel-sec-supply-entries";
  1686. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1687. &panel->power_info, supply_name);
  1688. if (rc) {
  1689. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1690. goto error;
  1691. }
  1692. error:
  1693. return rc;
  1694. }
  1695. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1696. {
  1697. int rc = 0;
  1698. const char *data;
  1699. struct dsi_parser_utils *utils = &panel->utils;
  1700. char *reset_gpio_name, *mode_set_gpio_name;
  1701. if (!strcmp(panel->type, "primary")) {
  1702. reset_gpio_name = "qcom,platform-reset-gpio";
  1703. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1704. } else {
  1705. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1706. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1707. }
  1708. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1709. reset_gpio_name, 0);
  1710. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1711. !panel->host_config.ext_bridge_mode) {
  1712. rc = panel->reset_config.reset_gpio;
  1713. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1714. goto error;
  1715. }
  1716. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1717. "qcom,5v-boost-gpio",
  1718. 0);
  1719. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1720. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1721. panel->name, rc);
  1722. panel->reset_config.disp_en_gpio =
  1723. utils->get_named_gpio(utils->data,
  1724. "qcom,platform-en-gpio", 0);
  1725. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1726. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1727. panel->name, rc);
  1728. }
  1729. }
  1730. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1731. utils->data, mode_set_gpio_name, 0);
  1732. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1733. DSI_DEBUG("mode gpio not specified\n");
  1734. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1735. data = utils->get_property(utils->data,
  1736. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1737. if (data) {
  1738. if (!strcmp(data, "single_port"))
  1739. panel->reset_config.mode_sel_state =
  1740. MODE_SEL_SINGLE_PORT;
  1741. else if (!strcmp(data, "dual_port"))
  1742. panel->reset_config.mode_sel_state =
  1743. MODE_SEL_DUAL_PORT;
  1744. else if (!strcmp(data, "high"))
  1745. panel->reset_config.mode_sel_state =
  1746. MODE_GPIO_HIGH;
  1747. else if (!strcmp(data, "low"))
  1748. panel->reset_config.mode_sel_state =
  1749. MODE_GPIO_LOW;
  1750. } else {
  1751. /* Set default mode as SPLIT mode */
  1752. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1753. }
  1754. /* TODO: release memory */
  1755. rc = dsi_panel_parse_reset_sequence(panel);
  1756. if (rc) {
  1757. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1758. panel->name, rc);
  1759. goto error;
  1760. }
  1761. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1762. "qcom,mdss-dsi-panel-test-pin",
  1763. 0);
  1764. if (!gpio_is_valid(panel->panel_test_gpio))
  1765. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1766. __LINE__);
  1767. error:
  1768. return rc;
  1769. }
  1770. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1771. {
  1772. int rc = 0;
  1773. u32 val;
  1774. struct dsi_backlight_config *config = &panel->bl_config;
  1775. struct dsi_parser_utils *utils = &panel->utils;
  1776. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1777. &val);
  1778. if (rc) {
  1779. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1780. goto error;
  1781. }
  1782. config->pwm_period_usecs = val;
  1783. error:
  1784. return rc;
  1785. }
  1786. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1787. {
  1788. int rc = 0;
  1789. u32 val = 0;
  1790. const char *bl_type;
  1791. const char *data;
  1792. struct dsi_parser_utils *utils = &panel->utils;
  1793. char *bl_name;
  1794. if (!strcmp(panel->type, "primary"))
  1795. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1796. else
  1797. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1798. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1799. if (!bl_type) {
  1800. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1801. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1802. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1803. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1804. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1805. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1806. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1807. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1808. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1809. } else {
  1810. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1811. panel->name, bl_type);
  1812. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1813. }
  1814. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1815. if (!data) {
  1816. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1817. } else if (!strcmp(data, "delay_until_first_frame")) {
  1818. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1819. } else {
  1820. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1821. panel->name, data);
  1822. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1823. }
  1824. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1825. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1826. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1827. if (rc) {
  1828. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1829. panel->name);
  1830. panel->bl_config.bl_min_level = 0;
  1831. } else {
  1832. panel->bl_config.bl_min_level = val;
  1833. }
  1834. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1835. if (rc) {
  1836. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1837. panel->name);
  1838. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1839. } else {
  1840. panel->bl_config.bl_max_level = val;
  1841. }
  1842. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1843. &val);
  1844. if (rc) {
  1845. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1846. panel->name);
  1847. panel->bl_config.brightness_max_level = 255;
  1848. } else {
  1849. panel->bl_config.brightness_max_level = val;
  1850. }
  1851. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1852. "qcom,mdss-dsi-bl-inverted-dbv");
  1853. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1854. rc = dsi_panel_parse_bl_pwm_config(panel);
  1855. if (rc) {
  1856. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1857. panel->name, rc);
  1858. goto error;
  1859. }
  1860. }
  1861. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1862. "qcom,platform-bklight-en-gpio",
  1863. 0);
  1864. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1865. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1866. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1867. panel->name, rc);
  1868. rc = -EPROBE_DEFER;
  1869. goto error;
  1870. } else {
  1871. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1872. panel->name, rc);
  1873. rc = 0;
  1874. goto error;
  1875. }
  1876. }
  1877. error:
  1878. return rc;
  1879. }
  1880. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1881. struct dsi_parser_utils *utils)
  1882. {
  1883. const char *data;
  1884. u32 len, i;
  1885. int rc = 0;
  1886. struct dsi_display_mode_priv_info *priv_info;
  1887. u64 pixel_clk_khz;
  1888. if (!mode || !mode->priv_info)
  1889. return -EINVAL;
  1890. priv_info = mode->priv_info;
  1891. data = utils->get_property(utils->data,
  1892. "qcom,mdss-dsi-panel-phy-timings", &len);
  1893. if (!data) {
  1894. DSI_DEBUG("Unable to read Phy timing settings\n");
  1895. } else {
  1896. priv_info->phy_timing_val =
  1897. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1898. if (!priv_info->phy_timing_val)
  1899. return -EINVAL;
  1900. for (i = 0; i < len; i++)
  1901. priv_info->phy_timing_val[i] = data[i];
  1902. priv_info->phy_timing_len = len;
  1903. }
  1904. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1905. /*
  1906. * For command mode we update the pclk as part of
  1907. * function dsi_panel_calc_dsi_transfer_time( )
  1908. * as we set it based on dsi clock or mdp transfer time.
  1909. */
  1910. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1911. DSI_V_TOTAL(&mode->timing) *
  1912. mode->timing.refresh_rate);
  1913. do_div(pixel_clk_khz, 1000);
  1914. mode->pixel_clk_khz = pixel_clk_khz;
  1915. }
  1916. return rc;
  1917. }
  1918. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1919. struct dsi_parser_utils *utils)
  1920. {
  1921. u32 data;
  1922. int rc = -EINVAL;
  1923. int intf_width;
  1924. const char *compression;
  1925. struct dsi_display_mode_priv_info *priv_info;
  1926. if (!mode || !mode->priv_info)
  1927. return -EINVAL;
  1928. priv_info = mode->priv_info;
  1929. priv_info->dsc_enabled = false;
  1930. compression = utils->get_property(utils->data,
  1931. "qcom,compression-mode", NULL);
  1932. if (compression && !strcmp(compression, "dsc"))
  1933. priv_info->dsc_enabled = true;
  1934. if (!priv_info->dsc_enabled) {
  1935. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1936. return 0;
  1937. }
  1938. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1939. if (rc) {
  1940. priv_info->dsc.config.dsc_version_major = 0x1;
  1941. priv_info->dsc.config.dsc_version_minor = 0x1;
  1942. rc = 0;
  1943. } else {
  1944. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1945. * major version information
  1946. */
  1947. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1948. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1949. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1950. ((priv_info->dsc.config.dsc_version_minor
  1951. != 0x1) ||
  1952. (priv_info->dsc.config.dsc_version_minor
  1953. != 0x2))) {
  1954. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1955. __func__,
  1956. priv_info->dsc.config.dsc_version_major,
  1957. priv_info->dsc.config.dsc_version_minor
  1958. );
  1959. rc = -EINVAL;
  1960. goto error;
  1961. }
  1962. }
  1963. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1964. if (rc) {
  1965. priv_info->dsc.scr_rev = 0x0;
  1966. rc = 0;
  1967. } else {
  1968. priv_info->dsc.scr_rev = data & 0xff;
  1969. /* only one scr rev supported */
  1970. if (priv_info->dsc.scr_rev > 0x1) {
  1971. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1972. __func__, priv_info->dsc.scr_rev);
  1973. rc = -EINVAL;
  1974. goto error;
  1975. }
  1976. }
  1977. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1978. if (rc) {
  1979. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1980. goto error;
  1981. }
  1982. priv_info->dsc.config.slice_height = data;
  1983. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1984. if (rc) {
  1985. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1986. goto error;
  1987. }
  1988. priv_info->dsc.config.slice_width = data;
  1989. intf_width = mode->timing.h_active;
  1990. if (intf_width % priv_info->dsc.config.slice_width) {
  1991. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1992. intf_width, priv_info->dsc.config.slice_width);
  1993. rc = -EINVAL;
  1994. goto error;
  1995. }
  1996. priv_info->dsc.config.pic_width = mode->timing.h_active;
  1997. priv_info->dsc.config.pic_height = mode->timing.v_active;
  1998. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  1999. if (rc) {
  2000. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2001. goto error;
  2002. } else if (!data || (data > 2)) {
  2003. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2004. goto error;
  2005. }
  2006. priv_info->dsc.slice_per_pkt = data;
  2007. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2008. &data);
  2009. if (rc) {
  2010. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2011. goto error;
  2012. }
  2013. priv_info->dsc.config.bits_per_component = data;
  2014. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2015. if (rc) {
  2016. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2017. data = 0;
  2018. }
  2019. priv_info->dsc.pps_delay_ms = data;
  2020. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2021. &data);
  2022. if (rc) {
  2023. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2024. goto error;
  2025. }
  2026. priv_info->dsc.config.bits_per_pixel = data << 4;
  2027. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2028. &data);
  2029. if (rc) {
  2030. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2031. rc = 0;
  2032. data = MSM_CHROMA_444;
  2033. }
  2034. priv_info->dsc.chroma_format = data;
  2035. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2036. &data);
  2037. if (rc) {
  2038. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2039. rc = 0;
  2040. data = MSM_RGB;
  2041. }
  2042. priv_info->dsc.source_color_space = data;
  2043. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2044. "qcom,mdss-dsc-block-prediction-enable");
  2045. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2046. priv_info->dsc.config.slice_width);
  2047. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2048. priv_info->dsc.scr_rev);
  2049. if (rc) {
  2050. DSI_DEBUG("failed populating dsc params \n");
  2051. rc = -EINVAL;
  2052. goto error;
  2053. }
  2054. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2055. if (rc) {
  2056. DSI_DEBUG("failed populating other dsc params \n");
  2057. rc = -EINVAL;
  2058. goto error;
  2059. }
  2060. priv_info->pclk_scale.numer =
  2061. priv_info->dsc.config.bits_per_pixel >> 4;
  2062. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2063. priv_info->dsc.chroma_format,
  2064. priv_info->dsc.config.bits_per_component);
  2065. mode->timing.dsc_enabled = true;
  2066. mode->timing.dsc = &priv_info->dsc;
  2067. mode->timing.pclk_scale = priv_info->pclk_scale;
  2068. error:
  2069. return rc;
  2070. }
  2071. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2072. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2073. {
  2074. u32 data;
  2075. int rc = -EINVAL;
  2076. const char *compression;
  2077. struct dsi_display_mode_priv_info *priv_info;
  2078. int intf_width;
  2079. if (!mode || !mode->priv_info)
  2080. return -EINVAL;
  2081. priv_info = mode->priv_info;
  2082. priv_info->vdc_enabled = false;
  2083. compression = utils->get_property(utils->data,
  2084. "qcom,compression-mode", NULL);
  2085. if (compression && !strcmp(compression, "vdc"))
  2086. priv_info->vdc_enabled = true;
  2087. if (!priv_info->vdc_enabled) {
  2088. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2089. return 0;
  2090. }
  2091. priv_info->vdc.panel_mode = panel_mode;
  2092. priv_info->vdc.traffic_mode = traffic_mode;
  2093. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2094. if (rc) {
  2095. priv_info->vdc.version_major = 0x1;
  2096. priv_info->vdc.version_minor = 0x2;
  2097. priv_info->vdc.version_release = 0x0;
  2098. rc = 0;
  2099. } else {
  2100. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2101. * major version information
  2102. */
  2103. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2104. priv_info->vdc.version_minor = data & 0x0F;
  2105. if ((priv_info->vdc.version_major != 0x1) &&
  2106. ((priv_info->vdc.version_minor
  2107. != 0x2))) {
  2108. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2109. __func__,
  2110. priv_info->vdc.version_major,
  2111. priv_info->vdc.version_minor
  2112. );
  2113. rc = -EINVAL;
  2114. goto error;
  2115. }
  2116. }
  2117. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2118. if (rc) {
  2119. priv_info->vdc.version_release = 0x0;
  2120. rc = 0;
  2121. } else {
  2122. priv_info->vdc.version_release = data & 0xff;
  2123. /* only one release version is supported */
  2124. if (priv_info->vdc.version_release != 0x0) {
  2125. DSI_ERR("unsupported vdc release version %d\n",
  2126. priv_info->vdc.version_release);
  2127. rc = -EINVAL;
  2128. goto error;
  2129. }
  2130. }
  2131. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2132. priv_info->vdc.version_major,
  2133. priv_info->vdc.version_minor,
  2134. priv_info->vdc.version_release);
  2135. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2136. if (rc) {
  2137. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2138. goto error;
  2139. }
  2140. priv_info->vdc.slice_height = data;
  2141. /* slice height should be atleast 16 lines */
  2142. if (priv_info->vdc.slice_height < 16) {
  2143. DSI_ERR("invalid slice height %d\n",
  2144. priv_info->vdc.slice_height);
  2145. rc = -EINVAL;
  2146. goto error;
  2147. }
  2148. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2149. if (rc) {
  2150. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2151. goto error;
  2152. }
  2153. priv_info->vdc.slice_width = data;
  2154. /*
  2155. * slide-width should be multiple of 8
  2156. * slice-width should be atlease 64 pixels
  2157. */
  2158. if ((priv_info->vdc.slice_width & 7) ||
  2159. (priv_info->vdc.slice_width < 64)) {
  2160. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2161. rc = -EINVAL;
  2162. goto error;
  2163. }
  2164. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2165. if (rc) {
  2166. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2167. goto error;
  2168. } else if (!data || (data > 2)) {
  2169. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2170. rc = -EINVAL;
  2171. goto error;
  2172. }
  2173. intf_width = mode->timing.h_active;
  2174. priv_info->vdc.slice_per_pkt = data;
  2175. priv_info->vdc.frame_width = mode->timing.h_active;
  2176. priv_info->vdc.frame_height = mode->timing.v_active;
  2177. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2178. &data);
  2179. if (rc) {
  2180. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2181. goto error;
  2182. }
  2183. priv_info->vdc.bits_per_component = data;
  2184. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2185. if (rc) {
  2186. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2187. data = 0;
  2188. }
  2189. priv_info->vdc.pps_delay_ms = data;
  2190. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2191. &data);
  2192. if (rc) {
  2193. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2194. goto error;
  2195. }
  2196. priv_info->vdc.bits_per_pixel = data << 4;
  2197. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2198. &data);
  2199. if (rc) {
  2200. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2201. rc = 0;
  2202. data = MSM_CHROMA_444;
  2203. }
  2204. priv_info->vdc.chroma_format = data;
  2205. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2206. &data);
  2207. if (rc) {
  2208. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2209. rc = 0;
  2210. data = MSM_RGB;
  2211. }
  2212. priv_info->vdc.source_color_space = data;
  2213. rc = sde_vdc_populate_config(&priv_info->vdc,
  2214. intf_width, traffic_mode);
  2215. if (rc) {
  2216. DSI_DEBUG("failed populating vdc config\n");
  2217. rc = -EINVAL;
  2218. goto error;
  2219. }
  2220. priv_info->pclk_scale.numer =
  2221. priv_info->vdc.bits_per_pixel >> 4;
  2222. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2223. priv_info->vdc.chroma_format,
  2224. priv_info->vdc.bits_per_component);
  2225. mode->timing.vdc_enabled = true;
  2226. mode->timing.vdc = &priv_info->vdc;
  2227. mode->timing.pclk_scale = priv_info->pclk_scale;
  2228. error:
  2229. return rc;
  2230. }
  2231. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2232. {
  2233. int rc = 0;
  2234. struct drm_panel_hdr_properties *hdr_prop;
  2235. struct dsi_parser_utils *utils = &panel->utils;
  2236. hdr_prop = &panel->hdr_props;
  2237. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2238. "qcom,mdss-dsi-panel-hdr-enabled");
  2239. if (hdr_prop->hdr_enabled) {
  2240. rc = utils->read_u32_array(utils->data,
  2241. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2242. hdr_prop->display_primaries,
  2243. DISPLAY_PRIMARIES_MAX);
  2244. if (rc) {
  2245. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2246. __func__, __LINE__, rc);
  2247. hdr_prop->hdr_enabled = false;
  2248. return rc;
  2249. }
  2250. rc = utils->read_u32(utils->data,
  2251. "qcom,mdss-dsi-panel-peak-brightness",
  2252. &(hdr_prop->peak_brightness));
  2253. if (rc) {
  2254. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2255. __func__, __LINE__, rc);
  2256. hdr_prop->hdr_enabled = false;
  2257. return rc;
  2258. }
  2259. rc = utils->read_u32(utils->data,
  2260. "qcom,mdss-dsi-panel-blackness-level",
  2261. &(hdr_prop->blackness_level));
  2262. if (rc) {
  2263. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2264. __func__, __LINE__, rc);
  2265. hdr_prop->hdr_enabled = false;
  2266. return rc;
  2267. }
  2268. }
  2269. return 0;
  2270. }
  2271. static int dsi_panel_parse_topology(
  2272. struct dsi_display_mode_priv_info *priv_info,
  2273. struct dsi_parser_utils *utils,
  2274. int topology_override)
  2275. {
  2276. struct msm_display_topology *topology;
  2277. u32 top_count, top_sel, *array = NULL;
  2278. int i, len = 0;
  2279. int rc = -EINVAL;
  2280. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2281. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2282. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2283. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2284. return rc;
  2285. }
  2286. top_count = len / TOPOLOGY_SET_LEN;
  2287. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2288. if (!array)
  2289. return -ENOMEM;
  2290. rc = utils->read_u32_array(utils->data,
  2291. "qcom,display-topology", array, len);
  2292. if (rc) {
  2293. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2294. goto read_fail;
  2295. }
  2296. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2297. if (!topology) {
  2298. rc = -ENOMEM;
  2299. goto read_fail;
  2300. }
  2301. for (i = 0; i < top_count; i++) {
  2302. struct msm_display_topology *top = &topology[i];
  2303. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2304. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2305. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2306. }
  2307. if (topology_override >= 0 && topology_override < top_count) {
  2308. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2309. topology_override,
  2310. topology[topology_override].num_lm,
  2311. topology[topology_override].num_enc,
  2312. topology[topology_override].num_intf);
  2313. top_sel = topology_override;
  2314. goto parse_done;
  2315. }
  2316. rc = utils->read_u32(utils->data,
  2317. "qcom,default-topology-index", &top_sel);
  2318. if (rc) {
  2319. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2320. goto parse_fail;
  2321. }
  2322. if (top_sel >= top_count) {
  2323. rc = -EINVAL;
  2324. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2325. rc);
  2326. goto parse_fail;
  2327. }
  2328. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2329. topology[top_sel].num_lm,
  2330. topology[top_sel].num_enc,
  2331. topology[top_sel].num_intf);
  2332. parse_done:
  2333. memcpy(&priv_info->topology, &topology[top_sel],
  2334. sizeof(struct msm_display_topology));
  2335. parse_fail:
  2336. kfree(topology);
  2337. read_fail:
  2338. kfree(array);
  2339. return rc;
  2340. }
  2341. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2342. struct msm_roi_alignment *align)
  2343. {
  2344. int len = 0, rc = 0;
  2345. u32 value[6];
  2346. struct property *data;
  2347. if (!align)
  2348. return -EINVAL;
  2349. memset(align, 0, sizeof(*align));
  2350. data = utils->find_property(utils->data,
  2351. "qcom,panel-roi-alignment", &len);
  2352. len /= sizeof(u32);
  2353. if (!data) {
  2354. DSI_ERR("panel roi alignment not found\n");
  2355. rc = -EINVAL;
  2356. } else if (len != 6) {
  2357. DSI_ERR("incorrect roi alignment len %d\n", len);
  2358. rc = -EINVAL;
  2359. } else {
  2360. rc = utils->read_u32_array(utils->data,
  2361. "qcom,panel-roi-alignment", value, len);
  2362. if (rc)
  2363. DSI_DEBUG("error reading panel roi alignment values\n");
  2364. else {
  2365. align->xstart_pix_align = value[0];
  2366. align->ystart_pix_align = value[1];
  2367. align->width_pix_align = value[2];
  2368. align->height_pix_align = value[3];
  2369. align->min_width = value[4];
  2370. align->min_height = value[5];
  2371. }
  2372. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2373. align->xstart_pix_align,
  2374. align->width_pix_align,
  2375. align->ystart_pix_align,
  2376. align->height_pix_align,
  2377. align->min_width,
  2378. align->min_height);
  2379. }
  2380. return rc;
  2381. }
  2382. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2383. struct dsi_parser_utils *utils)
  2384. {
  2385. struct msm_roi_caps *roi_caps = NULL;
  2386. const char *data;
  2387. int rc = 0;
  2388. if (!mode || !mode->priv_info) {
  2389. DSI_ERR("invalid arguments\n");
  2390. return -EINVAL;
  2391. }
  2392. roi_caps = &mode->priv_info->roi_caps;
  2393. memset(roi_caps, 0, sizeof(*roi_caps));
  2394. data = utils->get_property(utils->data,
  2395. "qcom,partial-update-enabled", NULL);
  2396. if (data) {
  2397. if (!strcmp(data, "dual_roi"))
  2398. roi_caps->num_roi = 2;
  2399. else if (!strcmp(data, "single_roi"))
  2400. roi_caps->num_roi = 1;
  2401. else {
  2402. DSI_INFO(
  2403. "invalid value for qcom,partial-update-enabled: %s\n",
  2404. data);
  2405. return 0;
  2406. }
  2407. } else {
  2408. DSI_DEBUG("partial update disabled as the property is not set\n");
  2409. return 0;
  2410. }
  2411. roi_caps->merge_rois = utils->read_bool(utils->data,
  2412. "qcom,partial-update-roi-merge");
  2413. roi_caps->enabled = roi_caps->num_roi > 0;
  2414. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2415. roi_caps->enabled);
  2416. if (roi_caps->enabled)
  2417. rc = dsi_panel_parse_roi_alignment(utils,
  2418. &roi_caps->align);
  2419. if (rc)
  2420. memset(roi_caps, 0, sizeof(*roi_caps));
  2421. return rc;
  2422. }
  2423. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2424. struct dsi_parser_utils *utils)
  2425. {
  2426. bool vid_mode_support, cmd_mode_support;
  2427. if (!mode || !mode->priv_info) {
  2428. DSI_ERR("invalid arguments\n");
  2429. return -EINVAL;
  2430. }
  2431. vid_mode_support = utils->read_bool(utils->data,
  2432. "qcom,mdss-dsi-video-mode");
  2433. cmd_mode_support = utils->read_bool(utils->data,
  2434. "qcom,mdss-dsi-cmd-mode");
  2435. if (cmd_mode_support)
  2436. mode->panel_mode = DSI_OP_CMD_MODE;
  2437. else if (vid_mode_support)
  2438. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2439. else
  2440. return -EINVAL;
  2441. return 0;
  2442. };
  2443. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2444. {
  2445. int dms_enabled;
  2446. const char *data;
  2447. struct dsi_parser_utils *utils = &panel->utils;
  2448. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2449. dms_enabled = utils->read_bool(utils->data,
  2450. "qcom,dynamic-mode-switch-enabled");
  2451. if (!dms_enabled)
  2452. return 0;
  2453. data = utils->get_property(utils->data,
  2454. "qcom,dynamic-mode-switch-type", NULL);
  2455. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2456. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2457. } else {
  2458. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2459. panel->name, data);
  2460. return -EINVAL;
  2461. }
  2462. return 0;
  2463. };
  2464. /*
  2465. * The length of all the valid values to be checked should not be greater
  2466. * than the length of returned data from read command.
  2467. */
  2468. static bool
  2469. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2470. {
  2471. int i;
  2472. struct drm_panel_esd_config *config = &panel->esd_config;
  2473. for (i = 0; i < count; ++i) {
  2474. if (config->status_valid_params[i] >
  2475. config->status_cmds_rlen[i]) {
  2476. DSI_DEBUG("ignore valid params\n");
  2477. return false;
  2478. }
  2479. }
  2480. return true;
  2481. }
  2482. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2483. char *prop_key, u32 **target, u32 cmd_cnt)
  2484. {
  2485. int tmp;
  2486. if (!utils->find_property(utils->data, prop_key, &tmp))
  2487. return false;
  2488. tmp /= sizeof(u32);
  2489. if (tmp != cmd_cnt) {
  2490. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2491. tmp, cmd_cnt);
  2492. return false;
  2493. }
  2494. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2495. if (IS_ERR_OR_NULL(*target)) {
  2496. DSI_ERR("Error allocating memory for property\n");
  2497. return false;
  2498. }
  2499. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2500. DSI_ERR("cannot get values from dts\n");
  2501. kfree(*target);
  2502. *target = NULL;
  2503. return false;
  2504. }
  2505. return true;
  2506. }
  2507. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2508. {
  2509. kfree(esd_config->status_buf);
  2510. kfree(esd_config->return_buf);
  2511. kfree(esd_config->status_value);
  2512. kfree(esd_config->status_valid_params);
  2513. kfree(esd_config->status_cmds_rlen);
  2514. kfree(esd_config->status_cmd.cmds);
  2515. }
  2516. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2517. {
  2518. struct drm_panel_esd_config *esd_config;
  2519. int rc = 0;
  2520. u32 tmp;
  2521. u32 i, status_len, *lenp;
  2522. struct property *data;
  2523. struct dsi_parser_utils *utils = &panel->utils;
  2524. if (!panel) {
  2525. DSI_ERR("Invalid Params\n");
  2526. return -EINVAL;
  2527. }
  2528. esd_config = &panel->esd_config;
  2529. if (!esd_config)
  2530. return -EINVAL;
  2531. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2532. DSI_CMD_SET_PANEL_STATUS, utils);
  2533. if (!esd_config->status_cmd.count) {
  2534. DSI_ERR("panel status command parsing failed\n");
  2535. rc = -EINVAL;
  2536. goto error;
  2537. }
  2538. if (!dsi_panel_parse_esd_status_len(utils,
  2539. "qcom,mdss-dsi-panel-status-read-length",
  2540. &panel->esd_config.status_cmds_rlen,
  2541. esd_config->status_cmd.count)) {
  2542. DSI_ERR("Invalid status read length\n");
  2543. rc = -EINVAL;
  2544. goto error1;
  2545. }
  2546. if (dsi_panel_parse_esd_status_len(utils,
  2547. "qcom,mdss-dsi-panel-status-valid-params",
  2548. &panel->esd_config.status_valid_params,
  2549. esd_config->status_cmd.count)) {
  2550. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2551. esd_config->status_cmd.count)) {
  2552. rc = -EINVAL;
  2553. goto error2;
  2554. }
  2555. }
  2556. status_len = 0;
  2557. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2558. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2559. status_len += lenp[i];
  2560. if (!status_len) {
  2561. rc = -EINVAL;
  2562. goto error2;
  2563. }
  2564. /*
  2565. * Some panel may need multiple read commands to properly
  2566. * check panel status. Do a sanity check for proper status
  2567. * value which will be compared with the value read by dsi
  2568. * controller during ESD check. Also check if multiple read
  2569. * commands are there then, there should be corresponding
  2570. * status check values for each read command.
  2571. */
  2572. data = utils->find_property(utils->data,
  2573. "qcom,mdss-dsi-panel-status-value", &tmp);
  2574. tmp /= sizeof(u32);
  2575. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2576. esd_config->groups = tmp / status_len;
  2577. } else {
  2578. DSI_ERR("error parse panel-status-value\n");
  2579. rc = -EINVAL;
  2580. goto error2;
  2581. }
  2582. esd_config->status_value =
  2583. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2584. GFP_KERNEL);
  2585. if (!esd_config->status_value) {
  2586. rc = -ENOMEM;
  2587. goto error2;
  2588. }
  2589. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2590. sizeof(unsigned char), GFP_KERNEL);
  2591. if (!esd_config->return_buf) {
  2592. rc = -ENOMEM;
  2593. goto error3;
  2594. }
  2595. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2596. if (!esd_config->status_buf) {
  2597. rc = -ENOMEM;
  2598. goto error4;
  2599. }
  2600. rc = utils->read_u32_array(utils->data,
  2601. "qcom,mdss-dsi-panel-status-value",
  2602. esd_config->status_value, esd_config->groups * status_len);
  2603. if (rc) {
  2604. DSI_DEBUG("error reading panel status values\n");
  2605. memset(esd_config->status_value, 0,
  2606. esd_config->groups * status_len);
  2607. }
  2608. return 0;
  2609. error4:
  2610. kfree(esd_config->return_buf);
  2611. error3:
  2612. kfree(esd_config->status_value);
  2613. error2:
  2614. kfree(esd_config->status_valid_params);
  2615. kfree(esd_config->status_cmds_rlen);
  2616. error1:
  2617. kfree(esd_config->status_cmd.cmds);
  2618. error:
  2619. return rc;
  2620. }
  2621. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2622. {
  2623. int rc = 0;
  2624. const char *string;
  2625. struct drm_panel_esd_config *esd_config;
  2626. struct dsi_parser_utils *utils = &panel->utils;
  2627. u8 *esd_mode = NULL;
  2628. esd_config = &panel->esd_config;
  2629. esd_config->status_mode = ESD_MODE_MAX;
  2630. esd_config->esd_enabled = utils->read_bool(utils->data,
  2631. "qcom,esd-check-enabled");
  2632. if (!esd_config->esd_enabled)
  2633. return 0;
  2634. rc = utils->read_string(utils->data,
  2635. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2636. if (!rc) {
  2637. if (!strcmp(string, "bta_check")) {
  2638. esd_config->status_mode = ESD_MODE_SW_BTA;
  2639. } else if (!strcmp(string, "reg_read")) {
  2640. esd_config->status_mode = ESD_MODE_REG_READ;
  2641. } else if (!strcmp(string, "te_signal_check")) {
  2642. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2643. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2644. } else {
  2645. DSI_ERR("TE-ESD not valid for video mode\n");
  2646. rc = -EINVAL;
  2647. goto error;
  2648. }
  2649. } else {
  2650. DSI_ERR("No valid panel-status-check-mode string\n");
  2651. rc = -EINVAL;
  2652. goto error;
  2653. }
  2654. } else {
  2655. DSI_DEBUG("status check method not defined!\n");
  2656. rc = -EINVAL;
  2657. goto error;
  2658. }
  2659. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2660. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2661. if (rc) {
  2662. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2663. rc);
  2664. goto error;
  2665. }
  2666. esd_mode = "register_read";
  2667. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2668. esd_mode = "bta_trigger";
  2669. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2670. esd_mode = "te_check";
  2671. }
  2672. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2673. return 0;
  2674. error:
  2675. panel->esd_config.esd_enabled = false;
  2676. return rc;
  2677. }
  2678. static void dsi_panel_update_util(struct dsi_panel *panel,
  2679. struct device_node *parser_node)
  2680. {
  2681. struct dsi_parser_utils *utils = &panel->utils;
  2682. if (parser_node) {
  2683. *utils = *dsi_parser_get_parser_utils();
  2684. utils->data = parser_node;
  2685. DSI_DEBUG("switching to parser APIs\n");
  2686. goto end;
  2687. }
  2688. *utils = *dsi_parser_get_of_utils();
  2689. utils->data = panel->panel_of_node;
  2690. end:
  2691. utils->node = panel->panel_of_node;
  2692. }
  2693. struct dsi_panel *dsi_panel_get(struct device *parent,
  2694. struct device_node *of_node,
  2695. struct device_node *parser_node,
  2696. const char *type,
  2697. int topology_override)
  2698. {
  2699. struct dsi_panel *panel;
  2700. struct dsi_parser_utils *utils;
  2701. const char *panel_physical_type;
  2702. int rc = 0;
  2703. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2704. if (!panel)
  2705. return ERR_PTR(-ENOMEM);
  2706. panel->panel_of_node = of_node;
  2707. panel->parent = parent;
  2708. panel->type = type;
  2709. dsi_panel_update_util(panel, parser_node);
  2710. utils = &panel->utils;
  2711. panel->name = utils->get_property(utils->data,
  2712. "qcom,mdss-dsi-panel-name", NULL);
  2713. if (!panel->name)
  2714. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2715. /*
  2716. * Set panel type to LCD as default.
  2717. */
  2718. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2719. panel_physical_type = utils->get_property(utils->data,
  2720. "qcom,mdss-dsi-panel-physical-type", NULL);
  2721. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2722. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2723. rc = dsi_panel_parse_host_config(panel);
  2724. if (rc) {
  2725. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2726. rc);
  2727. goto error;
  2728. }
  2729. rc = dsi_panel_parse_panel_mode(panel);
  2730. if (rc) {
  2731. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2732. rc);
  2733. goto error;
  2734. }
  2735. rc = dsi_panel_parse_dfps_caps(panel);
  2736. if (rc)
  2737. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2738. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2739. if (rc)
  2740. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2741. /* allow qsync support only if DFPS is with VFP approach */
  2742. if ((panel->dfps_caps.dfps_support) &&
  2743. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2744. panel->qsync_min_fps = 0;
  2745. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2746. if (rc)
  2747. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2748. rc = dsi_panel_parse_phy_props(panel);
  2749. if (rc) {
  2750. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2751. rc);
  2752. goto error;
  2753. }
  2754. rc = dsi_panel_parse_gpios(panel);
  2755. if (rc) {
  2756. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2757. goto error;
  2758. }
  2759. rc = dsi_panel_parse_power_cfg(panel);
  2760. if (rc)
  2761. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2762. rc = dsi_panel_parse_bl_config(panel);
  2763. if (rc) {
  2764. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2765. if (rc == -EPROBE_DEFER)
  2766. goto error;
  2767. }
  2768. rc = dsi_panel_parse_misc_features(panel);
  2769. if (rc)
  2770. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2771. rc = dsi_panel_parse_hdr_config(panel);
  2772. if (rc)
  2773. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2774. rc = dsi_panel_get_mode_count(panel);
  2775. if (rc) {
  2776. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2777. goto error;
  2778. }
  2779. rc = dsi_panel_parse_dms_info(panel);
  2780. if (rc)
  2781. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2782. rc = dsi_panel_parse_esd_config(panel);
  2783. if (rc)
  2784. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2785. rc = dsi_panel_vreg_get(panel);
  2786. if (rc) {
  2787. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2788. panel->name, rc);
  2789. goto error;
  2790. }
  2791. panel->power_mode = SDE_MODE_DPMS_OFF;
  2792. drm_panel_init(&panel->drm_panel);
  2793. panel->drm_panel.dev = &panel->mipi_device.dev;
  2794. panel->mipi_device.dev.of_node = of_node;
  2795. rc = drm_panel_add(&panel->drm_panel);
  2796. if (rc)
  2797. goto error_vreg_put;
  2798. mutex_init(&panel->panel_lock);
  2799. return panel;
  2800. error_vreg_put:
  2801. (void)dsi_panel_vreg_put(panel);
  2802. error:
  2803. kfree(panel);
  2804. return ERR_PTR(rc);
  2805. }
  2806. void dsi_panel_put(struct dsi_panel *panel)
  2807. {
  2808. drm_panel_remove(&panel->drm_panel);
  2809. /* free resources allocated for ESD check */
  2810. dsi_panel_esd_config_deinit(&panel->esd_config);
  2811. kfree(panel);
  2812. }
  2813. int dsi_panel_drv_init(struct dsi_panel *panel,
  2814. struct mipi_dsi_host *host)
  2815. {
  2816. int rc = 0;
  2817. struct mipi_dsi_device *dev;
  2818. if (!panel || !host) {
  2819. DSI_ERR("invalid params\n");
  2820. return -EINVAL;
  2821. }
  2822. mutex_lock(&panel->panel_lock);
  2823. dev = &panel->mipi_device;
  2824. dev->host = host;
  2825. /*
  2826. * We dont have device structure since panel is not a device node.
  2827. * When using drm panel framework, the device is probed when the host is
  2828. * create.
  2829. */
  2830. dev->channel = 0;
  2831. dev->lanes = 4;
  2832. panel->host = host;
  2833. rc = dsi_panel_pinctrl_init(panel);
  2834. if (rc) {
  2835. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2836. panel->name, rc);
  2837. goto exit;
  2838. }
  2839. rc = dsi_panel_gpio_request(panel);
  2840. if (rc) {
  2841. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2842. rc);
  2843. goto error_pinctrl_deinit;
  2844. }
  2845. rc = dsi_panel_bl_register(panel);
  2846. if (rc) {
  2847. if (rc != -EPROBE_DEFER)
  2848. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2849. panel->name, rc);
  2850. goto error_gpio_release;
  2851. }
  2852. goto exit;
  2853. error_gpio_release:
  2854. (void)dsi_panel_gpio_release(panel);
  2855. error_pinctrl_deinit:
  2856. (void)dsi_panel_pinctrl_deinit(panel);
  2857. exit:
  2858. mutex_unlock(&panel->panel_lock);
  2859. return rc;
  2860. }
  2861. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2862. {
  2863. int rc = 0;
  2864. if (!panel) {
  2865. DSI_ERR("invalid params\n");
  2866. return -EINVAL;
  2867. }
  2868. mutex_lock(&panel->panel_lock);
  2869. rc = dsi_panel_bl_unregister(panel);
  2870. if (rc)
  2871. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2872. panel->name, rc);
  2873. rc = dsi_panel_gpio_release(panel);
  2874. if (rc)
  2875. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2876. rc);
  2877. rc = dsi_panel_pinctrl_deinit(panel);
  2878. if (rc)
  2879. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2880. rc);
  2881. rc = dsi_panel_vreg_put(panel);
  2882. if (rc)
  2883. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2884. panel->host = NULL;
  2885. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2886. mutex_unlock(&panel->panel_lock);
  2887. return rc;
  2888. }
  2889. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2890. struct dsi_display_mode *mode)
  2891. {
  2892. return 0;
  2893. }
  2894. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2895. {
  2896. const u32 SINGLE_MODE_SUPPORT = 1;
  2897. struct dsi_parser_utils *utils;
  2898. struct device_node *timings_np, *child_np;
  2899. int num_dfps_rates, num_bit_clks;
  2900. int num_video_modes = 0, num_cmd_modes = 0;
  2901. int count, rc = 0;
  2902. if (!panel) {
  2903. DSI_ERR("invalid params\n");
  2904. return -EINVAL;
  2905. }
  2906. utils = &panel->utils;
  2907. panel->num_timing_nodes = 0;
  2908. timings_np = utils->get_child_by_name(utils->data,
  2909. "qcom,mdss-dsi-display-timings");
  2910. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2911. DSI_ERR("no display timing nodes defined\n");
  2912. rc = -EINVAL;
  2913. goto error;
  2914. }
  2915. count = utils->get_child_count(timings_np);
  2916. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2917. count > DSI_MODE_MAX) {
  2918. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2919. rc = -EINVAL;
  2920. goto error;
  2921. }
  2922. /* No multiresolution support is available for video mode panels.
  2923. * Multi-mode is supported for video mode during POMS is enabled.
  2924. */
  2925. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2926. !panel->host_config.ext_bridge_mode &&
  2927. !panel->panel_mode_switch_enabled)
  2928. count = SINGLE_MODE_SUPPORT;
  2929. panel->num_timing_nodes = count;
  2930. dsi_for_each_child_node(timings_np, child_np) {
  2931. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  2932. num_video_modes++;
  2933. else if (utils->read_bool(child_np,
  2934. "qcom,mdss-dsi-cmd-mode"))
  2935. num_cmd_modes++;
  2936. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2937. num_video_modes++;
  2938. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2939. num_cmd_modes++;
  2940. }
  2941. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2942. panel->dfps_caps.dfps_list_len;
  2943. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2944. panel->dyn_clk_caps.bit_clk_list_len;
  2945. /*
  2946. * Inflate num_of_modes by fps and bit clks in dfps.
  2947. * Single command mode for video mode panels supporting
  2948. * panel operating mode switch.
  2949. */
  2950. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  2951. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  2952. (panel->panel_mode_switch_enabled))
  2953. num_cmd_modes = 1;
  2954. else
  2955. num_cmd_modes = num_cmd_modes * num_bit_clks;
  2956. panel->num_display_modes = num_video_modes + num_cmd_modes;
  2957. error:
  2958. return rc;
  2959. }
  2960. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2961. struct dsi_panel_phy_props *phy_props)
  2962. {
  2963. int rc = 0;
  2964. if (!panel || !phy_props) {
  2965. DSI_ERR("invalid params\n");
  2966. return -EINVAL;
  2967. }
  2968. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2969. return rc;
  2970. }
  2971. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2972. struct dsi_dfps_capabilities *dfps_caps)
  2973. {
  2974. int rc = 0;
  2975. if (!panel || !dfps_caps) {
  2976. DSI_ERR("invalid params\n");
  2977. return -EINVAL;
  2978. }
  2979. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2980. return rc;
  2981. }
  2982. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2983. {
  2984. int i;
  2985. if (!mode->priv_info)
  2986. return;
  2987. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2988. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2989. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2990. }
  2991. kfree(mode->priv_info);
  2992. }
  2993. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2994. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2995. {
  2996. u32 frame_time_us,nslices;
  2997. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  2998. dsi_transfer_time_us, pixel_clk_khz;
  2999. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3000. struct dsi_mode_info *timing = &mode->timing;
  3001. struct dsi_display_mode *display_mode;
  3002. u32 jitter_numer, jitter_denom, prefill_lines;
  3003. u32 min_threshold_us, prefill_time_us;
  3004. u16 bpp;
  3005. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3006. * + 1 byte dcs data command.
  3007. */
  3008. const u32 packet_overhead = 56;
  3009. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3010. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3011. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3012. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3013. if (timing->dsc_enabled) {
  3014. nslices = (timing->h_active)/(dsc->config.slice_width);
  3015. /* (slice width x bit-per-pixel + packet overhead) x
  3016. * number of slices x height x fps / lane
  3017. */
  3018. bpp = DSC_BPP(dsc->config);
  3019. bits_per_line = ((dsc->config.slice_width * bpp) +
  3020. packet_overhead) * nslices;
  3021. bits_per_line = bits_per_line / (config->num_data_lanes);
  3022. min_bitclk_hz = (bits_per_line * timing->v_active *
  3023. timing->refresh_rate);
  3024. } else {
  3025. total_active_pixels = ((dsi_h_active_dce(timing)
  3026. * timing->v_active));
  3027. /* calculate the actual bitclk needed to transfer the frame */
  3028. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3029. (config->bpp));
  3030. do_div(min_bitclk_hz, config->num_data_lanes);
  3031. }
  3032. timing->min_dsi_clk_hz = min_bitclk_hz;
  3033. if (timing->clk_rate_hz) {
  3034. /* adjust the transfer time proportionately for bit clk*/
  3035. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3036. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3037. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3038. } else if (mode->priv_info->mdp_transfer_time_us) {
  3039. timing->dsi_transfer_time_us =
  3040. mode->priv_info->mdp_transfer_time_us;
  3041. } else {
  3042. min_threshold_us = mult_frac(frame_time_us,
  3043. jitter_numer, (jitter_denom * 100));
  3044. /*
  3045. * Increase the prefill_lines proportionately as recommended
  3046. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3047. */
  3048. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3049. timing->refresh_rate, 60);
  3050. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3051. (timing->v_active));
  3052. /*
  3053. * Threshold is sum of panel jitter time, prefill line time
  3054. * plus 100usec buffer time.
  3055. */
  3056. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3057. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3058. if (min_threshold_us > frame_threshold_us)
  3059. frame_threshold_us = min_threshold_us;
  3060. timing->dsi_transfer_time_us = frame_time_us -
  3061. frame_threshold_us;
  3062. }
  3063. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3064. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3065. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3066. timing->mdp_transfer_time_us =
  3067. mode->priv_info->mdp_transfer_time_us;
  3068. }
  3069. /* Calculate pclk_khz to update modeinfo */
  3070. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3071. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3072. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3073. do_div(pixel_clk_khz, config->bpp);
  3074. display_mode->pixel_clk_khz = pixel_clk_khz;
  3075. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3076. }
  3077. int dsi_panel_get_mode(struct dsi_panel *panel,
  3078. u32 index, struct dsi_display_mode *mode,
  3079. int topology_override)
  3080. {
  3081. struct device_node *timings_np, *child_np;
  3082. struct dsi_parser_utils *utils;
  3083. struct dsi_display_mode_priv_info *prv_info;
  3084. u32 child_idx = 0;
  3085. int rc = 0, num_timings;
  3086. int traffic_mode;
  3087. int panel_mode;
  3088. void *utils_data = NULL;
  3089. if (!panel || !mode) {
  3090. DSI_ERR("invalid params\n");
  3091. return -EINVAL;
  3092. }
  3093. mutex_lock(&panel->panel_lock);
  3094. utils = &panel->utils;
  3095. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3096. if (!mode->priv_info) {
  3097. rc = -ENOMEM;
  3098. goto done;
  3099. }
  3100. prv_info = mode->priv_info;
  3101. timings_np = utils->get_child_by_name(utils->data,
  3102. "qcom,mdss-dsi-display-timings");
  3103. if (!timings_np) {
  3104. DSI_ERR("no display timing nodes defined\n");
  3105. rc = -EINVAL;
  3106. goto parse_fail;
  3107. }
  3108. num_timings = utils->get_child_count(timings_np);
  3109. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3110. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3111. rc = -EINVAL;
  3112. goto parse_fail;
  3113. }
  3114. utils_data = utils->data;
  3115. traffic_mode = panel->video_config.traffic_mode;
  3116. panel_mode = panel->panel_mode;
  3117. dsi_for_each_child_node(timings_np, child_np) {
  3118. if (index != child_idx++)
  3119. continue;
  3120. utils->data = child_np;
  3121. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3122. if (rc) {
  3123. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3124. goto parse_fail;
  3125. }
  3126. rc = dsi_panel_parse_dsc_params(mode, utils);
  3127. if (rc) {
  3128. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3129. goto parse_fail;
  3130. }
  3131. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3132. panel_mode);
  3133. if (rc) {
  3134. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3135. goto parse_fail;
  3136. }
  3137. rc = dsi_panel_parse_topology(prv_info, utils,
  3138. topology_override);
  3139. if (rc) {
  3140. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3141. goto parse_fail;
  3142. }
  3143. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3144. if (rc) {
  3145. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3146. goto parse_fail;
  3147. }
  3148. rc = dsi_panel_parse_jitter_config(mode, utils);
  3149. if (rc)
  3150. DSI_ERR(
  3151. "failed to parse panel jitter config, rc=%d\n", rc);
  3152. rc = dsi_panel_parse_phy_timing(mode, utils);
  3153. if (rc) {
  3154. DSI_ERR(
  3155. "failed to parse panel phy timings, rc=%d\n", rc);
  3156. goto parse_fail;
  3157. }
  3158. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3159. if (rc)
  3160. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3161. if (panel->panel_mode_switch_enabled) {
  3162. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3163. if (rc) {
  3164. rc = 0;
  3165. mode->panel_mode = panel->panel_mode;
  3166. DSI_INFO(
  3167. "POMS: panel mode isn't specified in timing[%d]\n",
  3168. child_idx);
  3169. }
  3170. } else {
  3171. mode->panel_mode = panel->panel_mode;
  3172. }
  3173. }
  3174. goto done;
  3175. parse_fail:
  3176. kfree(mode->priv_info);
  3177. mode->priv_info = NULL;
  3178. done:
  3179. utils->data = utils_data;
  3180. mutex_unlock(&panel->panel_lock);
  3181. return rc;
  3182. }
  3183. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3184. struct dsi_display_mode *mode,
  3185. struct dsi_host_config *config)
  3186. {
  3187. int rc = 0;
  3188. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3189. if (!panel || !mode || !config) {
  3190. DSI_ERR("invalid params\n");
  3191. return -EINVAL;
  3192. }
  3193. mutex_lock(&panel->panel_lock);
  3194. config->panel_mode = panel->panel_mode;
  3195. memcpy(&config->common_config, &panel->host_config,
  3196. sizeof(config->common_config));
  3197. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3198. memcpy(&config->u.video_engine, &panel->video_config,
  3199. sizeof(config->u.video_engine));
  3200. } else {
  3201. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3202. sizeof(config->u.cmd_engine));
  3203. }
  3204. memcpy(&config->video_timing, &mode->timing,
  3205. sizeof(config->video_timing));
  3206. config->video_timing.mdp_transfer_time_us =
  3207. mode->priv_info->mdp_transfer_time_us;
  3208. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3209. config->video_timing.dsc = &mode->priv_info->dsc;
  3210. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3211. config->video_timing.vdc = &mode->priv_info->vdc;
  3212. if (dyn_clk_caps->dyn_clk_support)
  3213. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3214. else
  3215. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3216. config->esc_clk_rate_hz = 19200000;
  3217. mutex_unlock(&panel->panel_lock);
  3218. return rc;
  3219. }
  3220. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3221. {
  3222. int rc = 0;
  3223. if (!panel) {
  3224. DSI_ERR("invalid params\n");
  3225. return -EINVAL;
  3226. }
  3227. mutex_lock(&panel->panel_lock);
  3228. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3229. if (panel->lp11_init)
  3230. goto error;
  3231. rc = dsi_panel_power_on(panel);
  3232. if (rc) {
  3233. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3234. goto error;
  3235. }
  3236. error:
  3237. mutex_unlock(&panel->panel_lock);
  3238. return rc;
  3239. }
  3240. int dsi_panel_update_pps(struct dsi_panel *panel)
  3241. {
  3242. int rc = 0;
  3243. struct dsi_panel_cmd_set *set = NULL;
  3244. struct dsi_display_mode_priv_info *priv_info = NULL;
  3245. if (!panel || !panel->cur_mode) {
  3246. DSI_ERR("invalid params\n");
  3247. return -EINVAL;
  3248. }
  3249. mutex_lock(&panel->panel_lock);
  3250. priv_info = panel->cur_mode->priv_info;
  3251. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3252. if (priv_info->dsc_enabled)
  3253. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3254. panel->dce_pps_cmd, 0,
  3255. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3256. else if (priv_info->vdc_enabled)
  3257. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3258. panel->dce_pps_cmd, 0,
  3259. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3260. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3261. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3262. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3263. if (rc) {
  3264. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3265. goto error;
  3266. }
  3267. }
  3268. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3269. if (rc) {
  3270. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3271. panel->name, rc);
  3272. }
  3273. dsi_panel_destroy_cmd_packets(set);
  3274. error:
  3275. mutex_unlock(&panel->panel_lock);
  3276. return rc;
  3277. }
  3278. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3279. {
  3280. int rc = 0;
  3281. if (!panel) {
  3282. DSI_ERR("invalid params\n");
  3283. return -EINVAL;
  3284. }
  3285. mutex_lock(&panel->panel_lock);
  3286. if (!panel->panel_initialized)
  3287. goto exit;
  3288. /*
  3289. * Consider LP1->LP2->LP1.
  3290. * If the panel is already in LP mode, do not need to
  3291. * set the regulator.
  3292. * IBB and AB power mode would be set at the same time
  3293. * in PMIC driver, so we only call ibb setting that is enough.
  3294. */
  3295. if (dsi_panel_is_type_oled(panel) &&
  3296. panel->power_mode != SDE_MODE_DPMS_LP2)
  3297. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3298. "ibb", REGULATOR_MODE_IDLE);
  3299. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3300. if (rc)
  3301. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3302. panel->name, rc);
  3303. exit:
  3304. mutex_unlock(&panel->panel_lock);
  3305. return rc;
  3306. }
  3307. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3308. {
  3309. int rc = 0;
  3310. if (!panel) {
  3311. DSI_ERR("invalid params\n");
  3312. return -EINVAL;
  3313. }
  3314. mutex_lock(&panel->panel_lock);
  3315. if (!panel->panel_initialized)
  3316. goto exit;
  3317. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3318. if (rc)
  3319. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3320. panel->name, rc);
  3321. exit:
  3322. mutex_unlock(&panel->panel_lock);
  3323. return rc;
  3324. }
  3325. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3326. {
  3327. int rc = 0;
  3328. if (!panel) {
  3329. DSI_ERR("invalid params\n");
  3330. return -EINVAL;
  3331. }
  3332. mutex_lock(&panel->panel_lock);
  3333. if (!panel->panel_initialized)
  3334. goto exit;
  3335. /*
  3336. * Consider about LP1->LP2->NOLP.
  3337. */
  3338. if (dsi_panel_is_type_oled(panel) &&
  3339. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3340. panel->power_mode == SDE_MODE_DPMS_LP2))
  3341. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3342. "ibb", REGULATOR_MODE_NORMAL);
  3343. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3344. if (rc)
  3345. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3346. panel->name, rc);
  3347. exit:
  3348. mutex_unlock(&panel->panel_lock);
  3349. return rc;
  3350. }
  3351. int dsi_panel_prepare(struct dsi_panel *panel)
  3352. {
  3353. int rc = 0;
  3354. if (!panel) {
  3355. DSI_ERR("invalid params\n");
  3356. return -EINVAL;
  3357. }
  3358. mutex_lock(&panel->panel_lock);
  3359. if (panel->lp11_init) {
  3360. rc = dsi_panel_power_on(panel);
  3361. if (rc) {
  3362. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3363. panel->name, rc);
  3364. goto error;
  3365. }
  3366. }
  3367. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3368. if (rc) {
  3369. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3370. panel->name, rc);
  3371. goto error;
  3372. }
  3373. error:
  3374. mutex_unlock(&panel->panel_lock);
  3375. return rc;
  3376. }
  3377. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3378. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3379. {
  3380. static const int ROI_CMD_LEN = 5;
  3381. int rc = 0;
  3382. /* DTYPE_DCS_LWRITE */
  3383. char *caset, *paset;
  3384. set->cmds = NULL;
  3385. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3386. if (!caset) {
  3387. rc = -ENOMEM;
  3388. goto exit;
  3389. }
  3390. caset[0] = 0x2a;
  3391. caset[1] = (roi->x & 0xFF00) >> 8;
  3392. caset[2] = roi->x & 0xFF;
  3393. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3394. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3395. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3396. if (!paset) {
  3397. rc = -ENOMEM;
  3398. goto error_free_mem;
  3399. }
  3400. paset[0] = 0x2b;
  3401. paset[1] = (roi->y & 0xFF00) >> 8;
  3402. paset[2] = roi->y & 0xFF;
  3403. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3404. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3405. set->type = DSI_CMD_SET_ROI;
  3406. set->state = DSI_CMD_SET_STATE_LP;
  3407. set->count = 2; /* send caset + paset together */
  3408. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3409. if (!set->cmds) {
  3410. rc = -ENOMEM;
  3411. goto error_free_mem;
  3412. }
  3413. set->cmds[0].msg.channel = 0;
  3414. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3415. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3416. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3417. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3418. set->cmds[0].msg.tx_buf = caset;
  3419. set->cmds[0].msg.rx_len = 0;
  3420. set->cmds[0].msg.rx_buf = 0;
  3421. set->cmds[0].msg.wait_ms = 0;
  3422. set->cmds[0].last_command = 0;
  3423. set->cmds[0].post_wait_ms = 0;
  3424. set->cmds[1].msg.channel = 0;
  3425. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3426. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3427. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3428. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3429. set->cmds[1].msg.tx_buf = paset;
  3430. set->cmds[1].msg.rx_len = 0;
  3431. set->cmds[1].msg.rx_buf = 0;
  3432. set->cmds[1].msg.wait_ms = 0;
  3433. set->cmds[1].last_command = 1;
  3434. set->cmds[1].post_wait_ms = 0;
  3435. goto exit;
  3436. error_free_mem:
  3437. kfree(caset);
  3438. kfree(paset);
  3439. kfree(set->cmds);
  3440. exit:
  3441. return rc;
  3442. }
  3443. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3444. int ctrl_idx)
  3445. {
  3446. int rc = 0;
  3447. if (!panel) {
  3448. DSI_ERR("invalid params\n");
  3449. return -EINVAL;
  3450. }
  3451. mutex_lock(&panel->panel_lock);
  3452. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3453. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3454. if (rc)
  3455. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3456. panel->name, rc);
  3457. mutex_unlock(&panel->panel_lock);
  3458. return rc;
  3459. }
  3460. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3461. int ctrl_idx)
  3462. {
  3463. int rc = 0;
  3464. if (!panel) {
  3465. DSI_ERR("invalid params\n");
  3466. return -EINVAL;
  3467. }
  3468. mutex_lock(&panel->panel_lock);
  3469. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3470. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3471. if (rc)
  3472. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3473. panel->name, rc);
  3474. mutex_unlock(&panel->panel_lock);
  3475. return rc;
  3476. }
  3477. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3478. struct dsi_rect *roi)
  3479. {
  3480. int rc = 0;
  3481. struct dsi_panel_cmd_set *set;
  3482. struct dsi_display_mode_priv_info *priv_info;
  3483. if (!panel || !panel->cur_mode) {
  3484. DSI_ERR("Invalid params\n");
  3485. return -EINVAL;
  3486. }
  3487. priv_info = panel->cur_mode->priv_info;
  3488. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3489. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3490. if (rc) {
  3491. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3492. panel->name, rc);
  3493. return rc;
  3494. }
  3495. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3496. roi->x, roi->y, roi->w, roi->h);
  3497. mutex_lock(&panel->panel_lock);
  3498. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3499. if (rc)
  3500. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3501. panel->name, rc);
  3502. mutex_unlock(&panel->panel_lock);
  3503. dsi_panel_destroy_cmd_packets(set);
  3504. dsi_panel_dealloc_cmd_packets(set);
  3505. return rc;
  3506. }
  3507. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3508. {
  3509. int rc = 0;
  3510. if (!panel) {
  3511. DSI_ERR("Invalid params\n");
  3512. return -EINVAL;
  3513. }
  3514. mutex_lock(&panel->panel_lock);
  3515. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3516. if (rc)
  3517. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3518. panel->name, rc);
  3519. mutex_unlock(&panel->panel_lock);
  3520. return rc;
  3521. }
  3522. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3523. {
  3524. int rc = 0;
  3525. if (!panel) {
  3526. DSI_ERR("Invalid params\n");
  3527. return -EINVAL;
  3528. }
  3529. mutex_lock(&panel->panel_lock);
  3530. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3531. if (rc)
  3532. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3533. panel->name, rc);
  3534. mutex_unlock(&panel->panel_lock);
  3535. return rc;
  3536. }
  3537. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3538. {
  3539. int rc = 0;
  3540. if (!panel) {
  3541. DSI_ERR("Invalid params\n");
  3542. return -EINVAL;
  3543. }
  3544. mutex_lock(&panel->panel_lock);
  3545. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3546. if (rc)
  3547. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3548. panel->name, rc);
  3549. mutex_unlock(&panel->panel_lock);
  3550. return rc;
  3551. }
  3552. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3553. {
  3554. int rc = 0;
  3555. if (!panel) {
  3556. DSI_ERR("Invalid params\n");
  3557. return -EINVAL;
  3558. }
  3559. mutex_lock(&panel->panel_lock);
  3560. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3561. if (rc)
  3562. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3563. panel->name, rc);
  3564. mutex_unlock(&panel->panel_lock);
  3565. return rc;
  3566. }
  3567. int dsi_panel_switch(struct dsi_panel *panel)
  3568. {
  3569. int rc = 0;
  3570. if (!panel) {
  3571. DSI_ERR("Invalid params\n");
  3572. return -EINVAL;
  3573. }
  3574. mutex_lock(&panel->panel_lock);
  3575. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3576. if (rc)
  3577. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3578. panel->name, rc);
  3579. mutex_unlock(&panel->panel_lock);
  3580. return rc;
  3581. }
  3582. int dsi_panel_post_switch(struct dsi_panel *panel)
  3583. {
  3584. int rc = 0;
  3585. if (!panel) {
  3586. DSI_ERR("Invalid params\n");
  3587. return -EINVAL;
  3588. }
  3589. mutex_lock(&panel->panel_lock);
  3590. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3591. if (rc)
  3592. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3593. panel->name, rc);
  3594. mutex_unlock(&panel->panel_lock);
  3595. return rc;
  3596. }
  3597. int dsi_panel_enable(struct dsi_panel *panel)
  3598. {
  3599. int rc = 0;
  3600. if (!panel) {
  3601. DSI_ERR("Invalid params\n");
  3602. return -EINVAL;
  3603. }
  3604. mutex_lock(&panel->panel_lock);
  3605. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3606. if (rc)
  3607. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3608. panel->name, rc);
  3609. else
  3610. panel->panel_initialized = true;
  3611. mutex_unlock(&panel->panel_lock);
  3612. return rc;
  3613. }
  3614. int dsi_panel_post_enable(struct dsi_panel *panel)
  3615. {
  3616. int rc = 0;
  3617. if (!panel) {
  3618. DSI_ERR("invalid params\n");
  3619. return -EINVAL;
  3620. }
  3621. mutex_lock(&panel->panel_lock);
  3622. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3623. if (rc) {
  3624. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3625. panel->name, rc);
  3626. goto error;
  3627. }
  3628. error:
  3629. mutex_unlock(&panel->panel_lock);
  3630. return rc;
  3631. }
  3632. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3633. {
  3634. int rc = 0;
  3635. if (!panel) {
  3636. DSI_ERR("invalid params\n");
  3637. return -EINVAL;
  3638. }
  3639. mutex_lock(&panel->panel_lock);
  3640. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3641. if (rc) {
  3642. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3643. panel->name, rc);
  3644. goto error;
  3645. }
  3646. error:
  3647. mutex_unlock(&panel->panel_lock);
  3648. return rc;
  3649. }
  3650. int dsi_panel_disable(struct dsi_panel *panel)
  3651. {
  3652. int rc = 0;
  3653. if (!panel) {
  3654. DSI_ERR("invalid params\n");
  3655. return -EINVAL;
  3656. }
  3657. mutex_lock(&panel->panel_lock);
  3658. /* Avoid sending panel off commands when ESD recovery is underway */
  3659. if (!atomic_read(&panel->esd_recovery_pending)) {
  3660. /*
  3661. * Need to set IBB/AB regulator mode to STANDBY,
  3662. * if panel is going off from AOD mode.
  3663. */
  3664. if (dsi_panel_is_type_oled(panel) &&
  3665. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3666. panel->power_mode == SDE_MODE_DPMS_LP2))
  3667. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3668. "ibb", REGULATOR_MODE_STANDBY);
  3669. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3670. if (rc) {
  3671. /*
  3672. * Sending panel off commands may fail when DSI
  3673. * controller is in a bad state. These failures can be
  3674. * ignored since controller will go for full reset on
  3675. * subsequent display enable anyway.
  3676. */
  3677. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3678. panel->name, rc);
  3679. rc = 0;
  3680. }
  3681. }
  3682. panel->panel_initialized = false;
  3683. panel->power_mode = SDE_MODE_DPMS_OFF;
  3684. mutex_unlock(&panel->panel_lock);
  3685. return rc;
  3686. }
  3687. int dsi_panel_unprepare(struct dsi_panel *panel)
  3688. {
  3689. int rc = 0;
  3690. if (!panel) {
  3691. DSI_ERR("invalid params\n");
  3692. return -EINVAL;
  3693. }
  3694. mutex_lock(&panel->panel_lock);
  3695. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3696. if (rc) {
  3697. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3698. panel->name, rc);
  3699. goto error;
  3700. }
  3701. error:
  3702. mutex_unlock(&panel->panel_lock);
  3703. return rc;
  3704. }
  3705. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3706. {
  3707. int rc = 0;
  3708. if (!panel) {
  3709. DSI_ERR("invalid params\n");
  3710. return -EINVAL;
  3711. }
  3712. mutex_lock(&panel->panel_lock);
  3713. rc = dsi_panel_power_off(panel);
  3714. if (rc) {
  3715. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3716. panel->name, rc);
  3717. goto error;
  3718. }
  3719. error:
  3720. mutex_unlock(&panel->panel_lock);
  3721. return rc;
  3722. }