dp_rx.h 23 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #define RX_BUFFER_ALIGNMENT 128
  26. #else /* RXDMA_OPTIMIZATION */
  27. #define RX_BUFFER_ALIGNMENT 4
  28. #endif /* RXDMA_OPTIMIZATION */
  29. #ifdef QCA_HOST2FW_RXBUF_RING
  30. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  31. #else
  32. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  33. #endif
  34. #define RX_BUFFER_SIZE 2048
  35. #define RX_BUFFER_RESERVATION 0
  36. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  37. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  38. #define DP_PEER_METADATA_VDEV_ID_MASK 0x00070000
  39. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  40. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  41. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  42. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  43. #define DP_PEER_METADATA_ID_GET(_peer_metadata) \
  44. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  45. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  46. #define DP_RX_DESC_MAGIC 0xdec0de
  47. /**
  48. * struct dp_rx_desc
  49. *
  50. * @nbuf : VA of the "skb" posted
  51. * @rx_buf_start : VA of the original Rx buffer, before
  52. * movement of any skb->data pointer
  53. * @cookie : index into the sw array which holds
  54. * the sw Rx descriptors
  55. * Cookie space is 21 bits:
  56. * lower 18 bits -- index
  57. * upper 3 bits -- pool_id
  58. * @pool_id : pool Id for which this allocated.
  59. * Can only be used if there is no flow
  60. * steering
  61. * @in_use rx_desc is in use
  62. * @unmapped used to mark rx_desc an unmapped if the corresponding
  63. * nbuf is already unmapped
  64. */
  65. struct dp_rx_desc {
  66. qdf_nbuf_t nbuf;
  67. uint8_t *rx_buf_start;
  68. uint32_t cookie;
  69. uint8_t pool_id;
  70. #ifdef RX_DESC_DEBUG_CHECK
  71. uint32_t magic;
  72. #endif
  73. uint8_t in_use:1,
  74. unmapped:1;
  75. };
  76. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  77. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  78. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  79. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  80. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  81. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  82. RX_DESC_COOKIE_POOL_ID_SHIFT)
  83. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  84. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  85. RX_DESC_COOKIE_INDEX_SHIFT)
  86. /*
  87. *dp_rx_xor_block() - xor block of data
  88. *@b: destination data block
  89. *@a: source data block
  90. *@len: length of the data to process
  91. *
  92. *Returns: None
  93. */
  94. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  95. {
  96. qdf_size_t i;
  97. for (i = 0; i < len; i++)
  98. b[i] ^= a[i];
  99. }
  100. /*
  101. *dp_rx_rotl() - rotate the bits left
  102. *@val: unsigned integer input value
  103. *@bits: number of bits
  104. *
  105. *Returns: Integer with left rotated by number of 'bits'
  106. */
  107. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  108. {
  109. return (val << bits) | (val >> (32 - bits));
  110. }
  111. /*
  112. *dp_rx_rotr() - rotate the bits right
  113. *@val: unsigned integer input value
  114. *@bits: number of bits
  115. *
  116. *Returns: Integer with right rotated by number of 'bits'
  117. */
  118. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  119. {
  120. return (val >> bits) | (val << (32 - bits));
  121. }
  122. /*
  123. * dp_set_rx_queue() - set queue_mapping in skb
  124. * @nbuf: skb
  125. * @queue_id: rx queue_id
  126. *
  127. * Return: void
  128. */
  129. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  130. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  131. {
  132. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  133. return;
  134. }
  135. #else
  136. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  137. {
  138. }
  139. #endif
  140. /*
  141. *dp_rx_xswap() - swap the bits left
  142. *@val: unsigned integer input value
  143. *
  144. *Returns: Integer with bits swapped
  145. */
  146. static inline uint32_t dp_rx_xswap(uint32_t val)
  147. {
  148. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  149. }
  150. /*
  151. *dp_rx_get_le32_split() - get little endian 32 bits split
  152. *@b0: byte 0
  153. *@b1: byte 1
  154. *@b2: byte 2
  155. *@b3: byte 3
  156. *
  157. *Returns: Integer with split little endian 32 bits
  158. */
  159. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  160. uint8_t b3)
  161. {
  162. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  163. }
  164. /*
  165. *dp_rx_get_le32() - get little endian 32 bits
  166. *@b0: byte 0
  167. *@b1: byte 1
  168. *@b2: byte 2
  169. *@b3: byte 3
  170. *
  171. *Returns: Integer with little endian 32 bits
  172. */
  173. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  174. {
  175. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  176. }
  177. /*
  178. * dp_rx_put_le32() - put little endian 32 bits
  179. * @p: destination char array
  180. * @v: source 32-bit integer
  181. *
  182. * Returns: None
  183. */
  184. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  185. {
  186. p[0] = (v) & 0xff;
  187. p[1] = (v >> 8) & 0xff;
  188. p[2] = (v >> 16) & 0xff;
  189. p[3] = (v >> 24) & 0xff;
  190. }
  191. /* Extract michal mic block of data */
  192. #define dp_rx_michael_block(l, r) \
  193. do { \
  194. r ^= dp_rx_rotl(l, 17); \
  195. l += r; \
  196. r ^= dp_rx_xswap(l); \
  197. l += r; \
  198. r ^= dp_rx_rotl(l, 3); \
  199. l += r; \
  200. r ^= dp_rx_rotr(l, 2); \
  201. l += r; \
  202. } while (0)
  203. /**
  204. * struct dp_rx_desc_list_elem_t
  205. *
  206. * @next : Next pointer to form free list
  207. * @rx_desc : DP Rx descriptor
  208. */
  209. union dp_rx_desc_list_elem_t {
  210. union dp_rx_desc_list_elem_t *next;
  211. struct dp_rx_desc rx_desc;
  212. };
  213. /**
  214. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  215. * the Rx descriptor on Rx DMA source ring buffer
  216. * @soc: core txrx main context
  217. * @cookie: cookie used to lookup virtual address
  218. *
  219. * Return: void *: Virtual Address of the Rx descriptor
  220. */
  221. static inline
  222. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  223. {
  224. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  225. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  226. struct rx_desc_pool *rx_desc_pool;
  227. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  228. return NULL;
  229. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  230. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  231. return NULL;
  232. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  233. }
  234. /**
  235. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  236. * the Rx descriptor on monitor ring buffer
  237. * @soc: core txrx main context
  238. * @cookie: cookie used to lookup virtual address
  239. *
  240. * Return: void *: Virtual Address of the Rx descriptor
  241. */
  242. static inline
  243. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  244. {
  245. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  246. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  247. /* TODO */
  248. /* Add sanity for pool_id & index */
  249. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  250. }
  251. /**
  252. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  253. * the Rx descriptor on monitor status ring buffer
  254. * @soc: core txrx main context
  255. * @cookie: cookie used to lookup virtual address
  256. *
  257. * Return: void *: Virtual Address of the Rx descriptor
  258. */
  259. static inline
  260. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  261. {
  262. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  263. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  264. /* TODO */
  265. /* Add sanity for pool_id & index */
  266. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  267. }
  268. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  269. union dp_rx_desc_list_elem_t **local_desc_list,
  270. union dp_rx_desc_list_elem_t **tail,
  271. uint16_t pool_id,
  272. struct rx_desc_pool *rx_desc_pool);
  273. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  274. struct rx_desc_pool *rx_desc_pool,
  275. uint16_t num_descs,
  276. union dp_rx_desc_list_elem_t **desc_list,
  277. union dp_rx_desc_list_elem_t **tail);
  278. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  279. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  280. uint32_t
  281. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint8_t reo_ring_num,
  282. uint32_t quota);
  283. uint32_t dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  284. uint32_t
  285. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  286. /**
  287. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  288. * multiple nbufs.
  289. * @nbuf: pointer to the first msdu of an amsdu.
  290. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  291. *
  292. * This function implements the creation of RX frag_list for cases
  293. * where an MSDU is spread across multiple nbufs.
  294. *
  295. * Return: returns the head nbuf which contains complete frag_list.
  296. */
  297. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  298. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  299. uint32_t pool_id,
  300. uint32_t pool_size,
  301. struct rx_desc_pool *rx_desc_pool);
  302. void dp_rx_desc_pool_free(struct dp_soc *soc,
  303. uint32_t pool_id,
  304. struct rx_desc_pool *rx_desc_pool);
  305. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  306. struct dp_peer *peer);
  307. /**
  308. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  309. *
  310. * @head: pointer to the head of local free list
  311. * @tail: pointer to the tail of local free list
  312. * @new: new descriptor that is added to the free list
  313. *
  314. * Return: void:
  315. */
  316. static inline
  317. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  318. union dp_rx_desc_list_elem_t **tail,
  319. struct dp_rx_desc *new)
  320. {
  321. qdf_assert(head && new);
  322. new->nbuf = NULL;
  323. new->in_use = 0;
  324. new->unmapped = 0;
  325. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  326. *head = (union dp_rx_desc_list_elem_t *)new;
  327. if (*tail == NULL)
  328. *tail = *head;
  329. }
  330. /**
  331. * dp_rx_wds_srcport_learn() - Add or update the STA PEER which
  332. * is behind the WDS repeater.
  333. *
  334. * @soc: core txrx main context
  335. * @rx_tlv_hdr: base address of RX TLV header
  336. * @ta_peer: WDS repeater peer
  337. * @nbuf: rx pkt
  338. *
  339. * Return: void:
  340. */
  341. #ifdef FEATURE_WDS
  342. static inline void
  343. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  344. uint8_t *rx_tlv_hdr,
  345. struct dp_peer *ta_peer,
  346. qdf_nbuf_t nbuf)
  347. {
  348. uint16_t sa_sw_peer_id = hal_rx_msdu_end_sa_sw_peer_id_get(rx_tlv_hdr);
  349. uint32_t flags = IEEE80211_NODE_F_WDS_HM;
  350. uint32_t ret = 0;
  351. uint8_t wds_src_mac[IEEE80211_ADDR_LEN];
  352. struct dp_peer *sa_peer;
  353. struct dp_ast_entry *ast;
  354. uint16_t sa_idx;
  355. if (qdf_unlikely(!ta_peer))
  356. return;
  357. /* For AP mode : Do wds source port learning only if it is a
  358. * 4-address mpdu
  359. *
  360. * For STA mode : Frames from RootAP backend will be in 3-address mode,
  361. * till RootAP does the WDS source port learning; Hence in repeater/STA
  362. * mode, we enable learning even in 3-address mode , to avoid RootAP
  363. * backbone getting wrongly learnt as MEC on repeater
  364. */
  365. if (ta_peer->vdev->opmode != wlan_op_mode_sta) {
  366. if (!(qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  367. hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr)))
  368. return;
  369. } else {
  370. /* For HKv2 Source port learing is not needed in STA mode
  371. * as we have support in HW
  372. */
  373. if (soc->ast_override_support)
  374. return;
  375. }
  376. memcpy(wds_src_mac, (qdf_nbuf_data(nbuf) + IEEE80211_ADDR_LEN),
  377. IEEE80211_ADDR_LEN);
  378. if (qdf_unlikely(!hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr))) {
  379. ret = dp_peer_add_ast(soc,
  380. ta_peer,
  381. wds_src_mac,
  382. CDP_TXRX_AST_TYPE_WDS,
  383. flags);
  384. return;
  385. }
  386. /*
  387. * Get the AST entry from HW SA index and mark it as active
  388. */
  389. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
  390. qdf_spin_lock_bh(&soc->ast_lock);
  391. ast = soc->ast_table[sa_idx];
  392. if (!ast) {
  393. qdf_spin_unlock_bh(&soc->ast_lock);
  394. return;
  395. }
  396. qdf_spin_unlock_bh(&soc->ast_lock);
  397. /*
  398. * Ensure we are updating the right AST entry by
  399. * validating ast_idx.
  400. * There is a possibility we might arrive here without
  401. * AST MAP event , so this check is mandatory
  402. */
  403. if (ast->ast_idx == sa_idx)
  404. ast->is_active = TRUE;
  405. if (sa_sw_peer_id != ta_peer->peer_ids[0]) {
  406. sa_peer = ast->peer;
  407. if ((ast->type != CDP_TXRX_AST_TYPE_STATIC) &&
  408. (ast->type != CDP_TXRX_AST_TYPE_SELF)) {
  409. if (ast->pdev_id != ta_peer->vdev->pdev->pdev_id) {
  410. ret = dp_peer_add_ast(soc,
  411. ta_peer, wds_src_mac,
  412. CDP_TXRX_AST_TYPE_WDS,
  413. flags);
  414. } else {
  415. qdf_spin_lock_bh(&soc->ast_lock);
  416. dp_peer_update_ast(soc, ta_peer, ast, flags);
  417. qdf_spin_unlock_bh(&soc->ast_lock);
  418. return;
  419. }
  420. }
  421. /*
  422. * Do not kickout STA if it belongs to a different radio.
  423. * For DBDC repeater, it is possible to arrive here
  424. * for multicast loopback frames originated from connected
  425. * clients and looped back (intrabss) by Root AP
  426. */
  427. if (ast->pdev_id != ta_peer->vdev->pdev->pdev_id) {
  428. return;
  429. }
  430. /*
  431. * Kickout, when direct associated peer(SA) roams
  432. * to another AP and reachable via TA peer
  433. */
  434. if (!sa_peer->delete_in_progress) {
  435. sa_peer->delete_in_progress = true;
  436. if (soc->cdp_soc.ol_ops->peer_sta_kickout) {
  437. soc->cdp_soc.ol_ops->peer_sta_kickout(
  438. sa_peer->vdev->pdev->ctrl_pdev,
  439. wds_src_mac);
  440. }
  441. }
  442. }
  443. return;
  444. }
  445. #else
  446. static inline void
  447. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  448. uint8_t *rx_tlv_hdr,
  449. struct dp_peer *ta_peer,
  450. qdf_nbuf_t nbuf)
  451. {
  452. }
  453. #endif
  454. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  455. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  456. qdf_nbuf_t mpdu, bool mpdu_done);
  457. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  458. #define DP_RX_LIST_APPEND(head, tail, elem) \
  459. do { \
  460. if (!(head)) { \
  461. (head) = (elem); \
  462. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head) = 1;\
  463. } else { \
  464. qdf_nbuf_set_next((tail), (elem)); \
  465. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(head)++; \
  466. } \
  467. (tail) = (elem); \
  468. qdf_nbuf_set_next((tail), NULL); \
  469. } while (0)
  470. #ifndef BUILD_X86
  471. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  472. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  473. {
  474. return QDF_STATUS_SUCCESS;
  475. }
  476. #else
  477. #define MAX_RETRY 100
  478. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  479. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  480. {
  481. uint32_t nbuf_retry = 0;
  482. int32_t ret;
  483. const uint32_t x86_phy_addr = 0x50000000;
  484. /*
  485. * in M2M emulation platforms (x86) the memory below 0x50000000
  486. * is reserved for target use, so any memory allocated in this
  487. * region should not be used by host
  488. */
  489. do {
  490. if (qdf_likely(*paddr > x86_phy_addr))
  491. return QDF_STATUS_SUCCESS;
  492. else {
  493. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  494. "phy addr %pK exceeded 0x50000000 trying again",
  495. paddr);
  496. nbuf_retry++;
  497. if ((*rx_netbuf)) {
  498. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  499. QDF_DMA_BIDIRECTIONAL);
  500. /* Not freeing buffer intentionally.
  501. * Observed that same buffer is getting
  502. * re-allocated resulting in longer load time
  503. * WMI init timeout.
  504. * This buffer is anyway not useful so skip it.
  505. **/
  506. }
  507. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  508. RX_BUFFER_SIZE,
  509. RX_BUFFER_RESERVATION,
  510. RX_BUFFER_ALIGNMENT,
  511. FALSE);
  512. if (qdf_unlikely(!(*rx_netbuf)))
  513. return QDF_STATUS_E_FAILURE;
  514. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  515. QDF_DMA_BIDIRECTIONAL);
  516. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  517. qdf_nbuf_free(*rx_netbuf);
  518. *rx_netbuf = NULL;
  519. continue;
  520. }
  521. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  522. }
  523. } while (nbuf_retry < MAX_RETRY);
  524. if ((*rx_netbuf)) {
  525. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  526. QDF_DMA_BIDIRECTIONAL);
  527. qdf_nbuf_free(*rx_netbuf);
  528. }
  529. return QDF_STATUS_E_FAILURE;
  530. }
  531. #endif
  532. /**
  533. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  534. * the MSDU Link Descriptor
  535. * @soc: core txrx main context
  536. * @buf_info: buf_info include cookie that used to lookup virtual address of
  537. * link descriptor Normally this is just an index into a per SOC array.
  538. *
  539. * This is the VA of the link descriptor, that HAL layer later uses to
  540. * retrieve the list of MSDU's for a given MPDU.
  541. *
  542. * Return: void *: Virtual Address of the Rx descriptor
  543. */
  544. static inline
  545. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  546. struct hal_buf_info *buf_info)
  547. {
  548. void *link_desc_va;
  549. uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
  550. /* TODO */
  551. /* Add sanity for cookie */
  552. link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
  553. (buf_info->paddr -
  554. soc->link_desc_banks[bank_id].base_paddr);
  555. return link_desc_va;
  556. }
  557. /**
  558. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  559. * the MSDU Link Descriptor
  560. * @pdev: core txrx pdev context
  561. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  562. * link descriptor. Normally this is just an index into a per pdev array.
  563. *
  564. * This is the VA of the link descriptor in monitor mode destination ring,
  565. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  566. *
  567. * Return: void *: Virtual Address of the Rx descriptor
  568. */
  569. static inline
  570. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  571. struct hal_buf_info *buf_info,
  572. int mac_id)
  573. {
  574. void *link_desc_va;
  575. int mac_for_pdev = dp_get_mac_id_for_mac(pdev->soc, mac_id);
  576. /* TODO */
  577. /* Add sanity for cookie */
  578. link_desc_va =
  579. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_vaddr +
  580. (buf_info->paddr -
  581. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_paddr);
  582. return link_desc_va;
  583. }
  584. /**
  585. * dp_rx_defrag_concat() - Concatenate the fragments
  586. *
  587. * @dst: destination pointer to the buffer
  588. * @src: source pointer from where the fragment payload is to be copied
  589. *
  590. * Return: QDF_STATUS
  591. */
  592. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  593. {
  594. /*
  595. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  596. * to provide space for src, the headroom portion is copied from
  597. * the original dst buffer to the larger new dst buffer.
  598. * (This is needed, because the headroom of the dst buffer
  599. * contains the rx desc.)
  600. */
  601. if (qdf_nbuf_cat(dst, src))
  602. return QDF_STATUS_E_DEFRAG_ERROR;
  603. return QDF_STATUS_SUCCESS;
  604. }
  605. /*
  606. * dp_rx_ast_set_active() - set the active flag of the astentry
  607. * corresponding to a hw index.
  608. * @soc: core txrx main context
  609. * @sa_idx: hw idx
  610. * @is_active: active flag
  611. *
  612. */
  613. #ifdef FEATURE_WDS
  614. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  615. {
  616. struct dp_ast_entry *ast;
  617. qdf_spin_lock_bh(&soc->ast_lock);
  618. ast = soc->ast_table[sa_idx];
  619. /*
  620. * Ensure we are updating the right AST entry by
  621. * validating ast_idx.
  622. * There is a possibility we might arrive here without
  623. * AST MAP event , so this check is mandatory
  624. */
  625. if (ast && (ast->ast_idx == sa_idx)) {
  626. ast->is_active = is_active;
  627. qdf_spin_unlock_bh(&soc->ast_lock);
  628. return QDF_STATUS_SUCCESS;
  629. }
  630. qdf_spin_unlock_bh(&soc->ast_lock);
  631. return QDF_STATUS_E_FAILURE;
  632. }
  633. #else
  634. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  635. {
  636. return QDF_STATUS_SUCCESS;
  637. }
  638. #endif
  639. /*
  640. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  641. * In qwrap mode, packets originated from
  642. * any vdev should not loopback and
  643. * should be dropped.
  644. * @vdev: vdev on which rx packet is received
  645. * @nbuf: rx pkt
  646. *
  647. */
  648. #if ATH_SUPPORT_WRAP
  649. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  650. qdf_nbuf_t nbuf)
  651. {
  652. struct dp_vdev *psta_vdev;
  653. struct dp_pdev *pdev = vdev->pdev;
  654. struct dp_soc *soc = pdev->soc;
  655. uint8_t *data = qdf_nbuf_data(nbuf);
  656. uint8_t i;
  657. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  658. pdev = soc->pdev_list[i];
  659. if (qdf_unlikely(vdev->proxysta_vdev)) {
  660. /* In qwrap isolation mode, allow loopback packets as all
  661. * packets go to RootAP and Loopback on the mpsta.
  662. */
  663. if (vdev->isolation_vdev)
  664. return false;
  665. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  666. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  667. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  668. &data[DP_MAC_ADDR_LEN], DP_MAC_ADDR_LEN))) {
  669. /* Drop packet if source address is equal to
  670. * any of the vdev addresses.
  671. */
  672. return true;
  673. }
  674. }
  675. }
  676. }
  677. return false;
  678. }
  679. #else
  680. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  681. qdf_nbuf_t nbuf)
  682. {
  683. return false;
  684. }
  685. #endif
  686. /*
  687. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  688. * called during dp rx initialization
  689. * and at the end of dp_rx_process.
  690. *
  691. * @soc: core txrx main context
  692. * @mac_id: mac_id which is one of 3 mac_ids
  693. * @dp_rxdma_srng: dp rxdma circular ring
  694. * @rx_desc_pool: Pointer to free Rx descriptor pool
  695. * @num_req_buffers: number of buffer to be replenished
  696. * @desc_list: list of descs if called from dp_rx_process
  697. * or NULL during dp rx initialization or out of buffer
  698. * interrupt.
  699. * @tail: tail of descs list
  700. * Return: return success or failure
  701. */
  702. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  703. struct dp_srng *dp_rxdma_srng,
  704. struct rx_desc_pool *rx_desc_pool,
  705. uint32_t num_req_buffers,
  706. union dp_rx_desc_list_elem_t **desc_list,
  707. union dp_rx_desc_list_elem_t **tail);
  708. /**
  709. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  710. * (WBM), following error handling
  711. *
  712. * @soc: core DP main context
  713. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  714. * @buf_addr_info: void pointer to the buffer_addr_info
  715. * @bm_action: put to idle_list or release to msdu_list
  716. * Return: QDF_STATUS
  717. */
  718. QDF_STATUS
  719. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action);
  720. QDF_STATUS
  721. dp_rx_link_desc_buf_return(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  722. void *buf_addr_info, uint8_t bm_action);
  723. /**
  724. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  725. * (WBM) by address
  726. *
  727. * @soc: core DP main context
  728. * @link_desc_addr: link descriptor addr
  729. *
  730. * Return: QDF_STATUS
  731. */
  732. QDF_STATUS
  733. dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
  734. uint8_t bm_action);
  735. uint32_t
  736. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id,
  737. uint32_t quota);
  738. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  739. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  740. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  741. uint8_t *rx_tlv_hdr);
  742. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  743. struct dp_peer *peer, int rx_mcast);
  744. qdf_nbuf_t
  745. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  746. #endif /* _DP_RX_H */