cfg_dp.h 65 KB

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  1. /*
  2. * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. /**
  20. * DOC: This file contains definitions of Data Path configuration.
  21. */
  22. #ifndef _CFG_DP_H_
  23. #define _CFG_DP_H_
  24. #include "cfg_define.h"
  25. #include "wlan_init_cfg.h"
  26. #define WLAN_CFG_MAX_CLIENTS 64
  27. #define WLAN_CFG_MAX_CLIENTS_MIN 8
  28. #define WLAN_CFG_MAX_CLIENTS_MAX 64
  29. /* Change this to a lower value to enforce scattered idle list mode */
  30. #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
  31. #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000
  32. #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
  33. #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \
  34. defined(QCA_LL_PDEV_TX_FLOW_CONTROL)
  35. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10
  36. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15
  37. #else
  38. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
  39. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
  40. #endif
  41. #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
  42. #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
  43. #ifdef IPA_OFFLOAD
  44. /* Size of TCL TX Ring */
  45. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  46. #define WLAN_CFG_TX_RING_SIZE 2048
  47. #else
  48. #define WLAN_CFG_TX_RING_SIZE 1024
  49. #endif
  50. #define WLAN_CFG_IPA_TX_RING_SIZE_MIN 512
  51. #define WLAN_CFG_IPA_TX_RING_SIZE 1024
  52. #define WLAN_CFG_IPA_TX_RING_SIZE_MAX 0x80000
  53. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN 512
  54. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE 1024
  55. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX 0x80000
  56. #ifdef IPA_WDI3_TX_TWO_PIPES
  57. #ifdef WLAN_MEMORY_OPT
  58. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 128
  59. #else
  60. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 512
  61. #endif
  62. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE 1024
  63. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX 0x80000
  64. #ifdef WLAN_MEMORY_OPT
  65. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 128
  66. #else
  67. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 512
  68. #endif
  69. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE 1024
  70. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX 0x80000
  71. #endif
  72. #define WLAN_CFG_PER_PDEV_TX_RING 0
  73. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048
  74. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000
  75. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024
  76. #else
  77. #define WLAN_CFG_TX_RING_SIZE 512
  78. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  79. #define WLAN_CFG_PER_PDEV_TX_RING 1
  80. #else
  81. #define WLAN_CFG_PER_PDEV_TX_RING 0
  82. #endif
  83. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
  84. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
  85. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
  86. #endif /* IPA_OFFLOAD */
  87. #define WLAN_CFG_TIME_CONTROL_BP 3000
  88. #if defined(RX_DATA_BUFFER_SIZE)
  89. #define WLAN_CFG_RX_BUFFER_SIZE RX_DATA_BUFFER_SIZE
  90. #else
  91. #define WLAN_CFG_RX_BUFFER_SIZE 2048
  92. #endif
  93. #define WLAN_CFG_QREF_CONTROL_SIZE 0
  94. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  95. #define WLAN_CFG_PER_PDEV_RX_RING 0
  96. #define WLAN_CFG_PER_PDEV_LMAC_RING 0
  97. #define WLAN_LRO_ENABLE 0
  98. #if defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_WCN6450)
  99. #define WLAN_CFG_MAC_PER_TARGET 1
  100. #else
  101. #define WLAN_CFG_MAC_PER_TARGET 2
  102. #endif
  103. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  104. #define WLAN_CFG_TX_COMP_RING_SIZE 4096
  105. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  106. #define WLAN_CFG_NUM_TX_DESC 4096
  107. #define WLAN_CFG_NUM_TX_EXT_DESC 4096
  108. #else
  109. #define WLAN_CFG_TX_COMP_RING_SIZE 1024
  110. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  111. #define WLAN_CFG_NUM_TX_DESC 1024
  112. #define WLAN_CFG_NUM_TX_EXT_DESC 1024
  113. #endif
  114. /* Interrupt Mitigation - Batch threshold in terms of number of frames */
  115. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
  116. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
  117. /* Interrupt Mitigation - Timer threshold in us */
  118. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
  119. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
  120. #ifdef WLAN_DP_PER_RING_TYPE_CONFIG
  121. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX \
  122. WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING
  123. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX \
  124. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING
  125. #else
  126. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
  127. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
  128. #endif
  129. #endif /* WLAN_MAX_PDEVS */
  130. #define WLAN_CFG_INT_BATCH_THRESHOLD_MON_DEST 1
  131. #define WLAN_CFG_INT_TIMER_THRESHOLD_MON_DEST 256
  132. #define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL 0
  133. #define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL 30
  134. #ifdef NBUF_MEMORY_DEBUG
  135. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF
  136. #else
  137. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0x1FFFF
  138. #endif
  139. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD \
  140. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  141. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN 0
  142. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX 0x200000
  143. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD \
  144. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  145. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN 100
  146. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX 0x200000
  147. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256
  148. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 512
  149. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 0
  150. #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
  151. #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
  152. #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
  153. #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
  154. #define WLAN_CFG_TX_RING_SIZE_MIN 512
  155. #define WLAN_CFG_TX_RING_SIZE_MAX 0x80000
  156. #define WLAN_CFG_TIME_CONTROL_BP_MIN 3000
  157. #define WLAN_CFG_TIME_CONTROL_BP_MAX 1800000
  158. /*MTU size of ethernet is 1500*/
  159. #define WLAN_CFG_RX_BUFFER_SIZE_MIN 1536
  160. #define WLAN_CFG_RX_BUFFER_SIZE_MAX 4096
  161. #define WLAN_CFG_QREF_CONTROL_SIZE_MIN 0
  162. #define WLAN_CFG_QREF_CONTROL_SIZE_MAX 4000
  163. #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512
  164. #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
  165. #define WLAN_CFG_NUM_TX_DESC_MIN 16
  166. #define WLAN_CFG_NUM_TX_DESC_MAX 0x10000
  167. #define WLAN_CFG_NUM_TX_SPL_DESC 1024
  168. #define WLAN_CFG_NUM_TX_SPL_DESC_MIN 0
  169. #define WLAN_CFG_NUM_TX_SPL_DESC_MAX 0x1000
  170. #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 16
  171. #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
  172. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
  173. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
  174. #define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MIN 0
  175. #define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MAX 1024
  176. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0
  177. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
  178. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1
  179. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128
  180. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1
  181. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128
  182. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
  183. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
  184. #define WLAN_CFG_INT_BATCH_THRESHOLD_MON_DEST_MIN 1
  185. #define WLAN_CFG_INT_BATCH_THRESHOLD_MON_DEST_MAX 64
  186. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
  187. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000
  188. #define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MIN 8
  189. #define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MAX 1000
  190. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
  191. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
  192. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
  193. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
  194. #define WLAN_CFG_INT_TIMER_THRESHOLD_MON_DEST_MIN 256
  195. #define WLAN_CFG_INT_TIMER_THRESHOLD_MON_DEST_MAX 1000
  196. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8
  197. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 512
  198. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8
  199. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500
  200. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
  201. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
  202. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000
  203. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  204. /* Per vdev pools */
  205. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  206. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  207. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  208. #ifdef TX_PER_PDEV_DESC_POOL
  209. #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
  210. #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
  211. #else /* TX_PER_PDEV_DESC_POOL */
  212. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  213. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  214. #endif /* TX_PER_PDEV_DESC_POOL */
  215. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  216. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
  217. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
  218. #define WLAN_CFG_HTT_PKT_TYPE 2
  219. #define WLAN_CFG_HTT_PKT_TYPE_MIN 2
  220. #define WLAN_CFG_HTT_PKT_TYPE_MAX 2
  221. #define WLAN_CFG_MAX_PEER_ID 64
  222. #define WLAN_CFG_MAX_PEER_ID_MIN 64
  223. #define WLAN_CFG_MAX_PEER_ID_MAX 64
  224. #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
  225. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
  226. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
  227. #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
  228. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 1
  229. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX MAX_TCL_DATA_RINGS
  230. #define WLAN_CFG_NUM_TX_COMP_RINGS WLAN_CFG_NUM_TCL_DATA_RINGS
  231. #define WLAN_CFG_NUM_TX_COMP_RINGS_MIN WLAN_CFG_NUM_TCL_DATA_RINGS_MIN
  232. #define WLAN_CFG_NUM_TX_COMP_RINGS_MAX WLAN_CFG_NUM_TCL_DATA_RINGS_MAX
  233. #if defined(CONFIG_BERYLLIUM)
  234. #define WLAN_CFG_NUM_REO_DEST_RING 8
  235. #else
  236. #define WLAN_CFG_NUM_REO_DEST_RING 4
  237. #endif
  238. #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
  239. #define WLAN_CFG_NUM_REO_DEST_RING_MAX MAX_REO_DEST_RINGS
  240. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS 2
  241. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN 1
  242. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX 3
  243. #define WLAN_CFG_NSS_NUM_REO_DEST_RING 2
  244. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN 1
  245. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX 3
  246. #define WLAN_CFG_WBM_RELEASE_RING_SIZE 1024
  247. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
  248. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 1024
  249. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE 512
  250. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN 32
  251. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX 512
  252. #define WLAN_CFG_TCL_STATUS_RING_SIZE 32
  253. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
  254. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
  255. #if defined(QCA_WIFI_QCA6290)
  256. #define WLAN_CFG_REO_DST_RING_SIZE 1024
  257. #else
  258. #define WLAN_CFG_REO_DST_RING_SIZE 2048
  259. #endif
  260. #define WLAN_CFG_REO_DST_RING_SIZE_MIN 8
  261. #define WLAN_CFG_REO_DST_RING_SIZE_MAX 8192
  262. #define WLAN_CFG_REO_REINJECT_RING_SIZE 128
  263. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
  264. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 128
  265. #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
  266. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8
  267. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  268. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  269. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
  270. #else
  271. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 32768
  272. #endif
  273. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 256
  274. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
  275. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 512
  276. #define WLAN_CFG_REO_CMD_RING_SIZE 128
  277. #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
  278. #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128
  279. #define WLAN_CFG_REO_STATUS_RING_SIZE 256
  280. #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
  281. #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048
  282. #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
  283. #ifdef WLAN_MEMORY_OPT
  284. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 128
  285. #else
  286. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
  287. #endif
  288. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 8192
  289. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
  290. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
  291. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 16384
  292. #define WLAN_CFG_TX_DESC_LIMIT_0 0
  293. #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096
  294. #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768
  295. #define WLAN_CFG_TX_DESC_LIMIT_1 0
  296. #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096
  297. #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768
  298. #define WLAN_CFG_TX_DESC_LIMIT_2 0
  299. #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096
  300. #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768
  301. #define WLAN_CFG_TX_DEVICE_LIMIT 65536
  302. #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384
  303. #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536
  304. #define WLAN_CFG_TX_SPL_DEVICE_LIMIT 1024
  305. #define WLAN_CFG_TX_SPL_DEVICE_LIMIT_MIN 0
  306. #define WLAN_CFG_TX_SPL_DEVICE_LIMIT_MAX 4096
  307. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE 1024
  308. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN 128
  309. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX 1024
  310. #define WLAN_CFG_TX_DESC_GLOBAL_COUNT 0xC000
  311. #define WLAN_CFG_TX_DESC_GLOBAL_COUNT_MIN 0x8000
  312. #define WLAN_CFG_TX_DESC_GLOBAL_COUNT_MAX 0x60000
  313. #define WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT 0x400
  314. #define WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MIN 0x400
  315. #define WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MAX 0x1000
  316. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
  317. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
  318. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
  319. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE 4096
  320. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN 16
  321. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX 8192
  322. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
  323. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48
  324. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192
  325. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE 2048
  326. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN 48
  327. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX 8192
  328. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
  329. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
  330. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192
  331. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
  332. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
  333. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384
  334. #define WLAN_CFG_SW2RXDMA_LINK_RING_SIZE 1024
  335. #define WLAN_CFG_SW2RXDMA_LINK_RING_SIZE_MIN 256
  336. #define WLAN_CFG_SW2RXDMA_LINK_RING_SIZE_MAX 4096
  337. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
  338. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
  339. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
  340. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE 32
  341. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN 0
  342. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX 256
  343. /*
  344. * Allocate as many RX descriptors as buffers in the SW2RXDMA
  345. * ring. This value may need to be tuned later.
  346. */
  347. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  348. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  349. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  350. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1
  351. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  352. #ifdef WLAN_MEMORY_OPT
  353. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 128
  354. #else
  355. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  356. #endif
  357. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384
  358. /*
  359. * For low memory AP cases using 1 will reduce the rx descriptors memory req
  360. */
  361. #elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG)
  362. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  363. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  364. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  365. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  366. #ifdef WLAN_MEMORY_OPT
  367. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 128
  368. #else
  369. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  370. #endif
  371. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384
  372. /*
  373. * AP use cases need to allocate more RX Descriptors than the number of
  374. * entries available in the SW2RXDMA buffer replenish ring. This is to account
  375. * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
  376. * multiplication factor of 3, to allocate three times as many RX descriptors
  377. * as RX buffers.
  378. */
  379. #else
  380. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3
  381. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  382. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  383. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 12288
  384. #ifdef WLAN_MEMORY_OPT
  385. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 128
  386. #else
  387. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 4096
  388. #endif
  389. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384
  390. #endif
  391. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE 16384
  392. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN 1
  393. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX 16384
  394. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT 128
  395. #define WLAN_CFG_PKTLOG_BUFFER_SIZE 10
  396. #define WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE 1
  397. #define WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE 10
  398. #ifdef IPA_OFFLOAD
  399. #define WLAN_CFG_NUM_REO_RINGS_MAP 0x7
  400. #else
  401. #define WLAN_CFG_NUM_REO_RINGS_MAP 0xF
  402. #endif
  403. #define WLAN_CFG_NUM_REO_RINGS_MAP_MIN 0x1
  404. #if defined(CONFIG_BERYLLIUM)
  405. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xFF
  406. #else
  407. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xF
  408. #endif
  409. #define WLAN_CFG_RADIO_0_DEFAULT_REO 0x1
  410. #define WLAN_CFG_RADIO_1_DEFAULT_REO 0x2
  411. #define WLAN_CFG_RADIO_2_DEFAULT_REO 0x3
  412. #define WLAN_CFG_RADIO_DEFAULT_REO_MIN 0x1
  413. #define WLAN_CFG_RADIO_DEFAULT_REO_MAX 0x4
  414. #define WLAN_CFG_REO2PPE_RING_SIZE 16384
  415. #define WLAN_CFG_REO2PPE_RING_SIZE_MIN 64
  416. #define WLAN_CFG_REO2PPE_RING_SIZE_MAX 16384
  417. #define WLAN_CFG_PPE2TCL_RING_SIZE 8192
  418. #define WLAN_CFG_PPE2TCL_RING_SIZE_MIN 64
  419. #define WLAN_CFG_PPE2TCL_RING_SIZE_MAX 32768
  420. #define WLAN_CFG_PPE_RELEASE_RING_SIZE 1024
  421. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN 64
  422. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX 1024
  423. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  424. #define WLAN_CFG_MLO_RX_RING_MAP 0x7
  425. #define WLAN_CFG_MLO_RX_RING_MAP_MIN 0x0
  426. #define WLAN_CFG_MLO_RX_RING_MAP_MAX 0xFF
  427. #endif
  428. #define WLAN_CFG_TX_CAPT_MAX_MEM_MIN 0
  429. #define WLAN_CFG_TX_CAPT_MAX_MEM_MAX 512
  430. #define WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT 0
  431. #define CFG_DP_MPDU_RETRY_THRESHOLD_MIN 0
  432. #define CFG_DP_MPDU_RETRY_THRESHOLD_MAX 255
  433. #define CFG_DP_MPDU_RETRY_THRESHOLD 0
  434. #define WLAN_CFG_DP_NAPI_SCALE_FACTOR 0
  435. #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN 0
  436. #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX 4
  437. #define CFG_DP_PPEDS_WIFI_SOC_CFG_NONE 0
  438. #define CFG_DP_PPEDS_WIFI_SOC_CFG_ALL 0xFF
  439. #define CFG_DP_PPEDS_WIFI_SOC_CFG_DEFAULT 0xFF
  440. #ifdef CONFIG_SAWF_STATS
  441. #define WLAN_CFG_SAWF_STATS 0x0
  442. #define WLAN_CFG_SAWF_STATS_MIN 0x0
  443. #define WLAN_CFG_SAWF_STATS_MAX 0x7
  444. #endif
  445. #define WLAN_CFG_TX_CAPT_RBM_ID_MIN 0
  446. #define WLAN_CFG_TX_CAPT_RBM_ID_MAX 3
  447. #define WLAN_CFG_TX_CAPT_0_RBM_DEFAULT 0
  448. #define WLAN_CFG_TX_CAPT_1_RBM_DEFAULT 1
  449. #define WLAN_CFG_TX_CAPT_2_RBM_DEFAULT 2
  450. #define WLAN_CFG_TX_CAPT_3_RBM_DEFAULT 3
  451. #define WLAN_CFG_DP_AVG_RATE_FILTER_MIN 0
  452. #define WLAN_CFG_DP_AVG_RATE_FILTER_MAX 11000
  453. #define WLAN_CFG_DP_AVG_RATE_FILTER_DEFAULT 0
  454. /*
  455. * <ini>
  456. * "dp_tx_capt_max_mem_mb"- maximum memory used by Tx capture
  457. * @Min: 0
  458. * @Max: 512 MB
  459. * @Default: 0 (disabled)
  460. *
  461. * This ini entry is used to set a max limit beyond which frames
  462. * are dropped by Tx capture. User needs to set a non-zero value
  463. * to enable it.
  464. *
  465. * Usage: External
  466. *
  467. * </ini>
  468. */
  469. #define CFG_DP_TX_CAPT_MAX_MEM_MB \
  470. CFG_INI_UINT("dp_tx_capt_max_mem_mb", \
  471. WLAN_CFG_TX_CAPT_MAX_MEM_MIN, \
  472. WLAN_CFG_TX_CAPT_MAX_MEM_MAX, \
  473. WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT, \
  474. CFG_VALUE_OR_DEFAULT, "Max Memory (in MB) used by Tx Capture")
  475. #define CFG_DP_TX_CAPT_RADIO_0_RBM_ID \
  476. CFG_INI_UINT("dp_tx_capt_pdev_0_rbm_id", \
  477. WLAN_CFG_TX_CAPT_RBM_ID_MIN, \
  478. WLAN_CFG_TX_CAPT_RBM_ID_MAX, \
  479. WLAN_CFG_TX_CAPT_0_RBM_DEFAULT, \
  480. CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 0 Tx capture")
  481. #define CFG_DP_TX_CAPT_RADIO_1_RBM_ID \
  482. CFG_INI_UINT("dp_tx_capt_pdev_1_rbm_id", \
  483. WLAN_CFG_TX_CAPT_RBM_ID_MIN, \
  484. WLAN_CFG_TX_CAPT_RBM_ID_MAX, \
  485. WLAN_CFG_TX_CAPT_1_RBM_DEFAULT, \
  486. CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 1 Tx capture")
  487. #define CFG_DP_TX_CAPT_RADIO_2_RBM_ID \
  488. CFG_INI_UINT("dp_tx_capt_pdev_2_rbm_id", \
  489. WLAN_CFG_TX_CAPT_RBM_ID_MIN, \
  490. WLAN_CFG_TX_CAPT_RBM_ID_MAX, \
  491. WLAN_CFG_TX_CAPT_2_RBM_DEFAULT, \
  492. CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 2 Tx capture")
  493. #define CFG_DP_TX_CAPT_RADIO_3_RBM_ID \
  494. CFG_INI_UINT("dp_tx_capt_pdev_3_rbm_id", \
  495. WLAN_CFG_TX_CAPT_RBM_ID_MIN, \
  496. WLAN_CFG_TX_CAPT_RBM_ID_MAX, \
  497. WLAN_CFG_TX_CAPT_3_RBM_DEFAULT, \
  498. CFG_VALUE_OR_DEFAULT, "RBM_ID used by pdev 3 Tx capture")
  499. /* DP INI Declarations */
  500. #define CFG_DP_HTT_PACKET_TYPE \
  501. CFG_INI_UINT("dp_htt_packet_type", \
  502. WLAN_CFG_HTT_PKT_TYPE_MIN, \
  503. WLAN_CFG_HTT_PKT_TYPE_MAX, \
  504. WLAN_CFG_HTT_PKT_TYPE, \
  505. CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
  506. #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
  507. CFG_INI_UINT("dp_int_batch_threshold_other", \
  508. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
  509. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
  510. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
  511. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
  512. #define CFG_DP_INT_BATCH_THRESHOLD_MON_DEST \
  513. CFG_INI_UINT("dp_int_batch_threshold_mon_dest", \
  514. WLAN_CFG_INT_BATCH_THRESHOLD_MON_DEST_MIN, \
  515. WLAN_CFG_INT_BATCH_THRESHOLD_MON_DEST_MAX, \
  516. WLAN_CFG_INT_BATCH_THRESHOLD_MON_DEST, \
  517. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold mon_dest")
  518. #define CFG_DP_INT_BATCH_THRESHOLD_RX \
  519. CFG_INI_UINT("dp_int_batch_threshold_rx", \
  520. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
  521. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
  522. WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
  523. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
  524. #define CFG_DP_INT_BATCH_THRESHOLD_TX \
  525. CFG_INI_UINT("dp_int_batch_threshold_tx", \
  526. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
  527. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
  528. WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
  529. CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
  530. #define CFG_DP_INT_BATCH_THRESHOLD_PPE2TCL \
  531. CFG_INI_UINT("dp_int_batch_threshold_ppe2tcl", \
  532. WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MIN, \
  533. WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MAX, \
  534. WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL, \
  535. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold ppe2tcl")
  536. #define CFG_DP_INT_TIMER_THRESHOLD_PPE2TCL \
  537. CFG_INI_UINT("dp_int_timer_threshold_ppe2tcl", \
  538. WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MIN, \
  539. WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MAX, \
  540. WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL, \
  541. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold ppe2tcl")
  542. #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
  543. CFG_INI_UINT("dp_int_timer_threshold_other", \
  544. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
  545. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
  546. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
  547. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
  548. #define CFG_DP_INT_TIMER_THRESHOLD_MON_DEST \
  549. CFG_INI_UINT("dp_int_timer_threshold_mon_dest", \
  550. WLAN_CFG_INT_TIMER_THRESHOLD_MON_DEST_MIN, \
  551. WLAN_CFG_INT_TIMER_THRESHOLD_MON_DEST_MAX, \
  552. WLAN_CFG_INT_TIMER_THRESHOLD_MON_DEST, \
  553. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold mon dest")
  554. #define CFG_DP_INT_TIMER_THRESHOLD_RX \
  555. CFG_INI_UINT("dp_int_timer_threshold_rx", \
  556. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
  557. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
  558. WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
  559. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
  560. #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \
  561. CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \
  562. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \
  563. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \
  564. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \
  565. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
  566. #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \
  567. CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \
  568. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \
  569. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \
  570. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \
  571. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
  572. #define CFG_DP_INT_TIMER_THRESHOLD_TX \
  573. CFG_INI_UINT("dp_int_timer_threshold_tx", \
  574. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
  575. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
  576. WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
  577. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
  578. #define CFG_DP_MAX_ALLOC_SIZE \
  579. CFG_INI_UINT("dp_max_alloc_size", \
  580. WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
  581. WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
  582. WLAN_CFG_MAX_ALLOC_SIZE, \
  583. CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
  584. #define CFG_DP_MAX_CLIENTS \
  585. CFG_INI_UINT("dp_max_clients", \
  586. WLAN_CFG_MAX_CLIENTS_MIN, \
  587. WLAN_CFG_MAX_CLIENTS_MAX, \
  588. WLAN_CFG_MAX_CLIENTS, \
  589. CFG_VALUE_OR_DEFAULT, "DP Max Clients")
  590. #define CFG_DP_MAX_PEER_ID \
  591. CFG_INI_UINT("dp_max_peer_id", \
  592. WLAN_CFG_MAX_PEER_ID_MIN, \
  593. WLAN_CFG_MAX_PEER_ID_MAX, \
  594. WLAN_CFG_MAX_PEER_ID, \
  595. CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
  596. #define CFG_DP_REO_DEST_RINGS \
  597. CFG_INI_UINT("dp_reo_dest_rings", \
  598. WLAN_CFG_NUM_REO_DEST_RING_MIN, \
  599. WLAN_CFG_NUM_REO_DEST_RING_MAX, \
  600. WLAN_CFG_NUM_REO_DEST_RING, \
  601. CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
  602. #define CFG_DP_TX_COMP_RINGS \
  603. CFG_INI_UINT("dp_tx_comp_rings", \
  604. WLAN_CFG_NUM_TX_COMP_RINGS_MIN, \
  605. WLAN_CFG_NUM_TX_COMP_RINGS_MAX, \
  606. WLAN_CFG_NUM_TX_COMP_RINGS, \
  607. CFG_VALUE_OR_DEFAULT, "DP Tx Comp Rings")
  608. #define CFG_DP_TCL_DATA_RINGS \
  609. CFG_INI_UINT("dp_tcl_data_rings", \
  610. WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
  611. WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
  612. WLAN_CFG_NUM_TCL_DATA_RINGS, \
  613. CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
  614. #define CFG_DP_NSS_REO_DEST_RINGS \
  615. CFG_INI_UINT("dp_nss_reo_dest_rings", \
  616. WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN, \
  617. WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX, \
  618. WLAN_CFG_NSS_NUM_REO_DEST_RING, \
  619. CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings")
  620. #define CFG_DP_NSS_TCL_DATA_RINGS \
  621. CFG_INI_UINT("dp_nss_tcl_data_rings", \
  622. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN, \
  623. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX, \
  624. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS, \
  625. CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings")
  626. #define CFG_DP_TX_DESC \
  627. CFG_INI_UINT("dp_tx_desc", \
  628. WLAN_CFG_NUM_TX_DESC_MIN, \
  629. WLAN_CFG_NUM_TX_DESC_MAX, \
  630. WLAN_CFG_NUM_TX_DESC, \
  631. CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
  632. #define CFG_DP_TX_DESC_POOL_3 \
  633. CFG_INI_UINT("dp_tx_desc_pool_3", \
  634. WLAN_CFG_NUM_TX_DESC_MIN, \
  635. WLAN_CFG_NUM_TX_DESC_MAX, \
  636. WLAN_CFG_NUM_TX_DESC, \
  637. CFG_VALUE_OR_DEFAULT, "DP Tx Descriptor of 3rd pool")
  638. #define CFG_DP_TX_SPL_DESC \
  639. CFG_INI_UINT("dp_tx_spl_desc", \
  640. WLAN_CFG_NUM_TX_SPL_DESC_MIN, \
  641. WLAN_CFG_NUM_TX_SPL_DESC_MAX, \
  642. WLAN_CFG_NUM_TX_SPL_DESC, \
  643. CFG_VALUE_OR_DEFAULT, "DP Tx Special Descriptors")
  644. #define CFG_DP_TX_EXT_DESC \
  645. CFG_INI_UINT("dp_tx_ext_desc", \
  646. WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
  647. WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
  648. WLAN_CFG_NUM_TX_EXT_DESC, \
  649. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
  650. #define CFG_DP_TX_EXT_DESC_POOLS \
  651. CFG_INI_UINT("dp_tx_ext_desc_pool", \
  652. WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
  653. WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
  654. WLAN_CFG_NUM_TXEXT_DESC_POOL, \
  655. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
  656. #define CFG_DP_PDEV_RX_RING \
  657. CFG_INI_UINT("dp_pdev_rx_ring", \
  658. WLAN_CFG_PER_PDEV_RX_RING_MIN, \
  659. WLAN_CFG_PER_PDEV_RX_RING_MAX, \
  660. WLAN_CFG_PER_PDEV_RX_RING, \
  661. CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
  662. #define CFG_DP_PDEV_TX_RING \
  663. CFG_INI_UINT("dp_pdev_tx_ring", \
  664. WLAN_CFG_PER_PDEV_TX_RING_MIN, \
  665. WLAN_CFG_PER_PDEV_TX_RING_MAX, \
  666. WLAN_CFG_PER_PDEV_TX_RING, \
  667. CFG_VALUE_OR_DEFAULT, \
  668. "DP PDEV Tx Ring")
  669. #define CFG_DP_RX_DEFRAG_TIMEOUT \
  670. CFG_INI_UINT("dp_rx_defrag_timeout", \
  671. WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
  672. WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
  673. WLAN_CFG_RX_DEFRAG_TIMEOUT, \
  674. CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
  675. #define CFG_DP_TX_COMPL_RING_SIZE \
  676. CFG_INI_UINT("dp_tx_compl_ring_size", \
  677. WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
  678. WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
  679. WLAN_CFG_TX_COMP_RING_SIZE, \
  680. CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
  681. #define CFG_DP_TX_RING_SIZE \
  682. CFG_INI_UINT("dp_tx_ring_size", \
  683. WLAN_CFG_TX_RING_SIZE_MIN,\
  684. WLAN_CFG_TX_RING_SIZE_MAX,\
  685. WLAN_CFG_TX_RING_SIZE,\
  686. CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
  687. #define CFG_DP_NSS_COMP_RING_SIZE \
  688. CFG_INI_UINT("dp_nss_comp_ring_size", \
  689. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
  690. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
  691. WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
  692. CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
  693. #define CFG_DP_PDEV_LMAC_RING \
  694. CFG_INI_UINT("dp_pdev_lmac_ring", \
  695. WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
  696. WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
  697. WLAN_CFG_PER_PDEV_LMAC_RING, \
  698. CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
  699. #define CFG_DP_TIME_CONTROL_BP \
  700. CFG_INI_UINT("dp_time_control_bp", \
  701. WLAN_CFG_TIME_CONTROL_BP_MIN,\
  702. WLAN_CFG_TIME_CONTROL_BP_MAX,\
  703. WLAN_CFG_TIME_CONTROL_BP,\
  704. CFG_VALUE_OR_DEFAULT, "DP time control back pressure")
  705. #define CFG_DP_RX_BUFFER_SIZE \
  706. CFG_INI_UINT("dp_rx_buffer_size", \
  707. WLAN_CFG_RX_BUFFER_SIZE_MIN,\
  708. WLAN_CFG_RX_BUFFER_SIZE_MAX,\
  709. WLAN_CFG_RX_BUFFER_SIZE,\
  710. CFG_VALUE_OR_DEFAULT, "DP rx buffer size")
  711. #define CFG_DP_QREF_CONTROL_SIZE \
  712. CFG_INI_UINT("dp_qref_control_size", \
  713. WLAN_CFG_QREF_CONTROL_SIZE_MIN,\
  714. WLAN_CFG_QREF_CONTROL_SIZE_MAX,\
  715. WLAN_CFG_QREF_CONTROL_SIZE,\
  716. CFG_VALUE_OR_DEFAULT, "DP array size for qref debug")
  717. #ifdef CONFIG_SAWF_STATS
  718. #define CFG_DP_SAWF_STATS \
  719. CFG_INI_UINT("dp_sawf_stats", \
  720. WLAN_CFG_SAWF_STATS_MIN,\
  721. WLAN_CFG_SAWF_STATS_MAX,\
  722. WLAN_CFG_SAWF_STATS,\
  723. CFG_VALUE_OR_DEFAULT, "DP sawf stats config")
  724. #define CFG_DP_SAWF_STATS_CONFIG CFG(CFG_DP_SAWF_STATS)
  725. #else
  726. #define CFG_DP_SAWF_STATS_CONFIG
  727. #endif
  728. #ifdef WLAN_FEATURE_LOCAL_PKT_CAPTURE
  729. /*
  730. * <ini>
  731. * local_pkt_capture - Enable/Disable Local packet capture
  732. * @Default: false
  733. *
  734. * This ini is used to enable/disable local packet capture.
  735. *
  736. * Related: None
  737. *
  738. * Usage: External
  739. *
  740. * </ini>
  741. */
  742. #define CFG_DP_LOCAL_PKT_CAPTURE \
  743. CFG_INI_BOOL( \
  744. "local_packet_capture", \
  745. true, \
  746. "Local packet capture")
  747. #define CFG_DP_LOCAL_PKT_CAPTURE_CONFIG CFG(CFG_DP_LOCAL_PKT_CAPTURE)
  748. #else
  749. #define CFG_DP_LOCAL_PKT_CAPTURE_CONFIG
  750. #endif
  751. /*
  752. * <ini>
  753. * dp_rx_pending_hl_threshold - High threshold of frame number to start
  754. * frame dropping scheme
  755. * @Min: 0
  756. * @Max: 524288
  757. * @Default: 393216
  758. *
  759. * This ini entry is used to set a high limit threshold to start frame
  760. * dropping scheme
  761. *
  762. * Usage: External
  763. *
  764. * </ini>
  765. */
  766. #define CFG_DP_RX_PENDING_HL_THRESHOLD \
  767. CFG_INI_UINT("dp_rx_pending_hl_threshold", \
  768. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN, \
  769. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX, \
  770. WLAN_CFG_RX_PENDING_HL_THRESHOLD, \
  771. CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold")
  772. /*
  773. * <ini>
  774. * dp_rx_pending_lo_threshold - Low threshold of frame number to stop
  775. * frame dropping scheme
  776. * @Min: 100
  777. * @Max: 524288
  778. * @Default: 393216
  779. *
  780. * This ini entry is used to set a low limit threshold to stop frame
  781. * dropping scheme
  782. *
  783. * Usage: External
  784. *
  785. * </ini>
  786. */
  787. #define CFG_DP_RX_PENDING_LO_THRESHOLD \
  788. CFG_INI_UINT("dp_rx_pending_lo_threshold", \
  789. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN, \
  790. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX, \
  791. WLAN_CFG_RX_PENDING_LO_THRESHOLD, \
  792. CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold")
  793. #define CFG_DP_BASE_HW_MAC_ID \
  794. CFG_INI_UINT("dp_base_hw_macid", \
  795. 0, 1, 1, \
  796. CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
  797. #define CFG_DP_RX_HASH \
  798. CFG_INI_BOOL("dp_rx_hash", true, \
  799. "DP Rx Hash")
  800. #define CFG_DP_RX_RR \
  801. CFG_INI_BOOL("dp_rx_rr", true, \
  802. "DP Rx Round Robin")
  803. #define CFG_DP_TSO \
  804. CFG_INI_BOOL("TSOEnable", false, \
  805. "DP TSO Enabled")
  806. #define CFG_DP_LRO \
  807. CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
  808. "DP LRO Enable")
  809. #ifdef WLAN_USE_CONFIG_PARAMS
  810. /*
  811. * <ini>
  812. * dp_tx_desc_use_512p - Use 512M tx descriptor size
  813. * @Min: 0
  814. * @Max: 1
  815. * @Default: 0
  816. *
  817. * This ini entry is used as flag to use 512M tx descriptor size or not
  818. *
  819. * Usage: Internal
  820. *
  821. * </ini>
  822. */
  823. #define CFG_DP_TX_DESC_512P \
  824. CFG_INI_BOOL("dp_tx_desc_use_512p", false, \
  825. "DP TX DESC PINE SPECIFIC")
  826. /*
  827. * <ini>
  828. * dp_nss_3radio_ring - Use 3 Radio NSS comp ring size
  829. * @Min: 0
  830. * @Max: 1
  831. * @Default: 0
  832. *
  833. * This ini entry is used as flag to use 3 Radio NSS com ring size or not
  834. *
  835. * Usage: Internal
  836. *
  837. * </ini>
  838. */
  839. #define CFG_DP_NSS_3RADIO_RING \
  840. CFG_INI_BOOL("dp_nss_3radio_ring", false, \
  841. "DP NSS 3 RADIO RING SIZE")
  842. /*
  843. * <ini>
  844. * dp_mon_ring_per_512M - Update monitor status ring as 512M profile
  845. * @Min: 0
  846. * @Max: 1
  847. * @Default: 0
  848. *
  849. * This ini entry is used as flag to update monitor status ring as 512M profile
  850. *
  851. * Usage: Internal
  852. *
  853. * </ini>
  854. */
  855. #define CFG_DP_MON_STATUS_512M \
  856. CFG_INI_BOOL("dp_mon_ring_per_512M", false, \
  857. "DP MON STATUS RING SIZE PER 512M PROFILE")
  858. /*
  859. * <ini>
  860. * dp_mon_2chain_ring - Reduce monitor rings size as for 2 Chains case
  861. * @Min: 0
  862. * @Max: 1
  863. * @Default: 0
  864. *
  865. * This ini entry is used as flag to reduce monitor rings size as those used
  866. * in case of 2 Tx/RxChains
  867. *
  868. * Usage: Internal
  869. *
  870. * </ini>
  871. */
  872. #define CFG_DP_MON_2CHAIN_RING \
  873. CFG_INI_BOOL("dp_mon_2chain_ring", false, \
  874. "DP MON UPDATE RINGS FOR 2CHAIN")
  875. /*
  876. * <ini>
  877. * dp_mon_4chain_ring - Update monitor rings size for 4 Chains case
  878. * @Min: 0
  879. * @Max: 1
  880. * @Default: 0
  881. *
  882. * This ini entry is used as flag to reduce monitor rings size as those used
  883. * in case of 4 Tx/RxChains
  884. *
  885. * Usage: Internal
  886. *
  887. * </ini>
  888. */
  889. #define CFG_DP_MON_4CHAIN_RING \
  890. CFG_INI_BOOL("dp_mon_4chain_ring", false, \
  891. "DP MON UPDATE RINGS FOR 4CHAIN")
  892. /*
  893. * <ini>
  894. * dp_4radip_rdp_reo - Update RDP REO map based on 4 radio config
  895. * @Min: 0
  896. * @Max: 1
  897. * @Default: 0
  898. *
  899. * This ini entry is used as flag to update RDP reo map based on 4 Radio config
  900. *
  901. * Usage: Internal
  902. *
  903. * </ini>
  904. */
  905. #define CFG_DP_4RADIO_RDP_REO \
  906. CFG_INI_BOOL("dp_nss_4radio_rdp_reo", \
  907. false, "Update REO destination mapping for 4radio")
  908. #define CFG_DP_INI_SECTION_PARAMS \
  909. CFG(CFG_DP_NSS_3RADIO_RING) \
  910. CFG(CFG_DP_TX_DESC_512P) \
  911. CFG(CFG_DP_MON_STATUS_512M) \
  912. CFG(CFG_DP_MON_2CHAIN_RING) \
  913. CFG(CFG_DP_MON_4CHAIN_RING) \
  914. CFG(CFG_DP_4RADIO_RDP_REO)
  915. #else
  916. #define CFG_DP_INI_SECTION_PARAMS
  917. #endif
  918. /*
  919. * <ini>
  920. * CFG_DP_SG - Enable the SG feature standalonely
  921. * @Min: 0
  922. * @Max: 1
  923. * @Default: 1
  924. *
  925. * This ini entry is used to enable/disable SG feature standalonely.
  926. * Also does Rome support SG on TX, lithium does not.
  927. * For example the lithium does not support SG on UDP frames.
  928. * Which is able to handle SG only for TSO frames(in case TSO is enabled).
  929. *
  930. * Usage: External
  931. *
  932. * </ini>
  933. */
  934. #define CFG_DP_SG \
  935. CFG_INI_BOOL("dp_sg_support", false, \
  936. "DP SG Enable")
  937. #define WLAN_CFG_GRO_ENABLE_MIN 0
  938. #define WLAN_CFG_GRO_ENABLE_MAX 3
  939. #define WLAN_CFG_GRO_ENABLE_DEFAULT 0
  940. #define DP_GRO_ENABLE_BIT_SET BIT(0)
  941. #define DP_TC_BASED_DYNAMIC_GRO BIT(1)
  942. /*
  943. * <ini>
  944. * CFG_DP_GRO - Enable the GRO feature standalonely
  945. * @Min: 0
  946. * @Max: 3
  947. * @Default: 0
  948. *
  949. * This ini entry is used to enable/disable GRO feature standalonely.
  950. * Value 0: Disable GRO feature
  951. * Value 1: Enable GRO feature always
  952. * Value 3: Enable GRO dynamic feature where TC rule can control GRO
  953. * behavior
  954. *
  955. * Usage: External
  956. *
  957. * </ini>
  958. */
  959. #define CFG_DP_GRO \
  960. CFG_INI_UINT("GROEnable", \
  961. WLAN_CFG_GRO_ENABLE_MIN, \
  962. WLAN_CFG_GRO_ENABLE_MAX, \
  963. WLAN_CFG_GRO_ENABLE_DEFAULT, \
  964. CFG_VALUE_OR_DEFAULT, "DP GRO Enable")
  965. #define WLAN_CFG_TC_INGRESS_PRIO_MIN 0
  966. #define WLAN_CFG_TC_INGRESS_PRIO_MAX 0xFFFF
  967. #define WLAN_CFG_TC_INGRESS_PRIO_DEFAULT 0
  968. #define CFG_DP_TC_INGRESS_PRIO \
  969. CFG_INI_UINT("tc_ingress_prio", \
  970. WLAN_CFG_TC_INGRESS_PRIO_MIN, \
  971. WLAN_CFG_TC_INGRESS_PRIO_MAX, \
  972. WLAN_CFG_TC_INGRESS_PRIO_DEFAULT, \
  973. CFG_VALUE_OR_DEFAULT, "DP tc ingress prio")
  974. #define CFG_DP_OL_TX_CSUM \
  975. CFG_INI_BOOL("dp_offload_tx_csum_support", false, \
  976. "DP tx csum Enable")
  977. #define CFG_DP_OL_RX_CSUM \
  978. CFG_INI_BOOL("dp_offload_rx_csum_support", false, \
  979. "DP rx csum Enable")
  980. #define CFG_DP_RAWMODE \
  981. CFG_INI_BOOL("dp_rawmode_support", false, \
  982. "DP rawmode Enable")
  983. #define CFG_DP_PEER_FLOW_CTRL \
  984. CFG_INI_BOOL("dp_peer_flow_control_support", false, \
  985. "DP peer flow ctrl Enable")
  986. #define CFG_DP_NAPI \
  987. CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \
  988. "DP Napi Enabled")
  989. /*
  990. * <ini>
  991. * gEnableP2pIpTcpUdpChecksumOffload - Enable checksum offload for P2P mode
  992. * @Min: 0
  993. * @Max: 1
  994. * @Default: 1
  995. *
  996. * This ini entry is used to enable/disable TX checksum(UDP/TCP) for P2P modes.
  997. * This includes P2P device mode, P2P client mode and P2P GO mode.
  998. * The feature is enabled by default. To disable TX checksum for P2P, add the
  999. * following entry in ini file:
  1000. * gEnableP2pIpTcpUdpChecksumOffload=0
  1001. *
  1002. * Usage: External
  1003. *
  1004. * </ini>
  1005. */
  1006. #define CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD \
  1007. CFG_INI_BOOL("gEnableP2pIpTcpUdpChecksumOffload", true, \
  1008. "DP TCP UDP Checksum Offload for P2P mode (device/cli/go)")
  1009. /*
  1010. * <ini>
  1011. * gEnableNanIpTcpUdpChecksumOffload - Enable checksum offload for NAN mode
  1012. * @Min: 0
  1013. * @Max: 1
  1014. * @Default: 1
  1015. *
  1016. * Usage: External
  1017. *
  1018. * </ini>
  1019. */
  1020. #define CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD \
  1021. CFG_INI_BOOL("gEnableNanIpTcpUdpChecksumOffload", true, \
  1022. "DP TCP UDP Checksum Offload for NAN mode")
  1023. /*
  1024. * <ini>
  1025. * gEnableIpTcpUdpChecksumOffload - Enable checksum offload
  1026. * @Min: 0
  1027. * @Max: 1
  1028. * @Default: 1
  1029. *
  1030. * Usage: External
  1031. *
  1032. * </ini>
  1033. */
  1034. #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
  1035. CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \
  1036. "DP TCP UDP Checksum Offload")
  1037. #define CFG_DP_DEFRAG_TIMEOUT_CHECK \
  1038. CFG_INI_BOOL("dp_defrag_timeout_check", true, \
  1039. "DP Defrag Timeout Check")
  1040. #define CFG_DP_WBM_RELEASE_RING \
  1041. CFG_INI_UINT("dp_wbm_release_ring", \
  1042. WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
  1043. WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
  1044. WLAN_CFG_WBM_RELEASE_RING_SIZE, \
  1045. CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
  1046. #define CFG_DP_TCL_CMD_CREDIT_RING \
  1047. CFG_INI_UINT("dp_tcl_cmd_credit_ring", \
  1048. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN, \
  1049. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX, \
  1050. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE, \
  1051. CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring")
  1052. #define CFG_DP_TCL_STATUS_RING \
  1053. CFG_INI_UINT("dp_tcl_status_ring",\
  1054. WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
  1055. WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
  1056. WLAN_CFG_TCL_STATUS_RING_SIZE, \
  1057. CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
  1058. #define CFG_DP_REO_REINJECT_RING \
  1059. CFG_INI_UINT("dp_reo_reinject_ring", \
  1060. WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
  1061. WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
  1062. WLAN_CFG_REO_REINJECT_RING_SIZE, \
  1063. CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
  1064. #define CFG_DP_RX_RELEASE_RING \
  1065. CFG_INI_UINT("dp_rx_release_ring", \
  1066. WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
  1067. WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
  1068. WLAN_CFG_RX_RELEASE_RING_SIZE, \
  1069. CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
  1070. #define CFG_DP_RX_DESTINATION_RING \
  1071. CFG_INI_UINT("dp_reo_dst_ring", \
  1072. WLAN_CFG_REO_DST_RING_SIZE_MIN, \
  1073. WLAN_CFG_REO_DST_RING_SIZE_MAX, \
  1074. WLAN_CFG_REO_DST_RING_SIZE, \
  1075. CFG_VALUE_OR_DEFAULT, "DP REO destination ring")
  1076. #define CFG_DP_REO_EXCEPTION_RING \
  1077. CFG_INI_UINT("dp_reo_exception_ring", \
  1078. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
  1079. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
  1080. WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
  1081. CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
  1082. #define CFG_DP_REO_CMD_RING \
  1083. CFG_INI_UINT("dp_reo_cmd_ring", \
  1084. WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
  1085. WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
  1086. WLAN_CFG_REO_CMD_RING_SIZE, \
  1087. CFG_VALUE_OR_DEFAULT, "DP REO command ring")
  1088. #define CFG_DP_REO_STATUS_RING \
  1089. CFG_INI_UINT("dp_reo_status_ring", \
  1090. WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
  1091. WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
  1092. WLAN_CFG_REO_STATUS_RING_SIZE, \
  1093. CFG_VALUE_OR_DEFAULT, "DP REO status ring")
  1094. #define CFG_DP_RXDMA_BUF_RING \
  1095. CFG_INI_UINT("dp_rxdma_buf_ring", \
  1096. WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
  1097. WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
  1098. WLAN_CFG_RXDMA_BUF_RING_SIZE, \
  1099. CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
  1100. #define CFG_DP_RXDMA_REFILL_RING \
  1101. CFG_INI_UINT("dp_rxdma_refill_ring", \
  1102. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
  1103. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
  1104. WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
  1105. CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
  1106. #define CFG_DP_RXDMA_REFILL_LT_DISABLE \
  1107. CFG_INI_BOOL("dp_disable_rx_buf_low_threshold", false, \
  1108. "Disable Low threshold interrupts for Rx Refill ring")
  1109. #define CFG_DP_TX_DESC_LIMIT_0 \
  1110. CFG_INI_UINT("dp_tx_desc_limit_0", \
  1111. WLAN_CFG_TX_DESC_LIMIT_0_MIN, \
  1112. WLAN_CFG_TX_DESC_LIMIT_0_MAX, \
  1113. WLAN_CFG_TX_DESC_LIMIT_0, \
  1114. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
  1115. #define CFG_DP_TX_DESC_LIMIT_1 \
  1116. CFG_INI_UINT("dp_tx_desc_limit_1", \
  1117. WLAN_CFG_TX_DESC_LIMIT_1_MIN, \
  1118. WLAN_CFG_TX_DESC_LIMIT_1_MAX, \
  1119. WLAN_CFG_TX_DESC_LIMIT_1, \
  1120. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
  1121. #define CFG_DP_TX_DESC_LIMIT_2 \
  1122. CFG_INI_UINT("dp_tx_desc_limit_2", \
  1123. WLAN_CFG_TX_DESC_LIMIT_2_MIN, \
  1124. WLAN_CFG_TX_DESC_LIMIT_2_MAX, \
  1125. WLAN_CFG_TX_DESC_LIMIT_2, \
  1126. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
  1127. #define CFG_DP_TX_DEVICE_LIMIT \
  1128. CFG_INI_UINT("dp_tx_device_limit", \
  1129. WLAN_CFG_TX_DEVICE_LIMIT_MIN, \
  1130. WLAN_CFG_TX_DEVICE_LIMIT_MAX, \
  1131. WLAN_CFG_TX_DEVICE_LIMIT, \
  1132. CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit")
  1133. #define CFG_DP_TX_SPL_DEVICE_LIMIT \
  1134. CFG_INI_UINT("dp_tx_spl_device_limit", \
  1135. WLAN_CFG_TX_SPL_DEVICE_LIMIT_MIN, \
  1136. WLAN_CFG_TX_SPL_DEVICE_LIMIT_MAX, \
  1137. WLAN_CFG_TX_SPL_DEVICE_LIMIT, \
  1138. CFG_VALUE_OR_DEFAULT, "DP TX Special DEVICE limit")
  1139. #define CFG_DP_TX_SW_INTERNODE_QUEUE \
  1140. CFG_INI_UINT("dp_tx_sw_internode_queue", \
  1141. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN, \
  1142. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX, \
  1143. WLAN_CFG_TX_SW_INTERNODE_QUEUE, \
  1144. CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue")
  1145. #define CFG_DP_TX_DESC_GLOBAL_COUNT \
  1146. CFG_INI_UINT("dp_tx_desc_global", \
  1147. WLAN_CFG_TX_DESC_GLOBAL_COUNT_MIN, \
  1148. WLAN_CFG_TX_DESC_GLOBAL_COUNT_MAX, \
  1149. WLAN_CFG_TX_DESC_GLOBAL_COUNT, \
  1150. CFG_VALUE_OR_DEFAULT, "DP Global TX descriptor count")
  1151. #define CFG_DP_SPCL_TX_DESC_GLOBAL_COUNT \
  1152. CFG_INI_UINT("dp_spcl_tx_desc_global", \
  1153. WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MIN, \
  1154. WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT_MAX, \
  1155. WLAN_CFG_SPCL_TX_DESC_GLOBAL_COUNT, \
  1156. CFG_VALUE_OR_DEFAULT, "DP Global special TX descriptor count")
  1157. #define CFG_DP_RXDMA_MONITOR_BUF_RING \
  1158. CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
  1159. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
  1160. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
  1161. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
  1162. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
  1163. #define CFG_DP_TX_MONITOR_BUF_RING \
  1164. CFG_INI_UINT("dp_tx_monitor_buf_ring", \
  1165. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN, \
  1166. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX, \
  1167. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE, \
  1168. CFG_VALUE_OR_DEFAULT, "DP TX monitor buffer ring")
  1169. #define CFG_DP_RXDMA_MONITOR_DST_RING \
  1170. CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
  1171. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
  1172. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
  1173. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
  1174. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  1175. #define CFG_DP_TX_MONITOR_DST_RING \
  1176. CFG_INI_UINT("dp_tx_monitor_dst_ring", \
  1177. WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN, \
  1178. WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX, \
  1179. WLAN_CFG_TX_MONITOR_DST_RING_SIZE, \
  1180. CFG_VALUE_OR_DEFAULT, "DP TX monitor destination ring")
  1181. #define CFG_DP_RXDMA_MONITOR_STATUS_RING \
  1182. CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
  1183. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
  1184. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
  1185. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
  1186. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
  1187. #define CFG_DP_RXDMA_MONITOR_DESC_RING \
  1188. CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
  1189. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
  1190. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
  1191. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
  1192. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  1193. #define CFG_DP_SW2RXDMA_LINK_RING \
  1194. CFG_INI_UINT("dp_sw2rxdma_link_ring", \
  1195. WLAN_CFG_SW2RXDMA_LINK_RING_SIZE_MIN, \
  1196. WLAN_CFG_SW2RXDMA_LINK_RING_SIZE_MAX, \
  1197. WLAN_CFG_SW2RXDMA_LINK_RING_SIZE, \
  1198. CFG_VALUE_OR_DEFAULT, "DP SW2RXDMA link ring")
  1199. #define CFG_DP_RXDMA_ERR_DST_RING \
  1200. CFG_INI_UINT("dp_rxdma_err_dst_ring", \
  1201. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
  1202. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
  1203. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
  1204. CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
  1205. #define CFG_DP_PER_PKT_LOGGING \
  1206. CFG_INI_UINT("enable_verbose_debug", \
  1207. 0, 0xffff, 0, \
  1208. CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
  1209. #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \
  1210. CFG_INI_UINT("TxFlowStartQueueOffset", \
  1211. 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \
  1212. CFG_VALUE_OR_DEFAULT, "Start queue offset")
  1213. #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \
  1214. CFG_INI_UINT("TxFlowStopQueueThreshold", \
  1215. 0, 50, 15, \
  1216. CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
  1217. #define CFG_DP_IPA_UC_TX_BUF_SIZE \
  1218. CFG_INI_UINT("IpaUcTxBufSize", \
  1219. 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \
  1220. CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
  1221. #define CFG_DP_IPA_UC_TX_PARTITION_BASE \
  1222. CFG_INI_UINT("IpaUcTxPartitionBase", \
  1223. 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \
  1224. CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
  1225. #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \
  1226. CFG_INI_UINT("IpaUcRxIndRingCount", \
  1227. 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \
  1228. CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
  1229. #define CFG_DP_AP_STA_SECURITY_SEPERATION \
  1230. CFG_INI_BOOL("gDisableIntraBssFwd", \
  1231. false, "Disable intrs BSS Rx packets")
  1232. #define CFG_DP_ENABLE_DATA_STALL_DETECTION \
  1233. CFG_INI_UINT("gEnableDataStallDetection", \
  1234. 0, 0xFFFFFFFF, 0x1, \
  1235. CFG_VALUE_OR_DEFAULT, "Enable/Disable Data stall detection")
  1236. #define CFG_DP_RX_SW_DESC_WEIGHT \
  1237. CFG_INI_UINT("dp_rx_sw_desc_weight", \
  1238. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \
  1239. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \
  1240. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \
  1241. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
  1242. #define CFG_DP_RX_SW_DESC_NUM \
  1243. CFG_INI_UINT("dp_rx_sw_desc_num", \
  1244. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN, \
  1245. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX, \
  1246. WLAN_CFG_RX_SW_DESC_NUM_SIZE, \
  1247. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num")
  1248. #define CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE \
  1249. CFG_INI_UINT("dp_rx_flow_search_table_size", \
  1250. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN, \
  1251. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX, \
  1252. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT, \
  1253. CFG_VALUE_OR_DEFAULT, \
  1254. "DP Rx Flow Search Table Size in number of entries")
  1255. #define CFG_DP_RX_FLOW_TAG_ENABLE \
  1256. CFG_INI_BOOL("dp_rx_flow_tag_enable", false, \
  1257. "Enable/Disable DP Rx Flow Tag")
  1258. #define CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV \
  1259. CFG_INI_BOOL("dp_rx_per_pdev_flow_search", false, \
  1260. "DP Rx Flow Search Table Is Per PDev")
  1261. #define CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE \
  1262. CFG_INI_BOOL("dp_rx_monitor_protocol_flow_tag_enable", true, \
  1263. "Enable/Disable Rx Protocol & Flow tags in Monitor mode")
  1264. #define CFG_DP_TX_PER_PKT_VDEV_ID_CHECK \
  1265. CFG_INI_BOOL("dp_tx_allow_per_pkt_vdev_id_check", false, \
  1266. "Enable/Disable tx Per Pkt vdev id check")
  1267. #define CFG_DP_HANDLE_INVALID_DECAP_TYPE_DISABLE \
  1268. CFG_INI_BOOL("dp_handle_invalid_decap_type_disable", false, \
  1269. "Enable/Disable DP TLV out of order WAR")
  1270. #define CFG_DP_TXMON_SW_PEER_FILTERING \
  1271. CFG_INI_BOOL("tx_litemon_sw_peer_filtering", false, \
  1272. "Enable SW based tx monitor peer fitlering")
  1273. #define CFG_DP_POINTER_TIMER_THRESHOLD_RX \
  1274. CFG_INI_UINT("dp_rx_ptr_timer_threshold", \
  1275. 0, 0xFFFF, 0, \
  1276. CFG_VALUE_OR_DEFAULT, "RX pointer update timer threshold")
  1277. #define CFG_DP_POINTER_NUM_THRESHOLD_RX \
  1278. CFG_INI_UINT("dp_rx_ptr_num_threshold", \
  1279. 0, 63, 0, \
  1280. CFG_VALUE_OR_DEFAULT, "RX pointer update entries number threshold")
  1281. #define CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD \
  1282. CFG_INI_UINT("mon_drop_thresh", \
  1283. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN, \
  1284. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX, \
  1285. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE, \
  1286. CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop threshold")
  1287. #define CFG_DP_PKTLOG_BUFFER_SIZE \
  1288. CFG_INI_UINT("PktlogBufSize", \
  1289. WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE, \
  1290. WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE, \
  1291. WLAN_CFG_PKTLOG_BUFFER_SIZE, \
  1292. CFG_VALUE_OR_DEFAULT, "Packet Log buffer size")
  1293. #define CFG_DP_FULL_MON_MODE \
  1294. CFG_INI_BOOL("full_mon_mode", \
  1295. false, "Full Monitor mode support")
  1296. #define CFG_DP_REO_RINGS_MAP \
  1297. CFG_INI_UINT("dp_reo_rings_map", \
  1298. WLAN_CFG_NUM_REO_RINGS_MAP_MIN, \
  1299. WLAN_CFG_NUM_REO_RINGS_MAP_MAX, \
  1300. WLAN_CFG_NUM_REO_RINGS_MAP, \
  1301. CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping")
  1302. #define CFG_DP_RX_RADIO_0_DEFAULT_REO \
  1303. CFG_INI_UINT("dp_rx_radio0_default_reo", \
  1304. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1305. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1306. WLAN_CFG_RADIO_0_DEFAULT_REO, \
  1307. CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping")
  1308. #define CFG_DP_RX_RADIO_1_DEFAULT_REO \
  1309. CFG_INI_UINT("dp_rx_radio1_default_reo", \
  1310. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1311. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1312. WLAN_CFG_RADIO_1_DEFAULT_REO, \
  1313. CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping")
  1314. #define CFG_DP_RX_RADIO_2_DEFAULT_REO \
  1315. CFG_INI_UINT("dp_rx_radio2_default_reo", \
  1316. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1317. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1318. WLAN_CFG_RADIO_2_DEFAULT_REO, \
  1319. CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping")
  1320. #define CFG_DP_PEER_EXT_STATS \
  1321. CFG_INI_BOOL("peer_ext_stats", \
  1322. false, "Peer extended stats")
  1323. #if defined QCA_ENHANCED_STATS_SUPPORT || defined DP_MLO_LINK_STATS_SUPPORT
  1324. #define DEFAULT_PEER_LINK_STATS_VALUE true
  1325. #else
  1326. #define DEFAULT_PEER_LINK_STATS_VALUE false
  1327. #endif /* QCA_ENHANCED_STATS_SUPPORT */
  1328. #define CFG_DP_PEER_LINK_STATS \
  1329. CFG_INI_BOOL("peer_link_stats", \
  1330. DEFAULT_PEER_LINK_STATS_VALUE, "Peer Link stats")
  1331. #define CFG_DP_PEER_JITTER_STATS \
  1332. CFG_INI_BOOL("peer_jitter_stats", \
  1333. false, "Peer Jitter stats")
  1334. #define CFG_DP_NAPI_SCALE_FACTOR \
  1335. CFG_INI_UINT("dp_napi_scale_factor", \
  1336. WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN, \
  1337. WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX, \
  1338. WLAN_CFG_DP_NAPI_SCALE_FACTOR, \
  1339. CFG_VALUE_OR_DEFAULT, "NAPI scale factor for DP")
  1340. #define CFG_DP_STATS_AVG_RATE_FILTER \
  1341. CFG_INI_UINT("dp_stats_avg_rate_filter_val", \
  1342. WLAN_CFG_DP_AVG_RATE_FILTER_MIN,\
  1343. WLAN_CFG_DP_AVG_RATE_FILTER_MAX, \
  1344. WLAN_CFG_DP_AVG_RATE_FILTER_DEFAULT, \
  1345. CFG_VALUE_OR_DEFAULT, \
  1346. "Average Rate filter for stats")
  1347. /*
  1348. * <ini>
  1349. * legacy_mode_csum_disable - Disable csum offload for legacy 802.11abg modes
  1350. * @Min: 0
  1351. * @Max: 1
  1352. * @Default: Default value indicating if checksum should be disabled for
  1353. * legacy WLAN modes
  1354. *
  1355. * This ini is used to disable HW checksum offload capability for legacy
  1356. * connections
  1357. *
  1358. * Related: gEnableIpTcpUdpChecksumOffload should be enabled
  1359. *
  1360. * Usage: Internal
  1361. *
  1362. * </ini>
  1363. */
  1364. #ifndef DP_LEGACY_MODE_CSM_DEFAULT_DISABLE
  1365. #define DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1
  1366. #endif
  1367. #define CFG_DP_LEGACY_MODE_CSUM_DISABLE \
  1368. CFG_INI_BOOL("legacy_mode_csum_disable", \
  1369. DP_LEGACY_MODE_CSM_DEFAULT_DISABLE, \
  1370. "Enable/Disable legacy mode checksum")
  1371. #define CFG_DP_RX_BUFF_POOL_ENABLE \
  1372. CFG_INI_BOOL("dp_rx_buff_prealloc_pool", false, \
  1373. "Enable/Disable DP RX emergency buffer pool support")
  1374. #define CFG_DP_RX_REFILL_BUFF_POOL_ENABLE \
  1375. CFG_INI_BOOL("dp_rx_refill_buff_pool", false, \
  1376. "Enable/Disable DP RX refill buffer pool support")
  1377. #define CFG_DP_BUFS_PAGE_FRAG_ALLOCS \
  1378. CFG_INI_BOOL("dp_bufs_page_frag_allocs", true, \
  1379. "Enable/Disable forced DP page frage buffer allocations")
  1380. #define CFG_DP_POLL_MODE_ENABLE \
  1381. CFG_INI_BOOL("dp_poll_mode_enable", false, \
  1382. "Enable/Disable Polling mode for data path")
  1383. #define CFG_DP_RX_FST_IN_CMEM \
  1384. CFG_INI_BOOL("dp_rx_fst_in_cmem", false, \
  1385. "Enable/Disable flow search table in CMEM")
  1386. /*
  1387. * <ini>
  1388. * gEnableSWLM - Control DP Software latency manager
  1389. * @Min: 0
  1390. * @Max: 1
  1391. * @Default: 0
  1392. *
  1393. * This ini is used to enable DP Software latency Manager
  1394. *
  1395. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  1396. *
  1397. * Usage: Internal
  1398. *
  1399. * </ini>
  1400. */
  1401. #define CFG_DP_SWLM_ENABLE \
  1402. CFG_INI_BOOL("gEnableSWLM", false, \
  1403. "Enable/Disable DP SWLM")
  1404. /*
  1405. * <ini>
  1406. * wow_check_rx_pending_enable - control to check RX frames pending in Wow
  1407. * @Min: 0
  1408. * @Max: 1
  1409. * @Default: 0
  1410. *
  1411. * This ini is used to control DP Software to perform RX pending check
  1412. * before entering WoW mode
  1413. *
  1414. * Usage: Internal
  1415. *
  1416. * </ini>
  1417. */
  1418. #define CFG_DP_WOW_CHECK_RX_PENDING \
  1419. CFG_INI_BOOL("wow_check_rx_pending_enable", \
  1420. false, \
  1421. "enable rx frame pending check in WoW mode")
  1422. #define CFG_DP_DELAY_MON_REPLENISH \
  1423. CFG_INI_BOOL("delay_mon_replenish", \
  1424. true, "Delay Monitor Replenish")
  1425. #ifdef QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT
  1426. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN 500
  1427. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX 2000
  1428. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER 500
  1429. #define CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG \
  1430. CFG_INI_BOOL("vdev_stats_hw_offload_config", \
  1431. false, "Offload vdev stats to HW")
  1432. #define CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER \
  1433. CFG_INI_UINT("vdev_stats_hw_offload_timer", \
  1434. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN, \
  1435. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX, \
  1436. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER, \
  1437. CFG_VALUE_OR_DEFAULT, \
  1438. "vdev stats hw offload timer duration")
  1439. #define CFG_DP_VDEV_STATS_HW_OFFLOAD \
  1440. CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG) \
  1441. CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER)
  1442. #else
  1443. #define CFG_DP_VDEV_STATS_HW_OFFLOAD
  1444. #endif
  1445. /*
  1446. * <ini>
  1447. * ghw_cc_enable - enable HW cookie conversion by register
  1448. * @Min: 0
  1449. * @Max: 1
  1450. * @Default: 1
  1451. *
  1452. * This ini is used to control HW based 20 bits cookie to 64 bits
  1453. * Desc virtual address conversion
  1454. *
  1455. * Usage: Internal
  1456. *
  1457. * </ini>
  1458. */
  1459. #define CFG_DP_HW_CC_ENABLE \
  1460. CFG_INI_BOOL("ghw_cc_enable", \
  1461. true, "Enable/Disable HW cookie conversion")
  1462. #ifdef IPA_OFFLOAD
  1463. /*
  1464. * <ini>
  1465. * dp_ipa_tx_ring_size - Set tcl ring size for IPA
  1466. * @Min: 1024
  1467. * @Max: 8096
  1468. * @Default: 1024
  1469. *
  1470. * This ini sets the tcl ring size for IPA
  1471. *
  1472. * Related: N/A
  1473. *
  1474. * Supported Feature: IPA
  1475. *
  1476. * Usage: Internal
  1477. *
  1478. * </ini>
  1479. */
  1480. #define CFG_DP_IPA_TX_RING_SIZE \
  1481. CFG_INI_UINT("dp_ipa_tx_ring_size", \
  1482. WLAN_CFG_IPA_TX_RING_SIZE_MIN, \
  1483. WLAN_CFG_IPA_TX_RING_SIZE_MAX, \
  1484. WLAN_CFG_IPA_TX_RING_SIZE, \
  1485. CFG_VALUE_OR_DEFAULT, "IPA TCL ring size")
  1486. /*
  1487. * <ini>
  1488. * dp_ipa_tx_comp_ring_size - Set tx comp ring size for IPA
  1489. * @Min: 1024
  1490. * @Max: 8096
  1491. * @Default: 1024
  1492. *
  1493. * This ini sets the tx comp ring size for IPA
  1494. *
  1495. * Related: N/A
  1496. *
  1497. * Supported Feature: IPA
  1498. *
  1499. * Usage: Internal
  1500. *
  1501. * </ini>
  1502. */
  1503. #define CFG_DP_IPA_TX_COMP_RING_SIZE \
  1504. CFG_INI_UINT("dp_ipa_tx_comp_ring_size", \
  1505. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN, \
  1506. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX, \
  1507. WLAN_CFG_IPA_TX_COMP_RING_SIZE, \
  1508. CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size")
  1509. #ifdef IPA_WDI3_TX_TWO_PIPES
  1510. /*
  1511. * <ini>
  1512. * dp_ipa_tx_alt_ring_size - Set alt tcl ring size for IPA
  1513. * @Min: 1024
  1514. * @Max: 8096
  1515. * @Default: 1024
  1516. *
  1517. * This ini sets the alt tcl ring size for IPA
  1518. *
  1519. * Related: N/A
  1520. *
  1521. * Supported Feature: IPA
  1522. *
  1523. * Usage: Internal
  1524. *
  1525. * </ini>
  1526. */
  1527. #define CFG_DP_IPA_TX_ALT_RING_SIZE \
  1528. CFG_INI_UINT("dp_ipa_tx_alt_ring_size", \
  1529. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN, \
  1530. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX, \
  1531. WLAN_CFG_IPA_TX_ALT_RING_SIZE, \
  1532. CFG_VALUE_OR_DEFAULT, \
  1533. "DP IPA TX Alternative Ring Size")
  1534. /*
  1535. * <ini>
  1536. * dp_ipa_tx_alt_comp_ring_size - Set tx alt comp ring size for IPA
  1537. * @Min: 1024
  1538. * @Max: 8096
  1539. * @Default: 1024
  1540. *
  1541. * This ini sets the tx alt comp ring size for IPA
  1542. *
  1543. * Related: N/A
  1544. *
  1545. * Supported Feature: IPA
  1546. *
  1547. * Usage: Internal
  1548. *
  1549. * </ini>
  1550. */
  1551. #define CFG_DP_IPA_TX_ALT_COMP_RING_SIZE \
  1552. CFG_INI_UINT("dp_ipa_tx_alt_comp_ring_size", \
  1553. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN, \
  1554. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX, \
  1555. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE, \
  1556. CFG_VALUE_OR_DEFAULT, \
  1557. "DP IPA TX Alternative Completion Ring Size")
  1558. #define CFG_DP_IPA_TX_ALT_RING_CFG \
  1559. CFG(CFG_DP_IPA_TX_ALT_RING_SIZE) \
  1560. CFG(CFG_DP_IPA_TX_ALT_COMP_RING_SIZE)
  1561. #else
  1562. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1563. #endif
  1564. #define CFG_DP_IPA_TX_RING_CFG \
  1565. CFG(CFG_DP_IPA_TX_RING_SIZE) \
  1566. CFG(CFG_DP_IPA_TX_COMP_RING_SIZE)
  1567. #else
  1568. #define CFG_DP_IPA_TX_RING_CFG
  1569. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1570. #endif
  1571. #ifdef WLAN_SUPPORT_PPEDS
  1572. #define WLAN_CFG_NUM_PPEDS_TX_DESC_MIN 16
  1573. #define WLAN_CFG_NUM_PPEDS_TX_DESC_MAX 0xFA00
  1574. #define WLAN_CFG_NUM_PPEDS_TX_DESC 0x8000
  1575. #define WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MIN 8
  1576. #define WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MAX 256
  1577. #define WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI 64
  1578. #define WLAN_CFG_PPEDS_TX_DESC_HOTLIST_LEN_MIN 0
  1579. #define WLAN_CFG_PPEDS_TX_DESC_HOTLIST_LEN_MAX 0x2000
  1580. #define WLAN_CFG_PPEDS_TX_DESC_HOTLIST_LEN 0x400
  1581. #define CFG_DP_PPEDS_TX_DESC \
  1582. CFG_INI_UINT("dp_ppeds_tx_desc", \
  1583. WLAN_CFG_NUM_PPEDS_TX_DESC_MIN, \
  1584. WLAN_CFG_NUM_PPEDS_TX_DESC_MAX, \
  1585. WLAN_CFG_NUM_PPEDS_TX_DESC, \
  1586. CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Descriptors")
  1587. #define CFG_DP_PPEDS_TX_DESC_HOTLIST_LEN \
  1588. CFG_INI_UINT("dp_ppeds_tx_desc_hotlist_len", \
  1589. WLAN_CFG_PPEDS_TX_DESC_HOTLIST_LEN_MIN, \
  1590. WLAN_CFG_PPEDS_TX_DESC_HOTLIST_LEN_MAX, \
  1591. WLAN_CFG_PPEDS_TX_DESC_HOTLIST_LEN, \
  1592. CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Desc hotlist length")
  1593. #define CFG_DP_PPEDS_TX_CMP_NAPI_BUDGET \
  1594. CFG_INI_UINT("dp_ppeds_tx_cmp_napi_budget", \
  1595. WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MIN, \
  1596. WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI_MAX, \
  1597. WLAN_CFG_NUM_PPEDS_TX_CMP_NAPI, \
  1598. CFG_VALUE_OR_DEFAULT, "DP PPEDS Tx Comp handler napi budget")
  1599. #define CFG_DP_PPEDS_ENABLE \
  1600. CFG_INI_BOOL("ppe_ds_enable", true, \
  1601. "DP ppe enable flag")
  1602. #define CFG_DP_REO2PPE_RING \
  1603. CFG_INI_UINT("dp_reo2ppe_ring", \
  1604. WLAN_CFG_REO2PPE_RING_SIZE_MIN, \
  1605. WLAN_CFG_REO2PPE_RING_SIZE_MAX, \
  1606. WLAN_CFG_REO2PPE_RING_SIZE, \
  1607. CFG_VALUE_OR_DEFAULT, "DP REO2PPE ring")
  1608. #define CFG_DP_PPE2TCL_RING \
  1609. CFG_INI_UINT("dp_ppe2tcl_ring", \
  1610. WLAN_CFG_PPE2TCL_RING_SIZE_MIN, \
  1611. WLAN_CFG_PPE2TCL_RING_SIZE_MAX, \
  1612. WLAN_CFG_PPE2TCL_RING_SIZE, \
  1613. CFG_VALUE_OR_DEFAULT, "DP PPE2TCL rings")
  1614. #define CFG_DP_PPEDS_WIFI_SOC_CFG \
  1615. CFG_INI_UINT("ppeds_wifi_soc_cfg", \
  1616. CFG_DP_PPEDS_WIFI_SOC_CFG_NONE, \
  1617. CFG_DP_PPEDS_WIFI_SOC_CFG_ALL, \
  1618. CFG_DP_PPEDS_WIFI_SOC_CFG_DEFAULT, \
  1619. CFG_VALUE_OR_DEFAULT, "PPEDS enable per WiFi SoC")
  1620. #define CFG_DP_PPEDS_CONFIG \
  1621. CFG(CFG_DP_PPEDS_TX_CMP_NAPI_BUDGET) \
  1622. CFG(CFG_DP_PPEDS_TX_DESC_HOTLIST_LEN) \
  1623. CFG(CFG_DP_PPEDS_TX_DESC) \
  1624. CFG(CFG_DP_PPEDS_ENABLE) \
  1625. CFG(CFG_DP_REO2PPE_RING) \
  1626. CFG(CFG_DP_PPE2TCL_RING) \
  1627. CFG(CFG_DP_PPEDS_WIFI_SOC_CFG)
  1628. #else
  1629. #define CFG_DP_PPEDS_CONFIG
  1630. #define WLAN_CFG_NUM_PPEDS_TX_DESC_MAX 0
  1631. #endif
  1632. #define WLAN_CFG_SPECIAL_MSK_MIN 0
  1633. #define WLAN_CFG_SPECIAL_MSK_MAX 0xFFFFFFFF
  1634. #define WLAN_CFG_SPECIAL_MSK 0xF
  1635. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  1636. /*
  1637. * <ini>
  1638. * dp_chip0_rx_ring_map - Set Rx ring map for CHIP 0
  1639. * @Min: 0x0
  1640. * @Max: 0xFF
  1641. * @Default: 0xF
  1642. *
  1643. * This ini sets Rx ring map for CHIP 0
  1644. *
  1645. * Usage: Internal
  1646. *
  1647. * </ini>
  1648. */
  1649. #define CFG_DP_MLO_RX_RING_MAP \
  1650. CFG_INI_UINT("dp_mlo_reo_rings_map", \
  1651. WLAN_CFG_MLO_RX_RING_MAP_MIN, \
  1652. WLAN_CFG_MLO_RX_RING_MAP_MAX, \
  1653. WLAN_CFG_MLO_RX_RING_MAP, \
  1654. CFG_VALUE_OR_DEFAULT, "DP MLO Rx ring map")
  1655. #define CFG_DP_MLO_CONFIG \
  1656. CFG(CFG_DP_MLO_RX_RING_MAP)
  1657. #else
  1658. #define CFG_DP_MLO_CONFIG
  1659. #endif
  1660. /*
  1661. * <ini>
  1662. * dp_mpdu_retry_threshold_1 - threshold to increment mpdu success with retries
  1663. * @Min: 0
  1664. * @Max: 255
  1665. * @Default: 0
  1666. *
  1667. * This ini entry is used to set first threshold to increment the value of
  1668. * mpdu_success_with_retries
  1669. *
  1670. * Usage: Internal
  1671. *
  1672. * </ini>
  1673. */
  1674. #define CFG_DP_MPDU_RETRY_THRESHOLD_1 \
  1675. CFG_INI_UINT("dp_mpdu_retry_threshold_1", \
  1676. CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \
  1677. CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \
  1678. CFG_DP_MPDU_RETRY_THRESHOLD, \
  1679. CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 1")
  1680. /*
  1681. * <ini>
  1682. * dp_mpdu_retry_threshold_2 - threshold to increment mpdu success with retries
  1683. * @Min: 0
  1684. * @Max: 255
  1685. * @Default: 0
  1686. *
  1687. * This ini entry is used to set second threshold to increment the value of
  1688. * mpdu_success_with_retries
  1689. *
  1690. * Usage: Internal
  1691. *
  1692. * </ini>
  1693. */
  1694. #define CFG_DP_MPDU_RETRY_THRESHOLD_2 \
  1695. CFG_INI_UINT("dp_mpdu_retry_threshold_2", \
  1696. CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \
  1697. CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \
  1698. CFG_DP_MPDU_RETRY_THRESHOLD, \
  1699. CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 2")
  1700. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  1701. /* Macro enabling support marking of notify frames by host */
  1702. #define DP_MARK_NOTIFY_FRAME_SUPPORT 1
  1703. #else
  1704. #define DP_MARK_NOTIFY_FRAME_SUPPORT 0
  1705. #endif /* QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES */
  1706. /*
  1707. * <ini>
  1708. * Host DP AST entries database - Enable/Disable
  1709. *
  1710. * @Default: 0
  1711. *
  1712. * This ini enables/disables AST entries database on host
  1713. *
  1714. * Usage: Internal
  1715. *
  1716. * </ini>
  1717. */
  1718. #define CFG_DP_HOST_AST_DB_ENABLE \
  1719. CFG_INI_BOOL("host_ast_db_enable", false, \
  1720. "Host AST entries database Enable/Disable")
  1721. #ifdef DP_TX_PACKET_INSPECT_FOR_ILP
  1722. /*
  1723. * <ini>
  1724. * TX packet inspect for ILP - Enable/Disable
  1725. *
  1726. * @Default: true
  1727. *
  1728. * This ini enable/disables TX packet inspection for ILP feature
  1729. *
  1730. * Usage: Internal
  1731. *
  1732. * </ini>
  1733. */
  1734. #define CFG_TX_PKT_INSPECT_FOR_ILP \
  1735. CFG_INI_BOOL("tx_pkt_inspect_for_ilp", true, \
  1736. "TX packet inspect for ILP")
  1737. #define CFG_TX_PKT_INSPECT_FOR_ILP_CFG CFG(CFG_TX_PKT_INSPECT_FOR_ILP)
  1738. #else
  1739. #define CFG_TX_PKT_INSPECT_FOR_ILP_CFG
  1740. #endif
  1741. /*
  1742. * <ini>
  1743. * special_frame_msk - frame mask to mark special frame type
  1744. * @Min: 0
  1745. * @Max: 0xFFFFFFFF
  1746. * @Default: 15
  1747. *
  1748. * This ini entry is used to set frame types to deliver to stack
  1749. * in error receive path
  1750. *
  1751. * Usage: External
  1752. *
  1753. * </ini>
  1754. */
  1755. #define CFG_SPECIAL_FRAME_MSK \
  1756. CFG_INI_UINT("special_frame_msk", \
  1757. WLAN_CFG_SPECIAL_MSK_MIN, \
  1758. WLAN_CFG_SPECIAL_MSK_MAX, \
  1759. WLAN_CFG_SPECIAL_MSK, \
  1760. CFG_VALUE_OR_DEFAULT, "special frame to deliver to stack")
  1761. #ifdef DP_UMAC_HW_RESET_SUPPORT
  1762. #define CFG_DP_UMAC_RESET_BUFFER_WINDOW_MIN 100
  1763. #define CFG_DP_UMAC_RESET_BUFFER_WINDOW_MAX 10000
  1764. #define CFG_DP_UMAC_RESET_BUFFER_WINDOW_DEFAULT 1000
  1765. #define CFG_DP_UMAC_RESET_BUFFER_WINDOW \
  1766. CFG_INI_UINT("umac_reset_buffer_window", \
  1767. CFG_DP_UMAC_RESET_BUFFER_WINDOW_MIN, \
  1768. CFG_DP_UMAC_RESET_BUFFER_WINDOW_MAX, \
  1769. CFG_DP_UMAC_RESET_BUFFER_WINDOW_DEFAULT, \
  1770. CFG_VALUE_OR_DEFAULT, \
  1771. "Buffer time to check if umac reset was in progress during this window, configured time is in milliseconds")
  1772. #define CFG_DP_UMAC_RESET_BUFFER_WINDOW_CFG CFG(CFG_DP_UMAC_RESET_BUFFER_WINDOW)
  1773. #else
  1774. #define CFG_DP_UMAC_RESET_BUFFER_WINDOW_CFG
  1775. #endif /* DP_UMAC_HW_RESET_SUPPORT */
  1776. #define CFG_DP \
  1777. CFG(CFG_DP_HTT_PACKET_TYPE) \
  1778. CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
  1779. CFG(CFG_DP_INT_BATCH_THRESHOLD_MON_DEST) \
  1780. CFG(CFG_DP_INT_BATCH_THRESHOLD_PPE2TCL) \
  1781. CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
  1782. CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
  1783. CFG(CFG_DP_INT_TIMER_THRESHOLD_PPE2TCL) \
  1784. CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
  1785. CFG(CFG_DP_INT_TIMER_THRESHOLD_MON_DEST) \
  1786. CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
  1787. CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
  1788. CFG(CFG_DP_MAX_ALLOC_SIZE) \
  1789. CFG(CFG_DP_MAX_CLIENTS) \
  1790. CFG(CFG_DP_MAX_PEER_ID) \
  1791. CFG(CFG_DP_REO_DEST_RINGS) \
  1792. CFG(CFG_DP_TX_COMP_RINGS) \
  1793. CFG(CFG_DP_TCL_DATA_RINGS) \
  1794. CFG(CFG_DP_NSS_REO_DEST_RINGS) \
  1795. CFG(CFG_DP_NSS_TCL_DATA_RINGS) \
  1796. CFG(CFG_DP_TX_DESC) \
  1797. CFG(CFG_DP_TX_DESC_POOL_3) \
  1798. CFG(CFG_DP_TX_SPL_DESC) \
  1799. CFG(CFG_DP_TX_EXT_DESC) \
  1800. CFG(CFG_DP_TX_EXT_DESC_POOLS) \
  1801. CFG(CFG_DP_PDEV_RX_RING) \
  1802. CFG(CFG_DP_PDEV_TX_RING) \
  1803. CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
  1804. CFG(CFG_DP_TX_COMPL_RING_SIZE) \
  1805. CFG(CFG_DP_TX_RING_SIZE) \
  1806. CFG(CFG_DP_NSS_COMP_RING_SIZE) \
  1807. CFG(CFG_DP_PDEV_LMAC_RING) \
  1808. CFG(CFG_DP_TIME_CONTROL_BP) \
  1809. CFG(CFG_DP_QREF_CONTROL_SIZE) \
  1810. CFG(CFG_DP_BASE_HW_MAC_ID) \
  1811. CFG(CFG_DP_RX_HASH) \
  1812. CFG(CFG_DP_RX_RR) \
  1813. CFG(CFG_DP_TSO) \
  1814. CFG(CFG_DP_LRO) \
  1815. CFG(CFG_DP_SG) \
  1816. CFG(CFG_DP_GRO) \
  1817. CFG(CFG_DP_TC_INGRESS_PRIO) \
  1818. CFG(CFG_DP_OL_TX_CSUM) \
  1819. CFG(CFG_DP_OL_RX_CSUM) \
  1820. CFG(CFG_DP_RAWMODE) \
  1821. CFG(CFG_DP_PEER_FLOW_CTRL) \
  1822. CFG(CFG_DP_NAPI) \
  1823. CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
  1824. CFG(CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD) \
  1825. CFG(CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD) \
  1826. CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
  1827. CFG(CFG_DP_WBM_RELEASE_RING) \
  1828. CFG(CFG_DP_TCL_CMD_CREDIT_RING) \
  1829. CFG(CFG_DP_TCL_STATUS_RING) \
  1830. CFG(CFG_DP_REO_REINJECT_RING) \
  1831. CFG(CFG_DP_RX_RELEASE_RING) \
  1832. CFG(CFG_DP_REO_EXCEPTION_RING) \
  1833. CFG(CFG_DP_RX_DESTINATION_RING) \
  1834. CFG(CFG_DP_REO_CMD_RING) \
  1835. CFG(CFG_DP_REO_STATUS_RING) \
  1836. CFG(CFG_DP_RXDMA_BUF_RING) \
  1837. CFG(CFG_DP_RXDMA_REFILL_RING) \
  1838. CFG(CFG_DP_RXDMA_REFILL_LT_DISABLE) \
  1839. CFG(CFG_DP_TX_DESC_LIMIT_0) \
  1840. CFG(CFG_DP_TX_DESC_LIMIT_1) \
  1841. CFG(CFG_DP_TX_DESC_LIMIT_2) \
  1842. CFG(CFG_DP_TX_DEVICE_LIMIT) \
  1843. CFG(CFG_DP_TX_SPL_DEVICE_LIMIT) \
  1844. CFG(CFG_DP_TX_SW_INTERNODE_QUEUE) \
  1845. CFG(CFG_DP_TX_DESC_GLOBAL_COUNT) \
  1846. CFG(CFG_DP_SPCL_TX_DESC_GLOBAL_COUNT) \
  1847. CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
  1848. CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
  1849. CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
  1850. CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
  1851. CFG(CFG_DP_RXDMA_ERR_DST_RING) \
  1852. CFG(CFG_DP_PER_PKT_LOGGING) \
  1853. CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \
  1854. CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \
  1855. CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \
  1856. CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \
  1857. CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
  1858. CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
  1859. CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \
  1860. CFG(CFG_DP_RX_SW_DESC_WEIGHT) \
  1861. CFG(CFG_DP_RX_SW_DESC_NUM) \
  1862. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE) \
  1863. CFG(CFG_DP_RX_FLOW_TAG_ENABLE) \
  1864. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV) \
  1865. CFG(CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE) \
  1866. CFG(CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD) \
  1867. CFG(CFG_DP_PKTLOG_BUFFER_SIZE) \
  1868. CFG(CFG_DP_FULL_MON_MODE) \
  1869. CFG(CFG_DP_REO_RINGS_MAP) \
  1870. CFG(CFG_DP_PEER_EXT_STATS) \
  1871. CFG(CFG_DP_PEER_JITTER_STATS) \
  1872. CFG(CFG_DP_PEER_LINK_STATS) \
  1873. CFG(CFG_DP_RX_BUFF_POOL_ENABLE) \
  1874. CFG(CFG_DP_RX_REFILL_BUFF_POOL_ENABLE) \
  1875. CFG(CFG_DP_BUFS_PAGE_FRAG_ALLOCS) \
  1876. CFG(CFG_DP_RX_PENDING_HL_THRESHOLD) \
  1877. CFG(CFG_DP_RX_PENDING_LO_THRESHOLD) \
  1878. CFG(CFG_DP_LEGACY_MODE_CSUM_DISABLE) \
  1879. CFG(CFG_DP_POLL_MODE_ENABLE) \
  1880. CFG(CFG_DP_SWLM_ENABLE) \
  1881. CFG(CFG_DP_TX_PER_PKT_VDEV_ID_CHECK) \
  1882. CFG(CFG_DP_RX_FST_IN_CMEM) \
  1883. CFG(CFG_DP_RX_RADIO_0_DEFAULT_REO) \
  1884. CFG(CFG_DP_RX_RADIO_1_DEFAULT_REO) \
  1885. CFG(CFG_DP_RX_RADIO_2_DEFAULT_REO) \
  1886. CFG(CFG_DP_WOW_CHECK_RX_PENDING) \
  1887. CFG(CFG_DP_HW_CC_ENABLE) \
  1888. CFG(CFG_DP_DELAY_MON_REPLENISH) \
  1889. CFG(CFG_DP_TX_MONITOR_BUF_RING) \
  1890. CFG(CFG_DP_TX_MONITOR_DST_RING) \
  1891. CFG(CFG_DP_MPDU_RETRY_THRESHOLD_1) \
  1892. CFG(CFG_DP_MPDU_RETRY_THRESHOLD_2) \
  1893. CFG_DP_IPA_TX_RING_CFG \
  1894. CFG_DP_PPEDS_CONFIG \
  1895. CFG_DP_IPA_TX_ALT_RING_CFG \
  1896. CFG_DP_MLO_CONFIG \
  1897. CFG_DP_INI_SECTION_PARAMS \
  1898. CFG_DP_VDEV_STATS_HW_OFFLOAD \
  1899. CFG(CFG_DP_TX_CAPT_MAX_MEM_MB) \
  1900. CFG(CFG_DP_NAPI_SCALE_FACTOR) \
  1901. CFG(CFG_DP_HOST_AST_DB_ENABLE) \
  1902. CFG_DP_SAWF_STATS_CONFIG \
  1903. CFG(CFG_DP_HANDLE_INVALID_DECAP_TYPE_DISABLE) \
  1904. CFG(CFG_DP_TXMON_SW_PEER_FILTERING) \
  1905. CFG_TX_PKT_INSPECT_FOR_ILP_CFG \
  1906. CFG(CFG_DP_POINTER_TIMER_THRESHOLD_RX) \
  1907. CFG(CFG_DP_POINTER_NUM_THRESHOLD_RX) \
  1908. CFG_DP_LOCAL_PKT_CAPTURE_CONFIG \
  1909. CFG(CFG_SPECIAL_FRAME_MSK) \
  1910. CFG(CFG_DP_SW2RXDMA_LINK_RING) \
  1911. CFG(CFG_DP_TX_CAPT_RADIO_0_RBM_ID) \
  1912. CFG(CFG_DP_TX_CAPT_RADIO_1_RBM_ID) \
  1913. CFG(CFG_DP_TX_CAPT_RADIO_2_RBM_ID) \
  1914. CFG(CFG_DP_TX_CAPT_RADIO_3_RBM_ID) \
  1915. CFG_DP_UMAC_RESET_BUFFER_WINDOW_CFG \
  1916. CFG(CFG_DP_RX_BUFFER_SIZE) \
  1917. CFG(CFG_DP_STATS_AVG_RATE_FILTER)
  1918. #endif /* _CFG_DP_H_ */