hal_6290_tx.h 7.2 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "tcl_data_cmd.h"
  20. #include "mac_tcl_reg_seq_hwioreg.h"
  21. #include "phyrx_rssi_legacy.h"
  22. #include "hal_hw_headers.h"
  23. #include "hal_internal.h"
  24. #include "cdp_txrx_mon_struct.h"
  25. #include "qdf_trace.h"
  26. #include "hal_rx.h"
  27. #include "hal_tx.h"
  28. #include "dp_types.h"
  29. #include "hal_api_mon.h"
  30. /**
  31. * hal_tx_desc_set_dscp_tid_table_id_6290() - Sets DSCP to TID conversion
  32. * table ID
  33. * @desc: Handle to Tx Descriptor
  34. * @id: DSCP to tid conversion table to be used for this frame
  35. *
  36. * Return: void
  37. */
  38. #if defined(QCA_WIFI_QCA6290_11AX)
  39. static void hal_tx_desc_set_dscp_tid_table_id_6290(void *desc,
  40. uint8_t id)
  41. {
  42. HAL_SET_FLD(desc, TCL_DATA_CMD_5,
  43. DSCP_TID_TABLE_NUM) |=
  44. HAL_TX_SM(TCL_DATA_CMD_5,
  45. DSCP_TID_TABLE_NUM, id);
  46. }
  47. #else
  48. static void hal_tx_desc_set_dscp_tid_table_id_6290(void *desc,
  49. uint8_t id)
  50. {
  51. HAL_SET_FLD(desc, TCL_DATA_CMD_3,
  52. DSCP_TO_TID_PRIORITY_TABLE_ID) |=
  53. HAL_TX_SM(TCL_DATA_CMD_3,
  54. DSCP_TO_TID_PRIORITY_TABLE_ID, id);
  55. }
  56. #endif
  57. #define DSCP_TID_TABLE_SIZE 24
  58. #define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4)
  59. #if defined(QCA_WIFI_QCA6290_11AX)
  60. /**
  61. * hal_tx_set_dscp_tid_map_6290() - Configure default DSCP to TID map table
  62. * @soc: HAL SoC context
  63. * @map: DSCP-TID mapping table
  64. * @id: mapping table ID - 0-31
  65. *
  66. * DSCP are mapped to 8 TID values using TID values programmed
  67. * in any of the 32 DSCP_TID_MAPS (id = 0-31).
  68. *
  69. * Return: none
  70. */
  71. static void hal_tx_set_dscp_tid_map_6290(struct hal_soc *soc,
  72. uint8_t *map,
  73. uint8_t id)
  74. {
  75. int i;
  76. uint32_t addr, cmn_reg_addr;
  77. uint32_t value = 0, regval;
  78. uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
  79. if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
  80. return;
  81. cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(
  82. SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
  83. addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
  84. SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET,
  85. id * NUM_WORDS_PER_DSCP_TID_TABLE);
  86. /* Enable read/write access */
  87. regval = HAL_REG_READ(soc, cmn_reg_addr);
  88. regval |=
  89. (1 << HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT);
  90. HAL_REG_WRITE(soc, cmn_reg_addr, regval);
  91. /* Write 8 (24 bits) DSCP-TID mappings in each iteration */
  92. for (i = 0; i < 64; i += 8) {
  93. value = (map[i] |
  94. (map[i + 1] << 0x3) |
  95. (map[i + 2] << 0x6) |
  96. (map[i + 3] << 0x9) |
  97. (map[i + 4] << 0xc) |
  98. (map[i + 5] << 0xf) |
  99. (map[i + 6] << 0x12) |
  100. (map[i + 7] << 0x15));
  101. qdf_mem_copy(&val[cnt], &value, 3);
  102. cnt += 3;
  103. }
  104. for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) {
  105. regval = *(uint32_t *)(val + i);
  106. HAL_REG_WRITE(soc, addr,
  107. (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
  108. addr += 4;
  109. }
  110. /* Disable read/write access */
  111. regval = HAL_REG_READ(soc, cmn_reg_addr);
  112. regval &=
  113. ~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK);
  114. HAL_REG_WRITE(soc, cmn_reg_addr, regval);
  115. }
  116. #else
  117. static void hal_tx_set_dscp_tid_map_6290(struct hal_soc *soc,
  118. uint8_t *map,
  119. uint8_t id)
  120. {
  121. int i;
  122. uint32_t addr;
  123. uint32_t value;
  124. if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT) {
  125. addr =
  126. HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR(
  127. SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
  128. } else {
  129. addr =
  130. HWIO_TCL_R0_DSCP_TID2_MAP_0_ADDR(
  131. SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
  132. }
  133. for (i = 0; i < 64; i += 10) {
  134. value = (map[i] |
  135. (map[i+1] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_1_SHFT) |
  136. (map[i+2] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_2_SHFT) |
  137. (map[i+3] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_3_SHFT) |
  138. (map[i+4] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_4_SHFT) |
  139. (map[i+5] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_5_SHFT) |
  140. (map[i+6] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_6_SHFT) |
  141. (map[i+7] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_7_SHFT) |
  142. (map[i+8] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_8_SHFT) |
  143. (map[i+9] << HWIO_TCL_R0_DSCP_TID1_MAP_0_DSCP_9_SHFT));
  144. HAL_REG_WRITE(soc, addr,
  145. (value & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK));
  146. addr += 4;
  147. }
  148. }
  149. #endif
  150. #ifdef QCA_WIFI_QCA6290_11AX
  151. /**
  152. * hal_tx_update_dscp_tid_6290() - Update the dscp tid map table as updated
  153. * by the user
  154. * @soc: HAL SoC context
  155. * @tid: TID
  156. * @id : MAP ID
  157. * @dscp: DSCP_TID map index
  158. *
  159. * Return: void
  160. */
  161. static void hal_tx_update_dscp_tid_6290(struct hal_soc *soc, uint8_t tid,
  162. uint8_t id, uint8_t dscp)
  163. {
  164. int index;
  165. uint32_t addr;
  166. uint32_t value;
  167. uint32_t regval;
  168. addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
  169. SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
  170. index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
  171. addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER);
  172. value = tid << (HAL_TX_BITS_PER_TID * index);
  173. regval = HAL_REG_READ(soc, addr);
  174. regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
  175. regval |= value;
  176. HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
  177. }
  178. #else
  179. static void hal_tx_update_dscp_tid_6290(struct hal_soc *soc, uint8_t tid,
  180. uint8_t id, uint8_t dscp)
  181. {
  182. int index;
  183. uint32_t addr;
  184. uint32_t value;
  185. uint32_t regval;
  186. if (id == HAL_TX_DSCP_TID_MAP_TABLE_DEFAULT)
  187. addr =
  188. HWIO_TCL_R0_DSCP_TID1_MAP_0_ADDR(
  189. SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
  190. else
  191. addr =
  192. HWIO_TCL_R0_DSCP_TID2_MAP_0_ADDR(
  193. SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
  194. index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
  195. addr += 4 * (dscp/HAL_TX_NUM_DSCP_PER_REGISTER);
  196. value = tid << (HAL_TX_BITS_PER_TID * index);
  197. /* Read back previous DSCP TID config and update
  198. * with new config.
  199. */
  200. regval = HAL_REG_READ(soc, addr);
  201. regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
  202. regval |= value;
  203. HAL_REG_WRITE(soc, addr,
  204. (regval & HWIO_TCL_R0_DSCP_TID1_MAP_1_RMSK));
  205. }
  206. #endif
  207. #ifdef QCA_WIFI_QCA6290_11AX
  208. /**
  209. * hal_tx_desc_set_lmac_id_6290() - Set the lmac_id value
  210. * @desc: Handle to Tx Descriptor
  211. * @lmac_id: mac Id to ast matching
  212. * b00 – mac 0
  213. * b01 – mac 1
  214. * b10 – mac 2
  215. * b11 – all macs (legacy HK way)
  216. *
  217. * Return: void
  218. */
  219. static void hal_tx_desc_set_lmac_id_6290(void *desc, uint8_t lmac_id)
  220. {
  221. HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |=
  222. HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id);
  223. }
  224. #else
  225. static void hal_tx_desc_set_lmac_id_6290(void *desc, uint8_t lmac_id)
  226. {
  227. }
  228. #endif
  229. /**
  230. * hal_tx_init_cmd_credit_ring_6290() - Initialize command/credit SRNG
  231. * @hal_soc_hdl: Handle to HAL SoC structure
  232. * @hal_ring_hdl: Handle to HAL SRNG structure
  233. *
  234. * Return: none
  235. */
  236. static inline void hal_tx_init_cmd_credit_ring_6290(hal_soc_handle_t hal_soc_hdl,
  237. hal_ring_handle_t hal_ring_hdl)
  238. {
  239. }