dp_li_rx.c 29 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_li_rx.h"
  24. #include "dp_peer.h"
  25. #include "hal_rx.h"
  26. #include "hal_li_rx.h"
  27. #include "hal_api.h"
  28. #include "hal_li_api.h"
  29. #include "qdf_nbuf.h"
  30. #ifdef MESH_MODE_SUPPORT
  31. #include "if_meta_hdr.h"
  32. #endif
  33. #include "dp_internal.h"
  34. #include "dp_ipa.h"
  35. #ifdef WIFI_MONITOR_SUPPORT
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #include "dp_hist.h"
  42. #include "dp_rx_buffer_pool.h"
  43. static inline
  44. bool is_sa_da_idx_valid(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  45. qdf_nbuf_t nbuf, struct hal_rx_msdu_metadata msdu_info)
  46. {
  47. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  48. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  49. (!qdf_nbuf_is_da_mcbc(nbuf) && qdf_nbuf_is_da_valid(nbuf) &&
  50. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  51. return false;
  52. return true;
  53. }
  54. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  55. #if defined(FEATURE_MCL_REPEATER) && defined(FEATURE_MEC)
  56. /**
  57. * dp_rx_mec_check_wrapper() - wrapper to dp_rx_mcast_echo_check
  58. * @soc: core DP main context
  59. * @peer: dp peer handler
  60. * @rx_tlv_hdr: start of the rx TLV header
  61. * @nbuf: pkt buffer
  62. *
  63. * Return: bool (true if it is a looped back pkt else false)
  64. */
  65. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  66. struct dp_peer *peer,
  67. uint8_t *rx_tlv_hdr,
  68. qdf_nbuf_t nbuf)
  69. {
  70. return dp_rx_mcast_echo_check(soc, peer, rx_tlv_hdr, nbuf);
  71. }
  72. #else
  73. static inline bool dp_rx_mec_check_wrapper(struct dp_soc *soc,
  74. struct dp_peer *peer,
  75. uint8_t *rx_tlv_hdr,
  76. qdf_nbuf_t nbuf)
  77. {
  78. return false;
  79. }
  80. #endif
  81. #endif
  82. #ifndef QCA_HOST_MODE_WIFI_DISABLE
  83. static bool
  84. dp_rx_intrabss_ucast_check_li(struct dp_soc *soc, qdf_nbuf_t nbuf,
  85. struct dp_peer *ta_peer,
  86. struct hal_rx_msdu_metadata *msdu_metadata,
  87. uint8_t *p_tx_vdev_id)
  88. {
  89. uint16_t da_peer_id;
  90. struct dp_peer *da_peer;
  91. struct dp_ast_entry *ast_entry;
  92. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  93. return false;
  94. ast_entry = soc->ast_table[msdu_metadata->da_idx];
  95. if (!ast_entry)
  96. return false;
  97. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  98. ast_entry->is_active = TRUE;
  99. return false;
  100. }
  101. da_peer_id = ast_entry->peer_id;
  102. /* TA peer cannot be same as peer(DA) on which AST is present
  103. * this indicates a change in topology and that AST entries
  104. * are yet to be updated.
  105. */
  106. if ((da_peer_id == ta_peer->peer_id) ||
  107. (da_peer_id == HTT_INVALID_PEER))
  108. return false;
  109. da_peer = dp_peer_get_ref_by_id(soc, da_peer_id,
  110. DP_MOD_ID_RX);
  111. if (!da_peer)
  112. return false;
  113. *p_tx_vdev_id = da_peer->vdev->vdev_id;
  114. /* If the source or destination peer in the isolation
  115. * list then dont forward instead push to bridge stack.
  116. */
  117. if (dp_get_peer_isolation(ta_peer) ||
  118. dp_get_peer_isolation(da_peer) ||
  119. (da_peer->vdev->vdev_id != ta_peer->vdev->vdev_id)) {
  120. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  121. return false;
  122. }
  123. if (da_peer->bss_peer) {
  124. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  125. return false;
  126. }
  127. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  128. return true;
  129. }
  130. /*
  131. * dp_rx_intrabss_fwd_li() - Implements the Intra-BSS forwarding logic
  132. *
  133. * @soc: core txrx main context
  134. * @ta_peer : source peer entry
  135. * @rx_tlv_hdr : start address of rx tlvs
  136. * @nbuf : nbuf that has to be intrabss forwarded
  137. *
  138. * Return: bool: true if it is forwarded else false
  139. */
  140. static bool
  141. dp_rx_intrabss_fwd_li(struct dp_soc *soc,
  142. struct dp_peer *ta_peer,
  143. uint8_t *rx_tlv_hdr,
  144. qdf_nbuf_t nbuf,
  145. struct hal_rx_msdu_metadata msdu_metadata)
  146. {
  147. uint8_t tx_vdev_id;
  148. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  149. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  150. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  151. tid_stats.tid_rx_stats[ring_id][tid];
  152. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  153. * source, then clone the pkt and send the cloned pkt for
  154. * intra BSS forwarding and original pkt up the network stack
  155. * Note: how do we handle multicast pkts. do we forward
  156. * all multicast pkts as is or let a higher layer module
  157. * like igmpsnoop decide whether to forward or not with
  158. * Mcast enhancement.
  159. */
  160. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer)
  161. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  162. nbuf, tid_stats);
  163. if (dp_rx_intrabss_ucast_check_li(soc, nbuf, ta_peer,
  164. &msdu_metadata, &tx_vdev_id))
  165. return dp_rx_intrabss_ucast_fwd(soc, ta_peer, tx_vdev_id,
  166. rx_tlv_hdr, nbuf, tid_stats);
  167. return false;
  168. }
  169. #endif
  170. /**
  171. * dp_rx_process_li() - Brain of the Rx processing functionality
  172. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  173. * @int_ctx: per interrupt context
  174. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  175. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  176. * @quota: No. of units (packets) that can be serviced in one shot.
  177. *
  178. * This function implements the core of Rx functionality. This is
  179. * expected to handle only non-error frames.
  180. *
  181. * Return: uint32_t: No. of elements processed
  182. */
  183. uint32_t dp_rx_process_li(struct dp_intr *int_ctx,
  184. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  185. uint32_t quota)
  186. {
  187. hal_ring_desc_t ring_desc;
  188. hal_ring_desc_t last_prefetched_hw_desc;
  189. hal_soc_handle_t hal_soc;
  190. struct dp_rx_desc *rx_desc = NULL;
  191. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  192. qdf_nbuf_t nbuf, next;
  193. bool near_full;
  194. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  195. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  196. uint32_t num_pending = 0;
  197. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  198. uint16_t msdu_len = 0;
  199. uint16_t peer_id;
  200. uint8_t vdev_id;
  201. struct dp_peer *peer;
  202. struct dp_vdev *vdev;
  203. uint32_t pkt_len = 0;
  204. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  205. struct hal_rx_msdu_desc_info msdu_desc_info;
  206. enum hal_reo_error_status error;
  207. uint32_t peer_mdata;
  208. uint8_t *rx_tlv_hdr;
  209. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  210. uint8_t mac_id = 0;
  211. struct dp_pdev *rx_pdev;
  212. struct dp_srng *dp_rxdma_srng;
  213. struct rx_desc_pool *rx_desc_pool;
  214. struct dp_soc *soc = int_ctx->soc;
  215. struct cdp_tid_rx_stats *tid_stats;
  216. qdf_nbuf_t nbuf_head;
  217. qdf_nbuf_t nbuf_tail;
  218. qdf_nbuf_t deliver_list_head;
  219. qdf_nbuf_t deliver_list_tail;
  220. uint32_t num_rx_bufs_reaped = 0;
  221. uint32_t intr_id;
  222. struct hif_opaque_softc *scn;
  223. int32_t tid = 0;
  224. bool is_prev_msdu_last = true;
  225. uint32_t rx_ol_pkt_cnt = 0;
  226. uint32_t num_entries = 0;
  227. struct hal_rx_msdu_metadata msdu_metadata;
  228. QDF_STATUS status;
  229. qdf_nbuf_t ebuf_head;
  230. qdf_nbuf_t ebuf_tail;
  231. uint8_t pkt_capture_offload = 0;
  232. int max_reap_limit;
  233. DP_HIST_INIT();
  234. qdf_assert_always(soc && hal_ring_hdl);
  235. hal_soc = soc->hal_soc;
  236. qdf_assert_always(hal_soc);
  237. scn = soc->hif_handle;
  238. hif_pm_runtime_mark_dp_rx_busy(scn);
  239. intr_id = int_ctx->dp_intr_id;
  240. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  241. more_data:
  242. /* reset local variables here to be re-used in the function */
  243. nbuf_head = NULL;
  244. nbuf_tail = NULL;
  245. deliver_list_head = NULL;
  246. deliver_list_tail = NULL;
  247. peer = NULL;
  248. vdev = NULL;
  249. num_rx_bufs_reaped = 0;
  250. ebuf_head = NULL;
  251. ebuf_tail = NULL;
  252. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  253. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  254. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  255. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  256. qdf_mem_zero(head, sizeof(head));
  257. qdf_mem_zero(tail, sizeof(tail));
  258. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  259. /*
  260. * Need API to convert from hal_ring pointer to
  261. * Ring Type / Ring Id combo
  262. */
  263. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  264. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  265. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  266. goto done;
  267. }
  268. if (!num_pending)
  269. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  270. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  271. if (num_pending > quota)
  272. num_pending = quota;
  273. last_prefetched_hw_desc = dp_srng_dst_prefetch(hal_soc, hal_ring_hdl,
  274. num_pending);
  275. /*
  276. * start reaping the buffers from reo ring and queue
  277. * them in per vdev queue.
  278. * Process the received pkts in a different per vdev loop.
  279. */
  280. while (qdf_likely(num_pending)) {
  281. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  282. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  283. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  284. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  285. soc, hal_ring_hdl, error);
  286. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  287. 1);
  288. /* Don't know how to deal with this -- assert */
  289. qdf_assert(0);
  290. }
  291. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  292. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  293. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  294. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  295. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  296. break;
  297. }
  298. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  299. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  300. ring_desc, rx_desc);
  301. if (QDF_IS_STATUS_ERROR(status)) {
  302. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  303. qdf_assert_always(!rx_desc->unmapped);
  304. dp_ipa_reo_ctx_buf_mapping_lock(soc,
  305. reo_ring_num);
  306. dp_ipa_handle_rx_buf_smmu_mapping(
  307. soc,
  308. rx_desc->nbuf,
  309. RX_DATA_BUFFER_SIZE,
  310. false);
  311. qdf_nbuf_unmap_nbytes_single(
  312. soc->osdev,
  313. rx_desc->nbuf,
  314. QDF_DMA_FROM_DEVICE,
  315. RX_DATA_BUFFER_SIZE);
  316. rx_desc->unmapped = 1;
  317. dp_ipa_reo_ctx_buf_mapping_unlock(soc,
  318. reo_ring_num);
  319. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  320. rx_desc->pool_id);
  321. dp_rx_add_to_free_desc_list(
  322. &head[rx_desc->pool_id],
  323. &tail[rx_desc->pool_id],
  324. rx_desc);
  325. }
  326. continue;
  327. }
  328. /*
  329. * this is a unlikely scenario where the host is reaping
  330. * a descriptor which it already reaped just a while ago
  331. * but is yet to replenish it back to HW.
  332. * In this case host will dump the last 128 descriptors
  333. * including the software descriptor rx_desc and assert.
  334. */
  335. if (qdf_unlikely(!rx_desc->in_use)) {
  336. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  337. dp_info_rl("Reaping rx_desc not in use!");
  338. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  339. ring_desc, rx_desc);
  340. /* ignore duplicate RX desc and continue to process */
  341. /* Pop out the descriptor */
  342. continue;
  343. }
  344. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  345. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  346. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  347. dp_info_rl("Nbuf sanity check failure!");
  348. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  349. ring_desc, rx_desc);
  350. rx_desc->in_err_state = 1;
  351. continue;
  352. }
  353. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  354. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  355. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  356. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  357. ring_desc, rx_desc);
  358. }
  359. /* Get MPDU DESC info */
  360. hal_rx_mpdu_desc_info_get_li(ring_desc, &mpdu_desc_info);
  361. /* Get MSDU DESC info */
  362. hal_rx_msdu_desc_info_get_li(ring_desc, &msdu_desc_info);
  363. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  364. HAL_MSDU_F_MSDU_CONTINUATION)) {
  365. /* previous msdu has end bit set, so current one is
  366. * the new MPDU
  367. */
  368. if (is_prev_msdu_last) {
  369. /* For new MPDU check if we can read complete
  370. * MPDU by comparing the number of buffers
  371. * available and number of buffers needed to
  372. * reap this MPDU
  373. */
  374. if ((msdu_desc_info.msdu_len /
  375. (RX_DATA_BUFFER_SIZE -
  376. soc->rx_pkt_tlv_size) + 1) >
  377. num_pending) {
  378. DP_STATS_INC(soc,
  379. rx.msdu_scatter_wait_break,
  380. 1);
  381. dp_rx_cookie_reset_invalid_bit(
  382. ring_desc);
  383. /* As we are going to break out of the
  384. * loop because of unavailability of
  385. * descs to form complete SG, we need to
  386. * reset the TP in the REO destination
  387. * ring.
  388. */
  389. hal_srng_dst_dec_tp(hal_soc,
  390. hal_ring_hdl);
  391. break;
  392. }
  393. is_prev_msdu_last = false;
  394. }
  395. }
  396. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  397. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  398. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  399. HAL_MPDU_F_RAW_AMPDU))
  400. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  401. if (!is_prev_msdu_last &&
  402. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  403. is_prev_msdu_last = true;
  404. rx_bufs_reaped[rx_desc->pool_id]++;
  405. peer_mdata = mpdu_desc_info.peer_meta_data;
  406. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  407. dp_rx_peer_metadata_peer_id_get_li(soc, peer_mdata);
  408. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  409. DP_PEER_METADATA_VDEV_ID_GET_LI(peer_mdata);
  410. /* to indicate whether this msdu is rx offload */
  411. pkt_capture_offload =
  412. DP_PEER_METADATA_OFFLOAD_GET_LI(peer_mdata);
  413. /*
  414. * save msdu flags first, last and continuation msdu in
  415. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  416. * length to nbuf->cb. This ensures the info required for
  417. * per pkt processing is always in the same cache line.
  418. * This helps in improving throughput for smaller pkt
  419. * sizes.
  420. */
  421. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  422. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  423. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  424. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  425. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  426. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  427. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  428. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  429. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  430. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  431. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  432. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  433. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  434. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  435. /* set reo dest indication */
  436. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  437. rx_desc->nbuf,
  438. HAL_RX_REO_MSDU_REO_DST_IND_GET(ring_desc));
  439. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  440. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  441. /*
  442. * move unmap after scattered msdu waiting break logic
  443. * in case double skb unmap happened.
  444. */
  445. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  446. dp_ipa_reo_ctx_buf_mapping_lock(soc, reo_ring_num);
  447. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  448. rx_desc_pool->buf_size,
  449. false);
  450. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  451. QDF_DMA_FROM_DEVICE,
  452. rx_desc_pool->buf_size);
  453. rx_desc->unmapped = 1;
  454. dp_ipa_reo_ctx_buf_mapping_unlock(soc, reo_ring_num);
  455. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  456. ebuf_tail, rx_desc);
  457. /*
  458. * if continuation bit is set then we have MSDU spread
  459. * across multiple buffers, let us not decrement quota
  460. * till we reap all buffers of that MSDU.
  461. */
  462. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf))) {
  463. quota -= 1;
  464. num_pending -= 1;
  465. }
  466. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  467. &tail[rx_desc->pool_id], rx_desc);
  468. num_rx_bufs_reaped++;
  469. dp_rx_prefetch_hw_sw_nbuf_desc(soc, hal_soc, num_pending,
  470. hal_ring_hdl,
  471. &last_prefetched_hw_desc,
  472. &last_prefetched_sw_desc);
  473. /*
  474. * only if complete msdu is received for scatter case,
  475. * then allow break.
  476. */
  477. if (is_prev_msdu_last &&
  478. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  479. max_reap_limit))
  480. break;
  481. }
  482. done:
  483. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  484. DP_STATS_INCC(soc,
  485. rx.ring_packets[qdf_get_smp_processor_id()][reo_ring_num],
  486. num_rx_bufs_reaped, num_rx_bufs_reaped);
  487. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  488. /*
  489. * continue with next mac_id if no pkts were reaped
  490. * from that pool
  491. */
  492. if (!rx_bufs_reaped[mac_id])
  493. continue;
  494. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  495. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  496. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  497. rx_desc_pool, rx_bufs_reaped[mac_id],
  498. &head[mac_id], &tail[mac_id]);
  499. }
  500. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  501. /* Peer can be NULL is case of LFR */
  502. if (qdf_likely(peer))
  503. vdev = NULL;
  504. /*
  505. * BIG loop where each nbuf is dequeued from global queue,
  506. * processed and queued back on a per vdev basis. These nbufs
  507. * are sent to stack as and when we run out of nbufs
  508. * or a new nbuf dequeued from global queue has a different
  509. * vdev when compared to previous nbuf.
  510. */
  511. nbuf = nbuf_head;
  512. while (nbuf) {
  513. next = nbuf->next;
  514. dp_rx_prefetch_nbuf_data(nbuf, next);
  515. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  516. nbuf = next;
  517. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  518. continue;
  519. }
  520. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  521. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  522. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  523. if (dp_rx_is_list_ready(deliver_list_head, vdev, peer,
  524. peer_id, vdev_id)) {
  525. dp_rx_deliver_to_stack(soc, vdev, peer,
  526. deliver_list_head,
  527. deliver_list_tail);
  528. deliver_list_head = NULL;
  529. deliver_list_tail = NULL;
  530. }
  531. /* Get TID from struct cb->tid_val, save to tid */
  532. if (qdf_nbuf_is_rx_chfrag_start(nbuf)) {
  533. tid = qdf_nbuf_get_tid_val(nbuf);
  534. if (tid >= CDP_MAX_DATA_TIDS) {
  535. DP_STATS_INC(soc, rx.err.rx_invalid_tid_err, 1);
  536. qdf_nbuf_free(nbuf);
  537. nbuf = next;
  538. continue;
  539. }
  540. }
  541. if (qdf_unlikely(!peer)) {
  542. peer = dp_peer_get_ref_by_id(soc, peer_id,
  543. DP_MOD_ID_RX);
  544. } else if (peer && peer->peer_id != peer_id) {
  545. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  546. peer = dp_peer_get_ref_by_id(soc, peer_id,
  547. DP_MOD_ID_RX);
  548. }
  549. if (peer) {
  550. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  551. qdf_dp_trace_set_track(nbuf, QDF_RX);
  552. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  553. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  554. QDF_NBUF_RX_PKT_DATA_TRACK;
  555. }
  556. rx_bufs_used++;
  557. if (qdf_likely(peer)) {
  558. vdev = peer->vdev;
  559. } else {
  560. nbuf->next = NULL;
  561. dp_rx_deliver_to_pkt_capture_no_peer(
  562. soc, nbuf, pkt_capture_offload);
  563. if (!pkt_capture_offload)
  564. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  565. nbuf = next;
  566. continue;
  567. }
  568. if (qdf_unlikely(!vdev)) {
  569. qdf_nbuf_free(nbuf);
  570. nbuf = next;
  571. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  572. continue;
  573. }
  574. /* when hlos tid override is enabled, save tid in
  575. * skb->priority
  576. */
  577. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  578. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  579. qdf_nbuf_set_priority(nbuf, tid);
  580. rx_pdev = vdev->pdev;
  581. DP_RX_TID_SAVE(nbuf, tid);
  582. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  583. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  584. soc->wlan_cfg_ctx)))
  585. qdf_nbuf_set_timestamp(nbuf);
  586. tid_stats =
  587. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  588. /*
  589. * Check if DMA completed -- msdu_done is the last bit
  590. * to be written
  591. */
  592. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(nbuf))) {
  593. if (qdf_unlikely(!hal_rx_attn_msdu_done_get_li(
  594. rx_tlv_hdr))) {
  595. dp_err_rl("MSDU DONE failure");
  596. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  597. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  598. QDF_TRACE_LEVEL_INFO);
  599. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  600. qdf_assert(0);
  601. qdf_nbuf_free(nbuf);
  602. nbuf = next;
  603. continue;
  604. } else if (qdf_unlikely(hal_rx_attn_msdu_len_err_get_li(
  605. rx_tlv_hdr))) {
  606. DP_STATS_INC(soc, rx.err.msdu_len_err, 1);
  607. qdf_nbuf_free(nbuf);
  608. nbuf = next;
  609. continue;
  610. }
  611. }
  612. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  613. /*
  614. * First IF condition:
  615. * 802.11 Fragmented pkts are reinjected to REO
  616. * HW block as SG pkts and for these pkts we only
  617. * need to pull the RX TLVS header length.
  618. * Second IF condition:
  619. * The below condition happens when an MSDU is spread
  620. * across multiple buffers. This can happen in two cases
  621. * 1. The nbuf size is smaller then the received msdu.
  622. * ex: we have set the nbuf size to 2048 during
  623. * nbuf_alloc. but we received an msdu which is
  624. * 2304 bytes in size then this msdu is spread
  625. * across 2 nbufs.
  626. *
  627. * 2. AMSDUs when RAW mode is enabled.
  628. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  629. * across 1st nbuf and 2nd nbuf and last MSDU is
  630. * spread across 2nd nbuf and 3rd nbuf.
  631. *
  632. * for these scenarios let us create a skb frag_list and
  633. * append these buffers till the last MSDU of the AMSDU
  634. * Third condition:
  635. * This is the most likely case, we receive 802.3 pkts
  636. * decapsulated by HW, here we need to set the pkt length.
  637. */
  638. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  639. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  640. bool is_mcbc, is_sa_vld, is_da_vld;
  641. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  642. rx_tlv_hdr);
  643. is_sa_vld =
  644. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  645. rx_tlv_hdr);
  646. is_da_vld =
  647. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  648. rx_tlv_hdr);
  649. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  650. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  651. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  652. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  653. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  654. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  655. nbuf = dp_rx_sg_create(soc, nbuf);
  656. next = nbuf->next;
  657. if (qdf_nbuf_is_raw_frame(nbuf)) {
  658. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  659. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  660. } else {
  661. qdf_nbuf_free(nbuf);
  662. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  663. dp_info_rl("scatter msdu len %d, dropped",
  664. msdu_len);
  665. nbuf = next;
  666. continue;
  667. }
  668. } else {
  669. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  670. pkt_len = msdu_len +
  671. msdu_metadata.l3_hdr_pad +
  672. soc->rx_pkt_tlv_size;
  673. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  674. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  675. }
  676. /*
  677. * process frame for mulitpass phrase processing
  678. */
  679. if (qdf_unlikely(vdev->multipass_en)) {
  680. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  681. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  682. qdf_nbuf_free(nbuf);
  683. nbuf = next;
  684. continue;
  685. }
  686. }
  687. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  688. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  689. DP_STATS_INC(peer, rx.policy_check_drop, 1);
  690. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  691. /* Drop & free packet */
  692. qdf_nbuf_free(nbuf);
  693. /* Statistics */
  694. nbuf = next;
  695. continue;
  696. }
  697. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  698. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  699. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  700. rx_tlv_hdr) ==
  701. false))) {
  702. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  703. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  704. qdf_nbuf_free(nbuf);
  705. nbuf = next;
  706. continue;
  707. }
  708. /*
  709. * Drop non-EAPOL frames from unauthorized peer.
  710. */
  711. if (qdf_likely(peer) && qdf_unlikely(!peer->authorize) &&
  712. !qdf_nbuf_is_raw_frame(nbuf)) {
  713. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  714. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  715. if (!is_eapol) {
  716. DP_STATS_INC(peer,
  717. rx.peer_unauth_rx_pkt_drop, 1);
  718. qdf_nbuf_free(nbuf);
  719. nbuf = next;
  720. continue;
  721. }
  722. }
  723. if (soc->process_rx_status)
  724. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  725. /* Update the protocol tag in SKB based on CCE metadata */
  726. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  727. reo_ring_num, false, true);
  728. /* Update the flow tag in SKB based on FSE metadata */
  729. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  730. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  731. reo_ring_num, tid_stats);
  732. if (qdf_unlikely(vdev->mesh_vdev)) {
  733. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  734. == QDF_STATUS_SUCCESS) {
  735. dp_rx_info("%pK: mesh pkt filtered", soc);
  736. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  737. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  738. 1);
  739. qdf_nbuf_free(nbuf);
  740. nbuf = next;
  741. continue;
  742. }
  743. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  744. }
  745. if (qdf_likely(vdev->rx_decap_type ==
  746. htt_cmn_pkt_type_ethernet) &&
  747. qdf_likely(!vdev->mesh_vdev)) {
  748. /* WDS Destination Address Learning */
  749. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  750. /* Due to HW issue, sometimes we see that the sa_idx
  751. * and da_idx are invalid with sa_valid and da_valid
  752. * bits set
  753. *
  754. * in this case we also see that value of
  755. * sa_sw_peer_id is set as 0
  756. *
  757. * Drop the packet if sa_idx and da_idx OOB or
  758. * sa_sw_peerid is 0
  759. */
  760. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  761. msdu_metadata)) {
  762. qdf_nbuf_free(nbuf);
  763. nbuf = next;
  764. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  765. continue;
  766. }
  767. if (qdf_unlikely(dp_rx_mec_check_wrapper(soc,
  768. peer,
  769. rx_tlv_hdr,
  770. nbuf))) {
  771. /* this is a looped back MCBC pkt,drop it */
  772. DP_STATS_INC_PKT(peer, rx.mec_drop, 1,
  773. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  774. qdf_nbuf_free(nbuf);
  775. nbuf = next;
  776. continue;
  777. }
  778. /* WDS Source Port Learning */
  779. if (qdf_likely(vdev->wds_enabled))
  780. dp_rx_wds_srcport_learn(soc,
  781. rx_tlv_hdr,
  782. peer,
  783. nbuf,
  784. msdu_metadata);
  785. /* Intrabss-fwd */
  786. if (dp_rx_check_ap_bridge(vdev))
  787. if (dp_rx_intrabss_fwd_li(soc, peer, rx_tlv_hdr,
  788. nbuf,
  789. msdu_metadata)) {
  790. nbuf = next;
  791. tid_stats->intrabss_cnt++;
  792. continue; /* Get next desc */
  793. }
  794. }
  795. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  796. dp_rx_update_stats(soc, nbuf);
  797. DP_RX_LIST_APPEND(deliver_list_head,
  798. deliver_list_tail,
  799. nbuf);
  800. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  801. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  802. if (qdf_unlikely(peer->in_twt))
  803. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  804. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  805. tid_stats->delivered_to_stack++;
  806. nbuf = next;
  807. }
  808. if (qdf_likely(deliver_list_head)) {
  809. if (qdf_likely(peer)) {
  810. dp_rx_deliver_to_pkt_capture(soc, vdev->pdev, peer_id,
  811. pkt_capture_offload,
  812. deliver_list_head);
  813. if (!pkt_capture_offload)
  814. dp_rx_deliver_to_stack(soc, vdev, peer,
  815. deliver_list_head,
  816. deliver_list_tail);
  817. } else {
  818. nbuf = deliver_list_head;
  819. while (nbuf) {
  820. next = nbuf->next;
  821. nbuf->next = NULL;
  822. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  823. nbuf = next;
  824. }
  825. }
  826. }
  827. if (qdf_likely(peer))
  828. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  829. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  830. if (quota) {
  831. num_pending =
  832. dp_rx_srng_get_num_pending(hal_soc,
  833. hal_ring_hdl,
  834. num_entries,
  835. &near_full);
  836. if (num_pending) {
  837. DP_STATS_INC(soc, rx.hp_oos2, 1);
  838. if (!hif_exec_should_yield(scn, intr_id))
  839. goto more_data;
  840. if (qdf_unlikely(near_full)) {
  841. DP_STATS_INC(soc, rx.near_full, 1);
  842. goto more_data;
  843. }
  844. }
  845. }
  846. if (vdev && vdev->osif_fisa_flush)
  847. vdev->osif_fisa_flush(soc, reo_ring_num);
  848. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  849. vdev->osif_gro_flush(vdev->osif_vdev,
  850. reo_ring_num);
  851. }
  852. }
  853. /* Update histogram statistics by looping through pdev's */
  854. DP_RX_HIST_STATS_PER_PDEV();
  855. return rx_bufs_used; /* Assume no scale factor for now */
  856. }
  857. QDF_STATUS dp_rx_desc_pool_init_li(struct dp_soc *soc,
  858. struct rx_desc_pool *rx_desc_pool,
  859. uint32_t pool_id)
  860. {
  861. return dp_rx_desc_pool_init_generic(soc, rx_desc_pool, pool_id);
  862. }
  863. void dp_rx_desc_pool_deinit_li(struct dp_soc *soc,
  864. struct rx_desc_pool *rx_desc_pool,
  865. uint32_t pool_id)
  866. {
  867. }
  868. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_li(
  869. struct dp_soc *soc,
  870. void *ring_desc,
  871. struct dp_rx_desc **r_rx_desc)
  872. {
  873. struct hal_buf_info buf_info = {0};
  874. hal_soc_handle_t hal_soc = soc->hal_soc;
  875. /* only cookie and rbm will be valid in buf_info */
  876. hal_rx_buf_cookie_rbm_get(hal_soc, (uint32_t *)ring_desc,
  877. &buf_info);
  878. if (qdf_unlikely(buf_info.rbm !=
  879. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id))) {
  880. /* TODO */
  881. /* Call appropriate handler */
  882. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  883. dp_rx_err("%pK: Invalid RBM %d", soc, buf_info.rbm);
  884. return QDF_STATUS_E_INVAL;
  885. }
  886. *r_rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, buf_info.sw_cookie);
  887. return QDF_STATUS_SUCCESS;
  888. }