sde_power_handle.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2014-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s:%d]: " fmt, __func__, __LINE__
  6. #include <linux/clk.h>
  7. #include <linux/kernel.h>
  8. #include <linux/of.h>
  9. #include <linux/string.h>
  10. #include <linux/of_address.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/sde_io_util.h>
  15. #include <linux/sde_rsc.h>
  16. #include "sde_power_handle.h"
  17. #include "sde_trace.h"
  18. #include "sde_dbg.h"
  19. static const struct sde_power_bus_scaling_data sde_reg_bus_table[] = {
  20. {0, 0},
  21. {0, 76800},
  22. {0, 150000},
  23. {0, 300000},
  24. };
  25. static const char *data_bus_name[SDE_POWER_HANDLE_DBUS_ID_MAX] = {
  26. [SDE_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,sde-data-bus",
  27. [SDE_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,sde-llcc-bus",
  28. [SDE_POWER_HANDLE_DBUS_ID_EBI] = "qcom,sde-ebi-bus",
  29. };
  30. const char *sde_power_handle_get_dbus_name(u32 bus_id)
  31. {
  32. if (bus_id < SDE_POWER_HANDLE_DBUS_ID_MAX)
  33. return data_bus_name[bus_id];
  34. return NULL;
  35. }
  36. static void sde_power_event_trigger_locked(struct sde_power_handle *phandle,
  37. u32 event_type)
  38. {
  39. struct sde_power_event *event;
  40. list_for_each_entry(event, &phandle->event_list, list) {
  41. if (event->event_type & event_type) {
  42. event->cb_fnc(event_type, event->usr);
  43. phandle->last_event_handled = event_type;
  44. }
  45. }
  46. }
  47. static inline void sde_power_rsc_client_init(struct sde_power_handle *phandle)
  48. {
  49. /* creates the rsc client */
  50. if (!phandle->rsc_client_init) {
  51. phandle->rsc_client = sde_rsc_client_create(SDE_RSC_INDEX,
  52. "sde_power_handle", SDE_RSC_CLK_CLIENT, 0);
  53. if (IS_ERR_OR_NULL(phandle->rsc_client)) {
  54. pr_debug("sde rsc client create failed :%ld\n",
  55. PTR_ERR(phandle->rsc_client));
  56. phandle->rsc_client = NULL;
  57. }
  58. phandle->rsc_client_init = true;
  59. }
  60. }
  61. static int sde_power_rsc_update(struct sde_power_handle *phandle, bool enable)
  62. {
  63. u32 rsc_state;
  64. int ret = 0;
  65. rsc_state = enable ? SDE_RSC_CLK_STATE : SDE_RSC_IDLE_STATE;
  66. if (phandle->rsc_client)
  67. ret = sde_rsc_client_state_update(phandle->rsc_client,
  68. rsc_state, NULL, SDE_RSC_INVALID_CRTC_ID, NULL);
  69. return ret;
  70. }
  71. static int sde_power_parse_dt_supply(struct platform_device *pdev,
  72. struct dss_module_power *mp)
  73. {
  74. int i = 0, rc = 0;
  75. u32 tmp = 0;
  76. struct device_node *of_node = NULL, *supply_root_node = NULL;
  77. struct device_node *supply_node = NULL;
  78. if (!pdev || !mp) {
  79. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  80. return -EINVAL;
  81. }
  82. of_node = pdev->dev.of_node;
  83. mp->num_vreg = 0;
  84. supply_root_node = of_get_child_by_name(of_node,
  85. "qcom,platform-supply-entries");
  86. if (!supply_root_node) {
  87. pr_debug("no supply entry present\n");
  88. return rc;
  89. }
  90. for_each_child_of_node(supply_root_node, supply_node)
  91. mp->num_vreg++;
  92. if (mp->num_vreg == 0) {
  93. pr_debug("no vreg\n");
  94. return rc;
  95. }
  96. pr_debug("vreg found. count=%d\n", mp->num_vreg);
  97. mp->vreg_config = devm_kzalloc(&pdev->dev, sizeof(struct dss_vreg) *
  98. mp->num_vreg, GFP_KERNEL);
  99. if (!mp->vreg_config) {
  100. rc = -ENOMEM;
  101. return rc;
  102. }
  103. for_each_child_of_node(supply_root_node, supply_node) {
  104. const char *st = NULL;
  105. rc = of_property_read_string(supply_node,
  106. "qcom,supply-name", &st);
  107. if (rc) {
  108. pr_err("error reading name. rc=%d\n", rc);
  109. goto error;
  110. }
  111. strlcpy(mp->vreg_config[i].vreg_name, st,
  112. sizeof(mp->vreg_config[i].vreg_name));
  113. rc = of_property_read_u32(supply_node,
  114. "qcom,supply-min-voltage", &tmp);
  115. if (rc) {
  116. pr_err("error reading min volt. rc=%d\n", rc);
  117. goto error;
  118. }
  119. mp->vreg_config[i].min_voltage = tmp;
  120. rc = of_property_read_u32(supply_node,
  121. "qcom,supply-max-voltage", &tmp);
  122. if (rc) {
  123. pr_err("error reading max volt. rc=%d\n", rc);
  124. goto error;
  125. }
  126. mp->vreg_config[i].max_voltage = tmp;
  127. rc = of_property_read_u32(supply_node,
  128. "qcom,supply-enable-load", &tmp);
  129. if (rc) {
  130. pr_err("error reading enable load. rc=%d\n", rc);
  131. goto error;
  132. }
  133. mp->vreg_config[i].enable_load = tmp;
  134. rc = of_property_read_u32(supply_node,
  135. "qcom,supply-disable-load", &tmp);
  136. if (rc) {
  137. pr_err("error reading disable load. rc=%d\n", rc);
  138. goto error;
  139. }
  140. mp->vreg_config[i].disable_load = tmp;
  141. rc = of_property_read_u32(supply_node,
  142. "qcom,supply-pre-on-sleep", &tmp);
  143. if (rc)
  144. pr_debug("error reading supply pre sleep value. rc=%d\n",
  145. rc);
  146. mp->vreg_config[i].pre_on_sleep = (!rc ? tmp : 0);
  147. rc = of_property_read_u32(supply_node,
  148. "qcom,supply-pre-off-sleep", &tmp);
  149. if (rc)
  150. pr_debug("error reading supply pre sleep value. rc=%d\n",
  151. rc);
  152. mp->vreg_config[i].pre_off_sleep = (!rc ? tmp : 0);
  153. rc = of_property_read_u32(supply_node,
  154. "qcom,supply-post-on-sleep", &tmp);
  155. if (rc)
  156. pr_debug("error reading supply post sleep value. rc=%d\n",
  157. rc);
  158. mp->vreg_config[i].post_on_sleep = (!rc ? tmp : 0);
  159. rc = of_property_read_u32(supply_node,
  160. "qcom,supply-post-off-sleep", &tmp);
  161. if (rc)
  162. pr_debug("error reading supply post sleep value. rc=%d\n",
  163. rc);
  164. mp->vreg_config[i].post_off_sleep = (!rc ? tmp : 0);
  165. pr_debug("%s min=%d, max=%d, enable=%d, disable=%d, preonsleep=%d, postonsleep=%d, preoffsleep=%d, postoffsleep=%d\n",
  166. mp->vreg_config[i].vreg_name,
  167. mp->vreg_config[i].min_voltage,
  168. mp->vreg_config[i].max_voltage,
  169. mp->vreg_config[i].enable_load,
  170. mp->vreg_config[i].disable_load,
  171. mp->vreg_config[i].pre_on_sleep,
  172. mp->vreg_config[i].post_on_sleep,
  173. mp->vreg_config[i].pre_off_sleep,
  174. mp->vreg_config[i].post_off_sleep);
  175. ++i;
  176. rc = 0;
  177. }
  178. return rc;
  179. error:
  180. if (mp->vreg_config) {
  181. devm_kfree(&pdev->dev, mp->vreg_config);
  182. mp->vreg_config = NULL;
  183. mp->num_vreg = 0;
  184. }
  185. return rc;
  186. }
  187. static int sde_power_parse_dt_clock(struct platform_device *pdev,
  188. struct dss_module_power *mp)
  189. {
  190. u32 i = 0, rc = 0;
  191. const char *clock_name;
  192. u32 clock_rate = 0;
  193. u32 clock_max_rate = 0;
  194. int num_clk = 0;
  195. if (!pdev || !mp) {
  196. pr_err("invalid input param pdev:%pK mp:%pK\n", pdev, mp);
  197. return -EINVAL;
  198. }
  199. mp->num_clk = 0;
  200. num_clk = of_property_count_strings(pdev->dev.of_node,
  201. "clock-names");
  202. if (num_clk <= 0) {
  203. pr_debug("clocks are not defined\n");
  204. goto clk_err;
  205. }
  206. mp->num_clk = num_clk;
  207. mp->clk_config = devm_kzalloc(&pdev->dev,
  208. sizeof(struct dss_clk) * num_clk, GFP_KERNEL);
  209. if (!mp->clk_config) {
  210. rc = -ENOMEM;
  211. mp->num_clk = 0;
  212. goto clk_err;
  213. }
  214. for (i = 0; i < num_clk; i++) {
  215. of_property_read_string_index(pdev->dev.of_node, "clock-names",
  216. i, &clock_name);
  217. strlcpy(mp->clk_config[i].clk_name, clock_name,
  218. sizeof(mp->clk_config[i].clk_name));
  219. of_property_read_u32_index(pdev->dev.of_node, "clock-rate",
  220. i, &clock_rate);
  221. mp->clk_config[i].rate = clock_rate;
  222. if (!clock_rate)
  223. mp->clk_config[i].type = DSS_CLK_AHB;
  224. else
  225. mp->clk_config[i].type = DSS_CLK_PCLK;
  226. clock_max_rate = 0;
  227. of_property_read_u32_index(pdev->dev.of_node, "clock-max-rate",
  228. i, &clock_max_rate);
  229. mp->clk_config[i].max_rate = clock_max_rate;
  230. }
  231. clk_err:
  232. return rc;
  233. }
  234. #define MAX_AXI_PORT_COUNT 3
  235. static int _sde_power_data_bus_set_quota(
  236. struct sde_power_data_bus_handle *pdbus,
  237. u64 in_ab_quota, u64 in_ib_quota)
  238. {
  239. int rc = 0, i = 0, j = 0;
  240. if (!pdbus->data_paths_cnt) {
  241. pr_err("invalid data bus handle\n");
  242. return -EINVAL;
  243. }
  244. pr_debug("ab=%llu ib=%llu\n", in_ab_quota, in_ib_quota);
  245. in_ab_quota = div_u64(in_ab_quota, pdbus->data_paths_cnt);
  246. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  247. for (i = 0; i < pdbus->data_paths_cnt; i++) {
  248. if (pdbus->data_bus_hdl[i]) {
  249. rc = icc_set_bw(pdbus->data_bus_hdl[i],
  250. in_ab_quota, in_ib_quota);
  251. if (rc)
  252. goto err;
  253. }
  254. }
  255. pdbus->curr_val.ab = in_ab_quota;
  256. pdbus->curr_val.ib = in_ib_quota;
  257. SDE_ATRACE_END("msm_bus_scale_req");
  258. return rc;
  259. err:
  260. for (j = 0; j < i; j++)
  261. if (pdbus->data_bus_hdl[j])
  262. icc_set_bw(pdbus->data_bus_hdl[j],
  263. pdbus->curr_val.ab,
  264. pdbus->curr_val.ib);
  265. SDE_ATRACE_END("msm_bus_scale_req");
  266. pr_err("failed to set data bus vote ab=%llu ib=%llu rc=%d\n",
  267. rc, in_ab_quota, in_ib_quota);
  268. return rc;
  269. }
  270. int sde_power_data_bus_set_quota(struct sde_power_handle *phandle,
  271. u32 bus_id, u64 ab_quota, u64 ib_quota)
  272. {
  273. int rc = 0;
  274. if (!phandle || bus_id >= SDE_POWER_HANDLE_DBUS_ID_MAX) {
  275. pr_err("invalid parameters\n");
  276. return -EINVAL;
  277. }
  278. mutex_lock(&phandle->phandle_lock);
  279. trace_sde_perf_update_bus(bus_id, ab_quota, ib_quota);
  280. if (phandle->data_bus_handle[bus_id].data_paths_cnt > 0)
  281. rc = _sde_power_data_bus_set_quota(
  282. &phandle->data_bus_handle[bus_id], ab_quota, ib_quota);
  283. mutex_unlock(&phandle->phandle_lock);
  284. return rc;
  285. }
  286. static void sde_power_data_bus_unregister(
  287. struct sde_power_data_bus_handle *pdbus)
  288. {
  289. int i = 0;
  290. for (i = 0; i < pdbus->data_paths_cnt; i++) {
  291. if (pdbus->data_bus_hdl[i]) {
  292. icc_put(pdbus->data_bus_hdl[i]);
  293. pdbus->data_bus_hdl[i] = NULL;
  294. }
  295. }
  296. }
  297. static int sde_power_data_bus_parse(struct platform_device *pdev,
  298. struct sde_power_data_bus_handle *pdbus, const char *name)
  299. {
  300. char bus_name[32];
  301. int i = 0, ret = 0;
  302. for (i = 0; i < DATA_BUS_PATH_MAX; i++) {
  303. snprintf(bus_name, sizeof(bus_name), "%s%d", name, i);
  304. ret = of_property_match_string(pdev->dev.of_node,
  305. "interconnect-names", bus_name);
  306. if (ret < 0) {
  307. if (!pdbus->data_paths_cnt) {
  308. pr_debug("sde: bus %s dt node missing\n", bus_name);
  309. return 0;
  310. } else
  311. goto end;
  312. } else
  313. pdbus->data_bus_hdl[i] = of_icc_get(&pdev->dev, bus_name);
  314. if (IS_ERR_OR_NULL(pdbus->data_bus_hdl[i])) {
  315. pr_debug("icc get path failed for %s\n", bus_name);
  316. break;
  317. }
  318. pdbus->data_paths_cnt++;
  319. }
  320. if (!pdbus->data_paths_cnt) {
  321. pr_err("get none data bus path for %s\n", name);
  322. return -EINVAL;
  323. }
  324. end:
  325. if (of_find_property(pdev->dev.of_node,
  326. "qcom,msm-bus,active-only", NULL)) {
  327. pdbus->bus_active_only = true;
  328. for (i = 0; i < pdbus->data_paths_cnt; i++) {
  329. icc_set_tag(pdbus->data_bus_hdl[i],
  330. QCOM_ICC_TAG_ACTIVE_ONLY);
  331. }
  332. }
  333. pr_debug("register %s data_bus success, path number=%d\n",
  334. name, pdbus->data_paths_cnt);
  335. return 0;
  336. }
  337. static int sde_power_reg_bus_parse(struct platform_device *pdev,
  338. struct sde_power_handle *phandle)
  339. {
  340. int rc = 0;
  341. const char *bus_name = "qcom,sde-reg-bus";
  342. /* not all clients need reg-bus, skip if not referenced for this node */
  343. rc = of_property_match_string(pdev->dev.of_node,
  344. "interconnect-names", bus_name);
  345. if (rc < 0)
  346. goto end;
  347. phandle->reg_bus_hdl = of_icc_get(&pdev->dev, bus_name);
  348. if (IS_ERR_OR_NULL(phandle->reg_bus_hdl)) {
  349. rc = PTR_ERR(phandle->reg_bus_hdl);
  350. pr_err("bus %s parsing failed, rc:%d\n", bus_name, rc);
  351. phandle->reg_bus_hdl = NULL;
  352. return rc;
  353. }
  354. end:
  355. pr_debug("bus %s dt node %s(%d), hdl is %s\n",
  356. bus_name, rc < 0 ? "missing" : "found", rc,
  357. phandle->reg_bus_hdl ? "valid" : "NULL");
  358. return 0;
  359. }
  360. static void sde_power_reg_bus_unregister(struct icc_path *reg_bus_hdl)
  361. {
  362. if (reg_bus_hdl)
  363. icc_put(reg_bus_hdl);
  364. }
  365. static int sde_power_reg_bus_update(struct icc_path *reg_bus_hdl,
  366. u32 usecase_ndx)
  367. {
  368. int rc = 0;
  369. if (reg_bus_hdl) {
  370. SDE_ATRACE_BEGIN("msm_bus_scale_req");
  371. rc = icc_set_bw(reg_bus_hdl,
  372. sde_reg_bus_table[usecase_ndx].ab,
  373. sde_reg_bus_table[usecase_ndx].ib);
  374. SDE_ATRACE_END("msm_bus_scale_req");
  375. }
  376. if (rc)
  377. pr_err("failed to set reg bus vote rc=%d\n", rc);
  378. return rc;
  379. }
  380. int sde_power_resource_init(struct platform_device *pdev,
  381. struct sde_power_handle *phandle)
  382. {
  383. int rc = 0, i;
  384. struct dss_module_power *mp;
  385. if (!phandle || !pdev) {
  386. pr_err("invalid input param\n");
  387. rc = -EINVAL;
  388. goto end;
  389. }
  390. mp = &phandle->mp;
  391. phandle->dev = &pdev->dev;
  392. rc = sde_power_parse_dt_clock(pdev, mp);
  393. if (rc) {
  394. pr_err("device clock parsing failed\n");
  395. goto end;
  396. }
  397. rc = sde_power_parse_dt_supply(pdev, mp);
  398. if (rc) {
  399. pr_err("device vreg supply parsing failed\n");
  400. goto parse_vreg_err;
  401. }
  402. rc = msm_dss_config_vreg(&pdev->dev,
  403. mp->vreg_config, mp->num_vreg, 1);
  404. if (rc) {
  405. pr_err("vreg config failed rc=%d\n", rc);
  406. goto vreg_err;
  407. }
  408. rc = msm_dss_get_clk(&pdev->dev, mp->clk_config, mp->num_clk);
  409. if (rc) {
  410. pr_err("clock get failed rc=%d\n", rc);
  411. goto clk_err;
  412. }
  413. rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk);
  414. if (rc) {
  415. pr_err("clock set rate failed rc=%d\n", rc);
  416. goto bus_err;
  417. }
  418. rc = sde_power_reg_bus_parse(pdev, phandle);
  419. if (rc) {
  420. pr_err("register bus parse failed rc=%d\n", rc);
  421. goto bus_err;
  422. }
  423. for (i = SDE_POWER_HANDLE_DBUS_ID_MNOC;
  424. i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++) {
  425. rc = sde_power_data_bus_parse(pdev,
  426. &phandle->data_bus_handle[i],
  427. data_bus_name[i]);
  428. if (rc) {
  429. pr_err("register data bus parse failed id=%d rc=%d\n",
  430. i, rc);
  431. goto data_bus_err;
  432. }
  433. }
  434. INIT_LIST_HEAD(&phandle->event_list);
  435. phandle->rsc_client = NULL;
  436. phandle->rsc_client_init = false;
  437. mutex_init(&phandle->phandle_lock);
  438. return rc;
  439. data_bus_err:
  440. for (i--; i >= 0; i--)
  441. sde_power_data_bus_unregister(&phandle->data_bus_handle[i]);
  442. sde_power_reg_bus_unregister(phandle->reg_bus_hdl);
  443. bus_err:
  444. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  445. clk_err:
  446. msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  447. vreg_err:
  448. if (mp->vreg_config)
  449. devm_kfree(&pdev->dev, mp->vreg_config);
  450. mp->num_vreg = 0;
  451. parse_vreg_err:
  452. if (mp->clk_config)
  453. devm_kfree(&pdev->dev, mp->clk_config);
  454. mp->num_clk = 0;
  455. end:
  456. return rc;
  457. }
  458. void sde_power_resource_deinit(struct platform_device *pdev,
  459. struct sde_power_handle *phandle)
  460. {
  461. struct dss_module_power *mp;
  462. struct sde_power_event *curr_event, *next_event;
  463. int i;
  464. if (!phandle || !pdev) {
  465. pr_err("invalid input param\n");
  466. return;
  467. }
  468. mp = &phandle->mp;
  469. mutex_lock(&phandle->phandle_lock);
  470. list_for_each_entry_safe(curr_event, next_event,
  471. &phandle->event_list, list) {
  472. pr_err("event:%d, client:%s still registered\n",
  473. curr_event->event_type,
  474. curr_event->client_name);
  475. curr_event->active = false;
  476. list_del(&curr_event->list);
  477. }
  478. mutex_unlock(&phandle->phandle_lock);
  479. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  480. sde_power_data_bus_unregister(&phandle->data_bus_handle[i]);
  481. sde_power_reg_bus_unregister(phandle->reg_bus_hdl);
  482. msm_dss_put_clk(mp->clk_config, mp->num_clk);
  483. msm_dss_config_vreg(&pdev->dev, mp->vreg_config, mp->num_vreg, 0);
  484. if (mp->clk_config)
  485. devm_kfree(&pdev->dev, mp->clk_config);
  486. if (mp->vreg_config)
  487. devm_kfree(&pdev->dev, mp->vreg_config);
  488. mp->num_vreg = 0;
  489. mp->num_clk = 0;
  490. if (phandle->rsc_client)
  491. sde_rsc_client_destroy(phandle->rsc_client);
  492. }
  493. int sde_power_scale_reg_bus(struct sde_power_handle *phandle,
  494. u32 usecase_ndx, bool skip_lock)
  495. {
  496. int rc = 0;
  497. if (!skip_lock)
  498. mutex_lock(&phandle->phandle_lock);
  499. pr_debug("%pS: requested:%d\n",
  500. __builtin_return_address(0), usecase_ndx);
  501. rc = sde_power_reg_bus_update(phandle->reg_bus_hdl,
  502. usecase_ndx);
  503. if (rc)
  504. pr_err("failed to set reg bus vote rc=%d\n", rc);
  505. else {
  506. phandle->reg_bus_curr_val.ab =
  507. sde_reg_bus_table[usecase_ndx].ab;
  508. phandle->reg_bus_curr_val.ib =
  509. sde_reg_bus_table[usecase_ndx].ib;
  510. phandle->current_usecase_ndx = usecase_ndx;
  511. }
  512. if (!skip_lock)
  513. mutex_unlock(&phandle->phandle_lock);
  514. return rc;
  515. }
  516. static inline bool _resource_changed(u32 current_usecase_ndx,
  517. u32 max_usecase_ndx)
  518. {
  519. WARN_ON((current_usecase_ndx >= VOTE_INDEX_MAX)
  520. || (max_usecase_ndx >= VOTE_INDEX_MAX));
  521. if (((current_usecase_ndx >= VOTE_INDEX_LOW) && /* enabled */
  522. (max_usecase_ndx == VOTE_INDEX_DISABLE)) || /* max disabled */
  523. ((current_usecase_ndx == VOTE_INDEX_DISABLE) && /* disabled */
  524. (max_usecase_ndx >= VOTE_INDEX_LOW))) /* max enabled */
  525. return true;
  526. return false;
  527. }
  528. int sde_power_resource_enable(struct sde_power_handle *phandle, bool enable)
  529. {
  530. int rc = 0, i = 0;
  531. struct dss_module_power *mp;
  532. if (!phandle) {
  533. pr_err("invalid input argument\n");
  534. return -EINVAL;
  535. }
  536. mp = &phandle->mp;
  537. mutex_lock(&phandle->phandle_lock);
  538. pr_debug("enable:%d\n", enable);
  539. SDE_ATRACE_BEGIN("sde_power_resource_enable");
  540. /* RSC client init */
  541. sde_power_rsc_client_init(phandle);
  542. if (enable) {
  543. sde_power_event_trigger_locked(phandle,
  544. SDE_POWER_EVENT_PRE_ENABLE);
  545. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX &&
  546. phandle->data_bus_handle[i].data_paths_cnt > 0; i++) {
  547. rc = _sde_power_data_bus_set_quota(
  548. &phandle->data_bus_handle[i],
  549. SDE_POWER_HANDLE_ENABLE_BUS_AB_QUOTA,
  550. SDE_POWER_HANDLE_ENABLE_BUS_IB_QUOTA);
  551. if (rc) {
  552. pr_err("failed to set data bus vote id=%d rc=%d\n",
  553. i, rc);
  554. goto vreg_err;
  555. }
  556. }
  557. rc = msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg,
  558. enable);
  559. if (rc) {
  560. pr_err("failed to enable vregs rc=%d\n", rc);
  561. goto vreg_err;
  562. }
  563. rc = sde_power_scale_reg_bus(phandle, VOTE_INDEX_LOW, true);
  564. if (rc) {
  565. pr_err("failed to set reg bus vote rc=%d\n", rc);
  566. goto reg_bus_hdl_err;
  567. }
  568. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE1);
  569. rc = sde_power_rsc_update(phandle, true);
  570. if (rc) {
  571. pr_err("failed to update rsc\n");
  572. goto rsc_err;
  573. }
  574. rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  575. if (rc) {
  576. pr_err("clock enable failed rc:%d\n", rc);
  577. goto clk_err;
  578. }
  579. sde_power_event_trigger_locked(phandle,
  580. SDE_POWER_EVENT_POST_ENABLE);
  581. } else {
  582. sde_power_event_trigger_locked(phandle,
  583. SDE_POWER_EVENT_PRE_DISABLE);
  584. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_CASE2);
  585. sde_power_rsc_update(phandle, false);
  586. msm_dss_enable_clk(mp->clk_config, mp->num_clk, enable);
  587. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  588. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, enable);
  589. for (i = SDE_POWER_HANDLE_DBUS_ID_MAX - 1; i >= 0; i--)
  590. if (phandle->data_bus_handle[i].data_paths_cnt > 0)
  591. _sde_power_data_bus_set_quota(
  592. &phandle->data_bus_handle[i],
  593. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  594. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  595. sde_power_event_trigger_locked(phandle,
  596. SDE_POWER_EVENT_POST_DISABLE);
  597. }
  598. SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_EXIT);
  599. SDE_ATRACE_END("sde_power_resource_enable");
  600. mutex_unlock(&phandle->phandle_lock);
  601. return rc;
  602. clk_err:
  603. sde_power_rsc_update(phandle, false);
  604. rsc_err:
  605. sde_power_scale_reg_bus(phandle, VOTE_INDEX_DISABLE, true);
  606. reg_bus_hdl_err:
  607. msm_dss_enable_vreg(mp->vreg_config, mp->num_vreg, 0);
  608. vreg_err:
  609. for (i-- ; i >= 0 && phandle->data_bus_handle[i].data_paths_cnt > 0; i--)
  610. _sde_power_data_bus_set_quota(
  611. &phandle->data_bus_handle[i],
  612. SDE_POWER_HANDLE_DISABLE_BUS_AB_QUOTA,
  613. SDE_POWER_HANDLE_DISABLE_BUS_IB_QUOTA);
  614. SDE_ATRACE_END("sde_power_resource_enable");
  615. mutex_unlock(&phandle->phandle_lock);
  616. return rc;
  617. }
  618. int sde_power_clk_set_rate(struct sde_power_handle *phandle, char *clock_name,
  619. u64 rate)
  620. {
  621. int i, rc = -EINVAL;
  622. struct dss_module_power *mp;
  623. if (!phandle) {
  624. pr_err("invalid input power handle\n");
  625. return -EINVAL;
  626. }
  627. mutex_lock(&phandle->phandle_lock);
  628. if (phandle->last_event_handled & SDE_POWER_EVENT_POST_DISABLE) {
  629. pr_debug("invalid power state %u\n",
  630. phandle->last_event_handled);
  631. mutex_unlock(&phandle->phandle_lock);
  632. return -EINVAL;
  633. }
  634. mp = &phandle->mp;
  635. for (i = 0; i < mp->num_clk; i++) {
  636. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  637. if (mp->clk_config[i].max_rate &&
  638. (rate > mp->clk_config[i].max_rate))
  639. rate = mp->clk_config[i].max_rate;
  640. mp->clk_config[i].rate = rate;
  641. rc = msm_dss_single_clk_set_rate(&mp->clk_config[i]);
  642. break;
  643. }
  644. }
  645. mutex_unlock(&phandle->phandle_lock);
  646. return rc;
  647. }
  648. u64 sde_power_clk_get_rate(struct sde_power_handle *phandle, char *clock_name)
  649. {
  650. int i;
  651. struct dss_module_power *mp;
  652. u64 rate = -EINVAL;
  653. if (!phandle) {
  654. pr_err("invalid input power handle\n");
  655. return -EINVAL;
  656. }
  657. mp = &phandle->mp;
  658. for (i = 0; i < mp->num_clk; i++) {
  659. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  660. rate = clk_get_rate(mp->clk_config[i].clk);
  661. break;
  662. }
  663. }
  664. return rate;
  665. }
  666. u64 sde_power_clk_get_max_rate(struct sde_power_handle *phandle,
  667. char *clock_name)
  668. {
  669. int i;
  670. struct dss_module_power *mp;
  671. u64 rate = 0;
  672. if (!phandle) {
  673. pr_err("invalid input power handle\n");
  674. return 0;
  675. }
  676. mp = &phandle->mp;
  677. for (i = 0; i < mp->num_clk; i++) {
  678. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  679. rate = mp->clk_config[i].max_rate;
  680. break;
  681. }
  682. }
  683. return rate;
  684. }
  685. struct clk *sde_power_clk_get_clk(struct sde_power_handle *phandle,
  686. char *clock_name)
  687. {
  688. int i;
  689. struct dss_module_power *mp;
  690. struct clk *clk = NULL;
  691. if (!phandle) {
  692. pr_err("invalid input power handle\n");
  693. return 0;
  694. }
  695. mp = &phandle->mp;
  696. for (i = 0; i < mp->num_clk; i++) {
  697. if (!strcmp(mp->clk_config[i].clk_name, clock_name)) {
  698. clk = mp->clk_config[i].clk;
  699. break;
  700. }
  701. }
  702. return clk;
  703. }
  704. struct sde_power_event *sde_power_handle_register_event(
  705. struct sde_power_handle *phandle,
  706. u32 event_type, void (*cb_fnc)(u32 event_type, void *usr),
  707. void *usr, char *client_name)
  708. {
  709. struct sde_power_event *event;
  710. if (!phandle) {
  711. pr_err("invalid power handle\n");
  712. return ERR_PTR(-EINVAL);
  713. } else if (!cb_fnc || !event_type) {
  714. pr_err("no callback fnc or event type\n");
  715. return ERR_PTR(-EINVAL);
  716. }
  717. event = kzalloc(sizeof(struct sde_power_event), GFP_KERNEL);
  718. if (!event)
  719. return ERR_PTR(-ENOMEM);
  720. event->event_type = event_type;
  721. event->cb_fnc = cb_fnc;
  722. event->usr = usr;
  723. strlcpy(event->client_name, client_name, MAX_CLIENT_NAME_LEN);
  724. event->active = true;
  725. mutex_lock(&phandle->phandle_lock);
  726. list_add(&event->list, &phandle->event_list);
  727. mutex_unlock(&phandle->phandle_lock);
  728. return event;
  729. }
  730. void sde_power_handle_unregister_event(
  731. struct sde_power_handle *phandle,
  732. struct sde_power_event *event)
  733. {
  734. if (!phandle || !event) {
  735. pr_err("invalid phandle or event\n");
  736. } else if (!event->active) {
  737. pr_err("power handle deinit already done\n");
  738. kfree(event);
  739. } else {
  740. mutex_lock(&phandle->phandle_lock);
  741. list_del_init(&event->list);
  742. mutex_unlock(&phandle->phandle_lock);
  743. kfree(event);
  744. }
  745. }