sde_plane.c 126 KB

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  1. /*
  2. * Copyright (C) 2014-2020 The Linux Foundation. All rights reserved.
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <[email protected]>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published by
  8. * the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
  19. #include <linux/debugfs.h>
  20. #include <linux/dma-buf.h>
  21. #include <drm/sde_drm.h>
  22. #include <drm/msm_drm_pp.h>
  23. #include "msm_prop.h"
  24. #include "msm_drv.h"
  25. #include "sde_kms.h"
  26. #include "sde_fence.h"
  27. #include "sde_formats.h"
  28. #include "sde_hw_sspp.h"
  29. #include "sde_hw_catalog_format.h"
  30. #include "sde_trace.h"
  31. #include "sde_crtc.h"
  32. #include "sde_vbif.h"
  33. #include "sde_plane.h"
  34. #include "sde_color_processing.h"
  35. #define SDE_DEBUG_PLANE(pl, fmt, ...) SDE_DEBUG("plane%d " fmt,\
  36. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  37. #define SDE_ERROR_PLANE(pl, fmt, ...) SDE_ERROR("plane%d " fmt,\
  38. (pl) ? (pl)->base.base.id : -1, ##__VA_ARGS__)
  39. #define DECIMATED_DIMENSION(dim, deci) (((dim) + ((1 << (deci)) - 1)) >> (deci))
  40. #define PHASE_STEP_SHIFT 21
  41. #define PHASE_STEP_UNIT_SCALE ((int) (1 << PHASE_STEP_SHIFT))
  42. #define PHASE_RESIDUAL 15
  43. #define SHARP_STRENGTH_DEFAULT 32
  44. #define SHARP_EDGE_THR_DEFAULT 112
  45. #define SHARP_SMOOTH_THR_DEFAULT 8
  46. #define SHARP_NOISE_THR_DEFAULT 2
  47. #define SDE_NAME_SIZE 12
  48. #define SDE_PLANE_COLOR_FILL_FLAG BIT(31)
  49. #define TIME_MULTIPLEX_RECT(r0, r1, buffer_lines) \
  50. ((r0).y >= ((r1).y + (r1).h + buffer_lines))
  51. /* multirect rect index */
  52. enum {
  53. R0,
  54. R1,
  55. R_MAX
  56. };
  57. #define SDE_QSEED_DEFAULT_DYN_EXP 0x0
  58. #define DEFAULT_REFRESH_RATE 60
  59. /**
  60. * enum sde_plane_qos - Different qos configurations for each pipe
  61. *
  62. * @SDE_PLANE_QOS_VBLANK_CTRL: Setup VBLANK qos for the pipe.
  63. * @SDE_PLANE_QOS_VBLANK_AMORTIZE: Enables Amortization within pipe.
  64. * this configuration is mutually exclusive from VBLANK_CTRL.
  65. * @SDE_PLANE_QOS_PANIC_CTRL: Setup panic for the pipe.
  66. */
  67. enum sde_plane_qos {
  68. SDE_PLANE_QOS_VBLANK_CTRL = BIT(0),
  69. SDE_PLANE_QOS_VBLANK_AMORTIZE = BIT(1),
  70. SDE_PLANE_QOS_PANIC_CTRL = BIT(2),
  71. };
  72. /*
  73. * struct sde_plane - local sde plane structure
  74. * @aspace: address space pointer
  75. * @csc_cfg: Decoded user configuration for csc
  76. * @csc_usr_ptr: Points to csc_cfg if valid user config available
  77. * @csc_ptr: Points to sde_csc_cfg structure to use for current
  78. * @mplane_list: List of multirect planes of the same pipe
  79. * @catalog: Points to sde catalog structure
  80. * @revalidate: force revalidation of all the plane properties
  81. * @xin_halt_forced_clk: whether or not clocks were forced on for xin halt
  82. * @blob_rot_caps: Pointer to rotator capability blob
  83. */
  84. struct sde_plane {
  85. struct drm_plane base;
  86. struct mutex lock;
  87. enum sde_sspp pipe;
  88. uint32_t features; /* capabilities from catalog */
  89. uint32_t perf_features; /* perf capabilities from catalog */
  90. uint32_t nformats;
  91. uint32_t formats[64];
  92. struct sde_hw_pipe *pipe_hw;
  93. struct sde_hw_pipe_cfg pipe_cfg;
  94. struct sde_hw_sharp_cfg sharp_cfg;
  95. struct sde_hw_pipe_qos_cfg pipe_qos_cfg;
  96. struct sde_vbif_set_qos_params cached_qos_params;
  97. uint32_t color_fill;
  98. bool is_error;
  99. bool is_rt_pipe;
  100. bool is_virtual;
  101. struct list_head mplane_list;
  102. struct sde_mdss_cfg *catalog;
  103. bool revalidate;
  104. bool xin_halt_forced_clk;
  105. struct sde_csc_cfg csc_cfg;
  106. struct sde_csc_cfg *csc_usr_ptr;
  107. struct sde_csc_cfg *csc_ptr;
  108. const struct sde_sspp_sub_blks *pipe_sblk;
  109. char pipe_name[SDE_NAME_SIZE];
  110. struct msm_property_info property_info;
  111. struct msm_property_data property_data[PLANE_PROP_COUNT];
  112. struct drm_property_blob *blob_info;
  113. struct drm_property_blob *blob_rot_caps;
  114. /* debugfs related stuff */
  115. struct dentry *debugfs_root;
  116. bool debugfs_default_scale;
  117. };
  118. #define to_sde_plane(x) container_of(x, struct sde_plane, base)
  119. static int plane_prop_array[PLANE_PROP_COUNT] = {SDE_PLANE_DIRTY_ALL};
  120. static struct sde_kms *_sde_plane_get_kms(struct drm_plane *plane)
  121. {
  122. struct msm_drm_private *priv;
  123. if (!plane || !plane->dev)
  124. return NULL;
  125. priv = plane->dev->dev_private;
  126. if (!priv)
  127. return NULL;
  128. return to_sde_kms(priv->kms);
  129. }
  130. static struct sde_hw_ctl *_sde_plane_get_hw_ctl(const struct drm_plane *plane)
  131. {
  132. struct drm_plane_state *pstate = NULL;
  133. struct drm_crtc *drm_crtc = NULL;
  134. struct sde_crtc *sde_crtc = NULL;
  135. struct sde_crtc_mixer *mixer = NULL;
  136. struct sde_hw_ctl *ctl = NULL;
  137. if (!plane) {
  138. DRM_ERROR("Invalid plane %pK\n", plane);
  139. return NULL;
  140. }
  141. pstate = plane->state;
  142. if (!pstate) {
  143. DRM_ERROR("Invalid plane state %pK\n", pstate);
  144. return NULL;
  145. }
  146. drm_crtc = pstate->crtc;
  147. if (!drm_crtc) {
  148. DRM_ERROR("Invalid drm_crtc %pK\n", drm_crtc);
  149. return NULL;
  150. }
  151. sde_crtc = to_sde_crtc(drm_crtc);
  152. if (!sde_crtc) {
  153. DRM_ERROR("invalid sde_crtc %pK\n", sde_crtc);
  154. return NULL;
  155. }
  156. /* it will always return the first mixer and single CTL */
  157. mixer = sde_crtc->mixers;
  158. if (!mixer) {
  159. DRM_ERROR("invalid mixer %pK\n", mixer);
  160. return NULL;
  161. }
  162. ctl = mixer->hw_ctl;
  163. if (!mixer) {
  164. DRM_ERROR("invalid ctl %pK\n", ctl);
  165. return NULL;
  166. }
  167. return ctl;
  168. }
  169. static bool sde_plane_enabled(const struct drm_plane_state *state)
  170. {
  171. return state && state->fb && state->crtc;
  172. }
  173. bool sde_plane_is_sec_ui_allowed(struct drm_plane *plane)
  174. {
  175. struct sde_plane *psde;
  176. if (!plane)
  177. return false;
  178. psde = to_sde_plane(plane);
  179. return !(psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI));
  180. }
  181. void sde_plane_setup_src_split_order(struct drm_plane *plane,
  182. enum sde_sspp_multirect_index rect_mode, bool enable)
  183. {
  184. struct sde_plane *psde;
  185. if (!plane)
  186. return;
  187. psde = to_sde_plane(plane);
  188. if (psde->pipe_hw->ops.set_src_split_order)
  189. psde->pipe_hw->ops.set_src_split_order(psde->pipe_hw,
  190. rect_mode, enable);
  191. }
  192. /**
  193. * _sde_plane_set_qos_lut - set danger, safe and creq LUT of the given plane
  194. * @plane: Pointer to drm plane
  195. * @crtc: Pointer to drm crtc to find refresh rate on mode
  196. * @fb: Pointer to framebuffer associated with the given plane
  197. */
  198. static void _sde_plane_set_qos_lut(struct drm_plane *plane,
  199. struct drm_crtc *crtc,
  200. struct drm_framebuffer *fb)
  201. {
  202. struct sde_plane *psde;
  203. const struct sde_format *fmt = NULL;
  204. u32 frame_rate, qos_count, fps_index = 0, lut_index, index;
  205. struct sde_perf_cfg *perf;
  206. struct sde_plane_state *pstate;
  207. if (!plane || !fb) {
  208. SDE_ERROR("invalid arguments\n");
  209. return;
  210. }
  211. psde = to_sde_plane(plane);
  212. pstate = to_sde_plane_state(plane->state);
  213. if (!psde->pipe_hw || !psde->pipe_sblk || !psde->catalog) {
  214. SDE_ERROR("invalid arguments\n");
  215. return;
  216. } else if (!psde->pipe_hw->ops.setup_qos_lut) {
  217. return;
  218. }
  219. frame_rate = crtc->mode.vrefresh;
  220. perf = &psde->catalog->perf;
  221. qos_count = perf->qos_refresh_count;
  222. while (qos_count && perf->qos_refresh_rate) {
  223. if (frame_rate >= perf->qos_refresh_rate[qos_count - 1]) {
  224. fps_index = qos_count - 1;
  225. break;
  226. }
  227. qos_count--;
  228. }
  229. if (!psde->is_rt_pipe) {
  230. lut_index = SDE_QOS_LUT_USAGE_NRT;
  231. } else {
  232. fmt = sde_get_sde_format_ext(
  233. fb->format->format,
  234. fb->modifier);
  235. if (fmt && SDE_FORMAT_IS_LINEAR(fmt) &&
  236. pstate->scaler3_cfg.enable)
  237. lut_index = SDE_QOS_LUT_USAGE_LINEAR_QSEED;
  238. else if (fmt && SDE_FORMAT_IS_LINEAR(fmt))
  239. lut_index = SDE_QOS_LUT_USAGE_LINEAR;
  240. else if (pstate->scaler3_cfg.enable)
  241. lut_index = SDE_QOS_LUT_USAGE_MACROTILE_QSEED;
  242. else
  243. lut_index = SDE_QOS_LUT_USAGE_MACROTILE;
  244. }
  245. index = (fps_index * SDE_QOS_LUT_USAGE_MAX) + lut_index;
  246. psde->pipe_qos_cfg.danger_lut = perf->danger_lut[index];
  247. psde->pipe_qos_cfg.safe_lut = perf->safe_lut[index];
  248. psde->pipe_qos_cfg.creq_lut = perf->creq_lut[index];
  249. trace_sde_perf_set_qos_luts(psde->pipe - SSPP_VIG0,
  250. (fmt) ? fmt->base.pixel_format : 0,
  251. (fmt) ? fmt->fetch_mode : 0,
  252. psde->pipe_qos_cfg.danger_lut,
  253. psde->pipe_qos_cfg.safe_lut,
  254. psde->pipe_qos_cfg.creq_lut);
  255. SDE_DEBUG(
  256. "plane%u: pnum:%d fmt:%4.4s fps:%d mode:%d luts[0x%x,0x%x 0x%llx]\n",
  257. plane->base.id,
  258. psde->pipe - SSPP_VIG0,
  259. fmt ? (char *)&fmt->base.pixel_format : NULL, frame_rate,
  260. fmt ? fmt->fetch_mode : -1,
  261. psde->pipe_qos_cfg.danger_lut,
  262. psde->pipe_qos_cfg.safe_lut,
  263. psde->pipe_qos_cfg.creq_lut);
  264. psde->pipe_hw->ops.setup_qos_lut(psde->pipe_hw, &psde->pipe_qos_cfg);
  265. }
  266. /**
  267. * _sde_plane_set_qos_ctrl - set QoS control of the given plane
  268. * @plane: Pointer to drm plane
  269. * @enable: true to enable QoS control
  270. * @flags: QoS control mode (enum sde_plane_qos)
  271. */
  272. static void _sde_plane_set_qos_ctrl(struct drm_plane *plane,
  273. bool enable, u32 flags)
  274. {
  275. struct sde_plane *psde;
  276. if (!plane) {
  277. SDE_ERROR("invalid arguments\n");
  278. return;
  279. }
  280. psde = to_sde_plane(plane);
  281. if (!psde->pipe_hw || !psde->pipe_sblk) {
  282. SDE_ERROR("invalid arguments\n");
  283. return;
  284. } else if (!psde->pipe_hw->ops.setup_qos_ctrl) {
  285. return;
  286. }
  287. if (flags & SDE_PLANE_QOS_VBLANK_CTRL) {
  288. psde->pipe_qos_cfg.creq_vblank = psde->pipe_sblk->creq_vblank;
  289. psde->pipe_qos_cfg.danger_vblank =
  290. psde->pipe_sblk->danger_vblank;
  291. psde->pipe_qos_cfg.vblank_en = enable;
  292. }
  293. if (flags & SDE_PLANE_QOS_VBLANK_AMORTIZE) {
  294. /* this feature overrules previous VBLANK_CTRL */
  295. psde->pipe_qos_cfg.vblank_en = false;
  296. psde->pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */
  297. }
  298. if (flags & SDE_PLANE_QOS_PANIC_CTRL)
  299. psde->pipe_qos_cfg.danger_safe_en = enable;
  300. if (!psde->is_rt_pipe) {
  301. psde->pipe_qos_cfg.vblank_en = false;
  302. psde->pipe_qos_cfg.danger_safe_en = false;
  303. }
  304. SDE_DEBUG("plane%u: pnum:%d ds:%d vb:%d pri[0x%x, 0x%x] is_rt:%d\n",
  305. plane->base.id,
  306. psde->pipe - SSPP_VIG0,
  307. psde->pipe_qos_cfg.danger_safe_en,
  308. psde->pipe_qos_cfg.vblank_en,
  309. psde->pipe_qos_cfg.creq_vblank,
  310. psde->pipe_qos_cfg.danger_vblank,
  311. psde->is_rt_pipe);
  312. psde->pipe_hw->ops.setup_qos_ctrl(psde->pipe_hw,
  313. &psde->pipe_qos_cfg);
  314. }
  315. void sde_plane_set_revalidate(struct drm_plane *plane, bool enable)
  316. {
  317. struct sde_plane *psde;
  318. if (!plane)
  319. return;
  320. psde = to_sde_plane(plane);
  321. psde->revalidate = enable;
  322. }
  323. int sde_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
  324. {
  325. struct sde_plane *psde;
  326. int rc;
  327. if (!plane) {
  328. SDE_ERROR("invalid arguments\n");
  329. return -EINVAL;
  330. }
  331. psde = to_sde_plane(plane);
  332. if (!psde->is_rt_pipe)
  333. goto end;
  334. rc = pm_runtime_get_sync(plane->dev->dev);
  335. if (rc < 0) {
  336. SDE_ERROR("failed to enable power resource %d\n", rc);
  337. SDE_EVT32(rc, SDE_EVTLOG_ERROR);
  338. return rc;
  339. }
  340. _sde_plane_set_qos_ctrl(plane, enable, SDE_PLANE_QOS_PANIC_CTRL);
  341. pm_runtime_put_sync(plane->dev->dev);
  342. end:
  343. return 0;
  344. }
  345. /**
  346. * _sde_plane_set_ot_limit - set OT limit for the given plane
  347. * @plane: Pointer to drm plane
  348. * @crtc: Pointer to drm crtc
  349. */
  350. static void _sde_plane_set_ot_limit(struct drm_plane *plane,
  351. struct drm_crtc *crtc)
  352. {
  353. struct sde_plane *psde;
  354. struct sde_vbif_set_ot_params ot_params;
  355. struct msm_drm_private *priv;
  356. struct sde_kms *sde_kms;
  357. if (!plane || !plane->dev || !crtc) {
  358. SDE_ERROR("invalid arguments plane %d crtc %d\n",
  359. !plane, !crtc);
  360. return;
  361. }
  362. priv = plane->dev->dev_private;
  363. if (!priv || !priv->kms) {
  364. SDE_ERROR("invalid KMS reference\n");
  365. return;
  366. }
  367. sde_kms = to_sde_kms(priv->kms);
  368. psde = to_sde_plane(plane);
  369. if (!psde->pipe_hw) {
  370. SDE_ERROR("invalid pipe reference\n");
  371. return;
  372. }
  373. memset(&ot_params, 0, sizeof(ot_params));
  374. ot_params.xin_id = psde->pipe_hw->cap->xin_id;
  375. ot_params.num = psde->pipe_hw->idx - SSPP_NONE;
  376. ot_params.width = psde->pipe_cfg.src_rect.w;
  377. ot_params.height = psde->pipe_cfg.src_rect.h;
  378. ot_params.is_wfd = !psde->is_rt_pipe;
  379. ot_params.frame_rate = crtc->mode.vrefresh;
  380. ot_params.vbif_idx = VBIF_RT;
  381. ot_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  382. ot_params.rd = true;
  383. sde_vbif_set_ot_limit(sde_kms, &ot_params);
  384. }
  385. /**
  386. * _sde_plane_set_vbif_qos - set vbif QoS for the given plane
  387. * @plane: Pointer to drm plane
  388. * @force: Force update of vbif QoS
  389. */
  390. static void _sde_plane_set_qos_remap(struct drm_plane *plane, bool force)
  391. {
  392. struct sde_plane *psde;
  393. struct sde_vbif_set_qos_params qos_params;
  394. struct msm_drm_private *priv;
  395. struct sde_kms *sde_kms;
  396. if (!plane || !plane->dev) {
  397. SDE_ERROR("invalid arguments\n");
  398. return;
  399. }
  400. priv = plane->dev->dev_private;
  401. if (!priv || !priv->kms) {
  402. SDE_ERROR("invalid KMS reference\n");
  403. return;
  404. }
  405. sde_kms = to_sde_kms(priv->kms);
  406. psde = to_sde_plane(plane);
  407. if (!psde->pipe_hw) {
  408. SDE_ERROR("invalid pipe reference\n");
  409. return;
  410. }
  411. memset(&qos_params, 0, sizeof(qos_params));
  412. qos_params.vbif_idx = VBIF_RT;
  413. qos_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  414. qos_params.xin_id = psde->pipe_hw->cap->xin_id;
  415. qos_params.num = psde->pipe_hw->idx - SSPP_VIG0;
  416. qos_params.client_type = psde->is_rt_pipe ?
  417. VBIF_RT_CLIENT : VBIF_NRT_CLIENT;
  418. if (!force && !memcmp(&qos_params, &psde->cached_qos_params,
  419. sizeof(struct sde_vbif_set_qos_params))) {
  420. return;
  421. }
  422. SDE_DEBUG("changes in vbif QoS parameters, remap it\n");
  423. memcpy(&psde->cached_qos_params, &qos_params,
  424. sizeof(struct sde_vbif_set_qos_params));
  425. SDE_DEBUG("plane%d pipe:%d vbif:%d xin:%d rt:%d, clk_ctrl:%d\n",
  426. plane->base.id, qos_params.num,
  427. qos_params.vbif_idx,
  428. qos_params.xin_id, qos_params.client_type,
  429. qos_params.clk_ctrl);
  430. sde_vbif_set_qos_remap(sde_kms, &qos_params);
  431. }
  432. /**
  433. * _sde_plane_set_ts_prefill - set prefill with traffic shaper
  434. * @plane: Pointer to drm plane
  435. * @pstate: Pointer to sde plane state
  436. */
  437. static void _sde_plane_set_ts_prefill(struct drm_plane *plane,
  438. struct sde_plane_state *pstate)
  439. {
  440. struct sde_plane *psde;
  441. struct sde_hw_pipe_ts_cfg cfg;
  442. struct msm_drm_private *priv;
  443. struct sde_kms *sde_kms;
  444. if (!plane || !plane->dev) {
  445. SDE_ERROR("invalid arguments");
  446. return;
  447. }
  448. priv = plane->dev->dev_private;
  449. if (!priv || !priv->kms) {
  450. SDE_ERROR("invalid KMS reference\n");
  451. return;
  452. }
  453. sde_kms = to_sde_kms(priv->kms);
  454. psde = to_sde_plane(plane);
  455. if (!psde->pipe_hw) {
  456. SDE_ERROR("invalid pipe reference\n");
  457. return;
  458. }
  459. if (!psde->pipe_hw || !psde->pipe_hw->ops.setup_ts_prefill)
  460. return;
  461. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_VBLANK_AMORTIZE);
  462. memset(&cfg, 0, sizeof(cfg));
  463. cfg.size = sde_plane_get_property(pstate,
  464. PLANE_PROP_PREFILL_SIZE);
  465. cfg.time = sde_plane_get_property(pstate,
  466. PLANE_PROP_PREFILL_TIME);
  467. SDE_DEBUG("plane%d size:%llu time:%llu\n",
  468. plane->base.id, cfg.size, cfg.time);
  469. SDE_EVT32_VERBOSE(DRMID(plane), cfg.size, cfg.time);
  470. psde->pipe_hw->ops.setup_ts_prefill(psde->pipe_hw, &cfg,
  471. pstate->multirect_index);
  472. }
  473. /* helper to update a state's input fence pointer from the property */
  474. static void _sde_plane_set_input_fence(struct sde_plane *psde,
  475. struct sde_plane_state *pstate, uint64_t fd)
  476. {
  477. if (!psde || !pstate) {
  478. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  479. !psde, !pstate);
  480. return;
  481. }
  482. /* clear previous reference */
  483. if (pstate->input_fence)
  484. sde_sync_put(pstate->input_fence);
  485. /* get fence pointer for later */
  486. if (fd == 0)
  487. pstate->input_fence = NULL;
  488. else
  489. pstate->input_fence = sde_sync_get(fd);
  490. SDE_DEBUG_PLANE(psde, "0x%llX\n", fd);
  491. }
  492. int sde_plane_wait_input_fence(struct drm_plane *plane, uint32_t wait_ms)
  493. {
  494. struct sde_plane *psde;
  495. struct sde_plane_state *pstate;
  496. uint32_t prefix;
  497. void *input_fence;
  498. int ret = -EINVAL;
  499. signed long rc;
  500. if (!plane) {
  501. SDE_ERROR("invalid plane\n");
  502. } else if (!plane->state) {
  503. SDE_ERROR_PLANE(to_sde_plane(plane), "invalid state\n");
  504. } else {
  505. psde = to_sde_plane(plane);
  506. pstate = to_sde_plane_state(plane->state);
  507. input_fence = pstate->input_fence;
  508. if (input_fence) {
  509. prefix = sde_sync_get_name_prefix(input_fence);
  510. rc = sde_sync_wait(input_fence, wait_ms);
  511. switch (rc) {
  512. case 0:
  513. SDE_ERROR_PLANE(psde, "%ums timeout on %08X fd %d\n",
  514. wait_ms, prefix, sde_plane_get_property(pstate,
  515. PLANE_PROP_INPUT_FENCE));
  516. psde->is_error = true;
  517. sde_kms_timeline_status(plane->dev);
  518. ret = -ETIMEDOUT;
  519. break;
  520. case -ERESTARTSYS:
  521. SDE_ERROR_PLANE(psde,
  522. "%ums wait interrupted on %08X\n",
  523. wait_ms, prefix);
  524. psde->is_error = true;
  525. ret = -ERESTARTSYS;
  526. break;
  527. case -EINVAL:
  528. SDE_ERROR_PLANE(psde,
  529. "invalid fence param for %08X\n",
  530. prefix);
  531. psde->is_error = true;
  532. ret = -EINVAL;
  533. break;
  534. default:
  535. SDE_DEBUG_PLANE(psde, "signaled\n");
  536. ret = 0;
  537. break;
  538. }
  539. SDE_EVT32_VERBOSE(DRMID(plane), -ret, prefix);
  540. } else {
  541. ret = 0;
  542. }
  543. }
  544. return ret;
  545. }
  546. /**
  547. * _sde_plane_get_aspace: gets the address space based on the
  548. * fb_translation mode property
  549. */
  550. static int _sde_plane_get_aspace(
  551. struct sde_plane *psde,
  552. struct sde_plane_state *pstate,
  553. struct msm_gem_address_space **aspace)
  554. {
  555. struct sde_kms *kms;
  556. int mode;
  557. if (!psde || !pstate || !aspace) {
  558. SDE_ERROR("invalid parameters\n");
  559. return -EINVAL;
  560. }
  561. kms = _sde_plane_get_kms(&psde->base);
  562. if (!kms) {
  563. SDE_ERROR("invalid kms\n");
  564. return -EINVAL;
  565. }
  566. mode = sde_plane_get_property(pstate,
  567. PLANE_PROP_FB_TRANSLATION_MODE);
  568. switch (mode) {
  569. case SDE_DRM_FB_NON_SEC:
  570. *aspace = kms->aspace[MSM_SMMU_DOMAIN_UNSECURE];
  571. if (!aspace)
  572. return -EINVAL;
  573. break;
  574. case SDE_DRM_FB_SEC:
  575. *aspace = kms->aspace[MSM_SMMU_DOMAIN_SECURE];
  576. if (!aspace)
  577. return -EINVAL;
  578. break;
  579. case SDE_DRM_FB_SEC_DIR_TRANS:
  580. *aspace = NULL;
  581. break;
  582. default:
  583. SDE_ERROR("invalid fb_translation mode:%d\n", mode);
  584. return -EFAULT;
  585. }
  586. return 0;
  587. }
  588. static inline void _sde_plane_set_scanout(struct drm_plane *plane,
  589. struct sde_plane_state *pstate,
  590. struct sde_hw_pipe_cfg *pipe_cfg,
  591. struct drm_framebuffer *fb)
  592. {
  593. struct sde_plane *psde;
  594. struct msm_gem_address_space *aspace = NULL;
  595. int ret, mode;
  596. bool secure = false;
  597. if (!plane || !pstate || !pipe_cfg || !fb) {
  598. SDE_ERROR(
  599. "invalid arg(s), plane %d state %d cfg %d fb %d\n",
  600. !plane, !pstate, !pipe_cfg, !fb);
  601. return;
  602. }
  603. psde = to_sde_plane(plane);
  604. if (!psde->pipe_hw) {
  605. SDE_ERROR_PLANE(psde, "invalid pipe_hw\n");
  606. return;
  607. }
  608. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  609. if (ret) {
  610. SDE_ERROR_PLANE(psde, "Failed to get aspace %d\n", ret);
  611. return;
  612. }
  613. /*
  614. * framebuffer prepare is deferred for prepare_fb calls that
  615. * happen during the transition from secure to non-secure.
  616. * Handle the prepare at this point for such cases. This can be
  617. * expected for one or two frames during the transition.
  618. */
  619. if (aspace && pstate->defer_prepare_fb) {
  620. SDE_EVT32(DRMID(plane), psde->pipe, aspace->domain_attached);
  621. ret = msm_framebuffer_prepare(fb, pstate->aspace);
  622. if (ret) {
  623. SDE_ERROR_PLANE(psde,
  624. "failed to prepare framebuffer %d\n", ret);
  625. return;
  626. }
  627. pstate->defer_prepare_fb = false;
  628. }
  629. mode = sde_plane_get_property(pstate, PLANE_PROP_FB_TRANSLATION_MODE);
  630. if ((mode == SDE_DRM_FB_SEC) || (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  631. secure = true;
  632. ret = sde_format_populate_layout(aspace, fb, &pipe_cfg->layout);
  633. if (ret == -EAGAIN)
  634. SDE_DEBUG_PLANE(psde, "not updating same src addrs\n");
  635. else if (ret) {
  636. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  637. /*
  638. * Force solid fill color on error. This is to prevent
  639. * smmu faults during secure session transition.
  640. */
  641. psde->is_error = true;
  642. } else if (psde->pipe_hw->ops.setup_sourceaddress) {
  643. SDE_EVT32_VERBOSE(psde->pipe_hw->idx,
  644. pipe_cfg->layout.width,
  645. pipe_cfg->layout.height,
  646. pipe_cfg->layout.plane_addr[0],
  647. pipe_cfg->layout.plane_size[0],
  648. pipe_cfg->layout.plane_addr[1],
  649. pipe_cfg->layout.plane_size[1],
  650. pipe_cfg->layout.plane_addr[2],
  651. pipe_cfg->layout.plane_size[2],
  652. pipe_cfg->layout.plane_addr[3],
  653. pipe_cfg->layout.plane_size[3],
  654. pstate->multirect_index,
  655. secure);
  656. psde->pipe_hw->ops.setup_sourceaddress(psde->pipe_hw, pipe_cfg,
  657. pstate->multirect_index);
  658. }
  659. }
  660. static int _sde_plane_setup_scaler3_lut(struct sde_plane *psde,
  661. struct sde_plane_state *pstate)
  662. {
  663. struct sde_hw_scaler3_cfg *cfg;
  664. int ret = 0;
  665. if (!psde || !pstate) {
  666. SDE_ERROR("invalid args\n");
  667. return -EINVAL;
  668. }
  669. cfg = &pstate->scaler3_cfg;
  670. cfg->dir_lut = msm_property_get_blob(
  671. &psde->property_info,
  672. &pstate->property_state, &cfg->dir_len,
  673. PLANE_PROP_SCALER_LUT_ED);
  674. cfg->cir_lut = msm_property_get_blob(
  675. &psde->property_info,
  676. &pstate->property_state, &cfg->cir_len,
  677. PLANE_PROP_SCALER_LUT_CIR);
  678. cfg->sep_lut = msm_property_get_blob(
  679. &psde->property_info,
  680. &pstate->property_state, &cfg->sep_len,
  681. PLANE_PROP_SCALER_LUT_SEP);
  682. if (!cfg->dir_lut || !cfg->cir_lut || !cfg->sep_lut)
  683. ret = -ENODATA;
  684. return ret;
  685. }
  686. static int _sde_plane_setup_scaler3lite_lut(struct sde_plane *psde,
  687. struct sde_plane_state *pstate)
  688. {
  689. struct sde_hw_scaler3_cfg *cfg;
  690. cfg = &pstate->scaler3_cfg;
  691. cfg->sep_lut = msm_property_get_blob(
  692. &psde->property_info,
  693. &pstate->property_state, &cfg->sep_len,
  694. PLANE_PROP_SCALER_LUT_SEP);
  695. return cfg->sep_lut ? 0 : -ENODATA;
  696. }
  697. static void _sde_plane_setup_scaler3(struct sde_plane *psde,
  698. struct sde_plane_state *pstate, const struct sde_format *fmt,
  699. uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
  700. {
  701. uint32_t decimated, i, src_w, src_h, dst_w, dst_h;
  702. struct sde_hw_scaler3_cfg *scale_cfg;
  703. if (!psde || !pstate || !fmt ||
  704. !chroma_subsmpl_h || !chroma_subsmpl_v) {
  705. SDE_ERROR("psde %d pstate %d fmt %d smp_h %d smp_v %d\n",
  706. !!psde, !!pstate, !!fmt, chroma_subsmpl_h,
  707. chroma_subsmpl_v);
  708. return;
  709. }
  710. scale_cfg = &pstate->scaler3_cfg;
  711. src_w = psde->pipe_cfg.src_rect.w;
  712. src_h = psde->pipe_cfg.src_rect.h;
  713. dst_w = psde->pipe_cfg.dst_rect.w;
  714. dst_h = psde->pipe_cfg.dst_rect.h;
  715. memset(scale_cfg, 0, sizeof(*scale_cfg));
  716. memset(&pstate->pixel_ext, 0, sizeof(struct sde_hw_pixel_ext));
  717. /*
  718. * For inline rotation cases, scaler config is post-rotation,
  719. * so swap the dimensions here. However, pixel extension will
  720. * need pre-rotation settings, this will be corrected below
  721. * when calculating pixel extension settings.
  722. */
  723. if (pstate->rotation & DRM_MODE_ROTATE_90)
  724. swap(src_w, src_h);
  725. decimated = DECIMATED_DIMENSION(src_w,
  726. psde->pipe_cfg.horz_decimation);
  727. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] =
  728. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_w);
  729. decimated = DECIMATED_DIMENSION(src_h,
  730. psde->pipe_cfg.vert_decimation);
  731. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] =
  732. mult_frac((1 << PHASE_STEP_SHIFT), decimated, dst_h);
  733. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2] =
  734. scale_cfg->phase_step_y[SDE_SSPP_COMP_0] / chroma_subsmpl_v;
  735. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2] =
  736. scale_cfg->phase_step_x[SDE_SSPP_COMP_0] / chroma_subsmpl_h;
  737. scale_cfg->phase_step_x[SDE_SSPP_COMP_2] =
  738. scale_cfg->phase_step_x[SDE_SSPP_COMP_1_2];
  739. scale_cfg->phase_step_y[SDE_SSPP_COMP_2] =
  740. scale_cfg->phase_step_y[SDE_SSPP_COMP_1_2];
  741. scale_cfg->phase_step_x[SDE_SSPP_COMP_3] =
  742. scale_cfg->phase_step_x[SDE_SSPP_COMP_0];
  743. scale_cfg->phase_step_y[SDE_SSPP_COMP_3] =
  744. scale_cfg->phase_step_y[SDE_SSPP_COMP_0];
  745. for (i = 0; i < SDE_MAX_PLANES; i++) {
  746. scale_cfg->src_width[i] = DECIMATED_DIMENSION(src_w,
  747. psde->pipe_cfg.horz_decimation);
  748. scale_cfg->src_height[i] = DECIMATED_DIMENSION(src_h,
  749. psde->pipe_cfg.vert_decimation);
  750. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2) {
  751. scale_cfg->src_width[i] /= chroma_subsmpl_h;
  752. scale_cfg->src_height[i] /= chroma_subsmpl_v;
  753. }
  754. scale_cfg->preload_x[i] = psde->pipe_sblk->scaler_blk.h_preload;
  755. scale_cfg->preload_y[i] = psde->pipe_sblk->scaler_blk.v_preload;
  756. /* For pixel extension we need the pre-rotated orientation */
  757. if (pstate->rotation & DRM_MODE_ROTATE_90) {
  758. pstate->pixel_ext.num_ext_pxls_top[i] =
  759. scale_cfg->src_width[i];
  760. pstate->pixel_ext.num_ext_pxls_left[i] =
  761. scale_cfg->src_height[i];
  762. } else {
  763. pstate->pixel_ext.num_ext_pxls_top[i] =
  764. scale_cfg->src_height[i];
  765. pstate->pixel_ext.num_ext_pxls_left[i] =
  766. scale_cfg->src_width[i];
  767. }
  768. }
  769. if ((!(SDE_FORMAT_IS_YUV(fmt)) && (src_h == dst_h)
  770. && (src_w == dst_w)) || pstate->multirect_mode)
  771. return;
  772. SDE_DEBUG_PLANE(psde,
  773. "setting bilinear: src:%dx%d dst:%dx%d chroma:%dx%d fmt:%x\n",
  774. src_w, src_h, dst_w, dst_h,
  775. chroma_subsmpl_v, chroma_subsmpl_h,
  776. fmt->base.pixel_format);
  777. scale_cfg->dst_width = dst_w;
  778. scale_cfg->dst_height = dst_h;
  779. scale_cfg->y_rgb_filter_cfg = SDE_SCALE_BIL;
  780. scale_cfg->uv_filter_cfg = SDE_SCALE_BIL;
  781. scale_cfg->alpha_filter_cfg = SDE_SCALE_ALPHA_BIL;
  782. scale_cfg->lut_flag = 0;
  783. scale_cfg->blend_cfg = 1;
  784. scale_cfg->enable = 1;
  785. scale_cfg->dyn_exp_disabled = SDE_QSEED_DEFAULT_DYN_EXP;
  786. }
  787. /**
  788. * _sde_plane_setup_scaler2 - determine default scaler phase steps/filter type
  789. * @psde: Pointer to SDE plane object
  790. * @src: Source size
  791. * @dst: Destination size
  792. * @phase_steps: Pointer to output array for phase steps
  793. * @filter: Pointer to output array for filter type
  794. * @fmt: Pointer to format definition
  795. * @chroma_subsampling: Subsampling amount for chroma channel
  796. *
  797. * Returns: 0 on success
  798. */
  799. static int _sde_plane_setup_scaler2(struct sde_plane *psde,
  800. uint32_t src, uint32_t dst, uint32_t *phase_steps,
  801. enum sde_hw_filter *filter, const struct sde_format *fmt,
  802. uint32_t chroma_subsampling)
  803. {
  804. if (!psde || !phase_steps || !filter || !fmt) {
  805. SDE_ERROR(
  806. "invalid arg(s), plane %d phase %d filter %d fmt %d\n",
  807. !psde, !phase_steps, !filter, !fmt);
  808. return -EINVAL;
  809. }
  810. /* calculate phase steps, leave init phase as zero */
  811. phase_steps[SDE_SSPP_COMP_0] =
  812. mult_frac(1 << PHASE_STEP_SHIFT, src, dst);
  813. phase_steps[SDE_SSPP_COMP_1_2] =
  814. phase_steps[SDE_SSPP_COMP_0] / chroma_subsampling;
  815. phase_steps[SDE_SSPP_COMP_2] = phase_steps[SDE_SSPP_COMP_1_2];
  816. phase_steps[SDE_SSPP_COMP_3] = phase_steps[SDE_SSPP_COMP_0];
  817. /* calculate scaler config, if necessary */
  818. if (SDE_FORMAT_IS_YUV(fmt) || src != dst) {
  819. filter[SDE_SSPP_COMP_3] =
  820. (src <= dst) ? SDE_SCALE_FILTER_BIL :
  821. SDE_SCALE_FILTER_PCMN;
  822. if (SDE_FORMAT_IS_YUV(fmt)) {
  823. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_CA;
  824. filter[SDE_SSPP_COMP_1_2] = filter[SDE_SSPP_COMP_3];
  825. } else {
  826. filter[SDE_SSPP_COMP_0] = filter[SDE_SSPP_COMP_3];
  827. filter[SDE_SSPP_COMP_1_2] =
  828. SDE_SCALE_FILTER_NEAREST;
  829. }
  830. } else {
  831. /* disable scaler */
  832. filter[SDE_SSPP_COMP_0] = SDE_SCALE_FILTER_MAX;
  833. filter[SDE_SSPP_COMP_1_2] = SDE_SCALE_FILTER_MAX;
  834. filter[SDE_SSPP_COMP_3] = SDE_SCALE_FILTER_MAX;
  835. }
  836. return 0;
  837. }
  838. /**
  839. * _sde_plane_setup_pixel_ext - determine default pixel extension values
  840. * @psde: Pointer to SDE plane object
  841. * @src: Source size
  842. * @dst: Destination size
  843. * @decimated_src: Source size after decimation, if any
  844. * @phase_steps: Pointer to output array for phase steps
  845. * @out_src: Output array for pixel extension values
  846. * @out_edge1: Output array for pixel extension first edge
  847. * @out_edge2: Output array for pixel extension second edge
  848. * @filter: Pointer to array for filter type
  849. * @fmt: Pointer to format definition
  850. * @chroma_subsampling: Subsampling amount for chroma channel
  851. * @post_compare: Whether to chroma subsampled source size for comparisions
  852. */
  853. static void _sde_plane_setup_pixel_ext(struct sde_plane *psde,
  854. uint32_t src, uint32_t dst, uint32_t decimated_src,
  855. uint32_t *phase_steps, uint32_t *out_src, int *out_edge1,
  856. int *out_edge2, enum sde_hw_filter *filter,
  857. const struct sde_format *fmt, uint32_t chroma_subsampling,
  858. bool post_compare)
  859. {
  860. int64_t edge1, edge2, caf;
  861. uint32_t src_work;
  862. int i, tmp;
  863. if (psde && phase_steps && out_src && out_edge1 &&
  864. out_edge2 && filter && fmt) {
  865. /* handle CAF for YUV formats */
  866. if (SDE_FORMAT_IS_YUV(fmt) && *filter == SDE_SCALE_FILTER_CA)
  867. caf = PHASE_STEP_UNIT_SCALE;
  868. else
  869. caf = 0;
  870. for (i = 0; i < SDE_MAX_PLANES; i++) {
  871. src_work = decimated_src;
  872. if (i == SDE_SSPP_COMP_1_2 || i == SDE_SSPP_COMP_2)
  873. src_work /= chroma_subsampling;
  874. if (post_compare)
  875. src = src_work;
  876. if (!SDE_FORMAT_IS_YUV(fmt) && (src == dst)) {
  877. /* unity */
  878. edge1 = 0;
  879. edge2 = 0;
  880. } else if (dst >= src) {
  881. /* upscale */
  882. edge1 = (1 << PHASE_RESIDUAL);
  883. edge1 -= caf;
  884. edge2 = (1 << PHASE_RESIDUAL);
  885. edge2 += (dst - 1) * *(phase_steps + i);
  886. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  887. edge2 += caf;
  888. edge2 = -(edge2);
  889. } else {
  890. /* downscale */
  891. edge1 = 0;
  892. edge2 = (dst - 1) * *(phase_steps + i);
  893. edge2 -= (src_work - 1) * PHASE_STEP_UNIT_SCALE;
  894. edge2 += *(phase_steps + i);
  895. edge2 = -(edge2);
  896. }
  897. /* only enable CAF for luma plane */
  898. caf = 0;
  899. /* populate output arrays */
  900. *(out_src + i) = src_work;
  901. /* edge updates taken from __pxl_extn_helper */
  902. if (edge1 >= 0) {
  903. tmp = (uint32_t)edge1;
  904. tmp >>= PHASE_STEP_SHIFT;
  905. *(out_edge1 + i) = -tmp;
  906. } else {
  907. tmp = (uint32_t)(-edge1);
  908. *(out_edge1 + i) =
  909. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  910. PHASE_STEP_SHIFT;
  911. }
  912. if (edge2 >= 0) {
  913. tmp = (uint32_t)edge2;
  914. tmp >>= PHASE_STEP_SHIFT;
  915. *(out_edge2 + i) = -tmp;
  916. } else {
  917. tmp = (uint32_t)(-edge2);
  918. *(out_edge2 + i) =
  919. (tmp + PHASE_STEP_UNIT_SCALE - 1) >>
  920. PHASE_STEP_SHIFT;
  921. }
  922. }
  923. }
  924. }
  925. static inline void _sde_plane_setup_csc(struct sde_plane *psde)
  926. {
  927. static const struct sde_csc_cfg sde_csc_YUV2RGB_601L = {
  928. {
  929. /* S15.16 format */
  930. 0x00012A00, 0x00000000, 0x00019880,
  931. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  932. 0x00012A00, 0x00020480, 0x00000000,
  933. },
  934. /* signed bias */
  935. { 0xfff0, 0xff80, 0xff80,},
  936. { 0x0, 0x0, 0x0,},
  937. /* unsigned clamp */
  938. { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0,},
  939. { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff,},
  940. };
  941. static const struct sde_csc_cfg sde_csc10_YUV2RGB_601L = {
  942. {
  943. /* S15.16 format */
  944. 0x00012A00, 0x00000000, 0x00019880,
  945. 0x00012A00, 0xFFFF9B80, 0xFFFF3000,
  946. 0x00012A00, 0x00020480, 0x00000000,
  947. },
  948. /* signed bias */
  949. { 0xffc0, 0xfe00, 0xfe00,},
  950. { 0x0, 0x0, 0x0,},
  951. /* unsigned clamp */
  952. { 0x40, 0x3ac, 0x40, 0x3c0, 0x40, 0x3c0,},
  953. { 0x00, 0x3ff, 0x00, 0x3ff, 0x00, 0x3ff,},
  954. };
  955. if (!psde) {
  956. SDE_ERROR("invalid plane\n");
  957. return;
  958. }
  959. /* revert to kernel default if override not available */
  960. if (psde->csc_usr_ptr)
  961. psde->csc_ptr = psde->csc_usr_ptr;
  962. else if (BIT(SDE_SSPP_CSC_10BIT) & psde->features)
  963. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc10_YUV2RGB_601L;
  964. else
  965. psde->csc_ptr = (struct sde_csc_cfg *)&sde_csc_YUV2RGB_601L;
  966. SDE_DEBUG_PLANE(psde, "using 0x%X 0x%X 0x%X...\n",
  967. psde->csc_ptr->csc_mv[0],
  968. psde->csc_ptr->csc_mv[1],
  969. psde->csc_ptr->csc_mv[2]);
  970. }
  971. static void sde_color_process_plane_setup(struct drm_plane *plane)
  972. {
  973. struct sde_plane *psde;
  974. struct sde_plane_state *pstate;
  975. uint32_t hue, saturation, value, contrast;
  976. struct drm_msm_memcol *memcol = NULL;
  977. struct drm_msm_3d_gamut *vig_gamut = NULL;
  978. struct drm_msm_igc_lut *igc = NULL;
  979. struct drm_msm_pgc_lut *gc = NULL;
  980. size_t memcol_sz = 0, size = 0;
  981. struct sde_hw_cp_cfg hw_cfg = {};
  982. struct sde_hw_ctl *ctl = _sde_plane_get_hw_ctl(plane);
  983. psde = to_sde_plane(plane);
  984. pstate = to_sde_plane_state(plane->state);
  985. hue = (uint32_t) sde_plane_get_property(pstate, PLANE_PROP_HUE_ADJUST);
  986. if (psde->pipe_hw->ops.setup_pa_hue)
  987. psde->pipe_hw->ops.setup_pa_hue(psde->pipe_hw, &hue);
  988. saturation = (uint32_t) sde_plane_get_property(pstate,
  989. PLANE_PROP_SATURATION_ADJUST);
  990. if (psde->pipe_hw->ops.setup_pa_sat)
  991. psde->pipe_hw->ops.setup_pa_sat(psde->pipe_hw, &saturation);
  992. value = (uint32_t) sde_plane_get_property(pstate,
  993. PLANE_PROP_VALUE_ADJUST);
  994. if (psde->pipe_hw->ops.setup_pa_val)
  995. psde->pipe_hw->ops.setup_pa_val(psde->pipe_hw, &value);
  996. contrast = (uint32_t) sde_plane_get_property(pstate,
  997. PLANE_PROP_CONTRAST_ADJUST);
  998. if (psde->pipe_hw->ops.setup_pa_cont)
  999. psde->pipe_hw->ops.setup_pa_cont(psde->pipe_hw, &contrast);
  1000. if (psde->pipe_hw->ops.setup_pa_memcolor) {
  1001. /* Skin memory color setup */
  1002. memcol = msm_property_get_blob(&psde->property_info,
  1003. &pstate->property_state,
  1004. &memcol_sz,
  1005. PLANE_PROP_SKIN_COLOR);
  1006. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1007. MEMCOLOR_SKIN, memcol);
  1008. /* Sky memory color setup */
  1009. memcol = msm_property_get_blob(&psde->property_info,
  1010. &pstate->property_state,
  1011. &memcol_sz,
  1012. PLANE_PROP_SKY_COLOR);
  1013. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1014. MEMCOLOR_SKY, memcol);
  1015. /* Foliage memory color setup */
  1016. memcol = msm_property_get_blob(&psde->property_info,
  1017. &pstate->property_state,
  1018. &memcol_sz,
  1019. PLANE_PROP_FOLIAGE_COLOR);
  1020. psde->pipe_hw->ops.setup_pa_memcolor(psde->pipe_hw,
  1021. MEMCOLOR_FOLIAGE, memcol);
  1022. }
  1023. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_GAMUT &&
  1024. psde->pipe_hw->ops.setup_vig_gamut) {
  1025. vig_gamut = msm_property_get_blob(&psde->property_info,
  1026. &pstate->property_state,
  1027. &size,
  1028. PLANE_PROP_VIG_GAMUT);
  1029. hw_cfg.last_feature = 0;
  1030. hw_cfg.ctl = ctl;
  1031. hw_cfg.len = sizeof(struct drm_msm_3d_gamut);
  1032. hw_cfg.payload = vig_gamut;
  1033. psde->pipe_hw->ops.setup_vig_gamut(psde->pipe_hw, &hw_cfg);
  1034. }
  1035. if (pstate->dirty & SDE_PLANE_DIRTY_VIG_IGC &&
  1036. psde->pipe_hw->ops.setup_vig_igc) {
  1037. igc = msm_property_get_blob(&psde->property_info,
  1038. &pstate->property_state,
  1039. &size,
  1040. PLANE_PROP_VIG_IGC);
  1041. hw_cfg.last_feature = 0;
  1042. hw_cfg.ctl = ctl;
  1043. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1044. hw_cfg.payload = igc;
  1045. psde->pipe_hw->ops.setup_vig_igc(psde->pipe_hw, &hw_cfg);
  1046. }
  1047. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_IGC &&
  1048. psde->pipe_hw->ops.setup_dma_igc) {
  1049. igc = msm_property_get_blob(&psde->property_info,
  1050. &pstate->property_state,
  1051. &size,
  1052. PLANE_PROP_DMA_IGC);
  1053. hw_cfg.last_feature = 0;
  1054. hw_cfg.ctl = ctl;
  1055. hw_cfg.len = sizeof(struct drm_msm_igc_lut);
  1056. hw_cfg.payload = igc;
  1057. psde->pipe_hw->ops.setup_dma_igc(psde->pipe_hw, &hw_cfg,
  1058. pstate->multirect_index);
  1059. }
  1060. if (pstate->dirty & SDE_PLANE_DIRTY_DMA_GC &&
  1061. psde->pipe_hw->ops.setup_dma_gc) {
  1062. gc = msm_property_get_blob(&psde->property_info,
  1063. &pstate->property_state,
  1064. &size,
  1065. PLANE_PROP_DMA_GC);
  1066. hw_cfg.last_feature = 0;
  1067. hw_cfg.ctl = ctl;
  1068. hw_cfg.len = sizeof(struct drm_msm_pgc_lut);
  1069. hw_cfg.payload = gc;
  1070. psde->pipe_hw->ops.setup_dma_gc(psde->pipe_hw, &hw_cfg,
  1071. pstate->multirect_index);
  1072. }
  1073. }
  1074. static void _sde_plane_setup_scaler(struct sde_plane *psde,
  1075. struct sde_plane_state *pstate,
  1076. const struct sde_format *fmt, bool color_fill)
  1077. {
  1078. struct sde_hw_pixel_ext *pe;
  1079. uint32_t chroma_subsmpl_h, chroma_subsmpl_v;
  1080. const struct drm_format_info *info = drm_format_info(fmt->base.pixel_format);
  1081. if (!psde || !fmt || !pstate) {
  1082. SDE_ERROR("invalid arg(s), plane %d fmt %d state %d\n",
  1083. !psde, !fmt, !pstate);
  1084. return;
  1085. }
  1086. pe = &pstate->pixel_ext;
  1087. psde->pipe_cfg.horz_decimation =
  1088. sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  1089. psde->pipe_cfg.vert_decimation =
  1090. sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  1091. /* don't chroma subsample if decimating */
  1092. chroma_subsmpl_h = psde->pipe_cfg.horz_decimation ? 1 : info->hsub;
  1093. chroma_subsmpl_v = psde->pipe_cfg.vert_decimation ? 1 : info->vsub;
  1094. /* update scaler */
  1095. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  1096. (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE))) {
  1097. int rc = -EINVAL;
  1098. if (!color_fill && !psde->debugfs_default_scale)
  1099. rc = is_qseed3_rev_qseed3lite(psde->pipe_hw->catalog) ?
  1100. _sde_plane_setup_scaler3lite_lut(psde, pstate) :
  1101. _sde_plane_setup_scaler3_lut(psde, pstate);
  1102. if (rc || pstate->scaler_check_state !=
  1103. SDE_PLANE_SCLCHECK_SCALER_V2) {
  1104. SDE_EVT32_VERBOSE(DRMID(&psde->base), color_fill,
  1105. pstate->scaler_check_state,
  1106. psde->debugfs_default_scale, rc,
  1107. psde->pipe_cfg.src_rect.w,
  1108. psde->pipe_cfg.src_rect.h,
  1109. psde->pipe_cfg.dst_rect.w,
  1110. psde->pipe_cfg.dst_rect.h,
  1111. pstate->multirect_mode);
  1112. /* calculate default config for QSEED3 */
  1113. _sde_plane_setup_scaler3(psde, pstate, fmt,
  1114. chroma_subsmpl_h, chroma_subsmpl_v);
  1115. }
  1116. } else if (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V1 ||
  1117. color_fill || psde->debugfs_default_scale) {
  1118. uint32_t deci_dim, i;
  1119. /* calculate default configuration for QSEED2 */
  1120. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  1121. SDE_DEBUG_PLANE(psde, "default config\n");
  1122. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.w,
  1123. psde->pipe_cfg.horz_decimation);
  1124. _sde_plane_setup_scaler2(psde,
  1125. deci_dim,
  1126. psde->pipe_cfg.dst_rect.w,
  1127. pe->phase_step_x,
  1128. pe->horz_filter, fmt, chroma_subsmpl_h);
  1129. if (SDE_FORMAT_IS_YUV(fmt))
  1130. deci_dim &= ~0x1;
  1131. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.w,
  1132. psde->pipe_cfg.dst_rect.w, deci_dim,
  1133. pe->phase_step_x,
  1134. pe->roi_w,
  1135. pe->num_ext_pxls_left,
  1136. pe->num_ext_pxls_right, pe->horz_filter, fmt,
  1137. chroma_subsmpl_h, 0);
  1138. deci_dim = DECIMATED_DIMENSION(psde->pipe_cfg.src_rect.h,
  1139. psde->pipe_cfg.vert_decimation);
  1140. _sde_plane_setup_scaler2(psde,
  1141. deci_dim,
  1142. psde->pipe_cfg.dst_rect.h,
  1143. pe->phase_step_y,
  1144. pe->vert_filter, fmt, chroma_subsmpl_v);
  1145. _sde_plane_setup_pixel_ext(psde, psde->pipe_cfg.src_rect.h,
  1146. psde->pipe_cfg.dst_rect.h, deci_dim,
  1147. pe->phase_step_y,
  1148. pe->roi_h,
  1149. pe->num_ext_pxls_top,
  1150. pe->num_ext_pxls_btm, pe->vert_filter, fmt,
  1151. chroma_subsmpl_v, 1);
  1152. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1153. if (pe->num_ext_pxls_left[i] >= 0)
  1154. pe->left_rpt[i] = pe->num_ext_pxls_left[i];
  1155. else
  1156. pe->left_ftch[i] = pe->num_ext_pxls_left[i];
  1157. if (pe->num_ext_pxls_right[i] >= 0)
  1158. pe->right_rpt[i] = pe->num_ext_pxls_right[i];
  1159. else
  1160. pe->right_ftch[i] = pe->num_ext_pxls_right[i];
  1161. if (pe->num_ext_pxls_top[i] >= 0)
  1162. pe->top_rpt[i] = pe->num_ext_pxls_top[i];
  1163. else
  1164. pe->top_ftch[i] = pe->num_ext_pxls_top[i];
  1165. if (pe->num_ext_pxls_btm[i] >= 0)
  1166. pe->btm_rpt[i] = pe->num_ext_pxls_btm[i];
  1167. else
  1168. pe->btm_ftch[i] = pe->num_ext_pxls_btm[i];
  1169. }
  1170. }
  1171. if (psde->pipe_hw->ops.setup_pre_downscale)
  1172. psde->pipe_hw->ops.setup_pre_downscale(psde->pipe_hw,
  1173. &pstate->pre_down);
  1174. }
  1175. /**
  1176. * _sde_plane_color_fill - enables color fill on plane
  1177. * @psde: Pointer to SDE plane object
  1178. * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
  1179. * @alpha: 8-bit fill alpha value, 255 selects 100% alpha
  1180. * Returns: 0 on success
  1181. */
  1182. static int _sde_plane_color_fill(struct sde_plane *psde,
  1183. uint32_t color, uint32_t alpha)
  1184. {
  1185. const struct sde_format *fmt;
  1186. const struct drm_plane *plane;
  1187. struct sde_plane_state *pstate;
  1188. bool blend_enable = true;
  1189. if (!psde || !psde->base.state) {
  1190. SDE_ERROR("invalid plane\n");
  1191. return -EINVAL;
  1192. }
  1193. if (!psde->pipe_hw) {
  1194. SDE_ERROR_PLANE(psde, "invalid plane h/w pointer\n");
  1195. return -EINVAL;
  1196. }
  1197. plane = &psde->base;
  1198. pstate = to_sde_plane_state(plane->state);
  1199. SDE_DEBUG_PLANE(psde, "\n");
  1200. /*
  1201. * select fill format to match user property expectation,
  1202. * h/w only supports RGB variants
  1203. */
  1204. fmt = sde_get_sde_format(DRM_FORMAT_ABGR8888);
  1205. blend_enable = (SDE_DRM_BLEND_OP_OPAQUE !=
  1206. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP));
  1207. /* update sspp */
  1208. if (fmt && psde->pipe_hw->ops.setup_solidfill) {
  1209. psde->pipe_hw->ops.setup_solidfill(psde->pipe_hw,
  1210. (color & 0xFFFFFF) | ((alpha & 0xFF) << 24),
  1211. pstate->multirect_index);
  1212. /* override scaler/decimation if solid fill */
  1213. psde->pipe_cfg.src_rect.x = 0;
  1214. psde->pipe_cfg.src_rect.y = 0;
  1215. psde->pipe_cfg.src_rect.w = psde->pipe_cfg.dst_rect.w;
  1216. psde->pipe_cfg.src_rect.h = psde->pipe_cfg.dst_rect.h;
  1217. _sde_plane_setup_scaler(psde, pstate, fmt, true);
  1218. if (psde->pipe_hw->ops.setup_format)
  1219. psde->pipe_hw->ops.setup_format(psde->pipe_hw,
  1220. fmt, blend_enable,
  1221. SDE_SSPP_SOLID_FILL,
  1222. pstate->multirect_index);
  1223. if (psde->pipe_hw->ops.setup_rects)
  1224. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  1225. &psde->pipe_cfg,
  1226. pstate->multirect_index);
  1227. if (psde->pipe_hw->ops.setup_pe)
  1228. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  1229. &pstate->pixel_ext);
  1230. if (psde->pipe_hw->ops.setup_scaler &&
  1231. pstate->multirect_index != SDE_SSPP_RECT_1) {
  1232. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  1233. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  1234. &psde->pipe_cfg, &pstate->pixel_ext,
  1235. &pstate->scaler3_cfg);
  1236. }
  1237. }
  1238. return 0;
  1239. }
  1240. /**
  1241. * sde_plane_rot_atomic_check - verify rotator update of the given state
  1242. * @plane: Pointer to drm plane
  1243. * @state: Pointer to drm plane state to be validated
  1244. * return: 0 if success; error code otherwise
  1245. */
  1246. static int sde_plane_rot_atomic_check(struct drm_plane *plane,
  1247. struct drm_plane_state *state)
  1248. {
  1249. struct sde_plane *psde;
  1250. struct sde_plane_state *pstate, *old_pstate;
  1251. int ret = 0;
  1252. u32 rotation;
  1253. if (!plane || !state) {
  1254. SDE_ERROR("invalid plane/state\n");
  1255. return -EINVAL;
  1256. }
  1257. psde = to_sde_plane(plane);
  1258. pstate = to_sde_plane_state(state);
  1259. old_pstate = to_sde_plane_state(plane->state);
  1260. /* check inline rotation and simplify the transform */
  1261. rotation = drm_rotation_simplify(
  1262. state->rotation,
  1263. DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1264. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1265. if ((rotation & DRM_MODE_ROTATE_180) ||
  1266. (rotation & DRM_MODE_ROTATE_270)) {
  1267. SDE_ERROR_PLANE(psde,
  1268. "invalid rotation transform must be simplified 0x%x\n",
  1269. rotation);
  1270. ret = -EINVAL;
  1271. goto exit;
  1272. }
  1273. if (rotation & DRM_MODE_ROTATE_90) {
  1274. struct msm_drm_private *priv = plane->dev->dev_private;
  1275. struct sde_kms *sde_kms;
  1276. const struct msm_format *msm_fmt;
  1277. const struct sde_format *fmt;
  1278. struct sde_rect src;
  1279. bool q16_data = true;
  1280. POPULATE_RECT(&src, state->src_x, state->src_y,
  1281. state->src_w, state->src_h, q16_data);
  1282. /*
  1283. * DRM framework expects rotation flag in counter-clockwise
  1284. * direction and the HW expects in clockwise direction.
  1285. * Flip the flags to match with HW.
  1286. */
  1287. rotation ^= (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y);
  1288. if (!psde->pipe_sblk->in_rot_maxdwnscale_rt_num ||
  1289. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom ||
  1290. !psde->pipe_sblk->in_rot_maxdwnscale_nrt ||
  1291. !psde->pipe_sblk->in_rot_maxheight ||
  1292. !psde->pipe_sblk->in_rot_format_list ||
  1293. !(psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT))) {
  1294. SDE_ERROR_PLANE(psde,
  1295. "wrong config rt:%d/%d nrt:%d fmt:%d h:%d 0x%x\n",
  1296. !psde->pipe_sblk->in_rot_maxdwnscale_rt_num,
  1297. !psde->pipe_sblk->in_rot_maxdwnscale_rt_denom,
  1298. !psde->pipe_sblk->in_rot_maxdwnscale_nrt,
  1299. !psde->pipe_sblk->in_rot_format_list,
  1300. !psde->pipe_sblk->in_rot_maxheight,
  1301. psde->features);
  1302. ret = -EINVAL;
  1303. goto exit;
  1304. }
  1305. /* check for valid height */
  1306. if (src.h > psde->pipe_sblk->in_rot_maxheight) {
  1307. SDE_ERROR_PLANE(psde,
  1308. "invalid height for inline rot:%d max:%d\n",
  1309. src.h, psde->pipe_sblk->in_rot_maxheight);
  1310. ret = -EINVAL;
  1311. goto exit;
  1312. }
  1313. if (!sde_plane_enabled(state))
  1314. goto exit;
  1315. /* check for valid formats supported by inline rot */
  1316. sde_kms = to_sde_kms(priv->kms);
  1317. msm_fmt = msm_framebuffer_format(state->fb);
  1318. fmt = to_sde_format(msm_fmt);
  1319. ret = sde_format_validate_fmt(&sde_kms->base, fmt,
  1320. psde->pipe_sblk->in_rot_format_list);
  1321. }
  1322. exit:
  1323. pstate->rotation = rotation;
  1324. return ret;
  1325. }
  1326. static bool _sde_plane_halt_requests(struct drm_plane *plane,
  1327. uint32_t xin_id, bool halt_forced_clk, bool enable)
  1328. {
  1329. struct sde_plane *psde;
  1330. struct msm_drm_private *priv;
  1331. struct sde_vbif_set_xin_halt_params halt_params;
  1332. if (!plane || !plane->dev) {
  1333. SDE_ERROR("invalid arguments\n");
  1334. return false;
  1335. }
  1336. psde = to_sde_plane(plane);
  1337. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1338. SDE_ERROR("invalid pipe reference\n");
  1339. return false;
  1340. }
  1341. priv = plane->dev->dev_private;
  1342. if (!priv || !priv->kms) {
  1343. SDE_ERROR("invalid KMS reference\n");
  1344. return false;
  1345. }
  1346. memset(&halt_params, 0, sizeof(halt_params));
  1347. halt_params.vbif_idx = VBIF_RT;
  1348. halt_params.xin_id = xin_id;
  1349. halt_params.clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1350. halt_params.forced_on = halt_forced_clk;
  1351. halt_params.enable = enable;
  1352. return sde_vbif_set_xin_halt(to_sde_kms(priv->kms), &halt_params);
  1353. }
  1354. void sde_plane_halt_requests(struct drm_plane *plane, bool enable)
  1355. {
  1356. struct sde_plane *psde;
  1357. if (!plane) {
  1358. SDE_ERROR("invalid plane\n");
  1359. return;
  1360. }
  1361. psde = to_sde_plane(plane);
  1362. if (!psde->pipe_hw || !psde->pipe_hw->cap) {
  1363. SDE_ERROR("invalid pipe reference\n");
  1364. return;
  1365. }
  1366. SDE_EVT32(DRMID(plane), psde->xin_halt_forced_clk, enable);
  1367. psde->xin_halt_forced_clk =
  1368. _sde_plane_halt_requests(plane, psde->pipe_hw->cap->xin_id,
  1369. psde->xin_halt_forced_clk, enable);
  1370. }
  1371. void sde_plane_secure_ctrl_xin_client(struct drm_plane *plane,
  1372. struct drm_crtc *crtc)
  1373. {
  1374. struct sde_plane *psde;
  1375. if (!plane || !crtc) {
  1376. SDE_ERROR("invalid plane/crtc\n");
  1377. return;
  1378. }
  1379. psde = to_sde_plane(plane);
  1380. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  1381. return;
  1382. /* do all VBIF programming for the sec-ui allowed SSPP */
  1383. _sde_plane_set_qos_remap(plane, true);
  1384. _sde_plane_set_ot_limit(plane, crtc);
  1385. }
  1386. /**
  1387. * sde_plane_rot_install_properties - install plane rotator properties
  1388. * @plane: Pointer to drm plane
  1389. * @catalog: Pointer to mdss configuration
  1390. * return: none
  1391. */
  1392. static void sde_plane_rot_install_properties(struct drm_plane *plane,
  1393. struct sde_mdss_cfg *catalog)
  1394. {
  1395. struct sde_plane *psde = to_sde_plane(plane);
  1396. unsigned long supported_rotations = DRM_MODE_ROTATE_0 |
  1397. DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y;
  1398. int ret = 0;
  1399. if (!plane || !psde) {
  1400. SDE_ERROR("invalid plane\n");
  1401. return;
  1402. } else if (!catalog) {
  1403. SDE_ERROR("invalid catalog\n");
  1404. return;
  1405. }
  1406. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT))
  1407. supported_rotations |= DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 |
  1408. DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270;
  1409. ret = drm_plane_create_rotation_property(plane,
  1410. DRM_MODE_ROTATE_0, supported_rotations);
  1411. if (ret) {
  1412. DRM_ERROR("create rotation property failed: %d\n", ret);
  1413. return;
  1414. }
  1415. }
  1416. void sde_plane_clear_multirect(const struct drm_plane_state *drm_state)
  1417. {
  1418. struct sde_plane_state *pstate;
  1419. if (!drm_state)
  1420. return;
  1421. pstate = to_sde_plane_state(drm_state);
  1422. pstate->multirect_index = SDE_SSPP_RECT_SOLO;
  1423. pstate->multirect_mode = SDE_SSPP_MULTIRECT_NONE;
  1424. }
  1425. /**
  1426. * multi_rect validate API allows to validate only R0 and R1 RECT
  1427. * passing for each plane. Client of this API must not pass multiple
  1428. * plane which are not sharing same XIN client. Such calls will fail
  1429. * even though kernel client is passing valid multirect configuration.
  1430. */
  1431. int sde_plane_validate_multirect_v2(struct sde_multirect_plane_states *plane)
  1432. {
  1433. struct sde_plane_state *pstate[R_MAX];
  1434. const struct drm_plane_state *drm_state[R_MAX];
  1435. struct sde_rect src[R_MAX], dst[R_MAX];
  1436. struct sde_plane *sde_plane[R_MAX];
  1437. const struct sde_format *fmt[R_MAX];
  1438. int xin_id[R_MAX];
  1439. bool q16_data = true;
  1440. int i, j, buffer_lines, width_threshold[R_MAX];
  1441. unsigned int max_tile_height = 1;
  1442. bool parallel_fetch_qualified = true;
  1443. enum sde_sspp_multirect_mode mode = SDE_SSPP_MULTIRECT_NONE;
  1444. const struct msm_format *msm_fmt;
  1445. bool const_alpha_enable = true;
  1446. for (i = 0; i < R_MAX; i++) {
  1447. drm_state[i] = i ? plane->r1 : plane->r0;
  1448. if (!drm_state[i]) {
  1449. SDE_ERROR("drm plane state is NULL\n");
  1450. return -EINVAL;
  1451. }
  1452. pstate[i] = to_sde_plane_state(drm_state[i]);
  1453. sde_plane[i] = to_sde_plane(drm_state[i]->plane);
  1454. xin_id[i] = sde_plane[i]->pipe_hw->cap->xin_id;
  1455. for (j = 0; j < i; j++) {
  1456. if (xin_id[i] != xin_id[j]) {
  1457. SDE_ERROR_PLANE(sde_plane[i],
  1458. "invalid multirect validate call base:%d xin_id:%d curr:%d xin:%d\n",
  1459. j, xin_id[j], i, xin_id[i]);
  1460. return -EINVAL;
  1461. }
  1462. }
  1463. msm_fmt = msm_framebuffer_format(drm_state[i]->fb);
  1464. if (!msm_fmt) {
  1465. SDE_ERROR_PLANE(sde_plane[i], "null fb\n");
  1466. return -EINVAL;
  1467. }
  1468. fmt[i] = to_sde_format(msm_fmt);
  1469. if (SDE_FORMAT_IS_UBWC(fmt[i]) &&
  1470. (fmt[i]->tile_height > max_tile_height))
  1471. max_tile_height = fmt[i]->tile_height;
  1472. POPULATE_RECT(&src[i], drm_state[i]->src_x, drm_state[i]->src_y,
  1473. drm_state[i]->src_w, drm_state[i]->src_h, q16_data);
  1474. POPULATE_RECT(&dst[i], drm_state[i]->crtc_x,
  1475. drm_state[i]->crtc_y, drm_state[i]->crtc_w,
  1476. drm_state[i]->crtc_h, !q16_data);
  1477. if (src[i].w != dst[i].w || src[i].h != dst[i].h) {
  1478. SDE_ERROR_PLANE(sde_plane[i],
  1479. "scaling is not supported in multirect mode\n");
  1480. return -EINVAL;
  1481. }
  1482. if (SDE_FORMAT_IS_YUV(fmt[i])) {
  1483. SDE_ERROR_PLANE(sde_plane[i],
  1484. "Unsupported format for multirect mode\n");
  1485. return -EINVAL;
  1486. }
  1487. /**
  1488. * SSPP PD_MEM is split half - one for each RECT.
  1489. * Tiled formats need 5 lines of buffering while fetching
  1490. * whereas linear formats need only 2 lines.
  1491. * So we cannot support more than half of the supported SSPP
  1492. * width for tiled formats.
  1493. */
  1494. width_threshold[i] = sde_plane[i]->pipe_sblk->maxlinewidth;
  1495. if (SDE_FORMAT_IS_UBWC(fmt[i]))
  1496. width_threshold[i] /= 2;
  1497. if (parallel_fetch_qualified && src[i].w > width_threshold[i])
  1498. parallel_fetch_qualified = false;
  1499. if (sde_plane[i]->is_virtual)
  1500. mode = sde_plane_get_property(pstate[i],
  1501. PLANE_PROP_MULTIRECT_MODE);
  1502. if (pstate[i]->const_alpha_en != const_alpha_enable)
  1503. const_alpha_enable = false;
  1504. }
  1505. buffer_lines = 2 * max_tile_height;
  1506. /**
  1507. * fallback to driver mode selection logic if client is using
  1508. * multirect plane without setting property.
  1509. *
  1510. * validate multirect mode configuration based on rectangle
  1511. */
  1512. switch (mode) {
  1513. case SDE_SSPP_MULTIRECT_NONE:
  1514. if (parallel_fetch_qualified)
  1515. mode = SDE_SSPP_MULTIRECT_PARALLEL;
  1516. else if (TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) ||
  1517. TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines))
  1518. mode = SDE_SSPP_MULTIRECT_TIME_MX;
  1519. else
  1520. SDE_ERROR(
  1521. "planes(%d - %d) multirect mode selection fail\n",
  1522. drm_state[R0]->plane->base.id,
  1523. drm_state[R1]->plane->base.id);
  1524. break;
  1525. case SDE_SSPP_MULTIRECT_PARALLEL:
  1526. if (!parallel_fetch_qualified) {
  1527. SDE_ERROR("R0 plane:%d width_threshold:%d src_w:%d\n",
  1528. drm_state[R0]->plane->base.id,
  1529. width_threshold[R0], src[R0].w);
  1530. SDE_ERROR("R1 plane:%d width_threshold:%d src_w:%d\n",
  1531. drm_state[R1]->plane->base.id,
  1532. width_threshold[R1], src[R1].w);
  1533. SDE_ERROR("parallel fetch not qualified\n");
  1534. mode = SDE_SSPP_MULTIRECT_NONE;
  1535. }
  1536. break;
  1537. case SDE_SSPP_MULTIRECT_TIME_MX:
  1538. if (!TIME_MULTIPLEX_RECT(dst[R1], dst[R0], buffer_lines) &&
  1539. !TIME_MULTIPLEX_RECT(dst[R0], dst[R1], buffer_lines)) {
  1540. SDE_ERROR(
  1541. "buffer_lines:%d R0 plane:%d dst_y:%d dst_h:%d\n",
  1542. buffer_lines, drm_state[R0]->plane->base.id,
  1543. dst[R0].y, dst[R0].h);
  1544. SDE_ERROR(
  1545. "buffer_lines:%d R1 plane:%d dst_y:%d dst_h:%d\n",
  1546. buffer_lines, drm_state[R1]->plane->base.id,
  1547. dst[R1].y, dst[R1].h);
  1548. SDE_ERROR("time multiplexed fetch not qualified\n");
  1549. mode = SDE_SSPP_MULTIRECT_NONE;
  1550. }
  1551. break;
  1552. default:
  1553. SDE_ERROR("bad mode:%d selection\n", mode);
  1554. mode = SDE_SSPP_MULTIRECT_NONE;
  1555. break;
  1556. }
  1557. for (i = 0; i < R_MAX; i++) {
  1558. pstate[i]->multirect_mode = mode;
  1559. pstate[i]->const_alpha_en = const_alpha_enable;
  1560. }
  1561. if (mode == SDE_SSPP_MULTIRECT_NONE)
  1562. return -EINVAL;
  1563. if (sde_plane[R0]->is_virtual) {
  1564. pstate[R0]->multirect_index = SDE_SSPP_RECT_1;
  1565. pstate[R1]->multirect_index = SDE_SSPP_RECT_0;
  1566. } else {
  1567. pstate[R0]->multirect_index = SDE_SSPP_RECT_0;
  1568. pstate[R1]->multirect_index = SDE_SSPP_RECT_1;
  1569. }
  1570. SDE_DEBUG_PLANE(sde_plane[R0], "R0: %d - %d\n",
  1571. pstate[R0]->multirect_mode, pstate[R0]->multirect_index);
  1572. SDE_DEBUG_PLANE(sde_plane[R1], "R1: %d - %d\n",
  1573. pstate[R1]->multirect_mode, pstate[R1]->multirect_index);
  1574. return 0;
  1575. }
  1576. /**
  1577. * sde_plane_ctl_flush - set/clear control flush bitmask for the given plane
  1578. * @plane: Pointer to drm plane structure
  1579. * @ctl: Pointer to hardware control driver
  1580. * @set: set if true else clear
  1581. */
  1582. void sde_plane_ctl_flush(struct drm_plane *plane, struct sde_hw_ctl *ctl,
  1583. bool set)
  1584. {
  1585. if (!plane || !ctl) {
  1586. SDE_ERROR("invalid parameters\n");
  1587. return;
  1588. }
  1589. if (!ctl->ops.update_bitmask_sspp) {
  1590. SDE_ERROR("invalid ops\n");
  1591. return;
  1592. }
  1593. ctl->ops.update_bitmask_sspp(ctl, sde_plane_pipe(plane), set);
  1594. }
  1595. static int sde_plane_prepare_fb(struct drm_plane *plane,
  1596. struct drm_plane_state *new_state)
  1597. {
  1598. struct drm_framebuffer *fb = new_state->fb;
  1599. struct sde_plane *psde = to_sde_plane(plane);
  1600. struct sde_plane_state *pstate = to_sde_plane_state(new_state);
  1601. struct sde_hw_fmt_layout layout;
  1602. struct msm_gem_address_space *aspace;
  1603. int ret;
  1604. if (!fb)
  1605. return 0;
  1606. SDE_DEBUG_PLANE(psde, "FB[%u]\n", fb->base.id);
  1607. ret = _sde_plane_get_aspace(psde, pstate, &aspace);
  1608. if (ret) {
  1609. SDE_ERROR_PLANE(psde, "Failed to get aspace\n");
  1610. return ret;
  1611. }
  1612. /* cache aspace */
  1613. pstate->aspace = aspace;
  1614. /*
  1615. * when transitioning from secure to non-secure,
  1616. * plane->prepare_fb happens before the commit. In such case,
  1617. * defer the prepare_fb and handled it late, during the commit
  1618. * after attaching the domains as part of the transition
  1619. */
  1620. pstate->defer_prepare_fb = (aspace && !aspace->domain_attached) ?
  1621. true : false;
  1622. if (pstate->defer_prepare_fb) {
  1623. SDE_EVT32(DRMID(plane), psde->pipe);
  1624. SDE_DEBUG_PLANE(psde,
  1625. "domain not attached, prepare_fb handled later\n");
  1626. return 0;
  1627. }
  1628. if (pstate->aspace && fb) {
  1629. ret = msm_framebuffer_prepare(fb,
  1630. pstate->aspace);
  1631. if (ret) {
  1632. SDE_ERROR("failed to prepare framebuffer\n");
  1633. return ret;
  1634. }
  1635. }
  1636. /* validate framebuffer layout before commit */
  1637. ret = sde_format_populate_layout(pstate->aspace,
  1638. fb, &layout);
  1639. if (ret) {
  1640. SDE_ERROR_PLANE(psde, "failed to get format layout, %d\n", ret);
  1641. return ret;
  1642. }
  1643. return 0;
  1644. }
  1645. /**
  1646. * _sde_plane_fetch_halt - halts vbif transactions for a plane
  1647. * @plane: Pointer to plane
  1648. * Returns: 0 on success
  1649. */
  1650. static int _sde_plane_fetch_halt(struct drm_plane *plane)
  1651. {
  1652. struct sde_plane *psde;
  1653. int xin_id;
  1654. enum sde_clk_ctrl_type clk_ctrl;
  1655. struct msm_drm_private *priv;
  1656. struct sde_kms *sde_kms;
  1657. psde = to_sde_plane(plane);
  1658. if (!plane || !plane->dev || !psde->pipe_hw) {
  1659. SDE_ERROR("invalid arguments\n");
  1660. return -EINVAL;
  1661. }
  1662. priv = plane->dev->dev_private;
  1663. if (!priv || !priv->kms) {
  1664. SDE_ERROR("invalid KMS reference\n");
  1665. return -EINVAL;
  1666. }
  1667. sde_kms = to_sde_kms(priv->kms);
  1668. clk_ctrl = psde->pipe_hw->cap->clk_ctrl;
  1669. xin_id = psde->pipe_hw->cap->xin_id;
  1670. SDE_DEBUG_PLANE(psde, "pipe:%d xin_id:%d clk_ctrl:%d\n",
  1671. psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1672. SDE_EVT32_VERBOSE(psde, psde->pipe - SSPP_VIG0, xin_id, clk_ctrl);
  1673. return sde_vbif_halt_plane_xin(sde_kms, xin_id, clk_ctrl);
  1674. }
  1675. static void sde_plane_cleanup_fb(struct drm_plane *plane,
  1676. struct drm_plane_state *old_state)
  1677. {
  1678. struct sde_plane *psde = to_sde_plane(plane);
  1679. struct sde_plane_state *old_pstate;
  1680. int ret;
  1681. if (!old_state || !old_state->fb || !plane || !plane->state)
  1682. return;
  1683. old_pstate = to_sde_plane_state(old_state);
  1684. SDE_DEBUG_PLANE(psde, "FB[%u]\n", old_state->fb->base.id);
  1685. /*
  1686. * plane->state gets populated for next frame after swap_state. If
  1687. * plane->state->crtc pointer is not populated then it is not used in
  1688. * the next frame, hence making it an unused plane.
  1689. */
  1690. if ((plane->state->crtc == NULL) && !psde->is_virtual) {
  1691. SDE_DEBUG_PLANE(psde, "unused pipe:%u\n",
  1692. psde->pipe - SSPP_VIG0);
  1693. /* halt this plane now */
  1694. ret = pm_runtime_get_sync(plane->dev->dev);
  1695. if (ret < 0) {
  1696. SDE_ERROR("power resource enable failed with %d", ret);
  1697. SDE_EVT32(ret, SDE_EVTLOG_ERROR);
  1698. return;
  1699. }
  1700. ret = _sde_plane_fetch_halt(plane);
  1701. if (ret) {
  1702. SDE_ERROR_PLANE(psde,
  1703. "unused pipe %u halt failed\n",
  1704. psde->pipe - SSPP_VIG0);
  1705. SDE_EVT32(DRMID(plane), psde->pipe - SSPP_VIG0,
  1706. ret, SDE_EVTLOG_ERROR);
  1707. }
  1708. pm_runtime_put_sync(plane->dev->dev);
  1709. }
  1710. msm_framebuffer_cleanup(old_state->fb, old_pstate->aspace);
  1711. }
  1712. static void _sde_plane_sspp_atomic_check_mode_changed(struct sde_plane *psde,
  1713. struct drm_plane_state *state,
  1714. struct drm_plane_state *old_state)
  1715. {
  1716. struct sde_plane_state *pstate = to_sde_plane_state(state);
  1717. struct sde_plane_state *old_pstate = to_sde_plane_state(old_state);
  1718. struct drm_framebuffer *fb, *old_fb;
  1719. /* no need to check it again */
  1720. if (pstate->dirty == SDE_PLANE_DIRTY_ALL)
  1721. return;
  1722. if (!sde_plane_enabled(state) || !sde_plane_enabled(old_state)
  1723. || psde->is_error) {
  1724. SDE_DEBUG_PLANE(psde,
  1725. "enabling/disabling full modeset required\n");
  1726. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1727. } else if (to_sde_plane_state(old_state)->pending) {
  1728. SDE_DEBUG_PLANE(psde, "still pending\n");
  1729. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1730. } else if (pstate->multirect_index != old_pstate->multirect_index ||
  1731. pstate->multirect_mode != old_pstate->multirect_mode) {
  1732. SDE_DEBUG_PLANE(psde, "multirect config updated\n");
  1733. pstate->dirty |= SDE_PLANE_DIRTY_ALL;
  1734. } else if (state->src_w != old_state->src_w ||
  1735. state->src_h != old_state->src_h ||
  1736. state->src_x != old_state->src_x ||
  1737. state->src_y != old_state->src_y) {
  1738. SDE_DEBUG_PLANE(psde, "src rect updated\n");
  1739. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1740. } else if (state->crtc_w != old_state->crtc_w ||
  1741. state->crtc_h != old_state->crtc_h ||
  1742. state->crtc_x != old_state->crtc_x ||
  1743. state->crtc_y != old_state->crtc_y) {
  1744. SDE_DEBUG_PLANE(psde, "crtc rect updated\n");
  1745. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1746. } else if (pstate->excl_rect.w != old_pstate->excl_rect.w ||
  1747. pstate->excl_rect.h != old_pstate->excl_rect.h ||
  1748. pstate->excl_rect.x != old_pstate->excl_rect.x ||
  1749. pstate->excl_rect.y != old_pstate->excl_rect.y) {
  1750. SDE_DEBUG_PLANE(psde, "excl_rect updated\n");
  1751. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1752. } else if (pstate->rotation != old_pstate->rotation) {
  1753. SDE_DEBUG_PLANE(psde, "rotation updated 0x%x->0x%x\n",
  1754. pstate->rotation, old_pstate->rotation);
  1755. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT;
  1756. }
  1757. fb = state->fb;
  1758. old_fb = old_state->fb;
  1759. if (!fb || !old_fb) {
  1760. SDE_DEBUG_PLANE(psde, "can't compare fb handles\n");
  1761. } else if ((fb->format->format != old_fb->format->format) ||
  1762. pstate->const_alpha_en != old_pstate->const_alpha_en) {
  1763. SDE_DEBUG_PLANE(psde, "format change\n");
  1764. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT | SDE_PLANE_DIRTY_RECTS;
  1765. } else {
  1766. uint64_t new_mod = fb->modifier;
  1767. uint64_t old_mod = old_fb->modifier;
  1768. uint32_t *new_pitches = fb->pitches;
  1769. uint32_t *old_pitches = old_fb->pitches;
  1770. uint32_t *new_offset = fb->offsets;
  1771. uint32_t *old_offset = old_fb->offsets;
  1772. int i;
  1773. if (new_mod != old_mod) {
  1774. SDE_DEBUG_PLANE(psde,
  1775. "format modifiers change new_mode:%llu old_mode:%llu\n",
  1776. new_mod, old_mod);
  1777. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1778. SDE_PLANE_DIRTY_RECTS;
  1779. }
  1780. for (i = 0; i < ARRAY_SIZE(fb->pitches); i++) {
  1781. if (new_pitches[i] != old_pitches[i]) {
  1782. SDE_DEBUG_PLANE(psde,
  1783. "pitches change plane:%d old_pitches:%u new_pitches:%u\n",
  1784. i, old_pitches[i], new_pitches[i]);
  1785. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  1786. break;
  1787. }
  1788. }
  1789. for (i = 0; i < ARRAY_SIZE(fb->offsets); i++) {
  1790. if (new_offset[i] != old_offset[i]) {
  1791. SDE_DEBUG_PLANE(psde,
  1792. "offset change plane:%d old_offset:%u new_offset:%u\n",
  1793. i, old_offset[i], new_offset[i]);
  1794. pstate->dirty |= SDE_PLANE_DIRTY_FORMAT |
  1795. SDE_PLANE_DIRTY_RECTS;
  1796. break;
  1797. }
  1798. }
  1799. }
  1800. }
  1801. int sde_plane_validate_src_addr(struct drm_plane *plane,
  1802. unsigned long base_addr, u32 size)
  1803. {
  1804. int ret = -EINVAL;
  1805. u32 addr;
  1806. struct sde_plane *psde = to_sde_plane(plane);
  1807. if (!psde || !base_addr || !size) {
  1808. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1809. return ret;
  1810. }
  1811. if (psde->pipe_hw && psde->pipe_hw->ops.get_sourceaddress) {
  1812. addr = psde->pipe_hw->ops.get_sourceaddress(psde->pipe_hw,
  1813. is_sde_plane_virtual(plane));
  1814. if ((addr >= base_addr) && (addr < (base_addr + size)))
  1815. ret = 0;
  1816. }
  1817. return ret;
  1818. }
  1819. static inline bool _sde_plane_is_pre_downscale_enabled(
  1820. struct sde_hw_inline_pre_downscale_cfg *pre_down)
  1821. {
  1822. return pre_down->pre_downscale_x_0 || pre_down->pre_downscale_y_0;
  1823. }
  1824. static int _sde_plane_validate_scaler_v2(struct sde_plane *psde,
  1825. struct sde_plane_state *pstate,
  1826. const struct sde_format *fmt,
  1827. uint32_t img_w, uint32_t img_h,
  1828. uint32_t src_w, uint32_t src_h,
  1829. uint32_t deci_w, uint32_t deci_h)
  1830. {
  1831. struct sde_hw_inline_pre_downscale_cfg *pd_cfg;
  1832. bool pre_down_en;
  1833. int i;
  1834. if (!psde || !pstate || !fmt) {
  1835. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  1836. return -EINVAL;
  1837. }
  1838. if (psde->debugfs_default_scale ||
  1839. (pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2 &&
  1840. pstate->scaler_check_state != SDE_PLANE_SCLCHECK_SCALER_V2_CHECK))
  1841. return 0;
  1842. pd_cfg = &pstate->pre_down;
  1843. pre_down_en = _sde_plane_is_pre_downscale_enabled(pd_cfg);
  1844. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_INVALID;
  1845. for (i = 0; i < SDE_MAX_PLANES; i++) {
  1846. uint32_t hor_req_pixels, hor_fetch_pixels;
  1847. uint32_t vert_req_pixels, vert_fetch_pixels;
  1848. uint32_t src_w_tmp, src_h_tmp;
  1849. uint32_t scaler_w, scaler_h;
  1850. uint32_t pre_down_ratio_x = 1, pre_down_ratio_y = 1;
  1851. bool rot;
  1852. /* re-use color plane 1's config for plane 2 */
  1853. if (i == 2)
  1854. continue;
  1855. if (pre_down_en) {
  1856. if (i == 0 && pd_cfg->pre_downscale_x_0)
  1857. pre_down_ratio_x = pd_cfg->pre_downscale_x_0;
  1858. if (i == 0 && pd_cfg->pre_downscale_y_0)
  1859. pre_down_ratio_y = pd_cfg->pre_downscale_y_0;
  1860. if ((i == 1 || i == 2) && pd_cfg->pre_downscale_x_1)
  1861. pre_down_ratio_x = pd_cfg->pre_downscale_x_1;
  1862. if ((i == 1 || i == 2) && pd_cfg->pre_downscale_y_1)
  1863. pre_down_ratio_y = pd_cfg->pre_downscale_y_1;
  1864. SDE_DEBUG_PLANE(psde, "pre_down[%d]: x:%d, y:%d\n",
  1865. i, pre_down_ratio_x, pre_down_ratio_y);
  1866. }
  1867. src_w_tmp = src_w;
  1868. src_h_tmp = src_h;
  1869. /*
  1870. * For chroma plane, width is half for the following sub sampled
  1871. * formats. Except in case of decimation, where hardware avoids
  1872. * 1 line of decimation instead of downsampling.
  1873. */
  1874. if (i == 1) {
  1875. if (!deci_w &&
  1876. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1877. fmt->chroma_sample == SDE_CHROMA_H2V1))
  1878. src_w_tmp >>= 1;
  1879. if (!deci_h &&
  1880. (fmt->chroma_sample == SDE_CHROMA_420 ||
  1881. fmt->chroma_sample == SDE_CHROMA_H1V2))
  1882. src_h_tmp >>= 1;
  1883. }
  1884. hor_req_pixels = pstate->pixel_ext.roi_w[i];
  1885. vert_req_pixels = pstate->pixel_ext.roi_h[i];
  1886. hor_fetch_pixels = DECIMATED_DIMENSION(src_w_tmp +
  1887. (int8_t)(pstate->pixel_ext.left_ftch[i] & 0xFF) +
  1888. (int8_t)(pstate->pixel_ext.right_ftch[i] & 0xFF),
  1889. deci_w);
  1890. vert_fetch_pixels = DECIMATED_DIMENSION(src_h_tmp +
  1891. (int8_t)(pstate->pixel_ext.top_ftch[i] & 0xFF) +
  1892. (int8_t)(pstate->pixel_ext.btm_ftch[i] & 0xFF),
  1893. deci_h);
  1894. if ((hor_req_pixels != hor_fetch_pixels) ||
  1895. (hor_fetch_pixels > img_w) ||
  1896. (vert_req_pixels != vert_fetch_pixels) ||
  1897. (vert_fetch_pixels > img_h)) {
  1898. SDE_ERROR_PLANE(psde,
  1899. "req %d/%d, fetch %d/%d, src %dx%d\n",
  1900. hor_req_pixels, vert_req_pixels,
  1901. hor_fetch_pixels, vert_fetch_pixels,
  1902. img_w, img_h);
  1903. return -EINVAL;
  1904. }
  1905. /*
  1906. * swap the scaler src width & height for inline-rotation 90
  1907. * comparison with Pixel-Extension, as PE is based on
  1908. * pre-rotation and QSEED is based on post-rotation
  1909. */
  1910. rot = pstate->rotation & DRM_MODE_ROTATE_90;
  1911. scaler_w = rot ? pstate->scaler3_cfg.src_height[i]
  1912. : pstate->scaler3_cfg.src_width[i];
  1913. scaler_h = rot ? pstate->scaler3_cfg.src_width[i]
  1914. : pstate->scaler3_cfg.src_height[i];
  1915. /*
  1916. * Alpha plane can only be scaled using bilinear or pixel
  1917. * repeat/drop, src_width and src_height are only specified
  1918. * for Y and UV plane
  1919. */
  1920. if (i != 3 && (hor_req_pixels / pre_down_ratio_x != scaler_w ||
  1921. vert_req_pixels / pre_down_ratio_y !=
  1922. scaler_h)) {
  1923. SDE_ERROR_PLANE(psde,
  1924. "roi[%d] roi:%dx%d scaler:%dx%d src:%dx%d rot:%d pd:%d/%d\n",
  1925. i, pstate->pixel_ext.roi_w[i],
  1926. pstate->pixel_ext.roi_h[i], scaler_w, scaler_h,
  1927. src_w, src_h, rot, pre_down_ratio_x, pre_down_ratio_y);
  1928. return -EINVAL;
  1929. }
  1930. /*
  1931. * SSPP fetch , unpack output and QSEED3 input lines need
  1932. * to match for Y plane
  1933. */
  1934. if (i == 0 &&
  1935. (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  1936. BIT(SDE_DRM_DEINTERLACE)) &&
  1937. ((pstate->scaler3_cfg.src_height[i] != (src_h/2)) ||
  1938. (pstate->pixel_ext.roi_h[i] != (src_h/2)))) {
  1939. SDE_ERROR_PLANE(psde,
  1940. "de-interlace fail roi[%d] %d/%d, src %dx%d, src %dx%d\n",
  1941. i, pstate->pixel_ext.roi_w[i],
  1942. pstate->pixel_ext.roi_h[i],
  1943. pstate->scaler3_cfg.src_width[i],
  1944. pstate->scaler3_cfg.src_height[i],
  1945. src_w, src_h);
  1946. return -EINVAL;
  1947. }
  1948. }
  1949. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2;
  1950. return 0;
  1951. }
  1952. static inline bool _sde_plane_has_pre_downscale(struct sde_plane *psde)
  1953. {
  1954. return (psde->features & BIT(SDE_SSPP_PREDOWNSCALE));
  1955. }
  1956. static int _sde_atomic_check_pre_downscale(struct sde_plane *psde,
  1957. struct sde_plane_state *pstate, struct sde_rect *dst,
  1958. u32 src_w, u32 src_h)
  1959. {
  1960. int ret = 0;
  1961. u32 min_ratio_numer, min_ratio_denom;
  1962. struct sde_hw_inline_pre_downscale_cfg *pd_cfg = &pstate->pre_down;
  1963. bool pd_x;
  1964. bool pd_y;
  1965. if (!_sde_plane_is_pre_downscale_enabled(pd_cfg))
  1966. return ret;
  1967. pd_x = pd_cfg->pre_downscale_x_0 > 1;
  1968. pd_y = pd_cfg->pre_downscale_y_0 > 1;
  1969. min_ratio_numer = psde->pipe_sblk->in_rot_maxdwnscale_rt_nopd_num;
  1970. min_ratio_denom = psde->pipe_sblk->in_rot_maxdwnscale_rt_nopd_denom;
  1971. if (pd_x && !_sde_plane_has_pre_downscale(psde)) {
  1972. SDE_ERROR_PLANE(psde,
  1973. "hw does not support pre-downscale X: 0x%x\n",
  1974. psde->features);
  1975. ret = -EINVAL;
  1976. } else if (pd_y && !(psde->features & BIT(SDE_SSPP_PREDOWNSCALE_Y))) {
  1977. SDE_ERROR_PLANE(psde,
  1978. "hw does not support pre-downscale Y: 0x%x\n",
  1979. psde->features);
  1980. ret = -EINVAL;
  1981. } else if (!min_ratio_numer || !min_ratio_denom) {
  1982. SDE_ERROR_PLANE(psde,
  1983. "min downscale ratio not set! %u / %u\n",
  1984. min_ratio_numer, min_ratio_denom);
  1985. ret = -EINVAL;
  1986. /* compare pre-rotated src w/h with post-rotated dst h/w resp. */
  1987. } else if (pd_x && (src_w < mult_frac(dst->h, min_ratio_numer,
  1988. min_ratio_denom))) {
  1989. SDE_ERROR_PLANE(psde,
  1990. "failed min downscale-x check %u->%u, %u/%u\n",
  1991. src_w, dst->h, min_ratio_numer, min_ratio_denom);
  1992. ret = -EINVAL;
  1993. } else if (pd_y && (src_h < mult_frac(dst->w, min_ratio_numer,
  1994. min_ratio_denom))) {
  1995. SDE_ERROR_PLANE(psde,
  1996. "failed min downscale-y check %u->%u, %u/%u\n",
  1997. src_h, dst->w, min_ratio_numer, min_ratio_denom);
  1998. ret = -EINVAL;
  1999. }
  2000. return ret;
  2001. }
  2002. static void _sde_plane_get_max_downscale_limits(struct sde_plane *psde,
  2003. struct sde_plane_state *pstate, bool rt_client,
  2004. u32 *max_numer_w, u32 *max_denom_w,
  2005. u32 *max_numer_h, u32 *max_denom_h)
  2006. {
  2007. bool rotated, has_predown;
  2008. const struct sde_sspp_sub_blks *sblk;
  2009. struct sde_hw_inline_pre_downscale_cfg *pd;
  2010. rotated = pstate->rotation & DRM_MODE_ROTATE_90;
  2011. sblk = psde->pipe_sblk;
  2012. *max_numer_w = sblk->maxdwnscale;
  2013. *max_denom_w = 1;
  2014. *max_numer_h = sblk->maxdwnscale;
  2015. *max_denom_h = 1;
  2016. has_predown = _sde_plane_has_pre_downscale(psde);
  2017. if (has_predown)
  2018. pd = &pstate->pre_down;
  2019. /**
  2020. * Inline rotation has different max vertical downscaling limits since
  2021. * the source-width becomes the scaler's pre-downscaled source-height.
  2022. **/
  2023. if (rotated) {
  2024. if (rt_client && has_predown) {
  2025. *max_numer_h = pd->pre_downscale_x_0 ?
  2026. sblk->in_rot_maxdwnscale_rt_num :
  2027. sblk->in_rot_maxdwnscale_rt_nopd_num;
  2028. *max_denom_h = pd->pre_downscale_x_0 ?
  2029. sblk->in_rot_maxdwnscale_rt_denom :
  2030. sblk->in_rot_maxdwnscale_rt_nopd_denom;
  2031. } else if (rt_client) {
  2032. *max_numer_h = sblk->in_rot_maxdwnscale_rt_num;
  2033. *max_denom_h = sblk->in_rot_maxdwnscale_rt_denom;
  2034. } else {
  2035. *max_numer_h = sblk->in_rot_maxdwnscale_nrt;
  2036. }
  2037. }
  2038. }
  2039. static int _sde_atomic_check_decimation_scaler(struct drm_plane_state *state,
  2040. struct sde_plane *psde, const struct sde_format *fmt,
  2041. struct sde_plane_state *pstate, struct sde_rect *src,
  2042. struct sde_rect *dst, u32 width, u32 height)
  2043. {
  2044. int ret = 0;
  2045. uint32_t deci_w, deci_h, src_deci_w, src_deci_h;
  2046. uint32_t scaler_src_w, scaler_src_h;
  2047. uint32_t max_downscale_num_w, max_downscale_denom_w;
  2048. uint32_t max_downscale_num_h, max_downscale_denom_h;
  2049. uint32_t max_upscale, max_linewidth;
  2050. bool inline_rotation, rt_client;
  2051. struct drm_crtc *crtc;
  2052. struct drm_crtc_state *new_cstate;
  2053. const struct sde_sspp_sub_blks *sblk;
  2054. if (!state || !state->state || !state->crtc) {
  2055. SDE_ERROR_PLANE(psde, "invalid arguments\n");
  2056. return -EINVAL;
  2057. }
  2058. deci_w = sde_plane_get_property(pstate, PLANE_PROP_H_DECIMATE);
  2059. deci_h = sde_plane_get_property(pstate, PLANE_PROP_V_DECIMATE);
  2060. src_deci_w = DECIMATED_DIMENSION(src->w, deci_w);
  2061. src_deci_h = DECIMATED_DIMENSION(src->h, deci_h);
  2062. /* with inline rotator, the source of the scaler is post-rotated */
  2063. inline_rotation = pstate->rotation & DRM_MODE_ROTATE_90 ? true : false;
  2064. if (inline_rotation) {
  2065. scaler_src_w = src_deci_h;
  2066. scaler_src_h = src_deci_w;
  2067. } else {
  2068. scaler_src_w = src_deci_w;
  2069. scaler_src_h = src_deci_h;
  2070. }
  2071. sblk = psde->pipe_sblk;
  2072. max_upscale = sblk->maxupscale;
  2073. max_linewidth = sblk->maxlinewidth;
  2074. crtc = state->crtc;
  2075. new_cstate = drm_atomic_get_new_crtc_state(state->state, crtc);
  2076. rt_client = sde_crtc_is_rt_client(crtc, new_cstate);
  2077. _sde_plane_get_max_downscale_limits(psde, pstate, rt_client,
  2078. &max_downscale_num_w, &max_downscale_denom_w,
  2079. &max_downscale_num_h, &max_downscale_denom_h);
  2080. /* decimation validation */
  2081. if ((deci_w || deci_h)
  2082. && ((deci_w > sblk->maxhdeciexp)
  2083. || (deci_h > sblk->maxvdeciexp))) {
  2084. SDE_ERROR_PLANE(psde, "too much decimation requested\n");
  2085. ret = -EINVAL;
  2086. } else if ((deci_w || deci_h)
  2087. && (fmt->fetch_mode != SDE_FETCH_LINEAR)) {
  2088. SDE_ERROR_PLANE(psde, "decimation requires linear fetch\n");
  2089. ret = -EINVAL;
  2090. } else if (!(psde->features & SDE_SSPP_SCALER) &&
  2091. ((src->w != dst->w) || (src->h != dst->h))) {
  2092. SDE_ERROR_PLANE(psde,
  2093. "pipe doesn't support scaling %ux%u->%ux%u\n",
  2094. src->w, src->h, dst->w, dst->h);
  2095. ret = -EINVAL;
  2096. /* check decimated source width */
  2097. } else if (src_deci_w > max_linewidth) {
  2098. SDE_ERROR_PLANE(psde,
  2099. "invalid src w:%u, deci w:%u, line w:%u\n",
  2100. src->w, src_deci_w, max_linewidth);
  2101. ret = -E2BIG;
  2102. /* check max scaler capability */
  2103. } else if (((scaler_src_w * max_upscale) < dst->w) ||
  2104. ((scaler_src_h * max_upscale) < dst->h) ||
  2105. (mult_frac(dst->w, max_downscale_num_w, max_downscale_denom_w)
  2106. < scaler_src_w) ||
  2107. (mult_frac(dst->h, max_downscale_num_h, max_downscale_denom_h)
  2108. < scaler_src_h)) {
  2109. SDE_ERROR_PLANE(psde,
  2110. "too much scaling %ux%u->%ux%u rot:%d dwn:%d/%d %d/%d\n",
  2111. scaler_src_w, scaler_src_h, dst->w, dst->h,
  2112. inline_rotation, max_downscale_num_w,
  2113. max_downscale_denom_w, max_downscale_num_h,
  2114. max_downscale_denom_h);
  2115. ret = -E2BIG;
  2116. /* check inline pre-downscale support */
  2117. } else if (inline_rotation && _sde_atomic_check_pre_downscale(psde,
  2118. pstate, dst, src_deci_w, src_deci_h)) {
  2119. ret = -EINVAL;
  2120. /* QSEED validation */
  2121. } else if (_sde_plane_validate_scaler_v2(psde, pstate, fmt,
  2122. width, height, src->w, src->h,
  2123. deci_w, deci_h)) {
  2124. ret = -EINVAL;
  2125. }
  2126. return ret;
  2127. }
  2128. static int _sde_atomic_check_excl_rect(struct sde_plane *psde,
  2129. struct sde_plane_state *pstate, struct sde_rect *src,
  2130. const struct sde_format *fmt, int ret)
  2131. {
  2132. /* check excl rect configs */
  2133. if (!ret && pstate->excl_rect.w && pstate->excl_rect.h) {
  2134. struct sde_rect intersect;
  2135. /*
  2136. * Check exclusion rect against src rect.
  2137. * it must intersect with source rect.
  2138. */
  2139. sde_kms_rect_intersect(src, &pstate->excl_rect, &intersect);
  2140. if (intersect.w != pstate->excl_rect.w ||
  2141. intersect.h != pstate->excl_rect.h ||
  2142. SDE_FORMAT_IS_YUV(fmt)) {
  2143. SDE_ERROR_PLANE(psde,
  2144. "invalid excl_rect:{%d,%d,%d,%d} src:{%d,%d,%d,%d}, fmt: %4.4s\n",
  2145. pstate->excl_rect.x, pstate->excl_rect.y,
  2146. pstate->excl_rect.w, pstate->excl_rect.h,
  2147. src->x, src->y, src->w, src->h,
  2148. (char *)&fmt->base.pixel_format);
  2149. ret = -EINVAL;
  2150. }
  2151. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  2152. pstate->excl_rect.x, pstate->excl_rect.y,
  2153. pstate->excl_rect.w, pstate->excl_rect.h);
  2154. }
  2155. return ret;
  2156. }
  2157. static int _sde_plane_validate_shared_crtc(struct sde_plane *psde,
  2158. struct drm_plane_state *state)
  2159. {
  2160. struct sde_kms *sde_kms;
  2161. struct sde_splash_display *splash_display;
  2162. int i, j;
  2163. sde_kms = _sde_plane_get_kms(&psde->base);
  2164. if (!sde_kms || !state->crtc)
  2165. return 0;
  2166. for (i = 0; i < MAX_DSI_DISPLAYS; i++) {
  2167. splash_display = &sde_kms->splash_data.splash_display[i];
  2168. if (splash_display && splash_display->cont_splash_enabled &&
  2169. splash_display->encoder &&
  2170. state->crtc != splash_display->encoder->crtc) {
  2171. for (j = 0; j < MAX_DATA_PATH_PER_DSIPLAY; j++) {
  2172. if (splash_display->pipes[j].sspp ==
  2173. psde->pipe) {
  2174. SDE_ERROR_PLANE(psde,
  2175. "pipe:%d used in cont-splash on crtc:%d\n",
  2176. psde->pipe,
  2177. splash_display->encoder->crtc->base.id);
  2178. return -EINVAL;
  2179. }
  2180. }
  2181. }
  2182. }
  2183. return 0;
  2184. }
  2185. static int sde_plane_sspp_atomic_check(struct drm_plane *plane,
  2186. struct drm_plane_state *state)
  2187. {
  2188. int ret = 0;
  2189. struct sde_plane *psde;
  2190. struct sde_plane_state *pstate;
  2191. const struct msm_format *msm_fmt;
  2192. const struct sde_format *fmt;
  2193. struct sde_rect src, dst;
  2194. uint32_t min_src_size;
  2195. bool q16_data = true;
  2196. struct drm_framebuffer *fb;
  2197. u32 width;
  2198. u32 height;
  2199. psde = to_sde_plane(plane);
  2200. pstate = to_sde_plane_state(state);
  2201. if (!psde->pipe_sblk) {
  2202. SDE_ERROR_PLANE(psde, "invalid catalog\n");
  2203. return -EINVAL;
  2204. }
  2205. /* src values are in Q16 fixed point, convert to integer */
  2206. POPULATE_RECT(&src, state->src_x, state->src_y,
  2207. state->src_w, state->src_h, q16_data);
  2208. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y, state->crtc_w,
  2209. state->crtc_h, !q16_data);
  2210. SDE_DEBUG_PLANE(psde, "check %d -> %d\n",
  2211. sde_plane_enabled(plane->state), sde_plane_enabled(state));
  2212. if (!sde_plane_enabled(state))
  2213. goto modeset_update;
  2214. fb = state->fb;
  2215. width = fb ? state->fb->width : 0x0;
  2216. height = fb ? state->fb->height : 0x0;
  2217. SDE_DEBUG("plane%d sspp:%x/%dx%d/%4.4s/%llx\n",
  2218. plane->base.id,
  2219. pstate->rotation,
  2220. width, height,
  2221. fb ? (char *) &state->fb->format->format : 0x0,
  2222. fb ? state->fb->modifier : 0x0);
  2223. SDE_DEBUG("src:%dx%d %d,%d crtc:%dx%d+%d+%d\n",
  2224. state->src_w >> 16, state->src_h >> 16,
  2225. state->src_x >> 16, state->src_y >> 16,
  2226. state->crtc_w, state->crtc_h,
  2227. state->crtc_x, state->crtc_y);
  2228. msm_fmt = msm_framebuffer_format(fb);
  2229. fmt = to_sde_format(msm_fmt);
  2230. min_src_size = SDE_FORMAT_IS_YUV(fmt) ? 2 : 1;
  2231. if (SDE_FORMAT_IS_YUV(fmt) &&
  2232. (!(psde->features & SDE_SSPP_SCALER) ||
  2233. !(psde->features & (BIT(SDE_SSPP_CSC)
  2234. | BIT(SDE_SSPP_CSC_10BIT))))) {
  2235. SDE_ERROR_PLANE(psde,
  2236. "plane doesn't have scaler/csc for yuv\n");
  2237. ret = -EINVAL;
  2238. /* check src bounds */
  2239. } else if (width > MAX_IMG_WIDTH ||
  2240. height > MAX_IMG_HEIGHT ||
  2241. src.w < min_src_size || src.h < min_src_size ||
  2242. CHECK_LAYER_BOUNDS(src.x, src.w, width) ||
  2243. CHECK_LAYER_BOUNDS(src.y, src.h, height)) {
  2244. SDE_ERROR_PLANE(psde, "invalid source %u, %u, %ux%u\n",
  2245. src.x, src.y, src.w, src.h);
  2246. ret = -E2BIG;
  2247. /* valid yuv image */
  2248. } else if (SDE_FORMAT_IS_YUV(fmt) && ((src.x & 0x1) || (src.y & 0x1) ||
  2249. (src.w & 0x1) || (src.h & 0x1))) {
  2250. SDE_ERROR_PLANE(psde, "invalid yuv source %u, %u, %ux%u\n",
  2251. src.x, src.y, src.w, src.h);
  2252. ret = -EINVAL;
  2253. /* min dst support */
  2254. } else if (dst.w < 0x1 || dst.h < 0x1) {
  2255. SDE_ERROR_PLANE(psde, "invalid dest rect %u, %u, %ux%u\n",
  2256. dst.x, dst.y, dst.w, dst.h);
  2257. ret = -EINVAL;
  2258. }
  2259. if (ret)
  2260. return ret;
  2261. ret = _sde_atomic_check_decimation_scaler(state, psde, fmt, pstate,
  2262. &src, &dst, width, height);
  2263. if (ret)
  2264. return ret;
  2265. ret = _sde_atomic_check_excl_rect(psde, pstate,
  2266. &src, fmt, ret);
  2267. if (ret)
  2268. return ret;
  2269. ret = _sde_plane_validate_shared_crtc(psde, state);
  2270. if (ret)
  2271. return ret;
  2272. pstate->const_alpha_en = fmt->alpha_enable &&
  2273. (SDE_DRM_BLEND_OP_OPAQUE !=
  2274. sde_plane_get_property(pstate, PLANE_PROP_BLEND_OP)) &&
  2275. (pstate->stage != SDE_STAGE_0);
  2276. modeset_update:
  2277. if (!ret)
  2278. _sde_plane_sspp_atomic_check_mode_changed(psde,
  2279. state, plane->state);
  2280. return ret;
  2281. }
  2282. static int sde_plane_atomic_check(struct drm_plane *plane,
  2283. struct drm_plane_state *state)
  2284. {
  2285. int ret = 0;
  2286. struct sde_plane *psde;
  2287. struct sde_plane_state *pstate;
  2288. if (!plane || !state) {
  2289. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  2290. !plane, !state);
  2291. ret = -EINVAL;
  2292. goto exit;
  2293. }
  2294. psde = to_sde_plane(plane);
  2295. pstate = to_sde_plane_state(state);
  2296. SDE_DEBUG_PLANE(psde, "\n");
  2297. ret = sde_plane_rot_atomic_check(plane, state);
  2298. if (ret)
  2299. goto exit;
  2300. ret = sde_plane_sspp_atomic_check(plane, state);
  2301. exit:
  2302. return ret;
  2303. }
  2304. void sde_plane_flush(struct drm_plane *plane)
  2305. {
  2306. struct sde_plane *psde;
  2307. struct sde_plane_state *pstate;
  2308. if (!plane || !plane->state) {
  2309. SDE_ERROR("invalid plane\n");
  2310. return;
  2311. }
  2312. psde = to_sde_plane(plane);
  2313. pstate = to_sde_plane_state(plane->state);
  2314. /*
  2315. * These updates have to be done immediately before the plane flush
  2316. * timing, and may not be moved to the atomic_update/mode_set functions.
  2317. */
  2318. if (psde->is_error)
  2319. /* force white frame with 100% alpha pipe output on error */
  2320. _sde_plane_color_fill(psde, 0xFFFFFF, 0xFF);
  2321. else if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG)
  2322. /* force 100% alpha */
  2323. _sde_plane_color_fill(psde, psde->color_fill, 0xFF);
  2324. else if (psde->pipe_hw && psde->csc_ptr && psde->pipe_hw->ops.setup_csc)
  2325. psde->pipe_hw->ops.setup_csc(psde->pipe_hw, psde->csc_ptr);
  2326. /* flag h/w flush complete */
  2327. if (plane->state)
  2328. pstate->pending = false;
  2329. }
  2330. /**
  2331. * sde_plane_set_error: enable/disable error condition
  2332. * @plane: pointer to drm_plane structure
  2333. */
  2334. void sde_plane_set_error(struct drm_plane *plane, bool error)
  2335. {
  2336. struct sde_plane *psde;
  2337. if (!plane)
  2338. return;
  2339. psde = to_sde_plane(plane);
  2340. psde->is_error = error;
  2341. }
  2342. static void _sde_plane_sspp_setup_sys_cache(struct sde_plane *psde,
  2343. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2344. {
  2345. if (!psde->pipe_hw->ops.setup_sys_cache ||
  2346. !(psde->perf_features & BIT(SDE_PERF_SSPP_SYS_CACHE)))
  2347. return;
  2348. SDE_DEBUG("features:0x%x rotation:0x%x\n",
  2349. psde->features, pstate->rotation);
  2350. if ((pstate->rotation & DRM_MODE_ROTATE_90) &&
  2351. sde_format_is_tp10_ubwc(fmt)) {
  2352. pstate->sc_cfg.rd_en = true;
  2353. pstate->sc_cfg.rd_scid =
  2354. psde->pipe_sblk->llcc_scid;
  2355. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2356. SSPP_SYS_CACHE_SCID;
  2357. } else {
  2358. pstate->sc_cfg.rd_en = false;
  2359. pstate->sc_cfg.rd_scid = 0x0;
  2360. pstate->sc_cfg.flags = SSPP_SYS_CACHE_EN_FLAG |
  2361. SSPP_SYS_CACHE_SCID;
  2362. }
  2363. psde->pipe_hw->ops.setup_sys_cache(
  2364. psde->pipe_hw, &pstate->sc_cfg);
  2365. }
  2366. static void _sde_plane_map_prop_to_dirty_bits(void)
  2367. {
  2368. plane_prop_array[PLANE_PROP_SCALER_V1] =
  2369. plane_prop_array[PLANE_PROP_SCALER_V2] =
  2370. plane_prop_array[PLANE_PROP_SCALER_LUT_ED] =
  2371. plane_prop_array[PLANE_PROP_SCALER_LUT_CIR] =
  2372. plane_prop_array[PLANE_PROP_SCALER_LUT_SEP] =
  2373. plane_prop_array[PLANE_PROP_H_DECIMATE] =
  2374. plane_prop_array[PLANE_PROP_V_DECIMATE] =
  2375. plane_prop_array[PLANE_PROP_SRC_CONFIG] =
  2376. plane_prop_array[PLANE_PROP_ZPOS] =
  2377. plane_prop_array[PLANE_PROP_EXCL_RECT_V1] =
  2378. SDE_PLANE_DIRTY_RECTS;
  2379. plane_prop_array[PLANE_PROP_CSC_V1] =
  2380. plane_prop_array[PLANE_PROP_CSC_DMA_V1] =
  2381. plane_prop_array[PLANE_PROP_INVERSE_PMA] =
  2382. SDE_PLANE_DIRTY_FORMAT;
  2383. plane_prop_array[PLANE_PROP_MULTIRECT_MODE] =
  2384. plane_prop_array[PLANE_PROP_COLOR_FILL] =
  2385. SDE_PLANE_DIRTY_ALL;
  2386. /* no special action required */
  2387. plane_prop_array[PLANE_PROP_INFO] =
  2388. plane_prop_array[PLANE_PROP_ALPHA] =
  2389. plane_prop_array[PLANE_PROP_INPUT_FENCE] =
  2390. plane_prop_array[PLANE_PROP_BLEND_OP] = 0;
  2391. plane_prop_array[PLANE_PROP_FB_TRANSLATION_MODE] =
  2392. SDE_PLANE_DIRTY_FB_TRANSLATION_MODE;
  2393. plane_prop_array[PLANE_PROP_PREFILL_SIZE] =
  2394. plane_prop_array[PLANE_PROP_PREFILL_TIME] =
  2395. SDE_PLANE_DIRTY_PERF;
  2396. plane_prop_array[PLANE_PROP_VIG_GAMUT] = SDE_PLANE_DIRTY_VIG_GAMUT;
  2397. plane_prop_array[PLANE_PROP_VIG_IGC] = SDE_PLANE_DIRTY_VIG_IGC;
  2398. plane_prop_array[PLANE_PROP_DMA_IGC] = SDE_PLANE_DIRTY_DMA_IGC;
  2399. plane_prop_array[PLANE_PROP_DMA_GC] = SDE_PLANE_DIRTY_DMA_GC;
  2400. plane_prop_array[PLANE_PROP_SKIN_COLOR] =
  2401. plane_prop_array[PLANE_PROP_SKY_COLOR] =
  2402. plane_prop_array[PLANE_PROP_FOLIAGE_COLOR] =
  2403. plane_prop_array[PLANE_PROP_HUE_ADJUST] =
  2404. plane_prop_array[PLANE_PROP_SATURATION_ADJUST] =
  2405. plane_prop_array[PLANE_PROP_VALUE_ADJUST] =
  2406. plane_prop_array[PLANE_PROP_CONTRAST_ADJUST] =
  2407. SDE_PLANE_DIRTY_ALL;
  2408. }
  2409. static inline bool _sde_plane_allow_uidle(struct sde_plane *psde,
  2410. struct sde_rect *src, struct sde_rect *dst)
  2411. {
  2412. u32 max_downscale = psde->catalog->uidle_cfg.max_dwnscale;
  2413. u32 downscale = (src->h * 1000)/dst->h;
  2414. return (downscale > max_downscale) ? false : true;
  2415. }
  2416. static void _sde_plane_setup_uidle(struct drm_crtc *crtc,
  2417. struct sde_plane *psde, struct sde_plane_state *pstate,
  2418. struct sde_rect *src, struct sde_rect *dst)
  2419. {
  2420. struct sde_hw_pipe_uidle_cfg cfg;
  2421. u32 line_time = sde_get_linetime(&crtc->mode); /* nS */
  2422. u32 fal1_target_idle_time_ns =
  2423. psde->catalog->uidle_cfg.fal1_target_idle_time * 1000; /* nS */
  2424. u32 fal10_target_idle_time_ns =
  2425. psde->catalog->uidle_cfg.fal10_target_idle_time * 1000; /* nS */
  2426. u32 fal10_threshold =
  2427. psde->catalog->uidle_cfg.fal10_threshold; /* uS */
  2428. if (line_time && fal10_threshold && fal10_target_idle_time_ns &&
  2429. fal1_target_idle_time_ns) {
  2430. cfg.enable = _sde_plane_allow_uidle(psde, src, dst);
  2431. cfg.fal10_threshold = fal10_threshold;
  2432. cfg.fal10_exit_threshold = fal10_threshold + 2;
  2433. cfg.fal1_threshold = 1 +
  2434. (fal1_target_idle_time_ns*1000/line_time*2)/1000;
  2435. cfg.fal_allowed_threshold = fal10_threshold +
  2436. (fal10_target_idle_time_ns*1000/line_time*2)/1000;
  2437. } else {
  2438. SDE_ERROR("invalid settings, will disable UIDLE %d %d %d %d\n",
  2439. line_time, fal10_threshold, fal10_target_idle_time_ns,
  2440. fal1_target_idle_time_ns);
  2441. memset(&cfg, 0, sizeof(struct sde_hw_pipe_uidle_cfg));
  2442. }
  2443. SDE_DEBUG_PLANE(psde,
  2444. "tholds: fal10=%d fal10_exit=%d fal1=%d fal_allowed=%d\n",
  2445. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2446. cfg.fal1_threshold, cfg.fal_allowed_threshold);
  2447. SDE_DEBUG_PLANE(psde,
  2448. "times: line:%d fal1_idle:%d fal10_idle:%d dwnscale:%d\n",
  2449. line_time, fal1_target_idle_time_ns,
  2450. fal10_target_idle_time_ns,
  2451. psde->catalog->uidle_cfg.max_dwnscale);
  2452. SDE_EVT32_VERBOSE(cfg.enable,
  2453. cfg.fal10_threshold, cfg.fal10_exit_threshold,
  2454. cfg.fal1_threshold, cfg.fal_allowed_threshold,
  2455. psde->catalog->uidle_cfg.max_dwnscale);
  2456. psde->pipe_hw->ops.setup_uidle(
  2457. psde->pipe_hw, &cfg,
  2458. pstate->multirect_index);
  2459. }
  2460. static void _sde_plane_update_secure_session(struct sde_plane *psde,
  2461. struct sde_plane_state *pstate)
  2462. {
  2463. bool enable = false;
  2464. int mode = sde_plane_get_property(pstate,
  2465. PLANE_PROP_FB_TRANSLATION_MODE);
  2466. if ((mode == SDE_DRM_FB_SEC) ||
  2467. (mode == SDE_DRM_FB_SEC_DIR_TRANS))
  2468. enable = true;
  2469. /* update secure session flag */
  2470. psde->pipe_hw->ops.setup_secure_address(psde->pipe_hw,
  2471. pstate->multirect_index,
  2472. enable);
  2473. }
  2474. static void _sde_plane_update_roi_config(struct drm_plane *plane,
  2475. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2476. {
  2477. const struct sde_format *fmt;
  2478. const struct msm_format *msm_fmt;
  2479. struct sde_plane *psde;
  2480. struct drm_plane_state *state;
  2481. struct sde_plane_state *pstate;
  2482. struct sde_rect src, dst;
  2483. const struct sde_rect *crtc_roi;
  2484. bool q16_data = true;
  2485. int idx;
  2486. psde = to_sde_plane(plane);
  2487. state = plane->state;
  2488. pstate = to_sde_plane_state(state);
  2489. msm_fmt = msm_framebuffer_format(fb);
  2490. if (!msm_fmt) {
  2491. SDE_ERROR("crtc%d plane%d: null format\n",
  2492. DRMID(crtc), DRMID(plane));
  2493. return;
  2494. }
  2495. fmt = to_sde_format(msm_fmt);
  2496. POPULATE_RECT(&src, state->src_x, state->src_y,
  2497. state->src_w, state->src_h, q16_data);
  2498. POPULATE_RECT(&dst, state->crtc_x, state->crtc_y,
  2499. state->crtc_w, state->crtc_h, !q16_data);
  2500. SDE_DEBUG_PLANE(psde,
  2501. "FB[%u] %u,%u,%ux%u->crtc%u %d,%d,%ux%u, %4.4s ubwc %d\n",
  2502. fb->base.id, src.x, src.y, src.w, src.h,
  2503. crtc->base.id, dst.x, dst.y, dst.w, dst.h,
  2504. (char *)&fmt->base.pixel_format,
  2505. SDE_FORMAT_IS_UBWC(fmt));
  2506. if (sde_plane_get_property(pstate, PLANE_PROP_SRC_CONFIG) &
  2507. BIT(SDE_DRM_DEINTERLACE)) {
  2508. SDE_DEBUG_PLANE(psde, "deinterlace\n");
  2509. for (idx = 0; idx < SDE_MAX_PLANES; ++idx)
  2510. psde->pipe_cfg.layout.plane_pitch[idx] <<= 1;
  2511. src.h /= 2;
  2512. src.y = DIV_ROUND_UP(src.y, 2);
  2513. src.y &= ~0x1;
  2514. }
  2515. /*
  2516. * adjust layer mixer position of the sspp in the presence
  2517. * of a partial update to the active lm origin
  2518. */
  2519. sde_crtc_get_crtc_roi(crtc->state, &crtc_roi);
  2520. dst.x -= crtc_roi->x;
  2521. dst.y -= crtc_roi->y;
  2522. /* check for UIDLE */
  2523. if (psde->pipe_hw->ops.setup_uidle)
  2524. _sde_plane_setup_uidle(crtc, psde, pstate, &src, &dst);
  2525. psde->pipe_cfg.src_rect = src;
  2526. psde->pipe_cfg.dst_rect = dst;
  2527. _sde_plane_setup_scaler(psde, pstate, fmt, false);
  2528. /* check for color fill */
  2529. psde->color_fill = (uint32_t)sde_plane_get_property(pstate,
  2530. PLANE_PROP_COLOR_FILL);
  2531. if (psde->color_fill & SDE_PLANE_COLOR_FILL_FLAG) {
  2532. /* skip remaining processing on color fill */
  2533. pstate->dirty = 0x0;
  2534. } else if (psde->pipe_hw->ops.setup_rects) {
  2535. psde->pipe_hw->ops.setup_rects(psde->pipe_hw,
  2536. &psde->pipe_cfg,
  2537. pstate->multirect_index);
  2538. }
  2539. if (psde->pipe_hw->ops.setup_pe &&
  2540. (pstate->multirect_index != SDE_SSPP_RECT_1))
  2541. psde->pipe_hw->ops.setup_pe(psde->pipe_hw,
  2542. &pstate->pixel_ext);
  2543. /**
  2544. * when programmed in multirect mode, scalar block will be
  2545. * bypassed. Still we need to update alpha and bitwidth
  2546. * ONLY for RECT0
  2547. */
  2548. if (psde->pipe_hw->ops.setup_scaler &&
  2549. pstate->multirect_index != SDE_SSPP_RECT_1) {
  2550. psde->pipe_hw->ctl = _sde_plane_get_hw_ctl(plane);
  2551. psde->pipe_hw->ops.setup_scaler(psde->pipe_hw,
  2552. &psde->pipe_cfg, &pstate->pixel_ext,
  2553. &pstate->scaler3_cfg);
  2554. }
  2555. /* update excl rect */
  2556. if (psde->pipe_hw->ops.setup_excl_rect)
  2557. psde->pipe_hw->ops.setup_excl_rect(psde->pipe_hw,
  2558. &pstate->excl_rect,
  2559. pstate->multirect_index);
  2560. if (psde->pipe_hw->ops.setup_multirect)
  2561. psde->pipe_hw->ops.setup_multirect(
  2562. psde->pipe_hw,
  2563. pstate->multirect_index,
  2564. pstate->multirect_mode);
  2565. }
  2566. static void _sde_plane_update_format_and_rects(struct sde_plane *psde,
  2567. struct sde_plane_state *pstate, const struct sde_format *fmt)
  2568. {
  2569. uint32_t src_flags = 0;
  2570. SDE_DEBUG_PLANE(psde, "rotation 0x%X\n", pstate->rotation);
  2571. if (pstate->rotation & DRM_MODE_REFLECT_X)
  2572. src_flags |= SDE_SSPP_FLIP_LR;
  2573. if (pstate->rotation & DRM_MODE_REFLECT_Y)
  2574. src_flags |= SDE_SSPP_FLIP_UD;
  2575. if (pstate->rotation & DRM_MODE_ROTATE_90)
  2576. src_flags |= SDE_SSPP_ROT_90;
  2577. /* update format */
  2578. psde->pipe_hw->ops.setup_format(psde->pipe_hw, fmt,
  2579. pstate->const_alpha_en, src_flags,
  2580. pstate->multirect_index);
  2581. if (psde->pipe_hw->ops.setup_cdp) {
  2582. struct sde_hw_pipe_cdp_cfg *cdp_cfg = &pstate->cdp_cfg;
  2583. memset(cdp_cfg, 0, sizeof(struct sde_hw_pipe_cdp_cfg));
  2584. cdp_cfg->enable = psde->catalog->perf.cdp_cfg
  2585. [SDE_PERF_CDP_USAGE_RT].rd_enable;
  2586. cdp_cfg->ubwc_meta_enable =
  2587. SDE_FORMAT_IS_UBWC(fmt);
  2588. cdp_cfg->tile_amortize_enable =
  2589. SDE_FORMAT_IS_UBWC(fmt) ||
  2590. SDE_FORMAT_IS_TILE(fmt);
  2591. cdp_cfg->preload_ahead = SDE_WB_CDP_PRELOAD_AHEAD_64;
  2592. psde->pipe_hw->ops.setup_cdp(psde->pipe_hw, cdp_cfg,
  2593. pstate->multirect_index);
  2594. }
  2595. _sde_plane_sspp_setup_sys_cache(psde, pstate, fmt);
  2596. /* update csc */
  2597. if (SDE_FORMAT_IS_YUV(fmt))
  2598. _sde_plane_setup_csc(psde);
  2599. else
  2600. psde->csc_ptr = 0;
  2601. if (psde->pipe_hw->ops.setup_inverse_pma) {
  2602. uint32_t pma_mode = 0;
  2603. if (fmt->alpha_enable)
  2604. pma_mode = (uint32_t) sde_plane_get_property(
  2605. pstate, PLANE_PROP_INVERSE_PMA);
  2606. psde->pipe_hw->ops.setup_inverse_pma(psde->pipe_hw,
  2607. pstate->multirect_index, pma_mode);
  2608. }
  2609. if (psde->pipe_hw->ops.setup_dgm_csc)
  2610. psde->pipe_hw->ops.setup_dgm_csc(psde->pipe_hw,
  2611. pstate->multirect_index, psde->csc_usr_ptr);
  2612. }
  2613. static void _sde_plane_update_sharpening(struct sde_plane *psde)
  2614. {
  2615. psde->sharp_cfg.strength = SHARP_STRENGTH_DEFAULT;
  2616. psde->sharp_cfg.edge_thr = SHARP_EDGE_THR_DEFAULT;
  2617. psde->sharp_cfg.smooth_thr = SHARP_SMOOTH_THR_DEFAULT;
  2618. psde->sharp_cfg.noise_thr = SHARP_NOISE_THR_DEFAULT;
  2619. psde->pipe_hw->ops.setup_sharpening(psde->pipe_hw,
  2620. &psde->sharp_cfg);
  2621. }
  2622. static void _sde_plane_update_properties(struct drm_plane *plane,
  2623. struct drm_crtc *crtc, struct drm_framebuffer *fb)
  2624. {
  2625. uint32_t nplanes;
  2626. const struct msm_format *msm_fmt;
  2627. const struct sde_format *fmt;
  2628. struct sde_plane *psde;
  2629. struct drm_plane_state *state;
  2630. struct sde_plane_state *pstate;
  2631. psde = to_sde_plane(plane);
  2632. state = plane->state;
  2633. pstate = to_sde_plane_state(state);
  2634. if (!pstate) {
  2635. SDE_ERROR("invalid plane state for plane%d\n", DRMID(plane));
  2636. return;
  2637. }
  2638. msm_fmt = msm_framebuffer_format(fb);
  2639. if (!msm_fmt) {
  2640. SDE_ERROR("crtc%d plane%d: null format\n",
  2641. DRMID(crtc), DRMID(plane));
  2642. return;
  2643. }
  2644. fmt = to_sde_format(msm_fmt);
  2645. nplanes = fmt->num_planes;
  2646. /* update secure session flag */
  2647. if (pstate->dirty & SDE_PLANE_DIRTY_FB_TRANSLATION_MODE)
  2648. _sde_plane_update_secure_session(psde, pstate);
  2649. /* update roi config */
  2650. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2651. _sde_plane_update_roi_config(plane, crtc, fb);
  2652. if ((pstate->dirty & SDE_PLANE_DIRTY_FORMAT ||
  2653. pstate->dirty & SDE_PLANE_DIRTY_RECTS) &&
  2654. psde->pipe_hw->ops.setup_format)
  2655. _sde_plane_update_format_and_rects(psde, pstate, fmt);
  2656. sde_color_process_plane_setup(plane);
  2657. /* update sharpening */
  2658. if ((pstate->dirty & SDE_PLANE_DIRTY_SHARPEN) &&
  2659. psde->pipe_hw->ops.setup_sharpening)
  2660. _sde_plane_update_sharpening(psde);
  2661. _sde_plane_set_qos_lut(plane, crtc, fb);
  2662. if (plane->type != DRM_PLANE_TYPE_CURSOR) {
  2663. _sde_plane_set_qos_ctrl(plane, true, SDE_PLANE_QOS_PANIC_CTRL);
  2664. _sde_plane_set_ot_limit(plane, crtc);
  2665. if (pstate->dirty & SDE_PLANE_DIRTY_PERF)
  2666. _sde_plane_set_ts_prefill(plane, pstate);
  2667. }
  2668. if ((pstate->dirty & SDE_PLANE_DIRTY_ALL) == SDE_PLANE_DIRTY_ALL)
  2669. _sde_plane_set_qos_remap(plane, true);
  2670. else
  2671. _sde_plane_set_qos_remap(plane, false);
  2672. /* clear dirty */
  2673. pstate->dirty = 0x0;
  2674. }
  2675. static int sde_plane_sspp_atomic_update(struct drm_plane *plane,
  2676. struct drm_plane_state *old_state)
  2677. {
  2678. struct sde_plane *psde;
  2679. struct drm_plane_state *state;
  2680. struct sde_plane_state *pstate;
  2681. struct sde_plane_state *old_pstate;
  2682. struct drm_crtc *crtc;
  2683. struct drm_framebuffer *fb;
  2684. int idx;
  2685. int dirty_prop_flag;
  2686. if (!plane) {
  2687. SDE_ERROR("invalid plane\n");
  2688. return -EINVAL;
  2689. } else if (!plane->state) {
  2690. SDE_ERROR("invalid plane state\n");
  2691. return -EINVAL;
  2692. } else if (!old_state) {
  2693. SDE_ERROR("invalid old state\n");
  2694. return -EINVAL;
  2695. }
  2696. psde = to_sde_plane(plane);
  2697. state = plane->state;
  2698. pstate = to_sde_plane_state(state);
  2699. old_pstate = to_sde_plane_state(old_state);
  2700. crtc = state->crtc;
  2701. fb = state->fb;
  2702. if (!crtc || !fb) {
  2703. SDE_ERROR_PLANE(psde, "invalid crtc %d or fb %d\n",
  2704. !crtc, !fb);
  2705. return -EINVAL;
  2706. }
  2707. SDE_DEBUG(
  2708. "plane%d sspp:%dx%d/%4.4s/%llx/%dx%d+%d+%d/%x crtc:%dx%d+%d+%d\n",
  2709. plane->base.id,
  2710. state->fb->width, state->fb->height,
  2711. (char *) &state->fb->format->format,
  2712. state->fb->modifier,
  2713. state->src_w >> 16, state->src_h >> 16,
  2714. state->src_x >> 16, state->src_y >> 16,
  2715. pstate->rotation,
  2716. state->crtc_w, state->crtc_h,
  2717. state->crtc_x, state->crtc_y);
  2718. /* force reprogramming of all the parameters, if the flag is set */
  2719. if (psde->revalidate) {
  2720. SDE_DEBUG("plane:%d - reconfigure all the parameters\n",
  2721. plane->base.id);
  2722. pstate->dirty = SDE_PLANE_DIRTY_ALL | SDE_PLANE_DIRTY_CP;
  2723. psde->revalidate = false;
  2724. }
  2725. /* determine what needs to be refreshed */
  2726. mutex_lock(&psde->property_info.property_lock);
  2727. while ((idx = msm_property_pop_dirty(&psde->property_info,
  2728. &pstate->property_state)) >= 0) {
  2729. dirty_prop_flag = plane_prop_array[idx];
  2730. pstate->dirty |= dirty_prop_flag;
  2731. }
  2732. mutex_unlock(&psde->property_info.property_lock);
  2733. /**
  2734. * since plane_atomic_check is invoked before crtc_atomic_check
  2735. * in the commit sequence, all the parameters for updating the
  2736. * plane dirty flag will not be available during
  2737. * plane_atomic_check as some features params are updated
  2738. * in crtc_atomic_check (eg.:sDMA). So check for mode_change
  2739. * before sspp update.
  2740. */
  2741. _sde_plane_sspp_atomic_check_mode_changed(psde, state,
  2742. old_state);
  2743. /* re-program the output rects always if partial update roi changed */
  2744. if (sde_crtc_is_crtc_roi_dirty(crtc->state))
  2745. pstate->dirty |= SDE_PLANE_DIRTY_RECTS;
  2746. if (pstate->dirty & SDE_PLANE_DIRTY_RECTS)
  2747. memset(&(psde->pipe_cfg), 0, sizeof(struct sde_hw_pipe_cfg));
  2748. _sde_plane_set_scanout(plane, pstate, &psde->pipe_cfg, fb);
  2749. /* early out if nothing dirty */
  2750. if (!pstate->dirty)
  2751. return 0;
  2752. pstate->pending = true;
  2753. psde->is_rt_pipe = sde_crtc_is_rt_client(crtc, crtc->state);
  2754. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  2755. _sde_plane_update_properties(plane, crtc, fb);
  2756. return 0;
  2757. }
  2758. static void _sde_plane_atomic_disable(struct drm_plane *plane,
  2759. struct drm_plane_state *old_state)
  2760. {
  2761. struct sde_plane *psde;
  2762. struct drm_plane_state *state;
  2763. struct sde_plane_state *pstate;
  2764. if (!plane) {
  2765. SDE_ERROR("invalid plane\n");
  2766. return;
  2767. } else if (!plane->state) {
  2768. SDE_ERROR("invalid plane state\n");
  2769. return;
  2770. } else if (!old_state) {
  2771. SDE_ERROR("invalid old state\n");
  2772. return;
  2773. }
  2774. psde = to_sde_plane(plane);
  2775. state = plane->state;
  2776. pstate = to_sde_plane_state(state);
  2777. SDE_EVT32(DRMID(plane), is_sde_plane_virtual(plane),
  2778. pstate->multirect_mode);
  2779. pstate->pending = true;
  2780. if (is_sde_plane_virtual(plane) &&
  2781. psde->pipe_hw && psde->pipe_hw->ops.setup_multirect)
  2782. psde->pipe_hw->ops.setup_multirect(psde->pipe_hw,
  2783. SDE_SSPP_RECT_SOLO, SDE_SSPP_MULTIRECT_NONE);
  2784. }
  2785. static void sde_plane_atomic_update(struct drm_plane *plane,
  2786. struct drm_plane_state *old_state)
  2787. {
  2788. struct sde_plane *psde;
  2789. struct drm_plane_state *state;
  2790. if (!plane) {
  2791. SDE_ERROR("invalid plane\n");
  2792. return;
  2793. } else if (!plane->state) {
  2794. SDE_ERROR("invalid plane state\n");
  2795. return;
  2796. }
  2797. psde = to_sde_plane(plane);
  2798. psde->is_error = false;
  2799. state = plane->state;
  2800. SDE_DEBUG_PLANE(psde, "\n");
  2801. if (!sde_plane_enabled(state)) {
  2802. _sde_plane_atomic_disable(plane, old_state);
  2803. } else {
  2804. int ret;
  2805. ret = sde_plane_sspp_atomic_update(plane, old_state);
  2806. /* atomic_check should have ensured that this doesn't fail */
  2807. WARN_ON(ret < 0);
  2808. }
  2809. }
  2810. void sde_plane_restore(struct drm_plane *plane)
  2811. {
  2812. struct sde_plane *psde;
  2813. if (!plane || !plane->state) {
  2814. SDE_ERROR("invalid plane\n");
  2815. return;
  2816. }
  2817. psde = to_sde_plane(plane);
  2818. /*
  2819. * Revalidate is only true here if idle PC occurred and
  2820. * there is no plane state update in current commit cycle.
  2821. */
  2822. if (!psde->revalidate)
  2823. return;
  2824. SDE_DEBUG_PLANE(psde, "\n");
  2825. /* last plane state is same as current state */
  2826. sde_plane_atomic_update(plane, plane->state);
  2827. }
  2828. bool sde_plane_is_cache_required(struct drm_plane *plane)
  2829. {
  2830. struct sde_plane_state *pstate;
  2831. if (!plane || !plane->state) {
  2832. SDE_ERROR("invalid plane\n");
  2833. return false;
  2834. }
  2835. pstate = to_sde_plane_state(plane->state);
  2836. /* check if llcc is required for the plane */
  2837. if (pstate->sc_cfg.rd_en)
  2838. return true;
  2839. else
  2840. return false;
  2841. }
  2842. static void _sde_plane_install_master_only_properties(struct sde_plane *psde)
  2843. {
  2844. char feature_name[256];
  2845. if (psde->pipe_sblk->maxhdeciexp) {
  2846. msm_property_install_range(&psde->property_info,
  2847. "h_decimate", 0x0, 0,
  2848. psde->pipe_sblk->maxhdeciexp, 0,
  2849. PLANE_PROP_H_DECIMATE);
  2850. }
  2851. if (psde->pipe_sblk->maxvdeciexp) {
  2852. msm_property_install_range(&psde->property_info,
  2853. "v_decimate", 0x0, 0,
  2854. psde->pipe_sblk->maxvdeciexp, 0,
  2855. PLANE_PROP_V_DECIMATE);
  2856. }
  2857. if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3)) {
  2858. msm_property_install_range(
  2859. &psde->property_info, "scaler_v2",
  2860. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2861. msm_property_install_blob(&psde->property_info,
  2862. "lut_ed", 0, PLANE_PROP_SCALER_LUT_ED);
  2863. msm_property_install_blob(&psde->property_info,
  2864. "lut_cir", 0,
  2865. PLANE_PROP_SCALER_LUT_CIR);
  2866. msm_property_install_blob(&psde->property_info,
  2867. "lut_sep", 0,
  2868. PLANE_PROP_SCALER_LUT_SEP);
  2869. } else if (psde->features & BIT(SDE_SSPP_SCALER_QSEED3LITE)) {
  2870. msm_property_install_range(
  2871. &psde->property_info, "scaler_v2",
  2872. 0x0, 0, ~0, 0, PLANE_PROP_SCALER_V2);
  2873. msm_property_install_blob(&psde->property_info,
  2874. "lut_sep", 0,
  2875. PLANE_PROP_SCALER_LUT_SEP);
  2876. } else if (psde->features & SDE_SSPP_SCALER) {
  2877. msm_property_install_range(
  2878. &psde->property_info, "scaler_v1", 0x0,
  2879. 0, ~0, 0, PLANE_PROP_SCALER_V1);
  2880. }
  2881. if (psde->features & BIT(SDE_SSPP_CSC) ||
  2882. psde->features & BIT(SDE_SSPP_CSC_10BIT))
  2883. msm_property_install_volatile_range(
  2884. &psde->property_info, "csc_v1", 0x0,
  2885. 0, ~0, 0, PLANE_PROP_CSC_V1);
  2886. if (psde->features & BIT(SDE_SSPP_HSIC)) {
  2887. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2888. "SDE_SSPP_HUE_V",
  2889. psde->pipe_sblk->hsic_blk.version >> 16);
  2890. msm_property_install_range(&psde->property_info,
  2891. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2892. PLANE_PROP_HUE_ADJUST);
  2893. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2894. "SDE_SSPP_SATURATION_V",
  2895. psde->pipe_sblk->hsic_blk.version >> 16);
  2896. msm_property_install_range(&psde->property_info,
  2897. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2898. PLANE_PROP_SATURATION_ADJUST);
  2899. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2900. "SDE_SSPP_VALUE_V",
  2901. psde->pipe_sblk->hsic_blk.version >> 16);
  2902. msm_property_install_range(&psde->property_info,
  2903. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2904. PLANE_PROP_VALUE_ADJUST);
  2905. snprintf(feature_name, sizeof(feature_name), "%s%d",
  2906. "SDE_SSPP_CONTRAST_V",
  2907. psde->pipe_sblk->hsic_blk.version >> 16);
  2908. msm_property_install_range(&psde->property_info,
  2909. feature_name, 0, 0, 0xFFFFFFFF, 0,
  2910. PLANE_PROP_CONTRAST_ADJUST);
  2911. }
  2912. }
  2913. /* helper to install properties which are common to planes and crtcs */
  2914. static void _sde_plane_install_properties(struct drm_plane *plane,
  2915. struct sde_mdss_cfg *catalog, u32 master_plane_id)
  2916. {
  2917. static const struct drm_prop_enum_list e_blend_op[] = {
  2918. {SDE_DRM_BLEND_OP_NOT_DEFINED, "not_defined"},
  2919. {SDE_DRM_BLEND_OP_OPAQUE, "opaque"},
  2920. {SDE_DRM_BLEND_OP_PREMULTIPLIED, "premultiplied"},
  2921. {SDE_DRM_BLEND_OP_COVERAGE, "coverage"}
  2922. };
  2923. static const struct drm_prop_enum_list e_src_config[] = {
  2924. {SDE_DRM_DEINTERLACE, "deinterlace"}
  2925. };
  2926. static const struct drm_prop_enum_list e_fb_translation_mode[] = {
  2927. {SDE_DRM_FB_NON_SEC, "non_sec"},
  2928. {SDE_DRM_FB_SEC, "sec"},
  2929. {SDE_DRM_FB_NON_SEC_DIR_TRANS, "non_sec_direct_translation"},
  2930. {SDE_DRM_FB_SEC_DIR_TRANS, "sec_direct_translation"},
  2931. };
  2932. static const struct drm_prop_enum_list e_multirect_mode[] = {
  2933. {SDE_SSPP_MULTIRECT_NONE, "none"},
  2934. {SDE_SSPP_MULTIRECT_PARALLEL, "parallel"},
  2935. {SDE_SSPP_MULTIRECT_TIME_MX, "serial"},
  2936. };
  2937. const struct sde_format_extended *format_list;
  2938. struct sde_kms_info *info;
  2939. struct sde_plane *psde = to_sde_plane(plane);
  2940. bool is_master;
  2941. int zpos_max = 255;
  2942. int zpos_def = 0;
  2943. char feature_name[256];
  2944. if (!plane || !psde) {
  2945. SDE_ERROR("invalid plane\n");
  2946. return;
  2947. } else if (!psde->pipe_hw || !psde->pipe_sblk) {
  2948. SDE_ERROR("invalid plane, pipe_hw %d pipe_sblk %d\n",
  2949. !psde->pipe_hw, !psde->pipe_sblk);
  2950. return;
  2951. } else if (!catalog) {
  2952. SDE_ERROR("invalid catalog\n");
  2953. return;
  2954. }
  2955. psde->catalog = catalog;
  2956. is_master = !psde->is_virtual;
  2957. if (sde_is_custom_client()) {
  2958. if (catalog->mixer_count &&
  2959. catalog->mixer[0].sblk->maxblendstages) {
  2960. zpos_max = catalog->mixer[0].sblk->maxblendstages - 1;
  2961. if (zpos_max > SDE_STAGE_MAX - SDE_STAGE_0 - 1)
  2962. zpos_max = SDE_STAGE_MAX - SDE_STAGE_0 - 1;
  2963. }
  2964. } else if (plane->type != DRM_PLANE_TYPE_PRIMARY) {
  2965. /* reserve zpos == 0 for primary planes */
  2966. zpos_def = drm_plane_index(plane) + 1;
  2967. }
  2968. msm_property_install_range(&psde->property_info, "zpos",
  2969. 0x0, 0, zpos_max, zpos_def, PLANE_PROP_ZPOS);
  2970. msm_property_install_range(&psde->property_info, "alpha",
  2971. 0x0, 0, 255, 255, PLANE_PROP_ALPHA);
  2972. /* linux default file descriptor range on each process */
  2973. msm_property_install_range(&psde->property_info, "input_fence",
  2974. 0x0, 0, INR_OPEN_MAX, 0, PLANE_PROP_INPUT_FENCE);
  2975. if (is_master)
  2976. _sde_plane_install_master_only_properties(psde);
  2977. if (psde->features & BIT(SDE_SSPP_EXCL_RECT))
  2978. msm_property_install_volatile_range(&psde->property_info,
  2979. "excl_rect_v1", 0x0, 0, ~0, 0, PLANE_PROP_EXCL_RECT_V1);
  2980. sde_plane_rot_install_properties(plane, catalog);
  2981. msm_property_install_enum(&psde->property_info, "blend_op", 0x0, 0,
  2982. e_blend_op, ARRAY_SIZE(e_blend_op), PLANE_PROP_BLEND_OP);
  2983. msm_property_install_enum(&psde->property_info, "src_config", 0x0, 1,
  2984. e_src_config, ARRAY_SIZE(e_src_config), PLANE_PROP_SRC_CONFIG);
  2985. if (psde->pipe_hw->ops.setup_solidfill)
  2986. msm_property_install_range(&psde->property_info, "color_fill",
  2987. 0, 0, 0xFFFFFFFF, 0, PLANE_PROP_COLOR_FILL);
  2988. msm_property_install_range(&psde->property_info,
  2989. "prefill_size", 0x0, 0, ~0, 0,
  2990. PLANE_PROP_PREFILL_SIZE);
  2991. msm_property_install_range(&psde->property_info,
  2992. "prefill_time", 0x0, 0, ~0, 0,
  2993. PLANE_PROP_PREFILL_TIME);
  2994. info = kzalloc(sizeof(struct sde_kms_info), GFP_KERNEL);
  2995. if (!info) {
  2996. SDE_ERROR("failed to allocate info memory\n");
  2997. return;
  2998. }
  2999. msm_property_install_blob(&psde->property_info, "capabilities",
  3000. DRM_MODE_PROP_IMMUTABLE, PLANE_PROP_INFO);
  3001. sde_kms_info_reset(info);
  3002. if (is_master) {
  3003. format_list = psde->pipe_sblk->format_list;
  3004. } else {
  3005. format_list = psde->pipe_sblk->virt_format_list;
  3006. sde_kms_info_add_keyint(info, "primary_smart_plane_id",
  3007. master_plane_id);
  3008. msm_property_install_enum(&psde->property_info,
  3009. "multirect_mode", 0x0, 0, e_multirect_mode,
  3010. ARRAY_SIZE(e_multirect_mode),
  3011. PLANE_PROP_MULTIRECT_MODE);
  3012. }
  3013. if (format_list) {
  3014. sde_kms_info_start(info, "pixel_formats");
  3015. while (format_list->fourcc_format) {
  3016. sde_kms_info_append_format(info,
  3017. format_list->fourcc_format,
  3018. format_list->modifier);
  3019. ++format_list;
  3020. }
  3021. sde_kms_info_stop(info);
  3022. }
  3023. if (psde->pipe_hw && psde->pipe_hw->ops.get_scaler_ver)
  3024. sde_kms_info_add_keyint(info, "scaler_step_ver",
  3025. psde->pipe_hw->ops.get_scaler_ver(psde->pipe_hw));
  3026. sde_kms_info_add_keyint(info, "max_linewidth",
  3027. psde->pipe_sblk->maxlinewidth);
  3028. sde_kms_info_add_keyint(info, "max_upscale",
  3029. psde->pipe_sblk->maxupscale);
  3030. sde_kms_info_add_keyint(info, "max_downscale",
  3031. psde->pipe_sblk->maxdwnscale);
  3032. sde_kms_info_add_keyint(info, "max_horizontal_deci",
  3033. psde->pipe_sblk->maxhdeciexp);
  3034. sde_kms_info_add_keyint(info, "max_vertical_deci",
  3035. psde->pipe_sblk->maxvdeciexp);
  3036. sde_kms_info_add_keyint(info, "max_per_pipe_bw",
  3037. psde->pipe_sblk->max_per_pipe_bw * 1000LL);
  3038. sde_kms_info_add_keyint(info, "max_per_pipe_bw_high",
  3039. psde->pipe_sblk->max_per_pipe_bw_high * 1000LL);
  3040. if ((is_master &&
  3041. (psde->features & BIT(SDE_SSPP_INVERSE_PMA))) ||
  3042. (psde->features & BIT(SDE_SSPP_DGM_INVERSE_PMA))) {
  3043. msm_property_install_range(&psde->property_info,
  3044. "inverse_pma", 0x0, 0, 1, 0, PLANE_PROP_INVERSE_PMA);
  3045. sde_kms_info_add_keyint(info, "inverse_pma", 1);
  3046. }
  3047. if (psde->features & BIT(SDE_SSPP_DGM_CSC)) {
  3048. msm_property_install_volatile_range(
  3049. &psde->property_info, "csc_dma_v1", 0x0,
  3050. 0, ~0, 0, PLANE_PROP_CSC_DMA_V1);
  3051. sde_kms_info_add_keyint(info, "csc_dma_v1", 1);
  3052. }
  3053. if (psde->features & BIT(SDE_SSPP_SEC_UI_ALLOWED))
  3054. sde_kms_info_add_keyint(info, "sec_ui_allowed", 1);
  3055. if (psde->features & BIT(SDE_SSPP_BLOCK_SEC_UI))
  3056. sde_kms_info_add_keyint(info, "block_sec_ui", 1);
  3057. if (psde->features & BIT(SDE_SSPP_TRUE_INLINE_ROT)) {
  3058. const struct sde_format_extended *inline_rot_fmt_list;
  3059. sde_kms_info_add_keyint(info, "true_inline_rot_rev",
  3060. catalog->true_inline_rot_rev);
  3061. sde_kms_info_add_keyint(info,
  3062. "true_inline_dwnscale_rt",
  3063. (int) (psde->pipe_sblk->in_rot_maxdwnscale_rt_num /
  3064. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom));
  3065. sde_kms_info_add_keyint(info,
  3066. "true_inline_dwnscale_rt_numerator",
  3067. psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3068. sde_kms_info_add_keyint(info,
  3069. "true_inline_dwnscale_rt_denominator",
  3070. psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3071. sde_kms_info_add_keyint(info, "true_inline_dwnscale_nrt",
  3072. psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3073. sde_kms_info_add_keyint(info, "true_inline_max_height",
  3074. psde->pipe_sblk->in_rot_maxheight);
  3075. inline_rot_fmt_list = psde->pipe_sblk->in_rot_format_list;
  3076. if (inline_rot_fmt_list) {
  3077. sde_kms_info_start(info, "inline_rot_pixel_formats");
  3078. while (inline_rot_fmt_list->fourcc_format) {
  3079. sde_kms_info_append_format(info,
  3080. inline_rot_fmt_list->fourcc_format,
  3081. inline_rot_fmt_list->modifier);
  3082. ++inline_rot_fmt_list;
  3083. }
  3084. sde_kms_info_stop(info);
  3085. }
  3086. }
  3087. msm_property_set_blob(&psde->property_info, &psde->blob_info,
  3088. info->data, SDE_KMS_INFO_DATALEN(info),
  3089. PLANE_PROP_INFO);
  3090. kfree(info);
  3091. if (psde->features & BIT(SDE_SSPP_MEMCOLOR)) {
  3092. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3093. "SDE_SSPP_SKIN_COLOR_V",
  3094. psde->pipe_sblk->memcolor_blk.version >> 16);
  3095. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3096. PLANE_PROP_SKIN_COLOR);
  3097. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3098. "SDE_SSPP_SKY_COLOR_V",
  3099. psde->pipe_sblk->memcolor_blk.version >> 16);
  3100. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3101. PLANE_PROP_SKY_COLOR);
  3102. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3103. "SDE_SSPP_FOLIAGE_COLOR_V",
  3104. psde->pipe_sblk->memcolor_blk.version >> 16);
  3105. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3106. PLANE_PROP_FOLIAGE_COLOR);
  3107. }
  3108. if (psde->features & BIT(SDE_SSPP_VIG_GAMUT)) {
  3109. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3110. "SDE_VIG_3D_LUT_GAMUT_V",
  3111. psde->pipe_sblk->gamut_blk.version >> 16);
  3112. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3113. PLANE_PROP_VIG_GAMUT);
  3114. }
  3115. if (psde->features & BIT(SDE_SSPP_VIG_IGC)) {
  3116. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3117. "SDE_VIG_1D_LUT_IGC_V",
  3118. psde->pipe_sblk->igc_blk[0].version >> 16);
  3119. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3120. PLANE_PROP_VIG_IGC);
  3121. }
  3122. if (psde->features & BIT(SDE_SSPP_DMA_IGC)) {
  3123. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3124. "SDE_DGM_1D_LUT_IGC_V",
  3125. psde->pipe_sblk->igc_blk[0].version >> 16);
  3126. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3127. PLANE_PROP_DMA_IGC);
  3128. }
  3129. if (psde->features & BIT(SDE_SSPP_DMA_GC)) {
  3130. snprintf(feature_name, sizeof(feature_name), "%s%d",
  3131. "SDE_DGM_1D_LUT_GC_V",
  3132. psde->pipe_sblk->gc_blk[0].version >> 16);
  3133. msm_property_install_blob(&psde->property_info, feature_name, 0,
  3134. PLANE_PROP_DMA_GC);
  3135. }
  3136. msm_property_install_enum(&psde->property_info, "fb_translation_mode",
  3137. 0x0,
  3138. 0, e_fb_translation_mode,
  3139. ARRAY_SIZE(e_fb_translation_mode),
  3140. PLANE_PROP_FB_TRANSLATION_MODE);
  3141. }
  3142. static inline void _sde_plane_set_csc_v1(struct sde_plane *psde,
  3143. void __user *usr_ptr)
  3144. {
  3145. struct sde_drm_csc_v1 csc_v1;
  3146. int i;
  3147. if (!psde) {
  3148. SDE_ERROR("invalid plane\n");
  3149. return;
  3150. }
  3151. psde->csc_usr_ptr = NULL;
  3152. if (!usr_ptr) {
  3153. SDE_DEBUG_PLANE(psde, "csc data removed\n");
  3154. return;
  3155. }
  3156. if (copy_from_user(&csc_v1, usr_ptr, sizeof(csc_v1))) {
  3157. SDE_ERROR_PLANE(psde, "failed to copy csc data\n");
  3158. return;
  3159. }
  3160. /* populate from user space */
  3161. for (i = 0; i < SDE_CSC_MATRIX_COEFF_SIZE; ++i)
  3162. psde->csc_cfg.csc_mv[i] = csc_v1.ctm_coeff[i] >> 16;
  3163. for (i = 0; i < SDE_CSC_BIAS_SIZE; ++i) {
  3164. psde->csc_cfg.csc_pre_bv[i] = csc_v1.pre_bias[i];
  3165. psde->csc_cfg.csc_post_bv[i] = csc_v1.post_bias[i];
  3166. }
  3167. for (i = 0; i < SDE_CSC_CLAMP_SIZE; ++i) {
  3168. psde->csc_cfg.csc_pre_lv[i] = csc_v1.pre_clamp[i];
  3169. psde->csc_cfg.csc_post_lv[i] = csc_v1.post_clamp[i];
  3170. }
  3171. psde->csc_usr_ptr = &psde->csc_cfg;
  3172. }
  3173. static inline void _sde_plane_set_scaler_v1(struct sde_plane *psde,
  3174. struct sde_plane_state *pstate, void __user *usr)
  3175. {
  3176. struct sde_drm_scaler_v1 scale_v1;
  3177. struct sde_hw_pixel_ext *pe;
  3178. int i;
  3179. if (!psde || !pstate) {
  3180. SDE_ERROR("invalid argument(s)\n");
  3181. return;
  3182. }
  3183. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3184. if (!usr) {
  3185. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3186. return;
  3187. }
  3188. if (copy_from_user(&scale_v1, usr, sizeof(scale_v1))) {
  3189. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3190. return;
  3191. }
  3192. /* force property to be dirty, even if the pointer didn't change */
  3193. msm_property_set_dirty(&psde->property_info,
  3194. &pstate->property_state, PLANE_PROP_SCALER_V1);
  3195. /* populate from user space */
  3196. pe = &pstate->pixel_ext;
  3197. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3198. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3199. pe->init_phase_x[i] = scale_v1.init_phase_x[i];
  3200. pe->phase_step_x[i] = scale_v1.phase_step_x[i];
  3201. pe->init_phase_y[i] = scale_v1.init_phase_y[i];
  3202. pe->phase_step_y[i] = scale_v1.phase_step_y[i];
  3203. pe->horz_filter[i] = scale_v1.horz_filter[i];
  3204. pe->vert_filter[i] = scale_v1.vert_filter[i];
  3205. }
  3206. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3207. pe->left_ftch[i] = scale_v1.pe.left_ftch[i];
  3208. pe->right_ftch[i] = scale_v1.pe.right_ftch[i];
  3209. pe->left_rpt[i] = scale_v1.pe.left_rpt[i];
  3210. pe->right_rpt[i] = scale_v1.pe.right_rpt[i];
  3211. pe->roi_w[i] = scale_v1.pe.num_ext_pxls_lr[i];
  3212. pe->top_ftch[i] = scale_v1.pe.top_ftch[i];
  3213. pe->btm_ftch[i] = scale_v1.pe.btm_ftch[i];
  3214. pe->top_rpt[i] = scale_v1.pe.top_rpt[i];
  3215. pe->btm_rpt[i] = scale_v1.pe.btm_rpt[i];
  3216. pe->roi_h[i] = scale_v1.pe.num_ext_pxls_tb[i];
  3217. }
  3218. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V1;
  3219. SDE_EVT32_VERBOSE(DRMID(&psde->base));
  3220. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3221. }
  3222. static void _sde_plane_clear_predownscale_settings(
  3223. struct sde_plane_state *pstate)
  3224. {
  3225. pstate->pre_down.pre_downscale_x_0 = 0;
  3226. pstate->pre_down.pre_downscale_x_1 = 0;
  3227. pstate->pre_down.pre_downscale_y_0 = 0;
  3228. pstate->pre_down.pre_downscale_y_1 = 0;
  3229. }
  3230. static inline void _sde_plane_set_scaler_v2(struct sde_plane *psde,
  3231. struct sde_plane_state *pstate, void __user *usr)
  3232. {
  3233. struct sde_drm_scaler_v2 scale_v2;
  3234. struct sde_hw_pixel_ext *pe;
  3235. int i;
  3236. struct sde_hw_scaler3_cfg *cfg;
  3237. struct sde_hw_inline_pre_downscale_cfg *pd_cfg;
  3238. if (!psde || !pstate) {
  3239. SDE_ERROR("invalid argument(s)\n");
  3240. return;
  3241. }
  3242. cfg = &pstate->scaler3_cfg;
  3243. pd_cfg = &pstate->pre_down;
  3244. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_NONE;
  3245. if (!usr) {
  3246. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3247. cfg->enable = 0;
  3248. _sde_plane_clear_predownscale_settings(pstate);
  3249. goto end;
  3250. }
  3251. if (copy_from_user(&scale_v2, usr, sizeof(scale_v2))) {
  3252. SDE_ERROR_PLANE(psde, "failed to copy scale data\n");
  3253. return;
  3254. }
  3255. /* detach/ignore user data if 'disabled' */
  3256. if (!scale_v2.enable) {
  3257. SDE_DEBUG_PLANE(psde, "scale data removed\n");
  3258. cfg->enable = 0;
  3259. _sde_plane_clear_predownscale_settings(pstate);
  3260. goto end;
  3261. }
  3262. /* populate from user space */
  3263. sde_set_scaler_v2(cfg, &scale_v2);
  3264. if (_sde_plane_has_pre_downscale(psde)) {
  3265. pd_cfg->pre_downscale_x_0 = scale_v2.pre_downscale_x_0;
  3266. pd_cfg->pre_downscale_x_1 = scale_v2.pre_downscale_x_1;
  3267. pd_cfg->pre_downscale_y_0 = scale_v2.pre_downscale_y_0;
  3268. pd_cfg->pre_downscale_y_1 = scale_v2.pre_downscale_y_1;
  3269. }
  3270. pe = &pstate->pixel_ext;
  3271. memset(pe, 0, sizeof(struct sde_hw_pixel_ext));
  3272. for (i = 0; i < SDE_MAX_PLANES; i++) {
  3273. pe->left_ftch[i] = scale_v2.pe.left_ftch[i];
  3274. pe->right_ftch[i] = scale_v2.pe.right_ftch[i];
  3275. pe->left_rpt[i] = scale_v2.pe.left_rpt[i];
  3276. pe->right_rpt[i] = scale_v2.pe.right_rpt[i];
  3277. pe->roi_w[i] = scale_v2.pe.num_ext_pxls_lr[i];
  3278. pe->top_ftch[i] = scale_v2.pe.top_ftch[i];
  3279. pe->btm_ftch[i] = scale_v2.pe.btm_ftch[i];
  3280. pe->top_rpt[i] = scale_v2.pe.top_rpt[i];
  3281. pe->btm_rpt[i] = scale_v2.pe.btm_rpt[i];
  3282. pe->roi_h[i] = scale_v2.pe.num_ext_pxls_tb[i];
  3283. }
  3284. pstate->scaler_check_state = SDE_PLANE_SCLCHECK_SCALER_V2_CHECK;
  3285. end:
  3286. /* force property to be dirty, even if the pointer didn't change */
  3287. msm_property_set_dirty(&psde->property_info,
  3288. &pstate->property_state, PLANE_PROP_SCALER_V2);
  3289. SDE_EVT32_VERBOSE(DRMID(&psde->base), cfg->enable, cfg->de.enable,
  3290. cfg->src_width[0], cfg->src_height[0],
  3291. cfg->dst_width, cfg->dst_height);
  3292. SDE_DEBUG_PLANE(psde, "user property data copied\n");
  3293. }
  3294. static void _sde_plane_set_excl_rect_v1(struct sde_plane *psde,
  3295. struct sde_plane_state *pstate, void __user *usr_ptr)
  3296. {
  3297. struct drm_clip_rect excl_rect_v1;
  3298. if (!psde || !pstate) {
  3299. SDE_ERROR("invalid argument(s)\n");
  3300. return;
  3301. }
  3302. if (!usr_ptr) {
  3303. memset(&pstate->excl_rect, 0, sizeof(pstate->excl_rect));
  3304. SDE_DEBUG_PLANE(psde, "excl_rect data cleared\n");
  3305. return;
  3306. }
  3307. if (copy_from_user(&excl_rect_v1, usr_ptr, sizeof(excl_rect_v1))) {
  3308. SDE_ERROR_PLANE(psde, "failed to copy excl_rect data\n");
  3309. return;
  3310. }
  3311. /* populate from user space */
  3312. pstate->excl_rect.x = excl_rect_v1.x1;
  3313. pstate->excl_rect.y = excl_rect_v1.y1;
  3314. pstate->excl_rect.w = excl_rect_v1.x2 - excl_rect_v1.x1;
  3315. pstate->excl_rect.h = excl_rect_v1.y2 - excl_rect_v1.y1;
  3316. SDE_DEBUG_PLANE(psde, "excl_rect: {%d,%d,%d,%d}\n",
  3317. pstate->excl_rect.x, pstate->excl_rect.y,
  3318. pstate->excl_rect.w, pstate->excl_rect.h);
  3319. }
  3320. static int sde_plane_atomic_set_property(struct drm_plane *plane,
  3321. struct drm_plane_state *state, struct drm_property *property,
  3322. uint64_t val)
  3323. {
  3324. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3325. struct sde_plane_state *pstate;
  3326. int idx, ret = -EINVAL;
  3327. SDE_DEBUG_PLANE(psde, "\n");
  3328. if (!plane) {
  3329. SDE_ERROR("invalid plane\n");
  3330. } else if (!state) {
  3331. SDE_ERROR_PLANE(psde, "invalid state\n");
  3332. } else {
  3333. pstate = to_sde_plane_state(state);
  3334. ret = msm_property_atomic_set(&psde->property_info,
  3335. &pstate->property_state, property, val);
  3336. if (!ret) {
  3337. idx = msm_property_index(&psde->property_info,
  3338. property);
  3339. switch (idx) {
  3340. case PLANE_PROP_INPUT_FENCE:
  3341. _sde_plane_set_input_fence(psde, pstate, val);
  3342. break;
  3343. case PLANE_PROP_CSC_V1:
  3344. case PLANE_PROP_CSC_DMA_V1:
  3345. _sde_plane_set_csc_v1(psde, (void __user *)val);
  3346. break;
  3347. case PLANE_PROP_SCALER_V1:
  3348. _sde_plane_set_scaler_v1(psde, pstate,
  3349. (void *)(uintptr_t)val);
  3350. break;
  3351. case PLANE_PROP_SCALER_V2:
  3352. _sde_plane_set_scaler_v2(psde, pstate,
  3353. (void *)(uintptr_t)val);
  3354. break;
  3355. case PLANE_PROP_EXCL_RECT_V1:
  3356. _sde_plane_set_excl_rect_v1(psde, pstate,
  3357. (void *)(uintptr_t)val);
  3358. break;
  3359. default:
  3360. /* nothing to do */
  3361. break;
  3362. }
  3363. }
  3364. }
  3365. SDE_DEBUG_PLANE(psde, "%s[%d] <= 0x%llx ret=%d\n",
  3366. property->name, property->base.id, val, ret);
  3367. return ret;
  3368. }
  3369. static int sde_plane_atomic_get_property(struct drm_plane *plane,
  3370. const struct drm_plane_state *state,
  3371. struct drm_property *property, uint64_t *val)
  3372. {
  3373. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3374. struct sde_plane_state *pstate;
  3375. int ret = -EINVAL;
  3376. if (!plane) {
  3377. SDE_ERROR("invalid plane\n");
  3378. } else if (!state) {
  3379. SDE_ERROR("invalid state\n");
  3380. } else {
  3381. SDE_DEBUG_PLANE(psde, "\n");
  3382. pstate = to_sde_plane_state(state);
  3383. ret = msm_property_atomic_get(&psde->property_info,
  3384. &pstate->property_state, property, val);
  3385. }
  3386. return ret;
  3387. }
  3388. int sde_plane_helper_reset_custom_properties(struct drm_plane *plane,
  3389. struct drm_plane_state *plane_state)
  3390. {
  3391. struct sde_plane *psde;
  3392. struct sde_plane_state *pstate;
  3393. struct drm_property *drm_prop;
  3394. enum msm_mdp_plane_property prop_idx;
  3395. if (!plane || !plane_state) {
  3396. SDE_ERROR("invalid params\n");
  3397. return -EINVAL;
  3398. }
  3399. psde = to_sde_plane(plane);
  3400. pstate = to_sde_plane_state(plane_state);
  3401. for (prop_idx = 0; prop_idx < PLANE_PROP_COUNT; prop_idx++) {
  3402. uint64_t val = pstate->property_values[prop_idx].value;
  3403. uint64_t def;
  3404. int ret;
  3405. drm_prop = msm_property_index_to_drm_property(
  3406. &psde->property_info, prop_idx);
  3407. if (!drm_prop) {
  3408. /* not all props will be installed, based on caps */
  3409. SDE_DEBUG_PLANE(psde, "invalid property index %d\n",
  3410. prop_idx);
  3411. continue;
  3412. }
  3413. def = msm_property_get_default(&psde->property_info, prop_idx);
  3414. if (val == def)
  3415. continue;
  3416. SDE_DEBUG_PLANE(psde, "set prop %s idx %d from %llu to %llu\n",
  3417. drm_prop->name, prop_idx, val, def);
  3418. ret = sde_plane_atomic_set_property(plane, plane_state,
  3419. drm_prop, def);
  3420. if (ret) {
  3421. SDE_ERROR_PLANE(psde,
  3422. "set property failed, idx %d ret %d\n",
  3423. prop_idx, ret);
  3424. continue;
  3425. }
  3426. }
  3427. return 0;
  3428. }
  3429. static void sde_plane_destroy(struct drm_plane *plane)
  3430. {
  3431. struct sde_plane *psde = plane ? to_sde_plane(plane) : NULL;
  3432. SDE_DEBUG_PLANE(psde, "\n");
  3433. if (psde) {
  3434. _sde_plane_set_qos_ctrl(plane, false, SDE_PLANE_QOS_PANIC_CTRL);
  3435. if (psde->blob_info)
  3436. drm_property_blob_put(psde->blob_info);
  3437. msm_property_destroy(&psde->property_info);
  3438. mutex_destroy(&psde->lock);
  3439. /* this will destroy the states as well */
  3440. drm_plane_cleanup(plane);
  3441. if (psde->pipe_hw)
  3442. sde_hw_sspp_destroy(psde->pipe_hw);
  3443. kfree(psde);
  3444. }
  3445. }
  3446. static void sde_plane_destroy_state(struct drm_plane *plane,
  3447. struct drm_plane_state *state)
  3448. {
  3449. struct sde_plane *psde;
  3450. struct sde_plane_state *pstate;
  3451. if (!plane || !state) {
  3452. SDE_ERROR("invalid arg(s), plane %d state %d\n",
  3453. !plane, !state);
  3454. return;
  3455. }
  3456. psde = to_sde_plane(plane);
  3457. pstate = to_sde_plane_state(state);
  3458. SDE_DEBUG_PLANE(psde, "\n");
  3459. /* remove ref count for frame buffers */
  3460. if (state->fb)
  3461. drm_framebuffer_put(state->fb);
  3462. /* remove ref count for fence */
  3463. if (pstate->input_fence)
  3464. sde_sync_put(pstate->input_fence);
  3465. /* destroy value helper */
  3466. msm_property_destroy_state(&psde->property_info, pstate,
  3467. &pstate->property_state);
  3468. }
  3469. static struct drm_plane_state *
  3470. sde_plane_duplicate_state(struct drm_plane *plane)
  3471. {
  3472. struct sde_plane *psde;
  3473. struct sde_plane_state *pstate;
  3474. struct sde_plane_state *old_state;
  3475. struct drm_property *drm_prop;
  3476. uint64_t input_fence_default;
  3477. if (!plane) {
  3478. SDE_ERROR("invalid plane\n");
  3479. return NULL;
  3480. } else if (!plane->state) {
  3481. SDE_ERROR("invalid plane state\n");
  3482. return NULL;
  3483. }
  3484. old_state = to_sde_plane_state(plane->state);
  3485. psde = to_sde_plane(plane);
  3486. pstate = msm_property_alloc_state(&psde->property_info);
  3487. if (!pstate) {
  3488. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3489. return NULL;
  3490. }
  3491. SDE_DEBUG_PLANE(psde, "\n");
  3492. /* duplicate value helper */
  3493. msm_property_duplicate_state(&psde->property_info, old_state, pstate,
  3494. &pstate->property_state, pstate->property_values);
  3495. /* clear out any input fence */
  3496. pstate->input_fence = 0;
  3497. input_fence_default = msm_property_get_default(
  3498. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3499. drm_prop = msm_property_index_to_drm_property(
  3500. &psde->property_info, PLANE_PROP_INPUT_FENCE);
  3501. if (msm_property_atomic_set(&psde->property_info,
  3502. &pstate->property_state, drm_prop,
  3503. input_fence_default))
  3504. SDE_DEBUG_PLANE(psde,
  3505. "error clearing duplicated input fence\n");
  3506. pstate->dirty = 0x0;
  3507. pstate->pending = false;
  3508. __drm_atomic_helper_plane_duplicate_state(plane, &pstate->base);
  3509. return &pstate->base;
  3510. }
  3511. static void sde_plane_reset(struct drm_plane *plane)
  3512. {
  3513. struct sde_plane *psde;
  3514. struct sde_plane_state *pstate;
  3515. if (!plane) {
  3516. SDE_ERROR("invalid plane\n");
  3517. return;
  3518. }
  3519. psde = to_sde_plane(plane);
  3520. SDE_DEBUG_PLANE(psde, "\n");
  3521. if (plane->state && !sde_crtc_is_reset_required(plane->state->crtc)) {
  3522. SDE_DEBUG_PLANE(psde, "avoid reset for plane\n");
  3523. return;
  3524. }
  3525. /* remove previous state, if present */
  3526. if (plane->state) {
  3527. sde_plane_destroy_state(plane, plane->state);
  3528. plane->state = 0;
  3529. }
  3530. pstate = msm_property_alloc_state(&psde->property_info);
  3531. if (!pstate) {
  3532. SDE_ERROR_PLANE(psde, "failed to allocate state\n");
  3533. return;
  3534. }
  3535. /* reset value helper */
  3536. msm_property_reset_state(&psde->property_info, pstate,
  3537. &pstate->property_state,
  3538. pstate->property_values);
  3539. pstate->base.plane = plane;
  3540. plane->state = &pstate->base;
  3541. }
  3542. u32 sde_plane_get_ubwc_error(struct drm_plane *plane)
  3543. {
  3544. u32 ubwc_error = 0;
  3545. struct sde_plane *psde;
  3546. if (!plane) {
  3547. SDE_ERROR("invalid plane\n");
  3548. return 0;
  3549. }
  3550. psde = to_sde_plane(plane);
  3551. if (!psde->is_virtual && psde->pipe_hw->ops.get_ubwc_error)
  3552. ubwc_error = psde->pipe_hw->ops.get_ubwc_error(psde->pipe_hw);
  3553. return ubwc_error;
  3554. }
  3555. void sde_plane_clear_ubwc_error(struct drm_plane *plane)
  3556. {
  3557. struct sde_plane *psde;
  3558. if (!plane) {
  3559. SDE_ERROR("invalid plane\n");
  3560. return;
  3561. }
  3562. psde = to_sde_plane(plane);
  3563. if (psde->pipe_hw->ops.clear_ubwc_error)
  3564. psde->pipe_hw->ops.clear_ubwc_error(psde->pipe_hw);
  3565. }
  3566. #ifdef CONFIG_DEBUG_FS
  3567. static ssize_t _sde_plane_danger_read(struct file *file,
  3568. char __user *buff, size_t count, loff_t *ppos)
  3569. {
  3570. struct sde_kms *kms = file->private_data;
  3571. struct sde_mdss_cfg *cfg = kms->catalog;
  3572. int len = 0;
  3573. char buf[40] = {'\0'};
  3574. if (!cfg)
  3575. return -ENODEV;
  3576. if (*ppos)
  3577. return 0; /* the end */
  3578. len = snprintf(buf, sizeof(buf), "%d\n", !kms->has_danger_ctrl);
  3579. if (len < 0 || len >= sizeof(buf))
  3580. return 0;
  3581. if ((count < sizeof(buf)) || copy_to_user(buff, buf, len))
  3582. return -EFAULT;
  3583. *ppos += len; /* increase offset */
  3584. return len;
  3585. }
  3586. static void _sde_plane_set_danger_state(struct sde_kms *kms, bool enable)
  3587. {
  3588. struct drm_plane *plane;
  3589. drm_for_each_plane(plane, kms->dev) {
  3590. if (plane->fb && plane->state) {
  3591. sde_plane_danger_signal_ctrl(plane, enable);
  3592. SDE_DEBUG("plane:%d img:%dx%d ",
  3593. plane->base.id, plane->fb->width,
  3594. plane->fb->height);
  3595. SDE_DEBUG("src[%d,%d,%d,%d] dst[%d,%d,%d,%d]\n",
  3596. plane->state->src_x >> 16,
  3597. plane->state->src_y >> 16,
  3598. plane->state->src_w >> 16,
  3599. plane->state->src_h >> 16,
  3600. plane->state->crtc_x, plane->state->crtc_y,
  3601. plane->state->crtc_w, plane->state->crtc_h);
  3602. } else {
  3603. SDE_DEBUG("Inactive plane:%d\n", plane->base.id);
  3604. }
  3605. }
  3606. }
  3607. static ssize_t _sde_plane_danger_write(struct file *file,
  3608. const char __user *user_buf, size_t count, loff_t *ppos)
  3609. {
  3610. struct sde_kms *kms = file->private_data;
  3611. struct sde_mdss_cfg *cfg = kms->catalog;
  3612. int disable_panic;
  3613. char buf[10];
  3614. if (!cfg)
  3615. return -EFAULT;
  3616. if (count >= sizeof(buf))
  3617. return -EFAULT;
  3618. if (copy_from_user(buf, user_buf, count))
  3619. return -EFAULT;
  3620. buf[count] = 0; /* end of string */
  3621. if (kstrtoint(buf, 0, &disable_panic))
  3622. return -EFAULT;
  3623. if (disable_panic) {
  3624. /* Disable panic signal for all active pipes */
  3625. SDE_DEBUG("Disabling danger:\n");
  3626. _sde_plane_set_danger_state(kms, false);
  3627. kms->has_danger_ctrl = false;
  3628. } else {
  3629. /* Enable panic signal for all active pipes */
  3630. SDE_DEBUG("Enabling danger:\n");
  3631. kms->has_danger_ctrl = true;
  3632. _sde_plane_set_danger_state(kms, true);
  3633. }
  3634. return count;
  3635. }
  3636. static const struct file_operations sde_plane_danger_enable = {
  3637. .open = simple_open,
  3638. .read = _sde_plane_danger_read,
  3639. .write = _sde_plane_danger_write,
  3640. };
  3641. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3642. {
  3643. struct sde_plane *psde;
  3644. struct sde_kms *kms;
  3645. struct msm_drm_private *priv;
  3646. const struct sde_sspp_sub_blks *sblk = 0;
  3647. const struct sde_sspp_cfg *cfg = 0;
  3648. if (!plane || !plane->dev) {
  3649. SDE_ERROR("invalid arguments\n");
  3650. return -EINVAL;
  3651. }
  3652. priv = plane->dev->dev_private;
  3653. if (!priv || !priv->kms) {
  3654. SDE_ERROR("invalid KMS reference\n");
  3655. return -EINVAL;
  3656. }
  3657. kms = to_sde_kms(priv->kms);
  3658. psde = to_sde_plane(plane);
  3659. if (psde && psde->pipe_hw)
  3660. cfg = psde->pipe_hw->cap;
  3661. if (cfg)
  3662. sblk = cfg->sblk;
  3663. if (!sblk)
  3664. return 0;
  3665. /* create overall sub-directory for the pipe */
  3666. psde->debugfs_root =
  3667. debugfs_create_dir(psde->pipe_name,
  3668. plane->dev->primary->debugfs_root);
  3669. if (!psde->debugfs_root)
  3670. return -ENOMEM;
  3671. /* don't error check these */
  3672. debugfs_create_x32("features", 0400,
  3673. psde->debugfs_root, &psde->features);
  3674. if (cfg->features & BIT(SDE_SSPP_SCALER_QSEED3) ||
  3675. cfg->features & BIT(SDE_SSPP_SCALER_QSEED3LITE) ||
  3676. cfg->features & BIT(SDE_SSPP_SCALER_QSEED2))
  3677. debugfs_create_bool("default_scaling",
  3678. 0600,
  3679. psde->debugfs_root,
  3680. &psde->debugfs_default_scale);
  3681. if (cfg->features & BIT(SDE_SSPP_TRUE_INLINE_ROT)) {
  3682. debugfs_create_u32("in_rot_max_downscale_rt_num",
  3683. 0600,
  3684. psde->debugfs_root,
  3685. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_num);
  3686. debugfs_create_u32("in_rot_max_downscale_rt_denom",
  3687. 0600,
  3688. psde->debugfs_root,
  3689. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_rt_denom);
  3690. debugfs_create_u32("in_rot_max_downscale_nrt",
  3691. 0600,
  3692. psde->debugfs_root,
  3693. (u32 *) &psde->pipe_sblk->in_rot_maxdwnscale_nrt);
  3694. debugfs_create_u32("in_rot_max_height",
  3695. 0600,
  3696. psde->debugfs_root,
  3697. (u32 *) &psde->pipe_sblk->in_rot_maxheight);
  3698. }
  3699. debugfs_create_u32("xin_id",
  3700. 0400,
  3701. psde->debugfs_root,
  3702. (u32 *) &cfg->xin_id);
  3703. debugfs_create_x32("creq_vblank",
  3704. 0600,
  3705. psde->debugfs_root,
  3706. (u32 *) &sblk->creq_vblank);
  3707. debugfs_create_x32("danger_vblank",
  3708. 0600,
  3709. psde->debugfs_root,
  3710. (u32 *) &sblk->danger_vblank);
  3711. debugfs_create_file("disable_danger",
  3712. 0600,
  3713. psde->debugfs_root,
  3714. kms, &sde_plane_danger_enable);
  3715. return 0;
  3716. }
  3717. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3718. {
  3719. struct sde_plane *psde;
  3720. if (!plane)
  3721. return;
  3722. psde = to_sde_plane(plane);
  3723. debugfs_remove_recursive(psde->debugfs_root);
  3724. }
  3725. #else
  3726. static int _sde_plane_init_debugfs(struct drm_plane *plane)
  3727. {
  3728. return 0;
  3729. }
  3730. static void _sde_plane_destroy_debugfs(struct drm_plane *plane)
  3731. {
  3732. }
  3733. #endif
  3734. static int sde_plane_late_register(struct drm_plane *plane)
  3735. {
  3736. return _sde_plane_init_debugfs(plane);
  3737. }
  3738. static void sde_plane_early_unregister(struct drm_plane *plane)
  3739. {
  3740. _sde_plane_destroy_debugfs(plane);
  3741. }
  3742. static const struct drm_plane_funcs sde_plane_funcs = {
  3743. .update_plane = drm_atomic_helper_update_plane,
  3744. .disable_plane = drm_atomic_helper_disable_plane,
  3745. .destroy = sde_plane_destroy,
  3746. .atomic_set_property = sde_plane_atomic_set_property,
  3747. .atomic_get_property = sde_plane_atomic_get_property,
  3748. .reset = sde_plane_reset,
  3749. .atomic_duplicate_state = sde_plane_duplicate_state,
  3750. .atomic_destroy_state = sde_plane_destroy_state,
  3751. .late_register = sde_plane_late_register,
  3752. .early_unregister = sde_plane_early_unregister,
  3753. };
  3754. static const struct drm_plane_helper_funcs sde_plane_helper_funcs = {
  3755. .prepare_fb = sde_plane_prepare_fb,
  3756. .cleanup_fb = sde_plane_cleanup_fb,
  3757. .atomic_check = sde_plane_atomic_check,
  3758. .atomic_update = sde_plane_atomic_update,
  3759. };
  3760. enum sde_sspp sde_plane_pipe(struct drm_plane *plane)
  3761. {
  3762. return plane ? to_sde_plane(plane)->pipe : SSPP_NONE;
  3763. }
  3764. bool is_sde_plane_virtual(struct drm_plane *plane)
  3765. {
  3766. return plane ? to_sde_plane(plane)->is_virtual : false;
  3767. }
  3768. /* initialize plane */
  3769. struct drm_plane *sde_plane_init(struct drm_device *dev,
  3770. uint32_t pipe, bool primary_plane,
  3771. unsigned long possible_crtcs, u32 master_plane_id)
  3772. {
  3773. struct drm_plane *plane = NULL, *master_plane = NULL;
  3774. const struct sde_format_extended *format_list;
  3775. struct sde_plane *psde;
  3776. struct msm_drm_private *priv;
  3777. struct sde_kms *kms;
  3778. enum drm_plane_type type;
  3779. int ret = -EINVAL;
  3780. if (!dev) {
  3781. SDE_ERROR("[%u]device is NULL\n", pipe);
  3782. goto exit;
  3783. }
  3784. priv = dev->dev_private;
  3785. if (!priv) {
  3786. SDE_ERROR("[%u]private data is NULL\n", pipe);
  3787. goto exit;
  3788. }
  3789. if (!priv->kms) {
  3790. SDE_ERROR("[%u]invalid KMS reference\n", pipe);
  3791. goto exit;
  3792. }
  3793. kms = to_sde_kms(priv->kms);
  3794. if (!kms->catalog) {
  3795. SDE_ERROR("[%u]invalid catalog reference\n", pipe);
  3796. goto exit;
  3797. }
  3798. /* create and zero local structure */
  3799. psde = kzalloc(sizeof(*psde), GFP_KERNEL);
  3800. if (!psde) {
  3801. SDE_ERROR("[%u]failed to allocate local plane struct\n", pipe);
  3802. ret = -ENOMEM;
  3803. goto exit;
  3804. }
  3805. /* cache local stuff for later */
  3806. plane = &psde->base;
  3807. psde->pipe = pipe;
  3808. psde->is_virtual = (master_plane_id != 0);
  3809. INIT_LIST_HEAD(&psde->mplane_list);
  3810. master_plane = drm_plane_find(dev, NULL, master_plane_id);
  3811. if (master_plane) {
  3812. struct sde_plane *mpsde = to_sde_plane(master_plane);
  3813. list_add_tail(&psde->mplane_list, &mpsde->mplane_list);
  3814. }
  3815. /* initialize underlying h/w driver */
  3816. psde->pipe_hw = sde_hw_sspp_init(pipe, kms->mmio, kms->catalog,
  3817. psde->is_virtual);
  3818. if (IS_ERR(psde->pipe_hw)) {
  3819. SDE_ERROR("[%u]SSPP init failed\n", pipe);
  3820. ret = PTR_ERR(psde->pipe_hw);
  3821. goto clean_plane;
  3822. } else if (!psde->pipe_hw->cap || !psde->pipe_hw->cap->sblk) {
  3823. SDE_ERROR("[%u]SSPP init returned invalid cfg\n", pipe);
  3824. goto clean_sspp;
  3825. }
  3826. /* cache features mask for later */
  3827. psde->features = psde->pipe_hw->cap->features;
  3828. psde->perf_features = psde->pipe_hw->cap->perf_features;
  3829. psde->pipe_sblk = psde->pipe_hw->cap->sblk;
  3830. if (!psde->pipe_sblk) {
  3831. SDE_ERROR("[%u]invalid sblk\n", pipe);
  3832. goto clean_sspp;
  3833. }
  3834. if (psde->is_virtual)
  3835. format_list = psde->pipe_sblk->virt_format_list;
  3836. else
  3837. format_list = psde->pipe_sblk->format_list;
  3838. psde->nformats = sde_populate_formats(format_list,
  3839. psde->formats,
  3840. 0,
  3841. ARRAY_SIZE(psde->formats));
  3842. if (!psde->nformats) {
  3843. SDE_ERROR("[%u]no valid formats for plane\n", pipe);
  3844. goto clean_sspp;
  3845. }
  3846. if (psde->features & BIT(SDE_SSPP_CURSOR))
  3847. type = DRM_PLANE_TYPE_CURSOR;
  3848. else if (primary_plane)
  3849. type = DRM_PLANE_TYPE_PRIMARY;
  3850. else
  3851. type = DRM_PLANE_TYPE_OVERLAY;
  3852. ret = drm_universal_plane_init(dev, plane, 0xff, &sde_plane_funcs,
  3853. psde->formats, psde->nformats,
  3854. NULL, type, NULL);
  3855. if (ret)
  3856. goto clean_sspp;
  3857. /* Populate static array of plane property flags */
  3858. _sde_plane_map_prop_to_dirty_bits();
  3859. /* success! finalize initialization */
  3860. drm_plane_helper_add(plane, &sde_plane_helper_funcs);
  3861. msm_property_init(&psde->property_info, &plane->base, dev,
  3862. priv->plane_property, psde->property_data,
  3863. PLANE_PROP_COUNT, PLANE_PROP_BLOBCOUNT,
  3864. sizeof(struct sde_plane_state));
  3865. _sde_plane_install_properties(plane, kms->catalog, master_plane_id);
  3866. /* save user friendly pipe name for later */
  3867. snprintf(psde->pipe_name, SDE_NAME_SIZE, "plane%u", plane->base.id);
  3868. mutex_init(&psde->lock);
  3869. SDE_DEBUG("%s created for pipe:%u id:%u master:%u\n", psde->pipe_name,
  3870. pipe, plane->base.id, master_plane_id);
  3871. return plane;
  3872. clean_sspp:
  3873. if (psde && psde->pipe_hw)
  3874. sde_hw_sspp_destroy(psde->pipe_hw);
  3875. clean_plane:
  3876. kfree(psde);
  3877. exit:
  3878. return ERR_PTR(ret);
  3879. }