dp_rx.c 80 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DUP_RX_DESC_WAR
  42. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  43. hal_ring_handle_t hal_ring,
  44. hal_ring_desc_t ring_desc,
  45. struct dp_rx_desc *rx_desc)
  46. {
  47. void *hal_soc = soc->hal_soc;
  48. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  49. dp_rx_desc_dump(rx_desc);
  50. }
  51. #else
  52. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  53. hal_ring_handle_t hal_ring_hdl,
  54. hal_ring_desc_t ring_desc,
  55. struct dp_rx_desc *rx_desc)
  56. {
  57. hal_soc_handle_t hal_soc = soc->hal_soc;
  58. dp_rx_desc_dump(rx_desc);
  59. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  60. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  61. qdf_assert_always(0);
  62. }
  63. #endif
  64. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  65. #ifdef RX_DESC_SANITY_WAR
  66. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  67. hal_ring_handle_t hal_ring_hdl,
  68. hal_ring_desc_t ring_desc,
  69. struct dp_rx_desc *rx_desc)
  70. {
  71. uint8_t return_buffer_manager;
  72. if (qdf_unlikely(!rx_desc)) {
  73. /*
  74. * This is an unlikely case where the cookie obtained
  75. * from the ring_desc is invalid and hence we are not
  76. * able to find the corresponding rx_desc
  77. */
  78. goto fail;
  79. }
  80. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  81. if (qdf_unlikely(!(return_buffer_manager ==
  82. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  83. return_buffer_manager ==
  84. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  85. goto fail;
  86. }
  87. return QDF_STATUS_SUCCESS;
  88. fail:
  89. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  90. dp_err("Ring Desc:");
  91. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  92. ring_desc);
  93. return QDF_STATUS_E_NULL_VALUE;
  94. }
  95. #endif
  96. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  97. /**
  98. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  99. *
  100. * @dp_soc: struct dp_soc *
  101. * @nbuf_frag_info_t: nbuf frag info
  102. * @dp_pdev: struct dp_pdev *
  103. * @rx_desc_pool: Rx desc pool
  104. *
  105. * Return: QDF_STATUS
  106. */
  107. #ifdef DP_RX_MON_MEM_FRAG
  108. static inline QDF_STATUS
  109. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  110. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  111. struct dp_pdev *dp_pdev,
  112. struct rx_desc_pool *rx_desc_pool)
  113. {
  114. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  115. (nbuf_frag_info_t->virt_addr).vaddr =
  116. qdf_frag_alloc(rx_desc_pool->buf_size);
  117. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  118. dp_err("Frag alloc failed");
  119. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  120. return QDF_STATUS_E_NOMEM;
  121. }
  122. ret = qdf_mem_map_page(dp_soc->osdev,
  123. (nbuf_frag_info_t->virt_addr).vaddr,
  124. QDF_DMA_FROM_DEVICE,
  125. rx_desc_pool->buf_size,
  126. &nbuf_frag_info_t->paddr);
  127. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  128. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  129. dp_err("Frag map failed");
  130. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  131. return QDF_STATUS_E_FAULT;
  132. }
  133. return QDF_STATUS_SUCCESS;
  134. }
  135. #else
  136. static inline QDF_STATUS
  137. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  138. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  139. struct dp_pdev *dp_pdev,
  140. struct rx_desc_pool *rx_desc_pool)
  141. {
  142. return QDF_STATUS_SUCCESS;
  143. }
  144. #endif /* DP_RX_MON_MEM_FRAG */
  145. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  146. /**
  147. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  148. * @soc: Datapath soc structure
  149. * @ring_num: Refill ring number
  150. * @num_req: number of buffers requested for refill
  151. * @num_refill: number of buffers refilled
  152. *
  153. * Returns: None
  154. */
  155. static inline void
  156. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  157. hal_ring_handle_t hal_ring_hdl,
  158. uint32_t num_req, uint32_t num_refill)
  159. {
  160. struct dp_refill_info_record *record;
  161. uint32_t idx;
  162. uint32_t tp;
  163. uint32_t hp;
  164. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  165. !soc->rx_refill_ring_history[ring_num]))
  166. return;
  167. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  168. DP_RX_REFILL_HIST_MAX);
  169. /* No NULL check needed for record since its an array */
  170. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  171. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  172. record->timestamp = qdf_get_log_timestamp();
  173. record->num_req = num_req;
  174. record->num_refill = num_refill;
  175. record->hp = hp;
  176. record->tp = tp;
  177. }
  178. #else
  179. static inline void
  180. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  181. hal_ring_handle_t hal_ring_hdl,
  182. uint32_t num_req, uint32_t num_refill)
  183. {
  184. }
  185. #endif
  186. /**
  187. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  188. *
  189. * @dp_soc: struct dp_soc *
  190. * @mac_id: Mac id
  191. * @num_entries_avail: num_entries_avail
  192. * @nbuf_frag_info_t: nbuf frag info
  193. * @dp_pdev: struct dp_pdev *
  194. * @rx_desc_pool: Rx desc pool
  195. *
  196. * Return: QDF_STATUS
  197. */
  198. static inline QDF_STATUS
  199. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  200. uint32_t mac_id,
  201. uint32_t num_entries_avail,
  202. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  203. struct dp_pdev *dp_pdev,
  204. struct rx_desc_pool *rx_desc_pool)
  205. {
  206. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  207. (nbuf_frag_info_t->virt_addr).nbuf =
  208. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  209. mac_id,
  210. rx_desc_pool,
  211. num_entries_avail);
  212. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  213. dp_err("nbuf alloc failed");
  214. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  215. return QDF_STATUS_E_NOMEM;
  216. }
  217. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  218. nbuf_frag_info_t);
  219. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  220. dp_rx_buffer_pool_nbuf_free(dp_soc,
  221. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  222. dp_err("nbuf map failed");
  223. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  224. return QDF_STATUS_E_FAULT;
  225. }
  226. nbuf_frag_info_t->paddr =
  227. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  228. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  229. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  230. rx_desc_pool->buf_size,
  231. true);
  232. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  233. &nbuf_frag_info_t->paddr,
  234. rx_desc_pool);
  235. if (ret == QDF_STATUS_E_FAILURE) {
  236. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  237. return QDF_STATUS_E_ADDRNOTAVAIL;
  238. }
  239. return QDF_STATUS_SUCCESS;
  240. }
  241. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  242. QDF_STATUS
  243. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  244. struct dp_srng *dp_rxdma_srng,
  245. struct rx_desc_pool *rx_desc_pool)
  246. {
  247. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  248. uint32_t count;
  249. void *rxdma_ring_entry;
  250. union dp_rx_desc_list_elem_t *next = NULL;
  251. void *rxdma_srng;
  252. qdf_nbuf_t nbuf;
  253. qdf_dma_addr_t paddr;
  254. uint16_t num_entries_avail = 0;
  255. uint16_t num_alloc_desc = 0;
  256. union dp_rx_desc_list_elem_t *desc_list = NULL;
  257. union dp_rx_desc_list_elem_t *tail = NULL;
  258. int sync_hw_ptr = 0;
  259. rxdma_srng = dp_rxdma_srng->hal_srng;
  260. if (qdf_unlikely(!dp_pdev)) {
  261. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  262. return QDF_STATUS_E_FAILURE;
  263. }
  264. if (qdf_unlikely(!rxdma_srng)) {
  265. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  266. return QDF_STATUS_E_FAILURE;
  267. }
  268. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  269. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  270. rxdma_srng,
  271. sync_hw_ptr);
  272. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  273. soc, num_entries_avail);
  274. if (qdf_unlikely(num_entries_avail <
  275. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  276. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  277. return QDF_STATUS_E_FAILURE;
  278. }
  279. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  280. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  281. rx_desc_pool,
  282. num_entries_avail,
  283. &desc_list,
  284. &tail);
  285. if (!num_alloc_desc) {
  286. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  287. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  288. num_entries_avail);
  289. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  290. return QDF_STATUS_E_NOMEM;
  291. }
  292. for (count = 0; count < num_alloc_desc; count++) {
  293. next = desc_list->next;
  294. qdf_prefetch(next);
  295. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  296. if (qdf_unlikely(!nbuf)) {
  297. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  298. break;
  299. }
  300. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  301. rx_desc_pool->buf_size);
  302. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  303. rxdma_srng);
  304. qdf_assert_always(rxdma_ring_entry);
  305. desc_list->rx_desc.nbuf = nbuf;
  306. desc_list->rx_desc.rx_buf_start = nbuf->data;
  307. desc_list->rx_desc.unmapped = 0;
  308. /* rx_desc.in_use should be zero at this time*/
  309. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  310. desc_list->rx_desc.in_use = 1;
  311. desc_list->rx_desc.in_err_state = 0;
  312. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  313. paddr,
  314. desc_list->rx_desc.cookie,
  315. rx_desc_pool->owner);
  316. desc_list = next;
  317. }
  318. qdf_dsb();
  319. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  320. /* No need to count the number of bytes received during replenish.
  321. * Therefore set replenish.pkts.bytes as 0.
  322. */
  323. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  324. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  325. /*
  326. * add any available free desc back to the free list
  327. */
  328. if (desc_list)
  329. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  330. mac_id, rx_desc_pool);
  331. return QDF_STATUS_SUCCESS;
  332. }
  333. QDF_STATUS
  334. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  335. struct dp_srng *dp_rxdma_srng,
  336. struct rx_desc_pool *rx_desc_pool,
  337. uint32_t num_req_buffers,
  338. union dp_rx_desc_list_elem_t **desc_list,
  339. union dp_rx_desc_list_elem_t **tail)
  340. {
  341. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  342. uint32_t count;
  343. void *rxdma_ring_entry;
  344. union dp_rx_desc_list_elem_t *next;
  345. void *rxdma_srng;
  346. qdf_nbuf_t nbuf;
  347. qdf_dma_addr_t paddr;
  348. rxdma_srng = dp_rxdma_srng->hal_srng;
  349. if (qdf_unlikely(!dp_pdev)) {
  350. dp_rx_err("%pK: pdev is null for mac_id = %d",
  351. soc, mac_id);
  352. return QDF_STATUS_E_FAILURE;
  353. }
  354. if (qdf_unlikely(!rxdma_srng)) {
  355. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  356. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  357. return QDF_STATUS_E_FAILURE;
  358. }
  359. dp_rx_debug("%pK: requested %d buffers for replenish",
  360. soc, num_req_buffers);
  361. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  362. for (count = 0; count < num_req_buffers; count++) {
  363. next = (*desc_list)->next;
  364. qdf_prefetch(next);
  365. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  366. if (qdf_unlikely(!nbuf)) {
  367. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  368. break;
  369. }
  370. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  371. rx_desc_pool->buf_size);
  372. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  373. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  374. if (!rxdma_ring_entry)
  375. break;
  376. qdf_assert_always(rxdma_ring_entry);
  377. (*desc_list)->rx_desc.nbuf = nbuf;
  378. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  379. (*desc_list)->rx_desc.unmapped = 0;
  380. /* rx_desc.in_use should be zero at this time*/
  381. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  382. (*desc_list)->rx_desc.in_use = 1;
  383. (*desc_list)->rx_desc.in_err_state = 0;
  384. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  385. paddr,
  386. (*desc_list)->rx_desc.cookie,
  387. rx_desc_pool->owner);
  388. *desc_list = next;
  389. }
  390. qdf_dsb();
  391. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  392. /* No need to count the number of bytes received during replenish.
  393. * Therefore set replenish.pkts.bytes as 0.
  394. */
  395. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  396. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  397. /*
  398. * add any available free desc back to the free list
  399. */
  400. if (*desc_list)
  401. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  402. mac_id, rx_desc_pool);
  403. return QDF_STATUS_SUCCESS;
  404. }
  405. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  406. uint32_t mac_id,
  407. struct dp_srng *dp_rxdma_srng,
  408. struct rx_desc_pool *rx_desc_pool,
  409. uint32_t num_req_buffers)
  410. {
  411. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  412. uint32_t count;
  413. uint32_t nr_descs = 0;
  414. void *rxdma_ring_entry;
  415. union dp_rx_desc_list_elem_t *next;
  416. void *rxdma_srng;
  417. qdf_nbuf_t nbuf;
  418. qdf_dma_addr_t paddr;
  419. union dp_rx_desc_list_elem_t *desc_list = NULL;
  420. union dp_rx_desc_list_elem_t *tail = NULL;
  421. rxdma_srng = dp_rxdma_srng->hal_srng;
  422. if (qdf_unlikely(!dp_pdev)) {
  423. dp_rx_err("%pK: pdev is null for mac_id = %d",
  424. soc, mac_id);
  425. return QDF_STATUS_E_FAILURE;
  426. }
  427. if (qdf_unlikely(!rxdma_srng)) {
  428. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  429. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  430. return QDF_STATUS_E_FAILURE;
  431. }
  432. dp_rx_debug("%pK: requested %d buffers for replenish",
  433. soc, num_req_buffers);
  434. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  435. num_req_buffers, &desc_list, &tail);
  436. if (!nr_descs) {
  437. dp_err("no free rx_descs in freelist");
  438. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  439. return QDF_STATUS_E_NOMEM;
  440. }
  441. dp_debug("got %u RX descs for driver attach", nr_descs);
  442. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  443. for (count = 0; count < nr_descs; count++) {
  444. next = desc_list->next;
  445. qdf_prefetch(next);
  446. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  447. if (qdf_unlikely(!nbuf)) {
  448. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  449. break;
  450. }
  451. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  452. rx_desc_pool->buf_size);
  453. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  454. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  455. if (!rxdma_ring_entry)
  456. break;
  457. qdf_assert_always(rxdma_ring_entry);
  458. desc_list->rx_desc.nbuf = nbuf;
  459. desc_list->rx_desc.rx_buf_start = nbuf->data;
  460. desc_list->rx_desc.unmapped = 0;
  461. /* rx_desc.in_use should be zero at this time*/
  462. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  463. desc_list->rx_desc.in_use = 1;
  464. desc_list->rx_desc.in_err_state = 0;
  465. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  466. paddr,
  467. desc_list->rx_desc.cookie,
  468. rx_desc_pool->owner);
  469. desc_list = next;
  470. }
  471. qdf_dsb();
  472. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  473. /* No need to count the number of bytes received during replenish.
  474. * Therefore set replenish.pkts.bytes as 0.
  475. */
  476. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  477. return QDF_STATUS_SUCCESS;
  478. }
  479. #endif
  480. /*
  481. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  482. * called during dp rx initialization
  483. * and at the end of dp_rx_process.
  484. *
  485. * @soc: core txrx main context
  486. * @mac_id: mac_id which is one of 3 mac_ids
  487. * @dp_rxdma_srng: dp rxdma circular ring
  488. * @rx_desc_pool: Pointer to free Rx descriptor pool
  489. * @num_req_buffers: number of buffer to be replenished
  490. * @desc_list: list of descs if called from dp_rx_process
  491. * or NULL during dp rx initialization or out of buffer
  492. * interrupt.
  493. * @tail: tail of descs list
  494. * @func_name: name of the caller function
  495. * Return: return success or failure
  496. */
  497. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  498. struct dp_srng *dp_rxdma_srng,
  499. struct rx_desc_pool *rx_desc_pool,
  500. uint32_t num_req_buffers,
  501. union dp_rx_desc_list_elem_t **desc_list,
  502. union dp_rx_desc_list_elem_t **tail,
  503. const char *func_name)
  504. {
  505. uint32_t num_alloc_desc;
  506. uint16_t num_desc_to_free = 0;
  507. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  508. uint32_t num_entries_avail;
  509. uint32_t count;
  510. int sync_hw_ptr = 1;
  511. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  512. void *rxdma_ring_entry;
  513. union dp_rx_desc_list_elem_t *next;
  514. QDF_STATUS ret;
  515. void *rxdma_srng;
  516. rxdma_srng = dp_rxdma_srng->hal_srng;
  517. if (qdf_unlikely(!dp_pdev)) {
  518. dp_rx_err("%pK: pdev is null for mac_id = %d",
  519. dp_soc, mac_id);
  520. return QDF_STATUS_E_FAILURE;
  521. }
  522. if (qdf_unlikely(!rxdma_srng)) {
  523. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  524. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  525. return QDF_STATUS_E_FAILURE;
  526. }
  527. dp_rx_debug("%pK: requested %d buffers for replenish",
  528. dp_soc, num_req_buffers);
  529. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  530. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  531. rxdma_srng,
  532. sync_hw_ptr);
  533. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  534. dp_soc, num_entries_avail);
  535. if (!(*desc_list) && (num_entries_avail >
  536. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  537. num_req_buffers = num_entries_avail;
  538. } else if (num_entries_avail < num_req_buffers) {
  539. num_desc_to_free = num_req_buffers - num_entries_avail;
  540. num_req_buffers = num_entries_avail;
  541. }
  542. if (qdf_unlikely(!num_req_buffers)) {
  543. num_desc_to_free = num_req_buffers;
  544. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  545. goto free_descs;
  546. }
  547. /*
  548. * if desc_list is NULL, allocate the descs from freelist
  549. */
  550. if (!(*desc_list)) {
  551. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  552. rx_desc_pool,
  553. num_req_buffers,
  554. desc_list,
  555. tail);
  556. if (!num_alloc_desc) {
  557. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  558. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  559. num_req_buffers);
  560. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  561. return QDF_STATUS_E_NOMEM;
  562. }
  563. dp_rx_debug("%pK: %d rx desc allocated", dp_soc, num_alloc_desc);
  564. num_req_buffers = num_alloc_desc;
  565. }
  566. count = 0;
  567. while (count < num_req_buffers) {
  568. /* Flag is set while pdev rx_desc_pool initialization */
  569. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  570. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  571. &nbuf_frag_info,
  572. dp_pdev,
  573. rx_desc_pool);
  574. else
  575. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  576. mac_id,
  577. num_entries_avail, &nbuf_frag_info,
  578. dp_pdev, rx_desc_pool);
  579. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  580. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  581. continue;
  582. break;
  583. }
  584. count++;
  585. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  586. rxdma_srng);
  587. qdf_assert_always(rxdma_ring_entry);
  588. next = (*desc_list)->next;
  589. /* Flag is set while pdev rx_desc_pool initialization */
  590. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  591. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  592. &nbuf_frag_info);
  593. else
  594. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  595. &nbuf_frag_info);
  596. /* rx_desc.in_use should be zero at this time*/
  597. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  598. (*desc_list)->rx_desc.in_use = 1;
  599. (*desc_list)->rx_desc.in_err_state = 0;
  600. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  601. func_name, RX_DESC_REPLENISHED);
  602. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  603. nbuf_frag_info.virt_addr.nbuf,
  604. (unsigned long long)(nbuf_frag_info.paddr),
  605. (*desc_list)->rx_desc.cookie);
  606. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  607. nbuf_frag_info.paddr,
  608. (*desc_list)->rx_desc.cookie,
  609. rx_desc_pool->owner);
  610. *desc_list = next;
  611. }
  612. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  613. num_req_buffers, count);
  614. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  615. dp_rx_schedule_refill_thread(dp_soc);
  616. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  617. count, num_desc_to_free);
  618. /* No need to count the number of bytes received during replenish.
  619. * Therefore set replenish.pkts.bytes as 0.
  620. */
  621. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  622. free_descs:
  623. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  624. /*
  625. * add any available free desc back to the free list
  626. */
  627. if (*desc_list)
  628. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  629. mac_id, rx_desc_pool);
  630. return QDF_STATUS_SUCCESS;
  631. }
  632. qdf_export_symbol(__dp_rx_buffers_replenish);
  633. /*
  634. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  635. * pkts to RAW mode simulation to
  636. * decapsulate the pkt.
  637. *
  638. * @vdev: vdev on which RAW mode is enabled
  639. * @nbuf_list: list of RAW pkts to process
  640. * @txrx_peer: peer object from which the pkt is rx
  641. *
  642. * Return: void
  643. */
  644. void
  645. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  646. struct dp_txrx_peer *txrx_peer)
  647. {
  648. qdf_nbuf_t deliver_list_head = NULL;
  649. qdf_nbuf_t deliver_list_tail = NULL;
  650. qdf_nbuf_t nbuf;
  651. nbuf = nbuf_list;
  652. while (nbuf) {
  653. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  654. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  655. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  656. DP_STATS_INC_PKT(txrx_peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  657. /*
  658. * reset the chfrag_start and chfrag_end bits in nbuf cb
  659. * as this is a non-amsdu pkt and RAW mode simulation expects
  660. * these bit s to be 0 for non-amsdu pkt.
  661. */
  662. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  663. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  664. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  665. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  666. }
  667. nbuf = next;
  668. }
  669. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  670. &deliver_list_tail);
  671. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  672. }
  673. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  674. #ifndef FEATURE_WDS
  675. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  676. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  677. {
  678. }
  679. #endif
  680. /*
  681. * dp_rx_intrabss_mcbc_fwd() - Does intrabss forward for mcast packets
  682. *
  683. * @soc: core txrx main context
  684. * @ta_peer : source peer entry
  685. * @rx_tlv_hdr : start address of rx tlvs
  686. * @nbuf : nbuf that has to be intrabss forwarded
  687. * @tid_stats : tid stats pointer
  688. *
  689. * Return: bool: true if it is forwarded else false
  690. */
  691. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  692. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  693. struct cdp_tid_rx_stats *tid_stats)
  694. {
  695. uint16_t len;
  696. qdf_nbuf_t nbuf_copy;
  697. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  698. nbuf))
  699. return true;
  700. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  701. return false;
  702. /* If the source peer in the isolation list
  703. * then dont forward instead push to bridge stack
  704. */
  705. if (dp_get_peer_isolation(ta_peer))
  706. return false;
  707. nbuf_copy = qdf_nbuf_copy(nbuf);
  708. if (!nbuf_copy)
  709. return false;
  710. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  711. qdf_nbuf_set_tx_fctx_type(nbuf_copy, &ta_peer->peer_id,
  712. CB_FTYPE_INTRABSS_FWD);
  713. if (dp_tx_send((struct cdp_soc_t *)soc,
  714. ta_peer->vdev->vdev_id, nbuf_copy)) {
  715. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  716. tid_stats->fail_cnt[INTRABSS_DROP]++;
  717. dp_rx_nbuf_free(nbuf_copy);
  718. } else {
  719. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  720. tid_stats->intrabss_cnt++;
  721. }
  722. return false;
  723. }
  724. /*
  725. * dp_rx_intrabss_ucast_fwd() - Does intrabss forward for unicast packets
  726. *
  727. * @soc: core txrx main context
  728. * @ta_peer: source peer entry
  729. * @tx_vdev_id: VDEV ID for Intra-BSS TX
  730. * @rx_tlv_hdr: start address of rx tlvs
  731. * @nbuf: nbuf that has to be intrabss forwarded
  732. * @tid_stats: tid stats pointer
  733. *
  734. * Return: bool: true if it is forwarded else false
  735. */
  736. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  737. uint8_t tx_vdev_id,
  738. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  739. struct cdp_tid_rx_stats *tid_stats)
  740. {
  741. uint16_t len;
  742. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  743. /* linearize the nbuf just before we send to
  744. * dp_tx_send()
  745. */
  746. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  747. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  748. return false;
  749. nbuf = qdf_nbuf_unshare(nbuf);
  750. if (!nbuf) {
  751. DP_STATS_INC_PKT(ta_peer,
  752. rx.intra_bss.fail, 1, len);
  753. /* return true even though the pkt is
  754. * not forwarded. Basically skb_unshare
  755. * failed and we want to continue with
  756. * next nbuf.
  757. */
  758. tid_stats->fail_cnt[INTRABSS_DROP]++;
  759. return false;
  760. }
  761. }
  762. if (!dp_tx_send((struct cdp_soc_t *)soc,
  763. tx_vdev_id, nbuf)) {
  764. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  765. len);
  766. } else {
  767. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  768. len);
  769. tid_stats->fail_cnt[INTRABSS_DROP]++;
  770. return false;
  771. }
  772. return true;
  773. }
  774. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  775. #ifdef MESH_MODE_SUPPORT
  776. /**
  777. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  778. *
  779. * @vdev: DP Virtual device handle
  780. * @nbuf: Buffer pointer
  781. * @rx_tlv_hdr: start of rx tlv header
  782. * @txrx_peer: pointer to peer
  783. *
  784. * This function allocated memory for mesh receive stats and fill the
  785. * required stats. Stores the memory address in skb cb.
  786. *
  787. * Return: void
  788. */
  789. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  790. uint8_t *rx_tlv_hdr,
  791. struct dp_txrx_peer *txrx_peer)
  792. {
  793. struct mesh_recv_hdr_s *rx_info = NULL;
  794. uint32_t pkt_type;
  795. uint32_t nss;
  796. uint32_t rate_mcs;
  797. uint32_t bw;
  798. uint8_t primary_chan_num;
  799. uint32_t center_chan_freq;
  800. struct dp_soc *soc = vdev->pdev->soc;
  801. struct dp_peer *peer;
  802. /* fill recv mesh stats */
  803. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  804. /* upper layers are resposible to free this memory */
  805. if (!rx_info) {
  806. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  807. vdev->pdev->soc);
  808. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  809. return;
  810. }
  811. rx_info->rs_flags = MESH_RXHDR_VER1;
  812. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  813. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  814. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  815. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  816. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  817. if (peer) {
  818. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  819. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  820. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  821. rx_tlv_hdr);
  822. if (vdev->osif_get_key)
  823. vdev->osif_get_key(vdev->osif_vdev,
  824. &rx_info->rs_decryptkey[0],
  825. &peer->mac_addr.raw[0],
  826. rx_info->rs_keyix);
  827. }
  828. rx_info->rs_snr = peer->stats.rx.snr;
  829. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  830. }
  831. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  832. soc = vdev->pdev->soc;
  833. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  834. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  835. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  836. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  837. soc->ctrl_psoc,
  838. vdev->pdev->pdev_id,
  839. center_chan_freq);
  840. }
  841. rx_info->rs_channel = primary_chan_num;
  842. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  843. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  844. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  845. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  846. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  847. (bw << 24);
  848. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  849. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  850. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  851. rx_info->rs_flags,
  852. rx_info->rs_rssi,
  853. rx_info->rs_channel,
  854. rx_info->rs_ratephy1,
  855. rx_info->rs_keyix,
  856. rx_info->rs_snr);
  857. }
  858. /**
  859. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  860. *
  861. * @vdev: DP Virtual device handle
  862. * @nbuf: Buffer pointer
  863. * @rx_tlv_hdr: start of rx tlv header
  864. *
  865. * This checks if the received packet is matching any filter out
  866. * catogery and and drop the packet if it matches.
  867. *
  868. * Return: status(0 indicates drop, 1 indicate to no drop)
  869. */
  870. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  871. uint8_t *rx_tlv_hdr)
  872. {
  873. union dp_align_mac_addr mac_addr;
  874. struct dp_soc *soc = vdev->pdev->soc;
  875. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  876. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  877. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  878. rx_tlv_hdr))
  879. return QDF_STATUS_SUCCESS;
  880. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  881. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  882. rx_tlv_hdr))
  883. return QDF_STATUS_SUCCESS;
  884. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  885. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  886. rx_tlv_hdr) &&
  887. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  888. rx_tlv_hdr))
  889. return QDF_STATUS_SUCCESS;
  890. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  891. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  892. rx_tlv_hdr,
  893. &mac_addr.raw[0]))
  894. return QDF_STATUS_E_FAILURE;
  895. if (!qdf_mem_cmp(&mac_addr.raw[0],
  896. &vdev->mac_addr.raw[0],
  897. QDF_MAC_ADDR_SIZE))
  898. return QDF_STATUS_SUCCESS;
  899. }
  900. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  901. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  902. rx_tlv_hdr,
  903. &mac_addr.raw[0]))
  904. return QDF_STATUS_E_FAILURE;
  905. if (!qdf_mem_cmp(&mac_addr.raw[0],
  906. &vdev->mac_addr.raw[0],
  907. QDF_MAC_ADDR_SIZE))
  908. return QDF_STATUS_SUCCESS;
  909. }
  910. }
  911. return QDF_STATUS_E_FAILURE;
  912. }
  913. #else
  914. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  915. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  916. {
  917. }
  918. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  919. uint8_t *rx_tlv_hdr)
  920. {
  921. return QDF_STATUS_E_FAILURE;
  922. }
  923. #endif
  924. #ifdef FEATURE_NAC_RSSI
  925. /**
  926. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  927. * @soc: DP SOC handle
  928. * @mpdu: mpdu for which peer is invalid
  929. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  930. * pool_id has same mapping)
  931. *
  932. * return: integer type
  933. */
  934. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  935. uint8_t mac_id)
  936. {
  937. struct dp_invalid_peer_msg msg;
  938. struct dp_vdev *vdev = NULL;
  939. struct dp_pdev *pdev = NULL;
  940. struct ieee80211_frame *wh;
  941. qdf_nbuf_t curr_nbuf, next_nbuf;
  942. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  943. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  944. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  945. dp_rx_debug("%pK: Drop decapped frames", soc);
  946. goto free;
  947. }
  948. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  949. if (!DP_FRAME_IS_DATA(wh)) {
  950. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  951. goto free;
  952. }
  953. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  954. dp_rx_err("%pK: Invalid nbuf length", soc);
  955. goto free;
  956. }
  957. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  958. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  959. dp_rx_err("%pK: PDEV %s", soc, !pdev ? "not found" : "down");
  960. goto free;
  961. }
  962. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  963. QDF_STATUS_SUCCESS)
  964. return 0;
  965. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  966. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  967. QDF_MAC_ADDR_SIZE) == 0) {
  968. goto out;
  969. }
  970. }
  971. if (!vdev) {
  972. dp_rx_err("%pK: VDEV not found", soc);
  973. goto free;
  974. }
  975. out:
  976. msg.wh = wh;
  977. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  978. msg.nbuf = mpdu;
  979. msg.vdev_id = vdev->vdev_id;
  980. /*
  981. * NOTE: Only valid for HKv1.
  982. * If smart monitor mode is enabled on RE, we are getting invalid
  983. * peer frames with RA as STA mac of RE and the TA not matching
  984. * with any NAC list or the the BSSID.Such frames need to dropped
  985. * in order to avoid HM_WDS false addition.
  986. */
  987. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  988. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  989. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  990. soc, wh->i_addr1);
  991. goto free;
  992. }
  993. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  994. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  995. pdev->pdev_id, &msg);
  996. }
  997. free:
  998. /* Drop and free packet */
  999. curr_nbuf = mpdu;
  1000. while (curr_nbuf) {
  1001. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1002. dp_rx_nbuf_free(curr_nbuf);
  1003. curr_nbuf = next_nbuf;
  1004. }
  1005. return 0;
  1006. }
  1007. /**
  1008. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  1009. * @soc: DP SOC handle
  1010. * @mpdu: mpdu for which peer is invalid
  1011. * @mpdu_done: if an mpdu is completed
  1012. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1013. * pool_id has same mapping)
  1014. *
  1015. * return: integer type
  1016. */
  1017. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1018. qdf_nbuf_t mpdu, bool mpdu_done,
  1019. uint8_t mac_id)
  1020. {
  1021. /* Only trigger the process when mpdu is completed */
  1022. if (mpdu_done)
  1023. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1024. }
  1025. #else
  1026. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1027. uint8_t mac_id)
  1028. {
  1029. qdf_nbuf_t curr_nbuf, next_nbuf;
  1030. struct dp_pdev *pdev;
  1031. struct dp_vdev *vdev = NULL;
  1032. struct ieee80211_frame *wh;
  1033. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1034. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1035. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1036. if (!DP_FRAME_IS_DATA(wh)) {
  1037. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1038. "only for data frames");
  1039. goto free;
  1040. }
  1041. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1042. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  1043. goto free;
  1044. }
  1045. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1046. if (!pdev) {
  1047. dp_rx_info_rl("%pK: PDEV not found", soc);
  1048. goto free;
  1049. }
  1050. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1051. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1052. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1053. QDF_MAC_ADDR_SIZE) == 0) {
  1054. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1055. goto out;
  1056. }
  1057. }
  1058. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1059. if (!vdev) {
  1060. dp_rx_info_rl("%pK: VDEV not found", soc);
  1061. goto free;
  1062. }
  1063. out:
  1064. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1065. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1066. free:
  1067. /* reset the head and tail pointers */
  1068. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1069. if (pdev) {
  1070. pdev->invalid_peer_head_msdu = NULL;
  1071. pdev->invalid_peer_tail_msdu = NULL;
  1072. }
  1073. /* Drop and free packet */
  1074. curr_nbuf = mpdu;
  1075. while (curr_nbuf) {
  1076. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1077. dp_rx_nbuf_free(curr_nbuf);
  1078. curr_nbuf = next_nbuf;
  1079. }
  1080. /* Reset the head and tail pointers */
  1081. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1082. if (pdev) {
  1083. pdev->invalid_peer_head_msdu = NULL;
  1084. pdev->invalid_peer_tail_msdu = NULL;
  1085. }
  1086. return 0;
  1087. }
  1088. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1089. qdf_nbuf_t mpdu, bool mpdu_done,
  1090. uint8_t mac_id)
  1091. {
  1092. /* Process the nbuf */
  1093. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1094. }
  1095. #endif
  1096. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1097. #ifdef RECEIVE_OFFLOAD
  1098. /**
  1099. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1100. * @soc: dp soc handle
  1101. * @msdu: MSDU for which the offload info is to be printed
  1102. *
  1103. * Return: None
  1104. */
  1105. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1106. qdf_nbuf_t msdu)
  1107. {
  1108. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1109. dp_verbose_debug("lro_eligible 0x%x",
  1110. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1111. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1112. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1113. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1114. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1115. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1116. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1117. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1118. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1119. dp_verbose_debug("---------------------------------------------------------");
  1120. }
  1121. /**
  1122. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  1123. * @soc: DP SOC handle
  1124. * @rx_tlv: RX TLV received for the msdu
  1125. * @msdu: msdu for which GRO info needs to be filled
  1126. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  1127. *
  1128. * Return: None
  1129. */
  1130. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1131. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1132. {
  1133. struct hal_offload_info offload_info;
  1134. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1135. return;
  1136. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1137. return;
  1138. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1139. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1140. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1141. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1142. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1143. rx_tlv);
  1144. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1145. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1146. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1147. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1148. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1149. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1150. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1151. dp_rx_print_offload_info(soc, msdu);
  1152. }
  1153. #endif /* RECEIVE_OFFLOAD */
  1154. /**
  1155. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1156. *
  1157. * @soc: DP soc handle
  1158. * @nbuf: pointer to msdu.
  1159. * @mpdu_len: mpdu length
  1160. * @l3_pad_len: L3 padding length by HW
  1161. *
  1162. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  1163. */
  1164. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1165. qdf_nbuf_t nbuf,
  1166. uint16_t *mpdu_len,
  1167. uint32_t l3_pad_len)
  1168. {
  1169. bool last_nbuf;
  1170. uint32_t pkt_hdr_size;
  1171. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1172. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1173. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1174. last_nbuf = false;
  1175. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1176. } else {
  1177. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1178. last_nbuf = true;
  1179. *mpdu_len = 0;
  1180. }
  1181. return last_nbuf;
  1182. }
  1183. /**
  1184. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1185. *
  1186. * @soc: DP soc handle
  1187. * @nbuf: pointer to msdu.
  1188. *
  1189. * Return: returns padding length in bytes.
  1190. */
  1191. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1192. qdf_nbuf_t nbuf)
  1193. {
  1194. uint32_t l3_hdr_pad = 0;
  1195. uint8_t *rx_tlv_hdr;
  1196. struct hal_rx_msdu_metadata msdu_metadata;
  1197. while (nbuf) {
  1198. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1199. /* scattered msdu end with continuation is 0 */
  1200. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1201. hal_rx_msdu_metadata_get(soc->hal_soc,
  1202. rx_tlv_hdr,
  1203. &msdu_metadata);
  1204. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1205. break;
  1206. }
  1207. nbuf = nbuf->next;
  1208. }
  1209. return l3_hdr_pad;
  1210. }
  1211. /**
  1212. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  1213. * multiple nbufs.
  1214. * @soc: DP SOC handle
  1215. * @nbuf: pointer to the first msdu of an amsdu.
  1216. *
  1217. * This function implements the creation of RX frag_list for cases
  1218. * where an MSDU is spread across multiple nbufs.
  1219. *
  1220. * Return: returns the head nbuf which contains complete frag_list.
  1221. */
  1222. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1223. {
  1224. qdf_nbuf_t parent, frag_list, next = NULL;
  1225. uint16_t frag_list_len = 0;
  1226. uint16_t mpdu_len;
  1227. bool last_nbuf;
  1228. uint32_t l3_hdr_pad_offset = 0;
  1229. /*
  1230. * Use msdu len got from REO entry descriptor instead since
  1231. * there is case the RX PKT TLV is corrupted while msdu_len
  1232. * from REO descriptor is right for non-raw RX scatter msdu.
  1233. */
  1234. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1235. /*
  1236. * this is a case where the complete msdu fits in one single nbuf.
  1237. * in this case HW sets both start and end bit and we only need to
  1238. * reset these bits for RAW mode simulator to decap the pkt
  1239. */
  1240. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1241. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1242. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1243. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1244. return nbuf;
  1245. }
  1246. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1247. /*
  1248. * This is a case where we have multiple msdus (A-MSDU) spread across
  1249. * multiple nbufs. here we create a fraglist out of these nbufs.
  1250. *
  1251. * the moment we encounter a nbuf with continuation bit set we
  1252. * know for sure we have an MSDU which is spread across multiple
  1253. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1254. */
  1255. parent = nbuf;
  1256. frag_list = nbuf->next;
  1257. nbuf = nbuf->next;
  1258. /*
  1259. * set the start bit in the first nbuf we encounter with continuation
  1260. * bit set. This has the proper mpdu length set as it is the first
  1261. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1262. * nbufs will form the frag_list of the parent nbuf.
  1263. */
  1264. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1265. /*
  1266. * L3 header padding is only needed for the 1st buffer
  1267. * in a scattered msdu
  1268. */
  1269. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1270. l3_hdr_pad_offset);
  1271. /*
  1272. * MSDU cont bit is set but reported MPDU length can fit
  1273. * in to single buffer
  1274. *
  1275. * Increment error stats and avoid SG list creation
  1276. */
  1277. if (last_nbuf) {
  1278. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1279. qdf_nbuf_pull_head(parent,
  1280. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1281. return parent;
  1282. }
  1283. /*
  1284. * this is where we set the length of the fragments which are
  1285. * associated to the parent nbuf. We iterate through the frag_list
  1286. * till we hit the last_nbuf of the list.
  1287. */
  1288. do {
  1289. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1290. qdf_nbuf_pull_head(nbuf,
  1291. soc->rx_pkt_tlv_size);
  1292. frag_list_len += qdf_nbuf_len(nbuf);
  1293. if (last_nbuf) {
  1294. next = nbuf->next;
  1295. nbuf->next = NULL;
  1296. break;
  1297. }
  1298. nbuf = nbuf->next;
  1299. } while (!last_nbuf);
  1300. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1301. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1302. parent->next = next;
  1303. qdf_nbuf_pull_head(parent,
  1304. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1305. return parent;
  1306. }
  1307. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1308. #ifdef QCA_PEER_EXT_STATS
  1309. /*
  1310. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1311. * @peer: DP soc context
  1312. * @nbuf: NBuffer
  1313. *
  1314. * Return: Void
  1315. */
  1316. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1317. qdf_nbuf_t nbuf)
  1318. {
  1319. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1320. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1321. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1322. }
  1323. #endif /* QCA_PEER_EXT_STATS */
  1324. /**
  1325. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1326. * to pass in correct fields
  1327. *
  1328. * @vdev: pdev handle
  1329. * @tx_desc: tx descriptor
  1330. * @tid: tid value
  1331. * Return: none
  1332. */
  1333. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1334. {
  1335. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1336. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1337. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1338. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1339. uint32_t interframe_delay =
  1340. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1341. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1342. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1343. /*
  1344. * Update interframe delay stats calculated at deliver_data_ol point.
  1345. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1346. * interframe delay will not be calculate correctly for 1st frame.
  1347. * On the other side, this will help in avoiding extra per packet check
  1348. * of vdev->prev_rx_deliver_tstamp.
  1349. */
  1350. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1351. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1352. vdev->prev_rx_deliver_tstamp = current_ts;
  1353. }
  1354. /**
  1355. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1356. * @pdev: dp pdev reference
  1357. * @buf_list: buffer list to be dropepd
  1358. *
  1359. * Return: int (number of bufs dropped)
  1360. */
  1361. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1362. qdf_nbuf_t buf_list)
  1363. {
  1364. struct cdp_tid_rx_stats *stats = NULL;
  1365. uint8_t tid = 0, ring_id = 0;
  1366. int num_dropped = 0;
  1367. qdf_nbuf_t buf, next_buf;
  1368. buf = buf_list;
  1369. while (buf) {
  1370. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1371. next_buf = qdf_nbuf_queue_next(buf);
  1372. tid = qdf_nbuf_get_tid_val(buf);
  1373. if (qdf_likely(pdev)) {
  1374. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1375. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1376. stats->delivered_to_stack--;
  1377. }
  1378. dp_rx_nbuf_free(buf);
  1379. buf = next_buf;
  1380. num_dropped++;
  1381. }
  1382. return num_dropped;
  1383. }
  1384. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1385. /**
  1386. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1387. * @soc: core txrx main context
  1388. * @vdev: vdev
  1389. * @txrx_peer: txrx peer
  1390. * @nbuf_head: skb list head
  1391. *
  1392. * Return: true if packet is delivered to netdev per STA.
  1393. */
  1394. static inline bool
  1395. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1396. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1397. {
  1398. /*
  1399. * When extended WDS is disabled, frames are sent to AP netdevice.
  1400. */
  1401. if (qdf_likely(!vdev->wds_ext_enabled))
  1402. return false;
  1403. /*
  1404. * There can be 2 cases:
  1405. * 1. Send frame to parent netdev if its not for netdev per STA
  1406. * 2. If frame is meant for netdev per STA:
  1407. * a. Send frame to appropriate netdev using registered fp.
  1408. * b. If fp is NULL, drop the frames.
  1409. */
  1410. if (!txrx_peer->wds_ext.init)
  1411. return false;
  1412. if (txrx_peer->osif_rx)
  1413. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1414. else
  1415. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1416. return true;
  1417. }
  1418. #else
  1419. static inline bool
  1420. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1421. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1422. {
  1423. return false;
  1424. }
  1425. #endif
  1426. #ifdef PEER_CACHE_RX_PKTS
  1427. /**
  1428. * dp_rx_flush_rx_cached() - flush cached rx frames
  1429. * @peer: peer
  1430. * @drop: flag to drop frames or forward to net stack
  1431. *
  1432. * Return: None
  1433. */
  1434. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1435. {
  1436. struct dp_peer_cached_bufq *bufqi;
  1437. struct dp_rx_cached_buf *cache_buf = NULL;
  1438. ol_txrx_rx_fp data_rx = NULL;
  1439. int num_buff_elem;
  1440. QDF_STATUS status;
  1441. if (!peer->txrx_peer) {
  1442. if (!peer->sta_self_peer) {
  1443. qdf_err("txrx_peer NULL!!");
  1444. qdf_assert_always(0);
  1445. }
  1446. return;
  1447. }
  1448. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1449. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1450. return;
  1451. }
  1452. qdf_spin_lock_bh(&peer->peer_info_lock);
  1453. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1454. data_rx = peer->vdev->osif_rx;
  1455. else
  1456. drop = true;
  1457. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1458. bufqi = &peer->txrx_peer->bufq_info;
  1459. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1460. qdf_list_remove_front(&bufqi->cached_bufq,
  1461. (qdf_list_node_t **)&cache_buf);
  1462. while (cache_buf) {
  1463. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1464. cache_buf->buf);
  1465. bufqi->entries -= num_buff_elem;
  1466. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1467. if (drop) {
  1468. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1469. cache_buf->buf);
  1470. } else {
  1471. /* Flush the cached frames to OSIF DEV */
  1472. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1473. if (status != QDF_STATUS_SUCCESS)
  1474. bufqi->dropped = dp_rx_drop_nbuf_list(
  1475. peer->vdev->pdev,
  1476. cache_buf->buf);
  1477. }
  1478. qdf_mem_free(cache_buf);
  1479. cache_buf = NULL;
  1480. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1481. qdf_list_remove_front(&bufqi->cached_bufq,
  1482. (qdf_list_node_t **)&cache_buf);
  1483. }
  1484. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1485. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1486. }
  1487. /**
  1488. * dp_rx_enqueue_rx() - cache rx frames
  1489. * @peer: peer
  1490. * @rx_buf_list: cache buffer list
  1491. *
  1492. * Return: None
  1493. */
  1494. static QDF_STATUS
  1495. dp_rx_enqueue_rx(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t rx_buf_list)
  1496. {
  1497. struct dp_rx_cached_buf *cache_buf;
  1498. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1499. int num_buff_elem;
  1500. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1501. struct dp_peer *peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1502. DP_MOD_ID_RX);
  1503. if (!peer) {
  1504. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1505. rx_buf_list);
  1506. return QDF_STATUS_E_INVAL;
  1507. }
  1508. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1509. bufqi->dropped);
  1510. if (!peer->valid) {
  1511. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1512. rx_buf_list);
  1513. ret = QDF_STATUS_E_INVAL;
  1514. goto fail;
  1515. }
  1516. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1517. if (bufqi->entries >= bufqi->thresh) {
  1518. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1519. rx_buf_list);
  1520. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1521. ret = QDF_STATUS_E_RESOURCES;
  1522. goto fail;
  1523. }
  1524. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1525. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1526. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1527. if (!cache_buf) {
  1528. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1529. "Failed to allocate buf to cache rx frames");
  1530. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1531. rx_buf_list);
  1532. ret = QDF_STATUS_E_NOMEM;
  1533. goto fail;
  1534. }
  1535. cache_buf->buf = rx_buf_list;
  1536. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1537. qdf_list_insert_back(&bufqi->cached_bufq,
  1538. &cache_buf->node);
  1539. bufqi->entries += num_buff_elem;
  1540. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1541. fail:
  1542. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  1543. return ret;
  1544. }
  1545. static inline
  1546. bool dp_rx_is_peer_cache_bufq_supported(void)
  1547. {
  1548. return true;
  1549. }
  1550. #else
  1551. static inline
  1552. bool dp_rx_is_peer_cache_bufq_supported(void)
  1553. {
  1554. return false;
  1555. }
  1556. static inline QDF_STATUS
  1557. dp_rx_enqueue_rx(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t rx_buf_list)
  1558. {
  1559. return QDF_STATUS_SUCCESS;
  1560. }
  1561. #endif
  1562. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1563. /**
  1564. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1565. * using the appropriate call back functions.
  1566. * @soc: soc
  1567. * @vdev: vdev
  1568. * @peer: peer
  1569. * @nbuf_head: skb list head
  1570. * @nbuf_tail: skb list tail
  1571. *
  1572. * Return: None
  1573. */
  1574. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1575. struct dp_vdev *vdev,
  1576. struct dp_txrx_peer *txrx_peer,
  1577. qdf_nbuf_t nbuf_head)
  1578. {
  1579. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1580. txrx_peer, nbuf_head)))
  1581. return;
  1582. /* Function pointer initialized only when FISA is enabled */
  1583. if (vdev->osif_fisa_rx)
  1584. /* on failure send it via regular path */
  1585. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1586. else
  1587. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1588. }
  1589. #else
  1590. /**
  1591. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1592. * using the appropriate call back functions.
  1593. * @soc: soc
  1594. * @vdev: vdev
  1595. * @txrx_peer: txrx peer
  1596. * @nbuf_head: skb list head
  1597. * @nbuf_tail: skb list tail
  1598. *
  1599. * Check the return status of the call back function and drop
  1600. * the packets if the return status indicates a failure.
  1601. *
  1602. * Return: None
  1603. */
  1604. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1605. struct dp_vdev *vdev,
  1606. struct dp_txrx_peer *txrx_peer,
  1607. qdf_nbuf_t nbuf_head)
  1608. {
  1609. int num_nbuf = 0;
  1610. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1611. /* Function pointer initialized only when FISA is enabled */
  1612. if (vdev->osif_fisa_rx)
  1613. /* on failure send it via regular path */
  1614. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1615. else if (vdev->osif_rx)
  1616. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1617. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1618. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1619. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1620. if (txrx_peer)
  1621. DP_STATS_DEC(txrx_peer, to_stack.num, num_nbuf);
  1622. }
  1623. }
  1624. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1625. /*
  1626. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1627. * @soc DP soc
  1628. * @vdev: DP vdev handle
  1629. * @txrx_peer: pointer to the txrx peer object
  1630. * nbuf_head: skb list head
  1631. *
  1632. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1633. * QDF_STATUS_E_FAILURE
  1634. */
  1635. static inline QDF_STATUS
  1636. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1637. struct dp_vdev *vdev,
  1638. struct dp_txrx_peer *txrx_peer,
  1639. qdf_nbuf_t nbuf_head)
  1640. {
  1641. int num_nbuf;
  1642. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1643. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1644. /*
  1645. * This is a special case where vdev is invalid,
  1646. * so we cannot know the pdev to which this packet
  1647. * belonged. Hence we update the soc rx error stats.
  1648. */
  1649. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1650. return QDF_STATUS_E_FAILURE;
  1651. }
  1652. /*
  1653. * highly unlikely to have a vdev without a registered rx
  1654. * callback function. if so let us free the nbuf_list.
  1655. */
  1656. if (qdf_unlikely(!vdev->osif_rx)) {
  1657. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  1658. dp_rx_enqueue_rx(txrx_peer, nbuf_head);
  1659. } else {
  1660. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1661. nbuf_head);
  1662. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  1663. vdev->pdev->enhanced_stats_en);
  1664. }
  1665. return QDF_STATUS_E_FAILURE;
  1666. }
  1667. return QDF_STATUS_SUCCESS;
  1668. }
  1669. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1670. struct dp_vdev *vdev,
  1671. struct dp_txrx_peer *txrx_peer,
  1672. qdf_nbuf_t nbuf_head,
  1673. qdf_nbuf_t nbuf_tail)
  1674. {
  1675. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1676. QDF_STATUS_SUCCESS)
  1677. return QDF_STATUS_E_FAILURE;
  1678. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1679. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1680. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1681. &nbuf_tail);
  1682. }
  1683. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  1684. return QDF_STATUS_SUCCESS;
  1685. }
  1686. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1687. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1688. struct dp_vdev *vdev,
  1689. struct dp_txrx_peer *txrx_peer,
  1690. qdf_nbuf_t nbuf_head,
  1691. qdf_nbuf_t nbuf_tail)
  1692. {
  1693. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1694. QDF_STATUS_SUCCESS)
  1695. return QDF_STATUS_E_FAILURE;
  1696. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  1697. return QDF_STATUS_SUCCESS;
  1698. }
  1699. #endif
  1700. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1701. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1702. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1703. { \
  1704. qdf_nbuf_t nbuf_local; \
  1705. struct dp_peer *peer_local; \
  1706. struct dp_vdev *vdev_local = vdev_hdl; \
  1707. do { \
  1708. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1709. break; \
  1710. nbuf_local = nbuf; \
  1711. peer_local = peer; \
  1712. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1713. break; \
  1714. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1715. break; \
  1716. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1717. (nbuf_local), \
  1718. (peer_local), 0, 1); \
  1719. } while (0); \
  1720. }
  1721. #else
  1722. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1723. #endif
  1724. /**
  1725. * dp_rx_msdu_stats_update() - update per msdu stats.
  1726. * @soc: core txrx main context
  1727. * @nbuf: pointer to the first msdu of an amsdu.
  1728. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1729. * @txrx_peer: pointer to the txrx peer object.
  1730. * @ring_id: reo dest ring number on which pkt is reaped.
  1731. * @tid_stats: per tid rx stats.
  1732. *
  1733. * update all the per msdu stats for that nbuf.
  1734. * Return: void
  1735. */
  1736. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1737. uint8_t *rx_tlv_hdr,
  1738. struct dp_txrx_peer *txrx_peer,
  1739. uint8_t ring_id,
  1740. struct cdp_tid_rx_stats *tid_stats)
  1741. {
  1742. bool is_ampdu, is_not_amsdu;
  1743. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1744. struct dp_vdev *vdev = txrx_peer->vdev;
  1745. bool enh_flag;
  1746. qdf_ether_header_t *eh;
  1747. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1748. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  1749. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1750. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1751. DP_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1752. DP_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1753. DP_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1754. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1755. tid_stats->msdu_cnt++;
  1756. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1757. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1758. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1759. enh_flag = vdev->pdev->enhanced_stats_en;
  1760. DP_PEER_MC_INCC_PKT(peer, 1, msdu_len, enh_flag);
  1761. tid_stats->mcast_msdu_cnt++;
  1762. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1763. DP_PEER_BC_INCC_PKT(peer, 1, msdu_len, enh_flag);
  1764. tid_stats->bcast_msdu_cnt++;
  1765. }
  1766. }
  1767. /*
  1768. * currently we can return from here as we have similar stats
  1769. * updated at per ppdu level instead of msdu level
  1770. */
  1771. if (!soc->process_rx_status)
  1772. return;
  1773. peer->stats.rx.last_rx_ts = qdf_system_ticks();
  1774. /*
  1775. * TODO - For KIWI this field is present in ring_desc
  1776. * Try to use ring desc instead of tlv.
  1777. */
  1778. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  1779. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1780. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1781. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  1782. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1783. tid = qdf_nbuf_get_tid_val(nbuf);
  1784. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1785. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1786. rx_tlv_hdr);
  1787. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1788. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1789. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1790. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1791. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1792. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1793. DP_STATS_INC(peer, rx.bw[bw], 1);
  1794. /*
  1795. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1796. * then increase index [nss - 1] in array counter.
  1797. */
  1798. if (nss > 0 && (pkt_type == DOT11_N ||
  1799. pkt_type == DOT11_AC ||
  1800. pkt_type == DOT11_AX))
  1801. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1802. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1803. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1804. hal_rx_tlv_mic_err_get(soc->hal_soc, rx_tlv_hdr));
  1805. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1806. hal_rx_tlv_decrypt_err_get(soc->hal_soc, rx_tlv_hdr));
  1807. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1808. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1809. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1810. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1811. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1812. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1813. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1814. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1815. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1816. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1817. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1818. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1819. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1820. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1821. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1822. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1823. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1824. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1825. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1826. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1827. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1828. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1829. }
  1830. #ifndef WDS_VENDOR_EXTENSION
  1831. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1832. struct dp_vdev *vdev,
  1833. struct dp_txrx_peer *txrx_peer)
  1834. {
  1835. return 1;
  1836. }
  1837. #endif
  1838. #ifdef RX_DESC_DEBUG_CHECK
  1839. /**
  1840. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1841. * corruption
  1842. *
  1843. * @ring_desc: REO ring descriptor
  1844. * @rx_desc: Rx descriptor
  1845. *
  1846. * Return: NONE
  1847. */
  1848. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1849. hal_ring_desc_t ring_desc,
  1850. struct dp_rx_desc *rx_desc)
  1851. {
  1852. struct hal_buf_info hbi;
  1853. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1854. /* Sanity check for possible buffer paddr corruption */
  1855. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  1856. return QDF_STATUS_SUCCESS;
  1857. return QDF_STATUS_E_FAILURE;
  1858. }
  1859. /**
  1860. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  1861. * out of bound access from H.W
  1862. *
  1863. * @soc: DP soc
  1864. * @pkt_len: Packet length received from H.W
  1865. *
  1866. * Return: NONE
  1867. */
  1868. static inline void
  1869. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  1870. uint32_t pkt_len)
  1871. {
  1872. struct rx_desc_pool *rx_desc_pool;
  1873. rx_desc_pool = &soc->rx_desc_buf[0];
  1874. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  1875. }
  1876. #else
  1877. static inline void
  1878. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  1879. #endif
  1880. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1881. /**
  1882. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1883. * no corresbonding peer found
  1884. * @soc: core txrx main context
  1885. * @nbuf: pkt skb pointer
  1886. *
  1887. * This function will try to deliver some RX special frames to stack
  1888. * even there is no peer matched found. for instance, LFR case, some
  1889. * eapol data will be sent to host before peer_map done.
  1890. *
  1891. * Return: None
  1892. */
  1893. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1894. {
  1895. uint16_t peer_id;
  1896. uint8_t vdev_id;
  1897. struct dp_vdev *vdev = NULL;
  1898. uint32_t l2_hdr_offset = 0;
  1899. uint16_t msdu_len = 0;
  1900. uint32_t pkt_len = 0;
  1901. uint8_t *rx_tlv_hdr;
  1902. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1903. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1904. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1905. if (peer_id > soc->max_peer_id)
  1906. goto deliver_fail;
  1907. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1908. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  1909. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1910. goto deliver_fail;
  1911. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1912. goto deliver_fail;
  1913. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1914. l2_hdr_offset =
  1915. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1916. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1917. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  1918. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1919. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1920. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  1921. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1922. qdf_nbuf_set_exc_frame(nbuf, 1);
  1923. if (QDF_STATUS_SUCCESS !=
  1924. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1925. goto deliver_fail;
  1926. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1927. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1928. return;
  1929. }
  1930. deliver_fail:
  1931. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1932. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1933. dp_rx_nbuf_free(nbuf);
  1934. if (vdev)
  1935. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1936. }
  1937. #else
  1938. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1939. {
  1940. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1941. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1942. dp_rx_nbuf_free(nbuf);
  1943. }
  1944. #endif
  1945. /**
  1946. * dp_rx_srng_get_num_pending() - get number of pending entries
  1947. * @hal_soc: hal soc opaque pointer
  1948. * @hal_ring: opaque pointer to the HAL Rx Ring
  1949. * @num_entries: number of entries in the hal_ring.
  1950. * @near_full: pointer to a boolean. This is set if ring is near full.
  1951. *
  1952. * The function returns the number of entries in a destination ring which are
  1953. * yet to be reaped. The function also checks if the ring is near full.
  1954. * If more than half of the ring needs to be reaped, the ring is considered
  1955. * approaching full.
  1956. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1957. * entries. It should not be called within a SRNG lock. HW pointer value is
  1958. * synced into cached_hp.
  1959. *
  1960. * Return: Number of pending entries if any
  1961. */
  1962. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1963. hal_ring_handle_t hal_ring_hdl,
  1964. uint32_t num_entries,
  1965. bool *near_full)
  1966. {
  1967. uint32_t num_pending = 0;
  1968. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1969. hal_ring_hdl,
  1970. true);
  1971. if (num_entries && (num_pending >= num_entries >> 1))
  1972. *near_full = true;
  1973. else
  1974. *near_full = false;
  1975. return num_pending;
  1976. }
  1977. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1978. #ifdef WLAN_SUPPORT_RX_FISA
  1979. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  1980. {
  1981. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1982. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  1983. }
  1984. /**
  1985. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1986. * @nbuf: pkt skb pointer
  1987. * @l3_padding: l3 padding
  1988. *
  1989. * Return: None
  1990. */
  1991. static inline
  1992. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1993. {
  1994. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1995. }
  1996. #else
  1997. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  1998. {
  1999. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2000. }
  2001. static inline
  2002. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  2003. {
  2004. }
  2005. #endif
  2006. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2007. #ifdef DP_RX_DROP_RAW_FRM
  2008. /**
  2009. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  2010. * @nbuf: pkt skb pointer
  2011. *
  2012. * Return: true - raw frame, dropped
  2013. * false - not raw frame, do nothing
  2014. */
  2015. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2016. {
  2017. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2018. dp_rx_nbuf_free(nbuf);
  2019. return true;
  2020. }
  2021. return false;
  2022. }
  2023. #endif
  2024. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  2025. /**
  2026. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  2027. * @soc: Datapath soc structure
  2028. * @ring_num: REO ring number
  2029. * @ring_desc: REO ring descriptor
  2030. *
  2031. * Returns: None
  2032. */
  2033. void
  2034. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  2035. hal_ring_desc_t ring_desc)
  2036. {
  2037. struct dp_buf_info_record *record;
  2038. struct hal_buf_info hbi;
  2039. uint32_t idx;
  2040. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  2041. return;
  2042. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2043. /* buffer_addr_info is the first element of ring_desc */
  2044. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  2045. &hbi);
  2046. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  2047. DP_RX_HIST_MAX);
  2048. /* No NULL check needed for record since its an array */
  2049. record = &soc->rx_ring_history[ring_num]->entry[idx];
  2050. record->timestamp = qdf_get_log_timestamp();
  2051. record->hbi.paddr = hbi.paddr;
  2052. record->hbi.sw_cookie = hbi.sw_cookie;
  2053. record->hbi.rbm = hbi.rbm;
  2054. }
  2055. #endif
  2056. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2057. /**
  2058. * dp_rx_update_stats() - Update soc level rx packet count
  2059. * @soc: DP soc handle
  2060. * @nbuf: nbuf received
  2061. *
  2062. * Returns: none
  2063. */
  2064. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2065. {
  2066. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2067. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2068. }
  2069. #endif
  2070. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2071. /**
  2072. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  2073. * @soc : dp_soc handle
  2074. * @pdev: dp_pdev handle
  2075. * @peer_id: peer_id of the peer for which completion came
  2076. * @ppdu_id: ppdu_id
  2077. * @netbuf: Buffer pointer
  2078. *
  2079. * This function is used to deliver rx packet to packet capture
  2080. */
  2081. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2082. uint16_t peer_id, uint32_t is_offload,
  2083. qdf_nbuf_t netbuf)
  2084. {
  2085. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2086. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2087. peer_id, is_offload, pdev->pdev_id);
  2088. }
  2089. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2090. uint32_t is_offload)
  2091. {
  2092. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2093. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2094. soc, nbuf, HTT_INVALID_VDEV,
  2095. is_offload, 0);
  2096. }
  2097. #endif
  2098. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2099. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2100. {
  2101. QDF_STATUS ret;
  2102. if (vdev->osif_rx_flush) {
  2103. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2104. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2105. dp_err("Failed to flush rx pkts for vdev %d\n",
  2106. vdev->vdev_id);
  2107. return ret;
  2108. }
  2109. }
  2110. return QDF_STATUS_SUCCESS;
  2111. }
  2112. static QDF_STATUS
  2113. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2114. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2115. struct dp_pdev *dp_pdev,
  2116. struct rx_desc_pool *rx_desc_pool)
  2117. {
  2118. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2119. (nbuf_frag_info_t->virt_addr).nbuf =
  2120. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2121. RX_BUFFER_RESERVATION,
  2122. rx_desc_pool->buf_alignment, FALSE);
  2123. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2124. dp_err("nbuf alloc failed");
  2125. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2126. return ret;
  2127. }
  2128. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2129. (nbuf_frag_info_t->virt_addr).nbuf,
  2130. QDF_DMA_FROM_DEVICE,
  2131. rx_desc_pool->buf_size);
  2132. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2133. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2134. dp_err("nbuf map failed");
  2135. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2136. return ret;
  2137. }
  2138. nbuf_frag_info_t->paddr =
  2139. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2140. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2141. &nbuf_frag_info_t->paddr,
  2142. rx_desc_pool);
  2143. if (ret == QDF_STATUS_E_FAILURE) {
  2144. dp_err("nbuf check x86 failed");
  2145. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2146. return ret;
  2147. }
  2148. return QDF_STATUS_SUCCESS;
  2149. }
  2150. QDF_STATUS
  2151. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2152. struct dp_srng *dp_rxdma_srng,
  2153. struct rx_desc_pool *rx_desc_pool,
  2154. uint32_t num_req_buffers)
  2155. {
  2156. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2157. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2158. union dp_rx_desc_list_elem_t *next;
  2159. void *rxdma_ring_entry;
  2160. qdf_dma_addr_t paddr;
  2161. struct dp_rx_nbuf_frag_info *nf_info;
  2162. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2163. uint32_t buffer_index, nbuf_ptrs_per_page;
  2164. qdf_nbuf_t nbuf;
  2165. QDF_STATUS ret;
  2166. int page_idx, total_pages;
  2167. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2168. union dp_rx_desc_list_elem_t *tail = NULL;
  2169. int sync_hw_ptr = 1;
  2170. uint32_t num_entries_avail;
  2171. if (qdf_unlikely(!dp_pdev)) {
  2172. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2173. dp_soc, mac_id);
  2174. return QDF_STATUS_E_FAILURE;
  2175. }
  2176. if (qdf_unlikely(!rxdma_srng)) {
  2177. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2178. return QDF_STATUS_E_FAILURE;
  2179. }
  2180. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2181. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2182. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2183. rxdma_srng,
  2184. sync_hw_ptr);
  2185. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2186. if (!num_entries_avail) {
  2187. dp_err("Num of available entries is zero, nothing to do");
  2188. return QDF_STATUS_E_NOMEM;
  2189. }
  2190. if (num_entries_avail < num_req_buffers)
  2191. num_req_buffers = num_entries_avail;
  2192. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2193. num_req_buffers, &desc_list, &tail);
  2194. if (!nr_descs) {
  2195. dp_err("no free rx_descs in freelist");
  2196. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2197. return QDF_STATUS_E_NOMEM;
  2198. }
  2199. dp_debug("got %u RX descs for driver attach", nr_descs);
  2200. /*
  2201. * Try to allocate pointers to the nbuf one page at a time.
  2202. * Take pointers that can fit in one page of memory and
  2203. * iterate through the total descriptors that need to be
  2204. * allocated in order of pages. Reuse the pointers that
  2205. * have been allocated to fit in one page across each
  2206. * iteration to index into the nbuf.
  2207. */
  2208. total_pages = (nr_descs * sizeof(*nf_info)) / PAGE_SIZE;
  2209. /*
  2210. * Add an extra page to store the remainder if any
  2211. */
  2212. if ((nr_descs * sizeof(*nf_info)) % PAGE_SIZE)
  2213. total_pages++;
  2214. nf_info = qdf_mem_malloc(PAGE_SIZE);
  2215. if (!nf_info) {
  2216. dp_err("failed to allocate nbuf array");
  2217. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2218. QDF_BUG(0);
  2219. return QDF_STATUS_E_NOMEM;
  2220. }
  2221. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*nf_info);
  2222. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2223. qdf_mem_zero(nf_info, PAGE_SIZE);
  2224. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2225. /*
  2226. * The last page of buffer pointers may not be required
  2227. * completely based on the number of descriptors. Below
  2228. * check will ensure we are allocating only the
  2229. * required number of descriptors.
  2230. */
  2231. if (nr_nbuf_total >= nr_descs)
  2232. break;
  2233. /* Flag is set while pdev rx_desc_pool initialization */
  2234. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2235. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2236. &nf_info[nr_nbuf], dp_pdev,
  2237. rx_desc_pool);
  2238. else
  2239. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2240. &nf_info[nr_nbuf], dp_pdev,
  2241. rx_desc_pool);
  2242. if (QDF_IS_STATUS_ERROR(ret))
  2243. break;
  2244. nr_nbuf_total++;
  2245. }
  2246. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2247. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2248. rxdma_ring_entry =
  2249. hal_srng_src_get_next(dp_soc->hal_soc,
  2250. rxdma_srng);
  2251. qdf_assert_always(rxdma_ring_entry);
  2252. next = desc_list->next;
  2253. paddr = nf_info[buffer_index].paddr;
  2254. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2255. /* Flag is set while pdev rx_desc_pool initialization */
  2256. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2257. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2258. &nf_info[buffer_index]);
  2259. else
  2260. dp_rx_desc_prep(&desc_list->rx_desc,
  2261. &nf_info[buffer_index]);
  2262. desc_list->rx_desc.in_use = 1;
  2263. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2264. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2265. __func__,
  2266. RX_DESC_REPLENISHED);
  2267. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2268. desc_list->rx_desc.cookie,
  2269. rx_desc_pool->owner);
  2270. dp_ipa_handle_rx_buf_smmu_mapping(
  2271. dp_soc, nbuf,
  2272. rx_desc_pool->buf_size,
  2273. true);
  2274. desc_list = next;
  2275. }
  2276. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2277. rxdma_srng, nr_nbuf, nr_nbuf);
  2278. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2279. }
  2280. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2281. qdf_mem_free(nf_info);
  2282. if (!nr_nbuf_total) {
  2283. dp_err("No nbuf's allocated");
  2284. QDF_BUG(0);
  2285. return QDF_STATUS_E_RESOURCES;
  2286. }
  2287. /* No need to count the number of bytes received during replenish.
  2288. * Therefore set replenish.pkts.bytes as 0.
  2289. */
  2290. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2291. return QDF_STATUS_SUCCESS;
  2292. }
  2293. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2294. /**
  2295. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2296. * monitor destination ring via frag.
  2297. *
  2298. * Enable this flag only for monitor destination buffer processing
  2299. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2300. * If flag is set then frag based function will be called for alloc,
  2301. * map, prep desc and free ops for desc buffer else normal nbuf based
  2302. * function will be called.
  2303. *
  2304. * @rx_desc_pool: Rx desc pool
  2305. * @is_mon_dest_desc: Is it for monitor dest buffer
  2306. *
  2307. * Return: None
  2308. */
  2309. #ifdef DP_RX_MON_MEM_FRAG
  2310. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2311. bool is_mon_dest_desc)
  2312. {
  2313. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2314. if (is_mon_dest_desc)
  2315. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2316. }
  2317. #else
  2318. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2319. bool is_mon_dest_desc)
  2320. {
  2321. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2322. if (is_mon_dest_desc)
  2323. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2324. }
  2325. #endif
  2326. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2327. /*
  2328. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2329. * pool
  2330. *
  2331. * @pdev: core txrx pdev context
  2332. *
  2333. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2334. * QDF_STATUS_E_NOMEM
  2335. */
  2336. QDF_STATUS
  2337. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2338. {
  2339. struct dp_soc *soc = pdev->soc;
  2340. uint32_t rxdma_entries;
  2341. uint32_t rx_sw_desc_num;
  2342. struct dp_srng *dp_rxdma_srng;
  2343. struct rx_desc_pool *rx_desc_pool;
  2344. uint32_t status = QDF_STATUS_SUCCESS;
  2345. int mac_for_pdev;
  2346. mac_for_pdev = pdev->lmac_id;
  2347. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2348. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2349. soc, mac_for_pdev);
  2350. return status;
  2351. }
  2352. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2353. rxdma_entries = dp_rxdma_srng->num_entries;
  2354. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2355. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2356. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2357. status = dp_rx_desc_pool_alloc(soc,
  2358. rx_sw_desc_num,
  2359. rx_desc_pool);
  2360. if (status != QDF_STATUS_SUCCESS)
  2361. return status;
  2362. return status;
  2363. }
  2364. /*
  2365. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2366. *
  2367. * @pdev: core txrx pdev context
  2368. */
  2369. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2370. {
  2371. int mac_for_pdev = pdev->lmac_id;
  2372. struct dp_soc *soc = pdev->soc;
  2373. struct rx_desc_pool *rx_desc_pool;
  2374. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2375. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2376. }
  2377. /*
  2378. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2379. *
  2380. * @pdev: core txrx pdev context
  2381. *
  2382. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2383. * QDF_STATUS_E_NOMEM
  2384. */
  2385. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2386. {
  2387. int mac_for_pdev = pdev->lmac_id;
  2388. struct dp_soc *soc = pdev->soc;
  2389. uint32_t rxdma_entries;
  2390. uint32_t rx_sw_desc_num;
  2391. struct dp_srng *dp_rxdma_srng;
  2392. struct rx_desc_pool *rx_desc_pool;
  2393. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2394. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2395. /**
  2396. * If NSS is enabled, rx_desc_pool is already filled.
  2397. * Hence, just disable desc_pool frag flag.
  2398. */
  2399. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2400. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2401. soc, mac_for_pdev);
  2402. return QDF_STATUS_SUCCESS;
  2403. }
  2404. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2405. return QDF_STATUS_E_NOMEM;
  2406. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2407. rxdma_entries = dp_rxdma_srng->num_entries;
  2408. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2409. rx_sw_desc_num =
  2410. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2411. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2412. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2413. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2414. /* Disable monitor dest processing via frag */
  2415. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2416. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2417. rx_sw_desc_num, rx_desc_pool);
  2418. return QDF_STATUS_SUCCESS;
  2419. }
  2420. /*
  2421. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2422. * @pdev: core txrx pdev context
  2423. *
  2424. * This function resets the freelist of rx descriptors and destroys locks
  2425. * associated with this list of descriptors.
  2426. */
  2427. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2428. {
  2429. int mac_for_pdev = pdev->lmac_id;
  2430. struct dp_soc *soc = pdev->soc;
  2431. struct rx_desc_pool *rx_desc_pool;
  2432. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2433. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2434. }
  2435. /*
  2436. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2437. *
  2438. * @pdev: core txrx pdev context
  2439. *
  2440. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2441. * QDF_STATUS_E_NOMEM
  2442. */
  2443. QDF_STATUS
  2444. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2445. {
  2446. int mac_for_pdev = pdev->lmac_id;
  2447. struct dp_soc *soc = pdev->soc;
  2448. struct dp_srng *dp_rxdma_srng;
  2449. struct rx_desc_pool *rx_desc_pool;
  2450. uint32_t rxdma_entries;
  2451. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2452. rxdma_entries = dp_rxdma_srng->num_entries;
  2453. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2454. /* Initialize RX buffer pool which will be
  2455. * used during low memory conditions
  2456. */
  2457. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2458. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2459. dp_rxdma_srng,
  2460. rx_desc_pool,
  2461. rxdma_entries - 1);
  2462. }
  2463. /*
  2464. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2465. *
  2466. * @pdev: core txrx pdev context
  2467. */
  2468. void
  2469. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2470. {
  2471. int mac_for_pdev = pdev->lmac_id;
  2472. struct dp_soc *soc = pdev->soc;
  2473. struct rx_desc_pool *rx_desc_pool;
  2474. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2475. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2476. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2477. }
  2478. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2479. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2480. struct dp_txrx_peer *txrx_peer,
  2481. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2482. uint8_t *rx_tlv_hdr)
  2483. {
  2484. uint32_t l2_hdr_offset = 0;
  2485. uint16_t msdu_len = 0;
  2486. uint32_t skip_len;
  2487. l2_hdr_offset =
  2488. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2489. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2490. skip_len = l2_hdr_offset;
  2491. } else {
  2492. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2493. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2494. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2495. }
  2496. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2497. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2498. qdf_nbuf_pull_head(nbuf, skip_len);
  2499. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2500. dp_info("special frame, mpdu sn 0x%x",
  2501. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2502. qdf_nbuf_set_exc_frame(nbuf, 1);
  2503. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2504. nbuf, NULL);
  2505. return true;
  2506. }
  2507. return false;
  2508. }
  2509. #endif