b8c148edeb
when MBQ & C/N bit enabled, vol and mute register will become a new register, which cannot be updated, so add the new registers in regmap. Change-Id: I9b13889c6b5281a529b0feacfb7669575d5028e0 Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
906 lines
62 KiB
C
906 lines
62 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef WCD9378_REGISTERS_H
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#define WCD9378_REGISTERS_H
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enum {
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REG_NO_ACCESS,
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RD_REG,
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WR_REG,
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RD_WR_REG,
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};
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#define WCD9378_BASE 0x3fffffff
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#define WCD9378_REG(reg) (((reg & 0x0ff00000) >> 8) | (reg & 0xfff))
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#define WCD9378_FUNC0_BASE (WCD9378_BASE+0x01)
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#define WCD9378_FUNC_EXT_ID_0 (WCD9378_FUNC0_BASE+0x48)
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#define WCD9378_FUNC_EXT_ID_1 (WCD9378_FUNC0_BASE+0x49)
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#define WCD9378_FUNC_EXT_VER (WCD9378_FUNC0_BASE+0x50)
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#define WCD9378_FUNC_STAT (WCD9378_FUNC0_BASE+0x80000)
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#define WCD9378_DEV_MANU_ID_0 (WCD9378_FUNC0_BASE+0x100060)
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#define WCD9378_DEV_MANU_ID_1 (WCD9378_FUNC0_BASE+0x100061)
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#define WCD9378_DEV_PART_ID_0 (WCD9378_FUNC0_BASE+0x100068)
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#define WCD9378_DEV_PART_ID_1 (WCD9378_FUNC0_BASE+0x100069)
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#define WCD9378_DEV_VER (WCD9378_FUNC0_BASE+0x100070)
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#define WCD9378_A_BASE (WCD9378_BASE+0x180001)
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#define WCD9378_ANA_PAGE (WCD9378_A_BASE+0x00)
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#define WCD9378_ANA_BIAS (WCD9378_A_BASE+0x01)
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#define WCD9378_ANA_RX_SUPPLIES (WCD9378_A_BASE+0x08)
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#define WCD9378_ANA_HPH (WCD9378_A_BASE+0x09)
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#define WCD9378_ANA_EAR (WCD9378_A_BASE+0x0a)
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#define WCD9378_ANA_EAR_COMPANDER_CTL (WCD9378_A_BASE+0x0b)
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#define WCD9378_ANA_TX_CH1 (WCD9378_A_BASE+0x0e)
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#define WCD9378_ANA_TX_CH2 (WCD9378_A_BASE+0x0f)
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#define WCD9378_ANA_TX_CH3 (WCD9378_A_BASE+0x10)
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#define WCD9378_ANA_TX_CH3_HPF (WCD9378_A_BASE+0x11)
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#define WCD9378_ANA_MICB1_MICB2_DSP_EN_LOGIC (WCD9378_A_BASE+0x12)
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#define WCD9378_ANA_MICB3_DSP_EN_LOGIC (WCD9378_A_BASE+0x13)
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#define WCD9378_ANA_MBHC_MECH (WCD9378_A_BASE+0x14)
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#define WCD9378_ANA_MBHC_ELECT (WCD9378_A_BASE+0x15)
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#define WCD9378_ANA_MBHC_ZDET (WCD9378_A_BASE+0x16)
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#define WCD9378_ANA_MBHC_RESULT_1 (WCD9378_A_BASE+0x17)
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#define WCD9378_ANA_MBHC_RESULT_2 (WCD9378_A_BASE+0x18)
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#define WCD9378_ANA_MBHC_RESULT_3 (WCD9378_A_BASE+0x19)
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#define WCD9378_ANA_MBHC_BTN0 (WCD9378_A_BASE+0x1a)
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#define WCD9378_ANA_MBHC_BTN1 (WCD9378_A_BASE+0x1b)
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#define WCD9378_ANA_MBHC_BTN2 (WCD9378_A_BASE+0x1c)
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#define WCD9378_ANA_MBHC_BTN3 (WCD9378_A_BASE+0x1d)
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#define WCD9378_ANA_MBHC_BTN4 (WCD9378_A_BASE+0x1e)
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#define WCD9378_ANA_MBHC_BTN5 (WCD9378_A_BASE+0x1f)
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#define WCD9378_ANA_MBHC_BTN6 (WCD9378_A_BASE+0x20)
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#define WCD9378_ANA_MBHC_BTN7 (WCD9378_A_BASE+0x21)
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#define WCD9378_ANA_MICB1 (WCD9378_A_BASE+0x22)
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#define WCD9378_ANA_MICB2 (WCD9378_A_BASE+0x23)
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#define WCD9378_ANA_MICB2_RAMP (WCD9378_A_BASE+0x24)
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#define WCD9378_ANA_MICB3 (WCD9378_A_BASE+0x25)
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#define WCD9378_BIAS_CTL (WCD9378_A_BASE+0x28)
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#define WCD9378_BIAS_VBG_FINE_ADJ (WCD9378_A_BASE+0x29)
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#define WCD9378_LDOL_VDDCX_ADJUST (WCD9378_A_BASE+0x40)
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#define WCD9378_LDOL_DISABLE_LDOL (WCD9378_A_BASE+0x41)
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#define WCD9378_MBHC_CTL_CLK (WCD9378_A_BASE+0x56)
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#define WCD9378_MBHC_CTL_ANA (WCD9378_A_BASE+0x57)
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#define WCD9378_MBHC_CTL_SPARE_1 (WCD9378_A_BASE+0x58)
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#define WCD9378_MBHC_CTL_SPARE_2 (WCD9378_A_BASE+0x59)
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#define WCD9378_MBHC_CTL_BCS (WCD9378_A_BASE+0x5a)
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#define WCD9378_MBHC_MOISTURE_DET_FSM_STATUS (WCD9378_A_BASE+0x5b)
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#define WCD9378_MBHC_TEST_CTL (WCD9378_A_BASE+0x5c)
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#define WCD9378_LDOH_MODE (WCD9378_A_BASE+0x67)
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#define WCD9378_LDOH_BIAS (WCD9378_A_BASE+0x68)
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#define WCD9378_LDOH_STB_LOADS (WCD9378_A_BASE+0x69)
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#define WCD9378_LDOH_SLOWRAMP (WCD9378_A_BASE+0x6a)
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#define WCD9378_MICB1_TEST_CTL_1 (WCD9378_A_BASE+0x6b)
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#define WCD9378_MICB1_TEST_CTL_2 (WCD9378_A_BASE+0x6c)
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#define WCD9378_MICB1_TEST_CTL_3 (WCD9378_A_BASE+0x6d)
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#define WCD9378_MICB2_TEST_CTL_1 (WCD9378_A_BASE+0x6e)
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#define WCD9378_MICB2_TEST_CTL_2 (WCD9378_A_BASE+0x6f)
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#define WCD9378_MICB2_TEST_CTL_3 (WCD9378_A_BASE+0x70)
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#define WCD9378_MICB3_TEST_CTL_1 (WCD9378_A_BASE+0x71)
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#define WCD9378_MICB3_TEST_CTL_2 (WCD9378_A_BASE+0x72)
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#define WCD9378_MICB3_TEST_CTL_3 (WCD9378_A_BASE+0x73)
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#define WCD9378_TX_COM_ADC_VCM (WCD9378_A_BASE+0x77)
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#define WCD9378_TX_COM_BIAS_ATEST (WCD9378_A_BASE+0x78)
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#define WCD9378_TX_COM_SPARE1 (WCD9378_A_BASE+0x79)
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#define WCD9378_TX_COM_SPARE2 (WCD9378_A_BASE+0x7a)
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#define WCD9378_TX_COM_TXFE_DIV_CTL (WCD9378_A_BASE+0x7b)
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#define WCD9378_TX_COM_TXFE_DIV_START (WCD9378_A_BASE+0x7c)
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#define WCD9378_TX_COM_SPARE3 (WCD9378_A_BASE+0x7d)
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#define WCD9378_TX_COM_SPARE4 (WCD9378_A_BASE+0x7e)
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#define WCD9378_TX_1_2_TEST_EN (WCD9378_A_BASE+0x7f)
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#define WCD9378_TX_1_2_ADC_IB (WCD9378_A_BASE+0x80)
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#define WCD9378_TX_1_2_ATEST_REFCTL (WCD9378_A_BASE+0x81)
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#define WCD9378_TX_1_2_TEST_CTL (WCD9378_A_BASE+0x82)
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#define WCD9378_TX_1_2_TEST_BLK_EN1 (WCD9378_A_BASE+0x83)
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#define WCD9378_TX_1_2_TXFE1_CLKDIV (WCD9378_A_BASE+0x84)
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#define WCD9378_TX_1_2_SAR2_ERR (WCD9378_A_BASE+0x85)
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#define WCD9378_TX_1_2_SAR1_ERR (WCD9378_A_BASE+0x86)
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#define WCD9378_TX_3_TEST_EN (WCD9378_A_BASE+0x87)
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#define WCD9378_TX_3_ADC_IB (WCD9378_A_BASE+0x88)
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#define WCD9378_TX_3_ATEST_REFCTL (WCD9378_A_BASE+0x89)
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#define WCD9378_TX_3_TEST_CTL (WCD9378_A_BASE+0x8a)
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#define WCD9378_TX_3_TEST_BLK_EN3 (WCD9378_A_BASE+0x8b)
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#define WCD9378_TX_3_TXFE3_CLKDIV (WCD9378_A_BASE+0x8c)
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#define WCD9378_TX_3_SAR4_ERR (WCD9378_A_BASE+0x8d)
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#define WCD9378_TX_3_SAR3_ERR (WCD9378_A_BASE+0x8e)
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#define WCD9378_TX_3_TEST_BLK_EN2 (WCD9378_A_BASE+0x8f)
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#define WCD9378_TX_3_TXFE2_CLKDIV (WCD9378_A_BASE+0x90)
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#define WCD9378_TX_3_SPARE1 (WCD9378_A_BASE+0x91)
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#define WCD9378_TX_3_TEST_BLK_EN4 (WCD9378_A_BASE+0x92)
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#define WCD9378_TX_3_SPARE2 (WCD9378_A_BASE+0x93)
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#define WCD9378_TX_3_SPARE3 (WCD9378_A_BASE+0x94)
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#define WCD9378_RX_AUX_SW_CTL (WCD9378_A_BASE+0xb3)
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#define WCD9378_RX_PA_AUX_IN_CONN (WCD9378_A_BASE+0xb4)
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#define WCD9378_RX_TIMER_DIV (WCD9378_A_BASE+0xb5)
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#define WCD9378_RX_OCP_CTL (WCD9378_A_BASE+0xb6)
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#define WCD9378_RX_OCP_COUNT (WCD9378_A_BASE+0xb7)
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#define WCD9378_RX_BIAS_EAR_DAC (WCD9378_A_BASE+0xb8)
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#define WCD9378_RX_BIAS_EAR_AMP (WCD9378_A_BASE+0xb9)
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#define WCD9378_RX_BIAS_HPH_LDO (WCD9378_A_BASE+0xba)
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#define WCD9378_RX_BIAS_HPH_PA (WCD9378_A_BASE+0xbb)
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#define WCD9378_RX_BIAS_HPH_RDACBUFF_CNP2 (WCD9378_A_BASE+0xbc)
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#define WCD9378_RX_BIAS_HPH_RDAC_LDO (WCD9378_A_BASE+0xbd)
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#define WCD9378_RX_BIAS_HPH_CNP1 (WCD9378_A_BASE+0xbe)
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#define WCD9378_RX_BIAS_HPH_LOWPOWER (WCD9378_A_BASE+0xbf)
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#define WCD9378_RX_BIAS_AUX_DAC (WCD9378_A_BASE+0xc0)
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#define WCD9378_RX_BIAS_AUX_AMP (WCD9378_A_BASE+0xc1)
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#define WCD9378_RX_SPARE_1 (WCD9378_A_BASE+0xc2)
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#define WCD9378_RX_SPARE_2 (WCD9378_A_BASE+0xc3)
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#define WCD9378_RX_SPARE_3 (WCD9378_A_BASE+0xc4)
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#define WCD9378_RX_SPARE_4 (WCD9378_A_BASE+0xc5)
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#define WCD9378_RX_SPARE_5 (WCD9378_A_BASE+0xc6)
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#define WCD9378_RX_SPARE_6 (WCD9378_A_BASE+0xc7)
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#define WCD9378_RX_SPARE_7 (WCD9378_A_BASE+0xc8)
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#define WCD9378_HPH_L_STATUS (WCD9378_A_BASE+0xc9)
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#define WCD9378_HPH_R_STATUS (WCD9378_A_BASE+0xca)
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#define WCD9378_HPH_CNP_EN (WCD9378_A_BASE+0xcb)
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#define WCD9378_HPH_CNP_WG_CTL (WCD9378_A_BASE+0xcc)
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#define WCD9378_HPH_CNP_WG_TIME (WCD9378_A_BASE+0xcd)
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#define WCD9378_HPH_OCP_CTL (WCD9378_A_BASE+0xce)
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#define WCD9378_HPH_AUTO_CHOP (WCD9378_A_BASE+0xcf)
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#define WCD9378_HPH_CHOP_CTL (WCD9378_A_BASE+0xd0)
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#define WCD9378_HPH_PA_CTL1 (WCD9378_A_BASE+0xd1)
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#define WCD9378_HPH_PA_CTL2 (WCD9378_A_BASE+0xd2)
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#define WCD9378_HPH_L_EN (WCD9378_A_BASE+0xd3)
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#define WCD9378_HPH_L_TEST (WCD9378_A_BASE+0xd4)
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#define WCD9378_HPH_L_ATEST (WCD9378_A_BASE+0xd5)
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#define WCD9378_HPH_R_EN (WCD9378_A_BASE+0xd6)
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#define WCD9378_HPH_R_TEST (WCD9378_A_BASE+0xd7)
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#define WCD9378_HPH_R_ATEST (WCD9378_A_BASE+0xd8)
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#define WCD9378_HPH_RDAC_CLK_CTL1 (WCD9378_A_BASE+0xd9)
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#define WCD9378_HPH_RDAC_CLK_CTL2 (WCD9378_A_BASE+0xda)
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#define WCD9378_HPH_RDAC_LDO_CTL (WCD9378_A_BASE+0xdb)
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#define WCD9378_HPH_RDAC_CHOP_CLK_LP_CTL (WCD9378_A_BASE+0xdc)
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#define WCD9378_HPH_REFBUFF_UHQA_CTL (WCD9378_A_BASE+0xdd)
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#define WCD9378_HPH_REFBUFF_LP_CTL (WCD9378_A_BASE+0xde)
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#define WCD9378_HPH_L_DAC_CTL (WCD9378_A_BASE+0xdf)
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#define WCD9378_HPH_R_DAC_CTL (WCD9378_A_BASE+0xe0)
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#define WCD9378_HPH_SURGE_HPHLR_SURGE_COMP_SEL (WCD9378_A_BASE+0xe1)
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#define WCD9378_HPH_SURGE_HPHLR_SURGE_EN (WCD9378_A_BASE+0xe2)
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#define WCD9378_HPH_SURGE_HPHLR_SURGE_MISC1 (WCD9378_A_BASE+0xe3)
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#define WCD9378_HPH_SURGE_HPHLR_SURGE_STATUS (WCD9378_A_BASE+0xe4)
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#define WCD9378_EAR_EAR_EN_REG (WCD9378_A_BASE+0xe9)
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#define WCD9378_EAR_EAR_PA_CON (WCD9378_A_BASE+0xea)
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#define WCD9378_EAR_EAR_SP_CON (WCD9378_A_BASE+0xeb)
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#define WCD9378_EAR_EAR_DAC_CON (WCD9378_A_BASE+0xec)
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#define WCD9378_EAR_EAR_CNP_FSM_CON (WCD9378_A_BASE+0xed)
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#define WCD9378_EAR_TEST_CTL (WCD9378_A_BASE+0xee)
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#define WCD9378_EAR_STATUS_REG_1 (WCD9378_A_BASE+0xef)
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#define WCD9378_EAR_STATUS_REG_2 (WCD9378_A_BASE+0xf0)
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#define WCD9378_ANA_NEW_PAGE (WCD9378_A_BASE+0x100)
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#define WCD9378_HPH_NEW_ANA_HPH2 (WCD9378_A_BASE+0x101)
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#define WCD9378_HPH_NEW_ANA_HPH3 (WCD9378_A_BASE+0x102)
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#define WCD9378_SLEEP_CTL (WCD9378_A_BASE+0x103)
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#define WCD9378_SLEEP_WATCHDOG_CTL (WCD9378_A_BASE+0x104)
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#define WCD9378_MBHC_NEW_ELECT_REM_CLAMP_CTL (WCD9378_A_BASE+0x11f)
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#define WCD9378_MBHC_NEW_CTL_1 (WCD9378_A_BASE+0x120)
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#define WCD9378_MBHC_NEW_CTL_2 (WCD9378_A_BASE+0x121)
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#define WCD9378_MBHC_NEW_PLUG_DETECT_CTL (WCD9378_A_BASE+0x122)
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#define WCD9378_MBHC_NEW_ZDET_ANA_CTL (WCD9378_A_BASE+0x123)
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#define WCD9378_MBHC_NEW_ZDET_RAMP_CTL (WCD9378_A_BASE+0x124)
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#define WCD9378_MBHC_NEW_FSM_STATUS (WCD9378_A_BASE+0x125)
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#define WCD9378_MBHC_NEW_ADC_RESULT (WCD9378_A_BASE+0x126)
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#define WCD9378_AUX_AUXPA (WCD9378_A_BASE+0x128)
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#define WCD9378_DIE_CRACK_DIE_CRK_DET_EN (WCD9378_A_BASE+0x12c)
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#define WCD9378_DIE_CRACK_DIE_CRK_DET_OUT (WCD9378_A_BASE+0x12d)
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#define WCD9378_TX_NEW_TX_CH12_MUX (WCD9378_A_BASE+0x12e)
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#define WCD9378_TX_NEW_TX_CH34_MUX (WCD9378_A_BASE+0x12f)
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#define WCD9378_HPH_NEW_INT_RDAC_GAIN_CTL (WCD9378_A_BASE+0x132)
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#define WCD9378_HPH_NEW_INT_RDAC_HD2_CTL_L (WCD9378_A_BASE+0x133)
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#define WCD9378_HPH_NEW_INT_RDAC_VREF_CTL (WCD9378_A_BASE+0x134)
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#define WCD9378_HPH_NEW_INT_RDAC_OVERRIDE_CTL (WCD9378_A_BASE+0x135)
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#define WCD9378_HPH_NEW_INT_RDAC_HD2_CTL_R (WCD9378_A_BASE+0x136)
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#define WCD9378_HPH_NEW_INT_PA_MISC1 (WCD9378_A_BASE+0x137)
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#define WCD9378_HPH_NEW_INT_PA_MISC2 (WCD9378_A_BASE+0x138)
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#define WCD9378_HPH_NEW_INT_PA_RDAC_MISC (WCD9378_A_BASE+0x139)
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#define WCD9378_HPH_NEW_INT_HPH_TIMER1 (WCD9378_A_BASE+0x13a)
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#define WCD9378_HPH_NEW_INT_HPH_TIMER2 (WCD9378_A_BASE+0x13b)
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#define WCD9378_HPH_NEW_INT_HPH_TIMER3 (WCD9378_A_BASE+0x13c)
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#define WCD9378_HPH_NEW_INT_HPH_TIMER4 (WCD9378_A_BASE+0x13d)
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#define WCD9378_HPH_NEW_INT_PA_RDAC_MISC2 (WCD9378_A_BASE+0x13e)
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#define WCD9378_HPH_NEW_INT_PA_RDAC_MISC3 (WCD9378_A_BASE+0x13f)
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#define WCD9378_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI (WCD9378_A_BASE+0x145)
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#define WCD9378_RX_NEW_INT_HPH_RDAC_BIAS_ULP (WCD9378_A_BASE+0x146)
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#define WCD9378_RX_NEW_INT_HPH_RDAC_LDO_LP (WCD9378_A_BASE+0x147)
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#define WCD9378_CP_CLASSG_CP_CTRL_0 (WCD9378_A_BASE+0x150)
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#define WCD9378_CP_CLASSG_CP_CTRL_1 (WCD9378_A_BASE+0x151)
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#define WCD9378_CP_CLASSG_CP_CTRL_2 (WCD9378_A_BASE+0x152)
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#define WCD9378_CP_CLASSG_CP_CTRL_3 (WCD9378_A_BASE+0x153)
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#define WCD9378_CP_CLASSG_CP_CTRL_4 (WCD9378_A_BASE+0x154)
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#define WCD9378_CP_CLASSG_CP_CTRL_5 (WCD9378_A_BASE+0x155)
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#define WCD9378_CP_CLASSG_CP_CTRL_6 (WCD9378_A_BASE+0x156)
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#define WCD9378_CP_CLASSG_CP_CTRL_7 (WCD9378_A_BASE+0x157)
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#define WCD9378_CP_VNEGDAC_CTRL_0 (WCD9378_A_BASE+0x158)
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#define WCD9378_CP_VNEGDAC_CTRL_1 (WCD9378_A_BASE+0x159)
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#define WCD9378_CP_VNEGDAC_CTRL_2 (WCD9378_A_BASE+0x15a)
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#define WCD9378_CP_VNEGDAC_CTRL_3 (WCD9378_A_BASE+0x15b)
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#define WCD9378_CP_CP_DTOP_CTRL_0 (WCD9378_A_BASE+0x15c)
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#define WCD9378_CP_CP_DTOP_CTRL_1 (WCD9378_A_BASE+0x15d)
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#define WCD9378_CP_CP_DTOP_CTRL_2 (WCD9378_A_BASE+0x15e)
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#define WCD9378_CP_CP_DTOP_CTRL_3 (WCD9378_A_BASE+0x15f)
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#define WCD9378_CP_CP_DTOP_CTRL_4 (WCD9378_A_BASE+0x160)
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#define WCD9378_CP_CP_DTOP_CTRL_5 (WCD9378_A_BASE+0x161)
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#define WCD9378_CP_CP_DTOP_CTRL_6 (WCD9378_A_BASE+0x162)
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#define WCD9378_CP_CP_DTOP_CTRL_7 (WCD9378_A_BASE+0x163)
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#define WCD9378_CP_CP_DTOP_CTRL_8 (WCD9378_A_BASE+0x164)
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#define WCD9378_CP_CP_DTOP_CTRL_9 (WCD9378_A_BASE+0x165)
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#define WCD9378_CP_CP_DTOP_CTRL_10 (WCD9378_A_BASE+0x166)
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#define WCD9378_CP_CP_DTOP_CTRL_11 (WCD9378_A_BASE+0x167)
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#define WCD9378_CP_CP_DTOP_CTRL_12 (WCD9378_A_BASE+0x168)
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#define WCD9378_CP_CP_DTOP_CTRL_13 (WCD9378_A_BASE+0x169)
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#define WCD9378_CP_CP_DTOP_CTRL_14 (WCD9378_A_BASE+0x16a)
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#define WCD9378_CP_CP_DTOP_CTRL_15 (WCD9378_A_BASE+0x16b)
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#define WCD9378_CP_CP_DTOP_CTRL_16 (WCD9378_A_BASE+0x16c)
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#define WCD9378_CP_CP_DTOP_CTRL_17 (WCD9378_A_BASE+0x16d)
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#define WCD9378_CP_CP_DTOP_CTRL_18 (WCD9378_A_BASE+0x16e)
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#define WCD9378_CP_CP_DTOP_CTRL_19 (WCD9378_A_BASE+0x16f)
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#define WCD9378_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL (WCD9378_A_BASE+0x1af)
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#define WCD9378_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL (WCD9378_A_BASE+0x1b0)
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#define WCD9378_MBHC_NEW_INT_MECH_DET_CURRENT (WCD9378_A_BASE+0x1b1)
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#define WCD9378_MBHC_NEW_INT_SPARE_2 (WCD9378_A_BASE+0x1b2)
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#define WCD9378_EAR_INT_NEW_EAR_CHOPPER_CON (WCD9378_A_BASE+0x1b7)
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#define WCD9378_EAR_INT_NEW_CNP_VCM_CON1 (WCD9378_A_BASE+0x1b8)
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#define WCD9378_EAR_INT_NEW_CNP_VCM_CON2 (WCD9378_A_BASE+0x1b9)
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#define WCD9378_EAR_INT_NEW_EAR_DYNAMIC_BIAS (WCD9378_A_BASE+0x1ba)
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#define WCD9378_AUX_INT_EN_REG (WCD9378_A_BASE+0x1bd)
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#define WCD9378_AUX_INT_PA_CTRL (WCD9378_A_BASE+0x1be)
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#define WCD9378_AUX_INT_SP_CTRL (WCD9378_A_BASE+0x1bf)
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#define WCD9378_AUX_INT_DAC_CTRL (WCD9378_A_BASE+0x1c0)
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#define WCD9378_AUX_INT_CLK_CTRL (WCD9378_A_BASE+0x1c1)
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#define WCD9378_AUX_INT_TEST_CTRL (WCD9378_A_BASE+0x1c2)
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#define WCD9378_AUX_INT_STATUS_REG (WCD9378_A_BASE+0x1c3)
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#define WCD9378_AUX_INT_MISC (WCD9378_A_BASE+0x1c4)
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#define WCD9378_SLEEP_INT_WATCHDOG_CTL_1 (WCD9378_A_BASE+0x1d0)
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#define WCD9378_SLEEP_INT_WATCHDOG_CTL_2 (WCD9378_A_BASE+0x1d1)
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#define WCD9378_DIE_CRACK_INT_DIE_CRK_DET_INT1 (WCD9378_A_BASE+0x1d3)
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#define WCD9378_DIE_CRACK_INT_DIE_CRK_DET_INT2 (WCD9378_A_BASE+0x1d4)
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#define WCD9378_TX_COM_NEW_INT_TXFE_DIVSTOP_L2 (WCD9378_A_BASE+0x1d5)
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#define WCD9378_TX_COM_NEW_INT_TXFE_DIVSTOP_L1 (WCD9378_A_BASE+0x1d6)
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#define WCD9378_TX_COM_NEW_INT_TXFE_DIVSTOP_L0 (WCD9378_A_BASE+0x1d7)
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#define WCD9378_TX_COM_NEW_INT_SPARE1 (WCD9378_A_BASE+0x1d8)
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#define WCD9378_TX_COM_NEW_INT_SPARE2 (WCD9378_A_BASE+0x1d9)
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#define WCD9378_TX_COM_NEW_INT_TXFE_NINIT_L2 (WCD9378_A_BASE+0x1da)
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#define WCD9378_TX_COM_NEW_INT_TXFE_NINIT_L1 (WCD9378_A_BASE+0x1db)
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#define WCD9378_TX_COM_NEW_INT_TXFE_NINIT_L0 (WCD9378_A_BASE+0x1dc)
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#define WCD9378_TX_COM_NEW_INT_SPARE3 (WCD9378_A_BASE+0x1dd)
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#define WCD9378_TX_COM_NEW_INT_SPARE4 (WCD9378_A_BASE+0x1de)
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#define WCD9378_TX_COM_NEW_INT_SPARE5 (WCD9378_A_BASE+0x1df)
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#define WCD9378_TX_COM_NEW_INT_SPARE6 (WCD9378_A_BASE+0x1e0)
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#define WCD9378_TX_COM_NEW_INT_SPARE7 (WCD9378_A_BASE+0x1e1)
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#define WCD9378_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1 (WCD9378_A_BASE+0x1e2)
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#define WCD9378_TX_COM_NEW_INT_TXADC_SCBIAS_L0 (WCD9378_A_BASE+0x1e3)
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#define WCD9378_TX_COM_NEW_INT_TXADC_INT_L2 (WCD9378_A_BASE+0x1e4)
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#define WCD9378_TX_COM_NEW_INT_TXADC_INT_L1 (WCD9378_A_BASE+0x1e5)
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#define WCD9378_TX_COM_NEW_INT_TXADC_INT_L0 (WCD9378_A_BASE+0x1e6)
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#define WCD9378_TX_COM_NEW_INT_SPARE8 (WCD9378_A_BASE+0x1e7)
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#define WCD9378_TAMBORA_BASE (WCD9378_BASE+0x180401)
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#define WCD9378_TAMBORA_PAGE (WCD9378_TAMBORA_BASE+0x00)
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#define WCD9378_CHIP_ID0 (WCD9378_TAMBORA_BASE+0x01)
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#define WCD9378_CHIP_ID1 (WCD9378_TAMBORA_BASE+0x02)
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#define WCD9378_CHIP_ID2 (WCD9378_TAMBORA_BASE+0x03)
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#define WCD9378_CHIP_ID3 (WCD9378_TAMBORA_BASE+0x04)
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#define WCD9378_SWR_TX_CLK_RATE (WCD9378_TAMBORA_BASE+0x05)
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#define WCD9378_CDC_RST_CTL (WCD9378_TAMBORA_BASE+0x06)
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#define WCD9378_TOP_CLK_CFG (WCD9378_TAMBORA_BASE+0x07)
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#define WCD9378_CDC_ANA_CLK_CTL (WCD9378_TAMBORA_BASE+0x08)
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#define WCD9378_CDC_DIG_CLK_CTL (WCD9378_TAMBORA_BASE+0x09)
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#define WCD9378_SWR_RST_EN (WCD9378_TAMBORA_BASE+0x0a)
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#define WCD9378_CDC_PATH_MODE (WCD9378_TAMBORA_BASE+0x0b)
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#define WCD9378_CDC_RX_RST (WCD9378_TAMBORA_BASE+0x0c)
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#define WCD9378_CDC_RX0_CTL (WCD9378_TAMBORA_BASE+0x0d)
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#define WCD9378_CDC_RX1_CTL (WCD9378_TAMBORA_BASE+0x0e)
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#define WCD9378_CDC_RX2_CTL (WCD9378_TAMBORA_BASE+0x0f)
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#define WCD9378_CDC_TX_ANA_MODE_0_1 (WCD9378_TAMBORA_BASE+0x10)
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#define WCD9378_CDC_TX_ANA_MODE_2_3 (WCD9378_TAMBORA_BASE+0x11)
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#define WCD9378_CDC_COMP_CTL_0 (WCD9378_TAMBORA_BASE+0x14)
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#define WCD9378_CDC_ANA_TX_CLK_CTL (WCD9378_TAMBORA_BASE+0x17)
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#define WCD9378_CDC_HPH_DSM_A1_0 (WCD9378_TAMBORA_BASE+0x18)
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#define WCD9378_CDC_HPH_DSM_A1_1 (WCD9378_TAMBORA_BASE+0x19)
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#define WCD9378_CDC_HPH_DSM_A2_0 (WCD9378_TAMBORA_BASE+0x1a)
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#define WCD9378_CDC_HPH_DSM_A2_1 (WCD9378_TAMBORA_BASE+0x1b)
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#define WCD9378_CDC_HPH_DSM_A3_0 (WCD9378_TAMBORA_BASE+0x1c)
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#define WCD9378_CDC_HPH_DSM_A3_1 (WCD9378_TAMBORA_BASE+0x1d)
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#define WCD9378_CDC_HPH_DSM_A4_0 (WCD9378_TAMBORA_BASE+0x1e)
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#define WCD9378_CDC_HPH_DSM_A4_1 (WCD9378_TAMBORA_BASE+0x1f)
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#define WCD9378_CDC_HPH_DSM_A5_0 (WCD9378_TAMBORA_BASE+0x20)
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#define WCD9378_CDC_HPH_DSM_A5_1 (WCD9378_TAMBORA_BASE+0x21)
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#define WCD9378_CDC_HPH_DSM_A6_0 (WCD9378_TAMBORA_BASE+0x22)
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#define WCD9378_CDC_HPH_DSM_A7_0 (WCD9378_TAMBORA_BASE+0x23)
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#define WCD9378_CDC_HPH_DSM_C_0 (WCD9378_TAMBORA_BASE+0x24)
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#define WCD9378_CDC_HPH_DSM_C_1 (WCD9378_TAMBORA_BASE+0x25)
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#define WCD9378_CDC_HPH_DSM_C_2 (WCD9378_TAMBORA_BASE+0x26)
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#define WCD9378_CDC_HPH_DSM_C_3 (WCD9378_TAMBORA_BASE+0x27)
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#define WCD9378_CDC_HPH_DSM_R1 (WCD9378_TAMBORA_BASE+0x28)
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#define WCD9378_CDC_HPH_DSM_R2 (WCD9378_TAMBORA_BASE+0x29)
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#define WCD9378_CDC_HPH_DSM_R3 (WCD9378_TAMBORA_BASE+0x2a)
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#define WCD9378_CDC_HPH_DSM_R4 (WCD9378_TAMBORA_BASE+0x2b)
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#define WCD9378_CDC_HPH_DSM_R5 (WCD9378_TAMBORA_BASE+0x2c)
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#define WCD9378_CDC_HPH_DSM_R6 (WCD9378_TAMBORA_BASE+0x2d)
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#define WCD9378_CDC_HPH_DSM_R7 (WCD9378_TAMBORA_BASE+0x2e)
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#define WCD9378_CDC_AUX_DSM_A1_0 (WCD9378_TAMBORA_BASE+0x2f)
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#define WCD9378_CDC_AUX_DSM_A1_1 (WCD9378_TAMBORA_BASE+0x30)
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#define WCD9378_CDC_AUX_DSM_A2_0 (WCD9378_TAMBORA_BASE+0x31)
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#define WCD9378_CDC_AUX_DSM_A2_1 (WCD9378_TAMBORA_BASE+0x32)
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#define WCD9378_CDC_AUX_DSM_A3_0 (WCD9378_TAMBORA_BASE+0x33)
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#define WCD9378_CDC_AUX_DSM_A3_1 (WCD9378_TAMBORA_BASE+0x34)
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#define WCD9378_CDC_AUX_DSM_A4_0 (WCD9378_TAMBORA_BASE+0x35)
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#define WCD9378_CDC_AUX_DSM_A4_1 (WCD9378_TAMBORA_BASE+0x36)
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#define WCD9378_CDC_AUX_DSM_A5_0 (WCD9378_TAMBORA_BASE+0x37)
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#define WCD9378_CDC_AUX_DSM_A5_1 (WCD9378_TAMBORA_BASE+0x38)
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#define WCD9378_CDC_AUX_DSM_A6_0 (WCD9378_TAMBORA_BASE+0x39)
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#define WCD9378_CDC_AUX_DSM_A7_0 (WCD9378_TAMBORA_BASE+0x3a)
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#define WCD9378_CDC_AUX_DSM_C_0 (WCD9378_TAMBORA_BASE+0x3b)
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#define WCD9378_CDC_AUX_DSM_C_1 (WCD9378_TAMBORA_BASE+0x3c)
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#define WCD9378_CDC_AUX_DSM_C_2 (WCD9378_TAMBORA_BASE+0x3d)
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#define WCD9378_CDC_AUX_DSM_C_3 (WCD9378_TAMBORA_BASE+0x3e)
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#define WCD9378_CDC_AUX_DSM_R1 (WCD9378_TAMBORA_BASE+0x3f)
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#define WCD9378_CDC_AUX_DSM_R2 (WCD9378_TAMBORA_BASE+0x40)
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#define WCD9378_CDC_AUX_DSM_R3 (WCD9378_TAMBORA_BASE+0x41)
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#define WCD9378_CDC_AUX_DSM_R4 (WCD9378_TAMBORA_BASE+0x42)
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#define WCD9378_CDC_AUX_DSM_R5 (WCD9378_TAMBORA_BASE+0x43)
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#define WCD9378_CDC_AUX_DSM_R6 (WCD9378_TAMBORA_BASE+0x44)
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#define WCD9378_CDC_AUX_DSM_R7 (WCD9378_TAMBORA_BASE+0x45)
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#define WCD9378_CDC_HPH_GAIN_RX_0 (WCD9378_TAMBORA_BASE+0x46)
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#define WCD9378_CDC_HPH_GAIN_RX_1 (WCD9378_TAMBORA_BASE+0x47)
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#define WCD9378_CDC_HPH_GAIN_DSD_0 (WCD9378_TAMBORA_BASE+0x48)
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#define WCD9378_CDC_HPH_GAIN_DSD_1 (WCD9378_TAMBORA_BASE+0x49)
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#define WCD9378_CDC_HPH_GAIN_DSD_2 (WCD9378_TAMBORA_BASE+0x4a)
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#define WCD9378_CDC_AUX_GAIN_DSD_0 (WCD9378_TAMBORA_BASE+0x4b)
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#define WCD9378_CDC_AUX_GAIN_DSD_1 (WCD9378_TAMBORA_BASE+0x4c)
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#define WCD9378_CDC_AUX_GAIN_DSD_2 (WCD9378_TAMBORA_BASE+0x4d)
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#define WCD9378_CDC_HPH_GAIN_CTL (WCD9378_TAMBORA_BASE+0x4e)
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#define WCD9378_CDC_AUX_GAIN_CTL (WCD9378_TAMBORA_BASE+0x4f)
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#define WCD9378_CDC_PATH_CTL (WCD9378_TAMBORA_BASE+0x50)
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#define WCD9378_CDC_SWR_CLG (WCD9378_TAMBORA_BASE+0x51)
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#define WCD9378_SWR_CLG_BYP (WCD9378_TAMBORA_BASE+0x52)
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#define WCD9378_CDC_TX0_CTL (WCD9378_TAMBORA_BASE+0x53)
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#define WCD9378_CDC_TX1_CTL (WCD9378_TAMBORA_BASE+0x54)
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#define WCD9378_CDC_TX2_CTL (WCD9378_TAMBORA_BASE+0x55)
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#define WCD9378_CDC_TX_RST (WCD9378_TAMBORA_BASE+0x56)
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#define WCD9378_CDC_REQ_CTL (WCD9378_TAMBORA_BASE+0x57)
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#define WCD9378_CDC_RST (WCD9378_TAMBORA_BASE+0x58)
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#define WCD9378_CDC_AMIC_CTL (WCD9378_TAMBORA_BASE+0x5a)
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#define WCD9378_CDC_DMIC_CTL (WCD9378_TAMBORA_BASE+0x5b)
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#define WCD9378_CDC_DMIC1_CTL (WCD9378_TAMBORA_BASE+0x5c)
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#define WCD9378_CDC_DMIC2_CTL (WCD9378_TAMBORA_BASE+0x5d)
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#define WCD9378_CDC_DMIC3_CTL (WCD9378_TAMBORA_BASE+0x5e)
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#define WCD9378_EFUSE_PRG_CTL (WCD9378_TAMBORA_BASE+0x60)
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#define WCD9378_EFUSE_CTL (WCD9378_TAMBORA_BASE+0x61)
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#define WCD9378_CDC_DMIC_RATE_1_2 (WCD9378_TAMBORA_BASE+0x62)
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#define WCD9378_CDC_DMIC_RATE_3_4 (WCD9378_TAMBORA_BASE+0x63)
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#define WCD9378_PDM_WD_EN_OVRD (WCD9378_TAMBORA_BASE+0x64)
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#define WCD9378_PDM_WD_CTL0 (WCD9378_TAMBORA_BASE+0x65)
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#define WCD9378_PDM_WD_CTL1 (WCD9378_TAMBORA_BASE+0x66)
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#define WCD9378_PDM_WD_CTL2 (WCD9378_TAMBORA_BASE+0x67)
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#define WCD9378_RAMP_CTL (WCD9378_TAMBORA_BASE+0x68)
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#define WCD9378_ACT_DET_CTL (WCD9378_TAMBORA_BASE+0x69)
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#define WCD9378_ACT_DET_HOOKUP0 (WCD9378_TAMBORA_BASE+0x6a)
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#define WCD9378_ACT_DET_HOOKUP1 (WCD9378_TAMBORA_BASE+0x6b)
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#define WCD9378_ACT_DET_HOOKUP2 (WCD9378_TAMBORA_BASE+0x6c)
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#define WCD9378_ACT_DET_DLY_BUF_EN (WCD9378_TAMBORA_BASE+0x6d)
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#define WCD9378_INTR_MODE (WCD9378_TAMBORA_BASE+0x6e)
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#define WCD9378_INTR_STATUS_0 (WCD9378_TAMBORA_BASE+0x6f)
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#define WCD9378_INTR_STATUS_1 (WCD9378_TAMBORA_BASE+0x70)
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#define WCD9378_INTR_STATUS_2 (WCD9378_TAMBORA_BASE+0x71)
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#define WCD9378_INTR_STATUS_3 (WCD9378_TAMBORA_BASE+0x72)
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#define WCD9378_INTR_MASK_0 (WCD9378_TAMBORA_BASE+0x73)
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#define WCD9378_INTR_MASK_1 (WCD9378_TAMBORA_BASE+0x74)
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#define WCD9378_INTR_MASK_2 (WCD9378_TAMBORA_BASE+0x75)
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#define WCD9378_INTR_MASK_3 (WCD9378_TAMBORA_BASE+0x76)
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#define WCD9378_INTR_SET_0 (WCD9378_TAMBORA_BASE+0x77)
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#define WCD9378_INTR_SET_1 (WCD9378_TAMBORA_BASE+0x78)
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#define WCD9378_INTR_SET_2 (WCD9378_TAMBORA_BASE+0x79)
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#define WCD9378_INTR_SET_3 (WCD9378_TAMBORA_BASE+0x7a)
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#define WCD9378_INTR_TEST_0 (WCD9378_TAMBORA_BASE+0x7b)
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#define WCD9378_INTR_TEST_1 (WCD9378_TAMBORA_BASE+0x7c)
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#define WCD9378_INTR_TEST_2 (WCD9378_TAMBORA_BASE+0x7d)
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#define WCD9378_INTR_TEST_3 (WCD9378_TAMBORA_BASE+0x7e)
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#define WCD9378_TX_MODE_DBG_EN (WCD9378_TAMBORA_BASE+0x7f)
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#define WCD9378_TX_MODE_DBG_0_1 (WCD9378_TAMBORA_BASE+0x80)
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#define WCD9378_TX_MODE_DBG_2_3 (WCD9378_TAMBORA_BASE+0x81)
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#define WCD9378_LB_IN_SEL_CTL (WCD9378_TAMBORA_BASE+0x82)
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#define WCD9378_LOOP_BACK_MODE (WCD9378_TAMBORA_BASE+0x83)
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#define WCD9378_SWR_DAC_TEST (WCD9378_TAMBORA_BASE+0x84)
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#define WCD9378_SWR_HM_TEST_RX_0 (WCD9378_TAMBORA_BASE+0x85)
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#define WCD9378_SWR_HM_TEST_TX_0 (WCD9378_TAMBORA_BASE+0x86)
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#define WCD9378_SWR_HM_TEST_RX_1 (WCD9378_TAMBORA_BASE+0x87)
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#define WCD9378_SWR_HM_TEST_TX_1 (WCD9378_TAMBORA_BASE+0x88)
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#define WCD9378_SWR_HM_TEST_0 (WCD9378_TAMBORA_BASE+0x8a)
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#define WCD9378_PAD_CTL_SWR_0 (WCD9378_TAMBORA_BASE+0x8c)
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#define WCD9378_PAD_CTL_SWR_1 (WCD9378_TAMBORA_BASE+0x8d)
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#define WCD9378_I2C_CTL (WCD9378_TAMBORA_BASE+0x8e)
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#define WCD9378_LEGACY_SW_MODE (WCD9378_TAMBORA_BASE+0x8f)
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#define WCD9378_EFUSE_TEST_CTL_0 (WCD9378_TAMBORA_BASE+0x90)
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#define WCD9378_EFUSE_TEST_CTL_1 (WCD9378_TAMBORA_BASE+0x91)
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#define WCD9378_EFUSE_T_DATA_0 (WCD9378_TAMBORA_BASE+0x92)
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#define WCD9378_PAD_CTL_PDM_RX0 (WCD9378_TAMBORA_BASE+0x94)
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#define WCD9378_PAD_CTL_PDM_RX1 (WCD9378_TAMBORA_BASE+0x95)
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#define WCD9378_PAD_CTL_PDM_TX0 (WCD9378_TAMBORA_BASE+0x96)
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#define WCD9378_PAD_CTL_PDM_TX1 (WCD9378_TAMBORA_BASE+0x97)
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#define WCD9378_PAD_INP_DIS_0 (WCD9378_TAMBORA_BASE+0x99)
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#define WCD9378_DRIVE_STRENGTH_0 (WCD9378_TAMBORA_BASE+0x9b)
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#define WCD9378_DRIVE_STRENGTH_1 (WCD9378_TAMBORA_BASE+0x9c)
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#define WCD9378_RX_DATA_EDGE_CTL (WCD9378_TAMBORA_BASE+0x9e)
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#define WCD9378_TX_DATA_EDGE_CTL (WCD9378_TAMBORA_BASE+0x9f)
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#define WCD9378_GPIO_MODE (WCD9378_TAMBORA_BASE+0xa0)
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#define WCD9378_PIN_CTL_OE (WCD9378_TAMBORA_BASE+0xa1)
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#define WCD9378_PIN_CTL_DATA_0 (WCD9378_TAMBORA_BASE+0xa2)
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#define WCD9378_PIN_STATUS_0 (WCD9378_TAMBORA_BASE+0xa4)
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#define WCD9378_DIG_DEBUG_CTL (WCD9378_TAMBORA_BASE+0xa6)
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#define WCD9378_DIG_DEBUG_EN (WCD9378_TAMBORA_BASE+0xa7)
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#define WCD9378_ANA_CSR_DBG_ADD (WCD9378_TAMBORA_BASE+0xa8)
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#define WCD9378_ANA_CSR_DBG_CTL (WCD9378_TAMBORA_BASE+0xa9)
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#define WCD9378_SSP_DBG (WCD9378_TAMBORA_BASE+0xaa)
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#define WCD9378_MODE_STATUS_0 (WCD9378_TAMBORA_BASE+0xab)
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#define WCD9378_MODE_STATUS_1 (WCD9378_TAMBORA_BASE+0xac)
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#define WCD9378_SPARE_0 (WCD9378_TAMBORA_BASE+0xad)
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#define WCD9378_SPARE_1 (WCD9378_TAMBORA_BASE+0xae)
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#define WCD9378_SPARE_2 (WCD9378_TAMBORA_BASE+0xaf)
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#define WCD9378_EFUSE_REG_0 (WCD9378_TAMBORA_BASE+0xb0)
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#define WCD9378_EFUSE_REG_1 (WCD9378_TAMBORA_BASE+0xb1)
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#define WCD9378_EFUSE_REG_2 (WCD9378_TAMBORA_BASE+0xb2)
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#define WCD9378_EFUSE_REG_3 (WCD9378_TAMBORA_BASE+0xb3)
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#define WCD9378_EFUSE_REG_4 (WCD9378_TAMBORA_BASE+0xb4)
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#define WCD9378_EFUSE_REG_5 (WCD9378_TAMBORA_BASE+0xb5)
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#define WCD9378_EFUSE_REG_6 (WCD9378_TAMBORA_BASE+0xb6)
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#define WCD9378_EFUSE_REG_7 (WCD9378_TAMBORA_BASE+0xb7)
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#define WCD9378_EFUSE_REG_8 (WCD9378_TAMBORA_BASE+0xb8)
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#define WCD9378_EFUSE_REG_9 (WCD9378_TAMBORA_BASE+0xb9)
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#define WCD9378_EFUSE_REG_10 (WCD9378_TAMBORA_BASE+0xba)
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#define WCD9378_EFUSE_REG_11 (WCD9378_TAMBORA_BASE+0xbb)
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#define WCD9378_EFUSE_REG_12 (WCD9378_TAMBORA_BASE+0xbc)
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#define WCD9378_EFUSE_REG_13 (WCD9378_TAMBORA_BASE+0xbd)
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#define WCD9378_EFUSE_REG_14 (WCD9378_TAMBORA_BASE+0xbe)
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#define WCD9378_EFUSE_REG_15 (WCD9378_TAMBORA_BASE+0xbf)
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#define WCD9378_EFUSE_REG_16 (WCD9378_TAMBORA_BASE+0xc0)
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#define WCD9378_EFUSE_REG_17 (WCD9378_TAMBORA_BASE+0xc1)
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#define WCD9378_EFUSE_REG_18 (WCD9378_TAMBORA_BASE+0xc2)
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#define WCD9378_EFUSE_REG_19 (WCD9378_TAMBORA_BASE+0xc3)
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#define WCD9378_EFUSE_REG_20 (WCD9378_TAMBORA_BASE+0xc4)
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#define WCD9378_EFUSE_REG_21 (WCD9378_TAMBORA_BASE+0xc5)
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#define WCD9378_EFUSE_REG_22 (WCD9378_TAMBORA_BASE+0xc6)
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#define WCD9378_EFUSE_REG_23 (WCD9378_TAMBORA_BASE+0xc7)
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#define WCD9378_EFUSE_REG_24 (WCD9378_TAMBORA_BASE+0xc8)
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#define WCD9378_EFUSE_REG_25 (WCD9378_TAMBORA_BASE+0xc9)
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#define WCD9378_EFUSE_REG_26 (WCD9378_TAMBORA_BASE+0xca)
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#define WCD9378_EFUSE_REG_27 (WCD9378_TAMBORA_BASE+0xcb)
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#define WCD9378_EFUSE_REG_28 (WCD9378_TAMBORA_BASE+0xcc)
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#define WCD9378_EFUSE_REG_29 (WCD9378_TAMBORA_BASE+0xcd)
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#define WCD9378_EFUSE_REG_30 (WCD9378_TAMBORA_BASE+0xce)
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#define WCD9378_EFUSE_REG_31 (WCD9378_TAMBORA_BASE+0xcf)
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#define WCD9378_TX_REQ_FB_CTL_2 (WCD9378_TAMBORA_BASE+0xd2)
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#define WCD9378_TX_REQ_FB_CTL_3 (WCD9378_TAMBORA_BASE+0xd3)
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#define WCD9378_TX_REQ_FB_CTL_4 (WCD9378_TAMBORA_BASE+0xd4)
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#define WCD9378_DEM_BYPASS_DATA0 (WCD9378_TAMBORA_BASE+0xd5)
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#define WCD9378_DEM_BYPASS_DATA1 (WCD9378_TAMBORA_BASE+0xd6)
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#define WCD9378_DEM_BYPASS_DATA2 (WCD9378_TAMBORA_BASE+0xd7)
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#define WCD9378_DEM_BYPASS_DATA3 (WCD9378_TAMBORA_BASE+0xd8)
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#define WCD9378_RX0_PCM_RAMP_STEP (WCD9378_TAMBORA_BASE+0xd9)
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#define WCD9378_RX0_DSD_RAMP_STEP (WCD9378_TAMBORA_BASE+0xda)
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#define WCD9378_RX1_PCM_RAMP_STEP (WCD9378_TAMBORA_BASE+0xdb)
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#define WCD9378_RX1_DSD_RAMP_STEP (WCD9378_TAMBORA_BASE+0xdc)
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#define WCD9378_RX2_RAMP_STEP (WCD9378_TAMBORA_BASE+0xdd)
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#define WCD9378_PLATFORM_CTL (WCD9378_TAMBORA_BASE+0xf0)
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#define WCD9378_CLK_DIV_CFG (WCD9378_TAMBORA_BASE+0xf1)
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#define WCD9378_DRE_DLY_VAL (WCD9378_TAMBORA_BASE+0xf2)
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#define WCD9378_SEQR_BASE (WCD9378_BASE+0x180501)
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#define WCD9378_SYS_USAGE_CTRL (WCD9378_SEQR_BASE+0x01)
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#define WCD9378_SURGE_CTL (WCD9378_SEQR_BASE+0x02)
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#define WCD9378_SEQ_CTL (WCD9378_SEQR_BASE+0x03)
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#define WCD9378_HPH_UP_T0 (WCD9378_SEQR_BASE+0x10)
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#define WCD9378_HPH_UP_T1 (WCD9378_SEQR_BASE+0x11)
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#define WCD9378_HPH_UP_T2 (WCD9378_SEQR_BASE+0x12)
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#define WCD9378_HPH_UP_T3 (WCD9378_SEQR_BASE+0x13)
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#define WCD9378_HPH_UP_T4 (WCD9378_SEQR_BASE+0x14)
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#define WCD9378_HPH_UP_T5 (WCD9378_SEQR_BASE+0x15)
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#define WCD9378_HPH_UP_T6 (WCD9378_SEQR_BASE+0x16)
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#define WCD9378_HPH_UP_T7 (WCD9378_SEQR_BASE+0x17)
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#define WCD9378_HPH_UP_T8 (WCD9378_SEQR_BASE+0x18)
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#define WCD9378_HPH_UP_T9 (WCD9378_SEQR_BASE+0x19)
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#define WCD9378_HPH_UP_T10 (WCD9378_SEQR_BASE+0x1a)
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#define WCD9378_HPH_DN_T0 (WCD9378_SEQR_BASE+0x1b)
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#define WCD9378_HPH_DN_T1 (WCD9378_SEQR_BASE+0x1c)
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#define WCD9378_HPH_DN_T2 (WCD9378_SEQR_BASE+0x1d)
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#define WCD9378_HPH_DN_T3 (WCD9378_SEQR_BASE+0x1e)
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#define WCD9378_HPH_DN_T4 (WCD9378_SEQR_BASE+0x1f)
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#define WCD9378_HPH_DN_T5 (WCD9378_SEQR_BASE+0x20)
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#define WCD9378_HPH_DN_T6 (WCD9378_SEQR_BASE+0x21)
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#define WCD9378_HPH_DN_T7 (WCD9378_SEQR_BASE+0x22)
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#define WCD9378_HPH_DN_T8 (WCD9378_SEQR_BASE+0x23)
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#define WCD9378_HPH_DN_T9 (WCD9378_SEQR_BASE+0x24)
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#define WCD9378_HPH_DN_T10 (WCD9378_SEQR_BASE+0x25)
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#define WCD9378_HPH_UP_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x26)
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#define WCD9378_HPH_UP_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x27)
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#define WCD9378_HPH_UP_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x28)
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#define WCD9378_HPH_UP_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x29)
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#define WCD9378_HPH_UP_STAGE_LOC_4 (WCD9378_SEQR_BASE+0x2a)
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#define WCD9378_HPH_UP_STAGE_LOC_5 (WCD9378_SEQR_BASE+0x2b)
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#define WCD9378_HPH_UP_STAGE_LOC_6 (WCD9378_SEQR_BASE+0x2c)
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#define WCD9378_HPH_UP_STAGE_LOC_7 (WCD9378_SEQR_BASE+0x2d)
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#define WCD9378_HPH_UP_STAGE_LOC_8 (WCD9378_SEQR_BASE+0x2e)
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#define WCD9378_HPH_UP_STAGE_LOC_9 (WCD9378_SEQR_BASE+0x2f)
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#define WCD9378_HPH_UP_STAGE_LOC_10 (WCD9378_SEQR_BASE+0x30)
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#define WCD9378_HPH_DN_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x31)
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#define WCD9378_HPH_DN_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x32)
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#define WCD9378_HPH_DN_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x33)
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#define WCD9378_HPH_DN_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x34)
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#define WCD9378_HPH_DN_STAGE_LOC_4 (WCD9378_SEQR_BASE+0x35)
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#define WCD9378_HPH_DN_STAGE_LOC_5 (WCD9378_SEQR_BASE+0x36)
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#define WCD9378_HPH_DN_STAGE_LOC_6 (WCD9378_SEQR_BASE+0x37)
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#define WCD9378_HPH_DN_STAGE_LOC_7 (WCD9378_SEQR_BASE+0x38)
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#define WCD9378_HPH_DN_STAGE_LOC_8 (WCD9378_SEQR_BASE+0x39)
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#define WCD9378_HPH_DN_STAGE_LOC_9 (WCD9378_SEQR_BASE+0x3a)
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#define WCD9378_HPH_DN_STAGE_LOC_10 (WCD9378_SEQR_BASE+0x3b)
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#define WCD9378_SA_UP_T0 (WCD9378_SEQR_BASE+0x40)
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#define WCD9378_SA_UP_T1 (WCD9378_SEQR_BASE+0x41)
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#define WCD9378_SA_UP_T2 (WCD9378_SEQR_BASE+0x42)
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#define WCD9378_SA_UP_T3 (WCD9378_SEQR_BASE+0x43)
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#define WCD9378_SA_UP_T4 (WCD9378_SEQR_BASE+0x44)
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#define WCD9378_SA_UP_T5 (WCD9378_SEQR_BASE+0x45)
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#define WCD9378_SA_UP_T6 (WCD9378_SEQR_BASE+0x46)
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#define WCD9378_SA_UP_T7 (WCD9378_SEQR_BASE+0x47)
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#define WCD9378_SA_DN_T0 (WCD9378_SEQR_BASE+0x48)
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#define WCD9378_SA_DN_T1 (WCD9378_SEQR_BASE+0x49)
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#define WCD9378_SA_DN_T2 (WCD9378_SEQR_BASE+0x4a)
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#define WCD9378_SA_DN_T3 (WCD9378_SEQR_BASE+0x4b)
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#define WCD9378_SA_DN_T4 (WCD9378_SEQR_BASE+0x4c)
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#define WCD9378_SA_DN_T5 (WCD9378_SEQR_BASE+0x4d)
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#define WCD9378_SA_DN_T6 (WCD9378_SEQR_BASE+0x4e)
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#define WCD9378_SA_DN_T7 (WCD9378_SEQR_BASE+0x4f)
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#define WCD9378_SA_UP_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x50)
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#define WCD9378_SA_UP_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x51)
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#define WCD9378_SA_UP_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x52)
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#define WCD9378_SA_UP_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x53)
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#define WCD9378_SA_UP_STAGE_LOC_4 (WCD9378_SEQR_BASE+0x54)
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#define WCD9378_SA_UP_STAGE_LOC_5 (WCD9378_SEQR_BASE+0x55)
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#define WCD9378_SA_UP_STAGE_LOC_6 (WCD9378_SEQR_BASE+0x56)
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#define WCD9378_SA_UP_STAGE_LOC_7 (WCD9378_SEQR_BASE+0x57)
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#define WCD9378_SA_DN_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x58)
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#define WCD9378_SA_DN_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x59)
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#define WCD9378_SA_DN_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x5a)
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#define WCD9378_SA_DN_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x5b)
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#define WCD9378_SA_DN_STAGE_LOC_4 (WCD9378_SEQR_BASE+0x5c)
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#define WCD9378_SA_DN_STAGE_LOC_5 (WCD9378_SEQR_BASE+0x5d)
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#define WCD9378_SA_DN_STAGE_LOC_6 (WCD9378_SEQR_BASE+0x5e)
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#define WCD9378_SA_DN_STAGE_LOC_7 (WCD9378_SEQR_BASE+0x5f)
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#define WCD9378_TX0_UP_T0 (WCD9378_SEQR_BASE+0x60)
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#define WCD9378_TX0_UP_T1 (WCD9378_SEQR_BASE+0x61)
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#define WCD9378_TX0_UP_T2 (WCD9378_SEQR_BASE+0x62)
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#define WCD9378_TX0_UP_T3 (WCD9378_SEQR_BASE+0x63)
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#define WCD9378_TX0_DN_T0 (WCD9378_SEQR_BASE+0x64)
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#define WCD9378_TX0_DN_T1 (WCD9378_SEQR_BASE+0x65)
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#define WCD9378_TX0_DN_T2 (WCD9378_SEQR_BASE+0x66)
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#define WCD9378_TX0_DN_T3 (WCD9378_SEQR_BASE+0x67)
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#define WCD9378_TX0_UP_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x68)
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#define WCD9378_TX0_UP_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x69)
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#define WCD9378_TX0_UP_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x6a)
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#define WCD9378_TX0_UP_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x6b)
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#define WCD9378_TX0_DN_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x6c)
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#define WCD9378_TX0_DN_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x6d)
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#define WCD9378_TX0_DN_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x6e)
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#define WCD9378_TX0_DN_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x6f)
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#define WCD9378_TX1_UP_T0 (WCD9378_SEQR_BASE+0x70)
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#define WCD9378_TX1_UP_T1 (WCD9378_SEQR_BASE+0x71)
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#define WCD9378_TX1_UP_T2 (WCD9378_SEQR_BASE+0x72)
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#define WCD9378_TX1_UP_T3 (WCD9378_SEQR_BASE+0x73)
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#define WCD9378_TX1_DN_T0 (WCD9378_SEQR_BASE+0x74)
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#define WCD9378_TX1_DN_T1 (WCD9378_SEQR_BASE+0x75)
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#define WCD9378_TX1_DN_T2 (WCD9378_SEQR_BASE+0x76)
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#define WCD9378_TX1_DN_T3 (WCD9378_SEQR_BASE+0x77)
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#define WCD9378_TX1_UP_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x78)
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#define WCD9378_TX1_UP_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x79)
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#define WCD9378_TX1_UP_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x7a)
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#define WCD9378_TX1_UP_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x7b)
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#define WCD9378_TX1_DN_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x7c)
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#define WCD9378_TX1_DN_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x7d)
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#define WCD9378_TX1_DN_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x7e)
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#define WCD9378_TX1_DN_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x7f)
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#define WCD9378_TX2_UP_T0 (WCD9378_SEQR_BASE+0x80)
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#define WCD9378_TX2_UP_T1 (WCD9378_SEQR_BASE+0x81)
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#define WCD9378_TX2_UP_T2 (WCD9378_SEQR_BASE+0x82)
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#define WCD9378_TX2_UP_T3 (WCD9378_SEQR_BASE+0x83)
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#define WCD9378_TX2_DN_T0 (WCD9378_SEQR_BASE+0x84)
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#define WCD9378_TX2_DN_T1 (WCD9378_SEQR_BASE+0x85)
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#define WCD9378_TX2_DN_T2 (WCD9378_SEQR_BASE+0x86)
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#define WCD9378_TX2_DN_T3 (WCD9378_SEQR_BASE+0x87)
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#define WCD9378_TX2_UP_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x88)
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#define WCD9378_TX2_UP_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x89)
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#define WCD9378_TX2_UP_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x8a)
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#define WCD9378_TX2_UP_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x8b)
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#define WCD9378_TX2_DN_STAGE_LOC_0 (WCD9378_SEQR_BASE+0x8c)
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#define WCD9378_TX2_DN_STAGE_LOC_1 (WCD9378_SEQR_BASE+0x8d)
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#define WCD9378_TX2_DN_STAGE_LOC_2 (WCD9378_SEQR_BASE+0x8e)
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#define WCD9378_TX2_DN_STAGE_LOC_3 (WCD9378_SEQR_BASE+0x8f)
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#define WCD9378_SEQ_HPH_STAT (WCD9378_SEQR_BASE+0x90)
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#define WCD9378_SEQ_SA_STAT (WCD9378_SEQR_BASE+0x91)
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#define WCD9378_SEQ_TX0_STAT (WCD9378_SEQR_BASE+0x92)
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#define WCD9378_SEQ_TX1_STAT (WCD9378_SEQR_BASE+0x93)
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#define WCD9378_SEQ_TX2_STAT (WCD9378_SEQR_BASE+0x94)
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#define WCD9378_MICB_REMAP_TABLE_VAL_0 (WCD9378_SEQR_BASE+0xa0)
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#define WCD9378_MICB_REMAP_TABLE_VAL_1 (WCD9378_SEQR_BASE+0xa1)
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#define WCD9378_MICB_REMAP_TABLE_VAL_2 (WCD9378_SEQR_BASE+0xa2)
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#define WCD9378_MICB_REMAP_TABLE_VAL_3 (WCD9378_SEQR_BASE+0xa3)
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#define WCD9378_MICB_REMAP_TABLE_VAL_4 (WCD9378_SEQR_BASE+0xa4)
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#define WCD9378_MICB_REMAP_TABLE_VAL_5 (WCD9378_SEQR_BASE+0xa5)
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#define WCD9378_MICB_REMAP_TABLE_VAL_6 (WCD9378_SEQR_BASE+0xa6)
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#define WCD9378_MICB_REMAP_TABLE_VAL_7 (WCD9378_SEQR_BASE+0xa7)
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#define WCD9378_MICB_REMAP_TABLE_VAL_8 (WCD9378_SEQR_BASE+0xa8)
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#define WCD9378_MICB_REMAP_TABLE_VAL_9 (WCD9378_SEQR_BASE+0xa9)
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#define WCD9378_MICB_REMAP_TABLE_VAL_10 (WCD9378_SEQR_BASE+0xaa)
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#define WCD9378_MICB_REMAP_TABLE_VAL_11 (WCD9378_SEQR_BASE+0xab)
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#define WCD9378_MICB_REMAP_TABLE_VAL_12 (WCD9378_SEQR_BASE+0xac)
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#define WCD9378_MICB_REMAP_TABLE_VAL_13 (WCD9378_SEQR_BASE+0xad)
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#define WCD9378_MICB_REMAP_TABLE_VAL_14 (WCD9378_SEQR_BASE+0xae)
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#define WCD9378_MICB_REMAP_TABLE_VAL_15 (WCD9378_SEQR_BASE+0xaf)
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#define WCD9378_SM0_MB_SEL (WCD9378_SEQR_BASE+0xb0)
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#define WCD9378_SM1_MB_SEL (WCD9378_SEQR_BASE+0xb1)
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#define WCD9378_SM2_MB_SEL (WCD9378_SEQR_BASE+0xb2)
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#define WCD9378_MB_PULLUP_EN (WCD9378_SEQR_BASE+0xb3)
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#define WCD9378_BYP_EN_CTL0 (WCD9378_SEQR_BASE+0xc0)
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#define WCD9378_BYP_EN_CTL1 (WCD9378_SEQR_BASE+0xc1)
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#define WCD9378_BYP_EN_CTL2 (WCD9378_SEQR_BASE+0xc2)
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#define WCD9378_SEQ_OVRRIDE_CTL0 (WCD9378_SEQR_BASE+0xc3)
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#define WCD9378_SEQ_OVRRIDE_CTL1 (WCD9378_SEQR_BASE+0xc4)
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#define WCD9378_SEQ_OVRRIDE_CTL2 (WCD9378_SEQR_BASE+0xc5)
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#define WCD9378_HPH_SEQ_OVRRIDE_CTL0 (WCD9378_SEQR_BASE+0xc7)
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#define WCD9378_HPH_SEQ_OVRRIDE_CTL1 (WCD9378_SEQR_BASE+0xc8)
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#define WCD9378_SA_SEQ_OVRRIDE_CTL (WCD9378_SEQR_BASE+0xc9)
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#define WCD9378_TX0_SEQ_OVRRIDE_CTL (WCD9378_SEQR_BASE+0xca)
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#define WCD9378_TX1_SEQ_OVRRIDE_CTL (WCD9378_SEQR_BASE+0xcb)
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#define WCD9378_TX2_SEQ_OVRRIDE_CTL (WCD9378_SEQR_BASE+0xcc)
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#define WCD9378_FORCE_CTL (WCD9378_SEQR_BASE+0xcd)
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#define WCD9378_MBHC_BASE (WCD9378_BASE+0x180601)
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#define WCD9378_DEVICE_DET (WCD9378_MBHC_BASE+0x01)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_0 (WCD9378_MBHC_BASE+0x10)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_0 (WCD9378_MBHC_BASE+0x11)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_0 (WCD9378_MBHC_BASE+0x12)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_0 (WCD9378_MBHC_BASE+0x13)
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#define WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_0 (WCD9378_MBHC_BASE+0x14)
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#define WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_0 (WCD9378_MBHC_BASE+0x15)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_1 (WCD9378_MBHC_BASE+0x20)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_1 (WCD9378_MBHC_BASE+0x21)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_1 (WCD9378_MBHC_BASE+0x22)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_1 (WCD9378_MBHC_BASE+0x23)
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#define WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_1 (WCD9378_MBHC_BASE+0x24)
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#define WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_1 (WCD9378_MBHC_BASE+0x25)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_2 (WCD9378_MBHC_BASE+0x30)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_2 (WCD9378_MBHC_BASE+0x31)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_2 (WCD9378_MBHC_BASE+0x32)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_2 (WCD9378_MBHC_BASE+0x33)
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#define WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_2 (WCD9378_MBHC_BASE+0x34)
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#define WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_2 (WCD9378_MBHC_BASE+0x35)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MIN_3 (WCD9378_MBHC_BASE+0x40)
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#define WCD9378_TYPE0_WRAP_OSCNX_TPRESS_MAX_3 (WCD9378_MBHC_BASE+0x41)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MIN_3 (WCD9378_MBHC_BASE+0x42)
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#define WCD9378_TYPE0_WRAP_OSCNX_TRELEASE_MAX_3 (WCD9378_MBHC_BASE+0x43)
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#define WCD9378_TYPE0_WRAP_OSCNX_HDL_BT_ASSIGN_3 (WCD9378_MBHC_BASE+0x44)
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#define WCD9378_TYPE0_WRAP_OSCNX_OUTPUT_SEL_3 (WCD9378_MBHC_BASE+0x45)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_0 (WCD9378_MBHC_BASE+0x50)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_0 (WCD9378_MBHC_BASE+0x51)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_0 (WCD9378_MBHC_BASE+0x52)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_0 (WCD9378_MBHC_BASE+0x53)
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#define WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_0 (WCD9378_MBHC_BASE+0x54)
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#define WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_0 (WCD9378_MBHC_BASE+0x55)
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#define WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_0 (WCD9378_MBHC_BASE+0x56)
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#define WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_0 (WCD9378_MBHC_BASE+0x57)
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#define WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_0 (WCD9378_MBHC_BASE+0x58)
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#define WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_0 (WCD9378_MBHC_BASE+0x59)
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#define WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_0 (WCD9378_MBHC_BASE+0x5b)
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#define WCD9378_TYPE1_WRAP_RTC_OOC_SEL_0 (WCD9378_MBHC_BASE+0x5c)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_1 (WCD9378_MBHC_BASE+0x60)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_1 (WCD9378_MBHC_BASE+0x61)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_1 (WCD9378_MBHC_BASE+0x62)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_1 (WCD9378_MBHC_BASE+0x63)
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#define WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_1 (WCD9378_MBHC_BASE+0x64)
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#define WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_1 (WCD9378_MBHC_BASE+0x65)
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#define WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_1 (WCD9378_MBHC_BASE+0x66)
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#define WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_1 (WCD9378_MBHC_BASE+0x67)
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#define WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_1 (WCD9378_MBHC_BASE+0x68)
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#define WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_1 (WCD9378_MBHC_BASE+0x69)
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#define WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_1 (WCD9378_MBHC_BASE+0x6b)
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#define WCD9378_TYPE1_WRAP_RTC_OOC_SEL_1 (WCD9378_MBHC_BASE+0x6c)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_2 (WCD9378_MBHC_BASE+0x70)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_2 (WCD9378_MBHC_BASE+0x71)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_2 (WCD9378_MBHC_BASE+0x72)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_2 (WCD9378_MBHC_BASE+0x73)
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#define WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_2 (WCD9378_MBHC_BASE+0x74)
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#define WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_2 (WCD9378_MBHC_BASE+0x75)
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#define WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_2 (WCD9378_MBHC_BASE+0x76)
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#define WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_2 (WCD9378_MBHC_BASE+0x77)
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#define WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_2 (WCD9378_MBHC_BASE+0x78)
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#define WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_2 (WCD9378_MBHC_BASE+0x79)
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#define WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_2 (WCD9378_MBHC_BASE+0x7b)
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#define WCD9378_TYPE1_WRAP_RTC_OOC_SEL_2 (WCD9378_MBHC_BASE+0x7c)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MIN_3 (WCD9378_MBHC_BASE+0x80)
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#define WCD9378_TYPE1_WRAP_OSCNX_TPRESS_MAX_3 (WCD9378_MBHC_BASE+0x81)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MIN_3 (WCD9378_MBHC_BASE+0x82)
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#define WCD9378_TYPE1_WRAP_OSCNX_TRELEASE_MAX_3 (WCD9378_MBHC_BASE+0x83)
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#define WCD9378_TYPE1_WRAP_OSCNX_HDL_BT_ASSIGN_3 (WCD9378_MBHC_BASE+0x84)
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#define WCD9378_TYPE1_WRAP_OSCNX_OUTPUT_SEL_3 (WCD9378_MBHC_BASE+0x85)
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#define WCD9378_TYPE1_WRAP_HOLD_TPRESS_MIN_3 (WCD9378_MBHC_BASE+0x86)
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#define WCD9378_TYPE1_WRAP_HOLD_TRELEASE_MIN_3 (WCD9378_MBHC_BASE+0x87)
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#define WCD9378_TYPE1_WRAP_HOLD_HDL_BT_ASSIGN_3 (WCD9378_MBHC_BASE+0x88)
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#define WCD9378_TYPE1_WRAP_RO_TDEBOUNCE_3 (WCD9378_MBHC_BASE+0x89)
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#define WCD9378_TYPE1_WRAP_RO_HDL_BT_ASSIGN_3 (WCD9378_MBHC_BASE+0x8b)
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#define WCD9378_TYPE1_WRAP_RTC_OOC_SEL_3 (WCD9378_MBHC_BASE+0x8c)
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#define WCD9378_SDCA_MESSAGE_GATE (WCD9378_MBHC_BASE+0x8d)
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#define WCD9378_MBHC_DATA_IN_EDGE (WCD9378_MBHC_BASE+0x90)
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#define WCD9378_MBHC_RESET (WCD9378_MBHC_BASE+0x91)
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#define WCD9378_MBHC_DEBUG (WCD9378_MBHC_BASE+0x92)
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#define WCD9378_MBHC_DEBUG_UMP_0 (WCD9378_MBHC_BASE+0x93)
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#define WCD9378_MBHC_DEBUG_UMP_1 (WCD9378_MBHC_BASE+0x94)
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#define WCD9378_MBHC_DEBUG_UMP_2 (WCD9378_MBHC_BASE+0x95)
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#define WCD9378_HID_BASE (WCD9378_BASE+0x400001)
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#define WCD9378_HID_FUNC_EXT_ID_0 (WCD9378_HID_BASE+0x48)
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#define WCD9378_HID_FUNC_EXT_ID_1 (WCD9378_HID_BASE+0x49)
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#define WCD9378_HID_FUNC_EXT_VER (WCD9378_HID_BASE+0x50)
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#define WCD9378_HID_FUNC_STAT (WCD9378_HID_BASE+0x80000)
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#define WCD9378_HID_CUR_OWNER (WCD9378_HID_BASE+0x80080)
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#define WCD9378_HID_MSG_OFFSET (WCD9378_HID_BASE+0x80090)
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#define WCD9378_HID_MSG_LENGTH (WCD9378_HID_BASE+0x80098)
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#define WCD9378_HID_DEV_MANU_ID_0 (WCD9378_HID_BASE+0x100060)
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#define WCD9378_HID_DEV_MANU_ID_1 (WCD9378_HID_BASE+0x100061)
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#define WCD9378_HID_DEV_PART_ID_0 (WCD9378_HID_BASE+0x100068)
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#define WCD9378_HID_DEV_PART_ID_1 (WCD9378_HID_BASE+0x100069)
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#define WCD9378_HID_DEV_VER (WCD9378_HID_BASE+0x100070)
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#define WCD9378_SMP_AMP_BASE (WCD9378_BASE+0x800001)
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#define WCD9378_SMP_AMP_FUNC_EXT_ID_0 (WCD9378_SMP_AMP_BASE+0x48)
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#define WCD9378_SMP_AMP_FUNC_EXT_ID_1 (WCD9378_SMP_AMP_BASE+0x49)
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#define WCD9378_SMP_AMP_FUNC_EXT_VER (WCD9378_SMP_AMP_BASE+0x50)
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#define WCD9378_XU22_BYP (WCD9378_SMP_AMP_BASE+0x188)
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#define WCD9378_PDE22_REQ_PS (WCD9378_SMP_AMP_BASE+0x208)
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#define WCD9378_FU23_MUTE (WCD9378_SMP_AMP_BASE+0x388)
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#define WCD9378_PDE23_REQ_PS (WCD9378_SMP_AMP_BASE+0x408)
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#define WCD9378_SMP_AMP_FUNC_STAT (WCD9378_SMP_AMP_BASE+0x80000)
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#define WCD9378_FUNC_ACT (WCD9378_SMP_AMP_BASE+0x80008)
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#define WCD9378_PDE22_ACT_PS (WCD9378_SMP_AMP_BASE+0x80200)
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#define WCD9378_SAPU29_PROT_MODE (WCD9378_SMP_AMP_BASE+0x80280)
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#define WCD9378_SAPU29_PROT_STAT (WCD9378_SMP_AMP_BASE+0x80288)
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#define WCD9378_PDE23_ACT_PS (WCD9378_SMP_AMP_BASE+0x80400)
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#define WCD9378_SMP_AMP_DEV_MANU_ID_0 (WCD9378_SMP_AMP_BASE+0x100060)
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#define WCD9378_SMP_AMP_DEV_MANU_ID_1 (WCD9378_SMP_AMP_BASE+0x100061)
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#define WCD9378_SMP_AMP_DEV_PART_ID_0 (WCD9378_SMP_AMP_BASE+0x100068)
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#define WCD9378_SMP_AMP_DEV_PART_ID_1 (WCD9378_SMP_AMP_BASE+0x100069)
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#define WCD9378_SMP_AMP_DEV_VER (WCD9378_SMP_AMP_BASE+0x100070)
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#define WCD9378_SMP_JACK_BASE (WCD9378_BASE+0xc00001)
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#define WCD9378_CMT_GRP_MASK (WCD9378_SMP_JACK_BASE+0x08)
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#define WCD9378_SMP_JACK_FUNC_EXT_ID_0 (WCD9378_SMP_JACK_BASE+0x48)
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#define WCD9378_SMP_JACK_FUNC_EXT_ID_1 (WCD9378_SMP_JACK_BASE+0x49)
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#define WCD9378_SMP_JACK_FUNC_EXT_VER (WCD9378_SMP_JACK_BASE+0x50)
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#define WCD9378_IT41_USAGE (WCD9378_SMP_JACK_BASE+0xa0)
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#define WCD9378_XU42_BYP (WCD9378_SMP_JACK_BASE+0x208)
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#define WCD9378_PDE42_REQ_PS (WCD9378_SMP_JACK_BASE+0x288)
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#define WCD9378_FU42_MUTE_CH1 (WCD9378_SMP_JACK_BASE+0x309)
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#define WCD9378_FU42_MUTE_CH2 (WCD9378_SMP_JACK_BASE+0x30a)
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#define WCD9378_FU42_CH_VOL_CH1 (WCD9378_SMP_JACK_BASE+0x311)
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#define WCD9378_FU42_CH_VOL_CH2 (WCD9378_SMP_JACK_BASE+0x312)
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#define WCD9378_SU43_SELECTOR (WCD9378_SMP_JACK_BASE+0x388)
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#define WCD9378_SU45_SELECTOR (WCD9378_SMP_JACK_BASE+0x408)
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#define WCD9378_PDE47_REQ_PS (WCD9378_SMP_JACK_BASE+0x488)
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#define WCD9378_GE35_SEL_MODE (WCD9378_SMP_JACK_BASE+0x608)
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#define WCD9378_GE35_DET_MODE (WCD9378_SMP_JACK_BASE+0x610)
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#define WCD9378_IT31_MICB (WCD9378_SMP_JACK_BASE+0x798)
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#define WCD9378_IT31_USAGE (WCD9378_SMP_JACK_BASE+0x7a0)
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#define WCD9378_PDE34_REQ_PS (WCD9378_SMP_JACK_BASE+0x808)
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#define WCD9378_SU45_TX_SELECTOR (WCD9378_SMP_JACK_BASE+0x908)
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#define WCD9378_XU36_BYP (WCD9378_SMP_JACK_BASE+0x988)
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#define WCD9378_PDE36_REQ_PS (WCD9378_SMP_JACK_BASE+0xa08)
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#define WCD9378_OT36_USAGE (WCD9378_SMP_JACK_BASE+0xb20)
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#define WCD9378_SMP_JACK_FUNC_STAT (WCD9378_SMP_JACK_BASE+0x80000)
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#define WCD9378_SMP_JACK_FUNC_ACT (WCD9378_SMP_JACK_BASE+0x80008)
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#define WCD9378_PDE42_ACT_PS (WCD9378_SMP_JACK_BASE+0x80280)
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#define WCD9378_PDE47_ACT_PS (WCD9378_SMP_JACK_BASE+0x80480)
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#define WCD9378_PDE34_ACT_PS (WCD9378_SMP_JACK_BASE+0x80800)
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#define WCD9378_PDE36_ACT_PS (WCD9378_SMP_JACK_BASE+0x80a00)
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#define WCD9378_SMP_JACK_DEV_MANU_ID_0 (WCD9378_SMP_JACK_BASE+0x100060)
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#define WCD9378_SMP_JACK_DEV_MANU_ID_1 (WCD9378_SMP_JACK_BASE+0x100061)
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#define WCD9378_SMP_JACK_DEV_PART_ID_0 (WCD9378_SMP_JACK_BASE+0x100068)
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#define WCD9378_SMP_JACK_DEV_PART_ID_1 (WCD9378_SMP_JACK_BASE+0x100069)
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#define WCD9378_SMP_JACK_DEV_VER (WCD9378_SMP_JACK_BASE+0x100070)
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#define WCD9378_SMP_MIC_CTRL0_BASE (WCD9378_BASE+0x1000001)
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#define WCD9378_SMP_MIC_CTRL0_FUNC_EXT_ID_0 (WCD9378_SMP_MIC_CTRL0_BASE+0x48)
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#define WCD9378_SMP_MIC_CTRL0_FUNC_EXT_ID_1 (WCD9378_SMP_MIC_CTRL0_BASE+0x49)
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#define WCD9378_SMP_MIC_CTRL0_FUNC_EXT_VER (WCD9378_SMP_MIC_CTRL0_BASE+0x50)
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#define WCD9378_IT11_MICB (WCD9378_SMP_MIC_CTRL0_BASE+0x98)
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#define WCD9378_IT11_USAGE (WCD9378_SMP_MIC_CTRL0_BASE+0xa0)
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#define WCD9378_PDE11_REQ_PS (WCD9378_SMP_MIC_CTRL0_BASE+0x108)
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#define WCD9378_OT10_USAGE (WCD9378_SMP_MIC_CTRL0_BASE+0x3a0)
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#define WCD9378_SMP_MIC_CTRL0_FUNC_STAT (WCD9378_SMP_MIC_CTRL0_BASE+0x80000)
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#define WCD9378_SMP_MIC_CTRL0_FUNC_ACT (WCD9378_SMP_MIC_CTRL0_BASE+0x80008)
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#define WCD9378_PDE11_ACT_PS (WCD9378_SMP_MIC_CTRL0_BASE+0x80100)
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#define WCD9378_SMP_MIC_CTRL0_DEV_MANU_ID_0 (WCD9378_SMP_MIC_CTRL0_BASE+0x100060)
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#define WCD9378_SMP_MIC_CTRL0_DEV_MANU_ID_1 (WCD9378_SMP_MIC_CTRL0_BASE+0x100061)
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#define WCD9378_SMP_MIC_CTRL0_DEV_PART_ID_0 (WCD9378_SMP_MIC_CTRL0_BASE+0x100068)
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#define WCD9378_SMP_MIC_CTRL0_DEV_PART_ID_1 (WCD9378_SMP_MIC_CTRL0_BASE+0x100069)
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#define WCD9378_SMP_MIC_CTRL0_DEV_VER (WCD9378_SMP_MIC_CTRL0_BASE+0x100070)
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#define WCD9378_SMP_MIC_CTRL1_BASE (WCD9378_BASE+0x1400001)
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#define WCD9378_SMP_MIC_CTRL1_FUNC_EXT_ID_0 (WCD9378_SMP_MIC_CTRL1_BASE+0x48)
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#define WCD9378_SMP_MIC_CTRL1_FUNC_EXT_ID_1 (WCD9378_SMP_MIC_CTRL1_BASE+0x49)
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#define WCD9378_SMP_MIC_CTRL1_FUNC_EXT_VER (WCD9378_SMP_MIC_CTRL1_BASE+0x50)
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#define WCD9378_SMP_MIC_CTRL1_IT11_MICB (WCD9378_SMP_MIC_CTRL1_BASE+0x98)
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#define WCD9378_SMP_MIC_CTRL1_IT11_USAGE (WCD9378_SMP_MIC_CTRL1_BASE+0xa0)
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#define WCD9378_SMP_MIC_CTRL1_PDE11_REQ_PS (WCD9378_SMP_MIC_CTRL1_BASE+0x108)
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#define WCD9378_SMP_MIC_CTRL1_OT10_USAGE (WCD9378_SMP_MIC_CTRL1_BASE+0x3a0)
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#define WCD9378_SMP_MIC_CTRL1_FUNC_STAT (WCD9378_SMP_MIC_CTRL1_BASE+0x80000)
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#define WCD9378_SMP_MIC_CTRL1_FUNC_ACT (WCD9378_SMP_MIC_CTRL1_BASE+0x80008)
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#define WCD9378_SMP_MIC_CTRL1_PDE11_ACT_PS (WCD9378_SMP_MIC_CTRL1_BASE+0x80100)
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#define WCD9378_SMP_MIC_CTRL1_DEV_MANU_ID_0 (WCD9378_SMP_MIC_CTRL1_BASE+0x100060)
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#define WCD9378_SMP_MIC_CTRL1_DEV_MANU_ID_1 (WCD9378_SMP_MIC_CTRL1_BASE+0x100061)
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#define WCD9378_SMP_MIC_CTRL1_DEV_PART_ID_0 (WCD9378_SMP_MIC_CTRL1_BASE+0x100068)
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#define WCD9378_SMP_MIC_CTRL1_DEV_PART_ID_1 (WCD9378_SMP_MIC_CTRL1_BASE+0x100069)
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#define WCD9378_SMP_MIC_CTRL1_DEV_VER (WCD9378_SMP_MIC_CTRL1_BASE+0x100070)
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#define WCD9378_SMP_MIC_CTRL2_BASE (WCD9378_BASE+0x1800001)
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#define WCD9378_SMP_MIC_CTRL2_FUNC_EXT_ID_0 (WCD9378_SMP_MIC_CTRL2_BASE+0x48)
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#define WCD9378_SMP_MIC_CTRL2_FUNC_EXT_ID_1 (WCD9378_SMP_MIC_CTRL2_BASE+0x49)
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#define WCD9378_SMP_MIC_CTRL2_FUNC_EXT_VER (WCD9378_SMP_MIC_CTRL2_BASE+0x50)
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#define WCD9378_SMP_MIC_CTRL2_IT11_MICB (WCD9378_SMP_MIC_CTRL2_BASE+0x98)
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#define WCD9378_SMP_MIC_CTRL2_IT11_USAGE (WCD9378_SMP_MIC_CTRL2_BASE+0xa0)
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#define WCD9378_SMP_MIC_CTRL2_PDE11_REQ_PS (WCD9378_SMP_MIC_CTRL2_BASE+0x108)
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#define WCD9378_SMP_MIC_CTRL2_OT10_USAGE (WCD9378_SMP_MIC_CTRL2_BASE+0x3a0)
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#define WCD9378_SMP_MIC_CTRL2_FUNC_STAT (WCD9378_SMP_MIC_CTRL2_BASE+0x80000)
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#define WCD9378_SMP_MIC_CTRL2_FUNC_ACT (WCD9378_SMP_MIC_CTRL2_BASE+0x80008)
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#define WCD9378_SMP_MIC_CTRL2_PDE11_ACT_PS (WCD9378_SMP_MIC_CTRL2_BASE+0x80100)
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#define WCD9378_SMP_MIC_CTRL2_DEV_MANU_ID_0 (WCD9378_SMP_MIC_CTRL2_BASE+0x100060)
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#define WCD9378_SMP_MIC_CTRL2_DEV_MANU_ID_1 (WCD9378_SMP_MIC_CTRL2_BASE+0x100061)
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#define WCD9378_SMP_MIC_CTRL2_DEV_PART_ID_0 (WCD9378_SMP_MIC_CTRL2_BASE+0x100068)
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#define WCD9378_SMP_MIC_CTRL2_DEV_PART_ID_1 (WCD9378_SMP_MIC_CTRL2_BASE+0x100069)
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#define WCD9378_SMP_MIC_CTRL2_DEV_VER (WCD9378_SMP_MIC_CTRL2_BASE+0x100070)
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#define WCD9378_HID_MEM_BASE (WCD9378_BASE+0x4000001)
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#define WCD9378_REPORT_ID (WCD9378_HID_MEM_BASE+0x01)
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#define WCD9378_MESSAGE0 (WCD9378_HID_MEM_BASE+0x02)
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#define WCD9378_MESSAGE1 (WCD9378_HID_MEM_BASE+0x03)
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#define WCD9378_MESSAGE2 (WCD9378_HID_MEM_BASE+0x04)
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#define WCD9378_NUM_REGISTERS (WCD9378_SMP_MIC_CTRL2_DEV_VER - WCD9378_BASE + 1)
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#define WCD9378_MAX_REGISTER (WCD9378_MESSAGE2 + 1)
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#define WCD9378_TX_NEW_TX_CH12_MUX_CH2_SEL_SHIFT 0x03
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#define WCD9378_TX_NEW_TX_CH12_MUX_CH1_SEL_SHIFT 0x00
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#define WCD9378_TX_NEW_TX_CH34_MUX_CH3_SEL_SHIFT 0x00
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#define WCD9378_CDC_HPH_GAIN_CTL_HPHR_RX_EN_SHIFT 0x03
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#define WCD9378_CDC_HPH_GAIN_CTL_HPHL_RX_EN_SHIFT 0x02
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#define WCD9378_CDC_AUX_GAIN_CTL_AUX_EN_SHIFT 0x00
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#define WCD9378_CN_MBQ_ENABLE_MASK (0x6000)
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#define WCD9378_CN_ENABLE_MASK (0x4000)
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#define WCD9378_FU42_CH_VOL_CH1_MSB (WCD9378_FU42_CH_VOL_CH1 | WCD9378_CN_MBQ_ENABLE_MASK)
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#define WCD9378_FU42_CH_VOL_CH1_LSB (WCD9378_FU42_CH_VOL_CH1 | WCD9378_CN_ENABLE_MASK)
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#define WCD9378_FU42_CH_VOL_CH2_MSB (WCD9378_FU42_CH_VOL_CH2 | WCD9378_CN_MBQ_ENABLE_MASK)
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#define WCD9378_FU42_CH_VOL_CH2_LSB (WCD9378_FU42_CH_VOL_CH2 | WCD9378_CN_ENABLE_MASK)
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#define WCD9378_FU42_MUTE_CH1_CN (WCD9378_FU42_MUTE_CH1 | WCD9378_CN_ENABLE_MASK)
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#define WCD9378_FU42_MUTE_CH2_CN (WCD9378_FU42_MUTE_CH2 | WCD9378_CN_ENABLE_MASK)
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#define SWRS_SCP_BASE_CLK_BASE (0x004d)
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#define SWRS_SCP_BUSCLOCK_SCALE_BANK0 (0x0062)
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#define SWRS_SCP_BUSCLOCK_SCALE_BANK1 (0x0072)
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#define SWRS_SCP_SDCA_INTMASK_1 (0x0000005c)
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#define SWRS_SCP_SDCA_INTMASK_2 (0x0000005d)
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#define SWRS_SCP_SDCA_INTMASK_3 (0x0000005e)
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#define SWRS_SCP_SDCA_INTSTAT_1 (0x00000058)
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#define SWRS_SCP_SDCA_INTSTAT_2 (0x00000059)
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#define SWRS_SCP_SDCA_INTSTAT_3 (0x0000005a)
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#define SWRS_SCP_SDCA_INTRTYPE_1 (0x000000f4)
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#define SWRS_SCP_SDCA_INTRTYPE_2 (0x000000f8)
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#define SWRS_SCP_SDCA_INTRTYPE_3 (0x000000fc)
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#endif /* WCD9378_REGISTERS_H */
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