dp_main.c 125 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <hal_api.h>
  23. #include <hif.h>
  24. #include <htt.h>
  25. #include <wdi_event.h>
  26. #include <queue.h>
  27. #include "dp_htt.h"
  28. #include "dp_types.h"
  29. #include "dp_internal.h"
  30. #include "dp_tx.h"
  31. #include "dp_rx.h"
  32. #include <cdp_txrx_handle.h>
  33. #include <wlan_cfg.h>
  34. #include "cdp_txrx_cmn_struct.h"
  35. #include <qdf_util.h>
  36. #include "dp_peer.h"
  37. #include "dp_rx_mon.h"
  38. #include "htt_stats.h"
  39. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  40. #define DP_INTR_POLL_TIMER_MS 10
  41. #define DP_WDS_AGING_TIMER_DEFAULT_MS 6000
  42. #define DP_MCS_LENGTH (6*MAX_MCS)
  43. #define DP_NSS_LENGTH (6*SS_COUNT)
  44. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  45. #define DP_REO_ERR_LENGTH (6*REO_ERROR_TYPE_MAX)
  46. #define DP_CURR_FW_STATS_AVAIL 19
  47. #define DP_HTT_DBG_EXT_STATS_MAX 256
  48. /**
  49. * default_dscp_tid_map - Default DSCP-TID mapping
  50. *
  51. * DSCP TID AC
  52. * 000000 0 WME_AC_BE
  53. * 001000 1 WME_AC_BK
  54. * 010000 1 WME_AC_BK
  55. * 011000 0 WME_AC_BE
  56. * 100000 5 WME_AC_VI
  57. * 101000 5 WME_AC_VI
  58. * 110000 6 WME_AC_VO
  59. * 111000 6 WME_AC_VO
  60. */
  61. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  62. 0, 0, 0, 0, 0, 0, 0, 0,
  63. 1, 1, 1, 1, 1, 1, 1, 1,
  64. 1, 1, 1, 1, 1, 1, 1, 1,
  65. 0, 0, 0, 0, 0, 0, 0, 0,
  66. 5, 5, 5, 5, 5, 5, 5, 5,
  67. 5, 5, 5, 5, 5, 5, 5, 5,
  68. 6, 6, 6, 6, 6, 6, 6, 6,
  69. 6, 6, 6, 6, 6, 6, 6, 6,
  70. };
  71. /**
  72. * @brief Select the type of statistics
  73. */
  74. enum dp_stats_type {
  75. STATS_FW = 0,
  76. STATS_HOST = 1,
  77. STATS_TYPE_MAX = 2,
  78. };
  79. /**
  80. * @brief General Firmware statistics options
  81. *
  82. */
  83. enum dp_fw_stats {
  84. TXRX_FW_STATS_INVALID = -1,
  85. };
  86. /**
  87. * @brief Firmware and Host statistics
  88. * currently supported
  89. */
  90. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  91. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  92. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  93. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  94. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  95. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  96. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  97. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  98. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  99. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  100. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  101. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  102. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  103. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  104. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  105. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  106. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  107. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  108. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  109. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  110. /* Last ENUM for HTT FW STATS */
  111. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  112. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  113. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  114. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  115. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  116. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  117. };
  118. /*
  119. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  120. */
  121. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  122. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  123. {
  124. void *hal_soc = soc->hal_soc;
  125. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  126. /* TODO: See if we should get align size from hal */
  127. uint32_t ring_base_align = 8;
  128. struct hal_srng_params ring_params;
  129. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  130. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  131. srng->hal_srng = NULL;
  132. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  133. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  134. soc->osdev, soc->osdev->dev, srng->alloc_size,
  135. &(srng->base_paddr_unaligned));
  136. if (!srng->base_vaddr_unaligned) {
  137. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  138. FL("alloc failed - ring_type: %d, ring_num %d"),
  139. ring_type, ring_num);
  140. return QDF_STATUS_E_NOMEM;
  141. }
  142. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  143. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  144. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  145. ((unsigned long)(ring_params.ring_base_vaddr) -
  146. (unsigned long)srng->base_vaddr_unaligned);
  147. ring_params.num_entries = num_entries;
  148. /* TODO: Check MSI support and get MSI settings from HIF layer */
  149. ring_params.msi_data = 0;
  150. ring_params.msi_addr = 0;
  151. /*
  152. * Setup interrupt timer and batch counter thresholds for
  153. * interrupt mitigation based on ring type
  154. */
  155. if (ring_type == REO_DST) {
  156. ring_params.intr_timer_thres_us =
  157. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  158. ring_params.intr_batch_cntr_thres_entries =
  159. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  160. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  161. ring_params.intr_timer_thres_us =
  162. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  163. ring_params.intr_batch_cntr_thres_entries =
  164. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  165. } else {
  166. ring_params.intr_timer_thres_us =
  167. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  168. ring_params.intr_batch_cntr_thres_entries =
  169. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  170. }
  171. /* TODO: Currently hal layer takes care of endianness related settings.
  172. * See if these settings need to passed from DP layer
  173. */
  174. ring_params.flags = 0;
  175. /* Enable low threshold interrupts for rx buffer rings (regular and
  176. * monitor buffer rings.
  177. * TODO: See if this is required for any other ring
  178. */
  179. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  180. /* TODO: Setting low threshold to 1/8th of ring size
  181. * see if this needs to be configurable
  182. */
  183. ring_params.low_threshold = num_entries >> 3;
  184. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  185. }
  186. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  187. mac_id, &ring_params);
  188. return 0;
  189. }
  190. /**
  191. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  192. * Any buffers allocated and attached to ring entries are expected to be freed
  193. * before calling this function.
  194. */
  195. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  196. int ring_type, int ring_num)
  197. {
  198. if (!srng->hal_srng) {
  199. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  200. FL("Ring type: %d, num:%d not setup"),
  201. ring_type, ring_num);
  202. return;
  203. }
  204. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  205. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  206. srng->alloc_size,
  207. srng->base_vaddr_unaligned,
  208. srng->base_paddr_unaligned, 0);
  209. }
  210. /* TODO: Need this interface from HIF */
  211. void *hif_get_hal_handle(void *hif_handle);
  212. /*
  213. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  214. * @dp_ctx: DP SOC handle
  215. * @budget: Number of frames/descriptors that can be processed in one shot
  216. *
  217. * Return: remaining budget/quota for the soc device
  218. */
  219. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  220. {
  221. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  222. struct dp_soc *soc = int_ctx->soc;
  223. int ring = 0;
  224. uint32_t work_done = 0;
  225. uint32_t budget = dp_budget;
  226. uint8_t tx_mask = int_ctx->tx_ring_mask;
  227. uint8_t rx_mask = int_ctx->rx_ring_mask;
  228. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  229. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  230. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  231. /* Process Tx completion interrupts first to return back buffers */
  232. if (tx_mask) {
  233. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  234. if (tx_mask & (1 << ring)) {
  235. work_done =
  236. dp_tx_comp_handler(soc, ring, budget);
  237. budget -= work_done;
  238. if (work_done)
  239. QDF_TRACE(QDF_MODULE_ID_DP,
  240. QDF_TRACE_LEVEL_INFO,
  241. "tx mask 0x%x ring %d,"
  242. "budget %d",
  243. tx_mask, ring, budget);
  244. if (budget <= 0)
  245. goto budget_done;
  246. }
  247. }
  248. }
  249. /* Process REO Exception ring interrupt */
  250. if (rx_err_mask) {
  251. work_done = dp_rx_err_process(soc,
  252. soc->reo_exception_ring.hal_srng, budget);
  253. budget -= work_done;
  254. if (work_done)
  255. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  256. "REO Exception Ring: work_done %d budget %d",
  257. work_done, budget);
  258. if (budget <= 0) {
  259. goto budget_done;
  260. }
  261. }
  262. /* Process Rx WBM release ring interrupt */
  263. if (rx_wbm_rel_mask) {
  264. work_done = dp_rx_wbm_err_process(soc,
  265. soc->rx_rel_ring.hal_srng, budget);
  266. budget -= work_done;
  267. if (work_done)
  268. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  269. "WBM Release Ring: work_done %d budget %d",
  270. work_done, budget);
  271. if (budget <= 0) {
  272. goto budget_done;
  273. }
  274. }
  275. /* Process Rx interrupts */
  276. if (rx_mask) {
  277. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  278. if (rx_mask & (1 << ring)) {
  279. work_done =
  280. dp_rx_process(int_ctx,
  281. soc->reo_dest_ring[ring].hal_srng,
  282. budget);
  283. budget -= work_done;
  284. if (work_done)
  285. QDF_TRACE(QDF_MODULE_ID_DP,
  286. QDF_TRACE_LEVEL_INFO,
  287. "rx mask 0x%x ring %d,"
  288. "budget %d",
  289. tx_mask, ring, budget);
  290. if (budget <= 0)
  291. goto budget_done;
  292. }
  293. }
  294. }
  295. if (reo_status_mask)
  296. dp_reo_status_ring_handler(soc);
  297. /* Process LMAC interrupts */
  298. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  299. if (soc->pdev_list[ring] == NULL)
  300. continue;
  301. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  302. work_done =
  303. dp_mon_process(soc, ring, budget);
  304. budget -= work_done;
  305. }
  306. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  307. work_done =
  308. dp_rxdma_err_process(soc, ring, budget);
  309. budget -= work_done;
  310. }
  311. }
  312. qdf_lro_flush(int_ctx->lro_ctx);
  313. budget_done:
  314. return dp_budget - budget;
  315. }
  316. /* dp_interrupt_timer()- timer poll for interrupts
  317. *
  318. * @arg: SoC Handle
  319. *
  320. * Return:
  321. *
  322. */
  323. #ifdef DP_INTR_POLL_BASED
  324. static void dp_interrupt_timer(void *arg)
  325. {
  326. struct dp_soc *soc = (struct dp_soc *) arg;
  327. int i;
  328. if (qdf_atomic_read(&soc->cmn_init_done)) {
  329. for (i = 0;
  330. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  331. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  332. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  333. }
  334. }
  335. /*
  336. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  337. * @txrx_soc: DP SOC handle
  338. *
  339. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  340. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  341. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  342. *
  343. * Return: 0 for success. nonzero for failure.
  344. */
  345. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  346. {
  347. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  348. int i;
  349. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  350. soc->intr_ctx[i].tx_ring_mask = 0xF;
  351. soc->intr_ctx[i].rx_ring_mask = 0xF;
  352. soc->intr_ctx[i].rx_mon_ring_mask = 0x1;
  353. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  354. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  355. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  356. soc->intr_ctx[i].rxdma2host_ring_mask = 0x1;
  357. soc->intr_ctx[i].soc = soc;
  358. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  359. }
  360. qdf_timer_init(soc->osdev, &soc->int_timer,
  361. dp_interrupt_timer, (void *)soc,
  362. QDF_TIMER_TYPE_WAKE_APPS);
  363. return QDF_STATUS_SUCCESS;
  364. }
  365. /*
  366. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  367. * @txrx_soc: DP SOC handle
  368. *
  369. * Return: void
  370. */
  371. static void dp_soc_interrupt_detach(void *txrx_soc)
  372. {
  373. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  374. int i;
  375. qdf_timer_stop(&soc->int_timer);
  376. qdf_timer_free(&soc->int_timer);
  377. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  378. soc->intr_ctx[i].tx_ring_mask = 0;
  379. soc->intr_ctx[i].rx_ring_mask = 0;
  380. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  381. soc->intr_ctx[i].rx_err_ring_mask = 0;
  382. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  383. soc->intr_ctx[i].reo_status_ring_mask = 0;
  384. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  385. }
  386. }
  387. #else
  388. /*
  389. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  390. * @txrx_soc: DP SOC handle
  391. *
  392. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  393. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  394. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  395. *
  396. * Return: 0 for success. nonzero for failure.
  397. */
  398. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  399. {
  400. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  401. int i = 0;
  402. int num_irq = 0;
  403. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  404. int j = 0;
  405. int ret = 0;
  406. /* Map of IRQ ids registered with one interrupt context */
  407. int irq_id_map[HIF_MAX_GRP_IRQ];
  408. int tx_mask =
  409. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  410. int rx_mask =
  411. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  412. int rx_mon_mask =
  413. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  414. int rx_err_ring_mask =
  415. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  416. int rx_wbm_rel_ring_mask =
  417. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  418. int reo_status_ring_mask =
  419. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  420. int rxdma2host_ring_mask =
  421. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  422. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  423. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  424. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  425. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  426. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  427. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  428. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  429. soc->intr_ctx[i].soc = soc;
  430. num_irq = 0;
  431. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  432. if (tx_mask & (1 << j)) {
  433. irq_id_map[num_irq++] =
  434. (wbm2host_tx_completions_ring1 - j);
  435. }
  436. if (rx_mask & (1 << j)) {
  437. irq_id_map[num_irq++] =
  438. (reo2host_destination_ring1 - j);
  439. }
  440. if (rxdma2host_ring_mask & (1 << j)) {
  441. irq_id_map[num_irq++] =
  442. rxdma2host_destination_ring_mac1 -
  443. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  444. }
  445. if (rx_mon_mask & (1 << j)) {
  446. irq_id_map[num_irq++] =
  447. ppdu_end_interrupts_mac1 -
  448. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  449. }
  450. if (rx_wbm_rel_ring_mask & (1 << j))
  451. irq_id_map[num_irq++] = wbm2host_rx_release;
  452. if (rx_err_ring_mask & (1 << j))
  453. irq_id_map[num_irq++] = reo2host_exception;
  454. if (reo_status_ring_mask & (1 << j))
  455. irq_id_map[num_irq++] = reo2host_status;
  456. }
  457. ret = hif_register_ext_group(soc->hif_handle,
  458. num_irq, irq_id_map, dp_service_srngs,
  459. &soc->intr_ctx[i], "dp_intr",
  460. HIF_EXEC_NAPI_TYPE);
  461. if (ret) {
  462. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  463. FL("failed, ret = %d"), ret);
  464. return QDF_STATUS_E_FAILURE;
  465. }
  466. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  467. }
  468. hif_configure_ext_group_interrupts(soc->hif_handle);
  469. return QDF_STATUS_SUCCESS;
  470. }
  471. /*
  472. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  473. * @txrx_soc: DP SOC handle
  474. *
  475. * Return: void
  476. */
  477. static void dp_soc_interrupt_detach(void *txrx_soc)
  478. {
  479. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  480. int i;
  481. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  482. soc->intr_ctx[i].tx_ring_mask = 0;
  483. soc->intr_ctx[i].rx_ring_mask = 0;
  484. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  485. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  486. }
  487. }
  488. #endif
  489. #define AVG_MAX_MPDUS_PER_TID 128
  490. #define AVG_TIDS_PER_CLIENT 2
  491. #define AVG_FLOWS_PER_TID 2
  492. #define AVG_MSDUS_PER_FLOW 128
  493. #define AVG_MSDUS_PER_MPDU 4
  494. /*
  495. * Allocate and setup link descriptor pool that will be used by HW for
  496. * various link and queue descriptors and managed by WBM
  497. */
  498. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  499. {
  500. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  501. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  502. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  503. uint32_t num_mpdus_per_link_desc =
  504. hal_num_mpdus_per_link_desc(soc->hal_soc);
  505. uint32_t num_msdus_per_link_desc =
  506. hal_num_msdus_per_link_desc(soc->hal_soc);
  507. uint32_t num_mpdu_links_per_queue_desc =
  508. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  509. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  510. uint32_t total_link_descs, total_mem_size;
  511. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  512. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  513. uint32_t num_link_desc_banks;
  514. uint32_t last_bank_size = 0;
  515. uint32_t entry_size, num_entries;
  516. int i;
  517. /* Only Tx queue descriptors are allocated from common link descriptor
  518. * pool Rx queue descriptors are not included in this because (REO queue
  519. * extension descriptors) they are expected to be allocated contiguously
  520. * with REO queue descriptors
  521. */
  522. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  523. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  524. num_mpdu_queue_descs = num_mpdu_link_descs /
  525. num_mpdu_links_per_queue_desc;
  526. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  527. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  528. num_msdus_per_link_desc;
  529. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  530. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  531. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  532. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  533. /* Round up to power of 2 */
  534. total_link_descs = 1;
  535. while (total_link_descs < num_entries)
  536. total_link_descs <<= 1;
  537. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  538. FL("total_link_descs: %u, link_desc_size: %d"),
  539. total_link_descs, link_desc_size);
  540. total_mem_size = total_link_descs * link_desc_size;
  541. total_mem_size += link_desc_align;
  542. if (total_mem_size <= max_alloc_size) {
  543. num_link_desc_banks = 0;
  544. last_bank_size = total_mem_size;
  545. } else {
  546. num_link_desc_banks = (total_mem_size) /
  547. (max_alloc_size - link_desc_align);
  548. last_bank_size = total_mem_size %
  549. (max_alloc_size - link_desc_align);
  550. }
  551. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  552. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  553. total_mem_size, num_link_desc_banks);
  554. for (i = 0; i < num_link_desc_banks; i++) {
  555. soc->link_desc_banks[i].base_vaddr_unaligned =
  556. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  557. max_alloc_size,
  558. &(soc->link_desc_banks[i].base_paddr_unaligned));
  559. soc->link_desc_banks[i].size = max_alloc_size;
  560. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  561. soc->link_desc_banks[i].base_vaddr_unaligned) +
  562. ((unsigned long)(
  563. soc->link_desc_banks[i].base_vaddr_unaligned) %
  564. link_desc_align));
  565. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  566. soc->link_desc_banks[i].base_paddr_unaligned) +
  567. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  568. (unsigned long)(
  569. soc->link_desc_banks[i].base_vaddr_unaligned));
  570. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  571. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  572. FL("Link descriptor memory alloc failed"));
  573. goto fail;
  574. }
  575. }
  576. if (last_bank_size) {
  577. /* Allocate last bank in case total memory required is not exact
  578. * multiple of max_alloc_size
  579. */
  580. soc->link_desc_banks[i].base_vaddr_unaligned =
  581. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  582. last_bank_size,
  583. &(soc->link_desc_banks[i].base_paddr_unaligned));
  584. soc->link_desc_banks[i].size = last_bank_size;
  585. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  586. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  587. ((unsigned long)(
  588. soc->link_desc_banks[i].base_vaddr_unaligned) %
  589. link_desc_align));
  590. soc->link_desc_banks[i].base_paddr =
  591. (unsigned long)(
  592. soc->link_desc_banks[i].base_paddr_unaligned) +
  593. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  594. (unsigned long)(
  595. soc->link_desc_banks[i].base_vaddr_unaligned));
  596. }
  597. /* Allocate and setup link descriptor idle list for HW internal use */
  598. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  599. total_mem_size = entry_size * total_link_descs;
  600. if (total_mem_size <= max_alloc_size) {
  601. void *desc;
  602. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  603. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  604. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  605. FL("Link desc idle ring setup failed"));
  606. goto fail;
  607. }
  608. hal_srng_access_start_unlocked(soc->hal_soc,
  609. soc->wbm_idle_link_ring.hal_srng);
  610. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  611. soc->link_desc_banks[i].base_paddr; i++) {
  612. uint32_t num_entries = (soc->link_desc_banks[i].size -
  613. ((unsigned long)(
  614. soc->link_desc_banks[i].base_vaddr) -
  615. (unsigned long)(
  616. soc->link_desc_banks[i].base_vaddr_unaligned)))
  617. / link_desc_size;
  618. unsigned long paddr = (unsigned long)(
  619. soc->link_desc_banks[i].base_paddr);
  620. while (num_entries && (desc = hal_srng_src_get_next(
  621. soc->hal_soc,
  622. soc->wbm_idle_link_ring.hal_srng))) {
  623. hal_set_link_desc_addr(desc, i, paddr);
  624. num_entries--;
  625. paddr += link_desc_size;
  626. }
  627. }
  628. hal_srng_access_end_unlocked(soc->hal_soc,
  629. soc->wbm_idle_link_ring.hal_srng);
  630. } else {
  631. uint32_t num_scatter_bufs;
  632. uint32_t num_entries_per_buf;
  633. uint32_t rem_entries;
  634. uint8_t *scatter_buf_ptr;
  635. uint16_t scatter_buf_num;
  636. soc->wbm_idle_scatter_buf_size =
  637. hal_idle_list_scatter_buf_size(soc->hal_soc);
  638. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  639. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  640. num_scatter_bufs = (total_mem_size /
  641. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  642. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  643. for (i = 0; i < num_scatter_bufs; i++) {
  644. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  645. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  646. soc->wbm_idle_scatter_buf_size,
  647. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  648. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  649. QDF_TRACE(QDF_MODULE_ID_DP,
  650. QDF_TRACE_LEVEL_ERROR,
  651. FL("Scatter list memory alloc failed"));
  652. goto fail;
  653. }
  654. }
  655. /* Populate idle list scatter buffers with link descriptor
  656. * pointers
  657. */
  658. scatter_buf_num = 0;
  659. scatter_buf_ptr = (uint8_t *)(
  660. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  661. rem_entries = num_entries_per_buf;
  662. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  663. soc->link_desc_banks[i].base_paddr; i++) {
  664. uint32_t num_link_descs =
  665. (soc->link_desc_banks[i].size -
  666. ((unsigned long)(
  667. soc->link_desc_banks[i].base_vaddr) -
  668. (unsigned long)(
  669. soc->link_desc_banks[i].base_vaddr_unaligned)))
  670. / link_desc_size;
  671. unsigned long paddr = (unsigned long)(
  672. soc->link_desc_banks[i].base_paddr);
  673. void *desc = NULL;
  674. while (num_link_descs && (desc =
  675. hal_srng_src_get_next(soc->hal_soc,
  676. soc->wbm_idle_link_ring.hal_srng))) {
  677. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  678. i, paddr);
  679. num_link_descs--;
  680. paddr += link_desc_size;
  681. if (rem_entries) {
  682. rem_entries--;
  683. scatter_buf_ptr += link_desc_size;
  684. } else {
  685. rem_entries = num_entries_per_buf;
  686. scatter_buf_num++;
  687. scatter_buf_ptr = (uint8_t *)(
  688. soc->wbm_idle_scatter_buf_base_vaddr[
  689. scatter_buf_num]);
  690. }
  691. }
  692. }
  693. /* Setup link descriptor idle list in HW */
  694. hal_setup_link_idle_list(soc->hal_soc,
  695. soc->wbm_idle_scatter_buf_base_paddr,
  696. soc->wbm_idle_scatter_buf_base_vaddr,
  697. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  698. (uint32_t)(scatter_buf_ptr -
  699. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  700. scatter_buf_num])));
  701. }
  702. return 0;
  703. fail:
  704. if (soc->wbm_idle_link_ring.hal_srng) {
  705. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  706. WBM_IDLE_LINK, 0);
  707. }
  708. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  709. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  710. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  711. soc->wbm_idle_scatter_buf_size,
  712. soc->wbm_idle_scatter_buf_base_vaddr[i],
  713. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  714. }
  715. }
  716. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  717. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  718. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  719. soc->link_desc_banks[i].size,
  720. soc->link_desc_banks[i].base_vaddr_unaligned,
  721. soc->link_desc_banks[i].base_paddr_unaligned,
  722. 0);
  723. }
  724. }
  725. return QDF_STATUS_E_FAILURE;
  726. }
  727. #ifdef notused
  728. /*
  729. * Free link descriptor pool that was setup HW
  730. */
  731. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  732. {
  733. int i;
  734. if (soc->wbm_idle_link_ring.hal_srng) {
  735. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  736. WBM_IDLE_LINK, 0);
  737. }
  738. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  739. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  740. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  741. soc->wbm_idle_scatter_buf_size,
  742. soc->wbm_idle_scatter_buf_base_vaddr[i],
  743. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  744. }
  745. }
  746. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  747. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  748. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  749. soc->link_desc_banks[i].size,
  750. soc->link_desc_banks[i].base_vaddr_unaligned,
  751. soc->link_desc_banks[i].base_paddr_unaligned,
  752. 0);
  753. }
  754. }
  755. }
  756. #endif /* notused */
  757. /* TODO: Following should be configurable */
  758. #define WBM_RELEASE_RING_SIZE 64
  759. #define TCL_CMD_RING_SIZE 32
  760. #define TCL_STATUS_RING_SIZE 32
  761. #define REO_DST_RING_SIZE 2048
  762. #define REO_REINJECT_RING_SIZE 32
  763. #define RX_RELEASE_RING_SIZE 1024
  764. #define REO_EXCEPTION_RING_SIZE 128
  765. #define REO_CMD_RING_SIZE 32
  766. #define REO_STATUS_RING_SIZE 32
  767. #define RXDMA_BUF_RING_SIZE 1024
  768. #define RXDMA_REFILL_RING_SIZE 2048
  769. #define RXDMA_MONITOR_BUF_RING_SIZE 1024
  770. #define RXDMA_MONITOR_DST_RING_SIZE 1024
  771. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  772. #define RXDMA_MONITOR_DESC_RING_SIZE 1024
  773. #define RXDMA_ERR_DST_RING_SIZE 1024
  774. /*
  775. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  776. * @soc: Datapath SOC handle
  777. *
  778. * This is a timer function used to age out stale WDS nodes from
  779. * AST table
  780. */
  781. #ifdef FEATURE_WDS
  782. static void dp_wds_aging_timer_fn(void *soc_hdl)
  783. {
  784. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  785. struct dp_pdev *pdev;
  786. struct dp_vdev *vdev;
  787. struct dp_peer *peer;
  788. struct dp_ast_entry *ase;
  789. int i;
  790. qdf_spin_lock_bh(&soc->ast_lock);
  791. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  792. pdev = soc->pdev_list[i];
  793. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  794. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  795. DP_PEER_ITERATE_ASE_LIST(peer, ase) {
  796. /*
  797. * Do not expire static ast entries
  798. */
  799. if (ase->is_static)
  800. continue;
  801. if (ase->is_active) {
  802. ase->is_active = FALSE;
  803. continue;
  804. }
  805. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  806. pdev->osif_pdev,
  807. ase->mac_addr.raw);
  808. dp_peer_del_ast(soc, ase);
  809. }
  810. }
  811. }
  812. }
  813. qdf_spin_unlock_bh(&soc->ast_lock);
  814. if (qdf_atomic_read(&soc->cmn_init_done))
  815. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  816. }
  817. /*
  818. * dp_soc_wds_attach() - Setup WDS timer and AST table
  819. * @soc: Datapath SOC handle
  820. *
  821. * Return: None
  822. */
  823. static void dp_soc_wds_attach(struct dp_soc *soc)
  824. {
  825. qdf_spinlock_create(&soc->ast_lock);
  826. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  827. dp_wds_aging_timer_fn, (void *)soc,
  828. QDF_TIMER_TYPE_WAKE_APPS);
  829. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  830. }
  831. /*
  832. * dp_soc_wds_detach() - Detach WDS data structures and timers
  833. * @txrx_soc: DP SOC handle
  834. *
  835. * Return: None
  836. */
  837. static void dp_soc_wds_detach(struct dp_soc *soc)
  838. {
  839. qdf_timer_stop(&soc->wds_aging_timer);
  840. qdf_timer_free(&soc->wds_aging_timer);
  841. qdf_spinlock_destroy(&soc->ast_lock);
  842. }
  843. #else
  844. static void dp_soc_wds_attach(struct dp_soc *soc)
  845. {
  846. }
  847. static void dp_soc_wds_detach(struct dp_soc *soc)
  848. {
  849. }
  850. #endif
  851. /*
  852. * dp_soc_cmn_setup() - Common SoC level initializion
  853. * @soc: Datapath SOC handle
  854. *
  855. * This is an internal function used to setup common SOC data structures,
  856. * to be called from PDEV attach after receiving HW mode capabilities from FW
  857. */
  858. static int dp_soc_cmn_setup(struct dp_soc *soc)
  859. {
  860. int i;
  861. struct hal_reo_params reo_params;
  862. int tx_ring_size;
  863. int tx_comp_ring_size;
  864. if (qdf_atomic_read(&soc->cmn_init_done))
  865. return 0;
  866. if (dp_peer_find_attach(soc))
  867. goto fail0;
  868. if (dp_hw_link_desc_pool_setup(soc))
  869. goto fail1;
  870. /* Setup SRNG rings */
  871. /* Common rings */
  872. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  873. WBM_RELEASE_RING_SIZE)) {
  874. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  875. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  876. goto fail1;
  877. }
  878. soc->num_tcl_data_rings = 0;
  879. /* Tx data rings */
  880. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  881. soc->num_tcl_data_rings =
  882. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  883. tx_comp_ring_size =
  884. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  885. tx_ring_size =
  886. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  887. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  888. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  889. TCL_DATA, i, 0, tx_ring_size)) {
  890. QDF_TRACE(QDF_MODULE_ID_DP,
  891. QDF_TRACE_LEVEL_ERROR,
  892. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  893. goto fail1;
  894. }
  895. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  896. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  897. QDF_TRACE(QDF_MODULE_ID_DP,
  898. QDF_TRACE_LEVEL_ERROR,
  899. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  900. goto fail1;
  901. }
  902. }
  903. } else {
  904. /* This will be incremented during per pdev ring setup */
  905. soc->num_tcl_data_rings = 0;
  906. }
  907. if (dp_tx_soc_attach(soc)) {
  908. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  909. FL("dp_tx_soc_attach failed"));
  910. goto fail1;
  911. }
  912. /* TCL command and status rings */
  913. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  914. TCL_CMD_RING_SIZE)) {
  915. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  916. FL("dp_srng_setup failed for tcl_cmd_ring"));
  917. goto fail1;
  918. }
  919. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  920. TCL_STATUS_RING_SIZE)) {
  921. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  922. FL("dp_srng_setup failed for tcl_status_ring"));
  923. goto fail1;
  924. }
  925. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  926. * descriptors
  927. */
  928. /* Rx data rings */
  929. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  930. soc->num_reo_dest_rings =
  931. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  932. QDF_TRACE(QDF_MODULE_ID_DP,
  933. QDF_TRACE_LEVEL_ERROR,
  934. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  935. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  936. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  937. i, 0, REO_DST_RING_SIZE)) {
  938. QDF_TRACE(QDF_MODULE_ID_DP,
  939. QDF_TRACE_LEVEL_ERROR,
  940. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  941. goto fail1;
  942. }
  943. }
  944. } else {
  945. /* This will be incremented during per pdev ring setup */
  946. soc->num_reo_dest_rings = 0;
  947. }
  948. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  949. /* REO reinjection ring */
  950. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  951. REO_REINJECT_RING_SIZE)) {
  952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  953. FL("dp_srng_setup failed for reo_reinject_ring"));
  954. goto fail1;
  955. }
  956. /* Rx release ring */
  957. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  958. RX_RELEASE_RING_SIZE)) {
  959. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  960. FL("dp_srng_setup failed for rx_rel_ring"));
  961. goto fail1;
  962. }
  963. /* Rx exception ring */
  964. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  965. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  966. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  967. FL("dp_srng_setup failed for reo_exception_ring"));
  968. goto fail1;
  969. }
  970. /* REO command and status rings */
  971. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  972. REO_CMD_RING_SIZE)) {
  973. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  974. FL("dp_srng_setup failed for reo_cmd_ring"));
  975. goto fail1;
  976. }
  977. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  978. TAILQ_INIT(&soc->rx.reo_cmd_list);
  979. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  980. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  981. REO_STATUS_RING_SIZE)) {
  982. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  983. FL("dp_srng_setup failed for reo_status_ring"));
  984. goto fail1;
  985. }
  986. dp_soc_wds_attach(soc);
  987. /* Setup HW REO */
  988. qdf_mem_zero(&reo_params, sizeof(reo_params));
  989. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  990. reo_params.rx_hash_enabled = true;
  991. hal_reo_setup(soc->hal_soc, &reo_params);
  992. qdf_atomic_set(&soc->cmn_init_done, 1);
  993. qdf_nbuf_queue_init(&soc->htt_stats_msg);
  994. return 0;
  995. fail1:
  996. /*
  997. * Cleanup will be done as part of soc_detach, which will
  998. * be called on pdev attach failure
  999. */
  1000. fail0:
  1001. return QDF_STATUS_E_FAILURE;
  1002. }
  1003. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1004. static void dp_lro_hash_setup(struct dp_soc *soc)
  1005. {
  1006. struct cdp_lro_hash_config lro_hash;
  1007. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1008. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1009. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1010. FL("LRO disabled RX hash disabled"));
  1011. return;
  1012. }
  1013. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1014. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1015. lro_hash.lro_enable = 1;
  1016. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1017. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1018. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1019. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1020. }
  1021. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  1022. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1023. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1024. LRO_IPV4_SEED_ARR_SZ));
  1025. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1026. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1027. LRO_IPV6_SEED_ARR_SZ));
  1028. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1029. "lro_hash: lro_enable: 0x%x"
  1030. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  1031. lro_hash.lro_enable, lro_hash.tcp_flag,
  1032. lro_hash.tcp_flag_mask);
  1033. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1034. FL("lro_hash: toeplitz_hash_ipv4:"));
  1035. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1036. QDF_TRACE_LEVEL_ERROR,
  1037. (void *)lro_hash.toeplitz_hash_ipv4,
  1038. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1039. LRO_IPV4_SEED_ARR_SZ));
  1040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1041. FL("lro_hash: toeplitz_hash_ipv6:"));
  1042. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1043. QDF_TRACE_LEVEL_ERROR,
  1044. (void *)lro_hash.toeplitz_hash_ipv6,
  1045. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1046. LRO_IPV6_SEED_ARR_SZ));
  1047. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1048. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1049. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1050. (soc->osif_soc, &lro_hash);
  1051. }
  1052. /*
  1053. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1054. * @soc: data path SoC handle
  1055. * @pdev: Physical device handle
  1056. *
  1057. * Return: 0 - success, > 0 - failure
  1058. */
  1059. #ifdef QCA_HOST2FW_RXBUF_RING
  1060. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1061. struct dp_pdev *pdev)
  1062. {
  1063. int max_mac_rings =
  1064. wlan_cfg_get_num_mac_rings
  1065. (pdev->wlan_cfg_ctx);
  1066. int i;
  1067. for (i = 0; i < max_mac_rings; i++) {
  1068. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1069. "%s: pdev_id %d mac_id %d\n",
  1070. __func__, pdev->pdev_id, i);
  1071. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1072. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1073. QDF_TRACE(QDF_MODULE_ID_DP,
  1074. QDF_TRACE_LEVEL_ERROR,
  1075. FL("failed rx mac ring setup"));
  1076. return QDF_STATUS_E_FAILURE;
  1077. }
  1078. }
  1079. return QDF_STATUS_SUCCESS;
  1080. }
  1081. #else
  1082. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1083. struct dp_pdev *pdev)
  1084. {
  1085. return QDF_STATUS_SUCCESS;
  1086. }
  1087. #endif
  1088. /**
  1089. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1090. * @pdev - DP_PDEV handle
  1091. *
  1092. * Return: void
  1093. */
  1094. static inline void
  1095. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1096. {
  1097. uint8_t map_id;
  1098. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1099. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1100. sizeof(default_dscp_tid_map));
  1101. }
  1102. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1103. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1104. pdev->dscp_tid_map[map_id],
  1105. map_id);
  1106. }
  1107. }
  1108. /*
  1109. * dp_pdev_attach_wifi3() - attach txrx pdev
  1110. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  1111. * @txrx_soc: Datapath SOC handle
  1112. * @htc_handle: HTC handle for host-target interface
  1113. * @qdf_osdev: QDF OS device
  1114. * @pdev_id: PDEV ID
  1115. *
  1116. * Return: DP PDEV handle on success, NULL on failure
  1117. */
  1118. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  1119. struct cdp_cfg *ctrl_pdev,
  1120. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  1121. {
  1122. int tx_ring_size;
  1123. int tx_comp_ring_size;
  1124. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1125. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  1126. if (!pdev) {
  1127. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1128. FL("DP PDEV memory allocation failed"));
  1129. goto fail0;
  1130. }
  1131. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  1132. if (!pdev->wlan_cfg_ctx) {
  1133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1134. FL("pdev cfg_attach failed"));
  1135. qdf_mem_free(pdev);
  1136. goto fail0;
  1137. }
  1138. /*
  1139. * set nss pdev config based on soc config
  1140. */
  1141. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  1142. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev->pdev_id)));
  1143. pdev->soc = soc;
  1144. pdev->osif_pdev = ctrl_pdev;
  1145. pdev->pdev_id = pdev_id;
  1146. soc->pdev_list[pdev_id] = pdev;
  1147. soc->pdev_count++;
  1148. TAILQ_INIT(&pdev->vdev_list);
  1149. pdev->vdev_count = 0;
  1150. qdf_spinlock_create(&pdev->tx_mutex);
  1151. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  1152. TAILQ_INIT(&pdev->neighbour_peers_list);
  1153. if (dp_soc_cmn_setup(soc)) {
  1154. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1155. FL("dp_soc_cmn_setup failed"));
  1156. goto fail1;
  1157. }
  1158. /* Setup per PDEV TCL rings if configured */
  1159. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1160. tx_ring_size =
  1161. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1162. tx_comp_ring_size =
  1163. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1164. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  1165. pdev_id, pdev_id, tx_ring_size)) {
  1166. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1167. FL("dp_srng_setup failed for tcl_data_ring"));
  1168. goto fail1;
  1169. }
  1170. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  1171. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  1172. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1173. FL("dp_srng_setup failed for tx_comp_ring"));
  1174. goto fail1;
  1175. }
  1176. soc->num_tcl_data_rings++;
  1177. }
  1178. /* Tx specific init */
  1179. if (dp_tx_pdev_attach(pdev)) {
  1180. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1181. FL("dp_tx_pdev_attach failed"));
  1182. goto fail1;
  1183. }
  1184. /* Setup per PDEV REO rings if configured */
  1185. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1186. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  1187. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  1188. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1189. FL("dp_srng_setup failed for reo_dest_ringn"));
  1190. goto fail1;
  1191. }
  1192. soc->num_reo_dest_rings++;
  1193. }
  1194. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  1195. RXDMA_REFILL_RING_SIZE)) {
  1196. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1197. FL("dp_srng_setup failed rx refill ring"));
  1198. goto fail1;
  1199. }
  1200. if (dp_rxdma_ring_setup(soc, pdev)) {
  1201. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1202. FL("RXDMA ring config failed"));
  1203. goto fail1;
  1204. }
  1205. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  1206. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  1207. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1208. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  1209. goto fail1;
  1210. }
  1211. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  1212. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  1213. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1214. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1215. goto fail1;
  1216. }
  1217. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  1218. RXDMA_MONITOR_STATUS, 0, pdev_id,
  1219. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  1220. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1221. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  1222. goto fail1;
  1223. }
  1224. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  1225. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  1226. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1227. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  1228. goto fail1;
  1229. }
  1230. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring, RXDMA_DST, 0,
  1231. pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  1232. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1233. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  1234. goto fail1;
  1235. }
  1236. /* Rx specific init */
  1237. if (dp_rx_pdev_attach(pdev)) {
  1238. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1239. FL("dp_rx_pdev_attach failed "));
  1240. goto fail0;
  1241. }
  1242. DP_STATS_INIT(pdev);
  1243. #ifndef CONFIG_WIN
  1244. /* MCL */
  1245. dp_local_peer_id_pool_init(pdev);
  1246. #endif
  1247. dp_dscp_tid_map_setup(pdev);
  1248. /* Rx monitor mode specific init */
  1249. if (dp_rx_pdev_mon_attach(pdev)) {
  1250. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1251. "dp_rx_pdev_attach failed\n");
  1252. goto fail1;
  1253. }
  1254. if (dp_wdi_event_attach(pdev)) {
  1255. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1256. "dp_wdi_evet_attach failed\n");
  1257. goto fail1;
  1258. }
  1259. /* set the reo destination during initialization */
  1260. pdev->reo_dest = pdev->pdev_id + 1;
  1261. return (struct cdp_pdev *)pdev;
  1262. fail1:
  1263. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  1264. fail0:
  1265. return NULL;
  1266. }
  1267. /*
  1268. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  1269. * @soc: data path SoC handle
  1270. * @pdev: Physical device handle
  1271. *
  1272. * Return: void
  1273. */
  1274. #ifdef QCA_HOST2FW_RXBUF_RING
  1275. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1276. struct dp_pdev *pdev)
  1277. {
  1278. int max_mac_rings =
  1279. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  1280. int i;
  1281. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  1282. max_mac_rings : MAX_RX_MAC_RINGS;
  1283. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  1284. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  1285. RXDMA_BUF, 1);
  1286. }
  1287. #else
  1288. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  1289. struct dp_pdev *pdev)
  1290. {
  1291. }
  1292. #endif
  1293. /*
  1294. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  1295. * @pdev: device object
  1296. *
  1297. * Return: void
  1298. */
  1299. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  1300. {
  1301. struct dp_neighbour_peer *peer = NULL;
  1302. struct dp_neighbour_peer *temp_peer = NULL;
  1303. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  1304. neighbour_peer_list_elem, temp_peer) {
  1305. /* delete this peer from the list */
  1306. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1307. peer, neighbour_peer_list_elem);
  1308. qdf_mem_free(peer);
  1309. }
  1310. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  1311. }
  1312. /*
  1313. * dp_pdev_detach_wifi3() - detach txrx pdev
  1314. * @txrx_pdev: Datapath PDEV handle
  1315. * @force: Force detach
  1316. *
  1317. */
  1318. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1319. {
  1320. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1321. struct dp_soc *soc = pdev->soc;
  1322. dp_wdi_event_detach(pdev);
  1323. dp_tx_pdev_detach(pdev);
  1324. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1325. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1326. TCL_DATA, pdev->pdev_id);
  1327. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1328. WBM2SW_RELEASE, pdev->pdev_id);
  1329. }
  1330. dp_rx_pdev_detach(pdev);
  1331. dp_rx_pdev_mon_detach(pdev);
  1332. dp_neighbour_peers_detach(pdev);
  1333. qdf_spinlock_destroy(&pdev->tx_mutex);
  1334. /* Setup per PDEV REO rings if configured */
  1335. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1336. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1337. REO_DST, pdev->pdev_id);
  1338. }
  1339. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1340. dp_rxdma_ring_cleanup(soc, pdev);
  1341. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1342. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1343. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1344. RXDMA_MONITOR_STATUS, 0);
  1345. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  1346. RXDMA_MONITOR_DESC, 0);
  1347. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring, RXDMA_DST, 0);
  1348. soc->pdev_list[pdev->pdev_id] = NULL;
  1349. soc->pdev_count--;
  1350. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  1351. qdf_mem_free(pdev);
  1352. }
  1353. /*
  1354. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1355. * @soc: DP SOC handle
  1356. */
  1357. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1358. {
  1359. struct reo_desc_list_node *desc;
  1360. struct dp_rx_tid *rx_tid;
  1361. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1362. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1363. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1364. rx_tid = &desc->rx_tid;
  1365. qdf_mem_unmap_nbytes_single(soc->osdev,
  1366. rx_tid->hw_qdesc_paddr,
  1367. QDF_DMA_BIDIRECTIONAL,
  1368. rx_tid->hw_qdesc_alloc_size);
  1369. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  1370. qdf_mem_free(desc);
  1371. }
  1372. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1373. qdf_list_destroy(&soc->reo_desc_freelist);
  1374. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1375. }
  1376. /*
  1377. * dp_soc_detach_wifi3() - Detach txrx SOC
  1378. * @txrx_soc: DP SOC handle
  1379. *
  1380. */
  1381. static void dp_soc_detach_wifi3(void *txrx_soc)
  1382. {
  1383. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1384. int i;
  1385. qdf_atomic_set(&soc->cmn_init_done, 0);
  1386. qdf_flush_work(0, &soc->htt_stats_work);
  1387. qdf_disable_work(0, &soc->htt_stats_work);
  1388. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1389. if (soc->pdev_list[i])
  1390. dp_pdev_detach_wifi3(
  1391. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1392. }
  1393. dp_peer_find_detach(soc);
  1394. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1395. * SW descriptors
  1396. */
  1397. /* Free the ring memories */
  1398. /* Common rings */
  1399. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1400. dp_tx_soc_detach(soc);
  1401. /* Tx data rings */
  1402. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1403. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1404. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1405. TCL_DATA, i);
  1406. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1407. WBM2SW_RELEASE, i);
  1408. }
  1409. }
  1410. /* TCL command and status rings */
  1411. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1412. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1413. /* Rx data rings */
  1414. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1415. soc->num_reo_dest_rings =
  1416. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1417. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1418. /* TODO: Get number of rings and ring sizes
  1419. * from wlan_cfg
  1420. */
  1421. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1422. REO_DST, i);
  1423. }
  1424. }
  1425. /* REO reinjection ring */
  1426. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1427. /* Rx release ring */
  1428. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1429. /* Rx exception ring */
  1430. /* TODO: Better to store ring_type and ring_num in
  1431. * dp_srng during setup
  1432. */
  1433. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1434. /* REO command and status rings */
  1435. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1436. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1437. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1438. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1439. htt_soc_detach(soc->htt_handle);
  1440. dp_reo_desc_freelist_destroy(soc);
  1441. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  1442. dp_soc_wds_detach(soc);
  1443. qdf_mem_free(soc);
  1444. }
  1445. /*
  1446. * dp_rxdma_ring_config() - configure the RX DMA rings
  1447. *
  1448. * This function is used to configure the MAC rings.
  1449. * On MCL host provides buffers in Host2FW ring
  1450. * FW refills (copies) buffers to the ring and updates
  1451. * ring_idx in register
  1452. *
  1453. * @soc: data path SoC handle
  1454. * @pdev: Physical device handle
  1455. *
  1456. * Return: void
  1457. */
  1458. #ifdef QCA_HOST2FW_RXBUF_RING
  1459. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1460. {
  1461. int i;
  1462. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1463. struct dp_pdev *pdev = soc->pdev_list[i];
  1464. if (pdev) {
  1465. int mac_id = 0;
  1466. int j;
  1467. bool dbs_enable = 0;
  1468. int max_mac_rings =
  1469. wlan_cfg_get_num_mac_rings
  1470. (pdev->wlan_cfg_ctx);
  1471. htt_srng_setup(soc->htt_handle, 0,
  1472. pdev->rx_refill_buf_ring.hal_srng,
  1473. RXDMA_BUF);
  1474. if (soc->cdp_soc.ol_ops->
  1475. is_hw_dbs_2x2_capable) {
  1476. dbs_enable = soc->cdp_soc.ol_ops->
  1477. is_hw_dbs_2x2_capable(soc->psoc);
  1478. }
  1479. if (dbs_enable) {
  1480. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1481. QDF_TRACE_LEVEL_ERROR,
  1482. FL("DBS enabled max_mac_rings %d\n"),
  1483. max_mac_rings);
  1484. } else {
  1485. max_mac_rings = 1;
  1486. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1487. QDF_TRACE_LEVEL_ERROR,
  1488. FL("DBS disabled, max_mac_rings %d\n"),
  1489. max_mac_rings);
  1490. }
  1491. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1492. FL("pdev_id %d max_mac_rings %d\n"),
  1493. pdev->pdev_id, max_mac_rings);
  1494. for (j = 0; j < max_mac_rings; j++) {
  1495. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1496. QDF_TRACE_LEVEL_ERROR,
  1497. FL("mac_id %d\n"), mac_id);
  1498. htt_srng_setup(soc->htt_handle, mac_id,
  1499. pdev->rx_mac_buf_ring[j]
  1500. .hal_srng,
  1501. RXDMA_BUF);
  1502. mac_id++;
  1503. }
  1504. /* Configure monitor mode rings */
  1505. htt_srng_setup(soc->htt_handle, i,
  1506. pdev->rxdma_mon_buf_ring.hal_srng,
  1507. RXDMA_MONITOR_BUF);
  1508. htt_srng_setup(soc->htt_handle, i,
  1509. pdev->rxdma_mon_dst_ring.hal_srng,
  1510. RXDMA_MONITOR_DST);
  1511. htt_srng_setup(soc->htt_handle, i,
  1512. pdev->rxdma_mon_status_ring.hal_srng,
  1513. RXDMA_MONITOR_STATUS);
  1514. htt_srng_setup(soc->htt_handle, i,
  1515. pdev->rxdma_mon_desc_ring.hal_srng,
  1516. RXDMA_MONITOR_DESC);
  1517. htt_srng_setup(soc->htt_handle, i,
  1518. pdev->rxdma_err_dst_ring.hal_srng,
  1519. RXDMA_DST);
  1520. }
  1521. }
  1522. }
  1523. #else
  1524. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1525. {
  1526. int i;
  1527. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1528. struct dp_pdev *pdev = soc->pdev_list[i];
  1529. if (pdev) {
  1530. htt_srng_setup(soc->htt_handle, i,
  1531. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1532. htt_srng_setup(soc->htt_handle, i,
  1533. pdev->rxdma_mon_buf_ring.hal_srng,
  1534. RXDMA_MONITOR_BUF);
  1535. htt_srng_setup(soc->htt_handle, i,
  1536. pdev->rxdma_mon_dst_ring.hal_srng,
  1537. RXDMA_MONITOR_DST);
  1538. htt_srng_setup(soc->htt_handle, i,
  1539. pdev->rxdma_mon_status_ring.hal_srng,
  1540. RXDMA_MONITOR_STATUS);
  1541. htt_srng_setup(soc->htt_handle, i,
  1542. pdev->rxdma_mon_desc_ring.hal_srng,
  1543. RXDMA_MONITOR_DESC);
  1544. htt_srng_setup(soc->htt_handle, i,
  1545. pdev->rxdma_err_dst_ring.hal_srng,
  1546. RXDMA_DST);
  1547. }
  1548. }
  1549. }
  1550. #endif
  1551. /*
  1552. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1553. * @txrx_soc: Datapath SOC handle
  1554. */
  1555. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1556. {
  1557. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1558. htt_soc_attach_target(soc->htt_handle);
  1559. dp_rxdma_ring_config(soc);
  1560. DP_STATS_INIT(soc);
  1561. /* initialize work queue for stats processing */
  1562. qdf_create_work(0, &soc->htt_stats_work, htt_t2h_stats_handler, soc);
  1563. return 0;
  1564. }
  1565. /*
  1566. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  1567. * @txrx_soc: Datapath SOC handle
  1568. */
  1569. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  1570. {
  1571. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1572. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  1573. }
  1574. /*
  1575. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  1576. * @txrx_soc: Datapath SOC handle
  1577. * @nss_cfg: nss config
  1578. */
  1579. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  1580. {
  1581. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  1582. wlan_cfg_set_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx, config);
  1583. if (config) {
  1584. /*
  1585. * disable dp interrupt if nss enabled
  1586. */
  1587. wlan_cfg_set_num_contexts(dsoc->wlan_cfg_ctx, 0);
  1588. }
  1589. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1590. FL("nss-wifi<0> nss config is enabled"));
  1591. }
  1592. /*
  1593. * dp_vdev_attach_wifi3() - attach txrx vdev
  1594. * @txrx_pdev: Datapath PDEV handle
  1595. * @vdev_mac_addr: MAC address of the virtual interface
  1596. * @vdev_id: VDEV Id
  1597. * @wlan_op_mode: VDEV operating mode
  1598. *
  1599. * Return: DP VDEV handle on success, NULL on failure
  1600. */
  1601. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1602. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1603. {
  1604. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1605. struct dp_soc *soc = pdev->soc;
  1606. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1607. if (!vdev) {
  1608. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1609. FL("DP VDEV memory allocation failed"));
  1610. goto fail0;
  1611. }
  1612. vdev->pdev = pdev;
  1613. vdev->vdev_id = vdev_id;
  1614. vdev->opmode = op_mode;
  1615. vdev->osdev = soc->osdev;
  1616. vdev->osif_rx = NULL;
  1617. vdev->osif_rsim_rx_decap = NULL;
  1618. vdev->osif_rx_mon = NULL;
  1619. vdev->osif_tx_free_ext = NULL;
  1620. vdev->osif_vdev = NULL;
  1621. vdev->delete.pending = 0;
  1622. vdev->safemode = 0;
  1623. vdev->drop_unenc = 1;
  1624. #ifdef notyet
  1625. vdev->filters_num = 0;
  1626. #endif
  1627. qdf_mem_copy(
  1628. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1629. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1630. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1631. vdev->dscp_tid_map_id = 0;
  1632. vdev->mcast_enhancement_en = 0;
  1633. /* TODO: Initialize default HTT meta data that will be used in
  1634. * TCL descriptors for packets transmitted from this VDEV
  1635. */
  1636. TAILQ_INIT(&vdev->peer_list);
  1637. /* add this vdev into the pdev's list */
  1638. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1639. pdev->vdev_count++;
  1640. dp_tx_vdev_attach(vdev);
  1641. #ifdef DP_INTR_POLL_BASED
  1642. if (wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  1643. if (pdev->vdev_count == 1)
  1644. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1645. }
  1646. #endif
  1647. dp_lro_hash_setup(soc);
  1648. /* LRO */
  1649. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1650. wlan_op_mode_sta == vdev->opmode)
  1651. vdev->lro_enable = true;
  1652. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1653. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  1654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1655. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1656. DP_STATS_INIT(vdev);
  1657. return (struct cdp_vdev *)vdev;
  1658. fail0:
  1659. return NULL;
  1660. }
  1661. /**
  1662. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1663. * @vdev: Datapath VDEV handle
  1664. * @osif_vdev: OSIF vdev handle
  1665. * @txrx_ops: Tx and Rx operations
  1666. *
  1667. * Return: DP VDEV handle on success, NULL on failure
  1668. */
  1669. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1670. void *osif_vdev,
  1671. struct ol_txrx_ops *txrx_ops)
  1672. {
  1673. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1674. vdev->osif_vdev = osif_vdev;
  1675. vdev->osif_rx = txrx_ops->rx.rx;
  1676. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1677. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1678. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1679. #ifdef notyet
  1680. #if ATH_SUPPORT_WAPI
  1681. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1682. #endif
  1683. #endif
  1684. #ifdef UMAC_SUPPORT_PROXY_ARP
  1685. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1686. #endif
  1687. vdev->me_convert = txrx_ops->me_convert;
  1688. /* TODO: Enable the following once Tx code is integrated */
  1689. txrx_ops->tx.tx = dp_tx_send;
  1690. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1691. "DP Vdev Register success");
  1692. }
  1693. /*
  1694. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1695. * @txrx_vdev: Datapath VDEV handle
  1696. * @callback: Callback OL_IF on completion of detach
  1697. * @cb_context: Callback context
  1698. *
  1699. */
  1700. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1701. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1702. {
  1703. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1704. struct dp_pdev *pdev = vdev->pdev;
  1705. struct dp_soc *soc = pdev->soc;
  1706. /* preconditions */
  1707. qdf_assert(vdev);
  1708. /* remove the vdev from its parent pdev's list */
  1709. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1710. /*
  1711. * Use peer_ref_mutex while accessing peer_list, in case
  1712. * a peer is in the process of being removed from the list.
  1713. */
  1714. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1715. /* check that the vdev has no peers allocated */
  1716. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1717. /* debug print - will be removed later */
  1718. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1719. FL("not deleting vdev object %p (%pM)"
  1720. "until deletion finishes for all its peers"),
  1721. vdev, vdev->mac_addr.raw);
  1722. /* indicate that the vdev needs to be deleted */
  1723. vdev->delete.pending = 1;
  1724. vdev->delete.callback = callback;
  1725. vdev->delete.context = cb_context;
  1726. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1727. return;
  1728. }
  1729. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1730. dp_tx_vdev_detach(vdev);
  1731. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1732. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1733. qdf_mem_free(vdev);
  1734. if (callback)
  1735. callback(cb_context);
  1736. }
  1737. /*
  1738. * dp_peer_create_wifi3() - attach txrx peer
  1739. * @txrx_vdev: Datapath VDEV handle
  1740. * @peer_mac_addr: Peer MAC address
  1741. *
  1742. * Return: DP peeer handle on success, NULL on failure
  1743. */
  1744. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1745. uint8_t *peer_mac_addr)
  1746. {
  1747. struct dp_peer *peer;
  1748. int i;
  1749. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1750. struct dp_pdev *pdev;
  1751. struct dp_soc *soc;
  1752. /* preconditions */
  1753. qdf_assert(vdev);
  1754. qdf_assert(peer_mac_addr);
  1755. pdev = vdev->pdev;
  1756. soc = pdev->soc;
  1757. #ifdef notyet
  1758. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1759. soc->mempool_ol_ath_peer);
  1760. #else
  1761. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1762. #endif
  1763. if (!peer)
  1764. return NULL; /* failure */
  1765. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1766. TAILQ_INIT(&peer->ast_entry_list);
  1767. dp_peer_add_ast(soc, peer, peer_mac_addr, 1);
  1768. qdf_spinlock_create(&peer->peer_info_lock);
  1769. /* store provided params */
  1770. peer->vdev = vdev;
  1771. qdf_mem_copy(
  1772. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1773. /* TODO: See of rx_opt_proc is really required */
  1774. peer->rx_opt_proc = soc->rx_opt_proc;
  1775. /* initialize the peer_id */
  1776. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1777. peer->peer_ids[i] = HTT_INVALID_PEER;
  1778. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1779. qdf_atomic_init(&peer->ref_cnt);
  1780. /* keep one reference for attach */
  1781. qdf_atomic_inc(&peer->ref_cnt);
  1782. /* add this peer into the vdev's list */
  1783. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1784. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1785. /* TODO: See if hash based search is required */
  1786. dp_peer_find_hash_add(soc, peer);
  1787. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1788. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1789. vdev, peer, peer->mac_addr.raw,
  1790. qdf_atomic_read(&peer->ref_cnt));
  1791. /*
  1792. * For every peer MAp message search and set if bss_peer
  1793. */
  1794. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1796. "vdev bss_peer!!!!");
  1797. peer->bss_peer = 1;
  1798. vdev->vap_bss_peer = peer;
  1799. }
  1800. #ifndef CONFIG_WIN
  1801. dp_local_peer_id_alloc(pdev, peer);
  1802. #endif
  1803. DP_STATS_INIT(peer);
  1804. return (void *)peer;
  1805. }
  1806. /*
  1807. * dp_peer_setup_wifi3() - initialize the peer
  1808. * @vdev_hdl: virtual device object
  1809. * @peer: Peer object
  1810. *
  1811. * Return: void
  1812. */
  1813. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1814. {
  1815. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1816. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1817. struct dp_pdev *pdev;
  1818. struct dp_soc *soc;
  1819. bool hash_based = 0;
  1820. enum cdp_host_reo_dest_ring reo_dest;
  1821. /* preconditions */
  1822. qdf_assert(vdev);
  1823. qdf_assert(peer);
  1824. pdev = vdev->pdev;
  1825. soc = pdev->soc;
  1826. dp_peer_rx_init(pdev, peer);
  1827. peer->last_assoc_rcvd = 0;
  1828. peer->last_disassoc_rcvd = 0;
  1829. peer->last_deauth_rcvd = 0;
  1830. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1831. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1832. FL("hash based steering %d\n"), hash_based);
  1833. if (!hash_based)
  1834. reo_dest = pdev->reo_dest;
  1835. else
  1836. reo_dest = 1;
  1837. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1838. /* TODO: Check the destination ring number to be passed to FW */
  1839. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1840. pdev->osif_pdev, peer->mac_addr.raw,
  1841. peer->vdev->vdev_id, hash_based, reo_dest);
  1842. }
  1843. return;
  1844. }
  1845. /*
  1846. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1847. * @vdev_handle: virtual device object
  1848. * @htt_pkt_type: type of pkt
  1849. *
  1850. * Return: void
  1851. */
  1852. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1853. enum htt_cmn_pkt_type val)
  1854. {
  1855. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1856. vdev->tx_encap_type = val;
  1857. }
  1858. /*
  1859. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1860. * @vdev_handle: virtual device object
  1861. * @htt_pkt_type: type of pkt
  1862. *
  1863. * Return: void
  1864. */
  1865. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1866. enum htt_cmn_pkt_type val)
  1867. {
  1868. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1869. vdev->rx_decap_type = val;
  1870. }
  1871. /*
  1872. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  1873. * @pdev_handle: physical device object
  1874. * @val: reo destination ring index (1 - 4)
  1875. *
  1876. * Return: void
  1877. */
  1878. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  1879. enum cdp_host_reo_dest_ring val)
  1880. {
  1881. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1882. if (pdev)
  1883. pdev->reo_dest = val;
  1884. }
  1885. /*
  1886. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  1887. * @pdev_handle: physical device object
  1888. *
  1889. * Return: reo destination ring index
  1890. */
  1891. static enum cdp_host_reo_dest_ring
  1892. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  1893. {
  1894. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1895. if (pdev)
  1896. return pdev->reo_dest;
  1897. else
  1898. return cdp_host_reo_dest_ring_unknown;
  1899. }
  1900. #ifdef QCA_SUPPORT_SON
  1901. static void dp_son_peer_authorize(struct dp_peer *peer)
  1902. {
  1903. struct dp_soc *soc;
  1904. soc = peer->vdev->pdev->soc;
  1905. peer->peer_bs_inact_flag = 0;
  1906. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1907. return;
  1908. }
  1909. #else
  1910. static void dp_son_peer_authorize(struct dp_peer *peer)
  1911. {
  1912. return;
  1913. }
  1914. #endif
  1915. /*
  1916. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  1917. * @pdev_handle: device object
  1918. * @val: value to be set
  1919. *
  1920. * Return: void
  1921. */
  1922. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1923. uint32_t val)
  1924. {
  1925. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1926. /* Enable/Disable smart mesh filtering. This flag will be checked
  1927. * during rx processing to check if packets are from NAC clients.
  1928. */
  1929. pdev->filter_neighbour_peers = val;
  1930. return 0;
  1931. }
  1932. /*
  1933. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  1934. * address for smart mesh filtering
  1935. * @pdev_handle: device object
  1936. * @cmd: Add/Del command
  1937. * @macaddr: nac client mac address
  1938. *
  1939. * Return: void
  1940. */
  1941. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  1942. uint32_t cmd, uint8_t *macaddr)
  1943. {
  1944. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  1945. struct dp_neighbour_peer *peer = NULL;
  1946. if (!macaddr)
  1947. goto fail0;
  1948. /* Store address of NAC (neighbour peer) which will be checked
  1949. * against TA of received packets.
  1950. */
  1951. if (cmd == DP_NAC_PARAM_ADD) {
  1952. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  1953. sizeof(*peer));
  1954. if (!peer) {
  1955. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1956. FL("DP neighbour peer node memory allocation failed"));
  1957. goto fail0;
  1958. }
  1959. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  1960. macaddr, DP_MAC_ADDR_LEN);
  1961. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1962. /* add this neighbour peer into the list */
  1963. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  1964. neighbour_peer_list_elem);
  1965. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1966. return 1;
  1967. } else if (cmd == DP_NAC_PARAM_DEL) {
  1968. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1969. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1970. neighbour_peer_list_elem) {
  1971. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  1972. macaddr, DP_MAC_ADDR_LEN)) {
  1973. /* delete this peer from the list */
  1974. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  1975. peer, neighbour_peer_list_elem);
  1976. qdf_mem_free(peer);
  1977. break;
  1978. }
  1979. }
  1980. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1981. return 1;
  1982. }
  1983. fail0:
  1984. return 0;
  1985. }
  1986. /*
  1987. * dp_peer_authorize() - authorize txrx peer
  1988. * @peer_handle: Datapath peer handle
  1989. * @authorize
  1990. *
  1991. */
  1992. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  1993. {
  1994. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1995. struct dp_soc *soc;
  1996. if (peer != NULL) {
  1997. soc = peer->vdev->pdev->soc;
  1998. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1999. dp_son_peer_authorize(peer);
  2000. peer->authorize = authorize ? 1 : 0;
  2001. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2002. }
  2003. }
  2004. /*
  2005. * dp_peer_unref_delete() - unref and delete peer
  2006. * @peer_handle: Datapath peer handle
  2007. *
  2008. */
  2009. void dp_peer_unref_delete(void *peer_handle)
  2010. {
  2011. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2012. struct dp_vdev *vdev = peer->vdev;
  2013. struct dp_pdev *pdev = vdev->pdev;
  2014. struct dp_soc *soc = pdev->soc;
  2015. struct dp_peer *tmppeer;
  2016. int found = 0;
  2017. uint16_t peer_id;
  2018. /*
  2019. * Hold the lock all the way from checking if the peer ref count
  2020. * is zero until the peer references are removed from the hash
  2021. * table and vdev list (if the peer ref count is zero).
  2022. * This protects against a new HL tx operation starting to use the
  2023. * peer object just after this function concludes it's done being used.
  2024. * Furthermore, the lock needs to be held while checking whether the
  2025. * vdev's list of peers is empty, to make sure that list is not modified
  2026. * concurrently with the empty check.
  2027. */
  2028. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2029. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2030. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  2031. peer, qdf_atomic_read(&peer->ref_cnt));
  2032. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  2033. peer_id = peer->peer_ids[0];
  2034. /*
  2035. * Make sure that the reference to the peer in
  2036. * peer object map is removed
  2037. */
  2038. if (peer_id != HTT_INVALID_PEER)
  2039. soc->peer_id_to_obj_map[peer_id] = NULL;
  2040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2041. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  2042. /* remove the reference to the peer from the hash table */
  2043. dp_peer_find_hash_remove(soc, peer);
  2044. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  2045. if (tmppeer == peer) {
  2046. found = 1;
  2047. break;
  2048. }
  2049. }
  2050. if (found) {
  2051. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  2052. peer_list_elem);
  2053. } else {
  2054. /*Ignoring the remove operation as peer not found*/
  2055. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2056. "peer %p not found in vdev (%p)->peer_list:%p",
  2057. peer, vdev, &peer->vdev->peer_list);
  2058. }
  2059. /* cleanup the peer data */
  2060. dp_peer_cleanup(vdev, peer);
  2061. /* check whether the parent vdev has no peers left */
  2062. if (TAILQ_EMPTY(&vdev->peer_list)) {
  2063. /*
  2064. * Now that there are no references to the peer, we can
  2065. * release the peer reference lock.
  2066. */
  2067. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2068. /*
  2069. * Check if the parent vdev was waiting for its peers
  2070. * to be deleted, in order for it to be deleted too.
  2071. */
  2072. if (vdev->delete.pending) {
  2073. ol_txrx_vdev_delete_cb vdev_delete_cb =
  2074. vdev->delete.callback;
  2075. void *vdev_delete_context =
  2076. vdev->delete.context;
  2077. QDF_TRACE(QDF_MODULE_ID_DP,
  2078. QDF_TRACE_LEVEL_INFO_HIGH,
  2079. FL("deleting vdev object %p (%pM)"
  2080. " - its last peer is done"),
  2081. vdev, vdev->mac_addr.raw);
  2082. /* all peers are gone, go ahead and delete it */
  2083. qdf_mem_free(vdev);
  2084. if (vdev_delete_cb)
  2085. vdev_delete_cb(vdev_delete_context);
  2086. }
  2087. } else {
  2088. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2089. }
  2090. #ifdef notyet
  2091. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  2092. #else
  2093. qdf_mem_free(peer);
  2094. #endif
  2095. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  2096. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  2097. vdev->vdev_id, peer->mac_addr.raw);
  2098. }
  2099. } else {
  2100. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2101. }
  2102. }
  2103. /*
  2104. * dp_peer_detach_wifi3() – Detach txrx peer
  2105. * @peer_handle: Datapath peer handle
  2106. *
  2107. */
  2108. static void dp_peer_delete_wifi3(void *peer_handle)
  2109. {
  2110. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2111. /* redirect the peer's rx delivery function to point to a
  2112. * discard func
  2113. */
  2114. peer->rx_opt_proc = dp_rx_discard;
  2115. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2116. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  2117. #ifndef CONFIG_WIN
  2118. dp_local_peer_id_free(peer->vdev->pdev, peer);
  2119. #endif
  2120. qdf_spinlock_destroy(&peer->peer_info_lock);
  2121. /*
  2122. * Remove the reference added during peer_attach.
  2123. * The peer will still be left allocated until the
  2124. * PEER_UNMAP message arrives to remove the other
  2125. * reference, added by the PEER_MAP message.
  2126. */
  2127. dp_peer_unref_delete(peer_handle);
  2128. }
  2129. /*
  2130. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  2131. * @peer_handle: Datapath peer handle
  2132. *
  2133. */
  2134. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  2135. {
  2136. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  2137. return vdev->mac_addr.raw;
  2138. }
  2139. /*
  2140. * dp_vdev_set_wds() - Enable per packet stats
  2141. * @vdev_handle: DP VDEV handle
  2142. * @val: value
  2143. *
  2144. * Return: none
  2145. */
  2146. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  2147. {
  2148. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2149. vdev->wds_enabled = val;
  2150. return 0;
  2151. }
  2152. /*
  2153. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  2154. * @peer_handle: Datapath peer handle
  2155. *
  2156. */
  2157. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  2158. uint8_t vdev_id)
  2159. {
  2160. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  2161. struct dp_vdev *vdev = NULL;
  2162. if (qdf_unlikely(!pdev))
  2163. return NULL;
  2164. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2165. if (vdev->vdev_id == vdev_id)
  2166. break;
  2167. }
  2168. return (struct cdp_vdev *)vdev;
  2169. }
  2170. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  2171. {
  2172. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2173. return vdev->opmode;
  2174. }
  2175. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  2176. {
  2177. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  2178. struct dp_pdev *pdev = vdev->pdev;
  2179. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  2180. }
  2181. /**
  2182. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  2183. * @vdev_handle: Datapath VDEV handle
  2184. * @smart_monitor: Flag to denote if its smart monitor mode
  2185. *
  2186. * Return: 0 on success, not 0 on failure
  2187. */
  2188. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  2189. uint8_t smart_monitor)
  2190. {
  2191. /* Many monitor VAPs can exists in a system but only one can be up at
  2192. * anytime
  2193. */
  2194. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2195. struct dp_pdev *pdev;
  2196. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  2197. struct dp_soc *soc;
  2198. uint8_t pdev_id;
  2199. qdf_assert(vdev);
  2200. pdev = vdev->pdev;
  2201. pdev_id = pdev->pdev_id;
  2202. soc = pdev->soc;
  2203. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  2204. "pdev=%p, pdev_id=%d, soc=%p vdev=%p\n",
  2205. pdev, pdev_id, soc, vdev);
  2206. /*Check if current pdev's monitor_vdev exists */
  2207. if (pdev->monitor_vdev) {
  2208. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2209. "vdev=%p\n", vdev);
  2210. qdf_assert(vdev);
  2211. }
  2212. pdev->monitor_vdev = vdev;
  2213. /* If smart monitor mode, do not configure monitor ring */
  2214. if (smart_monitor)
  2215. return QDF_STATUS_SUCCESS;
  2216. htt_tlv_filter.mpdu_start = 1;
  2217. htt_tlv_filter.msdu_start = 1;
  2218. htt_tlv_filter.packet = 1;
  2219. htt_tlv_filter.msdu_end = 1;
  2220. htt_tlv_filter.mpdu_end = 1;
  2221. htt_tlv_filter.packet_header = 1;
  2222. htt_tlv_filter.attention = 1;
  2223. htt_tlv_filter.ppdu_start = 0;
  2224. htt_tlv_filter.ppdu_end = 0;
  2225. htt_tlv_filter.ppdu_end_user_stats = 0;
  2226. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  2227. htt_tlv_filter.ppdu_end_status_done = 0;
  2228. htt_tlv_filter.enable_fp = 1;
  2229. htt_tlv_filter.enable_md = 0;
  2230. htt_tlv_filter.enable_mo = 1;
  2231. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2232. pdev->rxdma_mon_buf_ring.hal_srng,
  2233. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  2234. htt_tlv_filter.mpdu_start = 1;
  2235. htt_tlv_filter.msdu_start = 1;
  2236. htt_tlv_filter.packet = 0;
  2237. htt_tlv_filter.msdu_end = 1;
  2238. htt_tlv_filter.mpdu_end = 1;
  2239. htt_tlv_filter.packet_header = 1;
  2240. htt_tlv_filter.attention = 1;
  2241. htt_tlv_filter.ppdu_start = 1;
  2242. htt_tlv_filter.ppdu_end = 1;
  2243. htt_tlv_filter.ppdu_end_user_stats = 1;
  2244. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  2245. htt_tlv_filter.ppdu_end_status_done = 1;
  2246. htt_tlv_filter.enable_fp = 1;
  2247. htt_tlv_filter.enable_md = 0;
  2248. htt_tlv_filter.enable_mo = 1;
  2249. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  2250. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  2251. RX_BUFFER_SIZE, &htt_tlv_filter);
  2252. return QDF_STATUS_SUCCESS;
  2253. }
  2254. #ifdef MESH_MODE_SUPPORT
  2255. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  2256. {
  2257. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2258. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2259. FL("val %d"), val);
  2260. vdev->mesh_vdev = val;
  2261. }
  2262. /*
  2263. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  2264. * @vdev_hdl: virtual device object
  2265. * @val: value to be set
  2266. *
  2267. * Return: void
  2268. */
  2269. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  2270. {
  2271. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2272. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2273. FL("val %d"), val);
  2274. vdev->mesh_rx_filter = val;
  2275. }
  2276. #endif
  2277. /**
  2278. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  2279. * @vdev: DP VDEV handle
  2280. *
  2281. * return: void
  2282. */
  2283. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  2284. {
  2285. struct dp_peer *peer = NULL;
  2286. int i;
  2287. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  2288. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  2289. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2290. if (!peer)
  2291. return;
  2292. for (i = 0; i <= MAX_MCS; i++) {
  2293. DP_STATS_AGGR(vdev, peer, tx.pkt_type[0].mcs_count[i]);
  2294. DP_STATS_AGGR(vdev, peer, tx.pkt_type[1].mcs_count[i]);
  2295. DP_STATS_AGGR(vdev, peer, tx.pkt_type[2].mcs_count[i]);
  2296. DP_STATS_AGGR(vdev, peer, tx.pkt_type[3].mcs_count[i]);
  2297. DP_STATS_AGGR(vdev, peer, tx.pkt_type[4].mcs_count[i]);
  2298. DP_STATS_AGGR(vdev, peer, rx.pkt_type[0].mcs_count[i]);
  2299. DP_STATS_AGGR(vdev, peer, rx.pkt_type[1].mcs_count[i]);
  2300. DP_STATS_AGGR(vdev, peer, rx.pkt_type[2].mcs_count[i]);
  2301. DP_STATS_AGGR(vdev, peer, rx.pkt_type[3].mcs_count[i]);
  2302. DP_STATS_AGGR(vdev, peer, rx.pkt_type[4].mcs_count[i]);
  2303. }
  2304. for (i = 0; i < SUPPORTED_BW; i++) {
  2305. DP_STATS_AGGR(vdev, peer, tx.bw[i]);
  2306. DP_STATS_AGGR(vdev, peer, rx.bw[i]);
  2307. }
  2308. for (i = 0; i < SS_COUNT; i++)
  2309. DP_STATS_AGGR(vdev, peer, rx.nss[i]);
  2310. for (i = 0; i < WME_AC_MAX; i++) {
  2311. DP_STATS_AGGR(vdev, peer, tx.wme_ac_type[i]);
  2312. DP_STATS_AGGR(vdev, peer, rx.wme_ac_type[i]);
  2313. DP_STATS_AGGR(vdev, peer, tx.excess_retries_ac[i]);
  2314. }
  2315. for (i = 0; i < MAX_MCS + 1; i++) {
  2316. DP_STATS_AGGR(vdev, peer, tx.sgi_count[i]);
  2317. DP_STATS_AGGR(vdev, peer, rx.sgi_count[i]);
  2318. }
  2319. DP_STATS_AGGR_PKT(vdev, peer, tx.comp_pkt);
  2320. DP_STATS_AGGR_PKT(vdev, peer, tx.ucast);
  2321. DP_STATS_AGGR_PKT(vdev, peer, tx.mcast);
  2322. DP_STATS_AGGR_PKT(vdev, peer, tx.tx_success);
  2323. DP_STATS_AGGR(vdev, peer, tx.tx_failed);
  2324. DP_STATS_AGGR(vdev, peer, tx.ofdma);
  2325. DP_STATS_AGGR(vdev, peer, tx.stbc);
  2326. DP_STATS_AGGR(vdev, peer, tx.ldpc);
  2327. DP_STATS_AGGR(vdev, peer, tx.retries);
  2328. DP_STATS_AGGR(vdev, peer, tx.non_amsdu_cnt);
  2329. DP_STATS_AGGR(vdev, peer, tx.amsdu_cnt);
  2330. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard);
  2331. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_retired);
  2332. DP_STATS_AGGR(vdev, peer, tx.dropped.mpdu_age_out);
  2333. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason1);
  2334. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason2);
  2335. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason3);
  2336. DP_STATS_AGGR(vdev, peer, rx.err.mic_err);
  2337. DP_STATS_AGGR(vdev, peer, rx.err.decrypt_err);
  2338. DP_STATS_AGGR(vdev, peer, rx.non_ampdu_cnt);
  2339. DP_STATS_AGGR(vdev, peer, rx.ampdu_cnt);
  2340. DP_STATS_AGGR(vdev, peer, rx.non_amsdu_cnt);
  2341. DP_STATS_AGGR(vdev, peer, rx.amsdu_cnt);
  2342. DP_STATS_AGGR_PKT(vdev, peer, rx.to_stack);
  2343. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  2344. DP_STATS_AGGR_PKT(vdev, peer, rx.rcvd_reo[i]);
  2345. peer->stats.rx.unicast.num = peer->stats.rx.to_stack.num -
  2346. peer->stats.rx.multicast.num;
  2347. peer->stats.rx.unicast.bytes = peer->stats.rx.to_stack.bytes -
  2348. peer->stats.rx.multicast.bytes;
  2349. DP_STATS_AGGR_PKT(vdev, peer, rx.unicast);
  2350. DP_STATS_AGGR_PKT(vdev, peer, rx.multicast);
  2351. DP_STATS_AGGR_PKT(vdev, peer, rx.wds);
  2352. DP_STATS_AGGR_PKT(vdev, peer, rx.raw);
  2353. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.pkts);
  2354. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss.fail);
  2355. vdev->stats.tx.last_ack_rssi =
  2356. peer->stats.tx.last_ack_rssi;
  2357. }
  2358. }
  2359. /**
  2360. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  2361. * @pdev: DP PDEV handle
  2362. *
  2363. * return: void
  2364. */
  2365. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  2366. {
  2367. struct dp_vdev *vdev = NULL;
  2368. uint8_t i;
  2369. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  2370. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  2371. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  2372. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2373. if (!vdev)
  2374. return;
  2375. dp_aggregate_vdev_stats(vdev);
  2376. for (i = 0; i <= MAX_MCS; i++) {
  2377. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[0].mcs_count[i]);
  2378. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[1].mcs_count[i]);
  2379. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[2].mcs_count[i]);
  2380. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[3].mcs_count[i]);
  2381. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[4].mcs_count[i]);
  2382. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[0].mcs_count[i]);
  2383. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[1].mcs_count[i]);
  2384. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[2].mcs_count[i]);
  2385. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[3].mcs_count[i]);
  2386. DP_STATS_AGGR(pdev, vdev, rx.pkt_type[4].mcs_count[i]);
  2387. }
  2388. for (i = 0; i < SUPPORTED_BW; i++) {
  2389. DP_STATS_AGGR(pdev, vdev, tx.bw[i]);
  2390. DP_STATS_AGGR(pdev, vdev, rx.bw[i]);
  2391. }
  2392. for (i = 0; i < SS_COUNT; i++)
  2393. DP_STATS_AGGR(pdev, vdev, rx.nss[i]);
  2394. for (i = 0; i < WME_AC_MAX; i++) {
  2395. DP_STATS_AGGR(pdev, vdev, tx.wme_ac_type[i]);
  2396. DP_STATS_AGGR(pdev, vdev, rx.wme_ac_type[i]);
  2397. DP_STATS_AGGR(pdev, vdev,
  2398. tx.excess_retries_ac[i]);
  2399. }
  2400. for (i = 0; i < MAX_MCS + 1; i++) {
  2401. DP_STATS_AGGR(pdev, vdev, tx.sgi_count[i]);
  2402. DP_STATS_AGGR(pdev, vdev, rx.sgi_count[i]);
  2403. }
  2404. DP_STATS_AGGR_PKT(pdev, vdev, tx.comp_pkt);
  2405. DP_STATS_AGGR_PKT(pdev, vdev, tx.ucast);
  2406. DP_STATS_AGGR_PKT(pdev, vdev, tx.mcast);
  2407. DP_STATS_AGGR_PKT(pdev, vdev, tx.tx_success);
  2408. DP_STATS_AGGR(pdev, vdev, tx.tx_failed);
  2409. DP_STATS_AGGR(pdev, vdev, tx.ofdma);
  2410. DP_STATS_AGGR(pdev, vdev, tx.stbc);
  2411. DP_STATS_AGGR(pdev, vdev, tx.ldpc);
  2412. DP_STATS_AGGR(pdev, vdev, tx.retries);
  2413. DP_STATS_AGGR(pdev, vdev, tx.non_amsdu_cnt);
  2414. DP_STATS_AGGR(pdev, vdev, tx.amsdu_cnt);
  2415. DP_STATS_AGGR(pdev, vdev, tx.dropped.fw_discard);
  2416. DP_STATS_AGGR(pdev, vdev,
  2417. tx.dropped.fw_discard_retired);
  2418. DP_STATS_AGGR(pdev, vdev, tx.dropped.mpdu_age_out);
  2419. DP_STATS_AGGR(pdev, vdev,
  2420. tx.dropped.fw_discard_reason1);
  2421. DP_STATS_AGGR(pdev, vdev,
  2422. tx.dropped.fw_discard_reason2);
  2423. DP_STATS_AGGR(pdev, vdev,
  2424. tx.dropped.fw_discard_reason3);
  2425. DP_STATS_AGGR(pdev, vdev, rx.err.mic_err);
  2426. DP_STATS_AGGR(pdev, vdev, rx.err.decrypt_err);
  2427. DP_STATS_AGGR(pdev, vdev, rx.non_ampdu_cnt);
  2428. DP_STATS_AGGR(pdev, vdev, rx.ampdu_cnt);
  2429. DP_STATS_AGGR(pdev, vdev, rx.non_amsdu_cnt);
  2430. DP_STATS_AGGR(pdev, vdev, rx.amsdu_cnt);
  2431. DP_STATS_AGGR_PKT(pdev, vdev, rx.to_stack);
  2432. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[0]);
  2433. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[1]);
  2434. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[2]);
  2435. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo[3]);
  2436. DP_STATS_AGGR_PKT(pdev, vdev, rx.unicast);
  2437. DP_STATS_AGGR_PKT(pdev, vdev, rx.multicast);
  2438. DP_STATS_AGGR_PKT(pdev, vdev, rx.wds);
  2439. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.pkts);
  2440. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss.fail);
  2441. DP_STATS_AGGR_PKT(pdev, vdev, rx.raw);
  2442. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  2443. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  2444. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  2445. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  2446. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  2447. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  2448. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  2449. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  2450. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  2451. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  2452. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  2453. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  2454. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  2455. DP_STATS_AGGR(pdev, vdev,
  2456. tx_i.mcast_en.dropped_map_error);
  2457. DP_STATS_AGGR(pdev, vdev,
  2458. tx_i.mcast_en.dropped_self_mac);
  2459. DP_STATS_AGGR(pdev, vdev,
  2460. tx_i.mcast_en.dropped_send_fail);
  2461. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  2462. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  2463. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  2464. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  2465. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  2466. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  2467. pdev->stats.tx_i.dropped.dropped_pkt.num =
  2468. pdev->stats.tx_i.dropped.dma_error +
  2469. pdev->stats.tx_i.dropped.ring_full +
  2470. pdev->stats.tx_i.dropped.enqueue_fail +
  2471. pdev->stats.tx_i.dropped.desc_na +
  2472. pdev->stats.tx_i.dropped.res_full;
  2473. pdev->stats.tx.last_ack_rssi =
  2474. vdev->stats.tx.last_ack_rssi;
  2475. pdev->stats.tx_i.tso.num_seg =
  2476. vdev->stats.tx_i.tso.num_seg;
  2477. }
  2478. }
  2479. /**
  2480. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  2481. * @pdev: DP_PDEV Handle
  2482. *
  2483. * Return:void
  2484. */
  2485. static inline void
  2486. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  2487. {
  2488. DP_TRACE_STATS(FATAL, "WLAN Tx Stats:\n");
  2489. DP_TRACE_STATS(FATAL, "Received From Stack:\n");
  2490. DP_TRACE_STATS(FATAL, "Packets = %d",
  2491. pdev->stats.tx_i.rcvd.num);
  2492. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2493. pdev->stats.tx_i.rcvd.bytes);
  2494. DP_TRACE_STATS(FATAL, "Processed:\n");
  2495. DP_TRACE_STATS(FATAL, "Packets = %d",
  2496. pdev->stats.tx_i.processed.num);
  2497. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2498. pdev->stats.tx_i.processed.bytes);
  2499. DP_TRACE_STATS(FATAL, "Completions:\n");
  2500. DP_TRACE_STATS(FATAL, "Packets = %d",
  2501. pdev->stats.tx.comp_pkt.num);
  2502. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2503. pdev->stats.tx.comp_pkt.bytes);
  2504. DP_TRACE_STATS(FATAL, "Dropped:\n");
  2505. DP_TRACE_STATS(FATAL, "Packets = %d",
  2506. pdev->stats.tx_i.dropped.dropped_pkt.num);
  2507. DP_TRACE_STATS(FATAL, "Dma_map_error = %d",
  2508. pdev->stats.tx_i.dropped.dma_error);
  2509. DP_TRACE_STATS(FATAL, "Ring Full = %d",
  2510. pdev->stats.tx_i.dropped.ring_full);
  2511. DP_TRACE_STATS(FATAL, "Descriptor Not available = %d",
  2512. pdev->stats.tx_i.dropped.desc_na);
  2513. DP_TRACE_STATS(FATAL, "HW enqueue failed= %d",
  2514. pdev->stats.tx_i.dropped.enqueue_fail);
  2515. DP_TRACE_STATS(FATAL, "Resources Full = %d",
  2516. pdev->stats.tx_i.dropped.res_full);
  2517. DP_TRACE_STATS(FATAL, "Fw Discard = %d",
  2518. pdev->stats.tx.dropped.fw_discard);
  2519. DP_TRACE_STATS(FATAL, "Fw Discard Retired = %d",
  2520. pdev->stats.tx.dropped.fw_discard_retired);
  2521. DP_TRACE_STATS(FATAL, "Firmware Discard Untransmitted = %d",
  2522. pdev->stats.tx.dropped.fw_discard_untransmitted);
  2523. DP_TRACE_STATS(FATAL, "Mpdu Age Out = %d",
  2524. pdev->stats.tx.dropped.mpdu_age_out);
  2525. DP_TRACE_STATS(FATAL, "Firmware Discard Reason1 = %d",
  2526. pdev->stats.tx.dropped.fw_discard_reason1);
  2527. DP_TRACE_STATS(FATAL, "Firmware Discard Reason2 = %d",
  2528. pdev->stats.tx.dropped.fw_discard_reason2);
  2529. DP_TRACE_STATS(FATAL, "Firmware Discard Reason3 = %d\n",
  2530. pdev->stats.tx.dropped.fw_discard_reason3);
  2531. DP_TRACE_STATS(FATAL, "Scatter Gather:\n");
  2532. DP_TRACE_STATS(FATAL, "Packets = %d",
  2533. pdev->stats.tx_i.sg.sg_pkt.num);
  2534. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2535. pdev->stats.tx_i.sg.sg_pkt.bytes);
  2536. DP_TRACE_STATS(FATAL, "Dropped By Host = %d",
  2537. pdev->stats.tx_i.sg.dropped_host);
  2538. DP_TRACE_STATS(FATAL, "Dropped By Target = %d\n",
  2539. pdev->stats.tx_i.sg.dropped_target);
  2540. DP_TRACE_STATS(FATAL, "Tso:\n");
  2541. DP_TRACE_STATS(FATAL, "Number of Segments = %d",
  2542. pdev->stats.tx_i.tso.num_seg);
  2543. DP_TRACE_STATS(FATAL, "Packets = %d",
  2544. pdev->stats.tx_i.tso.tso_pkt.num);
  2545. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2546. pdev->stats.tx_i.tso.tso_pkt.bytes);
  2547. DP_TRACE_STATS(FATAL, "Dropped By Host = %d\n",
  2548. pdev->stats.tx_i.tso.dropped_host);
  2549. DP_TRACE_STATS(FATAL, "Mcast Enhancement:\n");
  2550. DP_TRACE_STATS(FATAL, "Packets = %d",
  2551. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  2552. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2553. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  2554. DP_TRACE_STATS(FATAL, "Dropped: Map Errors = %d",
  2555. pdev->stats.tx_i.mcast_en.dropped_map_error);
  2556. DP_TRACE_STATS(FATAL, "Dropped: Self Mac = %d",
  2557. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  2558. DP_TRACE_STATS(FATAL, "Dropped: Send Fail = %d",
  2559. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  2560. DP_TRACE_STATS(FATAL, "Unicast sent = %d\n",
  2561. pdev->stats.tx_i.mcast_en.ucast);
  2562. DP_TRACE_STATS(FATAL, "Raw:\n");
  2563. DP_TRACE_STATS(FATAL, "Packets = %d",
  2564. pdev->stats.tx_i.raw.raw_pkt.num);
  2565. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2566. pdev->stats.tx_i.raw.raw_pkt.bytes);
  2567. DP_TRACE_STATS(FATAL, "DMA map error = %d\n",
  2568. pdev->stats.tx_i.raw.dma_map_error);
  2569. DP_TRACE_STATS(FATAL, "Reinjected:\n");
  2570. DP_TRACE_STATS(FATAL, "Packets = %d",
  2571. pdev->stats.tx_i.reinject_pkts.num);
  2572. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2573. pdev->stats.tx_i.reinject_pkts.bytes);
  2574. DP_TRACE_STATS(FATAL, "Inspected:\n");
  2575. DP_TRACE_STATS(FATAL, "Packets = %d",
  2576. pdev->stats.tx_i.inspect_pkts.num);
  2577. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2578. pdev->stats.tx_i.inspect_pkts.bytes);
  2579. }
  2580. /**
  2581. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  2582. * @pdev: DP_PDEV Handle
  2583. *
  2584. * Return: void
  2585. */
  2586. static inline void
  2587. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  2588. {
  2589. DP_TRACE_STATS(FATAL, "WLAN Rx Stats:\n");
  2590. DP_TRACE_STATS(FATAL, "Received From HW (Per Rx Ring):\n");
  2591. DP_TRACE_STATS(FATAL, "Packets = %d %d %d %d",
  2592. pdev->stats.rx.rcvd_reo[0].num,
  2593. pdev->stats.rx.rcvd_reo[1].num,
  2594. pdev->stats.rx.rcvd_reo[2].num,
  2595. pdev->stats.rx.rcvd_reo[3].num);
  2596. DP_TRACE_STATS(FATAL, "Bytes = %d %d %d %d\n",
  2597. pdev->stats.rx.rcvd_reo[0].bytes,
  2598. pdev->stats.rx.rcvd_reo[1].bytes,
  2599. pdev->stats.rx.rcvd_reo[2].bytes,
  2600. pdev->stats.rx.rcvd_reo[3].bytes);
  2601. DP_TRACE_STATS(FATAL, "Replenished:\n");
  2602. DP_TRACE_STATS(FATAL, "Packets = %d",
  2603. pdev->stats.replenish.pkts.num);
  2604. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2605. pdev->stats.replenish.pkts.bytes);
  2606. DP_TRACE_STATS(FATAL, "Buffers Added To Freelist = %d\n",
  2607. pdev->stats.buf_freelist);
  2608. DP_TRACE_STATS(FATAL, "Dropped:\n");
  2609. DP_TRACE_STATS(FATAL, "Total Packets With Msdu Not Done = %d\n",
  2610. pdev->stats.dropped.msdu_not_done);
  2611. DP_TRACE_STATS(FATAL, "Sent To Stack:\n");
  2612. DP_TRACE_STATS(FATAL, "Packets = %d",
  2613. pdev->stats.rx.to_stack.num);
  2614. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2615. pdev->stats.rx.to_stack.bytes);
  2616. DP_TRACE_STATS(FATAL, "Multicast/Broadcast:\n");
  2617. DP_TRACE_STATS(FATAL, "Packets = %d",
  2618. pdev->stats.rx.multicast.num);
  2619. DP_TRACE_STATS(FATAL, "Bytes = %d\n",
  2620. pdev->stats.rx.multicast.bytes);
  2621. DP_TRACE_STATS(FATAL, "Errors:\n");
  2622. DP_TRACE_STATS(FATAL, "Rxdma Ring Un-inititalized = %d",
  2623. pdev->stats.replenish.rxdma_err);
  2624. DP_TRACE_STATS(FATAL, "Desc Alloc Failed: = %d",
  2625. pdev->stats.err.desc_alloc_fail);
  2626. }
  2627. /**
  2628. * dp_print_soc_tx_stats(): Print SOC level stats
  2629. * @soc DP_SOC Handle
  2630. *
  2631. * Return: void
  2632. */
  2633. static inline void
  2634. dp_print_soc_tx_stats(struct dp_soc *soc)
  2635. {
  2636. DP_TRACE_STATS(FATAL, "SOC Tx Stats:\n");
  2637. DP_TRACE_STATS(FATAL, "Tx Descriptors In Use = %d",
  2638. soc->stats.tx.desc_in_use);
  2639. DP_TRACE_STATS(FATAL, "Invalid peer:\n");
  2640. DP_TRACE_STATS(FATAL, "Packets = %d",
  2641. soc->stats.tx.tx_invalid_peer.num);
  2642. DP_TRACE_STATS(FATAL, "Bytes = %d",
  2643. soc->stats.tx.tx_invalid_peer.bytes);
  2644. DP_TRACE_STATS(FATAL, "Packets dropped due to TCL ring full = %d %d %d",
  2645. soc->stats.tx.tcl_ring_full[0],
  2646. soc->stats.tx.tcl_ring_full[1],
  2647. soc->stats.tx.tcl_ring_full[2]);
  2648. }
  2649. /**
  2650. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2651. * @soc: DP_SOC Handle
  2652. *
  2653. * Return:void
  2654. */
  2655. static inline void
  2656. dp_print_soc_rx_stats(struct dp_soc *soc)
  2657. {
  2658. uint32_t i;
  2659. char reo_error[DP_REO_ERR_LENGTH];
  2660. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2661. uint8_t index = 0;
  2662. DP_TRACE_STATS(FATAL, "SOC Rx Stats:\n");
  2663. DP_TRACE_STATS(FATAL, "Errors:\n");
  2664. DP_TRACE_STATS(FATAL, "Rx Decrypt Errors = %d",
  2665. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  2666. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  2667. DP_TRACE_STATS(FATAL, "Invalid RBM = %d",
  2668. soc->stats.rx.err.invalid_rbm);
  2669. DP_TRACE_STATS(FATAL, "Invalid Vdev = %d",
  2670. soc->stats.rx.err.invalid_vdev);
  2671. DP_TRACE_STATS(FATAL, "Invalid Pdev = %d",
  2672. soc->stats.rx.err.invalid_pdev);
  2673. DP_TRACE_STATS(FATAL, "Invalid Peer = %d",
  2674. soc->stats.rx.err.rx_invalid_peer.num);
  2675. DP_TRACE_STATS(FATAL, "HAL Ring Access Fail = %d",
  2676. soc->stats.rx.err.hal_ring_access_fail);
  2677. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2678. index += qdf_snprint(&rxdma_error[index],
  2679. DP_RXDMA_ERR_LENGTH - index,
  2680. " %d", soc->stats.rx.err.rxdma_error[i]);
  2681. }
  2682. DP_TRACE_STATS(FATAL, "RXDMA Error (0-31):%s",
  2683. rxdma_error);
  2684. index = 0;
  2685. for (i = 0; i < REO_ERROR_TYPE_MAX; i++) {
  2686. index += qdf_snprint(&reo_error[index],
  2687. DP_REO_ERR_LENGTH - index,
  2688. " %d", soc->stats.rx.err.reo_error[i]);
  2689. }
  2690. DP_TRACE_STATS(FATAL, "REO Error(0-14):%s",
  2691. reo_error);
  2692. }
  2693. /**
  2694. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2695. * @vdev: DP_VDEV handle
  2696. *
  2697. * Return:void
  2698. */
  2699. static inline void
  2700. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2701. {
  2702. struct dp_peer *peer = NULL;
  2703. DP_STATS_CLR(vdev->pdev);
  2704. DP_STATS_CLR(vdev->pdev->soc);
  2705. DP_STATS_CLR(vdev);
  2706. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2707. if (!peer)
  2708. return;
  2709. DP_STATS_CLR(peer);
  2710. }
  2711. }
  2712. /**
  2713. * dp_print_rx_rates(): Print Rx rate stats
  2714. * @vdev: DP_VDEV handle
  2715. *
  2716. * Return:void
  2717. */
  2718. static inline void
  2719. dp_print_rx_rates(struct dp_vdev *vdev)
  2720. {
  2721. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2722. uint8_t i, pkt_type;
  2723. uint8_t index = 0;
  2724. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2725. char nss[DP_NSS_LENGTH];
  2726. DP_TRACE_STATS(FATAL, "Rx Rate Info:\n");
  2727. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2728. index = 0;
  2729. for (i = 0; i < MAX_MCS; i++) {
  2730. index += qdf_snprint(&rx_mcs[pkt_type][index],
  2731. DP_MCS_LENGTH - index,
  2732. " %d ",
  2733. pdev->stats.rx.pkt_type[pkt_type].
  2734. mcs_count[i]);
  2735. }
  2736. }
  2737. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2738. rx_mcs[0]);
  2739. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2740. pdev->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2741. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2742. rx_mcs[1]);
  2743. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2744. pdev->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2745. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2746. rx_mcs[2]);
  2747. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2748. pdev->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2749. DP_TRACE_STATS(FATAL, "Type 11AC MCS(0-9) = %s",
  2750. rx_mcs[3]);
  2751. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2752. pdev->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2753. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2754. rx_mcs[4]);
  2755. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2756. pdev->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2757. index = 0;
  2758. for (i = 0; i < SS_COUNT; i++) {
  2759. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2760. " %d", pdev->stats.rx.nss[i]);
  2761. }
  2762. DP_TRACE_STATS(FATAL, "NSS(0-7) = %s",
  2763. nss);
  2764. DP_TRACE_STATS(FATAL, "SGI ="
  2765. " 0.8us %d,"
  2766. " 0.4us %d,"
  2767. " 1.6us %d,"
  2768. " 3.2us %d,",
  2769. pdev->stats.rx.sgi_count[0],
  2770. pdev->stats.rx.sgi_count[1],
  2771. pdev->stats.rx.sgi_count[2],
  2772. pdev->stats.rx.sgi_count[3]);
  2773. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2774. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2775. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2776. DP_TRACE_STATS(FATAL, "Reception Type ="
  2777. " SU: %d,"
  2778. " MU_MIMO:%d,"
  2779. " MU_OFDMA:%d,"
  2780. " MU_OFDMA_MIMO:%d\n",
  2781. pdev->stats.rx.reception_type[0],
  2782. pdev->stats.rx.reception_type[1],
  2783. pdev->stats.rx.reception_type[2],
  2784. pdev->stats.rx.reception_type[3]);
  2785. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2786. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Ampdus = %d",
  2787. pdev->stats.rx.ampdu_cnt);
  2788. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2789. pdev->stats.rx.non_ampdu_cnt);
  2790. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu: %d",
  2791. pdev->stats.rx.amsdu_cnt);
  2792. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2793. pdev->stats.rx.non_amsdu_cnt);
  2794. }
  2795. /**
  2796. * dp_print_tx_rates(): Print tx rates
  2797. * @vdev: DP_VDEV handle
  2798. *
  2799. * Return:void
  2800. */
  2801. static inline void
  2802. dp_print_tx_rates(struct dp_vdev *vdev)
  2803. {
  2804. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2805. uint8_t i, pkt_type;
  2806. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2807. uint32_t index;
  2808. DP_TRACE_STATS(FATAL, "Tx Rate Info:\n");
  2809. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2810. index = 0;
  2811. for (i = 0; i < MAX_MCS; i++) {
  2812. index += qdf_snprint(&mcs[pkt_type][index],
  2813. DP_MCS_LENGTH - index,
  2814. " %d ",
  2815. pdev->stats.tx.pkt_type[pkt_type].
  2816. mcs_count[i]);
  2817. }
  2818. }
  2819. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2820. mcs[0]);
  2821. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2822. pdev->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2823. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2824. mcs[1]);
  2825. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2826. pdev->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2827. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2828. mcs[2]);
  2829. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2830. pdev->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2831. DP_TRACE_STATS(FATAL, "Type 11AC MCS(0-9) = %s",
  2832. mcs[3]);
  2833. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2834. pdev->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2835. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2836. mcs[4]);
  2837. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2838. pdev->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2839. DP_TRACE_STATS(FATAL, "SGI ="
  2840. " 0.8us %d"
  2841. " 0.4us %d"
  2842. " 1.6us %d"
  2843. " 3.2us %d",
  2844. pdev->stats.tx.sgi_count[0],
  2845. pdev->stats.tx.sgi_count[1],
  2846. pdev->stats.tx.sgi_count[2],
  2847. pdev->stats.tx.sgi_count[3]);
  2848. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2849. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  2850. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  2851. DP_TRACE_STATS(FATAL, "OFDMA = %d", pdev->stats.tx.ofdma);
  2852. DP_TRACE_STATS(FATAL, "STBC = %d", pdev->stats.tx.stbc);
  2853. DP_TRACE_STATS(FATAL, "LDPC = %d", pdev->stats.tx.ldpc);
  2854. DP_TRACE_STATS(FATAL, "Retries = %d", pdev->stats.tx.retries);
  2855. DP_TRACE_STATS(FATAL, "Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  2856. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2857. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2858. pdev->stats.tx.amsdu_cnt);
  2859. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d",
  2860. pdev->stats.tx.non_amsdu_cnt);
  2861. }
  2862. /**
  2863. * dp_print_peer_stats():print peer stats
  2864. * @peer: DP_PEER handle
  2865. *
  2866. * return void
  2867. */
  2868. static inline void dp_print_peer_stats(struct dp_peer *peer)
  2869. {
  2870. uint8_t i, pkt_type;
  2871. char tx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2872. char rx_mcs[DOT11_MAX][DP_MCS_LENGTH];
  2873. uint32_t index;
  2874. char nss[DP_NSS_LENGTH];
  2875. DP_TRACE_STATS(FATAL, "Node Tx Stats:\n");
  2876. DP_TRACE_STATS(FATAL, "Total Packet Completions = %d",
  2877. peer->stats.tx.comp_pkt.num);
  2878. DP_TRACE_STATS(FATAL, "Total Bytes Completions = %d",
  2879. peer->stats.tx.comp_pkt.bytes);
  2880. DP_TRACE_STATS(FATAL, "Success Packets = %d",
  2881. peer->stats.tx.tx_success.num);
  2882. DP_TRACE_STATS(FATAL, "Success Bytes = %d",
  2883. peer->stats.tx.tx_success.bytes);
  2884. DP_TRACE_STATS(FATAL, "Packets Failed = %d",
  2885. peer->stats.tx.tx_failed);
  2886. DP_TRACE_STATS(FATAL, "Packets In OFDMA = %d",
  2887. peer->stats.tx.ofdma);
  2888. DP_TRACE_STATS(FATAL, "Packets In STBC = %d",
  2889. peer->stats.tx.stbc);
  2890. DP_TRACE_STATS(FATAL, "Packets In LDPC = %d",
  2891. peer->stats.tx.ldpc);
  2892. DP_TRACE_STATS(FATAL, "Packet Retries = %d",
  2893. peer->stats.tx.retries);
  2894. DP_TRACE_STATS(FATAL, "Msdu's Not Part of Ampdu = %d",
  2895. peer->stats.tx.non_amsdu_cnt);
  2896. DP_TRACE_STATS(FATAL, "Mpdu's Part of Ampdu = %d",
  2897. peer->stats.tx.amsdu_cnt);
  2898. DP_TRACE_STATS(FATAL, "Last Packet RSSI = %d",
  2899. peer->stats.tx.last_ack_rssi);
  2900. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard = %d",
  2901. peer->stats.tx.dropped.fw_discard);
  2902. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard Retired = %d",
  2903. peer->stats.tx.dropped.fw_discard_retired);
  2904. DP_TRACE_STATS(FATAL, "Dropped At FW: FW Discard Untransmitted = %d",
  2905. peer->stats.tx.dropped.fw_discard_untransmitted);
  2906. DP_TRACE_STATS(FATAL, "Dropped : Mpdu Age Out = %d",
  2907. peer->stats.tx.dropped.mpdu_age_out);
  2908. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason1 = %d",
  2909. peer->stats.tx.dropped.fw_discard_reason1);
  2910. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason2 = %d",
  2911. peer->stats.tx.dropped.fw_discard_reason2);
  2912. DP_TRACE_STATS(FATAL, "Dropped : FW Discard Reason3 = %d",
  2913. peer->stats.tx.dropped.fw_discard_reason3);
  2914. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2915. index = 0;
  2916. for (i = 0; i < MAX_MCS; i++) {
  2917. index += qdf_snprint(&tx_mcs[pkt_type][index],
  2918. DP_MCS_LENGTH - index,
  2919. " %d ",
  2920. peer->stats.tx.pkt_type[pkt_type].
  2921. mcs_count[i]);
  2922. }
  2923. }
  2924. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  2925. tx_mcs[0]);
  2926. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  2927. peer->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2928. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  2929. tx_mcs[1]);
  2930. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  2931. peer->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2932. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  2933. tx_mcs[2]);
  2934. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  2935. peer->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2936. DP_TRACE_STATS(FATAL, "11AC MCS(0-9) = %s",
  2937. tx_mcs[3]);
  2938. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  2939. peer->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2940. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  2941. tx_mcs[4]);
  2942. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  2943. peer->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2944. DP_TRACE_STATS(FATAL, "SGI = "
  2945. " 0.8us %d"
  2946. " 0.4us %d"
  2947. " 1.6us %d"
  2948. " 3.2us %d",
  2949. peer->stats.tx.sgi_count[0],
  2950. peer->stats.tx.sgi_count[1],
  2951. peer->stats.tx.sgi_count[2],
  2952. peer->stats.tx.sgi_count[3]);
  2953. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  2954. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  2955. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  2956. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  2957. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  2958. peer->stats.tx.amsdu_cnt);
  2959. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d\n",
  2960. peer->stats.tx.non_amsdu_cnt);
  2961. DP_TRACE_STATS(FATAL, "Node Rx Stats:\n");
  2962. DP_TRACE_STATS(FATAL, "Packets Sent To Stack = %d",
  2963. peer->stats.rx.to_stack.num);
  2964. DP_TRACE_STATS(FATAL, "Bytes Sent To Stack = %d",
  2965. peer->stats.rx.to_stack.bytes);
  2966. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  2967. DP_TRACE_STATS(FATAL, "Packets Received = %d",
  2968. peer->stats.rx.rcvd_reo[i].num);
  2969. DP_TRACE_STATS(FATAL, "Bytes Received = %d",
  2970. peer->stats.rx.rcvd_reo[i].bytes);
  2971. }
  2972. DP_TRACE_STATS(FATAL, "Multicast Packets Received = %d",
  2973. peer->stats.rx.multicast.num);
  2974. DP_TRACE_STATS(FATAL, "Multicast Bytes Received = %d",
  2975. peer->stats.rx.multicast.bytes);
  2976. DP_TRACE_STATS(FATAL, "WDS Packets Received = %d",
  2977. peer->stats.rx.wds.num);
  2978. DP_TRACE_STATS(FATAL, "WDS Bytes Received = %d",
  2979. peer->stats.rx.wds.bytes);
  2980. DP_TRACE_STATS(FATAL, "Intra BSS Packets Received = %d",
  2981. peer->stats.rx.intra_bss.pkts.num);
  2982. DP_TRACE_STATS(FATAL, "Intra BSS Bytes Received = %d",
  2983. peer->stats.rx.intra_bss.pkts.bytes);
  2984. DP_TRACE_STATS(FATAL, "Raw Packets Received = %d",
  2985. peer->stats.rx.raw.num);
  2986. DP_TRACE_STATS(FATAL, "Raw Bytes Received = %d",
  2987. peer->stats.rx.raw.bytes);
  2988. DP_TRACE_STATS(FATAL, "Errors: MIC Errors = %d",
  2989. peer->stats.rx.err.mic_err);
  2990. DP_TRACE_STATS(FATAL, "Erros: Decryption Errors = %d",
  2991. peer->stats.rx.err.decrypt_err);
  2992. DP_TRACE_STATS(FATAL, "Msdu's Received As Part of Ampdu = %d",
  2993. peer->stats.rx.non_ampdu_cnt);
  2994. DP_TRACE_STATS(FATAL, "Msdu's Recived As Ampdu = %d",
  2995. peer->stats.rx.ampdu_cnt);
  2996. DP_TRACE_STATS(FATAL, "Msdu's Received Not Part of Amsdu's = %d",
  2997. peer->stats.rx.non_amsdu_cnt);
  2998. DP_TRACE_STATS(FATAL, "MSDUs Received As Part of Amsdu = %d",
  2999. peer->stats.rx.amsdu_cnt);
  3000. DP_TRACE_STATS(FATAL, "SGI ="
  3001. " 0.8us %d"
  3002. " 0.4us %d"
  3003. " 1.6us %d"
  3004. " 3.2us %d",
  3005. peer->stats.rx.sgi_count[0],
  3006. peer->stats.rx.sgi_count[1],
  3007. peer->stats.rx.sgi_count[2],
  3008. peer->stats.rx.sgi_count[3]);
  3009. DP_TRACE_STATS(FATAL, "BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  3010. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  3011. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  3012. DP_TRACE_STATS(FATAL, "Reception Type ="
  3013. " SU %d,"
  3014. " MU_MIMO %d,"
  3015. " MU_OFDMA %d,"
  3016. " MU_OFDMA_MIMO %d",
  3017. peer->stats.rx.reception_type[0],
  3018. peer->stats.rx.reception_type[1],
  3019. peer->stats.rx.reception_type[2],
  3020. peer->stats.rx.reception_type[3]);
  3021. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  3022. index = 0;
  3023. for (i = 0; i < MAX_MCS; i++) {
  3024. index += qdf_snprint(&rx_mcs[pkt_type][index],
  3025. DP_MCS_LENGTH - index,
  3026. " %d ",
  3027. peer->stats.rx.pkt_type[pkt_type].
  3028. mcs_count[i]);
  3029. }
  3030. }
  3031. DP_TRACE_STATS(FATAL, "11A MCS(0-7) = %s",
  3032. rx_mcs[0]);
  3033. DP_TRACE_STATS(FATAL, "11A MCS Invalid = %d",
  3034. peer->stats.rx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  3035. DP_TRACE_STATS(FATAL, "11B MCS(0-6) = %s",
  3036. rx_mcs[1]);
  3037. DP_TRACE_STATS(FATAL, "11B MCS Invalid = %d",
  3038. peer->stats.rx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  3039. DP_TRACE_STATS(FATAL, "11N MCS(0-7) = %s",
  3040. rx_mcs[2]);
  3041. DP_TRACE_STATS(FATAL, "11N MCS Invalid = %d",
  3042. peer->stats.rx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  3043. DP_TRACE_STATS(FATAL, "11AC MCS(0-9) = %s",
  3044. rx_mcs[3]);
  3045. DP_TRACE_STATS(FATAL, "11AC MCS Invalid = %d",
  3046. peer->stats.rx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  3047. DP_TRACE_STATS(FATAL, "11AX MCS(0-11) = %s",
  3048. rx_mcs[4]);
  3049. DP_TRACE_STATS(FATAL, "11AX MCS Invalid = %d",
  3050. peer->stats.rx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  3051. index = 0;
  3052. for (i = 0; i < SS_COUNT; i++) {
  3053. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  3054. " %d", peer->stats.rx.nss[i]);
  3055. }
  3056. DP_TRACE_STATS(FATAL, "NSS(0-7) = %s\n",
  3057. nss);
  3058. DP_TRACE_STATS(FATAL, "Aggregation:\n");
  3059. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Ampdu = %d",
  3060. peer->stats.rx.ampdu_cnt);
  3061. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Mpdu Level Aggregation = %d",
  3062. peer->stats.rx.non_ampdu_cnt);
  3063. DP_TRACE_STATS(FATAL, "Number of Msdu's Part of Amsdu = %d",
  3064. peer->stats.rx.amsdu_cnt);
  3065. DP_TRACE_STATS(FATAL, "Number of Msdu's With No Msdu Level Aggregation = %d",
  3066. peer->stats.rx.non_amsdu_cnt);
  3067. }
  3068. /**
  3069. * dp_print_host_stats()- Function to print the stats aggregated at host
  3070. * @vdev_handle: DP_VDEV handle
  3071. * @type: host stats type
  3072. *
  3073. * Available Stat types
  3074. * TXRX_CLEAR_STATS : Clear the stats
  3075. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  3076. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  3077. * TXRX_TX_HOST_STATS: Print Tx Stats
  3078. * TXRX_RX_HOST_STATS: Print Rx Stats
  3079. *
  3080. * Return: 0 on success, print error message in case of failure
  3081. */
  3082. static int
  3083. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  3084. {
  3085. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3086. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  3087. dp_aggregate_pdev_stats(pdev);
  3088. switch (type) {
  3089. case TXRX_CLEAR_STATS:
  3090. dp_txrx_host_stats_clr(vdev);
  3091. break;
  3092. case TXRX_RX_RATE_STATS:
  3093. dp_print_rx_rates(vdev);
  3094. break;
  3095. case TXRX_TX_RATE_STATS:
  3096. dp_print_tx_rates(vdev);
  3097. break;
  3098. case TXRX_TX_HOST_STATS:
  3099. dp_print_pdev_tx_stats(pdev);
  3100. dp_print_soc_tx_stats(pdev->soc);
  3101. break;
  3102. case TXRX_RX_HOST_STATS:
  3103. dp_print_pdev_rx_stats(pdev);
  3104. dp_print_soc_rx_stats(pdev->soc);
  3105. break;
  3106. default:
  3107. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  3108. break;
  3109. }
  3110. return 0;
  3111. }
  3112. /*
  3113. * dp_get_host_peer_stats()- function to print peer stats
  3114. * @pdev_handle: DP_PDEV handle
  3115. * @mac_addr: mac address of the peer
  3116. *
  3117. * Return: void
  3118. */
  3119. static void
  3120. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  3121. {
  3122. struct dp_peer *peer;
  3123. uint8_t local_id;
  3124. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  3125. &local_id);
  3126. if (!peer) {
  3127. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3128. "%s: Invalid peer\n", __func__);
  3129. return;
  3130. }
  3131. dp_print_peer_stats(peer);
  3132. dp_peer_rxtid_stats(peer);
  3133. return;
  3134. }
  3135. /*
  3136. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  3137. * @pdev_handle: DP_PDEV handle
  3138. *
  3139. * Return: void
  3140. */
  3141. static void
  3142. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  3143. {
  3144. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3145. pdev->enhanced_stats_en = 1;
  3146. }
  3147. /*
  3148. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  3149. * @pdev_handle: DP_PDEV handle
  3150. *
  3151. * Return: void
  3152. */
  3153. static void
  3154. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  3155. {
  3156. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3157. pdev->enhanced_stats_en = 0;
  3158. }
  3159. /*
  3160. * dp_get_fw_peer_stats()- function to print peer stats
  3161. * @pdev_handle: DP_PDEV handle
  3162. * @mac_addr: mac address of the peer
  3163. * @cap: Type of htt stats requested
  3164. *
  3165. * Currently Supporting only MAC ID based requests Only
  3166. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  3167. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  3168. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  3169. *
  3170. * Return: void
  3171. */
  3172. static void
  3173. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  3174. uint32_t cap)
  3175. {
  3176. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3177. uint32_t config_param0 = 0;
  3178. uint32_t config_param1 = 0;
  3179. uint32_t config_param2 = 0;
  3180. uint32_t config_param3 = 0;
  3181. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  3182. config_param0 |= (1 << (cap + 1));
  3183. config_param1 = 0x8f;
  3184. config_param2 |= (mac_addr[0] & 0x000000ff);
  3185. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  3186. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  3187. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  3188. config_param3 |= (mac_addr[4] & 0x000000ff);
  3189. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  3190. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  3191. config_param0, config_param1, config_param2,
  3192. config_param3);
  3193. }
  3194. /*
  3195. * dp_set_vdev_param: function to set parameters in vdev
  3196. * @param: parameter type to be set
  3197. * @val: value of parameter to be set
  3198. *
  3199. * return: void
  3200. */
  3201. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  3202. enum cdp_vdev_param_type param, uint32_t val)
  3203. {
  3204. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3205. switch (param) {
  3206. case CDP_ENABLE_WDS:
  3207. vdev->wds_enabled = val;
  3208. break;
  3209. case CDP_ENABLE_NAWDS:
  3210. vdev->nawds_enabled = val;
  3211. break;
  3212. case CDP_ENABLE_MCAST_EN:
  3213. vdev->mcast_enhancement_en = val;
  3214. break;
  3215. case CDP_ENABLE_PROXYSTA:
  3216. vdev->proxysta_vdev = val;
  3217. break;
  3218. case CDP_UPDATE_TDLS_FLAGS:
  3219. vdev->tdls_link_connected = val;
  3220. break;
  3221. case CDP_CFG_WDS_AGING_TIMER:
  3222. if (val == 0)
  3223. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  3224. else if (val != vdev->wds_aging_timer_val)
  3225. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  3226. vdev->wds_aging_timer_val = val;
  3227. break;
  3228. default:
  3229. break;
  3230. }
  3231. dp_tx_vdev_update_search_flags(vdev);
  3232. }
  3233. /**
  3234. * dp_peer_set_nawds: set nawds bit in peer
  3235. * @peer_handle: pointer to peer
  3236. * @value: enable/disable nawds
  3237. *
  3238. * return: void
  3239. */
  3240. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  3241. {
  3242. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3243. peer->nawds_enabled = value;
  3244. }
  3245. /*
  3246. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  3247. * @vdev_handle: DP_VDEV handle
  3248. * @map_id:ID of map that needs to be updated
  3249. *
  3250. * Return: void
  3251. */
  3252. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  3253. uint8_t map_id)
  3254. {
  3255. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3256. vdev->dscp_tid_map_id = map_id;
  3257. return;
  3258. }
  3259. /**
  3260. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  3261. * @pdev: DP_PDEV handle
  3262. * @map_id: ID of map that needs to be updated
  3263. * @tos: index value in map
  3264. * @tid: tid value passed by the user
  3265. *
  3266. * Return: void
  3267. */
  3268. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  3269. uint8_t map_id, uint8_t tos, uint8_t tid)
  3270. {
  3271. uint8_t dscp;
  3272. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  3273. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  3274. pdev->dscp_tid_map[map_id][dscp] = tid;
  3275. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  3276. map_id, dscp);
  3277. return;
  3278. }
  3279. /**
  3280. * dp_fw_stats_process(): Process TxRX FW stats request
  3281. * @vdev_handle: DP VDEV handle
  3282. * @val: value passed by user
  3283. *
  3284. * return: int
  3285. */
  3286. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle, uint32_t val)
  3287. {
  3288. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3289. struct dp_pdev *pdev = NULL;
  3290. if (!vdev) {
  3291. DP_TRACE(NONE, "VDEV not found");
  3292. return 1;
  3293. }
  3294. pdev = vdev->pdev;
  3295. return dp_h2t_ext_stats_msg_send(pdev, val, 0, 0, 0, 0);
  3296. }
  3297. /*
  3298. * dp_txrx_stats() - function to map to firmware and host stats
  3299. * @vdev: virtual handle
  3300. * @stats: type of statistics requested
  3301. *
  3302. * Return: integer
  3303. */
  3304. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  3305. {
  3306. int host_stats;
  3307. int fw_stats;
  3308. if (stats >= CDP_TXRX_MAX_STATS)
  3309. return 0;
  3310. /*
  3311. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  3312. * has to be updated if new FW HTT stats added
  3313. */
  3314. if (stats > CDP_TXRX_STATS_HTT_MAX)
  3315. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  3316. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  3317. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  3318. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3319. "stats: %u fw_stats_type: %d host_stats_type: %d",
  3320. stats, fw_stats, host_stats);
  3321. if (fw_stats != TXRX_FW_STATS_INVALID)
  3322. return dp_fw_stats_process(vdev, fw_stats);
  3323. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  3324. (host_stats <= TXRX_HOST_STATS_MAX))
  3325. return dp_print_host_stats(vdev, host_stats);
  3326. else
  3327. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3328. "Wrong Input for TxRx Stats");
  3329. return 0;
  3330. }
  3331. /*
  3332. * dp_print_per_ring_stats(): Packet count per ring
  3333. * @soc - soc handle
  3334. */
  3335. static void dp_print_per_ring_stats(struct dp_soc *soc)
  3336. {
  3337. uint8_t core, ring;
  3338. uint64_t total_packets;
  3339. DP_TRACE(FATAL, "Reo packets per ring:");
  3340. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  3341. total_packets = 0;
  3342. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  3343. for (core = 0; core < NR_CPUS; core++) {
  3344. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  3345. core, soc->stats.rx.ring_packets[core][ring]);
  3346. total_packets += soc->stats.rx.ring_packets[core][ring];
  3347. }
  3348. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  3349. ring, total_packets);
  3350. }
  3351. }
  3352. /*
  3353. * dp_txrx_path_stats() - Function to display dump stats
  3354. * @soc - soc handle
  3355. *
  3356. * return: none
  3357. */
  3358. static void dp_txrx_path_stats(struct dp_soc *soc)
  3359. {
  3360. uint8_t error_code;
  3361. uint8_t loop_pdev;
  3362. struct dp_pdev *pdev;
  3363. uint8_t i;
  3364. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  3365. pdev = soc->pdev_list[loop_pdev];
  3366. dp_aggregate_pdev_stats(pdev);
  3367. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3368. "Tx path Statistics:");
  3369. DP_TRACE(FATAL, "from stack: %u msdus (%u bytes)",
  3370. pdev->stats.tx_i.rcvd.num,
  3371. pdev->stats.tx_i.rcvd.bytes);
  3372. DP_TRACE(FATAL, "processed from host: %u msdus (%u bytes)",
  3373. pdev->stats.tx_i.processed.num,
  3374. pdev->stats.tx_i.processed.bytes);
  3375. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%u bytes)",
  3376. pdev->stats.tx.tx_success.num,
  3377. pdev->stats.tx.tx_success.bytes);
  3378. DP_TRACE(FATAL, "Dropped in host:");
  3379. DP_TRACE(FATAL, "Total packets dropped: %u,",
  3380. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3381. DP_TRACE(FATAL, "Descriptor not available: %u",
  3382. pdev->stats.tx_i.dropped.desc_na);
  3383. DP_TRACE(FATAL, "Ring full: %u",
  3384. pdev->stats.tx_i.dropped.ring_full);
  3385. DP_TRACE(FATAL, "Enqueue fail: %u",
  3386. pdev->stats.tx_i.dropped.enqueue_fail);
  3387. DP_TRACE(FATAL, "DMA Error: %u",
  3388. pdev->stats.tx_i.dropped.dma_error);
  3389. DP_TRACE(FATAL, "Dropped in hardware:");
  3390. DP_TRACE(FATAL, "total packets dropped: %u",
  3391. pdev->stats.tx.tx_failed);
  3392. DP_TRACE(FATAL, "mpdu age out: %u",
  3393. pdev->stats.tx.dropped.mpdu_age_out);
  3394. DP_TRACE(FATAL, "firmware discard reason1: %u",
  3395. pdev->stats.tx.dropped.fw_discard_reason1);
  3396. DP_TRACE(FATAL, "firmware discard reason2: %u",
  3397. pdev->stats.tx.dropped.fw_discard_reason2);
  3398. DP_TRACE(FATAL, "firmware discard reason3: %u",
  3399. pdev->stats.tx.dropped.fw_discard_reason3);
  3400. DP_TRACE(FATAL, "peer_invalid: %u",
  3401. pdev->soc->stats.tx.tx_invalid_peer.num);
  3402. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  3403. DP_TRACE(FATAL, "Single Packet: %u",
  3404. pdev->stats.tx_comp_histogram.pkts_1);
  3405. DP_TRACE(FATAL, "2-20 Packets: %u",
  3406. pdev->stats.tx_comp_histogram.pkts_2_20);
  3407. DP_TRACE(FATAL, "21-40 Packets: %u",
  3408. pdev->stats.tx_comp_histogram.pkts_21_40);
  3409. DP_TRACE(FATAL, "41-60 Packets: %u",
  3410. pdev->stats.tx_comp_histogram.pkts_41_60);
  3411. DP_TRACE(FATAL, "61-80 Packets: %u",
  3412. pdev->stats.tx_comp_histogram.pkts_61_80);
  3413. DP_TRACE(FATAL, "81-100 Packets: %u",
  3414. pdev->stats.tx_comp_histogram.pkts_81_100);
  3415. DP_TRACE(FATAL, "101-200 Packets: %u",
  3416. pdev->stats.tx_comp_histogram.pkts_101_200);
  3417. DP_TRACE(FATAL, " 201+ Packets: %u",
  3418. pdev->stats.tx_comp_histogram.pkts_201_plus);
  3419. DP_TRACE(FATAL, "Rx path statistics");
  3420. DP_TRACE(FATAL, "delivered %u msdus ( %u bytes),",
  3421. pdev->stats.rx.to_stack.num,
  3422. pdev->stats.rx.to_stack.bytes);
  3423. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  3424. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %u bytes),",
  3425. i, pdev->stats.rx.rcvd_reo[i].num,
  3426. pdev->stats.rx.rcvd_reo[i].bytes);
  3427. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %u bytes),",
  3428. pdev->stats.rx.intra_bss.pkts.num,
  3429. pdev->stats.rx.intra_bss.pkts.bytes);
  3430. DP_TRACE(FATAL, "raw packets %u msdus ( %u bytes),",
  3431. pdev->stats.rx.raw.num,
  3432. pdev->stats.rx.raw.bytes);
  3433. DP_TRACE(FATAL, "dropped: error %u msdus",
  3434. pdev->stats.rx.err.mic_err);
  3435. DP_TRACE(FATAL, "peer invalid %u",
  3436. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  3437. DP_TRACE(FATAL, "Reo Statistics");
  3438. DP_TRACE(FATAL, "rbm error: %u msdus",
  3439. pdev->soc->stats.rx.err.invalid_rbm);
  3440. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  3441. pdev->soc->stats.rx.err.hal_ring_access_fail);
  3442. DP_TRACE(FATAL, "Reo errors");
  3443. for (error_code = 0; error_code < REO_ERROR_TYPE_MAX;
  3444. error_code++) {
  3445. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  3446. error_code,
  3447. pdev->soc->stats.rx.err.reo_error[error_code]);
  3448. }
  3449. for (error_code = 0; error_code < MAX_RXDMA_ERRORS;
  3450. error_code++) {
  3451. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  3452. error_code,
  3453. pdev->soc->stats.rx.err
  3454. .rxdma_error[error_code]);
  3455. }
  3456. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  3457. DP_TRACE(FATAL, "Single Packet: %u",
  3458. pdev->stats.rx_ind_histogram.pkts_1);
  3459. DP_TRACE(FATAL, "2-20 Packets: %u",
  3460. pdev->stats.rx_ind_histogram.pkts_2_20);
  3461. DP_TRACE(FATAL, "21-40 Packets: %u",
  3462. pdev->stats.rx_ind_histogram.pkts_21_40);
  3463. DP_TRACE(FATAL, "41-60 Packets: %u",
  3464. pdev->stats.rx_ind_histogram.pkts_41_60);
  3465. DP_TRACE(FATAL, "61-80 Packets: %u",
  3466. pdev->stats.rx_ind_histogram.pkts_61_80);
  3467. DP_TRACE(FATAL, "81-100 Packets: %u",
  3468. pdev->stats.rx_ind_histogram.pkts_81_100);
  3469. DP_TRACE(FATAL, "101-200 Packets: %u",
  3470. pdev->stats.rx_ind_histogram.pkts_101_200);
  3471. DP_TRACE(FATAL, " 201+ Packets: %u",
  3472. pdev->stats.rx_ind_histogram.pkts_201_plus);
  3473. }
  3474. }
  3475. /*
  3476. * dp_txrx_dump_stats() - Dump statistics
  3477. * @value - Statistics option
  3478. */
  3479. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value)
  3480. {
  3481. struct dp_soc *soc =
  3482. (struct dp_soc *)psoc;
  3483. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3484. if (!soc) {
  3485. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3486. "%s: soc is NULL", __func__);
  3487. return QDF_STATUS_E_INVAL;
  3488. }
  3489. switch (value) {
  3490. case CDP_TXRX_PATH_STATS:
  3491. dp_txrx_path_stats(soc);
  3492. break;
  3493. case CDP_RX_RING_STATS:
  3494. dp_print_per_ring_stats(soc);
  3495. break;
  3496. case CDP_TXRX_TSO_STATS:
  3497. /* TODO: NOT IMPLEMENTED */
  3498. break;
  3499. case CDP_DUMP_TX_FLOW_POOL_INFO:
  3500. /* TODO: NOT IMPLEMENTED */
  3501. break;
  3502. case CDP_TXRX_DESC_STATS:
  3503. /* TODO: NOT IMPLEMENTED */
  3504. break;
  3505. default:
  3506. status = QDF_STATUS_E_INVAL;
  3507. break;
  3508. }
  3509. return status;
  3510. }
  3511. static struct cdp_wds_ops dp_ops_wds = {
  3512. .vdev_set_wds = dp_vdev_set_wds,
  3513. };
  3514. /*
  3515. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3516. * @soc - datapath soc handle
  3517. * @peer - datapath peer handle
  3518. *
  3519. * Delete the AST entries belonging to a peer
  3520. */
  3521. #ifdef FEATURE_WDS
  3522. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3523. struct dp_peer *peer)
  3524. {
  3525. struct dp_ast_entry *ast_entry;
  3526. qdf_spin_lock_bh(&soc->ast_lock);
  3527. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry) {
  3528. if (ast_entry->next_hop) {
  3529. soc->cdp_soc.ol_ops->peer_del_wds_entry(
  3530. soc->osif_soc,
  3531. ast_entry->mac_addr.raw);
  3532. }
  3533. dp_peer_del_ast(soc, ast_entry);
  3534. }
  3535. qdf_spin_unlock_bh(&soc->ast_lock);
  3536. }
  3537. #else
  3538. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3539. struct dp_peer *peer)
  3540. {
  3541. }
  3542. #endif
  3543. #ifdef CONFIG_WIN
  3544. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3545. {
  3546. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  3547. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  3548. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  3549. dp_peer_delete_ast_entries(soc, peer);
  3550. }
  3551. #endif
  3552. static struct cdp_cmn_ops dp_ops_cmn = {
  3553. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  3554. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  3555. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  3556. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  3557. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  3558. .txrx_peer_create = dp_peer_create_wifi3,
  3559. .txrx_peer_setup = dp_peer_setup_wifi3,
  3560. #ifdef CONFIG_WIN
  3561. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  3562. #else
  3563. .txrx_peer_teardown = NULL,
  3564. #endif
  3565. .txrx_peer_delete = dp_peer_delete_wifi3,
  3566. .txrx_vdev_register = dp_vdev_register_wifi3,
  3567. .txrx_soc_detach = dp_soc_detach_wifi3,
  3568. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  3569. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  3570. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  3571. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  3572. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  3573. .delba_process = dp_delba_process_wifi3,
  3574. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  3575. .flush_cache_rx_queue = NULL,
  3576. /* TODO: get API's for dscp-tid need to be added*/
  3577. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  3578. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  3579. .txrx_stats = dp_txrx_stats,
  3580. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  3581. .display_stats = dp_txrx_dump_stats,
  3582. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  3583. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  3584. .txrx_intr_attach = dp_soc_interrupt_attach,
  3585. .txrx_intr_detach = dp_soc_interrupt_detach,
  3586. .set_pn_check = dp_set_pn_check_wifi3,
  3587. /* TODO: Add other functions */
  3588. };
  3589. static struct cdp_ctrl_ops dp_ops_ctrl = {
  3590. .txrx_peer_authorize = dp_peer_authorize,
  3591. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  3592. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  3593. #ifdef MESH_MODE_SUPPORT
  3594. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  3595. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  3596. #endif
  3597. .txrx_set_vdev_param = dp_set_vdev_param,
  3598. .txrx_peer_set_nawds = dp_peer_set_nawds,
  3599. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  3600. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  3601. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  3602. .txrx_update_filter_neighbour_peers =
  3603. dp_update_filter_neighbour_peers,
  3604. /* TODO: Add other functions */
  3605. .txrx_wdi_event_sub = dp_wdi_event_sub,
  3606. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  3607. };
  3608. static struct cdp_me_ops dp_ops_me = {
  3609. #ifdef ATH_SUPPORT_IQUE
  3610. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  3611. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  3612. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  3613. #endif
  3614. };
  3615. static struct cdp_mon_ops dp_ops_mon = {
  3616. .txrx_monitor_set_filter_ucast_data = NULL,
  3617. .txrx_monitor_set_filter_mcast_data = NULL,
  3618. .txrx_monitor_set_filter_non_data = NULL,
  3619. .txrx_monitor_get_filter_ucast_data = NULL,
  3620. .txrx_monitor_get_filter_mcast_data = NULL,
  3621. .txrx_monitor_get_filter_non_data = NULL,
  3622. .txrx_reset_monitor_mode = NULL,
  3623. };
  3624. static struct cdp_host_stats_ops dp_ops_host_stats = {
  3625. .txrx_per_peer_stats = dp_get_host_peer_stats,
  3626. .get_fw_peer_stats = dp_get_fw_peer_stats,
  3627. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  3628. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  3629. /* TODO */
  3630. };
  3631. static struct cdp_raw_ops dp_ops_raw = {
  3632. /* TODO */
  3633. };
  3634. #ifdef CONFIG_WIN
  3635. static struct cdp_pflow_ops dp_ops_pflow = {
  3636. /* TODO */
  3637. };
  3638. #endif /* CONFIG_WIN */
  3639. #ifdef DP_INTR_POLL_BASED
  3640. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  3641. {
  3642. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  3643. struct dp_soc *soc = pdev->soc;
  3644. qdf_timer_stop(&soc->int_timer);
  3645. return QDF_STATUS_SUCCESS;
  3646. }
  3647. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  3648. {
  3649. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  3650. struct dp_soc *soc = pdev->soc;
  3651. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  3652. return QDF_STATUS_SUCCESS;
  3653. }
  3654. #else
  3655. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  3656. {
  3657. return QDF_STATUS_SUCCESS;
  3658. }
  3659. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  3660. {
  3661. return QDF_STATUS_SUCCESS;
  3662. }
  3663. #endif /* DP_INTR_POLL_BASED */
  3664. #ifndef CONFIG_WIN
  3665. static struct cdp_misc_ops dp_ops_misc = {
  3666. .get_opmode = dp_get_opmode,
  3667. #ifdef FEATURE_RUNTIME_PM
  3668. .runtime_suspend = dp_bus_suspend,
  3669. .runtime_resume = dp_bus_resume,
  3670. #endif
  3671. };
  3672. static struct cdp_flowctl_ops dp_ops_flowctl = {
  3673. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3674. };
  3675. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  3676. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3677. };
  3678. static struct cdp_ipa_ops dp_ops_ipa = {
  3679. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3680. };
  3681. static struct cdp_bus_ops dp_ops_bus = {
  3682. .bus_suspend = dp_bus_suspend,
  3683. .bus_resume = dp_bus_resume
  3684. };
  3685. static struct cdp_ocb_ops dp_ops_ocb = {
  3686. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3687. };
  3688. static struct cdp_throttle_ops dp_ops_throttle = {
  3689. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3690. };
  3691. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  3692. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3693. };
  3694. static struct cdp_cfg_ops dp_ops_cfg = {
  3695. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  3696. };
  3697. static struct cdp_peer_ops dp_ops_peer = {
  3698. .register_peer = dp_register_peer,
  3699. .clear_peer = dp_clear_peer,
  3700. .find_peer_by_addr = dp_find_peer_by_addr,
  3701. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  3702. .local_peer_id = dp_local_peer_id,
  3703. .peer_find_by_local_id = dp_peer_find_by_local_id,
  3704. .peer_state_update = dp_peer_state_update,
  3705. .get_vdevid = dp_get_vdevid,
  3706. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  3707. .get_vdev_for_peer = dp_get_vdev_for_peer,
  3708. .get_peer_state = dp_get_peer_state,
  3709. .last_assoc_received = dp_get_last_assoc_received,
  3710. .last_disassoc_received = dp_get_last_disassoc_received,
  3711. .last_deauth_received = dp_get_last_deauth_received,
  3712. };
  3713. #endif
  3714. static struct cdp_ops dp_txrx_ops = {
  3715. .cmn_drv_ops = &dp_ops_cmn,
  3716. .ctrl_ops = &dp_ops_ctrl,
  3717. .me_ops = &dp_ops_me,
  3718. .mon_ops = &dp_ops_mon,
  3719. .host_stats_ops = &dp_ops_host_stats,
  3720. .wds_ops = &dp_ops_wds,
  3721. .raw_ops = &dp_ops_raw,
  3722. #ifdef CONFIG_WIN
  3723. .pflow_ops = &dp_ops_pflow,
  3724. #endif /* CONFIG_WIN */
  3725. #ifndef CONFIG_WIN
  3726. .misc_ops = &dp_ops_misc,
  3727. .cfg_ops = &dp_ops_cfg,
  3728. .flowctl_ops = &dp_ops_flowctl,
  3729. .l_flowctl_ops = &dp_ops_l_flowctl,
  3730. .ipa_ops = &dp_ops_ipa,
  3731. .bus_ops = &dp_ops_bus,
  3732. .ocb_ops = &dp_ops_ocb,
  3733. .peer_ops = &dp_ops_peer,
  3734. .throttle_ops = &dp_ops_throttle,
  3735. .mob_stats_ops = &dp_ops_mob_stats,
  3736. #endif
  3737. };
  3738. /*
  3739. * dp_soc_attach_wifi3() - Attach txrx SOC
  3740. * @osif_soc: Opaque SOC handle from OSIF/HDD
  3741. * @htc_handle: Opaque HTC handle
  3742. * @hif_handle: Opaque HIF handle
  3743. * @qdf_osdev: QDF device
  3744. *
  3745. * Return: DP SOC handle on success, NULL on failure
  3746. */
  3747. /*
  3748. * Local prototype added to temporarily address warning caused by
  3749. * -Wmissing-prototypes. A more correct solution, namely to expose
  3750. * a prototype in an appropriate header file, will come later.
  3751. */
  3752. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3753. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3754. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc);
  3755. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  3756. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  3757. struct ol_if_ops *ol_ops, struct wlan_objmgr_psoc *psoc)
  3758. {
  3759. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  3760. if (!soc) {
  3761. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3762. FL("DP SOC memory allocation failed"));
  3763. goto fail0;
  3764. }
  3765. soc->cdp_soc.ops = &dp_txrx_ops;
  3766. soc->cdp_soc.ol_ops = ol_ops;
  3767. soc->osif_soc = osif_soc;
  3768. soc->osdev = qdf_osdev;
  3769. soc->hif_handle = hif_handle;
  3770. soc->psoc = psoc;
  3771. soc->hal_soc = hif_get_hal_handle(hif_handle);
  3772. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  3773. soc->hal_soc, qdf_osdev);
  3774. if (!soc->htt_handle) {
  3775. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3776. FL("HTT attach failed"));
  3777. goto fail1;
  3778. }
  3779. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  3780. if (!soc->wlan_cfg_ctx) {
  3781. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3782. FL("wlan_cfg_soc_attach failed"));
  3783. goto fail2;
  3784. }
  3785. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  3786. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc,
  3787. CDP_CFG_MAX_PEER_ID);
  3788. if (ret != -EINVAL) {
  3789. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  3790. }
  3791. }
  3792. qdf_spinlock_create(&soc->peer_ref_mutex);
  3793. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3794. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3795. return (void *)soc;
  3796. fail2:
  3797. htt_soc_detach(soc->htt_handle);
  3798. fail1:
  3799. qdf_mem_free(soc);
  3800. fail0:
  3801. return NULL;
  3802. }
  3803. #if defined(CONFIG_WIN) && WDI_EVENT_ENABLE
  3804. /*
  3805. * dp_set_pktlog_wifi3() - attach txrx vdev
  3806. * @pdev: Datapath PDEV handle
  3807. * @event: which event's notifications are being subscribed to
  3808. * @enable: WDI event subscribe or not. (True or False)
  3809. *
  3810. * Return: Success, NULL on failure
  3811. */
  3812. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  3813. bool enable)
  3814. {
  3815. struct dp_soc *soc = pdev->soc;
  3816. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  3817. if (enable) {
  3818. switch (event) {
  3819. case WDI_EVENT_RX_DESC:
  3820. if (pdev->monitor_vdev) {
  3821. /* Nothing needs to be done if monitor mode is
  3822. * enabled
  3823. */
  3824. return 0;
  3825. }
  3826. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  3827. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  3828. htt_tlv_filter.mpdu_start = 1;
  3829. htt_tlv_filter.msdu_start = 1;
  3830. htt_tlv_filter.msdu_end = 1;
  3831. htt_tlv_filter.mpdu_end = 1;
  3832. htt_tlv_filter.packet_header = 1;
  3833. htt_tlv_filter.attention = 1;
  3834. htt_tlv_filter.ppdu_start = 1;
  3835. htt_tlv_filter.ppdu_end = 1;
  3836. htt_tlv_filter.ppdu_end_user_stats = 1;
  3837. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3838. htt_tlv_filter.ppdu_end_status_done = 1;
  3839. htt_tlv_filter.enable_fp = 1;
  3840. htt_h2t_rx_ring_cfg(soc->htt_handle,
  3841. pdev->pdev_id,
  3842. pdev->rxdma_mon_status_ring.hal_srng,
  3843. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  3844. &htt_tlv_filter);
  3845. }
  3846. break;
  3847. case WDI_EVENT_LITE_RX:
  3848. if (pdev->monitor_vdev) {
  3849. /* Nothing needs to be done if monitor mode is
  3850. * enabled
  3851. */
  3852. return 0;
  3853. }
  3854. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  3855. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  3856. htt_tlv_filter.ppdu_start = 1;
  3857. htt_tlv_filter.ppdu_end = 1;
  3858. htt_tlv_filter.ppdu_end_user_stats = 1;
  3859. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3860. htt_tlv_filter.ppdu_end_status_done = 1;
  3861. htt_tlv_filter.enable_fp = 1;
  3862. htt_h2t_rx_ring_cfg(soc->htt_handle,
  3863. pdev->pdev_id,
  3864. pdev->rxdma_mon_status_ring.hal_srng,
  3865. RXDMA_MONITOR_STATUS,
  3866. RX_BUFFER_SIZE_PKTLOG_LITE,
  3867. &htt_tlv_filter);
  3868. }
  3869. break;
  3870. default:
  3871. /* Nothing needs to be done for other pktlog types */
  3872. break;
  3873. }
  3874. } else {
  3875. switch (event) {
  3876. case WDI_EVENT_RX_DESC:
  3877. case WDI_EVENT_LITE_RX:
  3878. if (pdev->monitor_vdev) {
  3879. /* Nothing needs to be done if monitor mode is
  3880. * enabled
  3881. */
  3882. return 0;
  3883. }
  3884. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  3885. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  3886. /* htt_tlv_filter is initialized to 0 */
  3887. htt_h2t_rx_ring_cfg(soc->htt_handle,
  3888. pdev->pdev_id,
  3889. pdev->rxdma_mon_status_ring.hal_srng,
  3890. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE,
  3891. &htt_tlv_filter);
  3892. }
  3893. break;
  3894. default:
  3895. /* Nothing needs to be done for other pktlog types */
  3896. break;
  3897. }
  3898. }
  3899. return 0;
  3900. }
  3901. #endif