ep92.c 47 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/init.h>
  6. #include <linux/delay.h>
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/i2c.h>
  10. #include <linux/slab.h>
  11. #include <linux/fs.h>
  12. #include <linux/debugfs.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/kobject.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/tlv.h>
  19. #include <sound/soc.h>
  20. #include <linux/workqueue.h>
  21. #include "ep92.h"
  22. #define DRV_NAME "ep92_codec"
  23. #define EP92_POLL_INTERVAL_OFF_MSEC 200
  24. #define EP92_POLL_INTERVAL_ON_MSEC 20
  25. #define EP92_POLL_RUNOUT_MSEC 5000
  26. #define EP92_SYSFS_ENTRY_MAX_LEN 64
  27. #define EP92_HYST_CNT 5
  28. #define EP92_RATES (SNDRV_PCM_RATE_32000 |\
  29. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  30. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |\
  31. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
  32. #define EP92_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
  33. static const unsigned int ep92_samp_freq_table[8] = {
  34. 32000, 44100, 48000, 88200, 96000, 176400, 192000, 768000
  35. };
  36. static bool ep92_volatile_register(struct device *dev, unsigned int reg)
  37. {
  38. /* do not cache register state in regmap */
  39. return true;
  40. }
  41. static bool ep92_writeable_registers(struct device *dev, unsigned int reg)
  42. {
  43. if (reg >= EP92_ISP_MODE_ENTER_ISP && reg <= EP92_GENERAL_CONTROL_4)
  44. return true;
  45. return false;
  46. }
  47. static bool ep92_readable_registers(struct device *dev, unsigned int reg)
  48. {
  49. if (reg >= EP92_BI_VENDOR_ID_0 && reg <= EP92_MAX_REGISTER_ADDR)
  50. return true;
  51. return false;
  52. }
  53. /* codec private data */
  54. struct ep92_pdata {
  55. struct regmap *regmap;
  56. struct snd_soc_component *component;
  57. struct timer_list timer;
  58. struct work_struct read_status_worker;
  59. int irq;
  60. int poll_trig;
  61. int poll_rem;
  62. int force_inactive;
  63. int hyst_tx_plug;
  64. int hyst_link_on0;
  65. int hyst_link_on1;
  66. int hyst_link_on2;
  67. int filt_tx_plug;
  68. int filt_link_on0;
  69. int filt_link_on1;
  70. int filt_link_on2;
  71. struct {
  72. u8 tx_info;
  73. u8 video_latency;
  74. } gi; /* General Info block */
  75. struct {
  76. u8 ctl;
  77. u8 rx_sel;
  78. u8 ctl2;
  79. u8 cec_volume;
  80. u8 link;
  81. } gc; /* General Control block */
  82. struct {
  83. u8 system_status_0;
  84. u8 system_status_1;
  85. u8 audio_status;
  86. u8 cs[5];
  87. u8 cc;
  88. u8 ca;
  89. } ai; /* Audio Info block */
  90. u8 old_mode;
  91. #if IS_ENABLED(CONFIG_DEBUG_FS)
  92. struct dentry *debugfs_dir;
  93. struct dentry *debugfs_file_wo;
  94. struct dentry *debugfs_file_ro;
  95. #endif /* CONFIG_DEBUG_FS */
  96. };
  97. #if IS_ENABLED(CONFIG_DEBUG_FS)
  98. static int debugfs_codec_open_op(struct inode *inode, struct file *file)
  99. {
  100. file->private_data = inode->i_private;
  101. return 0;
  102. }
  103. static int debugfs_get_parameters(char *buf, u32 *param1, int num_of_par)
  104. {
  105. char *token;
  106. int base, cnt;
  107. token = strsep(&buf, " ");
  108. for (cnt = 0; cnt < num_of_par; cnt++) {
  109. if (token) {
  110. if ((token[1] == 'x') || (token[1] == 'X'))
  111. base = 16;
  112. else
  113. base = 10;
  114. if (kstrtou32(token, base, &param1[cnt]) != 0)
  115. return -EINVAL;
  116. token = strsep(&buf, " ");
  117. } else {
  118. return -EINVAL;
  119. }
  120. }
  121. return 0;
  122. }
  123. static ssize_t debugfs_codec_write_op(struct file *filp,
  124. const char __user *ubuf, size_t cnt, loff_t *ppos)
  125. {
  126. struct ep92_pdata *ep92 = (struct ep92_pdata *) filp->private_data;
  127. struct snd_soc_component *component = ep92->component;
  128. char lbuf[32];
  129. int rc;
  130. u32 param[2];
  131. if (!component)
  132. return -ENODEV;
  133. if (!filp || !ppos || !ubuf)
  134. return -EINVAL;
  135. if (cnt > sizeof(lbuf) - 1)
  136. return -EINVAL;
  137. rc = copy_from_user(lbuf, ubuf, cnt);
  138. if (rc)
  139. return -EFAULT;
  140. lbuf[cnt] = '\0';
  141. rc = debugfs_get_parameters(lbuf, param, 2);
  142. if ((param[0] < EP92_ISP_MODE_ENTER_ISP)
  143. || (param[0] > EP92_GENERAL_CONTROL_4)) {
  144. dev_err(component->dev, "%s: reg address 0x%02X out of range\n",
  145. __func__, param[0]);
  146. return -EINVAL;
  147. }
  148. if ((param[1] < 0) || (param[1] > 255)) {
  149. dev_err(component->dev, "%s: reg data 0x%02X out of range\n",
  150. __func__, param[1]);
  151. return -EINVAL;
  152. }
  153. if (rc == 0) {
  154. rc = cnt;
  155. dev_info(component->dev, "%s: reg[0x%02X]=0x%02X\n",
  156. __func__, param[0], param[1]);
  157. snd_soc_component_write(component, param[0], param[1]);
  158. } else {
  159. dev_err(component->dev, "%s: write to register addr=0x%02X failed\n",
  160. __func__, param[0]);
  161. }
  162. return rc;
  163. }
  164. static ssize_t debugfs_ep92_reg_show(struct snd_soc_component *component,
  165. char __user *ubuf, size_t count, loff_t *ppos)
  166. {
  167. int i, reg_val, len;
  168. ssize_t total = 0;
  169. char tmp_buf[20];
  170. if (!ubuf || !ppos || !component || *ppos < 0)
  171. return -EINVAL;
  172. for (i = (int) *ppos / 11; i <= EP92_MAX_REGISTER_ADDR; i++) {
  173. reg_val = snd_soc_component_read32(component, i);
  174. len = snprintf(tmp_buf, 20, "0x%02X: 0x%02X\n", i,
  175. (reg_val & 0xFF));
  176. if ((total + len) > count)
  177. break;
  178. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  179. dev_err(component->dev, "%s: fail to copy reg dump\n",
  180. __func__);
  181. total = -EFAULT;
  182. goto copy_err;
  183. }
  184. *ppos += len;
  185. total += len;
  186. }
  187. copy_err:
  188. return total;
  189. }
  190. static ssize_t debugfs_codec_read_op(struct file *filp,
  191. char __user *ubuf, size_t cnt, loff_t *ppos)
  192. {
  193. struct ep92_pdata *ep92 = (struct ep92_pdata *) filp->private_data;
  194. struct snd_soc_component *component = ep92->component;
  195. ssize_t ret_cnt;
  196. if (!component)
  197. return -ENODEV;
  198. if (!filp || !ppos || !ubuf || *ppos < 0)
  199. return -EINVAL;
  200. ret_cnt = debugfs_ep92_reg_show(component, ubuf, cnt, ppos);
  201. return ret_cnt;
  202. }
  203. static const struct file_operations debugfs_codec_ops = {
  204. .open = debugfs_codec_open_op,
  205. .write = debugfs_codec_write_op,
  206. .read = debugfs_codec_read_op,
  207. };
  208. #endif /* CONFIG_DEBUG_FS */
  209. static int ep92_send_uevent(struct ep92_pdata *ep92, char *event)
  210. {
  211. char *env[] = { event, NULL };
  212. if (!event || !ep92)
  213. return -EINVAL;
  214. if (!ep92->component)
  215. return -ENODEV;
  216. return kobject_uevent_env(&ep92->component->dev->kobj,
  217. KOBJ_CHANGE, env);
  218. }
  219. static int ep92_startup(struct snd_pcm_substream *substream,
  220. struct snd_soc_dai *dai)
  221. {
  222. return 0;
  223. }
  224. static void ep92_shutdown(struct snd_pcm_substream *substream,
  225. struct snd_soc_dai *dai)
  226. {
  227. }
  228. static int ep92_hw_params(struct snd_pcm_substream *substream,
  229. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  230. {
  231. return 0;
  232. }
  233. static struct snd_soc_dai_ops ep92_dai_ops = {
  234. .startup = ep92_startup,
  235. .shutdown = ep92_shutdown,
  236. .hw_params = ep92_hw_params,
  237. };
  238. static struct snd_soc_dai_driver ep92_dai[] = {
  239. {
  240. .name = "ep92-hdmi",
  241. .id = 1,
  242. .capture = {
  243. .stream_name = "HDMI Capture",
  244. .rate_max = 192000,
  245. .rate_min = 32000,
  246. .channels_min = 1,
  247. .channels_max = 8,
  248. .rates = EP92_RATES,
  249. .formats = EP92_FORMATS,
  250. },
  251. .ops = &ep92_dai_ops, /* callbacks */
  252. },
  253. {
  254. .name = "ep92-arc",
  255. .id = 2,
  256. .capture = {
  257. .stream_name = "ARC Capture",
  258. .rate_max = 192000,
  259. .rate_min = 32000,
  260. .channels_min = 1,
  261. .channels_max = 2,
  262. .rates = EP92_RATES,
  263. .formats = EP92_FORMATS,
  264. },
  265. .ops = &ep92_dai_ops, /* callbacks */
  266. },
  267. };
  268. static void ep92_read_general_control(struct snd_soc_component *component,
  269. struct ep92_pdata *ep92)
  270. {
  271. u8 old, change;
  272. int val;
  273. old = ep92->gi.tx_info;
  274. ep92->gi.tx_info = snd_soc_component_read32(component,
  275. EP92_BI_GENERAL_INFO_0);
  276. if (ep92->gi.tx_info == 0xff) {
  277. dev_dbg(component->dev, "ep92 EP92_BI_GENERAL_INFO_0 read 0xff\n");
  278. ep92->gi.tx_info = old;
  279. }
  280. /* implement hysteresis to prevent events on glitches */
  281. if (ep92->gi.tx_info & EP92_GI_TX_HOT_PLUG_MASK) {
  282. if (ep92->hyst_tx_plug < EP92_HYST_CNT) {
  283. ep92->hyst_tx_plug++;
  284. if ((ep92->hyst_tx_plug == EP92_HYST_CNT) &&
  285. (ep92->filt_tx_plug == 0)) {
  286. ep92->filt_tx_plug = 1;
  287. dev_dbg(component->dev, "ep92 out_plug changed to 1\n");
  288. ep92_send_uevent(ep92,
  289. "EP92EVT_OUT_PLUG=CONNECTED");
  290. }
  291. }
  292. } else {
  293. if (ep92->hyst_tx_plug > 0) {
  294. ep92->hyst_tx_plug--;
  295. if ((ep92->hyst_tx_plug == 0) &&
  296. (ep92->filt_tx_plug == 1)) {
  297. ep92->filt_tx_plug = 0;
  298. dev_dbg(component->dev, "ep92 out_plug changed to 0\n");
  299. ep92_send_uevent(ep92,
  300. "EP92EVT_OUT_PLUG=DISCONNECTED");
  301. }
  302. }
  303. }
  304. old = ep92->gi.video_latency;
  305. ep92->gi.video_latency = snd_soc_component_read32(component,
  306. EP92_BI_GENERAL_INFO_4);
  307. if (ep92->gi.video_latency == 0xff) {
  308. dev_dbg(component->dev, "ep92 EP92_BI_GENERAL_INFO_4 read 0xff\n");
  309. ep92->gi.video_latency = old;
  310. }
  311. change = ep92->gi.video_latency ^ old;
  312. if (change & EP92_GI_VIDEO_LATENCY_MASK) {
  313. val = ep92->gi.video_latency;
  314. if (val > 0)
  315. val = (val - 1) * 2;
  316. dev_dbg(component->dev, "ep92 video latency changed to %d\n", val);
  317. ep92_send_uevent(ep92, "EP92EVT_VIDEO_LATENCY=CHANGED");
  318. }
  319. old = ep92->gc.ctl;
  320. ep92->gc.ctl = snd_soc_component_read32(component,
  321. EP92_GENERAL_CONTROL_0);
  322. if (ep92->gc.ctl == 0xff) {
  323. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_0 read 0xff\n");
  324. ep92->gc.ctl = old;
  325. }
  326. change = ep92->gc.ctl ^ old;
  327. if (change & EP92_GC_POWER_MASK) {
  328. val = (ep92->gc.ctl >> EP92_GC_POWER_SHIFT) &
  329. EP92_2CHOICE_MASK;
  330. dev_dbg(component->dev, "ep92 power changed to %d\n", val);
  331. if (val)
  332. ep92_send_uevent(ep92, "EP92EVT_POWER=ON");
  333. else
  334. ep92_send_uevent(ep92, "EP92EVT_POWER=OFF");
  335. }
  336. if (change & EP92_GC_AUDIO_PATH_MASK) {
  337. val = (ep92->gc.ctl >> EP92_GC_AUDIO_PATH_SHIFT) &
  338. EP92_2CHOICE_MASK;
  339. dev_dbg(component->dev, "ep92 audio_path changed to %d\n", val);
  340. if (val)
  341. ep92_send_uevent(ep92, "EP92EVT_AUDIO_PATH=TV");
  342. else
  343. ep92_send_uevent(ep92, "EP92EVT_AUDIO_PATH=SPEAKER");
  344. }
  345. if (change & EP92_GC_CEC_MUTE_MASK) {
  346. val = (ep92->gc.ctl >> EP92_GC_CEC_MUTE_SHIFT) &
  347. EP92_2CHOICE_MASK;
  348. dev_dbg(component->dev, "ep92 cec_mute changed to %d\n", val);
  349. if (val)
  350. ep92_send_uevent(ep92, "EP92EVT_CEC_MUTE=NORMAL");
  351. else
  352. ep92_send_uevent(ep92, "EP92EVT_CEC_MUTE=MUTED");
  353. }
  354. if (change & EP92_GC_ARC_EN_MASK) {
  355. val = ep92->gc.ctl & EP92_2CHOICE_MASK;
  356. dev_dbg(component->dev, "ep92 arc_en changed to %d\n", val);
  357. if (val)
  358. ep92_send_uevent(ep92, "EP92EVT_ARC_EN=ON");
  359. else
  360. ep92_send_uevent(ep92, "EP92EVT_ARC_EN=OFF");
  361. }
  362. old = ep92->gc.rx_sel;
  363. ep92->gc.rx_sel = snd_soc_component_read32(component,
  364. EP92_GENERAL_CONTROL_1);
  365. if (ep92->gc.rx_sel == 0xff) {
  366. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_1 read 0xff\n");
  367. ep92->gc.rx_sel = old;
  368. }
  369. change = ep92->gc.rx_sel ^ old;
  370. if (change & EP92_GC_RX_SEL_MASK) {
  371. val = ep92->gc.rx_sel & EP92_GC_RX_SEL_MASK;
  372. dev_dbg(component->dev, "ep92 rx_sel changed to %d\n", val);
  373. ep92_send_uevent(ep92, "EP92EVT_SRC_SEL=CHANGED");
  374. }
  375. old = ep92->gc.cec_volume;
  376. ep92->gc.cec_volume = snd_soc_component_read32(component,
  377. EP92_GENERAL_CONTROL_3);
  378. if (ep92->gc.cec_volume == 0xff) {
  379. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_3 read 0xff\n");
  380. ep92->gc.cec_volume = old;
  381. }
  382. change = ep92->gc.cec_volume ^ old;
  383. if (change & EP92_GC_CEC_VOLUME_MASK) {
  384. val = ep92->gc.cec_volume & EP92_GC_CEC_VOLUME_MASK;
  385. dev_dbg(component->dev, "ep92 cec_volume changed to %d\n", val);
  386. ep92_send_uevent(ep92, "EP92EVT_CEC_VOLUME=CHANGED");
  387. }
  388. old = ep92->gc.link;
  389. ep92->gc.link = snd_soc_component_read32(component,
  390. EP92_GENERAL_CONTROL_4);
  391. if (ep92->gc.link == 0xff) {
  392. dev_dbg(component->dev, "ep92 EP92_GENERAL_CONTROL_4 read 0xff\n");
  393. ep92->gc.link = old;
  394. }
  395. /* implement hysteresis to prevent events on glitches */
  396. if (ep92->gc.link & EP92_GC_LINK_ON0_MASK) {
  397. if (ep92->hyst_link_on0 < EP92_HYST_CNT) {
  398. ep92->hyst_link_on0++;
  399. if ((ep92->hyst_link_on0 == EP92_HYST_CNT) &&
  400. (ep92->filt_link_on0 == 0)) {
  401. ep92->filt_link_on0 = 1;
  402. dev_dbg(component->dev, "ep92 link_on0 changed to 1\n");
  403. ep92_send_uevent(ep92,
  404. "EP92EVT_LINK_ON0=CONNECTED");
  405. }
  406. }
  407. } else {
  408. if (ep92->hyst_link_on0 > 0) {
  409. ep92->hyst_link_on0--;
  410. if ((ep92->hyst_link_on0 == 0) &&
  411. (ep92->filt_link_on0 == 1)) {
  412. ep92->filt_link_on0 = 0;
  413. dev_dbg(component->dev, "ep92 link_on0 changed to 0\n");
  414. ep92_send_uevent(ep92,
  415. "EP92EVT_LINK_ON0=DISCONNECTED");
  416. }
  417. }
  418. }
  419. /* implement hysteresis to prevent events on glitches */
  420. if (ep92->gc.link & EP92_GC_LINK_ON1_MASK) {
  421. if (ep92->hyst_link_on1 < EP92_HYST_CNT) {
  422. ep92->hyst_link_on1++;
  423. if ((ep92->hyst_link_on1 == EP92_HYST_CNT) &&
  424. (ep92->filt_link_on1 == 0)) {
  425. ep92->filt_link_on1 = 1;
  426. dev_dbg(component->dev, "ep92 link_on1 changed to 1\n");
  427. ep92_send_uevent(ep92,
  428. "EP92EVT_LINK_ON1=CONNECTED");
  429. }
  430. }
  431. } else {
  432. if (ep92->hyst_link_on1 > 0) {
  433. ep92->hyst_link_on1--;
  434. if ((ep92->hyst_link_on1 == 0) &&
  435. (ep92->filt_link_on1 == 1)) {
  436. ep92->filt_link_on1 = 0;
  437. dev_dbg(component->dev, "ep92 link_on1 changed to 0\n");
  438. ep92_send_uevent(ep92,
  439. "EP92EVT_LINK_ON1=DISCONNECTED");
  440. }
  441. }
  442. }
  443. /* implement hysteresis to prevent events on glitches */
  444. if (ep92->gc.link & EP92_GC_LINK_ON2_MASK) {
  445. if (ep92->hyst_link_on2 < EP92_HYST_CNT) {
  446. ep92->hyst_link_on2++;
  447. if ((ep92->hyst_link_on2 == EP92_HYST_CNT) &&
  448. (ep92->filt_link_on2 == 0)) {
  449. ep92->filt_link_on2 = 1;
  450. dev_dbg(component->dev, "ep92 link_on2 changed to 1\n");
  451. ep92_send_uevent(ep92,
  452. "EP92EVT_LINK_ON2=CONNECTED");
  453. }
  454. }
  455. } else {
  456. if (ep92->hyst_link_on2 > 0) {
  457. ep92->hyst_link_on2--;
  458. if ((ep92->hyst_link_on2 == 0) &&
  459. (ep92->filt_link_on2 == 1)) {
  460. ep92->filt_link_on2 = 0;
  461. dev_dbg(component->dev, "ep92 link_on2 changed to 0\n");
  462. ep92_send_uevent(ep92,
  463. "EP92EVT_LINK_ON2=DISCONNECTED");
  464. }
  465. }
  466. }
  467. }
  468. static void ep92_read_audio_info(struct snd_soc_component *component,
  469. struct ep92_pdata *ep92)
  470. {
  471. u8 old, change;
  472. u8 new_mode;
  473. bool send_uevent = false;
  474. old = ep92->ai.system_status_0;
  475. ep92->ai.system_status_0 = snd_soc_component_read32(component,
  476. EP92_AUDIO_INFO_SYSTEM_STATUS_0);
  477. if (ep92->ai.system_status_0 == 0xff) {
  478. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_SYSTEM_STATUS_0 read 0xff\n");
  479. ep92->ai.system_status_0 = old;
  480. }
  481. change = ep92->ai.system_status_0 ^ old;
  482. if (change & EP92_AI_MCLK_ON_MASK) {
  483. dev_dbg(component->dev, "ep92 status changed to %d\n",
  484. (ep92->ai.system_status_0 >> EP92_AI_MCLK_ON_SHIFT) &
  485. EP92_2CHOICE_MASK);
  486. send_uevent = true;
  487. }
  488. if (change & EP92_AI_AVMUTE_MASK) {
  489. dev_dbg(component->dev, "ep92 avmute changed to %d\n",
  490. (ep92->ai.system_status_0 >> EP92_AI_AVMUTE_SHIFT) &
  491. EP92_2CHOICE_MASK);
  492. send_uevent = true;
  493. }
  494. if (change & EP92_AI_LAYOUT_MASK) {
  495. dev_dbg(component->dev, "ep92 layout changed to %d\n",
  496. (ep92->ai.system_status_0) & EP92_2CHOICE_MASK);
  497. send_uevent = true;
  498. }
  499. old = ep92->ai.audio_status;
  500. ep92->ai.audio_status = snd_soc_component_read32(component,
  501. EP92_AUDIO_INFO_AUDIO_STATUS);
  502. if (ep92->ai.audio_status == 0xff) {
  503. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_AUDIO_STATUS read 0xff\n");
  504. ep92->ai.audio_status = old;
  505. }
  506. change = ep92->ai.audio_status ^ old;
  507. if (change & EP92_AI_RATE_MASK) {
  508. dev_dbg(component->dev, "ep92 rate changed to %d\n",
  509. ep92_samp_freq_table[(ep92->ai.audio_status) &
  510. EP92_AI_RATE_MASK]);
  511. send_uevent = true;
  512. }
  513. old = ep92->ai.cs[0];
  514. ep92->ai.cs[0] = snd_soc_component_read32(component,
  515. EP92_AUDIO_INFO_CHANNEL_STATUS_0);
  516. if (ep92->ai.cs[0] == 0xff) {
  517. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_CHANNEL_STATUS_0 read 0xff\n");
  518. ep92->ai.cs[0] = old;
  519. }
  520. change = ep92->ai.cs[0] ^ old;
  521. if (change & EP92_AI_PREEMPH_MASK) {
  522. dev_dbg(component->dev, "ep92 preemph changed to %d\n",
  523. (ep92->ai.cs[0] & EP92_AI_PREEMPH_MASK) >>
  524. EP92_AI_PREEMPH_SHIFT);
  525. send_uevent = true;
  526. }
  527. new_mode = ep92->old_mode;
  528. if (ep92->ai.audio_status & EP92_AI_STD_ADO_MASK) {
  529. if (ep92->ai.cs[0] & EP92_AI_NPCM_MASK)
  530. new_mode = 1; /* Compr */
  531. else
  532. new_mode = 0; /* LPCM */
  533. } else if (ep92->ai.audio_status & EP92_AI_HBR_ADO_MASK)
  534. new_mode = 1; /* Compr */
  535. if (ep92->old_mode != new_mode) {
  536. dev_dbg(component->dev, "ep92 mode changed to %d\n", new_mode);
  537. send_uevent = true;
  538. }
  539. ep92->old_mode = new_mode;
  540. old = ep92->ai.cc;
  541. ep92->ai.cc = snd_soc_component_read32(component,
  542. EP92_AUDIO_INFO_ADO_INFO_FRAME_1);
  543. if (ep92->ai.cc == 0xff) {
  544. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_ADO_INFO_FRAME_1 read 0xff\n");
  545. ep92->ai.cc = old;
  546. }
  547. change = ep92->ai.cc ^ old;
  548. if (change & EP92_AI_CH_COUNT_MASK) {
  549. dev_dbg(component->dev, "ep92 ch_count changed to %d (%d)\n",
  550. ep92->ai.cc & EP92_AI_CH_COUNT_MASK,
  551. (ep92->ai.cc & EP92_AI_CH_COUNT_MASK) == 0 ? 0 :
  552. (ep92->ai.cc & EP92_AI_CH_COUNT_MASK) + 1);
  553. send_uevent = true;
  554. }
  555. old = ep92->ai.ca;
  556. ep92->ai.ca = snd_soc_component_read32(component,
  557. EP92_AUDIO_INFO_ADO_INFO_FRAME_4);
  558. if (ep92->ai.ca == 0xff) {
  559. dev_dbg(component->dev, "ep92 EP92_AUDIO_INFO_ADO_INFO_FRAME_4 read 0xff\n");
  560. ep92->ai.ca = old;
  561. }
  562. change = ep92->ai.ca ^ old;
  563. if (change & EP92_AI_CH_ALLOC_MASK) {
  564. dev_dbg(component->dev, "ep92 ch_alloc changed to 0x%02x\n",
  565. (ep92->ai.ca) & EP92_AI_CH_ALLOC_MASK);
  566. send_uevent = true;
  567. }
  568. if (send_uevent)
  569. ep92_send_uevent(ep92, "EP92EVT_AUDIO=MEDIA_CONFIG_CHANGE");
  570. }
  571. static void ep92_init(struct snd_soc_component *component,
  572. struct ep92_pdata *ep92)
  573. {
  574. int reg0 = 0;
  575. int reg1 = 0;
  576. int reg2 = 0;
  577. int reg3 = 0;
  578. if (!ep92 || !component)
  579. return;
  580. reg0 = snd_soc_component_read32(component, EP92_BI_VERSION_YEAR);
  581. reg1 = snd_soc_component_read32(component, EP92_BI_VERSION_MONTH);
  582. reg2 = snd_soc_component_read32(component, EP92_BI_VERSION_DATE);
  583. reg3 = snd_soc_component_read32(component, EP92_BI_VERSION_NUM);
  584. dev_info(compoent->dev, "ep92 version info %02d/%02d/%02d %d\n",
  585. reg0, reg1, reg2, reg3);
  586. /* update the format information in mixer controls */
  587. ep92_read_general_control(component, ep92);
  588. ep92_read_audio_info(component, ep92);
  589. }
  590. static int ep92_probe(struct snd_soc_component *component)
  591. {
  592. struct ep92_pdata *ep92 = snd_soc_component_get_drvdata(component);
  593. ep92->component = component;
  594. ep92_init(component, ep92);
  595. /* start polling when codec is registered */
  596. mod_timer(&ep92->timer, jiffies +
  597. msecs_to_jiffies(EP92_POLL_INTERVAL_OFF_MSEC));
  598. return 0;
  599. }
  600. static void ep92_remove(struct snd_soc_component *component)
  601. {
  602. return;
  603. }
  604. static const struct snd_soc_component_driver soc_codec_drv_ep92 = {
  605. .name = DRV_NAME,
  606. .probe = ep92_probe,
  607. .remove = ep92_remove,
  608. };
  609. static struct regmap_config ep92_regmap_config = {
  610. .reg_bits = 8,
  611. .val_bits = 8,
  612. .cache_type = REGCACHE_RBTREE,
  613. .reg_defaults = ep92_reg_defaults,
  614. .num_reg_defaults = ARRAY_SIZE(ep92_reg_defaults),
  615. .max_register = EP92_MAX_REGISTER_ADDR,
  616. .volatile_reg = ep92_volatile_register,
  617. .writeable_reg = ep92_writeable_registers,
  618. .readable_reg = ep92_readable_registers,
  619. };
  620. void ep92_read_status(struct work_struct *work)
  621. {
  622. struct ep92_pdata *ep92 = container_of(work, struct ep92_pdata,
  623. read_status_worker);
  624. struct snd_soc_component *component = ep92->component;
  625. u8 val;
  626. /* No polling before component is initialized */
  627. if (component == NULL)
  628. return;
  629. if (ep92->force_inactive)
  630. return;
  631. /* check ADO_CHF that is set when audio format has changed */
  632. val = snd_soc_component_read32(component, EP92_BI_GENERAL_INFO_1);
  633. if (val == 0xff) {
  634. /* workaround for Nak'ed first read */
  635. val = snd_soc_component_read32(component,
  636. EP92_BI_GENERAL_INFO_1);
  637. if (val == 0xff)
  638. return; /* assume device not present */
  639. }
  640. if (val & EP92_GI_ADO_CHF_MASK)
  641. dev_dbg(component->dev, "ep92 audio mode change trigger.\n");
  642. if (val & EP92_GI_CEC_ECF_MASK)
  643. dev_dbg(component->dev, "ep92 CEC change trigger.\n");
  644. /* check for general control changes */
  645. ep92_read_general_control(component, ep92);
  646. /* update the format information in mixer controls */
  647. ep92_read_audio_info(component, ep92);
  648. }
  649. static irqreturn_t ep92_irq(int irq, void *data)
  650. {
  651. struct ep92_pdata *ep92 = data;
  652. struct snd_soc_component *component = ep92->component;
  653. /* Treat interrupt before component is initialized as spurious */
  654. if (component == NULL)
  655. return IRQ_NONE;
  656. dev_dbg(component->dev, "ep92_interrupt\n");
  657. ep92->poll_trig = 1;
  658. mod_timer(&ep92->timer, jiffies +
  659. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  660. schedule_work(&ep92->read_status_worker);
  661. return IRQ_HANDLED;
  662. };
  663. void ep92_poll_status(struct timer_list *t)
  664. {
  665. struct ep92_pdata *ep92 = from_timer(ep92, t, timer);
  666. struct snd_soc_component *component = ep92->component;
  667. if (ep92->force_inactive)
  668. return;
  669. /* if no IRQ is configured, always keep on polling */
  670. if (ep92->irq == 0)
  671. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  672. /* on interrupt, start polling for some time */
  673. if (ep92->poll_trig) {
  674. if (ep92->poll_rem == 0)
  675. dev_info(component->dev, "status checking activated\n");
  676. ep92->poll_trig = 0;
  677. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  678. }
  679. /*
  680. * If power_on == 0, poll only until poll_rem reaches zero and stop.
  681. * This allows to system to go to low power sleep mode.
  682. * Otherwise (power_on == 1) always re-arm timer to keep on polling.
  683. */
  684. if ((ep92->gc.ctl & EP92_GC_POWER_MASK) == 0) {
  685. if (ep92->poll_rem) {
  686. mod_timer(&ep92->timer, jiffies +
  687. msecs_to_jiffies(EP92_POLL_INTERVAL_OFF_MSEC));
  688. if (ep92->poll_rem > EP92_POLL_INTERVAL_OFF_MSEC) {
  689. ep92->poll_rem -= EP92_POLL_INTERVAL_OFF_MSEC;
  690. } else {
  691. dev_info(component->dev, "status checking stopped\n");
  692. ep92->poll_rem = 0;
  693. }
  694. }
  695. } else {
  696. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  697. mod_timer(&ep92->timer, jiffies +
  698. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  699. }
  700. schedule_work(&ep92->read_status_worker);
  701. }
  702. static const struct of_device_id ep92_of_match[] = {
  703. { .compatible = "explore,ep92a6", },
  704. { }
  705. };
  706. MODULE_DEVICE_TABLE(of, ep92_of_match);
  707. static ssize_t ep92_sysfs_rda_chipid(struct device *dev,
  708. struct device_attribute *attr, char *buf)
  709. {
  710. ssize_t ret = 0;
  711. int reg0 = 0;
  712. int reg1 = 0;
  713. int reg2 = 0;
  714. int reg3 = 0;
  715. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  716. if (!ep92 || !ep92->component) {
  717. dev_err(dev, "%s: device error\n", __func__);
  718. return -ENODEV;
  719. }
  720. reg0 = snd_soc_component_read32(ep92->component, EP92_BI_VENDOR_ID_0);
  721. reg1 = snd_soc_component_read32(ep92->component, EP92_BI_VENDOR_ID_1);
  722. reg2 = snd_soc_component_read32(ep92->component, EP92_BI_DEVICE_ID_0);
  723. reg3 = snd_soc_component_read32(ep92->component, EP92_BI_DEVICE_ID_1);
  724. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%02x%02x/%02x%02x\n",
  725. reg0, reg1, reg2, reg3);
  726. dev_dbg(dev, "%s: '%s'\n", __func__, buf);
  727. return ret;
  728. }
  729. static ssize_t ep92_sysfs_rda_version(struct device *dev,
  730. struct device_attribute *attr, char *buf)
  731. {
  732. ssize_t ret = 0;
  733. int reg0 = 0;
  734. int reg1 = 0;
  735. int reg2 = 0;
  736. int reg3 = 0;
  737. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  738. if (!ep92 || !ep92->component) {
  739. dev_err(dev, "%s: device error\n", __func__);
  740. return -ENODEV;
  741. }
  742. reg0 = snd_soc_component_read32(ep92->component,
  743. EP92_BI_VERSION_YEAR);
  744. reg1 = snd_soc_component_read32(ep92->component,
  745. EP92_BI_VERSION_MONTH);
  746. reg2 = snd_soc_component_read32(ep92->component,
  747. EP92_BI_VERSION_DATE);
  748. reg3 = snd_soc_component_read32(ep92->component,
  749. EP92_BI_VERSION_NUM);
  750. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%02d/%02d/%02d %d\n",
  751. reg0, reg1, reg2, reg3);
  752. dev_dbg(dev, "%s: '%s'\n", __func__, buf);
  753. return ret;
  754. }
  755. static ssize_t ep92_sysfs_rda_audio_state(struct device *dev,
  756. struct device_attribute *attr, char *buf)
  757. {
  758. ssize_t ret;
  759. int val;
  760. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  761. if (!ep92 || !ep92->component) {
  762. dev_err(dev, "%s: device error\n", __func__);
  763. return -ENODEV;
  764. }
  765. val = (ep92->ai.system_status_0 & EP92_AI_MCLK_ON_MASK) >>
  766. EP92_AI_MCLK_ON_SHIFT;
  767. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  768. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  769. return ret;
  770. }
  771. static ssize_t ep92_sysfs_rda_audio_format(struct device *dev,
  772. struct device_attribute *attr, char *buf)
  773. {
  774. ssize_t ret;
  775. int val;
  776. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  777. if (!ep92 || !ep92->component) {
  778. dev_err(dev, "%s: device error\n", __func__);
  779. return -ENODEV;
  780. }
  781. val = ep92->old_mode;
  782. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  783. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  784. return ret;
  785. }
  786. static ssize_t ep92_sysfs_rda_audio_rate(struct device *dev,
  787. struct device_attribute *attr, char *buf)
  788. {
  789. ssize_t ret;
  790. int val;
  791. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  792. if (!ep92 || !ep92->component) {
  793. dev_err(dev, "%s: device error\n", __func__);
  794. return -ENODEV;
  795. }
  796. val = ep92_samp_freq_table[(ep92->ai.audio_status) &
  797. EP92_AI_RATE_MASK];
  798. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  799. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  800. return ret;
  801. }
  802. static ssize_t ep92_sysfs_rda_audio_layout(struct device *dev,
  803. struct device_attribute *attr, char *buf)
  804. {
  805. ssize_t ret;
  806. int val;
  807. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  808. if (!ep92 || !ep92->component) {
  809. dev_err(dev, "%s: device error\n", __func__);
  810. return -ENODEV;
  811. }
  812. val = (ep92->ai.system_status_0 & EP92_AI_LAYOUT_MASK) >>
  813. EP92_AI_LAYOUT_SHIFT;
  814. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  815. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  816. return ret;
  817. }
  818. static ssize_t ep92_sysfs_rda_audio_ch_count(struct device *dev,
  819. struct device_attribute *attr, char *buf)
  820. {
  821. ssize_t ret;
  822. int val;
  823. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  824. if (!ep92 || !ep92->component) {
  825. dev_err(dev, "%s: device error\n", __func__);
  826. return -ENODEV;
  827. }
  828. val = ep92->ai.cc & EP92_AI_CH_COUNT_MASK;
  829. /* mapping is ch_count = reg_val + 1, with exception: 0 = unknown */
  830. if (val > 0)
  831. val += 1;
  832. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  833. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  834. return ret;
  835. }
  836. static ssize_t ep92_sysfs_rda_audio_ch_alloc(struct device *dev,
  837. struct device_attribute *attr, char *buf)
  838. {
  839. ssize_t ret;
  840. int val;
  841. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  842. if (!ep92 || !ep92->component) {
  843. dev_err(dev, "%s: device error\n", __func__);
  844. return -ENODEV;
  845. }
  846. val = ep92->ai.ca & EP92_AI_CH_ALLOC_MASK;
  847. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  848. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  849. return ret;
  850. }
  851. static ssize_t ep92_sysfs_rda_audio_preemph(struct device *dev,
  852. struct device_attribute *attr, char *buf)
  853. {
  854. ssize_t ret;
  855. int val;
  856. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  857. if (!ep92 || !ep92->component) {
  858. dev_err(dev, "%s: device error\n", __func__);
  859. return -ENODEV;
  860. }
  861. val = (ep92->ai.cs[0] & EP92_AI_PREEMPH_MASK) >>
  862. EP92_AI_PREEMPH_SHIFT;
  863. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  864. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  865. return ret;
  866. }
  867. static ssize_t ep92_sysfs_rda_avmute(struct device *dev,
  868. struct device_attribute *attr, char *buf)
  869. {
  870. ssize_t ret;
  871. int val;
  872. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  873. if (!ep92 || !ep92->component) {
  874. dev_err(dev, "%s: device error\n", __func__);
  875. return -ENODEV;
  876. }
  877. val = (ep92->ai.system_status_0 >> EP92_AI_AVMUTE_SHIFT) &
  878. EP92_2CHOICE_MASK;
  879. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  880. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  881. return ret;
  882. }
  883. static ssize_t ep92_sysfs_rda_link_on0(struct device *dev,
  884. struct device_attribute *attr, char *buf)
  885. {
  886. ssize_t ret;
  887. int val;
  888. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  889. if (!ep92 || !ep92->component) {
  890. dev_err(dev, "%s: device error\n", __func__);
  891. return -ENODEV;
  892. }
  893. val = ep92->filt_link_on0;
  894. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  895. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  896. return ret;
  897. }
  898. static ssize_t ep92_sysfs_rda_link_on1(struct device *dev,
  899. struct device_attribute *attr, char *buf)
  900. {
  901. ssize_t ret;
  902. int val;
  903. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  904. if (!ep92 || !ep92->component) {
  905. dev_err(dev, "%s: device error\n", __func__);
  906. return -ENODEV;
  907. }
  908. val = ep92->filt_link_on1;
  909. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  910. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  911. return ret;
  912. }
  913. static ssize_t ep92_sysfs_rda_link_on2(struct device *dev,
  914. struct device_attribute *attr, char *buf)
  915. {
  916. ssize_t ret;
  917. int val;
  918. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  919. if (!ep92 || !ep92->component) {
  920. dev_err(dev, "%s: device error\n", __func__);
  921. return -ENODEV;
  922. }
  923. val = ep92->filt_link_on2;
  924. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  925. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  926. return ret;
  927. }
  928. static ssize_t ep92_sysfs_rda_out_plug(struct device *dev,
  929. struct device_attribute *attr, char *buf)
  930. {
  931. ssize_t ret;
  932. int val;
  933. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  934. if (!ep92 || !ep92->component) {
  935. dev_err(dev, "%s: device error\n", __func__);
  936. return -ENODEV;
  937. }
  938. val = ep92->filt_tx_plug;
  939. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  940. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  941. return ret;
  942. }
  943. static ssize_t ep92_sysfs_rda_video_latency(struct device *dev,
  944. struct device_attribute *attr, char *buf)
  945. {
  946. ssize_t ret;
  947. int val;
  948. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  949. if (!ep92 || !ep92->component) {
  950. dev_err(dev, "%s: device error\n", __func__);
  951. return -ENODEV;
  952. }
  953. val = ep92->gi.video_latency & EP92_GI_VIDEO_LATENCY_MASK;
  954. if (val > 0)
  955. val = (val - 1) * 2;
  956. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  957. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  958. return ret;
  959. }
  960. static ssize_t ep92_sysfs_rda_arc_disable(struct device *dev,
  961. struct device_attribute *attr, char *buf)
  962. {
  963. ssize_t ret;
  964. int val;
  965. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  966. if (!ep92 || !ep92->component) {
  967. dev_err(dev, "%s: device error\n", __func__);
  968. return -ENODEV;
  969. }
  970. val = (ep92->gc.ctl2 >> EP92_GC_ARC_DIS_SHIFT) &
  971. EP92_2CHOICE_MASK;
  972. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  973. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  974. return ret;
  975. }
  976. static ssize_t ep92_sysfs_wta_arc_disable(struct device *dev,
  977. struct device_attribute *attr, const char *buf, size_t count)
  978. {
  979. int reg, val, rc;
  980. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  981. if (!ep92 || !ep92->component) {
  982. dev_err(dev, "%s: device error\n", __func__);
  983. return -ENODEV;
  984. }
  985. rc = kstrtoint(buf, 10, &val);
  986. if (rc) {
  987. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  988. goto end;
  989. }
  990. if ((val < 0) || (val > 1)) {
  991. dev_err(dev, "%s: value out of range.\n", __func__);
  992. rc = -EINVAL;
  993. goto end;
  994. }
  995. reg = snd_soc_component_read32(ep92->component,
  996. EP92_GENERAL_CONTROL_2);
  997. reg &= ~EP92_GC_ARC_DIS_MASK;
  998. reg |= ((val << EP92_GC_ARC_DIS_SHIFT) & EP92_GC_ARC_DIS_MASK);
  999. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_2, reg);
  1000. ep92->gc.ctl2 &= ~EP92_GC_ARC_DIS_MASK;
  1001. ep92->gc.ctl2 |= (val << EP92_GC_ARC_DIS_SHIFT) & EP92_GC_ARC_DIS_MASK;
  1002. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1003. end:
  1004. return rc;
  1005. }
  1006. static ssize_t ep92_sysfs_rda_power(struct device *dev,
  1007. struct device_attribute *attr, char *buf)
  1008. {
  1009. ssize_t ret;
  1010. int val;
  1011. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1012. if (!ep92 || !ep92->component) {
  1013. dev_err(dev, "%s: device error\n", __func__);
  1014. return -ENODEV;
  1015. }
  1016. val = (ep92->gc.ctl >> EP92_GC_POWER_SHIFT) & EP92_2CHOICE_MASK;
  1017. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1018. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1019. return ret;
  1020. }
  1021. static ssize_t ep92_sysfs_wta_power(struct device *dev,
  1022. struct device_attribute *attr, const char *buf, size_t count)
  1023. {
  1024. int reg, val, rc;
  1025. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1026. if (!ep92 || !ep92->component) {
  1027. dev_err(dev, "%s: device error\n", __func__);
  1028. return -ENODEV;
  1029. }
  1030. rc = kstrtoint(buf, 10, &val);
  1031. if (rc) {
  1032. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1033. goto end;
  1034. }
  1035. if ((val < 0) || (val > 1)) {
  1036. dev_err(dev, "%s: value out of range.\n", __func__);
  1037. rc = -EINVAL;
  1038. goto end;
  1039. }
  1040. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1041. reg &= ~EP92_GC_POWER_MASK;
  1042. reg |= (val << EP92_GC_POWER_SHIFT) & EP92_GC_POWER_MASK;
  1043. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1044. ep92->gc.ctl &= ~EP92_GC_POWER_MASK;
  1045. ep92->gc.ctl |= (val << EP92_GC_POWER_SHIFT) & EP92_GC_POWER_MASK;
  1046. if (val == 1) {
  1047. ep92->poll_trig = 1;
  1048. mod_timer(&ep92->timer, jiffies +
  1049. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  1050. }
  1051. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1052. end:
  1053. return rc;
  1054. }
  1055. static ssize_t ep92_sysfs_rda_audio_path(struct device *dev,
  1056. struct device_attribute *attr, char *buf)
  1057. {
  1058. ssize_t ret;
  1059. int val;
  1060. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1061. if (!ep92 || !ep92->component) {
  1062. dev_err(dev, "%s: device error\n", __func__);
  1063. return -ENODEV;
  1064. }
  1065. val = (ep92->gc.ctl >> EP92_GC_AUDIO_PATH_SHIFT) & EP92_2CHOICE_MASK;
  1066. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1067. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1068. return ret;
  1069. }
  1070. static ssize_t ep92_sysfs_wta_audio_path(struct device *dev,
  1071. struct device_attribute *attr, const char *buf, size_t count)
  1072. {
  1073. int reg, val, rc;
  1074. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1075. if (!ep92 || !ep92->component) {
  1076. dev_err(dev, "%s: device error\n", __func__);
  1077. return -ENODEV;
  1078. }
  1079. rc = kstrtoint(buf, 10, &val);
  1080. if (rc) {
  1081. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1082. goto end;
  1083. }
  1084. if ((val < 0) || (val > 1)) {
  1085. dev_err(dev, "%s: value out of range.\n", __func__);
  1086. rc = -EINVAL;
  1087. goto end;
  1088. }
  1089. reg = snd_soc_component_read32(ep92->component,
  1090. EP92_GENERAL_CONTROL_0);
  1091. reg &= ~EP92_GC_AUDIO_PATH_MASK;
  1092. reg |= (val << EP92_GC_AUDIO_PATH_SHIFT) & EP92_GC_AUDIO_PATH_MASK;
  1093. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1094. ep92->gc.ctl &= ~EP92_GC_AUDIO_PATH_MASK;
  1095. ep92->gc.ctl |= (val << EP92_GC_AUDIO_PATH_SHIFT) &
  1096. EP92_GC_AUDIO_PATH_MASK;
  1097. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1098. end:
  1099. return rc;
  1100. }
  1101. static ssize_t ep92_sysfs_rda_src_sel(struct device *dev,
  1102. struct device_attribute *attr, char *buf)
  1103. {
  1104. ssize_t ret;
  1105. int val;
  1106. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1107. if (!ep92 || !ep92->component) {
  1108. dev_err(dev, "%s: device error\n", __func__);
  1109. return -ENODEV;
  1110. }
  1111. val = ep92->gc.rx_sel & EP92_GC_RX_SEL_MASK;
  1112. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1113. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1114. return ret;
  1115. }
  1116. static ssize_t ep92_sysfs_wta_src_sel(struct device *dev,
  1117. struct device_attribute *attr, const char *buf, size_t count)
  1118. {
  1119. int reg, val, rc;
  1120. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1121. if (!ep92 || !ep92->component) {
  1122. dev_err(dev, "%s: device error\n", __func__);
  1123. return -ENODEV;
  1124. }
  1125. rc = kstrtoint(buf, 10, &val);
  1126. if (rc) {
  1127. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1128. goto end;
  1129. }
  1130. if ((val < 0) || (val > 7)) {
  1131. dev_err(dev, "%s: value out of range.\n", __func__);
  1132. rc = -EINVAL;
  1133. goto end;
  1134. }
  1135. reg = snd_soc_component_read32(ep92->component,
  1136. EP92_GENERAL_CONTROL_1);
  1137. reg &= ~EP92_GC_RX_SEL_MASK;
  1138. reg |= (val << EP92_GC_RX_SEL_SHIFT) & EP92_GC_RX_SEL_MASK;
  1139. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_1, reg);
  1140. ep92->gc.rx_sel &= ~EP92_GC_RX_SEL_MASK;
  1141. ep92->gc.rx_sel |= (val << EP92_GC_RX_SEL_SHIFT) & EP92_GC_RX_SEL_MASK;
  1142. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1143. end:
  1144. return rc;
  1145. }
  1146. static ssize_t ep92_sysfs_rda_arc_enable(struct device *dev,
  1147. struct device_attribute *attr, char *buf)
  1148. {
  1149. ssize_t ret;
  1150. int val;
  1151. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1152. if (!ep92 || !ep92->component) {
  1153. dev_err(dev, "%s: device error\n", __func__);
  1154. return -ENODEV;
  1155. }
  1156. val = (ep92->gc.ctl >> EP92_GC_ARC_EN_SHIFT) & EP92_2CHOICE_MASK;
  1157. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1158. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1159. return ret;
  1160. }
  1161. static ssize_t ep92_sysfs_wta_arc_enable(struct device *dev,
  1162. struct device_attribute *attr, const char *buf, size_t count)
  1163. {
  1164. int reg, val, rc;
  1165. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1166. if (!ep92 || !ep92->component) {
  1167. dev_err(dev, "%s: device error\n", __func__);
  1168. return -ENODEV;
  1169. }
  1170. rc = kstrtoint(buf, 10, &val);
  1171. if (rc) {
  1172. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1173. goto end;
  1174. }
  1175. if ((val < 0) || (val > 1)) {
  1176. dev_err(dev, "%s: value out of range.\n", __func__);
  1177. rc = -EINVAL;
  1178. goto end;
  1179. }
  1180. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1181. reg &= ~EP92_GC_ARC_EN_MASK;
  1182. reg |= (val << EP92_GC_ARC_EN_SHIFT) & EP92_GC_ARC_EN_MASK;
  1183. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1184. ep92->gc.ctl &= ~EP92_GC_ARC_EN_MASK;
  1185. ep92->gc.ctl |= (val << EP92_GC_ARC_EN_SHIFT) &
  1186. EP92_GC_ARC_EN_MASK;
  1187. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1188. end:
  1189. return rc;
  1190. }
  1191. static ssize_t ep92_sysfs_rda_cec_mute(struct device *dev,
  1192. struct device_attribute *attr, char *buf)
  1193. {
  1194. ssize_t ret;
  1195. int val;
  1196. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1197. if (!ep92 || !ep92->component) {
  1198. dev_err(dev, "%s: device error\n", __func__);
  1199. return -ENODEV;
  1200. }
  1201. val = (ep92->gc.ctl >> EP92_GC_CEC_MUTE_SHIFT) & EP92_2CHOICE_MASK;
  1202. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1203. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1204. return ret;
  1205. }
  1206. static ssize_t ep92_sysfs_wta_cec_mute(struct device *dev,
  1207. struct device_attribute *attr, const char *buf, size_t count)
  1208. {
  1209. int reg, val, rc;
  1210. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1211. if (!ep92 || !ep92->component) {
  1212. dev_err(dev, "%s: device error\n", __func__);
  1213. return -ENODEV;
  1214. }
  1215. rc = kstrtoint(buf, 10, &val);
  1216. if (rc) {
  1217. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1218. goto end;
  1219. }
  1220. if ((val < 0) || (val > 1)) {
  1221. dev_err(dev, "%s: value out of range.\n", __func__);
  1222. rc = -EINVAL;
  1223. goto end;
  1224. }
  1225. reg = snd_soc_component_read32(ep92->component, EP92_GENERAL_CONTROL_0);
  1226. reg &= ~EP92_GC_CEC_MUTE_MASK;
  1227. reg |= (val << EP92_GC_CEC_MUTE_SHIFT) & EP92_GC_CEC_MUTE_MASK;
  1228. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_0, reg);
  1229. ep92->gc.ctl &= ~EP92_GC_CEC_MUTE_MASK;
  1230. ep92->gc.ctl |= (val << EP92_GC_CEC_MUTE_SHIFT) &
  1231. EP92_GC_CEC_MUTE_MASK;
  1232. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1233. end:
  1234. return rc;
  1235. }
  1236. static ssize_t ep92_sysfs_rda_cec_volume(struct device *dev,
  1237. struct device_attribute *attr, char *buf)
  1238. {
  1239. ssize_t ret;
  1240. int val;
  1241. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1242. if (!ep92 || !ep92->component) {
  1243. dev_err(dev, "%s: device error\n", __func__);
  1244. return -ENODEV;
  1245. }
  1246. val = (ep92->gc.cec_volume >> EP92_GC_CEC_VOLUME_SHIFT) &
  1247. EP92_GC_CEC_VOLUME_MASK;
  1248. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1249. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1250. return ret;
  1251. }
  1252. static ssize_t ep92_sysfs_wta_cec_volume(struct device *dev,
  1253. struct device_attribute *attr, const char *buf, size_t count)
  1254. {
  1255. int reg, val, rc;
  1256. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1257. if (!ep92 || !ep92->component) {
  1258. dev_err(dev, "%s: device error\n", __func__);
  1259. return -ENODEV;
  1260. }
  1261. rc = kstrtoint(buf, 10, &val);
  1262. if (rc) {
  1263. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1264. goto end;
  1265. }
  1266. if ((val < 0) || (val > EP92_GC_CEC_VOLUME_MAX)) {
  1267. dev_err(dev, "%s: value out of range.\n", __func__);
  1268. rc = -EINVAL;
  1269. goto end;
  1270. }
  1271. reg = val & EP92_GC_CEC_VOLUME_MASK;
  1272. snd_soc_component_write(ep92->component, EP92_GENERAL_CONTROL_3, reg);
  1273. ep92->gc.cec_volume = val & EP92_GC_CEC_VOLUME_MASK;
  1274. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1275. end:
  1276. return rc;
  1277. }
  1278. static ssize_t ep92_sysfs_rda_runout(struct device *dev,
  1279. struct device_attribute *attr, char *buf)
  1280. {
  1281. ssize_t ret;
  1282. int val;
  1283. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1284. if (!ep92 || !ep92->component) {
  1285. dev_err(dev, "%s: device error\n", __func__);
  1286. return -ENODEV;
  1287. }
  1288. val = ep92->poll_rem;
  1289. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1290. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1291. return ret;
  1292. }
  1293. static ssize_t ep92_sysfs_rda_force_inactive(struct device *dev,
  1294. struct device_attribute *attr, char *buf)
  1295. {
  1296. ssize_t ret;
  1297. int val;
  1298. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1299. if (!ep92 || !ep92->component) {
  1300. dev_err(dev, "%s: device error\n", __func__);
  1301. return -ENODEV;
  1302. }
  1303. val = ep92->force_inactive;
  1304. ret = snprintf(buf, EP92_SYSFS_ENTRY_MAX_LEN, "%d\n", val);
  1305. dev_dbg(dev, "%s: '%d'\n", __func__, val);
  1306. return ret;
  1307. }
  1308. static ssize_t ep92_sysfs_wta_force_inactive(struct device *dev,
  1309. struct device_attribute *attr, const char *buf, size_t count)
  1310. {
  1311. int val, rc;
  1312. struct ep92_pdata *ep92 = dev_get_drvdata(dev);
  1313. if (!ep92 || !ep92->component) {
  1314. dev_err(dev, "%s: device error\n", __func__);
  1315. return -ENODEV;
  1316. }
  1317. rc = kstrtoint(buf, 10, &val);
  1318. if (rc) {
  1319. dev_err(dev, "%s: kstrtoint failed. rc=%d\n", __func__, rc);
  1320. goto end;
  1321. }
  1322. if ((val < 0) || (val > 1)) {
  1323. dev_err(dev, "%s: value out of range.\n", __func__);
  1324. rc = -EINVAL;
  1325. goto end;
  1326. }
  1327. if (val == 0) {
  1328. ep92->force_inactive = 0;
  1329. ep92->poll_trig = 1;
  1330. mod_timer(&ep92->timer, jiffies +
  1331. msecs_to_jiffies(EP92_POLL_INTERVAL_ON_MSEC));
  1332. } else {
  1333. ep92->force_inactive = 1;
  1334. ep92->poll_rem = 0;
  1335. }
  1336. rc = strnlen(buf, EP92_SYSFS_ENTRY_MAX_LEN);
  1337. end:
  1338. return rc;
  1339. }
  1340. static DEVICE_ATTR(chipid, 0444, ep92_sysfs_rda_chipid, NULL);
  1341. static DEVICE_ATTR(version, 0444, ep92_sysfs_rda_version, NULL);
  1342. static DEVICE_ATTR(audio_state, 0444, ep92_sysfs_rda_audio_state, NULL);
  1343. static DEVICE_ATTR(audio_format, 0444, ep92_sysfs_rda_audio_format, NULL);
  1344. static DEVICE_ATTR(audio_rate, 0444, ep92_sysfs_rda_audio_rate, NULL);
  1345. static DEVICE_ATTR(audio_layout, 0444, ep92_sysfs_rda_audio_layout, NULL);
  1346. static DEVICE_ATTR(audio_ch_count, 0444, ep92_sysfs_rda_audio_ch_count, NULL);
  1347. static DEVICE_ATTR(audio_ch_alloc, 0444, ep92_sysfs_rda_audio_ch_alloc, NULL);
  1348. static DEVICE_ATTR(audio_preemph, 0444, ep92_sysfs_rda_audio_preemph, NULL);
  1349. static DEVICE_ATTR(audio_avmute, 0444, ep92_sysfs_rda_avmute, NULL);
  1350. static DEVICE_ATTR(link_on0, 0444, ep92_sysfs_rda_link_on0, NULL);
  1351. static DEVICE_ATTR(link_on1, 0444, ep92_sysfs_rda_link_on1, NULL);
  1352. static DEVICE_ATTR(link_on2, 0444, ep92_sysfs_rda_link_on2, NULL);
  1353. static DEVICE_ATTR(out_plug, 0444, ep92_sysfs_rda_out_plug, NULL);
  1354. static DEVICE_ATTR(video_latency, 0444, ep92_sysfs_rda_video_latency, NULL);
  1355. static DEVICE_ATTR(arc_disable, 0644, ep92_sysfs_rda_arc_disable,
  1356. ep92_sysfs_wta_arc_disable);
  1357. static DEVICE_ATTR(power_on, 0644, ep92_sysfs_rda_power, ep92_sysfs_wta_power);
  1358. static DEVICE_ATTR(audio_path, 0644, ep92_sysfs_rda_audio_path,
  1359. ep92_sysfs_wta_audio_path);
  1360. static DEVICE_ATTR(src_sel, 0644, ep92_sysfs_rda_src_sel,
  1361. ep92_sysfs_wta_src_sel);
  1362. static DEVICE_ATTR(arc_enable, 0644, ep92_sysfs_rda_arc_enable,
  1363. ep92_sysfs_wta_arc_enable);
  1364. static DEVICE_ATTR(cec_mute, 0644, ep92_sysfs_rda_cec_mute,
  1365. ep92_sysfs_wta_cec_mute);
  1366. static DEVICE_ATTR(cec_volume, 0644, ep92_sysfs_rda_cec_volume,
  1367. ep92_sysfs_wta_cec_volume);
  1368. static DEVICE_ATTR(runout, 0444, ep92_sysfs_rda_runout, NULL);
  1369. static DEVICE_ATTR(force_inactive, 0644, ep92_sysfs_rda_force_inactive,
  1370. ep92_sysfs_wta_force_inactive);
  1371. static struct attribute *ep92_fs_attrs[] = {
  1372. &dev_attr_chipid.attr,
  1373. &dev_attr_version.attr,
  1374. &dev_attr_audio_state.attr,
  1375. &dev_attr_audio_format.attr,
  1376. &dev_attr_audio_rate.attr,
  1377. &dev_attr_audio_layout.attr,
  1378. &dev_attr_audio_ch_count.attr,
  1379. &dev_attr_audio_ch_alloc.attr,
  1380. &dev_attr_audio_preemph.attr,
  1381. &dev_attr_audio_avmute.attr,
  1382. &dev_attr_link_on0.attr,
  1383. &dev_attr_link_on1.attr,
  1384. &dev_attr_link_on2.attr,
  1385. &dev_attr_out_plug.attr,
  1386. &dev_attr_video_latency.attr,
  1387. &dev_attr_arc_disable.attr,
  1388. &dev_attr_power_on.attr,
  1389. &dev_attr_audio_path.attr,
  1390. &dev_attr_src_sel.attr,
  1391. &dev_attr_arc_enable.attr,
  1392. &dev_attr_cec_mute.attr,
  1393. &dev_attr_cec_volume.attr,
  1394. &dev_attr_runout.attr,
  1395. &dev_attr_force_inactive.attr,
  1396. NULL,
  1397. };
  1398. static struct attribute_group ep92_fs_attrs_group = {
  1399. .attrs = ep92_fs_attrs,
  1400. };
  1401. static int ep92_sysfs_create(struct i2c_client *client,
  1402. struct ep92_pdata *ep92)
  1403. {
  1404. int rc;
  1405. rc = sysfs_create_group(&client->dev.kobj, &ep92_fs_attrs_group);
  1406. return rc;
  1407. }
  1408. static void ep92_sysfs_remove(struct i2c_client *client,
  1409. struct ep92_pdata *ep92)
  1410. {
  1411. sysfs_remove_group(&client->dev.kobj, &ep92_fs_attrs_group);
  1412. }
  1413. static int ep92_i2c_probe(struct i2c_client *client,
  1414. const struct i2c_device_id *id)
  1415. {
  1416. struct ep92_pdata *ep92;
  1417. int ret;
  1418. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1419. char debugfs_dir_name[32];
  1420. #endif
  1421. ep92 = devm_kzalloc(&client->dev, sizeof(struct ep92_pdata),
  1422. GFP_KERNEL);
  1423. if (ep92 == NULL)
  1424. return -ENOMEM;
  1425. ep92->regmap = devm_regmap_init_i2c(client, &ep92_regmap_config);
  1426. if (IS_ERR(ep92->regmap)) {
  1427. ret = PTR_ERR(ep92->regmap);
  1428. dev_err(&client->dev,
  1429. "%s: Failed to allocate regmap for I2C device: %d\n",
  1430. __func__, ret);
  1431. return ret;
  1432. }
  1433. i2c_set_clientdata(client, ep92);
  1434. /* register interrupt handler */
  1435. INIT_WORK(&ep92->read_status_worker, ep92_read_status);
  1436. ep92->irq = client->irq;
  1437. if (ep92->irq) {
  1438. ret = devm_request_threaded_irq(&client->dev, ep92->irq,
  1439. NULL, ep92_irq, IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  1440. "ep92_irq", ep92);
  1441. if (ret) {
  1442. dev_err(&client->dev,
  1443. "%s: Failed to request IRQ %d: %d\n",
  1444. __func__, ep92->irq, ret);
  1445. ep92->irq = 0;
  1446. }
  1447. }
  1448. /* prepare timer */
  1449. timer_setup(&ep92->timer, ep92_poll_status, 0);
  1450. ep92->poll_rem = EP92_POLL_RUNOUT_MSEC;
  1451. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1452. /* debugfs interface */
  1453. snprintf(debugfs_dir_name, sizeof(debugfs_dir_name), "%s-%s",
  1454. client->name, dev_name(&client->dev));
  1455. ep92->debugfs_dir = debugfs_create_dir(debugfs_dir_name, NULL);
  1456. if (!ep92->debugfs_dir) {
  1457. dev_dbg(&client->dev,
  1458. "%s: Failed to create /sys/kernel/debug/%s for debugfs\n",
  1459. __func__, debugfs_dir_name);
  1460. return -ENOMEM;
  1461. }
  1462. ep92->debugfs_file_wo = debugfs_create_file(
  1463. "write_reg_val", S_IFREG | 0444, ep92->debugfs_dir,
  1464. (void *) ep92,
  1465. &debugfs_codec_ops);
  1466. if (!ep92->debugfs_file_wo) {
  1467. dev_dbg(&client->dev,
  1468. "%s: Failed to create /sys/kernel/debug/%s/write_reg_val\n",
  1469. __func__, debugfs_dir_name);
  1470. return -ENOMEM;
  1471. }
  1472. ep92->debugfs_file_ro = debugfs_create_file(
  1473. "show_reg_dump", S_IFREG | 0444, ep92->debugfs_dir,
  1474. (void *) ep92,
  1475. &debugfs_codec_ops);
  1476. if (!ep92->debugfs_file_ro) {
  1477. dev_dbg(&client->dev,
  1478. "%s: Failed to create /sys/kernel/debug/%s/show_reg_dump\n",
  1479. __func__, debugfs_dir_name);
  1480. return -ENOMEM;
  1481. }
  1482. #endif /* CONFIG_DEBUG_FS */
  1483. /* register component */
  1484. ret = snd_soc_register_component(&client->dev, &soc_codec_drv_ep92,
  1485. ep92_dai, ARRAY_SIZE(ep92_dai));
  1486. if (ret) {
  1487. dev_err(&client->dev, "%s %d: Failed to register CODEC: %d\n",
  1488. __func__, __LINE__, ret);
  1489. goto err_reg;
  1490. }
  1491. ret = ep92_sysfs_create(client, ep92);
  1492. if (ret) {
  1493. dev_err(&client->dev, "%s: sysfs creation failed ret=%d\n",
  1494. __func__, ret);
  1495. goto err_sysfs;
  1496. }
  1497. return 0;
  1498. err_sysfs:
  1499. snd_soc_unregister_component(&client->dev);
  1500. err_reg:
  1501. del_timer(&ep92->timer);
  1502. return ret;
  1503. }
  1504. static int ep92_i2c_remove(struct i2c_client *client)
  1505. {
  1506. struct ep92_pdata *ep92;
  1507. ep92 = i2c_get_clientdata(client);
  1508. if (ep92) {
  1509. del_timer(&ep92->timer);
  1510. #if IS_ENABLED(CONFIG_DEBUG_FS)
  1511. debugfs_remove_recursive(ep92->debugfs_dir);
  1512. #endif
  1513. }
  1514. snd_soc_unregister_component(&client->dev);
  1515. ep92_sysfs_remove(client, ep92);
  1516. return 0;
  1517. }
  1518. static const struct i2c_device_id ep92_i2c_id[] = {
  1519. { "ep92-dev", 0},
  1520. { }
  1521. };
  1522. MODULE_DEVICE_TABLE(i2c, ep92_i2c_id);
  1523. static struct i2c_driver ep92_i2c_driver = {
  1524. .probe = ep92_i2c_probe,
  1525. .remove = ep92_i2c_remove,
  1526. .id_table = ep92_i2c_id,
  1527. .driver = {
  1528. .name = "ep92",
  1529. .owner = THIS_MODULE,
  1530. .of_match_table = ep92_of_match
  1531. },
  1532. };
  1533. static int __init ep92_codec_init(void)
  1534. {
  1535. int ret = 0;
  1536. ret = i2c_add_driver(&ep92_i2c_driver);
  1537. if (ret)
  1538. pr_err("Failed to register EP92 I2C driver: %d\n", ret);
  1539. return ret;
  1540. }
  1541. module_init(ep92_codec_init);
  1542. static void __exit ep92_codec_exit(void)
  1543. {
  1544. i2c_del_driver(&ep92_i2c_driver);
  1545. }
  1546. module_exit(ep92_codec_exit);
  1547. MODULE_DESCRIPTION("EP92 HDMI repeater/switch driver");
  1548. MODULE_LICENSE("GPL v2");