msm_cvp_clocks.c 6.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include "msm_cvp_common.h"
  6. #include "cvp_hfi_api.h"
  7. #include "msm_cvp_debug.h"
  8. #include "msm_cvp_clocks.h"
  9. int msm_cvp_set_clocks(struct msm_cvp_core *core)
  10. {
  11. struct cvp_hfi_device *hdev;
  12. int rc;
  13. if (!core || !core->device) {
  14. dprintk(CVP_ERR, "%s Invalid args: %pK\n", __func__, core);
  15. return -EINVAL;
  16. }
  17. hdev = core->device;
  18. rc = call_hfi_op(hdev, scale_clocks,
  19. hdev->hfi_device_data, core->curr_freq);
  20. return rc;
  21. }
  22. int msm_cvp_mmrm_register(struct iris_hfi_device *device)
  23. {
  24. int rc = 0;
  25. struct clock_info *cl = NULL;
  26. char *name = (char *)device->mmrm_desc.client_info.desc.name;
  27. if (!device) {
  28. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  29. return -EINVAL;
  30. }
  31. device->mmrm_cvp=NULL;
  32. device->mmrm_desc.client_type=MMRM_CLIENT_CLOCK;
  33. device->mmrm_desc.priority=MMRM_CLIENT_PRIOR_LOW;
  34. device->mmrm_desc.client_info.desc.client_domain=MMRM_CLIENT_DOMAIN_CVP;
  35. iris_hfi_for_each_clock(device, cl) {
  36. if (cl->has_scaling) { /* only clk source enabled in dtsi */
  37. device->mmrm_desc.client_info.desc.clk=cl->clk;
  38. device->mmrm_desc.client_info.desc.client_id=cl->clk_id;
  39. strlcpy(name, cl->name,
  40. sizeof(device->mmrm_desc.client_info.desc.name));
  41. }
  42. }
  43. dprintk(CVP_PWR,
  44. "%s: Register for %s, clk_id %d\n",
  45. __func__, device->mmrm_desc.client_info.desc.name,
  46. device->mmrm_desc.client_info.desc.client_id);
  47. device->mmrm_cvp = mmrm_client_register(&(device->mmrm_desc));
  48. if (device->mmrm_cvp == NULL) {
  49. dprintk(CVP_ERR,
  50. "%s: Failed mmrm_client_register with mmrm_cvp: %p\n",
  51. __func__, device->mmrm_cvp);
  52. rc = -ENOENT;
  53. } else {
  54. dprintk(CVP_PWR,
  55. "%s: mmrm_client_register done: %p, type:%d, uid:%ld\n",
  56. __func__, device->mmrm_cvp,
  57. device->mmrm_cvp->client_type,
  58. device->mmrm_cvp->client_uid);
  59. }
  60. return rc;
  61. }
  62. int msm_cvp_mmrm_set_value_in_range(struct iris_hfi_device *device,
  63. u32 freq_min, u32 freq_cur)
  64. {
  65. int rc = 0;
  66. struct mmrm_client_res_value val;
  67. struct mmrm_client_data data;
  68. if (!device) {
  69. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  70. return -EINVAL;
  71. }
  72. dprintk(CVP_PWR,
  73. "%s: set clock rate for mmrm_cvp: %p, type :%d, uid: %ld\n",
  74. __func__, device->mmrm_cvp,
  75. device->mmrm_cvp->client_type, device->mmrm_cvp->client_uid);
  76. val.min = freq_min;
  77. val.cur = freq_cur;
  78. data.num_hw_blocks = 1;
  79. data.flags = 0; /* Not MMRM_CLIENT_DATA_FLAG_RESERVE_ONLY */
  80. dprintk(CVP_PWR,
  81. "%s: set clock rate to min %u cur %u: %d\n",
  82. __func__, val.min, val.cur, rc);
  83. rc = mmrm_client_set_value_in_range(device->mmrm_cvp, &data, &val);
  84. if (rc) {
  85. dprintk(CVP_ERR,
  86. "%s: Failed to set clock rate to min %u cur %u: %d\n",
  87. __func__, val.min, val.cur, rc);
  88. }
  89. return rc;
  90. }
  91. int msm_cvp_set_clocks_impl(struct iris_hfi_device *device, u32 freq)
  92. {
  93. struct clock_info *cl;
  94. int rc = 0;
  95. int fsrc2clk = 3;
  96. // ratio factor for clock source : clk
  97. u32 freq_min = device->res->allowed_clks_tbl[0].clock_rate * fsrc2clk;
  98. dprintk(CVP_PWR, "%s: entering with freq : %ld\n", __func__, freq);
  99. iris_hfi_for_each_clock(device, cl) {
  100. if (cl->has_scaling) {/* has_scaling */
  101. device->clk_freq = freq;
  102. if (msm_cvp_clock_voting)
  103. freq = msm_cvp_clock_voting;
  104. freq = freq * fsrc2clk;
  105. dprintk(CVP_PWR,
  106. "%s: clock source rate set to: %ld\n",
  107. __func__, freq);
  108. if (device->mmrm_cvp != NULL) {
  109. /* min freq : 1st element value in the table */
  110. rc = msm_cvp_mmrm_set_value_in_range(device,
  111. freq_min, freq);
  112. if (rc) {
  113. dprintk(CVP_ERR,
  114. "Failed set clock %s: %d\n",
  115. cl->name, rc);
  116. return rc;
  117. }
  118. }
  119. else {
  120. dprintk(CVP_PWR,
  121. "%s: set clock with clk_set_rate\n",
  122. __func__);
  123. rc = clk_set_rate(cl->clk, freq);
  124. if (rc) {
  125. dprintk(CVP_ERR,
  126. "Failed set clock %u %s: %d\n",
  127. freq, cl->name, rc);
  128. return rc;
  129. }
  130. dprintk(CVP_PWR, "Scaling clock %s to %u\n",
  131. cl->name, freq);
  132. }
  133. }
  134. }
  135. return 0;
  136. }
  137. int msm_cvp_scale_clocks(struct iris_hfi_device *device)
  138. {
  139. int rc = 0;
  140. struct allowed_clock_rates_table *allowed_clks_tbl = NULL;
  141. u32 rate = 0;
  142. allowed_clks_tbl = device->res->allowed_clks_tbl;
  143. rate = device->clk_freq ? device->clk_freq :
  144. allowed_clks_tbl[0].clock_rate;
  145. dprintk(CVP_PWR, "%s: scale clock rate %d\n", __func__, rate);
  146. rc = msm_cvp_set_clocks_impl(device, rate);
  147. return rc;
  148. }
  149. int msm_cvp_prepare_enable_clks(struct iris_hfi_device *device)
  150. {
  151. struct clock_info *cl = NULL, *cl_fail = NULL;
  152. int rc = 0, c = 0;
  153. if (!device) {
  154. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  155. return -EINVAL;
  156. }
  157. iris_hfi_for_each_clock(device, cl) {
  158. /*
  159. * For the clocks we control, set the rate prior to preparing
  160. * them. Since we don't really have a load at this point,
  161. * scale it to the lowest frequency possible
  162. */
  163. if (cl->has_scaling) {
  164. if (device->mmrm_cvp != NULL) {
  165. // set min freq and cur freq to 0;
  166. rc = msm_cvp_mmrm_set_value_in_range(device,
  167. 0, 0);
  168. if (rc)
  169. dprintk(CVP_ERR,
  170. "%s Failed set clock %s: %d\n",
  171. __func__, cl->name, rc);
  172. }
  173. else {
  174. dprintk(CVP_PWR,
  175. "%s: set clock with clk_set_rate\n",
  176. __func__);
  177. clk_set_rate(cl->clk,
  178. clk_round_rate(cl->clk, 0));
  179. }
  180. }
  181. rc = clk_prepare_enable(cl->clk);
  182. if (rc) {
  183. dprintk(CVP_ERR, "Failed to enable clocks\n");
  184. cl_fail = cl;
  185. goto fail_clk_enable;
  186. }
  187. c++;
  188. dprintk(CVP_PWR, "Clock: %s prepared and enabled\n",
  189. cl->name);
  190. }
  191. return rc;
  192. fail_clk_enable:
  193. iris_hfi_for_each_clock_reverse_continue(device, cl, c) {
  194. dprintk(CVP_ERR, "Clock: %s disable and unprepare\n",
  195. cl->name);
  196. clk_disable_unprepare(cl->clk);
  197. }
  198. return rc;
  199. }
  200. void msm_cvp_disable_unprepare_clks(struct iris_hfi_device *device)
  201. {
  202. struct clock_info *cl;
  203. if (!device) {
  204. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  205. return;
  206. }
  207. iris_hfi_for_each_clock_reverse(device, cl) {
  208. dprintk(CVP_PWR, "Clock: %s disable and unprepare\n",
  209. cl->name);
  210. clk_disable_unprepare(cl->clk);
  211. }
  212. }
  213. int msm_cvp_init_clocks(struct iris_hfi_device *device)
  214. {
  215. int rc = 0;
  216. struct clock_info *cl = NULL;
  217. if (!device) {
  218. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  219. return -EINVAL;
  220. }
  221. iris_hfi_for_each_clock(device, cl) {
  222. dprintk(CVP_PWR, "%s: scalable? %d, count %d\n",
  223. cl->name, cl->has_scaling, cl->count);
  224. }
  225. iris_hfi_for_each_clock(device, cl) {
  226. if (!cl->clk) {
  227. cl->clk = clk_get(&device->res->pdev->dev, cl->name);
  228. if (IS_ERR_OR_NULL(cl->clk)) {
  229. dprintk(CVP_ERR,
  230. "Failed to get clock: %s\n", cl->name);
  231. rc = PTR_ERR(cl->clk) ? : -EINVAL;
  232. cl->clk = NULL;
  233. goto err_clk_get;
  234. }
  235. }
  236. }
  237. device->clk_freq = 0;
  238. return 0;
  239. err_clk_get:
  240. msm_cvp_deinit_clocks(device);
  241. return rc;
  242. }
  243. void msm_cvp_deinit_clocks(struct iris_hfi_device *device)
  244. {
  245. struct clock_info *cl;
  246. device->clk_freq = 0;
  247. iris_hfi_for_each_clock_reverse(device, cl) {
  248. if (cl->clk) {
  249. clk_put(cl->clk);
  250. cl->clk = NULL;
  251. }
  252. }
  253. }