dp_main.c 44 KB

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  1. /*
  2. * Copyright (c) 2016 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <hal_api.h>
  21. #include <hif.h>
  22. #include <htt.h>
  23. #include <wdi_event.h>
  24. #include <queue.h>
  25. #include "dp_htt.h"
  26. #include "dp_types.h"
  27. #include "dp_internal.h"
  28. #include "dp_tx.h"
  29. #include "wlan_cfg.h"
  30. /**
  31. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  32. */
  33. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  34. int ring_type, int ring_num, int pdev_id, uint32_t num_entries)
  35. {
  36. void *hal_soc = soc->hal_soc;
  37. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  38. /* TODO: See if we should get align size from hal */
  39. uint32_t ring_base_align = 8;
  40. struct hal_srng_params ring_params;
  41. srng->hal_srng = NULL;
  42. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  43. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  44. soc->osdev, NULL, srng->alloc_size,
  45. &(srng->base_paddr_unaligned));
  46. if (!srng->base_vaddr_unaligned) {
  47. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  48. "%s: alloc failed - ring_type: %d, ring_num %d\n",
  49. __func__, ring_type, ring_num);
  50. return QDF_STATUS_E_NOMEM;
  51. }
  52. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  53. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  54. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  55. ((unsigned long)(ring_params.ring_base_vaddr) -
  56. (unsigned long)srng->base_vaddr_unaligned);
  57. ring_params.num_entries = num_entries;
  58. /* TODO: Check MSI support and get MSI settings from HIF layer */
  59. ring_params.msi_data = 0;
  60. ring_params.msi_addr = 0;
  61. /* TODO: Setup interrupt timer and batch counter thresholds for
  62. * interrupt mitigation based on ring type
  63. */
  64. ring_params.intr_timer_thres_us = 8;
  65. ring_params.intr_batch_cntr_thres_entries = 1;
  66. /* TODO: Currently hal layer takes care of endianness related settings.
  67. * See if these settings need to passed from DP layer
  68. */
  69. ring_params.flags = 0;
  70. /* Enable low threshold interrupts for rx buffer rings (regular and
  71. * monitor buffer rings.
  72. * TODO: See if this is required for any other ring
  73. */
  74. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  75. /* TODO: Setting low threshold to 1/8th of ring size
  76. * see if this needs to be configurable
  77. */
  78. ring_params.low_threshold = num_entries >> 3;
  79. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  80. }
  81. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  82. pdev_id, &ring_params);
  83. return 0;
  84. }
  85. /**
  86. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  87. * Any buffers allocated and attached to ring entries are expected to be freed
  88. * before calling this function.
  89. */
  90. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  91. int ring_type, int ring_num)
  92. {
  93. if (!srng->hal_srng) {
  94. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  95. "%s: Ring type: %d, num:%d not setup\n",
  96. __func__, ring_type, ring_num);
  97. return;
  98. }
  99. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  100. qdf_mem_free_consistent(soc->osdev, NULL,
  101. srng->alloc_size,
  102. srng->base_vaddr_unaligned,
  103. srng->base_paddr_unaligned, 0);
  104. }
  105. /* TODO: Need this interface from HIF */
  106. void *hif_get_hal_handle(void *hif_handle);
  107. /*
  108. * dp_soc_attach_wifi3() - Attach txrx SOC
  109. * @osif_soc: Opaque SOC handle from OSIF/HDD
  110. * @htc_handle: Opaque HTC handle
  111. * @hif_handle: Opaque HIF handle
  112. * @qdf_osdev: QDF device
  113. *
  114. * Return: DP SOC handle on success, NULL on failure
  115. */
  116. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  117. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  118. struct ol_if_ops *ol_ops)
  119. {
  120. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  121. if (!soc) {
  122. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  123. "%s: DP SOC memory allocation failed\n", __func__);
  124. goto fail0;
  125. }
  126. soc->osif_soc = osif_soc;
  127. soc->osdev = qdf_osdev;
  128. soc->ol_ops = ol_ops;
  129. soc->hif_handle = hif_handle;
  130. soc->hal_soc = hif_get_hal_handle(hif_handle);
  131. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  132. soc->hal_soc, qdf_osdev);
  133. if (soc->htt_handle == NULL) {
  134. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  135. "%s: HTT attach failed\n", __func__);
  136. goto fail1;
  137. }
  138. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  139. if (!soc->wlan_cfg_ctx) {
  140. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  141. "%s: wlan_cfg_soc_attach failed\n", __func__);
  142. goto fail2;
  143. }
  144. #ifdef notyet
  145. if (wdi_event_attach(soc)) {
  146. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  147. "%s: WDI event attach failed\n", __func__);
  148. goto fail2;
  149. }
  150. #endif
  151. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  152. goto fail2;
  153. }
  154. return (void *)soc;
  155. fail2:
  156. htt_soc_detach(soc->htt_handle);
  157. fail1:
  158. qdf_mem_free(soc);
  159. fail0:
  160. return NULL;
  161. }
  162. /*
  163. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  164. * @dp_ctx: DP SOC handle
  165. * @budget: Number of frames/descriptors that can be processed in one shot
  166. *
  167. * Return: remaining budget/quota for the soc device
  168. */
  169. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  170. {
  171. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  172. struct dp_soc *soc = int_ctx->soc;
  173. int ring = 0;
  174. uint32_t work_done = 0;
  175. uint32_t budget = dp_budget;
  176. uint8_t tx_mask = int_ctx->tx_ring_mask;
  177. uint8_t rx_mask = int_ctx->rx_ring_mask;
  178. /* Process Tx completion interrupts first to return back buffers */
  179. if (tx_mask) {
  180. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  181. if (tx_mask & (1 << ring)) {
  182. work_done =
  183. dp_tx_comp_handler(soc, ring, budget);
  184. budget -= work_done;
  185. if (budget <= 0)
  186. goto budget_done;
  187. }
  188. }
  189. }
  190. /* Process Rx interrupts */
  191. if (rx_mask) {
  192. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  193. if (rx_mask & (1 << ring)) {
  194. work_done =
  195. dp_rx_process(soc,
  196. soc->reo_dest_ring[ring].hal_srng,
  197. budget);
  198. budget -= work_done;
  199. if (budget <= 0)
  200. goto budget_done;
  201. }
  202. }
  203. }
  204. budget_done:
  205. return dp_budget - budget;
  206. }
  207. /* dp_interrupt_timer()- timer poll for interrupts
  208. *
  209. * @arg: SoC Handle
  210. *
  211. * Return:
  212. *
  213. */
  214. #ifdef DP_INTR_POLL_BASED
  215. void dp_interrupt_timer(void *arg)
  216. {
  217. struct dp_soc *soc = (struct dp_soc *) arg;
  218. int i;
  219. for (i = 0 ; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  220. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  221. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  222. }
  223. /*
  224. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  225. * @txrx_soc: DP SOC handle
  226. *
  227. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  228. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  229. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  230. *
  231. * Return: 0 for success. nonzero for failure.
  232. */
  233. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  234. {
  235. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  236. int i;
  237. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  238. soc->intr_ctx[i].tx_ring_mask = 0xF;
  239. soc->intr_ctx[i].rx_ring_mask = 0xF;
  240. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  241. soc->intr_ctx[i].soc = soc;
  242. }
  243. qdf_timer_init(soc->osdev, &soc->int_timer,
  244. dp_interrupt_timer, (void *)soc,
  245. QDF_TIMER_TYPE_WAKE_APPS);
  246. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  247. return QDF_STATUS_SUCCESS;
  248. }
  249. /*
  250. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  251. * @txrx_soc: DP SOC handle
  252. *
  253. * Return: void
  254. */
  255. void dp_soc_interrupt_detach(void *txrx_soc)
  256. {
  257. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  258. qdf_timer_stop(&soc->int_timer);
  259. qdf_timer_detach(&soc->int_timer);
  260. }
  261. #else
  262. /*
  263. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  264. * @txrx_soc: DP SOC handle
  265. *
  266. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  267. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  268. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  269. *
  270. * Return: 0 for success. nonzero for failure.
  271. */
  272. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  273. {
  274. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  275. int i = 0;
  276. int num_irq = 0;
  277. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  278. int tx_mask =
  279. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  280. int rx_mask =
  281. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  282. int rx_mon_mask =
  283. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  284. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  285. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  286. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  287. soc->intr_ctx[i].soc = soc;
  288. num_irq = 0;
  289. int j = 0;
  290. int ret = 0;
  291. /* Map of IRQ ids registered with one interrupt context */
  292. int irq_id_map[HIF_MAX_GRP_IRQ];
  293. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  294. if (tx_mask & (1 << j)) {
  295. irq_id_map[num_irq++] =
  296. (wbm2host_tx_completions_ring1 - j);
  297. }
  298. if (rx_mask & (1 << j)) {
  299. irq_id_map[num_irq++] =
  300. (reo2host_destination_ring1 - j);
  301. }
  302. if (rx_mon_mask & (1 << j)) {
  303. irq_id_map[num_irq++] =
  304. (rxdma2host_monitor_destination_mac1
  305. - j);
  306. }
  307. }
  308. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  309. num_irq, irq_id_map,
  310. dp_service_srngs,
  311. &soc->intr_ctx[i]);
  312. if (ret) {
  313. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  314. "%s: failed, ret = %d", __func__, ret);
  315. return QDF_STATUS_E_FAILURE;
  316. }
  317. }
  318. return QDF_STATUS_SUCCESS;
  319. }
  320. /*
  321. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  322. * @txrx_soc: DP SOC handle
  323. *
  324. * Return: void
  325. */
  326. void dp_soc_interrupt_detach(void *txrx_soc)
  327. {
  328. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  329. soc->intr_ctx[i].tx_ring_mask = 0;
  330. soc->intr_ctx[i].rx_ring_mask = 0;
  331. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  332. }
  333. #endif
  334. #define AVG_MAX_MPDUS_PER_TID 128
  335. #define AVG_TIDS_PER_CLIENT 2
  336. #define AVG_FLOWS_PER_TID 2
  337. #define AVG_MSDUS_PER_FLOW 128
  338. #define AVG_MSDUS_PER_MPDU 4
  339. /*
  340. * Allocate and setup link descriptor pool that will be used by HW for
  341. * various link and queue descriptors and managed by WBM
  342. */
  343. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  344. {
  345. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  346. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  347. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  348. uint32_t num_mpdus_per_link_desc =
  349. hal_num_mpdus_per_link_desc(soc->hal_soc);
  350. uint32_t num_msdus_per_link_desc =
  351. hal_num_msdus_per_link_desc(soc->hal_soc);
  352. uint32_t num_mpdu_links_per_queue_desc =
  353. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  354. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  355. uint32_t total_link_descs, total_mem_size;
  356. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  357. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  358. uint32_t num_link_desc_banks;
  359. uint32_t last_bank_size = 0;
  360. uint32_t entry_size, num_entries;
  361. int i;
  362. /* Only Tx queue descriptors are allocated from common link descriptor
  363. * pool Rx queue descriptors are not included in this because (REO queue
  364. * extension descriptors) they are expected to be allocated contiguously
  365. * with REO queue descriptors
  366. */
  367. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  368. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  369. num_mpdu_queue_descs = num_mpdu_link_descs /
  370. num_mpdu_links_per_queue_desc;
  371. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  372. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  373. num_msdus_per_link_desc;
  374. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  375. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  376. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  377. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  378. /* Round up to power of 2 */
  379. total_link_descs = 1;
  380. while (total_link_descs < num_entries)
  381. total_link_descs <<= 1;
  382. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  383. "%s: total_link_descs: %u, link_desc_size: %d\n",
  384. __func__, total_link_descs, link_desc_size);
  385. total_mem_size = total_link_descs * link_desc_size;
  386. total_mem_size += link_desc_align;
  387. if (total_mem_size <= max_alloc_size) {
  388. num_link_desc_banks = 0;
  389. last_bank_size = total_mem_size;
  390. } else {
  391. num_link_desc_banks = (total_mem_size) /
  392. (max_alloc_size - link_desc_align);
  393. last_bank_size = total_mem_size %
  394. (max_alloc_size - link_desc_align);
  395. }
  396. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  397. "%s: total_mem_size: %d, num_link_desc_banks: %u\n",
  398. __func__, total_mem_size, num_link_desc_banks);
  399. for (i = 0; i < num_link_desc_banks; i++) {
  400. soc->link_desc_banks[i].base_vaddr_unaligned =
  401. qdf_mem_alloc_consistent(soc->osdev, NULL,
  402. max_alloc_size,
  403. &(soc->link_desc_banks[i].base_paddr_unaligned));
  404. soc->link_desc_banks[i].size = max_alloc_size;
  405. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  406. soc->link_desc_banks[i].base_vaddr_unaligned) +
  407. ((unsigned long)(
  408. soc->link_desc_banks[i].base_vaddr_unaligned) %
  409. link_desc_align));
  410. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  411. soc->link_desc_banks[i].base_paddr_unaligned) +
  412. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  413. (unsigned long)(
  414. soc->link_desc_banks[i].base_vaddr_unaligned));
  415. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  416. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  417. "%s: Link descriptor memory alloc failed\n",
  418. __func__);
  419. goto fail;
  420. }
  421. }
  422. if (last_bank_size) {
  423. /* Allocate last bank in case total memory required is not exact
  424. * multiple of max_alloc_size
  425. */
  426. soc->link_desc_banks[i].base_vaddr_unaligned =
  427. qdf_mem_alloc_consistent(soc->osdev, NULL,
  428. last_bank_size,
  429. &(soc->link_desc_banks[i].base_paddr_unaligned));
  430. soc->link_desc_banks[i].size = last_bank_size;
  431. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  432. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  433. ((unsigned long)(
  434. soc->link_desc_banks[i].base_vaddr_unaligned) %
  435. link_desc_align));
  436. soc->link_desc_banks[i].base_paddr =
  437. (unsigned long)(
  438. soc->link_desc_banks[i].base_paddr_unaligned) +
  439. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  440. (unsigned long)(
  441. soc->link_desc_banks[i].base_vaddr_unaligned));
  442. }
  443. /* Allocate and setup link descriptor idle list for HW internal use */
  444. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  445. total_mem_size = entry_size * total_link_descs;
  446. if (total_mem_size <= max_alloc_size) {
  447. void *desc;
  448. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  449. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  450. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  451. "%s: Link desc idle ring setup failed\n",
  452. __func__);
  453. goto fail;
  454. }
  455. hal_srng_access_start_unlocked(soc->hal_soc,
  456. soc->wbm_idle_link_ring.hal_srng);
  457. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  458. soc->link_desc_banks[i].base_paddr; i++) {
  459. uint32_t num_entries = (soc->link_desc_banks[i].size -
  460. (unsigned long)(
  461. soc->link_desc_banks[i].base_vaddr) -
  462. (unsigned long)(
  463. soc->link_desc_banks[i].base_vaddr_unaligned))
  464. / link_desc_size;
  465. unsigned long paddr = (unsigned long)(
  466. soc->link_desc_banks[i].base_paddr);
  467. while (num_entries && (desc = hal_srng_src_get_next(
  468. soc->hal_soc,
  469. soc->wbm_idle_link_ring.hal_srng))) {
  470. hal_set_link_desc_addr(desc, i, paddr);
  471. num_entries--;
  472. paddr += link_desc_size;
  473. }
  474. }
  475. hal_srng_access_end_unlocked(soc->hal_soc,
  476. soc->wbm_idle_link_ring.hal_srng);
  477. } else {
  478. uint32_t num_scatter_bufs;
  479. uint32_t num_entries_per_buf;
  480. uint32_t rem_entries;
  481. uint8_t *scatter_buf_ptr;
  482. uint16_t scatter_buf_num;
  483. soc->wbm_idle_scatter_buf_size =
  484. hal_idle_list_scatter_buf_size(soc->hal_soc);
  485. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  486. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  487. num_scatter_bufs = (total_mem_size /
  488. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  489. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  490. for (i = 0; i < num_scatter_bufs; i++) {
  491. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  492. qdf_mem_alloc_consistent(soc->osdev, NULL,
  493. soc->wbm_idle_scatter_buf_size,
  494. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  495. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  496. QDF_TRACE(QDF_MODULE_ID_TXRX,
  497. QDF_TRACE_LEVEL_ERROR,
  498. "%s:Scatter list memory alloc failed\n",
  499. __func__);
  500. goto fail;
  501. }
  502. }
  503. /* Populate idle list scatter buffers with link descriptor
  504. * pointers
  505. */
  506. scatter_buf_num = 0;
  507. scatter_buf_ptr = (uint8_t *)(
  508. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  509. rem_entries = num_entries_per_buf;
  510. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  511. soc->link_desc_banks[i].base_paddr; i++) {
  512. uint32_t num_link_descs =
  513. (soc->link_desc_banks[i].size -
  514. (unsigned long)(
  515. soc->link_desc_banks[i].base_vaddr) -
  516. (unsigned long)(
  517. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  518. link_desc_size;
  519. unsigned long paddr = (unsigned long)(
  520. soc->link_desc_banks[i].base_paddr);
  521. void *desc = NULL;
  522. while (num_link_descs && (desc =
  523. hal_srng_src_get_next(soc->hal_soc,
  524. soc->wbm_idle_link_ring.hal_srng))) {
  525. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  526. i, paddr);
  527. num_link_descs--;
  528. paddr += link_desc_size;
  529. if (rem_entries) {
  530. rem_entries--;
  531. scatter_buf_ptr += link_desc_size;
  532. } else {
  533. rem_entries = num_entries_per_buf;
  534. scatter_buf_num++;
  535. scatter_buf_ptr = (uint8_t *)(
  536. soc->wbm_idle_scatter_buf_base_vaddr[
  537. scatter_buf_num]);
  538. }
  539. }
  540. }
  541. /* Setup link descriptor idle list in HW */
  542. hal_setup_link_idle_list(soc->hal_soc,
  543. soc->wbm_idle_scatter_buf_base_paddr,
  544. soc->wbm_idle_scatter_buf_base_vaddr,
  545. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  546. (uint32_t)(scatter_buf_ptr - (unsigned long)(
  547. soc->wbm_idle_scatter_buf_base_vaddr[
  548. scatter_buf_num])));
  549. }
  550. return 0;
  551. fail:
  552. if (soc->wbm_idle_link_ring.hal_srng) {
  553. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  554. WBM_IDLE_LINK, 0);
  555. }
  556. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  557. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  558. qdf_mem_free_consistent(soc->osdev, NULL,
  559. soc->wbm_idle_scatter_buf_size,
  560. soc->wbm_idle_scatter_buf_base_vaddr[i],
  561. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  562. }
  563. }
  564. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  565. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  566. qdf_mem_free_consistent(soc->osdev, NULL,
  567. soc->link_desc_banks[i].size,
  568. soc->link_desc_banks[i].base_vaddr_unaligned,
  569. soc->link_desc_banks[i].base_paddr_unaligned,
  570. 0);
  571. }
  572. }
  573. return QDF_STATUS_E_FAILURE;
  574. }
  575. /*
  576. * Free link descriptor pool that was setup HW
  577. */
  578. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  579. {
  580. int i;
  581. if (soc->wbm_idle_link_ring.hal_srng) {
  582. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  583. WBM_IDLE_LINK, 0);
  584. }
  585. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  586. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  587. qdf_mem_free_consistent(soc->osdev, NULL,
  588. soc->wbm_idle_scatter_buf_size,
  589. soc->wbm_idle_scatter_buf_base_vaddr[i],
  590. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  591. }
  592. }
  593. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  594. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  595. qdf_mem_free_consistent(soc->osdev, NULL,
  596. soc->link_desc_banks[i].size,
  597. soc->link_desc_banks[i].base_vaddr_unaligned,
  598. soc->link_desc_banks[i].base_paddr_unaligned,
  599. 0);
  600. }
  601. }
  602. }
  603. /* TODO: Following should be configurable */
  604. #define WBM_RELEASE_RING_SIZE 64
  605. #define TCL_DATA_RING_SIZE 512
  606. #define TCL_CMD_RING_SIZE 32
  607. #define TCL_STATUS_RING_SIZE 32
  608. #define REO_DST_RING_SIZE 2048
  609. #define REO_REINJECT_RING_SIZE 32
  610. #define RX_RELEASE_RING_SIZE 256
  611. #define REO_EXCEPTION_RING_SIZE 128
  612. #define REO_CMD_RING_SIZE 32
  613. #define REO_STATUS_RING_SIZE 32
  614. #define RXDMA_BUF_RING_SIZE 8192
  615. #define RXDMA_MONITOR_BUF_RING_SIZE 8192
  616. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  617. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  618. /*
  619. * dp_soc_cmn_setup() - Common SoC level initializion
  620. * @soc: Datapath SOC handle
  621. *
  622. * This is an internal function used to setup common SOC data structures,
  623. * to be called from PDEV attach after receiving HW mode capabilities from FW
  624. */
  625. static int dp_soc_cmn_setup(struct dp_soc *soc)
  626. {
  627. int i;
  628. if (soc->cmn_init_done)
  629. return 0;
  630. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  631. if (!soc->wlan_cfg_ctx) {
  632. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  633. "%s: wlan_cfg_soc_attach failed\n", __func__);
  634. goto fail0;
  635. }
  636. if (dp_peer_find_attach(soc))
  637. goto fail0;
  638. if (dp_hw_link_desc_pool_setup(soc))
  639. goto fail1;
  640. /* Setup SRNG rings */
  641. /* Common rings */
  642. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  643. WBM_RELEASE_RING_SIZE)) {
  644. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  645. "%s: dp_srng_setup failed for wbm_desc_rel_ring\n",
  646. __func__);
  647. goto fail1;
  648. }
  649. soc->num_tcl_data_rings = 0;
  650. /* Tx data rings */
  651. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  652. soc->num_tcl_data_rings =
  653. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  654. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  655. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  656. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  657. QDF_TRACE(QDF_MODULE_ID_TXRX,
  658. QDF_TRACE_LEVEL_ERROR,
  659. "%s: dp_srng_setup failed for tcl_data_ring[%d]\n",
  660. __func__, i);
  661. goto fail1;
  662. }
  663. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  664. WBM2SW_RELEASE, i, 0, TCL_DATA_RING_SIZE)) {
  665. QDF_TRACE(QDF_MODULE_ID_TXRX,
  666. QDF_TRACE_LEVEL_ERROR,
  667. "%s: dp_srng_setup failed for tx_comp_ring[%d]\n",
  668. __func__, i);
  669. goto fail1;
  670. }
  671. }
  672. } else {
  673. /* This will be incremented during per pdev ring setup */
  674. soc->num_tcl_data_rings = 0;
  675. }
  676. if (dp_tx_soc_attach(soc)) {
  677. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  678. "%s: dp_tx_soc_attach failed\n", __func__);
  679. goto fail1;
  680. }
  681. /* TCL command and status rings */
  682. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  683. TCL_CMD_RING_SIZE)) {
  684. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  685. "%s: dp_srng_setup failed for tcl_cmd_ring\n",
  686. __func__);
  687. goto fail1;
  688. }
  689. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  690. TCL_STATUS_RING_SIZE)) {
  691. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  692. "%s: dp_srng_setup failed for tcl_status_ring\n",
  693. __func__);
  694. goto fail1;
  695. }
  696. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  697. * descriptors
  698. */
  699. /* Rx data rings */
  700. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  701. soc->num_reo_dest_rings =
  702. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  703. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  704. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  705. i, 0, REO_DST_RING_SIZE)) {
  706. QDF_TRACE(QDF_MODULE_ID_TXRX,
  707. QDF_TRACE_LEVEL_ERROR,
  708. "%s: dp_srng_setup failed for reo_dest_ring[%d]\n",
  709. __func__, i);
  710. goto fail1;
  711. }
  712. }
  713. } else {
  714. /* This will be incremented during per pdev ring setup */
  715. soc->num_reo_dest_rings = 0;
  716. }
  717. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  718. /* REO reinjection ring */
  719. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  720. REO_REINJECT_RING_SIZE)) {
  721. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  722. "%s: dp_srng_setup failed for reo_reinject_ring\n",
  723. __func__);
  724. goto fail1;
  725. }
  726. /* Rx release ring */
  727. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  728. RX_RELEASE_RING_SIZE)) {
  729. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  730. "%s: dp_srng_setup failed for rx_rel_ring\n",
  731. __func__);
  732. goto fail1;
  733. }
  734. /* Rx exception ring */
  735. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  736. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  737. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  738. "%s: dp_srng_setup failed for reo_exception_ring\n",
  739. __func__);
  740. goto fail1;
  741. }
  742. /* REO command and status rings */
  743. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  744. REO_CMD_RING_SIZE)) {
  745. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  746. "%s: dp_srng_setup failed for reo_cmd_ring\n",
  747. __func__);
  748. goto fail1;
  749. }
  750. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  751. REO_STATUS_RING_SIZE)) {
  752. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  753. "%s: dp_srng_setup failed for reo_status_ring\n",
  754. __func__);
  755. goto fail1;
  756. }
  757. /* Setup HW REO */
  758. hal_reo_setup(soc->hal_soc);
  759. soc->cmn_init_done = 1;
  760. return 0;
  761. fail1:
  762. /*
  763. * Cleanup will be done as part of soc_detach, which will
  764. * be called on pdev attach failure
  765. */
  766. fail0:
  767. return QDF_STATUS_E_FAILURE;
  768. }
  769. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force);
  770. /*
  771. * dp_pdev_attach_wifi3() - attach txrx pdev
  772. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  773. * @txrx_soc: Datapath SOC handle
  774. * @htc_handle: HTC handle for host-target interface
  775. * @qdf_osdev: QDF OS device
  776. * @pdev_id: PDEV ID
  777. *
  778. * Return: DP PDEV handle on success, NULL on failure
  779. */
  780. void *dp_pdev_attach_wifi3(void *txrx_soc, void *ctrl_pdev,
  781. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, int pdev_id)
  782. {
  783. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  784. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  785. if (!pdev) {
  786. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  787. "%s: DP PDEV memory allocation failed\n", __func__);
  788. goto fail0;
  789. }
  790. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  791. if (!pdev->wlan_cfg_ctx) {
  792. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  793. "%s: pdev cfg_attach failed\n", __func__);
  794. qdf_mem_free(pdev);
  795. goto fail0;
  796. }
  797. pdev->soc = soc;
  798. pdev->osif_pdev = ctrl_pdev;
  799. pdev->pdev_id = pdev_id;
  800. soc->pdev_list[pdev_id] = pdev;
  801. TAILQ_INIT(&pdev->vdev_list);
  802. pdev->vdev_count = 0;
  803. if (dp_soc_cmn_setup(soc)) {
  804. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  805. "%s: dp_soc_cmn_setup failed\n", __func__);
  806. goto fail1;
  807. }
  808. /* Setup per PDEV TCL rings if configured */
  809. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  810. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  811. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  812. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  813. "%s: dp_srng_setup failed for tcl_data_ring\n",
  814. __func__);
  815. goto fail1;
  816. }
  817. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  818. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  819. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  820. "%s: dp_srng_setup failed for tx_comp_ring\n",
  821. __func__);
  822. goto fail1;
  823. }
  824. soc->num_tcl_data_rings++;
  825. }
  826. /* Tx specific init */
  827. if (dp_tx_pdev_attach(pdev)) {
  828. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  829. "%s: dp_tx_pdev_attach failed\n", __func__);
  830. goto fail1;
  831. }
  832. /* Setup per PDEV REO rings if configured */
  833. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  834. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  835. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  836. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  837. "%s: dp_srng_setup failed for reo_dest_ring\n",
  838. __func__);
  839. goto fail1;
  840. }
  841. soc->num_reo_dest_rings++;
  842. }
  843. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  844. RXDMA_BUF_RING_SIZE)) {
  845. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  846. "%s: dp_srng_setup failed rx refill ring\n", __func__);
  847. goto fail1;
  848. }
  849. #ifdef QCA_HOST2FW_RXBUF_RING
  850. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1, pdev_id,
  851. RXDMA_BUF_RING_SIZE)) {
  852. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  853. "%s: dp_srng_setup failed rx mac ring\n", __func__);
  854. goto fail1;
  855. }
  856. #endif
  857. /* TODO: RXDMA destination ring is not planned to be used currently.
  858. * Setup the ring when required
  859. */
  860. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  861. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  862. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  863. "%s: dp_srng_setup failed for rxdma_mon_buf_ring\n",
  864. __func__);
  865. goto fail1;
  866. }
  867. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  868. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  869. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  870. "%s: dp_srng_setup failed for rxdma_mon_dst_ring\n",
  871. __func__);
  872. goto fail1;
  873. }
  874. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  875. RXDMA_MONITOR_STATUS, 0, pdev_id,
  876. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  877. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  878. "%s: dp_srng_setup failed for rxdma_mon_status_ring\n",
  879. __func__);
  880. goto fail1;
  881. }
  882. return (void *)pdev;
  883. fail1:
  884. dp_pdev_detach_wifi3((void *)pdev, 0);
  885. fail0:
  886. return NULL;
  887. }
  888. /*
  889. * dp_pdev_detach_wifi3() - detach txrx pdev
  890. * @txrx_pdev: Datapath PDEV handle
  891. * @force: Force detach
  892. *
  893. */
  894. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force)
  895. {
  896. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  897. struct dp_soc *soc = pdev->soc;
  898. dp_tx_pdev_detach(pdev);
  899. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  900. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  901. TCL_DATA, pdev->pdev_id);
  902. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  903. WBM2SW_RELEASE, pdev->pdev_id);
  904. }
  905. /* Setup per PDEV REO rings if configured */
  906. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  907. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  908. REO_DST, pdev->pdev_id);
  909. }
  910. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  911. #ifdef QCA_HOST2FW_RXBUF_RING
  912. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1);
  913. #endif
  914. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  915. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  916. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  917. RXDMA_MONITOR_STATUS, 0);
  918. soc->pdev_list[pdev->pdev_id] = NULL;
  919. qdf_mem_free(pdev);
  920. }
  921. /*
  922. * dp_soc_detach_wifi3() - Detach txrx SOC
  923. * @txrx_soc: DP SOC handle
  924. *
  925. */
  926. void dp_soc_detach_wifi3(void *txrx_soc)
  927. {
  928. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  929. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  930. int i;
  931. soc->cmn_init_done = 0;
  932. for (i = 0; i < MAX_PDEV_CNT; i++) {
  933. if (soc->pdev_list[i])
  934. dp_pdev_detach_wifi3((void *)pdev, 1);
  935. }
  936. dp_peer_find_detach(soc);
  937. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  938. * SW descriptors
  939. */
  940. /* Free the ring memories */
  941. /* Common rings */
  942. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  943. /* Tx data rings */
  944. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  945. dp_tx_soc_detach(soc);
  946. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  947. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  948. TCL_DATA, i);
  949. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  950. WBM2SW_RELEASE, i);
  951. }
  952. }
  953. /* TCL command and status rings */
  954. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  955. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  956. /* Rx data rings */
  957. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  958. soc->num_reo_dest_rings =
  959. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  960. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  961. /* TODO: Get number of rings and ring sizes
  962. * from wlan_cfg
  963. */
  964. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  965. REO_DST, i);
  966. }
  967. }
  968. /* REO reinjection ring */
  969. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  970. /* Rx release ring */
  971. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  972. /* Rx exception ring */
  973. /* TODO: Better to store ring_type and ring_num in
  974. * dp_srng during setup
  975. */
  976. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  977. /* REO command and status rings */
  978. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  979. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  980. htt_soc_detach(soc->htt_handle);
  981. }
  982. /*
  983. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  984. * @txrx_soc: Datapath SOC handle
  985. */
  986. int dp_soc_attach_target_wifi3(void *txrx_soc)
  987. {
  988. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  989. int i;
  990. htt_soc_attach_target(soc->htt_handle);
  991. for (i = 0; i < MAX_PDEV_CNT; i++) {
  992. struct dp_pdev *pdev = soc->pdev_list[i];
  993. if (pdev) {
  994. htt_srng_setup(soc->htt_handle, i,
  995. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  996. #ifdef QCA_HOST2FW_RXBUF_RING
  997. htt_srng_setup(soc->htt_handle, i,
  998. pdev->rx_mac_buf_ring.hal_srng, RXDMA_BUF);
  999. #endif
  1000. #ifdef notyet /* FW doesn't handle monitor rings yet */
  1001. htt_srng_setup(soc->htt_handle, i,
  1002. pdev->rxdma_mon_buf_ring.hal_srng,
  1003. RXDMA_MONITOR_BUF);
  1004. htt_srng_setup(soc->htt_handle, i,
  1005. pdev->rxdma_mon_dst_ring.hal_srng,
  1006. RXDMA_MONITOR_DST);
  1007. htt_srng_setup(soc->htt_handle, i,
  1008. pdev->rxdma_mon_status_ring.hal_srng,
  1009. RXDMA_MONITOR_STATUS);
  1010. #endif
  1011. }
  1012. }
  1013. return 0;
  1014. }
  1015. /*
  1016. * dp_vdev_attach_wifi3() - attach txrx vdev
  1017. * @txrx_pdev: Datapath PDEV handle
  1018. * @vdev_mac_addr: MAC address of the virtual interface
  1019. * @vdev_id: VDEV Id
  1020. * @wlan_op_mode: VDEV operating mode
  1021. *
  1022. * Return: DP VDEV handle on success, NULL on failure
  1023. */
  1024. void *dp_vdev_attach_wifi3(void *txrx_pdev,
  1025. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1026. {
  1027. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1028. struct dp_soc *soc = pdev->soc;
  1029. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1030. if (!vdev) {
  1031. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1032. "%s: DP VDEV memory allocation failed\n", __func__);
  1033. goto fail0;
  1034. }
  1035. vdev->pdev = pdev;
  1036. vdev->vdev_id = vdev_id;
  1037. vdev->opmode = op_mode;
  1038. vdev->osdev = soc->osdev;
  1039. vdev->osif_rx = NULL;
  1040. vdev->osif_rx_mon = NULL;
  1041. vdev->osif_vdev = NULL;
  1042. vdev->delete.pending = 0;
  1043. vdev->safemode = 0;
  1044. vdev->drop_unenc = 1;
  1045. #ifdef notyet
  1046. vdev->filters_num = 0;
  1047. #endif
  1048. qdf_mem_copy(
  1049. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1050. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1051. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1052. /* TODO: Initialize default HTT meta data that will be used in
  1053. * TCL descriptors for packets transmitted from this VDEV
  1054. */
  1055. TAILQ_INIT(&vdev->peer_list);
  1056. /* add this vdev into the pdev's list */
  1057. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1058. pdev->vdev_count++;
  1059. dp_tx_vdev_attach(vdev);
  1060. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1061. "Created vdev %p (%02x:%02x:%02x:%02x:%02x:%02x)\n", vdev,
  1062. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1063. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1064. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1065. return (void *)vdev;
  1066. fail0:
  1067. return NULL;
  1068. }
  1069. /**
  1070. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1071. * @vdev: Datapath VDEV handle
  1072. * @osif_vdev: OSIF vdev handle
  1073. * @txrx_ops: Tx and Rx operations
  1074. *
  1075. * Return: DP VDEV handle on success, NULL on failure
  1076. */
  1077. void dp_vdev_register_wifi3(void *vdev_handle, void *osif_vdev,
  1078. struct ol_txrx_ops *txrx_ops)
  1079. {
  1080. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1081. vdev->osif_vdev = osif_vdev;
  1082. vdev->osif_rx = txrx_ops->rx.rx;
  1083. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1084. #ifdef notyet
  1085. #if ATH_SUPPORT_WAPI
  1086. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1087. #endif
  1088. #if UMAC_SUPPORT_PROXY_ARP
  1089. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1090. #endif
  1091. #endif
  1092. #ifdef notyet
  1093. /* TODO: Enable the following once Tx code is integrated */
  1094. txrx_ops->tx.tx = dp_tx_send;
  1095. #endif
  1096. }
  1097. /*
  1098. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1099. * @txrx_vdev: Datapath VDEV handle
  1100. * @callback: Callback OL_IF on completion of detach
  1101. * @cb_context: Callback context
  1102. *
  1103. */
  1104. void dp_vdev_detach_wifi3(void *vdev_handle,
  1105. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1106. {
  1107. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1108. struct dp_pdev *pdev = vdev->pdev;
  1109. struct dp_soc *soc = pdev->soc;
  1110. /* preconditions */
  1111. qdf_assert(vdev);
  1112. /* remove the vdev from its parent pdev's list */
  1113. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1114. /*
  1115. * Use peer_ref_mutex while accessing peer_list, in case
  1116. * a peer is in the process of being removed from the list.
  1117. */
  1118. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1119. /* check that the vdev has no peers allocated */
  1120. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1121. /* debug print - will be removed later */
  1122. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1123. "%s: not deleting vdev object %p (%02x:%02x:%02x:%02x:%02x:%02x)"
  1124. "until deletion finishes for all its peers\n",
  1125. __func__, vdev,
  1126. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1127. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1128. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1129. /* indicate that the vdev needs to be deleted */
  1130. vdev->delete.pending = 1;
  1131. vdev->delete.callback = callback;
  1132. vdev->delete.context = cb_context;
  1133. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1134. return;
  1135. }
  1136. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1137. dp_tx_vdev_detach(vdev);
  1138. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1139. "%s: deleting vdev object %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1140. __func__, vdev,
  1141. vdev->mac_addr.raw[0], vdev->mac_addr.raw[1],
  1142. vdev->mac_addr.raw[2], vdev->mac_addr.raw[3],
  1143. vdev->mac_addr.raw[4], vdev->mac_addr.raw[5]);
  1144. qdf_mem_free(vdev);
  1145. if (callback)
  1146. callback(cb_context);
  1147. }
  1148. /*
  1149. * dp_peer_attach_wifi3() - attach txrx peer
  1150. * @txrx_vdev: Datapath VDEV handle
  1151. * @peer_mac_addr: Peer MAC address
  1152. *
  1153. * Return: DP peeer handle on success, NULL on failure
  1154. */
  1155. void *dp_peer_attach_wifi3(void *vdev_handle, uint8_t *peer_mac_addr)
  1156. {
  1157. struct dp_peer *peer;
  1158. int i;
  1159. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1160. struct dp_pdev *pdev;
  1161. struct dp_soc *soc;
  1162. /* preconditions */
  1163. qdf_assert(vdev);
  1164. qdf_assert(peer_mac_addr);
  1165. pdev = vdev->pdev;
  1166. soc = pdev->soc;
  1167. #ifdef notyet
  1168. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1169. soc->mempool_ol_ath_peer);
  1170. #else
  1171. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1172. #endif
  1173. if (!peer)
  1174. return NULL; /* failure */
  1175. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1176. /* store provided params */
  1177. peer->vdev = vdev;
  1178. qdf_mem_copy(
  1179. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1180. /* TODO: See of rx_opt_proc is really required */
  1181. peer->rx_opt_proc = soc->rx_opt_proc;
  1182. dp_peer_rx_init(pdev, peer);
  1183. /* initialize the peer_id */
  1184. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1185. peer->peer_ids[i] = HTT_INVALID_PEER;
  1186. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1187. qdf_atomic_init(&peer->ref_cnt);
  1188. /* keep one reference for attach */
  1189. qdf_atomic_inc(&peer->ref_cnt);
  1190. /* add this peer into the vdev's list */
  1191. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1192. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1193. /* TODO: See if hash based search is required */
  1194. dp_peer_find_hash_add(soc, peer);
  1195. if (soc->ol_ops->peer_set_default_routing) {
  1196. /* TODO: Check on the destination ring number to be passed
  1197. * to FW
  1198. */
  1199. soc->ol_ops->peer_set_default_routing(soc->osif_soc,
  1200. peer->mac_addr.raw, peer->vdev->vdev_id, 0, 1);
  1201. }
  1202. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1203. "vdev %p created peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1204. vdev, peer,
  1205. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1206. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1207. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1208. /*
  1209. * For every peer MAp message search and set if bss_peer
  1210. */
  1211. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1212. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1213. "vdev bss_peer!!!!\n");
  1214. peer->bss_peer = 1;
  1215. vdev->vap_bss_peer = peer;
  1216. }
  1217. return (void *)peer;
  1218. }
  1219. /*
  1220. * dp_peer_authorize() - authorize txrx peer
  1221. * @peer_handle: Datapath peer handle
  1222. * @authorize
  1223. *
  1224. */
  1225. void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1226. {
  1227. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1228. struct dp_soc *soc;
  1229. if (peer != NULL) {
  1230. soc = peer->vdev->pdev->soc;
  1231. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1232. peer->authorize = authorize ? 1 : 0;
  1233. #ifdef notyet /* ATH_BAND_STEERING */
  1234. peer->peer_bs_inact_flag = 0;
  1235. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1236. #endif
  1237. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1238. }
  1239. }
  1240. /*
  1241. * dp_peer_unref_delete() - unref and delete peer
  1242. * @peer_handle: Datapath peer handle
  1243. *
  1244. */
  1245. void dp_peer_unref_delete(void *peer_handle)
  1246. {
  1247. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1248. struct dp_vdev *vdev = peer->vdev;
  1249. struct dp_soc *soc = vdev->pdev->soc;
  1250. struct dp_peer *tmppeer;
  1251. int found = 0;
  1252. uint16_t peer_id;
  1253. /*
  1254. * Hold the lock all the way from checking if the peer ref count
  1255. * is zero until the peer references are removed from the hash
  1256. * table and vdev list (if the peer ref count is zero).
  1257. * This protects against a new HL tx operation starting to use the
  1258. * peer object just after this function concludes it's done being used.
  1259. * Furthermore, the lock needs to be held while checking whether the
  1260. * vdev's list of peers is empty, to make sure that list is not modified
  1261. * concurrently with the empty check.
  1262. */
  1263. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1264. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1265. peer_id = peer->peer_ids[0];
  1266. /*
  1267. * Make sure that the reference to the peer in
  1268. * peer object map is removed
  1269. */
  1270. if (peer_id != HTT_INVALID_PEER)
  1271. soc->peer_id_to_obj_map[peer_id] = NULL;
  1272. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1273. "Deleting peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n",
  1274. peer, peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1275. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1276. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1277. /* remove the reference to the peer from the hash table */
  1278. dp_peer_find_hash_remove(soc, peer);
  1279. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1280. if (tmppeer == peer) {
  1281. found = 1;
  1282. break;
  1283. }
  1284. }
  1285. if (found) {
  1286. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1287. peer_list_elem);
  1288. } else {
  1289. /*Ignoring the remove operation as peer not found*/
  1290. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1291. "WARN peer %p not found in vdev (%p)->peer_list:%p\n",
  1292. peer, vdev, &peer->vdev->peer_list);
  1293. }
  1294. /* cleanup the Rx reorder queues for this peer */
  1295. dp_peer_rx_cleanup(vdev, peer);
  1296. /* check whether the parent vdev has no peers left */
  1297. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1298. /*
  1299. * Now that there are no references to the peer, we can
  1300. * release the peer reference lock.
  1301. */
  1302. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1303. /*
  1304. * Check if the parent vdev was waiting for its peers
  1305. * to be deleted, in order for it to be deleted too.
  1306. */
  1307. if (vdev->delete.pending) {
  1308. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1309. vdev->delete.callback;
  1310. void *vdev_delete_context =
  1311. vdev->delete.context;
  1312. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1313. QDF_TRACE_LEVEL_INFO_HIGH,
  1314. "%s: deleting vdev object %p "
  1315. "(%02x:%02x:%02x:%02x:%02x:%02x)"
  1316. " - its last peer is done\n",
  1317. __func__, vdev,
  1318. vdev->mac_addr.raw[0],
  1319. vdev->mac_addr.raw[1],
  1320. vdev->mac_addr.raw[2],
  1321. vdev->mac_addr.raw[3],
  1322. vdev->mac_addr.raw[4],
  1323. vdev->mac_addr.raw[5]);
  1324. /* all peers are gone, go ahead and delete it */
  1325. qdf_mem_free(vdev);
  1326. if (vdev_delete_cb)
  1327. vdev_delete_cb(vdev_delete_context);
  1328. }
  1329. } else {
  1330. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1331. }
  1332. #ifdef notyet
  1333. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1334. #else
  1335. qdf_mem_free(peer);
  1336. #endif
  1337. #ifdef notyet /* See why this should be done in DP layer */
  1338. qdf_atomic_inc(&soc->peer_count);
  1339. #endif
  1340. } else {
  1341. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1342. }
  1343. }
  1344. /*
  1345. * dp_peer_detach_wifi3() – Detach txrx peer
  1346. * @peer_handle: Datapath peer handle
  1347. *
  1348. */
  1349. void dp_peer_detach_wifi3(void *peer_handle)
  1350. {
  1351. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1352. /* redirect the peer's rx delivery function to point to a
  1353. * discard func
  1354. */
  1355. peer->rx_opt_proc = dp_rx_discard;
  1356. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1357. "%s:peer %p (%02x:%02x:%02x:%02x:%02x:%02x)\n", __func__, peer,
  1358. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  1359. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  1360. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  1361. /*
  1362. * Remove the reference added during peer_attach.
  1363. * The peer will still be left allocated until the
  1364. * PEER_UNMAP message arrives to remove the other
  1365. * reference, added by the PEER_MAP message.
  1366. */
  1367. dp_peer_unref_delete(peer_handle);
  1368. }