sm6150.c 236 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <dsp/audio_notifier.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wcd937x/wcd937x-mbhc.h"
  39. #include "codecs/wsa881x.h"
  40. #include "codecs/bolero/bolero-cdc.h"
  41. #include <dt-bindings/sound/audio-codec-port-types.h>
  42. #include "codecs/bolero/wsa-macro.h"
  43. #include "codecs/wcd937x/internal.h"
  44. #define DRV_NAME "sm6150-asoc-snd"
  45. #define __CHIPSET__ "SM6150 "
  46. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  47. #define SAMPLING_RATE_8KHZ 8000
  48. #define SAMPLING_RATE_11P025KHZ 11025
  49. #define SAMPLING_RATE_16KHZ 16000
  50. #define SAMPLING_RATE_22P05KHZ 22050
  51. #define SAMPLING_RATE_32KHZ 32000
  52. #define SAMPLING_RATE_44P1KHZ 44100
  53. #define SAMPLING_RATE_48KHZ 48000
  54. #define SAMPLING_RATE_88P2KHZ 88200
  55. #define SAMPLING_RATE_96KHZ 96000
  56. #define SAMPLING_RATE_176P4KHZ 176400
  57. #define SAMPLING_RATE_192KHZ 192000
  58. #define SAMPLING_RATE_352P8KHZ 352800
  59. #define SAMPLING_RATE_384KHZ 384000
  60. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  61. #define WCD9XXX_MBHC_DEF_RLOADS 5
  62. #define CODEC_EXT_CLK_RATE 9600000
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define DEV_NAME_STR_LEN 32
  65. #define WSA8810_NAME_1 "wsa881x.20170211"
  66. #define WSA8810_NAME_2 "wsa881x.20170212"
  67. #define WCN_CDC_SLIM_RX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX 3
  69. #define TDM_CHANNEL_MAX 8
  70. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  71. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  72. #define MSM_HIFI_ON 1
  73. enum {
  74. SLIM_RX_0 = 0,
  75. SLIM_RX_1,
  76. SLIM_RX_2,
  77. SLIM_RX_3,
  78. SLIM_RX_4,
  79. SLIM_RX_5,
  80. SLIM_RX_6,
  81. SLIM_RX_7,
  82. SLIM_RX_MAX,
  83. };
  84. enum {
  85. SLIM_TX_0 = 0,
  86. SLIM_TX_1,
  87. SLIM_TX_2,
  88. SLIM_TX_3,
  89. SLIM_TX_4,
  90. SLIM_TX_5,
  91. SLIM_TX_6,
  92. SLIM_TX_7,
  93. SLIM_TX_8,
  94. SLIM_TX_MAX,
  95. };
  96. enum {
  97. PRIM_MI2S = 0,
  98. SEC_MI2S,
  99. TERT_MI2S,
  100. QUAT_MI2S,
  101. QUIN_MI2S,
  102. MI2S_MAX,
  103. };
  104. enum {
  105. PRIM_AUX_PCM = 0,
  106. SEC_AUX_PCM,
  107. TERT_AUX_PCM,
  108. QUAT_AUX_PCM,
  109. QUIN_AUX_PCM,
  110. AUX_PCM_MAX,
  111. };
  112. enum {
  113. WSA_CDC_DMA_RX_0 = 0,
  114. WSA_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_0,
  116. RX_CDC_DMA_RX_1,
  117. RX_CDC_DMA_RX_2,
  118. RX_CDC_DMA_RX_3,
  119. RX_CDC_DMA_RX_5,
  120. CDC_DMA_RX_MAX,
  121. };
  122. enum {
  123. WSA_CDC_DMA_TX_0 = 0,
  124. WSA_CDC_DMA_TX_1,
  125. WSA_CDC_DMA_TX_2,
  126. TX_CDC_DMA_TX_0,
  127. TX_CDC_DMA_TX_3,
  128. TX_CDC_DMA_TX_4,
  129. CDC_DMA_TX_MAX,
  130. };
  131. struct mi2s_conf {
  132. struct mutex lock;
  133. u32 ref_cnt;
  134. u32 msm_is_mi2s_master;
  135. };
  136. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  137. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  141. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  142. };
  143. struct dev_config {
  144. u32 sample_rate;
  145. u32 bit_format;
  146. u32 channels;
  147. };
  148. enum {
  149. DP_RX_IDX = 0,
  150. EXT_DISP_RX_IDX_MAX,
  151. };
  152. struct msm_wsa881x_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct aux_codec_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. enum pinctrl_pin_state {
  161. STATE_DISABLE = 0, /* All pins are in sleep state */
  162. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  163. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  164. };
  165. struct msm_pinctrl_info {
  166. struct pinctrl *pinctrl;
  167. struct pinctrl_state *mi2s_disable;
  168. struct pinctrl_state *tdm_disable;
  169. struct pinctrl_state *mi2s_active;
  170. struct pinctrl_state *tdm_active;
  171. enum pinctrl_pin_state curr_state;
  172. };
  173. struct msm_asoc_mach_data {
  174. struct snd_info_entry *codec_root;
  175. struct msm_pinctrl_info pinctrl_info;
  176. int usbc_en2_gpio; /* used by gpio driver API */
  177. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  178. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  179. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  180. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  181. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  182. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  183. };
  184. struct msm_asoc_wcd93xx_codec {
  185. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  186. enum afe_config_type config_type);
  187. };
  188. static const char *const pin_states[] = {"sleep", "i2s-active",
  189. "tdm-active"};
  190. static struct snd_soc_card snd_soc_card_sm6150_msm;
  191. enum {
  192. TDM_0 = 0,
  193. TDM_1,
  194. TDM_2,
  195. TDM_3,
  196. TDM_4,
  197. TDM_5,
  198. TDM_6,
  199. TDM_7,
  200. TDM_PORT_MAX,
  201. };
  202. enum {
  203. TDM_PRI = 0,
  204. TDM_SEC,
  205. TDM_TERT,
  206. TDM_QUAT,
  207. TDM_QUIN,
  208. TDM_INTERFACE_MAX,
  209. };
  210. struct tdm_port {
  211. u32 mode;
  212. u32 channel;
  213. };
  214. /* TDM default config */
  215. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  216. { /* PRI TDM */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  225. },
  226. { /* SEC TDM */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  235. },
  236. { /* TERT TDM */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  245. },
  246. { /* QUAT TDM */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  255. },
  256. { /* QUIN TDM */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  265. }
  266. };
  267. /* TDM default config */
  268. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  269. { /* PRI TDM */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  278. },
  279. { /* SEC TDM */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  288. },
  289. { /* TERT TDM */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  298. },
  299. { /* QUAT TDM */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  308. },
  309. { /* QUIN TDM */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  318. }
  319. };
  320. /* Default configuration of slimbus channels */
  321. static struct dev_config slim_rx_cfg[] = {
  322. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. };
  331. static struct dev_config slim_tx_cfg[] = {
  332. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  341. };
  342. /* Default configuration of Codec DMA Interface Tx */
  343. static struct dev_config cdc_dma_rx_cfg[] = {
  344. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. };
  352. /* Default configuration of Codec DMA Interface Rx */
  353. static struct dev_config cdc_dma_tx_cfg[] = {
  354. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. };
  361. /* Default configuration of external display BE */
  362. static struct dev_config ext_disp_rx_cfg[] = {
  363. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  364. };
  365. static struct dev_config usb_rx_cfg = {
  366. .sample_rate = SAMPLING_RATE_48KHZ,
  367. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  368. .channels = 2,
  369. };
  370. static struct dev_config usb_tx_cfg = {
  371. .sample_rate = SAMPLING_RATE_48KHZ,
  372. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  373. .channels = 1,
  374. };
  375. static struct dev_config proxy_rx_cfg = {
  376. .sample_rate = SAMPLING_RATE_48KHZ,
  377. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  378. .channels = 2,
  379. };
  380. /* Default configuration of MI2S channels */
  381. static struct dev_config mi2s_rx_cfg[] = {
  382. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  387. };
  388. static struct dev_config mi2s_tx_cfg[] = {
  389. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. };
  395. static struct dev_config aux_pcm_rx_cfg[] = {
  396. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. };
  402. static struct dev_config aux_pcm_tx_cfg[] = {
  403. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  408. };
  409. static int msm_vi_feed_tx_ch = 2;
  410. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  411. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  412. "Five", "Six", "Seven",
  413. "Eight"};
  414. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  415. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  416. "S32_LE"};
  417. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  418. "S24_3LE"};
  419. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  420. "KHZ_32", "KHZ_44P1", "KHZ_48",
  421. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  422. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  423. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  424. "KHZ_44P1", "KHZ_48",
  425. "KHZ_88P2", "KHZ_96"};
  426. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  427. "Five", "Six", "Seven",
  428. "Eight"};
  429. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  430. "Six", "Seven", "Eight"};
  431. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  432. "KHZ_16", "KHZ_22P05",
  433. "KHZ_32", "KHZ_44P1", "KHZ_48",
  434. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  435. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  436. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  437. "KHZ_192", "KHZ_32", "KHZ_44P1",
  438. "KHZ_88P2", "KHZ_176P4" };
  439. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  440. "Five", "Six", "Seven", "Eight"};
  441. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  442. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  443. "KHZ_48", "KHZ_176P4",
  444. "KHZ_352P8"};
  445. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  446. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  447. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  448. "KHZ_48", "KHZ_96", "KHZ_192"};
  449. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  450. "Five", "Six", "Seven",
  451. "Eight"};
  452. static const char *const hifi_text[] = {"Off", "On"};
  453. static const char *const qos_text[] = {"Disable", "Enable"};
  454. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  455. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  456. "Five", "Six", "Seven",
  457. "Eight"};
  458. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  459. "KHZ_16", "KHZ_22P05",
  460. "KHZ_32", "KHZ_44P1", "KHZ_48",
  461. "KHZ_88P2", "KHZ_96",
  462. "KHZ_176P4", "KHZ_192",
  463. "KHZ_352P8", "KHZ_384"};
  464. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  491. ext_disp_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  559. cdc_dma_sample_rate_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  561. cdc_dma_sample_rate_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  563. cdc_dma_sample_rate_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  583. cdc_dma_sample_rate_text);
  584. static struct platform_device *spdev;
  585. static int msm_hifi_control;
  586. static bool is_initial_boot;
  587. static bool codec_reg_done;
  588. static struct snd_soc_aux_dev *msm_aux_dev;
  589. static struct snd_soc_codec_conf *msm_codec_conf;
  590. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  591. static int dmic_0_1_gpio_cnt;
  592. static int dmic_2_3_gpio_cnt;
  593. static void *def_wcd_mbhc_cal(void);
  594. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  595. int enable, bool dapm);
  596. static int msm_wsa881x_init(struct snd_soc_component *component);
  597. static int msm_aux_codec_init(struct snd_soc_component *component);
  598. /*
  599. * Need to report LINEIN
  600. * if R/L channel impedance is larger than 5K ohm
  601. */
  602. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  603. .read_fw_bin = false,
  604. .calibration = NULL,
  605. .detect_extn_cable = true,
  606. .mono_stero_detection = false,
  607. .swap_gnd_mic = NULL,
  608. .hs_ext_micbias = true,
  609. .key_code[0] = KEY_MEDIA,
  610. .key_code[1] = KEY_VOICECOMMAND,
  611. .key_code[2] = KEY_VOLUMEUP,
  612. .key_code[3] = KEY_VOLUMEDOWN,
  613. .key_code[4] = 0,
  614. .key_code[5] = 0,
  615. .key_code[6] = 0,
  616. .key_code[7] = 0,
  617. .linein_th = 5000,
  618. .moisture_en = true,
  619. .mbhc_micbias = MIC_BIAS_2,
  620. .anc_micbias = MIC_BIAS_2,
  621. .enable_anc_mic_detect = false,
  622. };
  623. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  624. {"MIC BIAS1", NULL, "MCLK TX"},
  625. {"MIC BIAS2", NULL, "MCLK TX"},
  626. {"MIC BIAS3", NULL, "MCLK TX"},
  627. {"MIC BIAS4", NULL, "MCLK TX"},
  628. };
  629. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  630. {
  631. AFE_API_VERSION_I2S_CONFIG,
  632. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  633. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  634. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  635. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  636. 0,
  637. },
  638. {
  639. AFE_API_VERSION_I2S_CONFIG,
  640. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  641. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  642. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  643. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  644. 0,
  645. },
  646. {
  647. AFE_API_VERSION_I2S_CONFIG,
  648. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  649. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  650. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  651. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  652. 0,
  653. },
  654. {
  655. AFE_API_VERSION_I2S_CONFIG,
  656. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  657. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  658. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  659. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  660. 0,
  661. },
  662. {
  663. AFE_API_VERSION_I2S_CONFIG,
  664. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  665. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  666. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  667. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  668. 0,
  669. }
  670. };
  671. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  672. static int slim_get_sample_rate_val(int sample_rate)
  673. {
  674. int sample_rate_val = 0;
  675. switch (sample_rate) {
  676. case SAMPLING_RATE_8KHZ:
  677. sample_rate_val = 0;
  678. break;
  679. case SAMPLING_RATE_16KHZ:
  680. sample_rate_val = 1;
  681. break;
  682. case SAMPLING_RATE_32KHZ:
  683. sample_rate_val = 2;
  684. break;
  685. case SAMPLING_RATE_44P1KHZ:
  686. sample_rate_val = 3;
  687. break;
  688. case SAMPLING_RATE_48KHZ:
  689. sample_rate_val = 4;
  690. break;
  691. case SAMPLING_RATE_88P2KHZ:
  692. sample_rate_val = 5;
  693. break;
  694. case SAMPLING_RATE_96KHZ:
  695. sample_rate_val = 6;
  696. break;
  697. case SAMPLING_RATE_176P4KHZ:
  698. sample_rate_val = 7;
  699. break;
  700. case SAMPLING_RATE_192KHZ:
  701. sample_rate_val = 8;
  702. break;
  703. case SAMPLING_RATE_352P8KHZ:
  704. sample_rate_val = 9;
  705. break;
  706. case SAMPLING_RATE_384KHZ:
  707. sample_rate_val = 10;
  708. break;
  709. default:
  710. sample_rate_val = 4;
  711. break;
  712. }
  713. return sample_rate_val;
  714. }
  715. static int slim_get_sample_rate(int value)
  716. {
  717. int sample_rate = 0;
  718. switch (value) {
  719. case 0:
  720. sample_rate = SAMPLING_RATE_8KHZ;
  721. break;
  722. case 1:
  723. sample_rate = SAMPLING_RATE_16KHZ;
  724. break;
  725. case 2:
  726. sample_rate = SAMPLING_RATE_32KHZ;
  727. break;
  728. case 3:
  729. sample_rate = SAMPLING_RATE_44P1KHZ;
  730. break;
  731. case 4:
  732. sample_rate = SAMPLING_RATE_48KHZ;
  733. break;
  734. case 5:
  735. sample_rate = SAMPLING_RATE_88P2KHZ;
  736. break;
  737. case 6:
  738. sample_rate = SAMPLING_RATE_96KHZ;
  739. break;
  740. case 7:
  741. sample_rate = SAMPLING_RATE_176P4KHZ;
  742. break;
  743. case 8:
  744. sample_rate = SAMPLING_RATE_192KHZ;
  745. break;
  746. case 9:
  747. sample_rate = SAMPLING_RATE_352P8KHZ;
  748. break;
  749. case 10:
  750. sample_rate = SAMPLING_RATE_384KHZ;
  751. break;
  752. default:
  753. sample_rate = SAMPLING_RATE_48KHZ;
  754. break;
  755. }
  756. return sample_rate;
  757. }
  758. static int slim_get_bit_format_val(int bit_format)
  759. {
  760. int val = 0;
  761. switch (bit_format) {
  762. case SNDRV_PCM_FORMAT_S32_LE:
  763. val = 3;
  764. break;
  765. case SNDRV_PCM_FORMAT_S24_3LE:
  766. val = 2;
  767. break;
  768. case SNDRV_PCM_FORMAT_S24_LE:
  769. val = 1;
  770. break;
  771. case SNDRV_PCM_FORMAT_S16_LE:
  772. default:
  773. val = 0;
  774. break;
  775. }
  776. return val;
  777. }
  778. static int slim_get_bit_format(int val)
  779. {
  780. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  781. switch (val) {
  782. case 0:
  783. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  784. break;
  785. case 1:
  786. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  787. break;
  788. case 2:
  789. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  790. break;
  791. case 3:
  792. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  793. break;
  794. default:
  795. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  796. break;
  797. }
  798. return bit_fmt;
  799. }
  800. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  801. {
  802. int port_id = 0;
  803. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  804. port_id = SLIM_RX_0;
  805. } else if (strnstr(kcontrol->id.name,
  806. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  807. port_id = SLIM_RX_2;
  808. } else if (strnstr(kcontrol->id.name,
  809. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  810. port_id = SLIM_RX_5;
  811. } else if (strnstr(kcontrol->id.name,
  812. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  813. port_id = SLIM_RX_6;
  814. } else if (strnstr(kcontrol->id.name,
  815. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  816. port_id = SLIM_TX_0;
  817. } else if (strnstr(kcontrol->id.name,
  818. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  819. port_id = SLIM_TX_1;
  820. } else {
  821. pr_err("%s: unsupported channel: %s\n",
  822. __func__, kcontrol->id.name);
  823. return -EINVAL;
  824. }
  825. return port_id;
  826. }
  827. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  828. struct snd_ctl_elem_value *ucontrol)
  829. {
  830. int ch_num = slim_get_port_idx(kcontrol);
  831. if (ch_num < 0)
  832. return ch_num;
  833. ucontrol->value.enumerated.item[0] =
  834. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  835. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  836. ch_num, slim_rx_cfg[ch_num].sample_rate,
  837. ucontrol->value.enumerated.item[0]);
  838. return 0;
  839. }
  840. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  841. struct snd_ctl_elem_value *ucontrol)
  842. {
  843. int ch_num = slim_get_port_idx(kcontrol);
  844. if (ch_num < 0)
  845. return ch_num;
  846. slim_rx_cfg[ch_num].sample_rate =
  847. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  848. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  849. ch_num, slim_rx_cfg[ch_num].sample_rate,
  850. ucontrol->value.enumerated.item[0]);
  851. return 0;
  852. }
  853. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  854. struct snd_ctl_elem_value *ucontrol)
  855. {
  856. int ch_num = slim_get_port_idx(kcontrol);
  857. if (ch_num < 0)
  858. return ch_num;
  859. ucontrol->value.enumerated.item[0] =
  860. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  861. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  862. ch_num, slim_tx_cfg[ch_num].sample_rate,
  863. ucontrol->value.enumerated.item[0]);
  864. return 0;
  865. }
  866. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  867. struct snd_ctl_elem_value *ucontrol)
  868. {
  869. int sample_rate = 0;
  870. int ch_num = slim_get_port_idx(kcontrol);
  871. if (ch_num < 0)
  872. return ch_num;
  873. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  874. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  875. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  876. __func__, sample_rate);
  877. return -EINVAL;
  878. }
  879. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  880. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  881. ch_num, slim_tx_cfg[ch_num].sample_rate,
  882. ucontrol->value.enumerated.item[0]);
  883. return 0;
  884. }
  885. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  886. struct snd_ctl_elem_value *ucontrol)
  887. {
  888. int ch_num = slim_get_port_idx(kcontrol);
  889. if (ch_num < 0)
  890. return ch_num;
  891. ucontrol->value.enumerated.item[0] =
  892. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  893. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  894. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  895. ucontrol->value.enumerated.item[0]);
  896. return 0;
  897. }
  898. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  899. struct snd_ctl_elem_value *ucontrol)
  900. {
  901. int ch_num = slim_get_port_idx(kcontrol);
  902. if (ch_num < 0)
  903. return ch_num;
  904. slim_rx_cfg[ch_num].bit_format =
  905. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  906. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  907. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  908. ucontrol->value.enumerated.item[0]);
  909. return 0;
  910. }
  911. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  912. struct snd_ctl_elem_value *ucontrol)
  913. {
  914. int ch_num = slim_get_port_idx(kcontrol);
  915. if (ch_num < 0)
  916. return ch_num;
  917. ucontrol->value.enumerated.item[0] =
  918. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  919. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  920. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  921. ucontrol->value.enumerated.item[0]);
  922. return 0;
  923. }
  924. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  925. struct snd_ctl_elem_value *ucontrol)
  926. {
  927. int ch_num = slim_get_port_idx(kcontrol);
  928. if (ch_num < 0)
  929. return ch_num;
  930. slim_tx_cfg[ch_num].bit_format =
  931. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  932. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  933. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  934. ucontrol->value.enumerated.item[0]);
  935. return 0;
  936. }
  937. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  938. struct snd_ctl_elem_value *ucontrol)
  939. {
  940. int ch_num = slim_get_port_idx(kcontrol);
  941. if (ch_num < 0)
  942. return ch_num;
  943. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  944. ch_num, slim_rx_cfg[ch_num].channels);
  945. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  946. return 0;
  947. }
  948. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  949. struct snd_ctl_elem_value *ucontrol)
  950. {
  951. int ch_num = slim_get_port_idx(kcontrol);
  952. if (ch_num < 0)
  953. return ch_num;
  954. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  955. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  956. ch_num, slim_rx_cfg[ch_num].channels);
  957. return 1;
  958. }
  959. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. int ch_num = slim_get_port_idx(kcontrol);
  963. if (ch_num < 0)
  964. return ch_num;
  965. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  966. ch_num, slim_tx_cfg[ch_num].channels);
  967. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  968. return 0;
  969. }
  970. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  971. struct snd_ctl_elem_value *ucontrol)
  972. {
  973. int ch_num = slim_get_port_idx(kcontrol);
  974. if (ch_num < 0)
  975. return ch_num;
  976. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  977. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  978. ch_num, slim_tx_cfg[ch_num].channels);
  979. return 1;
  980. }
  981. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  982. struct snd_ctl_elem_value *ucontrol)
  983. {
  984. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  985. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  986. ucontrol->value.integer.value[0]);
  987. return 0;
  988. }
  989. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  990. struct snd_ctl_elem_value *ucontrol)
  991. {
  992. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  993. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  994. return 1;
  995. }
  996. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  997. struct snd_ctl_elem_value *ucontrol)
  998. {
  999. /*
  1000. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1001. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1002. * value.
  1003. */
  1004. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1005. case SAMPLING_RATE_96KHZ:
  1006. ucontrol->value.integer.value[0] = 5;
  1007. break;
  1008. case SAMPLING_RATE_88P2KHZ:
  1009. ucontrol->value.integer.value[0] = 4;
  1010. break;
  1011. case SAMPLING_RATE_48KHZ:
  1012. ucontrol->value.integer.value[0] = 3;
  1013. break;
  1014. case SAMPLING_RATE_44P1KHZ:
  1015. ucontrol->value.integer.value[0] = 2;
  1016. break;
  1017. case SAMPLING_RATE_16KHZ:
  1018. ucontrol->value.integer.value[0] = 1;
  1019. break;
  1020. case SAMPLING_RATE_8KHZ:
  1021. default:
  1022. ucontrol->value.integer.value[0] = 0;
  1023. break;
  1024. }
  1025. pr_debug("%s: sample rate = %d\n", __func__,
  1026. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1027. return 0;
  1028. }
  1029. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1030. struct snd_ctl_elem_value *ucontrol)
  1031. {
  1032. switch (ucontrol->value.integer.value[0]) {
  1033. case 1:
  1034. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1035. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1036. break;
  1037. case 2:
  1038. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1039. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1040. break;
  1041. case 3:
  1042. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1043. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1044. break;
  1045. case 4:
  1046. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1047. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1048. break;
  1049. case 5:
  1050. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1051. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1052. break;
  1053. case 0:
  1054. default:
  1055. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1056. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1057. break;
  1058. }
  1059. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1060. __func__,
  1061. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1062. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1063. ucontrol->value.enumerated.item[0]);
  1064. return 0;
  1065. }
  1066. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1067. {
  1068. int idx = 0;
  1069. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1070. sizeof("WSA_CDC_DMA_RX_0")))
  1071. idx = WSA_CDC_DMA_RX_0;
  1072. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1073. sizeof("WSA_CDC_DMA_RX_0")))
  1074. idx = WSA_CDC_DMA_RX_1;
  1075. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1076. sizeof("RX_CDC_DMA_RX_0")))
  1077. idx = RX_CDC_DMA_RX_0;
  1078. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1079. sizeof("RX_CDC_DMA_RX_1")))
  1080. idx = RX_CDC_DMA_RX_1;
  1081. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1082. sizeof("RX_CDC_DMA_RX_2")))
  1083. idx = RX_CDC_DMA_RX_2;
  1084. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1085. sizeof("RX_CDC_DMA_RX_3")))
  1086. idx = RX_CDC_DMA_RX_3;
  1087. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1088. sizeof("RX_CDC_DMA_RX_5")))
  1089. idx = RX_CDC_DMA_RX_5;
  1090. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1091. sizeof("WSA_CDC_DMA_TX_0")))
  1092. idx = WSA_CDC_DMA_TX_0;
  1093. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1094. sizeof("WSA_CDC_DMA_TX_1")))
  1095. idx = WSA_CDC_DMA_TX_1;
  1096. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1097. sizeof("WSA_CDC_DMA_TX_2")))
  1098. idx = WSA_CDC_DMA_TX_2;
  1099. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1100. sizeof("TX_CDC_DMA_TX_0")))
  1101. idx = TX_CDC_DMA_TX_0;
  1102. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1103. sizeof("TX_CDC_DMA_TX_3")))
  1104. idx = TX_CDC_DMA_TX_3;
  1105. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1106. sizeof("TX_CDC_DMA_TX_4")))
  1107. idx = TX_CDC_DMA_TX_4;
  1108. else {
  1109. pr_err("%s: unsupported channel: %s\n",
  1110. __func__, kcontrol->id.name);
  1111. return -EINVAL;
  1112. }
  1113. return idx;
  1114. }
  1115. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1116. struct snd_ctl_elem_value *ucontrol)
  1117. {
  1118. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1119. if (ch_num < 0)
  1120. return ch_num;
  1121. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1122. cdc_dma_rx_cfg[ch_num].channels - 1);
  1123. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1124. return 0;
  1125. }
  1126. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1127. struct snd_ctl_elem_value *ucontrol)
  1128. {
  1129. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1130. if (ch_num < 0)
  1131. return ch_num;
  1132. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1133. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1134. cdc_dma_rx_cfg[ch_num].channels);
  1135. return 1;
  1136. }
  1137. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1138. struct snd_ctl_elem_value *ucontrol)
  1139. {
  1140. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1141. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1142. case SNDRV_PCM_FORMAT_S32_LE:
  1143. ucontrol->value.integer.value[0] = 3;
  1144. break;
  1145. case SNDRV_PCM_FORMAT_S24_3LE:
  1146. ucontrol->value.integer.value[0] = 2;
  1147. break;
  1148. case SNDRV_PCM_FORMAT_S24_LE:
  1149. ucontrol->value.integer.value[0] = 1;
  1150. break;
  1151. case SNDRV_PCM_FORMAT_S16_LE:
  1152. default:
  1153. ucontrol->value.integer.value[0] = 0;
  1154. break;
  1155. }
  1156. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1157. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1158. ucontrol->value.integer.value[0]);
  1159. return 0;
  1160. }
  1161. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1162. struct snd_ctl_elem_value *ucontrol)
  1163. {
  1164. int rc = 0;
  1165. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1166. switch (ucontrol->value.integer.value[0]) {
  1167. case 3:
  1168. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1169. break;
  1170. case 2:
  1171. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1172. break;
  1173. case 1:
  1174. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1175. break;
  1176. case 0:
  1177. default:
  1178. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1179. break;
  1180. }
  1181. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1182. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1183. ucontrol->value.integer.value[0]);
  1184. return rc;
  1185. }
  1186. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1187. {
  1188. int sample_rate_val = 0;
  1189. switch (sample_rate) {
  1190. case SAMPLING_RATE_8KHZ:
  1191. sample_rate_val = 0;
  1192. break;
  1193. case SAMPLING_RATE_11P025KHZ:
  1194. sample_rate_val = 1;
  1195. break;
  1196. case SAMPLING_RATE_16KHZ:
  1197. sample_rate_val = 2;
  1198. break;
  1199. case SAMPLING_RATE_22P05KHZ:
  1200. sample_rate_val = 3;
  1201. break;
  1202. case SAMPLING_RATE_32KHZ:
  1203. sample_rate_val = 4;
  1204. break;
  1205. case SAMPLING_RATE_44P1KHZ:
  1206. sample_rate_val = 5;
  1207. break;
  1208. case SAMPLING_RATE_48KHZ:
  1209. sample_rate_val = 6;
  1210. break;
  1211. case SAMPLING_RATE_88P2KHZ:
  1212. sample_rate_val = 7;
  1213. break;
  1214. case SAMPLING_RATE_96KHZ:
  1215. sample_rate_val = 8;
  1216. break;
  1217. case SAMPLING_RATE_176P4KHZ:
  1218. sample_rate_val = 9;
  1219. break;
  1220. case SAMPLING_RATE_192KHZ:
  1221. sample_rate_val = 10;
  1222. break;
  1223. case SAMPLING_RATE_352P8KHZ:
  1224. sample_rate_val = 11;
  1225. break;
  1226. case SAMPLING_RATE_384KHZ:
  1227. sample_rate_val = 12;
  1228. break;
  1229. default:
  1230. sample_rate_val = 6;
  1231. break;
  1232. }
  1233. return sample_rate_val;
  1234. }
  1235. static int cdc_dma_get_sample_rate(int value)
  1236. {
  1237. int sample_rate = 0;
  1238. switch (value) {
  1239. case 0:
  1240. sample_rate = SAMPLING_RATE_8KHZ;
  1241. break;
  1242. case 1:
  1243. sample_rate = SAMPLING_RATE_11P025KHZ;
  1244. break;
  1245. case 2:
  1246. sample_rate = SAMPLING_RATE_16KHZ;
  1247. break;
  1248. case 3:
  1249. sample_rate = SAMPLING_RATE_22P05KHZ;
  1250. break;
  1251. case 4:
  1252. sample_rate = SAMPLING_RATE_32KHZ;
  1253. break;
  1254. case 5:
  1255. sample_rate = SAMPLING_RATE_44P1KHZ;
  1256. break;
  1257. case 6:
  1258. sample_rate = SAMPLING_RATE_48KHZ;
  1259. break;
  1260. case 7:
  1261. sample_rate = SAMPLING_RATE_88P2KHZ;
  1262. break;
  1263. case 8:
  1264. sample_rate = SAMPLING_RATE_96KHZ;
  1265. break;
  1266. case 9:
  1267. sample_rate = SAMPLING_RATE_176P4KHZ;
  1268. break;
  1269. case 10:
  1270. sample_rate = SAMPLING_RATE_192KHZ;
  1271. break;
  1272. case 11:
  1273. sample_rate = SAMPLING_RATE_352P8KHZ;
  1274. break;
  1275. case 12:
  1276. sample_rate = SAMPLING_RATE_384KHZ;
  1277. break;
  1278. default:
  1279. sample_rate = SAMPLING_RATE_48KHZ;
  1280. break;
  1281. }
  1282. return sample_rate;
  1283. }
  1284. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1285. struct snd_ctl_elem_value *ucontrol)
  1286. {
  1287. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1288. if (ch_num < 0)
  1289. return ch_num;
  1290. ucontrol->value.enumerated.item[0] =
  1291. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1292. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1293. cdc_dma_rx_cfg[ch_num].sample_rate);
  1294. return 0;
  1295. }
  1296. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1297. struct snd_ctl_elem_value *ucontrol)
  1298. {
  1299. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1300. if (ch_num < 0)
  1301. return ch_num;
  1302. cdc_dma_rx_cfg[ch_num].sample_rate =
  1303. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1304. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1305. __func__, ucontrol->value.enumerated.item[0],
  1306. cdc_dma_rx_cfg[ch_num].sample_rate);
  1307. return 0;
  1308. }
  1309. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1310. struct snd_ctl_elem_value *ucontrol)
  1311. {
  1312. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1313. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1314. cdc_dma_tx_cfg[ch_num].channels);
  1315. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1316. return 0;
  1317. }
  1318. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1319. struct snd_ctl_elem_value *ucontrol)
  1320. {
  1321. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1322. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1323. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1324. cdc_dma_tx_cfg[ch_num].channels);
  1325. return 1;
  1326. }
  1327. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1328. struct snd_ctl_elem_value *ucontrol)
  1329. {
  1330. int sample_rate_val;
  1331. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1332. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1333. case SAMPLING_RATE_384KHZ:
  1334. sample_rate_val = 12;
  1335. break;
  1336. case SAMPLING_RATE_352P8KHZ:
  1337. sample_rate_val = 11;
  1338. break;
  1339. case SAMPLING_RATE_192KHZ:
  1340. sample_rate_val = 10;
  1341. break;
  1342. case SAMPLING_RATE_176P4KHZ:
  1343. sample_rate_val = 9;
  1344. break;
  1345. case SAMPLING_RATE_96KHZ:
  1346. sample_rate_val = 8;
  1347. break;
  1348. case SAMPLING_RATE_88P2KHZ:
  1349. sample_rate_val = 7;
  1350. break;
  1351. case SAMPLING_RATE_48KHZ:
  1352. sample_rate_val = 6;
  1353. break;
  1354. case SAMPLING_RATE_44P1KHZ:
  1355. sample_rate_val = 5;
  1356. break;
  1357. case SAMPLING_RATE_32KHZ:
  1358. sample_rate_val = 4;
  1359. break;
  1360. case SAMPLING_RATE_22P05KHZ:
  1361. sample_rate_val = 3;
  1362. break;
  1363. case SAMPLING_RATE_16KHZ:
  1364. sample_rate_val = 2;
  1365. break;
  1366. case SAMPLING_RATE_11P025KHZ:
  1367. sample_rate_val = 1;
  1368. break;
  1369. case SAMPLING_RATE_8KHZ:
  1370. sample_rate_val = 0;
  1371. break;
  1372. default:
  1373. sample_rate_val = 6;
  1374. break;
  1375. }
  1376. ucontrol->value.integer.value[0] = sample_rate_val;
  1377. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1378. cdc_dma_tx_cfg[ch_num].sample_rate);
  1379. return 0;
  1380. }
  1381. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1382. struct snd_ctl_elem_value *ucontrol)
  1383. {
  1384. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1385. switch (ucontrol->value.integer.value[0]) {
  1386. case 12:
  1387. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1388. break;
  1389. case 11:
  1390. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1391. break;
  1392. case 10:
  1393. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1394. break;
  1395. case 9:
  1396. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1397. break;
  1398. case 8:
  1399. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1400. break;
  1401. case 7:
  1402. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1403. break;
  1404. case 6:
  1405. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1406. break;
  1407. case 5:
  1408. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1409. break;
  1410. case 4:
  1411. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1412. break;
  1413. case 3:
  1414. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1415. break;
  1416. case 2:
  1417. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1418. break;
  1419. case 1:
  1420. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1421. break;
  1422. case 0:
  1423. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1424. break;
  1425. default:
  1426. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1427. break;
  1428. }
  1429. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1430. __func__, ucontrol->value.integer.value[0],
  1431. cdc_dma_tx_cfg[ch_num].sample_rate);
  1432. return 0;
  1433. }
  1434. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1435. struct snd_ctl_elem_value *ucontrol)
  1436. {
  1437. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1438. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1439. case SNDRV_PCM_FORMAT_S32_LE:
  1440. ucontrol->value.integer.value[0] = 3;
  1441. break;
  1442. case SNDRV_PCM_FORMAT_S24_3LE:
  1443. ucontrol->value.integer.value[0] = 2;
  1444. break;
  1445. case SNDRV_PCM_FORMAT_S24_LE:
  1446. ucontrol->value.integer.value[0] = 1;
  1447. break;
  1448. case SNDRV_PCM_FORMAT_S16_LE:
  1449. default:
  1450. ucontrol->value.integer.value[0] = 0;
  1451. break;
  1452. }
  1453. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1454. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1455. ucontrol->value.integer.value[0]);
  1456. return 0;
  1457. }
  1458. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1459. struct snd_ctl_elem_value *ucontrol)
  1460. {
  1461. int rc = 0;
  1462. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1463. switch (ucontrol->value.integer.value[0]) {
  1464. case 3:
  1465. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1466. break;
  1467. case 2:
  1468. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1469. break;
  1470. case 1:
  1471. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1472. break;
  1473. case 0:
  1474. default:
  1475. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1476. break;
  1477. }
  1478. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1479. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1480. ucontrol->value.integer.value[0]);
  1481. return rc;
  1482. }
  1483. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1484. struct snd_ctl_elem_value *ucontrol)
  1485. {
  1486. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1487. usb_rx_cfg.channels);
  1488. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1489. return 0;
  1490. }
  1491. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1492. struct snd_ctl_elem_value *ucontrol)
  1493. {
  1494. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1495. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1496. return 1;
  1497. }
  1498. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1499. struct snd_ctl_elem_value *ucontrol)
  1500. {
  1501. int sample_rate_val;
  1502. switch (usb_rx_cfg.sample_rate) {
  1503. case SAMPLING_RATE_384KHZ:
  1504. sample_rate_val = 12;
  1505. break;
  1506. case SAMPLING_RATE_352P8KHZ:
  1507. sample_rate_val = 11;
  1508. break;
  1509. case SAMPLING_RATE_192KHZ:
  1510. sample_rate_val = 10;
  1511. break;
  1512. case SAMPLING_RATE_176P4KHZ:
  1513. sample_rate_val = 9;
  1514. break;
  1515. case SAMPLING_RATE_96KHZ:
  1516. sample_rate_val = 8;
  1517. break;
  1518. case SAMPLING_RATE_88P2KHZ:
  1519. sample_rate_val = 7;
  1520. break;
  1521. case SAMPLING_RATE_48KHZ:
  1522. sample_rate_val = 6;
  1523. break;
  1524. case SAMPLING_RATE_44P1KHZ:
  1525. sample_rate_val = 5;
  1526. break;
  1527. case SAMPLING_RATE_32KHZ:
  1528. sample_rate_val = 4;
  1529. break;
  1530. case SAMPLING_RATE_22P05KHZ:
  1531. sample_rate_val = 3;
  1532. break;
  1533. case SAMPLING_RATE_16KHZ:
  1534. sample_rate_val = 2;
  1535. break;
  1536. case SAMPLING_RATE_11P025KHZ:
  1537. sample_rate_val = 1;
  1538. break;
  1539. case SAMPLING_RATE_8KHZ:
  1540. default:
  1541. sample_rate_val = 0;
  1542. break;
  1543. }
  1544. ucontrol->value.integer.value[0] = sample_rate_val;
  1545. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1546. usb_rx_cfg.sample_rate);
  1547. return 0;
  1548. }
  1549. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1550. struct snd_ctl_elem_value *ucontrol)
  1551. {
  1552. switch (ucontrol->value.integer.value[0]) {
  1553. case 12:
  1554. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1555. break;
  1556. case 11:
  1557. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1558. break;
  1559. case 10:
  1560. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1561. break;
  1562. case 9:
  1563. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1564. break;
  1565. case 8:
  1566. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1567. break;
  1568. case 7:
  1569. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1570. break;
  1571. case 6:
  1572. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1573. break;
  1574. case 5:
  1575. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1576. break;
  1577. case 4:
  1578. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1579. break;
  1580. case 3:
  1581. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1582. break;
  1583. case 2:
  1584. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1585. break;
  1586. case 1:
  1587. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1588. break;
  1589. case 0:
  1590. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1591. break;
  1592. default:
  1593. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1594. break;
  1595. }
  1596. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1597. __func__, ucontrol->value.integer.value[0],
  1598. usb_rx_cfg.sample_rate);
  1599. return 0;
  1600. }
  1601. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1602. struct snd_ctl_elem_value *ucontrol)
  1603. {
  1604. switch (usb_rx_cfg.bit_format) {
  1605. case SNDRV_PCM_FORMAT_S32_LE:
  1606. ucontrol->value.integer.value[0] = 3;
  1607. break;
  1608. case SNDRV_PCM_FORMAT_S24_3LE:
  1609. ucontrol->value.integer.value[0] = 2;
  1610. break;
  1611. case SNDRV_PCM_FORMAT_S24_LE:
  1612. ucontrol->value.integer.value[0] = 1;
  1613. break;
  1614. case SNDRV_PCM_FORMAT_S16_LE:
  1615. default:
  1616. ucontrol->value.integer.value[0] = 0;
  1617. break;
  1618. }
  1619. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1620. __func__, usb_rx_cfg.bit_format,
  1621. ucontrol->value.integer.value[0]);
  1622. return 0;
  1623. }
  1624. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1625. struct snd_ctl_elem_value *ucontrol)
  1626. {
  1627. int rc = 0;
  1628. switch (ucontrol->value.integer.value[0]) {
  1629. case 3:
  1630. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1631. break;
  1632. case 2:
  1633. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1634. break;
  1635. case 1:
  1636. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1637. break;
  1638. case 0:
  1639. default:
  1640. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1641. break;
  1642. }
  1643. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1644. __func__, usb_rx_cfg.bit_format,
  1645. ucontrol->value.integer.value[0]);
  1646. return rc;
  1647. }
  1648. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1649. struct snd_ctl_elem_value *ucontrol)
  1650. {
  1651. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1652. usb_tx_cfg.channels);
  1653. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1654. return 0;
  1655. }
  1656. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1657. struct snd_ctl_elem_value *ucontrol)
  1658. {
  1659. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1660. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1661. return 1;
  1662. }
  1663. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1664. struct snd_ctl_elem_value *ucontrol)
  1665. {
  1666. int sample_rate_val;
  1667. switch (usb_tx_cfg.sample_rate) {
  1668. case SAMPLING_RATE_384KHZ:
  1669. sample_rate_val = 12;
  1670. break;
  1671. case SAMPLING_RATE_352P8KHZ:
  1672. sample_rate_val = 11;
  1673. break;
  1674. case SAMPLING_RATE_192KHZ:
  1675. sample_rate_val = 10;
  1676. break;
  1677. case SAMPLING_RATE_176P4KHZ:
  1678. sample_rate_val = 9;
  1679. break;
  1680. case SAMPLING_RATE_96KHZ:
  1681. sample_rate_val = 8;
  1682. break;
  1683. case SAMPLING_RATE_88P2KHZ:
  1684. sample_rate_val = 7;
  1685. break;
  1686. case SAMPLING_RATE_48KHZ:
  1687. sample_rate_val = 6;
  1688. break;
  1689. case SAMPLING_RATE_44P1KHZ:
  1690. sample_rate_val = 5;
  1691. break;
  1692. case SAMPLING_RATE_32KHZ:
  1693. sample_rate_val = 4;
  1694. break;
  1695. case SAMPLING_RATE_22P05KHZ:
  1696. sample_rate_val = 3;
  1697. break;
  1698. case SAMPLING_RATE_16KHZ:
  1699. sample_rate_val = 2;
  1700. break;
  1701. case SAMPLING_RATE_11P025KHZ:
  1702. sample_rate_val = 1;
  1703. break;
  1704. case SAMPLING_RATE_8KHZ:
  1705. sample_rate_val = 0;
  1706. break;
  1707. default:
  1708. sample_rate_val = 6;
  1709. break;
  1710. }
  1711. ucontrol->value.integer.value[0] = sample_rate_val;
  1712. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1713. usb_tx_cfg.sample_rate);
  1714. return 0;
  1715. }
  1716. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1717. struct snd_ctl_elem_value *ucontrol)
  1718. {
  1719. switch (ucontrol->value.integer.value[0]) {
  1720. case 12:
  1721. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1722. break;
  1723. case 11:
  1724. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1725. break;
  1726. case 10:
  1727. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1728. break;
  1729. case 9:
  1730. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1731. break;
  1732. case 8:
  1733. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1734. break;
  1735. case 7:
  1736. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1737. break;
  1738. case 6:
  1739. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1740. break;
  1741. case 5:
  1742. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1743. break;
  1744. case 4:
  1745. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1746. break;
  1747. case 3:
  1748. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1749. break;
  1750. case 2:
  1751. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1752. break;
  1753. case 1:
  1754. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1755. break;
  1756. case 0:
  1757. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1758. break;
  1759. default:
  1760. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1761. break;
  1762. }
  1763. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1764. __func__, ucontrol->value.integer.value[0],
  1765. usb_tx_cfg.sample_rate);
  1766. return 0;
  1767. }
  1768. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1769. struct snd_ctl_elem_value *ucontrol)
  1770. {
  1771. switch (usb_tx_cfg.bit_format) {
  1772. case SNDRV_PCM_FORMAT_S32_LE:
  1773. ucontrol->value.integer.value[0] = 3;
  1774. break;
  1775. case SNDRV_PCM_FORMAT_S24_3LE:
  1776. ucontrol->value.integer.value[0] = 2;
  1777. break;
  1778. case SNDRV_PCM_FORMAT_S24_LE:
  1779. ucontrol->value.integer.value[0] = 1;
  1780. break;
  1781. case SNDRV_PCM_FORMAT_S16_LE:
  1782. default:
  1783. ucontrol->value.integer.value[0] = 0;
  1784. break;
  1785. }
  1786. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1787. __func__, usb_tx_cfg.bit_format,
  1788. ucontrol->value.integer.value[0]);
  1789. return 0;
  1790. }
  1791. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1792. struct snd_ctl_elem_value *ucontrol)
  1793. {
  1794. int rc = 0;
  1795. switch (ucontrol->value.integer.value[0]) {
  1796. case 3:
  1797. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1798. break;
  1799. case 2:
  1800. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1801. break;
  1802. case 1:
  1803. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1804. break;
  1805. case 0:
  1806. default:
  1807. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1808. break;
  1809. }
  1810. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1811. __func__, usb_tx_cfg.bit_format,
  1812. ucontrol->value.integer.value[0]);
  1813. return rc;
  1814. }
  1815. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1816. {
  1817. int idx;
  1818. if (strnstr(kcontrol->id.name, "Display Port RX",
  1819. sizeof("Display Port RX"))) {
  1820. idx = DP_RX_IDX;
  1821. } else {
  1822. pr_err("%s: unsupported BE: %s\n",
  1823. __func__, kcontrol->id.name);
  1824. idx = -EINVAL;
  1825. }
  1826. return idx;
  1827. }
  1828. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1829. struct snd_ctl_elem_value *ucontrol)
  1830. {
  1831. int idx = ext_disp_get_port_idx(kcontrol);
  1832. if (idx < 0)
  1833. return idx;
  1834. switch (ext_disp_rx_cfg[idx].bit_format) {
  1835. case SNDRV_PCM_FORMAT_S24_3LE:
  1836. ucontrol->value.integer.value[0] = 2;
  1837. break;
  1838. case SNDRV_PCM_FORMAT_S24_LE:
  1839. ucontrol->value.integer.value[0] = 1;
  1840. break;
  1841. case SNDRV_PCM_FORMAT_S16_LE:
  1842. default:
  1843. ucontrol->value.integer.value[0] = 0;
  1844. break;
  1845. }
  1846. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1847. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1848. ucontrol->value.integer.value[0]);
  1849. return 0;
  1850. }
  1851. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1852. struct snd_ctl_elem_value *ucontrol)
  1853. {
  1854. int idx = ext_disp_get_port_idx(kcontrol);
  1855. if (idx < 0)
  1856. return idx;
  1857. switch (ucontrol->value.integer.value[0]) {
  1858. case 2:
  1859. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1860. break;
  1861. case 1:
  1862. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1863. break;
  1864. case 0:
  1865. default:
  1866. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1867. break;
  1868. }
  1869. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1870. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1871. ucontrol->value.integer.value[0]);
  1872. return 0;
  1873. }
  1874. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1875. struct snd_ctl_elem_value *ucontrol)
  1876. {
  1877. int idx = ext_disp_get_port_idx(kcontrol);
  1878. if (idx < 0)
  1879. return idx;
  1880. ucontrol->value.integer.value[0] =
  1881. ext_disp_rx_cfg[idx].channels - 2;
  1882. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1883. idx, ext_disp_rx_cfg[idx].channels);
  1884. return 0;
  1885. }
  1886. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1887. struct snd_ctl_elem_value *ucontrol)
  1888. {
  1889. int idx = ext_disp_get_port_idx(kcontrol);
  1890. if (idx < 0)
  1891. return idx;
  1892. ext_disp_rx_cfg[idx].channels =
  1893. ucontrol->value.integer.value[0] + 2;
  1894. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1895. idx, ext_disp_rx_cfg[idx].channels);
  1896. return 1;
  1897. }
  1898. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1899. struct snd_ctl_elem_value *ucontrol)
  1900. {
  1901. int sample_rate_val;
  1902. int idx = ext_disp_get_port_idx(kcontrol);
  1903. if (idx < 0)
  1904. return idx;
  1905. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1906. case SAMPLING_RATE_176P4KHZ:
  1907. sample_rate_val = 6;
  1908. break;
  1909. case SAMPLING_RATE_88P2KHZ:
  1910. sample_rate_val = 5;
  1911. break;
  1912. case SAMPLING_RATE_44P1KHZ:
  1913. sample_rate_val = 4;
  1914. break;
  1915. case SAMPLING_RATE_32KHZ:
  1916. sample_rate_val = 3;
  1917. break;
  1918. case SAMPLING_RATE_192KHZ:
  1919. sample_rate_val = 2;
  1920. break;
  1921. case SAMPLING_RATE_96KHZ:
  1922. sample_rate_val = 1;
  1923. break;
  1924. case SAMPLING_RATE_48KHZ:
  1925. default:
  1926. sample_rate_val = 0;
  1927. break;
  1928. }
  1929. ucontrol->value.integer.value[0] = sample_rate_val;
  1930. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1931. idx, ext_disp_rx_cfg[idx].sample_rate);
  1932. return 0;
  1933. }
  1934. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1935. struct snd_ctl_elem_value *ucontrol)
  1936. {
  1937. int idx = ext_disp_get_port_idx(kcontrol);
  1938. if (idx < 0)
  1939. return idx;
  1940. switch (ucontrol->value.integer.value[0]) {
  1941. case 6:
  1942. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1943. break;
  1944. case 5:
  1945. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1946. break;
  1947. case 4:
  1948. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1949. break;
  1950. case 3:
  1951. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1952. break;
  1953. case 2:
  1954. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1955. break;
  1956. case 1:
  1957. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1958. break;
  1959. case 0:
  1960. default:
  1961. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1962. break;
  1963. }
  1964. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1965. __func__, ucontrol->value.integer.value[0], idx,
  1966. ext_disp_rx_cfg[idx].sample_rate);
  1967. return 0;
  1968. }
  1969. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1970. struct snd_ctl_elem_value *ucontrol)
  1971. {
  1972. pr_debug("%s: proxy_rx channels = %d\n",
  1973. __func__, proxy_rx_cfg.channels);
  1974. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1975. return 0;
  1976. }
  1977. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1978. struct snd_ctl_elem_value *ucontrol)
  1979. {
  1980. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1981. pr_debug("%s: proxy_rx channels = %d\n",
  1982. __func__, proxy_rx_cfg.channels);
  1983. return 1;
  1984. }
  1985. static int tdm_get_sample_rate(int value)
  1986. {
  1987. int sample_rate = 0;
  1988. switch (value) {
  1989. case 0:
  1990. sample_rate = SAMPLING_RATE_8KHZ;
  1991. break;
  1992. case 1:
  1993. sample_rate = SAMPLING_RATE_16KHZ;
  1994. break;
  1995. case 2:
  1996. sample_rate = SAMPLING_RATE_32KHZ;
  1997. break;
  1998. case 3:
  1999. sample_rate = SAMPLING_RATE_48KHZ;
  2000. break;
  2001. case 4:
  2002. sample_rate = SAMPLING_RATE_176P4KHZ;
  2003. break;
  2004. case 5:
  2005. sample_rate = SAMPLING_RATE_352P8KHZ;
  2006. break;
  2007. default:
  2008. sample_rate = SAMPLING_RATE_48KHZ;
  2009. break;
  2010. }
  2011. return sample_rate;
  2012. }
  2013. static int aux_pcm_get_sample_rate(int value)
  2014. {
  2015. int sample_rate;
  2016. switch (value) {
  2017. case 1:
  2018. sample_rate = SAMPLING_RATE_16KHZ;
  2019. break;
  2020. case 0:
  2021. default:
  2022. sample_rate = SAMPLING_RATE_8KHZ;
  2023. break;
  2024. }
  2025. return sample_rate;
  2026. }
  2027. static int tdm_get_sample_rate_val(int sample_rate)
  2028. {
  2029. int sample_rate_val = 0;
  2030. switch (sample_rate) {
  2031. case SAMPLING_RATE_8KHZ:
  2032. sample_rate_val = 0;
  2033. break;
  2034. case SAMPLING_RATE_16KHZ:
  2035. sample_rate_val = 1;
  2036. break;
  2037. case SAMPLING_RATE_32KHZ:
  2038. sample_rate_val = 2;
  2039. break;
  2040. case SAMPLING_RATE_48KHZ:
  2041. sample_rate_val = 3;
  2042. break;
  2043. case SAMPLING_RATE_176P4KHZ:
  2044. sample_rate_val = 4;
  2045. break;
  2046. case SAMPLING_RATE_352P8KHZ:
  2047. sample_rate_val = 5;
  2048. break;
  2049. default:
  2050. sample_rate_val = 3;
  2051. break;
  2052. }
  2053. return sample_rate_val;
  2054. }
  2055. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2056. {
  2057. int sample_rate_val;
  2058. switch (sample_rate) {
  2059. case SAMPLING_RATE_16KHZ:
  2060. sample_rate_val = 1;
  2061. break;
  2062. case SAMPLING_RATE_8KHZ:
  2063. default:
  2064. sample_rate_val = 0;
  2065. break;
  2066. }
  2067. return sample_rate_val;
  2068. }
  2069. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2070. struct tdm_port *port)
  2071. {
  2072. if (port) {
  2073. if (strnstr(kcontrol->id.name, "PRI",
  2074. sizeof(kcontrol->id.name))) {
  2075. port->mode = TDM_PRI;
  2076. } else if (strnstr(kcontrol->id.name, "SEC",
  2077. sizeof(kcontrol->id.name))) {
  2078. port->mode = TDM_SEC;
  2079. } else if (strnstr(kcontrol->id.name, "TERT",
  2080. sizeof(kcontrol->id.name))) {
  2081. port->mode = TDM_TERT;
  2082. } else if (strnstr(kcontrol->id.name, "QUAT",
  2083. sizeof(kcontrol->id.name))) {
  2084. port->mode = TDM_QUAT;
  2085. } else if (strnstr(kcontrol->id.name, "QUIN",
  2086. sizeof(kcontrol->id.name))) {
  2087. port->mode = TDM_QUIN;
  2088. } else {
  2089. pr_err("%s: unsupported mode in: %s\n",
  2090. __func__, kcontrol->id.name);
  2091. return -EINVAL;
  2092. }
  2093. if (strnstr(kcontrol->id.name, "RX_0",
  2094. sizeof(kcontrol->id.name)) ||
  2095. strnstr(kcontrol->id.name, "TX_0",
  2096. sizeof(kcontrol->id.name))) {
  2097. port->channel = TDM_0;
  2098. } else if (strnstr(kcontrol->id.name, "RX_1",
  2099. sizeof(kcontrol->id.name)) ||
  2100. strnstr(kcontrol->id.name, "TX_1",
  2101. sizeof(kcontrol->id.name))) {
  2102. port->channel = TDM_1;
  2103. } else if (strnstr(kcontrol->id.name, "RX_2",
  2104. sizeof(kcontrol->id.name)) ||
  2105. strnstr(kcontrol->id.name, "TX_2",
  2106. sizeof(kcontrol->id.name))) {
  2107. port->channel = TDM_2;
  2108. } else if (strnstr(kcontrol->id.name, "RX_3",
  2109. sizeof(kcontrol->id.name)) ||
  2110. strnstr(kcontrol->id.name, "TX_3",
  2111. sizeof(kcontrol->id.name))) {
  2112. port->channel = TDM_3;
  2113. } else if (strnstr(kcontrol->id.name, "RX_4",
  2114. sizeof(kcontrol->id.name)) ||
  2115. strnstr(kcontrol->id.name, "TX_4",
  2116. sizeof(kcontrol->id.name))) {
  2117. port->channel = TDM_4;
  2118. } else if (strnstr(kcontrol->id.name, "RX_5",
  2119. sizeof(kcontrol->id.name)) ||
  2120. strnstr(kcontrol->id.name, "TX_5",
  2121. sizeof(kcontrol->id.name))) {
  2122. port->channel = TDM_5;
  2123. } else if (strnstr(kcontrol->id.name, "RX_6",
  2124. sizeof(kcontrol->id.name)) ||
  2125. strnstr(kcontrol->id.name, "TX_6",
  2126. sizeof(kcontrol->id.name))) {
  2127. port->channel = TDM_6;
  2128. } else if (strnstr(kcontrol->id.name, "RX_7",
  2129. sizeof(kcontrol->id.name)) ||
  2130. strnstr(kcontrol->id.name, "TX_7",
  2131. sizeof(kcontrol->id.name))) {
  2132. port->channel = TDM_7;
  2133. } else {
  2134. pr_err("%s: unsupported channel in: %s\n",
  2135. __func__, kcontrol->id.name);
  2136. return -EINVAL;
  2137. }
  2138. } else {
  2139. return -EINVAL;
  2140. }
  2141. return 0;
  2142. }
  2143. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2144. struct snd_ctl_elem_value *ucontrol)
  2145. {
  2146. struct tdm_port port;
  2147. int ret = tdm_get_port_idx(kcontrol, &port);
  2148. if (ret) {
  2149. pr_err("%s: unsupported control: %s\n",
  2150. __func__, kcontrol->id.name);
  2151. } else {
  2152. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2153. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2154. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2155. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2156. ucontrol->value.enumerated.item[0]);
  2157. }
  2158. return ret;
  2159. }
  2160. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2161. struct snd_ctl_elem_value *ucontrol)
  2162. {
  2163. struct tdm_port port;
  2164. int ret = tdm_get_port_idx(kcontrol, &port);
  2165. if (ret) {
  2166. pr_err("%s: unsupported control: %s\n",
  2167. __func__, kcontrol->id.name);
  2168. } else {
  2169. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2170. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2171. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2172. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2173. ucontrol->value.enumerated.item[0]);
  2174. }
  2175. return ret;
  2176. }
  2177. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2178. struct snd_ctl_elem_value *ucontrol)
  2179. {
  2180. struct tdm_port port;
  2181. int ret = tdm_get_port_idx(kcontrol, &port);
  2182. if (ret) {
  2183. pr_err("%s: unsupported control: %s\n",
  2184. __func__, kcontrol->id.name);
  2185. } else {
  2186. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2187. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2188. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2189. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2190. ucontrol->value.enumerated.item[0]);
  2191. }
  2192. return ret;
  2193. }
  2194. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2195. struct snd_ctl_elem_value *ucontrol)
  2196. {
  2197. struct tdm_port port;
  2198. int ret = tdm_get_port_idx(kcontrol, &port);
  2199. if (ret) {
  2200. pr_err("%s: unsupported control: %s\n",
  2201. __func__, kcontrol->id.name);
  2202. } else {
  2203. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2204. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2205. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2206. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2207. ucontrol->value.enumerated.item[0]);
  2208. }
  2209. return ret;
  2210. }
  2211. static int tdm_get_format(int value)
  2212. {
  2213. int format = 0;
  2214. switch (value) {
  2215. case 0:
  2216. format = SNDRV_PCM_FORMAT_S16_LE;
  2217. break;
  2218. case 1:
  2219. format = SNDRV_PCM_FORMAT_S24_LE;
  2220. break;
  2221. case 2:
  2222. format = SNDRV_PCM_FORMAT_S32_LE;
  2223. break;
  2224. default:
  2225. format = SNDRV_PCM_FORMAT_S16_LE;
  2226. break;
  2227. }
  2228. return format;
  2229. }
  2230. static int tdm_get_format_val(int format)
  2231. {
  2232. int value = 0;
  2233. switch (format) {
  2234. case SNDRV_PCM_FORMAT_S16_LE:
  2235. value = 0;
  2236. break;
  2237. case SNDRV_PCM_FORMAT_S24_LE:
  2238. value = 1;
  2239. break;
  2240. case SNDRV_PCM_FORMAT_S32_LE:
  2241. value = 2;
  2242. break;
  2243. default:
  2244. value = 0;
  2245. break;
  2246. }
  2247. return value;
  2248. }
  2249. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2250. struct snd_ctl_elem_value *ucontrol)
  2251. {
  2252. struct tdm_port port;
  2253. int ret = tdm_get_port_idx(kcontrol, &port);
  2254. if (ret) {
  2255. pr_err("%s: unsupported control: %s\n",
  2256. __func__, kcontrol->id.name);
  2257. } else {
  2258. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2259. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2260. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2261. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2262. ucontrol->value.enumerated.item[0]);
  2263. }
  2264. return ret;
  2265. }
  2266. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2267. struct snd_ctl_elem_value *ucontrol)
  2268. {
  2269. struct tdm_port port;
  2270. int ret = tdm_get_port_idx(kcontrol, &port);
  2271. if (ret) {
  2272. pr_err("%s: unsupported control: %s\n",
  2273. __func__, kcontrol->id.name);
  2274. } else {
  2275. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2276. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2277. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2278. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2279. ucontrol->value.enumerated.item[0]);
  2280. }
  2281. return ret;
  2282. }
  2283. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2284. struct snd_ctl_elem_value *ucontrol)
  2285. {
  2286. struct tdm_port port;
  2287. int ret = tdm_get_port_idx(kcontrol, &port);
  2288. if (ret) {
  2289. pr_err("%s: unsupported control: %s\n",
  2290. __func__, kcontrol->id.name);
  2291. } else {
  2292. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2293. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2294. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2295. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2296. ucontrol->value.enumerated.item[0]);
  2297. }
  2298. return ret;
  2299. }
  2300. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2301. struct snd_ctl_elem_value *ucontrol)
  2302. {
  2303. struct tdm_port port;
  2304. int ret = tdm_get_port_idx(kcontrol, &port);
  2305. if (ret) {
  2306. pr_err("%s: unsupported control: %s\n",
  2307. __func__, kcontrol->id.name);
  2308. } else {
  2309. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2310. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2311. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2312. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2313. ucontrol->value.enumerated.item[0]);
  2314. }
  2315. return ret;
  2316. }
  2317. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2318. struct snd_ctl_elem_value *ucontrol)
  2319. {
  2320. struct tdm_port port;
  2321. int ret = tdm_get_port_idx(kcontrol, &port);
  2322. if (ret) {
  2323. pr_err("%s: unsupported control: %s\n",
  2324. __func__, kcontrol->id.name);
  2325. } else {
  2326. ucontrol->value.enumerated.item[0] =
  2327. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2328. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2329. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2330. ucontrol->value.enumerated.item[0]);
  2331. }
  2332. return ret;
  2333. }
  2334. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2335. struct snd_ctl_elem_value *ucontrol)
  2336. {
  2337. struct tdm_port port;
  2338. int ret = tdm_get_port_idx(kcontrol, &port);
  2339. if (ret) {
  2340. pr_err("%s: unsupported control: %s\n",
  2341. __func__, kcontrol->id.name);
  2342. } else {
  2343. tdm_rx_cfg[port.mode][port.channel].channels =
  2344. ucontrol->value.enumerated.item[0] + 1;
  2345. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2346. tdm_rx_cfg[port.mode][port.channel].channels,
  2347. ucontrol->value.enumerated.item[0] + 1);
  2348. }
  2349. return ret;
  2350. }
  2351. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2352. struct snd_ctl_elem_value *ucontrol)
  2353. {
  2354. struct tdm_port port;
  2355. int ret = tdm_get_port_idx(kcontrol, &port);
  2356. if (ret) {
  2357. pr_err("%s: unsupported control: %s\n",
  2358. __func__, kcontrol->id.name);
  2359. } else {
  2360. ucontrol->value.enumerated.item[0] =
  2361. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2362. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2363. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2364. ucontrol->value.enumerated.item[0]);
  2365. }
  2366. return ret;
  2367. }
  2368. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2369. struct snd_ctl_elem_value *ucontrol)
  2370. {
  2371. struct tdm_port port;
  2372. int ret = tdm_get_port_idx(kcontrol, &port);
  2373. if (ret) {
  2374. pr_err("%s: unsupported control: %s\n",
  2375. __func__, kcontrol->id.name);
  2376. } else {
  2377. tdm_tx_cfg[port.mode][port.channel].channels =
  2378. ucontrol->value.enumerated.item[0] + 1;
  2379. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2380. tdm_tx_cfg[port.mode][port.channel].channels,
  2381. ucontrol->value.enumerated.item[0] + 1);
  2382. }
  2383. return ret;
  2384. }
  2385. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2386. {
  2387. int idx;
  2388. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2389. sizeof("PRIM_AUX_PCM"))) {
  2390. idx = PRIM_AUX_PCM;
  2391. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2392. sizeof("SEC_AUX_PCM"))) {
  2393. idx = SEC_AUX_PCM;
  2394. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2395. sizeof("TERT_AUX_PCM"))) {
  2396. idx = TERT_AUX_PCM;
  2397. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2398. sizeof("QUAT_AUX_PCM"))) {
  2399. idx = QUAT_AUX_PCM;
  2400. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2401. sizeof("QUIN_AUX_PCM"))) {
  2402. idx = QUIN_AUX_PCM;
  2403. } else {
  2404. pr_err("%s: unsupported port: %s\n",
  2405. __func__, kcontrol->id.name);
  2406. idx = -EINVAL;
  2407. }
  2408. return idx;
  2409. }
  2410. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2411. struct snd_ctl_elem_value *ucontrol)
  2412. {
  2413. int idx = aux_pcm_get_port_idx(kcontrol);
  2414. if (idx < 0)
  2415. return idx;
  2416. aux_pcm_rx_cfg[idx].sample_rate =
  2417. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2418. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2419. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2420. ucontrol->value.enumerated.item[0]);
  2421. return 0;
  2422. }
  2423. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2424. struct snd_ctl_elem_value *ucontrol)
  2425. {
  2426. int idx = aux_pcm_get_port_idx(kcontrol);
  2427. if (idx < 0)
  2428. return idx;
  2429. ucontrol->value.enumerated.item[0] =
  2430. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2431. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2432. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2433. ucontrol->value.enumerated.item[0]);
  2434. return 0;
  2435. }
  2436. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2437. struct snd_ctl_elem_value *ucontrol)
  2438. {
  2439. int idx = aux_pcm_get_port_idx(kcontrol);
  2440. if (idx < 0)
  2441. return idx;
  2442. aux_pcm_tx_cfg[idx].sample_rate =
  2443. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2444. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2445. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2446. ucontrol->value.enumerated.item[0]);
  2447. return 0;
  2448. }
  2449. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2450. struct snd_ctl_elem_value *ucontrol)
  2451. {
  2452. int idx = aux_pcm_get_port_idx(kcontrol);
  2453. if (idx < 0)
  2454. return idx;
  2455. ucontrol->value.enumerated.item[0] =
  2456. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2457. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2458. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2459. ucontrol->value.enumerated.item[0]);
  2460. return 0;
  2461. }
  2462. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2463. {
  2464. int idx;
  2465. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2466. sizeof("PRIM_MI2S_RX"))) {
  2467. idx = PRIM_MI2S;
  2468. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2469. sizeof("SEC_MI2S_RX"))) {
  2470. idx = SEC_MI2S;
  2471. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2472. sizeof("TERT_MI2S_RX"))) {
  2473. idx = TERT_MI2S;
  2474. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2475. sizeof("QUAT_MI2S_RX"))) {
  2476. idx = QUAT_MI2S;
  2477. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2478. sizeof("QUIN_MI2S_RX"))) {
  2479. idx = QUIN_MI2S;
  2480. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2481. sizeof("PRIM_MI2S_TX"))) {
  2482. idx = PRIM_MI2S;
  2483. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2484. sizeof("SEC_MI2S_TX"))) {
  2485. idx = SEC_MI2S;
  2486. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2487. sizeof("TERT_MI2S_TX"))) {
  2488. idx = TERT_MI2S;
  2489. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2490. sizeof("QUAT_MI2S_TX"))) {
  2491. idx = QUAT_MI2S;
  2492. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2493. sizeof("QUIN_MI2S_TX"))) {
  2494. idx = QUIN_MI2S;
  2495. } else {
  2496. pr_err("%s: unsupported channel: %s\n",
  2497. __func__, kcontrol->id.name);
  2498. idx = -EINVAL;
  2499. }
  2500. return idx;
  2501. }
  2502. static int mi2s_get_sample_rate_val(int sample_rate)
  2503. {
  2504. int sample_rate_val;
  2505. switch (sample_rate) {
  2506. case SAMPLING_RATE_8KHZ:
  2507. sample_rate_val = 0;
  2508. break;
  2509. case SAMPLING_RATE_11P025KHZ:
  2510. sample_rate_val = 1;
  2511. break;
  2512. case SAMPLING_RATE_16KHZ:
  2513. sample_rate_val = 2;
  2514. break;
  2515. case SAMPLING_RATE_22P05KHZ:
  2516. sample_rate_val = 3;
  2517. break;
  2518. case SAMPLING_RATE_32KHZ:
  2519. sample_rate_val = 4;
  2520. break;
  2521. case SAMPLING_RATE_44P1KHZ:
  2522. sample_rate_val = 5;
  2523. break;
  2524. case SAMPLING_RATE_48KHZ:
  2525. sample_rate_val = 6;
  2526. break;
  2527. case SAMPLING_RATE_96KHZ:
  2528. sample_rate_val = 7;
  2529. break;
  2530. case SAMPLING_RATE_192KHZ:
  2531. sample_rate_val = 8;
  2532. break;
  2533. default:
  2534. sample_rate_val = 6;
  2535. break;
  2536. }
  2537. return sample_rate_val;
  2538. }
  2539. static int mi2s_get_sample_rate(int value)
  2540. {
  2541. int sample_rate;
  2542. switch (value) {
  2543. case 0:
  2544. sample_rate = SAMPLING_RATE_8KHZ;
  2545. break;
  2546. case 1:
  2547. sample_rate = SAMPLING_RATE_11P025KHZ;
  2548. break;
  2549. case 2:
  2550. sample_rate = SAMPLING_RATE_16KHZ;
  2551. break;
  2552. case 3:
  2553. sample_rate = SAMPLING_RATE_22P05KHZ;
  2554. break;
  2555. case 4:
  2556. sample_rate = SAMPLING_RATE_32KHZ;
  2557. break;
  2558. case 5:
  2559. sample_rate = SAMPLING_RATE_44P1KHZ;
  2560. break;
  2561. case 6:
  2562. sample_rate = SAMPLING_RATE_48KHZ;
  2563. break;
  2564. case 7:
  2565. sample_rate = SAMPLING_RATE_96KHZ;
  2566. break;
  2567. case 8:
  2568. sample_rate = SAMPLING_RATE_192KHZ;
  2569. break;
  2570. default:
  2571. sample_rate = SAMPLING_RATE_48KHZ;
  2572. break;
  2573. }
  2574. return sample_rate;
  2575. }
  2576. static int mi2s_auxpcm_get_format(int value)
  2577. {
  2578. int format;
  2579. switch (value) {
  2580. case 0:
  2581. format = SNDRV_PCM_FORMAT_S16_LE;
  2582. break;
  2583. case 1:
  2584. format = SNDRV_PCM_FORMAT_S24_LE;
  2585. break;
  2586. case 2:
  2587. format = SNDRV_PCM_FORMAT_S24_3LE;
  2588. break;
  2589. case 3:
  2590. format = SNDRV_PCM_FORMAT_S32_LE;
  2591. break;
  2592. default:
  2593. format = SNDRV_PCM_FORMAT_S16_LE;
  2594. break;
  2595. }
  2596. return format;
  2597. }
  2598. static int mi2s_auxpcm_get_format_value(int format)
  2599. {
  2600. int value;
  2601. switch (format) {
  2602. case SNDRV_PCM_FORMAT_S16_LE:
  2603. value = 0;
  2604. break;
  2605. case SNDRV_PCM_FORMAT_S24_LE:
  2606. value = 1;
  2607. break;
  2608. case SNDRV_PCM_FORMAT_S24_3LE:
  2609. value = 2;
  2610. break;
  2611. case SNDRV_PCM_FORMAT_S32_LE:
  2612. value = 3;
  2613. break;
  2614. default:
  2615. value = 0;
  2616. break;
  2617. }
  2618. return value;
  2619. }
  2620. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2621. struct snd_ctl_elem_value *ucontrol)
  2622. {
  2623. int idx = mi2s_get_port_idx(kcontrol);
  2624. if (idx < 0)
  2625. return idx;
  2626. mi2s_rx_cfg[idx].sample_rate =
  2627. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2628. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2629. idx, mi2s_rx_cfg[idx].sample_rate,
  2630. ucontrol->value.enumerated.item[0]);
  2631. return 0;
  2632. }
  2633. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2634. struct snd_ctl_elem_value *ucontrol)
  2635. {
  2636. int idx = mi2s_get_port_idx(kcontrol);
  2637. if (idx < 0)
  2638. return idx;
  2639. ucontrol->value.enumerated.item[0] =
  2640. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2641. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2642. idx, mi2s_rx_cfg[idx].sample_rate,
  2643. ucontrol->value.enumerated.item[0]);
  2644. return 0;
  2645. }
  2646. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2647. struct snd_ctl_elem_value *ucontrol)
  2648. {
  2649. int idx = mi2s_get_port_idx(kcontrol);
  2650. if (idx < 0)
  2651. return idx;
  2652. mi2s_tx_cfg[idx].sample_rate =
  2653. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2654. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2655. idx, mi2s_tx_cfg[idx].sample_rate,
  2656. ucontrol->value.enumerated.item[0]);
  2657. return 0;
  2658. }
  2659. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2660. struct snd_ctl_elem_value *ucontrol)
  2661. {
  2662. int idx = mi2s_get_port_idx(kcontrol);
  2663. if (idx < 0)
  2664. return idx;
  2665. ucontrol->value.enumerated.item[0] =
  2666. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2667. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2668. idx, mi2s_tx_cfg[idx].sample_rate,
  2669. ucontrol->value.enumerated.item[0]);
  2670. return 0;
  2671. }
  2672. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2673. struct snd_ctl_elem_value *ucontrol)
  2674. {
  2675. int idx = mi2s_get_port_idx(kcontrol);
  2676. if (idx < 0)
  2677. return idx;
  2678. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2679. idx, mi2s_rx_cfg[idx].channels);
  2680. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2681. return 0;
  2682. }
  2683. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2684. struct snd_ctl_elem_value *ucontrol)
  2685. {
  2686. int idx = mi2s_get_port_idx(kcontrol);
  2687. if (idx < 0)
  2688. return idx;
  2689. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2690. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2691. idx, mi2s_rx_cfg[idx].channels);
  2692. return 1;
  2693. }
  2694. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2695. struct snd_ctl_elem_value *ucontrol)
  2696. {
  2697. int idx = mi2s_get_port_idx(kcontrol);
  2698. if (idx < 0)
  2699. return idx;
  2700. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2701. idx, mi2s_tx_cfg[idx].channels);
  2702. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2703. return 0;
  2704. }
  2705. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2706. struct snd_ctl_elem_value *ucontrol)
  2707. {
  2708. int idx = mi2s_get_port_idx(kcontrol);
  2709. if (idx < 0)
  2710. return idx;
  2711. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2712. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2713. idx, mi2s_tx_cfg[idx].channels);
  2714. return 1;
  2715. }
  2716. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2717. struct snd_ctl_elem_value *ucontrol)
  2718. {
  2719. int idx = mi2s_get_port_idx(kcontrol);
  2720. if (idx < 0)
  2721. return idx;
  2722. ucontrol->value.enumerated.item[0] =
  2723. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2724. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2725. idx, mi2s_rx_cfg[idx].bit_format,
  2726. ucontrol->value.enumerated.item[0]);
  2727. return 0;
  2728. }
  2729. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2730. struct snd_ctl_elem_value *ucontrol)
  2731. {
  2732. int idx = mi2s_get_port_idx(kcontrol);
  2733. if (idx < 0)
  2734. return idx;
  2735. mi2s_rx_cfg[idx].bit_format =
  2736. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2737. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2738. idx, mi2s_rx_cfg[idx].bit_format,
  2739. ucontrol->value.enumerated.item[0]);
  2740. return 0;
  2741. }
  2742. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2743. struct snd_ctl_elem_value *ucontrol)
  2744. {
  2745. int idx = mi2s_get_port_idx(kcontrol);
  2746. if (idx < 0)
  2747. return idx;
  2748. ucontrol->value.enumerated.item[0] =
  2749. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2750. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2751. idx, mi2s_tx_cfg[idx].bit_format,
  2752. ucontrol->value.enumerated.item[0]);
  2753. return 0;
  2754. }
  2755. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2756. struct snd_ctl_elem_value *ucontrol)
  2757. {
  2758. int idx = mi2s_get_port_idx(kcontrol);
  2759. if (idx < 0)
  2760. return idx;
  2761. mi2s_tx_cfg[idx].bit_format =
  2762. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2763. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2764. idx, mi2s_tx_cfg[idx].bit_format,
  2765. ucontrol->value.enumerated.item[0]);
  2766. return 0;
  2767. }
  2768. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2769. struct snd_ctl_elem_value *ucontrol)
  2770. {
  2771. int idx = aux_pcm_get_port_idx(kcontrol);
  2772. if (idx < 0)
  2773. return idx;
  2774. ucontrol->value.enumerated.item[0] =
  2775. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2776. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2777. idx, aux_pcm_rx_cfg[idx].bit_format,
  2778. ucontrol->value.enumerated.item[0]);
  2779. return 0;
  2780. }
  2781. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2782. struct snd_ctl_elem_value *ucontrol)
  2783. {
  2784. int idx = aux_pcm_get_port_idx(kcontrol);
  2785. if (idx < 0)
  2786. return idx;
  2787. aux_pcm_rx_cfg[idx].bit_format =
  2788. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2789. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2790. idx, aux_pcm_rx_cfg[idx].bit_format,
  2791. ucontrol->value.enumerated.item[0]);
  2792. return 0;
  2793. }
  2794. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2795. struct snd_ctl_elem_value *ucontrol)
  2796. {
  2797. int idx = aux_pcm_get_port_idx(kcontrol);
  2798. if (idx < 0)
  2799. return idx;
  2800. ucontrol->value.enumerated.item[0] =
  2801. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2802. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2803. idx, aux_pcm_tx_cfg[idx].bit_format,
  2804. ucontrol->value.enumerated.item[0]);
  2805. return 0;
  2806. }
  2807. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2808. struct snd_ctl_elem_value *ucontrol)
  2809. {
  2810. int idx = aux_pcm_get_port_idx(kcontrol);
  2811. if (idx < 0)
  2812. return idx;
  2813. aux_pcm_tx_cfg[idx].bit_format =
  2814. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2815. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2816. idx, aux_pcm_tx_cfg[idx].bit_format,
  2817. ucontrol->value.enumerated.item[0]);
  2818. return 0;
  2819. }
  2820. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2821. {
  2822. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2823. struct snd_soc_card *card = codec->component.card;
  2824. struct msm_asoc_mach_data *pdata =
  2825. snd_soc_card_get_drvdata(card);
  2826. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2827. msm_hifi_control);
  2828. if (!pdata || !pdata->hph_en1_gpio_p) {
  2829. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2830. return -EINVAL;
  2831. }
  2832. if (msm_hifi_control == MSM_HIFI_ON) {
  2833. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2834. /* 5msec delay needed as per HW requirement */
  2835. usleep_range(5000, 5010);
  2836. } else {
  2837. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2838. }
  2839. snd_soc_dapm_sync(dapm);
  2840. return 0;
  2841. }
  2842. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2843. struct snd_ctl_elem_value *ucontrol)
  2844. {
  2845. pr_debug("%s: msm_hifi_control = %d\n",
  2846. __func__, msm_hifi_control);
  2847. ucontrol->value.integer.value[0] = msm_hifi_control;
  2848. return 0;
  2849. }
  2850. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2851. struct snd_ctl_elem_value *ucontrol)
  2852. {
  2853. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2854. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2855. __func__, ucontrol->value.integer.value[0]);
  2856. msm_hifi_control = ucontrol->value.integer.value[0];
  2857. msm_hifi_ctrl(codec);
  2858. return 0;
  2859. }
  2860. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2861. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2862. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2863. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2864. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2865. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2866. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2867. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2868. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2869. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2870. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2871. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2872. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2873. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2874. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2875. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2876. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2877. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2878. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2879. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2880. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2881. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2882. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2883. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2884. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2885. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2886. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2887. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2888. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2889. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2890. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2891. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2892. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2893. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2894. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2895. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2896. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2897. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2898. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2899. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2900. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2901. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2902. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2903. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2904. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2905. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2906. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2907. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2908. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2909. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2910. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2911. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2912. wsa_cdc_dma_rx_0_sample_rate,
  2913. cdc_dma_rx_sample_rate_get,
  2914. cdc_dma_rx_sample_rate_put),
  2915. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2916. wsa_cdc_dma_rx_1_sample_rate,
  2917. cdc_dma_rx_sample_rate_get,
  2918. cdc_dma_rx_sample_rate_put),
  2919. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2920. rx_cdc_dma_rx_0_sample_rate,
  2921. cdc_dma_rx_sample_rate_get,
  2922. cdc_dma_rx_sample_rate_put),
  2923. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2924. rx_cdc_dma_rx_1_sample_rate,
  2925. cdc_dma_rx_sample_rate_get,
  2926. cdc_dma_rx_sample_rate_put),
  2927. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2928. rx_cdc_dma_rx_2_sample_rate,
  2929. cdc_dma_rx_sample_rate_get,
  2930. cdc_dma_rx_sample_rate_put),
  2931. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2932. rx_cdc_dma_rx_3_sample_rate,
  2933. cdc_dma_rx_sample_rate_get,
  2934. cdc_dma_rx_sample_rate_put),
  2935. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2936. rx_cdc_dma_rx_5_sample_rate,
  2937. cdc_dma_rx_sample_rate_get,
  2938. cdc_dma_rx_sample_rate_put),
  2939. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2940. wsa_cdc_dma_tx_0_sample_rate,
  2941. cdc_dma_tx_sample_rate_get,
  2942. cdc_dma_tx_sample_rate_put),
  2943. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2944. wsa_cdc_dma_tx_1_sample_rate,
  2945. cdc_dma_tx_sample_rate_get,
  2946. cdc_dma_tx_sample_rate_put),
  2947. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2948. wsa_cdc_dma_tx_2_sample_rate,
  2949. cdc_dma_tx_sample_rate_get,
  2950. cdc_dma_tx_sample_rate_put),
  2951. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2952. tx_cdc_dma_tx_0_sample_rate,
  2953. cdc_dma_tx_sample_rate_get,
  2954. cdc_dma_tx_sample_rate_put),
  2955. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2956. tx_cdc_dma_tx_3_sample_rate,
  2957. cdc_dma_tx_sample_rate_get,
  2958. cdc_dma_tx_sample_rate_put),
  2959. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2960. tx_cdc_dma_tx_4_sample_rate,
  2961. cdc_dma_tx_sample_rate_get,
  2962. cdc_dma_tx_sample_rate_put),
  2963. };
  2964. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  2965. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  2966. slim_rx_ch_get, slim_rx_ch_put),
  2967. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  2968. slim_rx_ch_get, slim_rx_ch_put),
  2969. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  2970. slim_tx_ch_get, slim_tx_ch_put),
  2971. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  2972. slim_tx_ch_get, slim_tx_ch_put),
  2973. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  2974. slim_rx_ch_get, slim_rx_ch_put),
  2975. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  2976. slim_rx_ch_get, slim_rx_ch_put),
  2977. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  2978. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  2979. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  2980. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2981. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  2982. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2983. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  2984. slim_rx_bit_format_get, slim_rx_bit_format_put),
  2985. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  2986. slim_tx_bit_format_get, slim_tx_bit_format_put),
  2987. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  2988. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2989. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  2990. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2991. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  2992. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  2993. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  2994. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2995. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  2996. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  2997. };
  2998. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2999. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3000. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3001. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3002. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3003. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3004. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3005. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3006. proxy_rx_ch_get, proxy_rx_ch_put),
  3007. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3008. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3009. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3010. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3011. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3012. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3013. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3014. usb_audio_rx_sample_rate_get,
  3015. usb_audio_rx_sample_rate_put),
  3016. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3017. usb_audio_tx_sample_rate_get,
  3018. usb_audio_tx_sample_rate_put),
  3019. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3020. ext_disp_rx_sample_rate_get,
  3021. ext_disp_rx_sample_rate_put),
  3022. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3023. tdm_rx_sample_rate_get,
  3024. tdm_rx_sample_rate_put),
  3025. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3026. tdm_tx_sample_rate_get,
  3027. tdm_tx_sample_rate_put),
  3028. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3029. tdm_rx_format_get,
  3030. tdm_rx_format_put),
  3031. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3032. tdm_tx_format_get,
  3033. tdm_tx_format_put),
  3034. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3035. tdm_rx_ch_get,
  3036. tdm_rx_ch_put),
  3037. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3038. tdm_tx_ch_get,
  3039. tdm_tx_ch_put),
  3040. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3041. tdm_rx_sample_rate_get,
  3042. tdm_rx_sample_rate_put),
  3043. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3044. tdm_tx_sample_rate_get,
  3045. tdm_tx_sample_rate_put),
  3046. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3047. tdm_rx_format_get,
  3048. tdm_rx_format_put),
  3049. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3050. tdm_tx_format_get,
  3051. tdm_tx_format_put),
  3052. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3053. tdm_rx_ch_get,
  3054. tdm_rx_ch_put),
  3055. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3056. tdm_tx_ch_get,
  3057. tdm_tx_ch_put),
  3058. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3059. tdm_rx_sample_rate_get,
  3060. tdm_rx_sample_rate_put),
  3061. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3062. tdm_tx_sample_rate_get,
  3063. tdm_tx_sample_rate_put),
  3064. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3065. tdm_rx_format_get,
  3066. tdm_rx_format_put),
  3067. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3068. tdm_tx_format_get,
  3069. tdm_tx_format_put),
  3070. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3071. tdm_rx_ch_get,
  3072. tdm_rx_ch_put),
  3073. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3074. tdm_tx_ch_get,
  3075. tdm_tx_ch_put),
  3076. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3077. tdm_rx_sample_rate_get,
  3078. tdm_rx_sample_rate_put),
  3079. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3080. tdm_tx_sample_rate_get,
  3081. tdm_tx_sample_rate_put),
  3082. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3083. tdm_rx_format_get,
  3084. tdm_rx_format_put),
  3085. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3086. tdm_tx_format_get,
  3087. tdm_tx_format_put),
  3088. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3089. tdm_rx_ch_get,
  3090. tdm_rx_ch_put),
  3091. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3092. tdm_tx_ch_get,
  3093. tdm_tx_ch_put),
  3094. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3095. tdm_rx_sample_rate_get,
  3096. tdm_rx_sample_rate_put),
  3097. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3098. tdm_tx_sample_rate_get,
  3099. tdm_tx_sample_rate_put),
  3100. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3101. tdm_rx_format_get,
  3102. tdm_rx_format_put),
  3103. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3104. tdm_tx_format_get,
  3105. tdm_tx_format_put),
  3106. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3107. tdm_rx_ch_get,
  3108. tdm_rx_ch_put),
  3109. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3110. tdm_tx_ch_get,
  3111. tdm_tx_ch_put),
  3112. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3113. aux_pcm_rx_sample_rate_get,
  3114. aux_pcm_rx_sample_rate_put),
  3115. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3116. aux_pcm_rx_sample_rate_get,
  3117. aux_pcm_rx_sample_rate_put),
  3118. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3119. aux_pcm_rx_sample_rate_get,
  3120. aux_pcm_rx_sample_rate_put),
  3121. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3122. aux_pcm_rx_sample_rate_get,
  3123. aux_pcm_rx_sample_rate_put),
  3124. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3125. aux_pcm_rx_sample_rate_get,
  3126. aux_pcm_rx_sample_rate_put),
  3127. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3128. aux_pcm_tx_sample_rate_get,
  3129. aux_pcm_tx_sample_rate_put),
  3130. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3131. aux_pcm_tx_sample_rate_get,
  3132. aux_pcm_tx_sample_rate_put),
  3133. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3134. aux_pcm_tx_sample_rate_get,
  3135. aux_pcm_tx_sample_rate_put),
  3136. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3137. aux_pcm_tx_sample_rate_get,
  3138. aux_pcm_tx_sample_rate_put),
  3139. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3140. aux_pcm_tx_sample_rate_get,
  3141. aux_pcm_tx_sample_rate_put),
  3142. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3143. mi2s_rx_sample_rate_get,
  3144. mi2s_rx_sample_rate_put),
  3145. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3146. mi2s_rx_sample_rate_get,
  3147. mi2s_rx_sample_rate_put),
  3148. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3149. mi2s_rx_sample_rate_get,
  3150. mi2s_rx_sample_rate_put),
  3151. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3152. mi2s_rx_sample_rate_get,
  3153. mi2s_rx_sample_rate_put),
  3154. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3155. mi2s_rx_sample_rate_get,
  3156. mi2s_rx_sample_rate_put),
  3157. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3158. mi2s_tx_sample_rate_get,
  3159. mi2s_tx_sample_rate_put),
  3160. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3161. mi2s_tx_sample_rate_get,
  3162. mi2s_tx_sample_rate_put),
  3163. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3164. mi2s_tx_sample_rate_get,
  3165. mi2s_tx_sample_rate_put),
  3166. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3167. mi2s_tx_sample_rate_get,
  3168. mi2s_tx_sample_rate_put),
  3169. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3170. mi2s_tx_sample_rate_get,
  3171. mi2s_tx_sample_rate_put),
  3172. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3173. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3174. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3175. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3176. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3177. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3178. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3179. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3180. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3181. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3182. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3183. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3184. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3185. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3186. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3187. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3188. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3189. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3190. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3191. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3192. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3193. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3194. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3195. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3196. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3197. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3198. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3199. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3200. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3201. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3202. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3203. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3204. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3205. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3206. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3207. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3208. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3209. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3210. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3211. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3212. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3213. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3214. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3215. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3216. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3217. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3218. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3219. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3220. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3221. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3222. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3223. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3224. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3225. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3226. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3227. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3228. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3229. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3230. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3231. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3232. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3233. msm_hifi_put),
  3234. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3235. msm_bt_sample_rate_get,
  3236. msm_bt_sample_rate_put),
  3237. };
  3238. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3239. int enable, bool dapm)
  3240. {
  3241. int ret = 0;
  3242. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3243. ret = tavil_cdc_mclk_enable(codec, enable);
  3244. } else {
  3245. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3246. __func__);
  3247. ret = -EINVAL;
  3248. }
  3249. return ret;
  3250. }
  3251. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3252. int enable, bool dapm)
  3253. {
  3254. int ret = 0;
  3255. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3256. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3257. } else {
  3258. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3259. __func__);
  3260. ret = -EINVAL;
  3261. }
  3262. return ret;
  3263. }
  3264. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3265. struct snd_kcontrol *kcontrol, int event)
  3266. {
  3267. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3268. pr_debug("%s: event = %d\n", __func__, event);
  3269. switch (event) {
  3270. case SND_SOC_DAPM_PRE_PMU:
  3271. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3272. case SND_SOC_DAPM_POST_PMD:
  3273. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3274. }
  3275. return 0;
  3276. }
  3277. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3278. struct snd_kcontrol *kcontrol, int event)
  3279. {
  3280. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3281. pr_debug("%s: event = %d\n", __func__, event);
  3282. switch (event) {
  3283. case SND_SOC_DAPM_PRE_PMU:
  3284. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3285. case SND_SOC_DAPM_POST_PMD:
  3286. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3287. }
  3288. return 0;
  3289. }
  3290. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3291. struct snd_kcontrol *k, int event)
  3292. {
  3293. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3294. struct snd_soc_card *card = codec->component.card;
  3295. struct msm_asoc_mach_data *pdata =
  3296. snd_soc_card_get_drvdata(card);
  3297. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3298. __func__, msm_hifi_control);
  3299. if (!pdata || !pdata->hph_en0_gpio_p) {
  3300. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3301. return -EINVAL;
  3302. }
  3303. if (msm_hifi_control != MSM_HIFI_ON) {
  3304. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3305. __func__);
  3306. return 0;
  3307. }
  3308. switch (event) {
  3309. case SND_SOC_DAPM_POST_PMU:
  3310. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3311. break;
  3312. case SND_SOC_DAPM_PRE_PMD:
  3313. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3314. break;
  3315. }
  3316. return 0;
  3317. }
  3318. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3319. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3320. msm_mclk_event,
  3321. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3322. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3323. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3324. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3325. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3326. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3327. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3328. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3329. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3330. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3331. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3332. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3333. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3334. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3335. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3336. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3337. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3338. };
  3339. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3340. struct snd_kcontrol *kcontrol, int event)
  3341. {
  3342. struct msm_asoc_mach_data *pdata = NULL;
  3343. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3344. int ret = 0;
  3345. u32 dmic_idx;
  3346. int *dmic_gpio_cnt;
  3347. struct device_node *dmic_gpio;
  3348. char *wname;
  3349. wname = strpbrk(w->name, "0123");
  3350. if (!wname) {
  3351. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3352. return -EINVAL;
  3353. }
  3354. ret = kstrtouint(wname, 10, &dmic_idx);
  3355. if (ret < 0) {
  3356. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3357. __func__);
  3358. return -EINVAL;
  3359. }
  3360. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3361. switch (dmic_idx) {
  3362. case 0:
  3363. case 1:
  3364. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3365. dmic_gpio = pdata->dmic01_gpio_p;
  3366. break;
  3367. case 2:
  3368. case 3:
  3369. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3370. dmic_gpio = pdata->dmic23_gpio_p;
  3371. break;
  3372. default:
  3373. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3374. __func__);
  3375. return -EINVAL;
  3376. }
  3377. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3378. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3379. switch (event) {
  3380. case SND_SOC_DAPM_PRE_PMU:
  3381. (*dmic_gpio_cnt)++;
  3382. if (*dmic_gpio_cnt == 1) {
  3383. ret = msm_cdc_pinctrl_select_active_state(
  3384. dmic_gpio);
  3385. if (ret < 0) {
  3386. pr_err("%s: gpio set cannot be activated %sd",
  3387. __func__, "dmic_gpio");
  3388. return ret;
  3389. }
  3390. }
  3391. break;
  3392. case SND_SOC_DAPM_POST_PMD:
  3393. (*dmic_gpio_cnt)--;
  3394. if (*dmic_gpio_cnt == 0) {
  3395. ret = msm_cdc_pinctrl_select_sleep_state(
  3396. dmic_gpio);
  3397. if (ret < 0) {
  3398. pr_err("%s: gpio set cannot be de-activated %sd",
  3399. __func__, "dmic_gpio");
  3400. return ret;
  3401. }
  3402. }
  3403. break;
  3404. default:
  3405. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3406. return -EINVAL;
  3407. }
  3408. return 0;
  3409. }
  3410. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3411. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3412. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3413. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3414. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3415. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3416. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3417. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3418. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3419. };
  3420. static inline int param_is_mask(int p)
  3421. {
  3422. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3423. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3424. }
  3425. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3426. int n)
  3427. {
  3428. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3429. }
  3430. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3431. unsigned int bit)
  3432. {
  3433. if (bit >= SNDRV_MASK_MAX)
  3434. return;
  3435. if (param_is_mask(n)) {
  3436. struct snd_mask *m = param_to_mask(p, n);
  3437. m->bits[0] = 0;
  3438. m->bits[1] = 0;
  3439. m->bits[bit >> 5] |= (1 << (bit & 31));
  3440. }
  3441. }
  3442. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3443. {
  3444. int ch_id = 0;
  3445. switch (be_id) {
  3446. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3447. ch_id = SLIM_RX_0;
  3448. break;
  3449. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3450. ch_id = SLIM_RX_1;
  3451. break;
  3452. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3453. ch_id = SLIM_RX_2;
  3454. break;
  3455. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3456. ch_id = SLIM_RX_3;
  3457. break;
  3458. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3459. ch_id = SLIM_RX_4;
  3460. break;
  3461. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3462. ch_id = SLIM_RX_6;
  3463. break;
  3464. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3465. ch_id = SLIM_TX_0;
  3466. break;
  3467. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3468. ch_id = SLIM_TX_3;
  3469. break;
  3470. default:
  3471. ch_id = SLIM_RX_0;
  3472. break;
  3473. }
  3474. return ch_id;
  3475. }
  3476. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3477. {
  3478. int idx = 0;
  3479. switch (be_id) {
  3480. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3481. idx = WSA_CDC_DMA_RX_0;
  3482. break;
  3483. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3484. idx = WSA_CDC_DMA_TX_0;
  3485. break;
  3486. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3487. idx = WSA_CDC_DMA_RX_1;
  3488. break;
  3489. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3490. idx = WSA_CDC_DMA_TX_1;
  3491. break;
  3492. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3493. idx = WSA_CDC_DMA_TX_2;
  3494. break;
  3495. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3496. idx = RX_CDC_DMA_RX_0;
  3497. break;
  3498. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3499. idx = RX_CDC_DMA_RX_1;
  3500. break;
  3501. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3502. idx = RX_CDC_DMA_RX_2;
  3503. break;
  3504. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3505. idx = RX_CDC_DMA_RX_3;
  3506. break;
  3507. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3508. idx = RX_CDC_DMA_RX_5;
  3509. break;
  3510. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3511. idx = TX_CDC_DMA_TX_0;
  3512. break;
  3513. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3514. idx = TX_CDC_DMA_TX_3;
  3515. break;
  3516. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3517. idx = TX_CDC_DMA_TX_4;
  3518. break;
  3519. default:
  3520. idx = RX_CDC_DMA_RX_0;
  3521. break;
  3522. }
  3523. return idx;
  3524. }
  3525. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3526. {
  3527. int idx = -EINVAL;
  3528. switch (be_id) {
  3529. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3530. idx = DP_RX_IDX;
  3531. break;
  3532. default:
  3533. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3534. idx = -EINVAL;
  3535. break;
  3536. }
  3537. return idx;
  3538. }
  3539. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3540. struct snd_pcm_hw_params *params)
  3541. {
  3542. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3543. struct snd_interval *rate = hw_param_interval(params,
  3544. SNDRV_PCM_HW_PARAM_RATE);
  3545. struct snd_interval *channels = hw_param_interval(params,
  3546. SNDRV_PCM_HW_PARAM_CHANNELS);
  3547. int rc = 0;
  3548. int idx;
  3549. void *config = NULL;
  3550. struct snd_soc_codec *codec = NULL;
  3551. pr_debug("%s: format = %d, rate = %d\n",
  3552. __func__, params_format(params), params_rate(params));
  3553. switch (dai_link->id) {
  3554. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3555. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3556. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3557. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3558. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3559. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3560. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3561. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3562. slim_rx_cfg[idx].bit_format);
  3563. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3564. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3565. break;
  3566. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3567. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3568. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3569. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3570. slim_tx_cfg[idx].bit_format);
  3571. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3572. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3573. break;
  3574. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3575. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3576. slim_tx_cfg[1].bit_format);
  3577. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3578. channels->min = channels->max = slim_tx_cfg[1].channels;
  3579. break;
  3580. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3581. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3582. SNDRV_PCM_FORMAT_S32_LE);
  3583. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3584. channels->min = channels->max = msm_vi_feed_tx_ch;
  3585. break;
  3586. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3587. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3588. slim_rx_cfg[5].bit_format);
  3589. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3590. channels->min = channels->max = slim_rx_cfg[5].channels;
  3591. break;
  3592. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3593. codec = rtd->codec;
  3594. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3595. channels->min = channels->max = 1;
  3596. config = msm_codec_fn.get_afe_config_fn(codec,
  3597. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3598. if (config) {
  3599. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3600. config, SLIMBUS_5_TX);
  3601. if (rc)
  3602. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3603. __func__, rc);
  3604. }
  3605. break;
  3606. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3607. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3608. slim_rx_cfg[SLIM_RX_7].bit_format);
  3609. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3610. channels->min = channels->max =
  3611. slim_rx_cfg[SLIM_RX_7].channels;
  3612. break;
  3613. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3614. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3615. channels->min = channels->max =
  3616. slim_tx_cfg[SLIM_TX_7].channels;
  3617. break;
  3618. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3619. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3620. channels->min = channels->max =
  3621. slim_tx_cfg[SLIM_TX_8].channels;
  3622. break;
  3623. case MSM_BACKEND_DAI_USB_RX:
  3624. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3625. usb_rx_cfg.bit_format);
  3626. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3627. channels->min = channels->max = usb_rx_cfg.channels;
  3628. break;
  3629. case MSM_BACKEND_DAI_USB_TX:
  3630. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3631. usb_tx_cfg.bit_format);
  3632. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3633. channels->min = channels->max = usb_tx_cfg.channels;
  3634. break;
  3635. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3636. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3637. if (idx < 0) {
  3638. pr_err("%s: Incorrect ext disp idx %d\n",
  3639. __func__, idx);
  3640. rc = idx;
  3641. goto done;
  3642. }
  3643. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3644. ext_disp_rx_cfg[idx].bit_format);
  3645. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3646. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3647. break;
  3648. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3649. channels->min = channels->max = proxy_rx_cfg.channels;
  3650. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3651. break;
  3652. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3653. channels->min = channels->max =
  3654. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3655. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3656. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3657. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3658. break;
  3659. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3660. channels->min = channels->max =
  3661. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3662. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3663. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3664. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3665. break;
  3666. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3667. channels->min = channels->max =
  3668. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3669. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3670. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3671. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3672. break;
  3673. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3674. channels->min = channels->max =
  3675. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3676. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3677. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3678. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3679. break;
  3680. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3681. channels->min = channels->max =
  3682. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3683. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3684. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3685. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3686. break;
  3687. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3688. channels->min = channels->max =
  3689. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3690. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3691. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3692. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3693. break;
  3694. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3695. channels->min = channels->max =
  3696. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3697. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3698. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3699. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3700. break;
  3701. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3702. channels->min = channels->max =
  3703. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3704. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3705. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3706. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3707. break;
  3708. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3709. channels->min = channels->max =
  3710. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3711. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3712. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3713. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3714. break;
  3715. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3716. channels->min = channels->max =
  3717. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3718. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3719. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3720. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3721. break;
  3722. case MSM_BACKEND_DAI_AUXPCM_RX:
  3723. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3724. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3725. rate->min = rate->max =
  3726. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3727. channels->min = channels->max =
  3728. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3729. break;
  3730. case MSM_BACKEND_DAI_AUXPCM_TX:
  3731. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3732. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3733. rate->min = rate->max =
  3734. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3735. channels->min = channels->max =
  3736. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3737. break;
  3738. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3739. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3740. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3741. rate->min = rate->max =
  3742. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3743. channels->min = channels->max =
  3744. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3745. break;
  3746. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3747. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3748. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3749. rate->min = rate->max =
  3750. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3751. channels->min = channels->max =
  3752. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3753. break;
  3754. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3755. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3756. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3757. rate->min = rate->max =
  3758. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3759. channels->min = channels->max =
  3760. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3761. break;
  3762. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3763. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3764. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3765. rate->min = rate->max =
  3766. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3767. channels->min = channels->max =
  3768. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3769. break;
  3770. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3771. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3772. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3773. rate->min = rate->max =
  3774. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3775. channels->min = channels->max =
  3776. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3777. break;
  3778. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3779. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3780. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3781. rate->min = rate->max =
  3782. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3783. channels->min = channels->max =
  3784. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3785. break;
  3786. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3787. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3788. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3789. rate->min = rate->max =
  3790. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3791. channels->min = channels->max =
  3792. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3793. break;
  3794. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3795. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3796. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3797. rate->min = rate->max =
  3798. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3799. channels->min = channels->max =
  3800. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3801. break;
  3802. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3803. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3804. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3805. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3806. channels->min = channels->max =
  3807. mi2s_rx_cfg[PRIM_MI2S].channels;
  3808. break;
  3809. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3810. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3811. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3812. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3813. channels->min = channels->max =
  3814. mi2s_tx_cfg[PRIM_MI2S].channels;
  3815. break;
  3816. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3817. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3818. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3819. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3820. channels->min = channels->max =
  3821. mi2s_rx_cfg[SEC_MI2S].channels;
  3822. break;
  3823. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3824. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3825. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3826. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3827. channels->min = channels->max =
  3828. mi2s_tx_cfg[SEC_MI2S].channels;
  3829. break;
  3830. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3831. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3832. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3833. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3834. channels->min = channels->max =
  3835. mi2s_rx_cfg[TERT_MI2S].channels;
  3836. break;
  3837. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3838. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3839. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3840. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3841. channels->min = channels->max =
  3842. mi2s_tx_cfg[TERT_MI2S].channels;
  3843. break;
  3844. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3845. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3846. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3847. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3848. channels->min = channels->max =
  3849. mi2s_rx_cfg[QUAT_MI2S].channels;
  3850. break;
  3851. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3852. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3853. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3854. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3855. channels->min = channels->max =
  3856. mi2s_tx_cfg[QUAT_MI2S].channels;
  3857. break;
  3858. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3859. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3860. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3861. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3862. channels->min = channels->max =
  3863. mi2s_rx_cfg[QUIN_MI2S].channels;
  3864. break;
  3865. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3866. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3867. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3868. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3869. channels->min = channels->max =
  3870. mi2s_tx_cfg[QUIN_MI2S].channels;
  3871. break;
  3872. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3873. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3874. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3875. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3876. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3877. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3878. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3879. cdc_dma_rx_cfg[idx].bit_format);
  3880. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3881. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3882. break;
  3883. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3884. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3885. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3886. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  3887. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3888. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3889. cdc_dma_tx_cfg[idx].bit_format);
  3890. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3891. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3892. break;
  3893. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3894. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3895. SNDRV_PCM_FORMAT_S32_LE);
  3896. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3897. channels->min = channels->max = msm_vi_feed_tx_ch;
  3898. break;
  3899. default:
  3900. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3901. break;
  3902. }
  3903. done:
  3904. return rc;
  3905. }
  3906. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3907. {
  3908. int value = 0;
  3909. bool ret = 0;
  3910. struct snd_soc_card *card = codec->component.card;
  3911. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3912. struct pinctrl_state *en2_pinctrl_active;
  3913. struct pinctrl_state *en2_pinctrl_sleep;
  3914. if (!pdata->usbc_en2_gpio_p) {
  3915. if (active) {
  3916. /* if active and usbc_en2_gpio undefined, get pin */
  3917. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3918. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3919. dev_err(card->dev,
  3920. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3921. __func__,
  3922. PTR_ERR(pdata->usbc_en2_gpio_p));
  3923. pdata->usbc_en2_gpio_p = NULL;
  3924. return false;
  3925. }
  3926. } else {
  3927. /* if not active and usbc_en2_gpio undefined, return */
  3928. return false;
  3929. }
  3930. }
  3931. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3932. "qcom,usbc-analog-en2-gpio", 0);
  3933. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3934. dev_err(card->dev, "%s, property %s not in node %s",
  3935. __func__, "qcom,usbc-analog-en2-gpio",
  3936. card->dev->of_node->full_name);
  3937. return false;
  3938. }
  3939. en2_pinctrl_active = pinctrl_lookup_state(
  3940. pdata->usbc_en2_gpio_p, "aud_active");
  3941. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3942. dev_err(card->dev,
  3943. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3944. __func__, PTR_ERR(en2_pinctrl_active));
  3945. ret = false;
  3946. goto err_lookup_state;
  3947. }
  3948. en2_pinctrl_sleep = pinctrl_lookup_state(
  3949. pdata->usbc_en2_gpio_p, "aud_sleep");
  3950. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3951. dev_err(card->dev,
  3952. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3953. __func__, PTR_ERR(en2_pinctrl_sleep));
  3954. ret = false;
  3955. goto err_lookup_state;
  3956. }
  3957. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3958. if (active) {
  3959. dev_dbg(codec->dev, "%s: enter\n", __func__);
  3960. if (pdata->usbc_en2_gpio_p) {
  3961. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3962. if (value)
  3963. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3964. en2_pinctrl_sleep);
  3965. else
  3966. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3967. en2_pinctrl_active);
  3968. } else if (pdata->usbc_en2_gpio >= 0) {
  3969. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  3970. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  3971. }
  3972. pr_debug("%s: swap select switch %d to %d\n", __func__,
  3973. value, !value);
  3974. ret = true;
  3975. } else {
  3976. /* if not active, release usbc_en2_gpio_p pin */
  3977. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  3978. en2_pinctrl_sleep);
  3979. }
  3980. err_lookup_state:
  3981. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  3982. pdata->usbc_en2_gpio_p = NULL;
  3983. return ret;
  3984. }
  3985. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3986. {
  3987. int value = 0;
  3988. bool ret = false;
  3989. struct snd_soc_card *card;
  3990. struct msm_asoc_mach_data *pdata;
  3991. if (!codec) {
  3992. pr_err("%s codec is NULL\n", __func__);
  3993. return false;
  3994. }
  3995. card = codec->component.card;
  3996. pdata = snd_soc_card_get_drvdata(card);
  3997. if (!pdata)
  3998. return false;
  3999. if (wcd_mbhc_cfg.enable_usbc_analog)
  4000. return msm_usbc_swap_gnd_mic(codec, active);
  4001. /* if usbc is not defined, swap using us_euro_gpio_p */
  4002. if (pdata->us_euro_gpio_p) {
  4003. value = msm_cdc_pinctrl_get_state(
  4004. pdata->us_euro_gpio_p);
  4005. if (value)
  4006. msm_cdc_pinctrl_select_sleep_state(
  4007. pdata->us_euro_gpio_p);
  4008. else
  4009. msm_cdc_pinctrl_select_active_state(
  4010. pdata->us_euro_gpio_p);
  4011. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4012. __func__, value, !value);
  4013. ret = true;
  4014. }
  4015. return ret;
  4016. }
  4017. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4018. {
  4019. int ret = 0;
  4020. void *config_data = NULL;
  4021. if (!msm_codec_fn.get_afe_config_fn) {
  4022. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4023. __func__);
  4024. return -EINVAL;
  4025. }
  4026. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4027. AFE_CDC_REGISTERS_CONFIG);
  4028. if (config_data) {
  4029. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4030. if (ret) {
  4031. dev_err(codec->dev,
  4032. "%s: Failed to set codec registers config %d\n",
  4033. __func__, ret);
  4034. return ret;
  4035. }
  4036. }
  4037. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4038. AFE_CDC_REGISTER_PAGE_CONFIG);
  4039. if (config_data) {
  4040. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4041. 0);
  4042. if (ret)
  4043. dev_err(codec->dev,
  4044. "%s: Failed to set cdc register page config\n",
  4045. __func__);
  4046. }
  4047. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4048. AFE_SLIMBUS_SLAVE_CONFIG);
  4049. if (config_data) {
  4050. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4051. if (ret) {
  4052. dev_err(codec->dev,
  4053. "%s: Failed to set slimbus slave config %d\n",
  4054. __func__, ret);
  4055. return ret;
  4056. }
  4057. }
  4058. return 0;
  4059. }
  4060. static void msm_afe_clear_config(void)
  4061. {
  4062. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4063. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4064. }
  4065. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  4066. struct snd_card *card)
  4067. {
  4068. int ret = 0;
  4069. unsigned long timeout;
  4070. int adsp_ready = 0;
  4071. bool snd_card_online = 0;
  4072. timeout = jiffies +
  4073. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  4074. do {
  4075. if (!snd_card_online) {
  4076. snd_card_online = snd_card_is_online_state(card);
  4077. pr_debug("%s: Sound card is %s\n", __func__,
  4078. snd_card_online ? "Online" : "Offline");
  4079. }
  4080. if (!adsp_ready) {
  4081. adsp_ready = q6core_is_adsp_ready();
  4082. pr_debug("%s: ADSP Audio is %s\n", __func__,
  4083. adsp_ready ? "ready" : "not ready");
  4084. }
  4085. if (snd_card_online && adsp_ready)
  4086. break;
  4087. /*
  4088. * Sound card/ADSP will be coming up after subsystem restart and
  4089. * it might not be fully up when the control reaches
  4090. * here. So, wait for 50msec before checking ADSP state
  4091. */
  4092. msleep(50);
  4093. } while (time_after(timeout, jiffies));
  4094. if (!snd_card_online || !adsp_ready) {
  4095. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  4096. __func__,
  4097. snd_card_online ? "Online" : "Offline",
  4098. adsp_ready ? "ready" : "not ready");
  4099. ret = -ETIMEDOUT;
  4100. goto err;
  4101. }
  4102. ret = msm_afe_set_config(codec);
  4103. if (ret)
  4104. pr_err("%s: Failed to set AFE config. err %d\n",
  4105. __func__, ret);
  4106. return 0;
  4107. err:
  4108. return ret;
  4109. }
  4110. static int sm6150_notifier_service_cb(struct notifier_block *this,
  4111. unsigned long opcode, void *ptr)
  4112. {
  4113. int ret;
  4114. struct snd_soc_card *card = NULL;
  4115. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  4116. struct snd_soc_pcm_runtime *rtd;
  4117. struct snd_soc_codec *codec;
  4118. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  4119. switch (opcode) {
  4120. case AUDIO_NOTIFIER_SERVICE_DOWN:
  4121. /*
  4122. * Use flag to ignore initial boot notifications
  4123. * On initial boot msm_adsp_power_up_config is
  4124. * called on init. There is no need to clear
  4125. * and set the config again on initial boot.
  4126. */
  4127. if (is_initial_boot)
  4128. break;
  4129. msm_afe_clear_config();
  4130. break;
  4131. case AUDIO_NOTIFIER_SERVICE_UP:
  4132. if (is_initial_boot) {
  4133. is_initial_boot = false;
  4134. break;
  4135. }
  4136. if (!spdev)
  4137. return -EINVAL;
  4138. card = platform_get_drvdata(spdev);
  4139. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  4140. if (!rtd) {
  4141. dev_err(card->dev,
  4142. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  4143. __func__, be_dl_name);
  4144. ret = -EINVAL;
  4145. goto err;
  4146. }
  4147. codec = rtd->codec;
  4148. ret = msm_adsp_power_up_config(codec, card->snd_card);
  4149. if (ret < 0) {
  4150. dev_err(card->dev,
  4151. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  4152. __func__, ret);
  4153. goto err;
  4154. }
  4155. break;
  4156. default:
  4157. break;
  4158. }
  4159. err:
  4160. return NOTIFY_OK;
  4161. }
  4162. static struct notifier_block service_nb = {
  4163. .notifier_call = sm6150_notifier_service_cb,
  4164. .priority = -INT_MAX,
  4165. };
  4166. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4167. {
  4168. int ret = 0;
  4169. void *config_data;
  4170. struct snd_soc_codec *codec = rtd->codec;
  4171. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4172. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4173. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4174. struct snd_soc_component *aux_comp;
  4175. struct snd_card *card;
  4176. struct snd_info_entry *entry;
  4177. struct msm_asoc_mach_data *pdata =
  4178. snd_soc_card_get_drvdata(rtd->card);
  4179. /*
  4180. * Codec SLIMBUS configuration
  4181. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4182. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4183. * TX14, TX15, TX16
  4184. */
  4185. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4186. 150, 151};
  4187. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4188. 134, 135, 136, 137, 138, 139,
  4189. 140, 141, 142, 143};
  4190. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4191. rtd->pmdown_time = 0;
  4192. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4193. ARRAY_SIZE(msm_tavil_snd_controls));
  4194. if (ret < 0) {
  4195. pr_err("%s: add_codec_controls failed, err %d\n",
  4196. __func__, ret);
  4197. return ret;
  4198. }
  4199. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4200. ARRAY_SIZE(msm_common_snd_controls));
  4201. if (ret < 0) {
  4202. pr_err("%s: add_codec_controls failed, err %d\n",
  4203. __func__, ret);
  4204. return ret;
  4205. }
  4206. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4207. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4208. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4209. ARRAY_SIZE(wcd_audio_paths_tavil));
  4210. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4211. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4212. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4213. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4214. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4217. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4219. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4220. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4221. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4222. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4223. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4224. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4225. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4226. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4227. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4228. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4229. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4230. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4231. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4232. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4233. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4234. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4235. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4236. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4237. snd_soc_dapm_sync(dapm);
  4238. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4239. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4240. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4241. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  4242. if (ret) {
  4243. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4244. goto err;
  4245. }
  4246. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4247. AFE_AANC_VERSION);
  4248. if (config_data) {
  4249. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4250. if (ret) {
  4251. pr_err("%s: Failed to set aanc version %d\n",
  4252. __func__, ret);
  4253. goto err;
  4254. }
  4255. }
  4256. /*
  4257. * Send speaker configuration only for WSA8810.
  4258. * Default configuration is for WSA8815.
  4259. */
  4260. pr_debug("%s: Number of aux devices: %d\n",
  4261. __func__, rtd->card->num_aux_devs);
  4262. if (rtd->card->num_aux_devs &&
  4263. !list_empty(&rtd->card->aux_comp_list)) {
  4264. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4265. struct snd_soc_component, card_aux_list);
  4266. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4267. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4268. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4269. tavil_set_spkr_gain_offset(rtd->codec,
  4270. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4271. }
  4272. }
  4273. card = rtd->card->snd_card;
  4274. entry = snd_info_create_subdir(card->module, "codecs",
  4275. card->proc_root);
  4276. if (!entry) {
  4277. pr_debug("%s: Cannot create codecs module entry\n",
  4278. __func__);
  4279. ret = 0;
  4280. goto err;
  4281. }
  4282. pdata->codec_root = entry;
  4283. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4284. codec_reg_done = true;
  4285. return 0;
  4286. err:
  4287. return ret;
  4288. }
  4289. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4290. {
  4291. int ret = 0;
  4292. struct snd_soc_codec *codec = rtd->codec;
  4293. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4294. struct snd_card *card;
  4295. struct snd_info_entry *entry;
  4296. struct snd_soc_component *aux_comp;
  4297. struct msm_asoc_mach_data *pdata =
  4298. snd_soc_card_get_drvdata(rtd->card);
  4299. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4300. ARRAY_SIZE(msm_int_snd_controls));
  4301. if (ret < 0) {
  4302. pr_err("%s: add_codec_controls failed: %d\n",
  4303. __func__, ret);
  4304. return ret;
  4305. }
  4306. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4307. ARRAY_SIZE(msm_common_snd_controls));
  4308. if (ret < 0) {
  4309. pr_err("%s: add common snd controls failed: %d\n",
  4310. __func__, ret);
  4311. return ret;
  4312. }
  4313. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4314. ARRAY_SIZE(msm_int_dapm_widgets));
  4315. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4316. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4317. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4318. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4319. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4320. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4321. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4322. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4323. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4324. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4325. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4326. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4327. snd_soc_dapm_sync(dapm);
  4328. /*
  4329. * Send speaker configuration only for WSA8810.
  4330. * Default configuration is for WSA8815.
  4331. */
  4332. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4333. __func__, rtd->card->num_aux_devs);
  4334. if (rtd->card->num_aux_devs &&
  4335. !list_empty(&rtd->card->component_dev_list)) {
  4336. aux_comp = list_first_entry(
  4337. &rtd->card->component_dev_list,
  4338. struct snd_soc_component,
  4339. card_aux_list);
  4340. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4341. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4342. wsa_macro_set_spkr_mode(rtd->codec,
  4343. WSA_MACRO_SPKR_MODE_1);
  4344. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4345. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4346. }
  4347. }
  4348. card = rtd->card->snd_card;
  4349. if (!pdata->codec_root) {
  4350. entry = snd_info_create_subdir(card->module, "codecs",
  4351. card->proc_root);
  4352. if (!entry) {
  4353. pr_debug("%s: Cannot create codecs module entry\n",
  4354. __func__);
  4355. ret = 0;
  4356. goto err;
  4357. }
  4358. pdata->codec_root = entry;
  4359. }
  4360. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4361. codec_reg_done = true;
  4362. return 0;
  4363. err:
  4364. return ret;
  4365. }
  4366. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4367. {
  4368. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4369. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4370. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4371. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4372. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4373. }
  4374. static void *def_wcd_mbhc_cal(void)
  4375. {
  4376. void *wcd_mbhc_cal;
  4377. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4378. u16 *btn_high;
  4379. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4380. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4381. if (!wcd_mbhc_cal)
  4382. return NULL;
  4383. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4384. S(v_hs_max, 1600);
  4385. #undef S
  4386. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4387. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4388. #undef S
  4389. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4390. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4391. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4392. btn_high[0] = 75;
  4393. btn_high[1] = 150;
  4394. btn_high[2] = 237;
  4395. btn_high[3] = 500;
  4396. btn_high[4] = 500;
  4397. btn_high[5] = 500;
  4398. btn_high[6] = 500;
  4399. btn_high[7] = 500;
  4400. return wcd_mbhc_cal;
  4401. }
  4402. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4403. struct snd_pcm_hw_params *params)
  4404. {
  4405. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4406. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4407. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4408. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4409. int ret = 0;
  4410. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4411. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4412. u32 user_set_tx_ch = 0;
  4413. u32 rx_ch_count;
  4414. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4415. ret = snd_soc_dai_get_channel_map(codec_dai,
  4416. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4417. if (ret < 0) {
  4418. pr_err("%s: failed to get codec chan map, err:%d\n",
  4419. __func__, ret);
  4420. goto err;
  4421. }
  4422. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4423. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4424. slim_rx_cfg[5].channels);
  4425. rx_ch_count = slim_rx_cfg[5].channels;
  4426. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4427. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4428. slim_rx_cfg[2].channels);
  4429. rx_ch_count = slim_rx_cfg[2].channels;
  4430. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4431. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4432. slim_rx_cfg[6].channels);
  4433. rx_ch_count = slim_rx_cfg[6].channels;
  4434. } else {
  4435. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4436. slim_rx_cfg[0].channels);
  4437. rx_ch_count = slim_rx_cfg[0].channels;
  4438. }
  4439. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4440. rx_ch_count, rx_ch);
  4441. if (ret < 0) {
  4442. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4443. __func__, ret);
  4444. goto err;
  4445. }
  4446. } else {
  4447. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4448. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4449. ret = snd_soc_dai_get_channel_map(codec_dai,
  4450. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4451. if (ret < 0) {
  4452. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4453. __func__, ret);
  4454. goto err;
  4455. }
  4456. /* For <codec>_tx1 case */
  4457. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4458. user_set_tx_ch = slim_tx_cfg[0].channels;
  4459. /* For <codec>_tx3 case */
  4460. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4461. user_set_tx_ch = slim_tx_cfg[1].channels;
  4462. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4463. user_set_tx_ch = msm_vi_feed_tx_ch;
  4464. else
  4465. user_set_tx_ch = tx_ch_cnt;
  4466. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4467. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4468. tx_ch_cnt, dai_link->id);
  4469. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4470. user_set_tx_ch, tx_ch, 0, 0);
  4471. if (ret < 0)
  4472. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4473. __func__, ret);
  4474. }
  4475. err:
  4476. return ret;
  4477. }
  4478. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4479. struct snd_pcm_hw_params *params)
  4480. {
  4481. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4482. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4483. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4484. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4485. int ret = 0;
  4486. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4487. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4488. u32 user_set_tx_ch = 0;
  4489. u32 user_set_rx_ch = 0;
  4490. u32 ch_id;
  4491. ret = snd_soc_dai_get_channel_map(codec_dai,
  4492. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4493. &rx_ch_cdc_dma);
  4494. if (ret < 0) {
  4495. pr_err("%s: failed to get codec chan map, err:%d\n",
  4496. __func__, ret);
  4497. goto err;
  4498. }
  4499. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4500. switch (dai_link->id) {
  4501. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4502. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4503. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4504. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4505. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4506. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4507. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4508. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4509. {
  4510. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4511. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4512. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4513. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4514. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4515. user_set_rx_ch, &rx_ch_cdc_dma);
  4516. if (ret < 0) {
  4517. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4518. __func__, ret);
  4519. goto err;
  4520. }
  4521. }
  4522. break;
  4523. }
  4524. } else {
  4525. switch (dai_link->id) {
  4526. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4527. {
  4528. user_set_tx_ch = msm_vi_feed_tx_ch;
  4529. }
  4530. break;
  4531. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4532. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4533. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4534. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_1:
  4535. {
  4536. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4537. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4538. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4539. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4540. }
  4541. break;
  4542. }
  4543. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4544. &tx_ch_cdc_dma, 0, 0);
  4545. if (ret < 0) {
  4546. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4547. __func__, ret);
  4548. goto err;
  4549. }
  4550. }
  4551. err:
  4552. return ret;
  4553. }
  4554. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4555. struct snd_pcm_hw_params *params)
  4556. {
  4557. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4558. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4559. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4560. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4561. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4562. unsigned int num_tx_ch = 0;
  4563. unsigned int num_rx_ch = 0;
  4564. int ret = 0;
  4565. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4566. num_rx_ch = params_channels(params);
  4567. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4568. codec_dai->name, codec_dai->id, num_rx_ch);
  4569. ret = snd_soc_dai_get_channel_map(codec_dai,
  4570. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4571. if (ret < 0) {
  4572. pr_err("%s: failed to get codec chan map, err:%d\n",
  4573. __func__, ret);
  4574. goto err;
  4575. }
  4576. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4577. num_rx_ch, rx_ch);
  4578. if (ret < 0) {
  4579. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4580. __func__, ret);
  4581. goto err;
  4582. }
  4583. } else {
  4584. num_tx_ch = params_channels(params);
  4585. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4586. codec_dai->name, codec_dai->id, num_tx_ch);
  4587. ret = snd_soc_dai_get_channel_map(codec_dai,
  4588. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4589. if (ret < 0) {
  4590. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4591. __func__, ret);
  4592. goto err;
  4593. }
  4594. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4595. num_tx_ch, tx_ch, 0, 0);
  4596. if (ret < 0) {
  4597. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4598. __func__, ret);
  4599. goto err;
  4600. }
  4601. }
  4602. err:
  4603. return ret;
  4604. }
  4605. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4606. struct snd_pcm_hw_params *params)
  4607. {
  4608. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4609. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4610. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4611. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4612. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4613. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4614. int ret;
  4615. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4616. codec_dai->name, codec_dai->id);
  4617. ret = snd_soc_dai_get_channel_map(codec_dai,
  4618. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4619. if (ret) {
  4620. dev_err(rtd->dev,
  4621. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4622. __func__, ret);
  4623. goto err;
  4624. }
  4625. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4626. __func__, tx_ch_cnt, dai_link->id);
  4627. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4628. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4629. if (ret)
  4630. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4631. __func__, ret);
  4632. err:
  4633. return ret;
  4634. }
  4635. static int msm_get_port_id(int be_id)
  4636. {
  4637. int afe_port_id;
  4638. switch (be_id) {
  4639. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4640. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4641. break;
  4642. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4643. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4644. break;
  4645. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4646. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4647. break;
  4648. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4649. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4650. break;
  4651. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4652. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4653. break;
  4654. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4655. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4656. break;
  4657. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4658. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4659. break;
  4660. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4661. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4662. break;
  4663. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4664. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4665. break;
  4666. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4667. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4668. break;
  4669. default:
  4670. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4671. afe_port_id = -EINVAL;
  4672. }
  4673. return afe_port_id;
  4674. }
  4675. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4676. {
  4677. u32 bit_per_sample;
  4678. switch (bit_format) {
  4679. case SNDRV_PCM_FORMAT_S32_LE:
  4680. case SNDRV_PCM_FORMAT_S24_3LE:
  4681. case SNDRV_PCM_FORMAT_S24_LE:
  4682. bit_per_sample = 32;
  4683. break;
  4684. case SNDRV_PCM_FORMAT_S16_LE:
  4685. default:
  4686. bit_per_sample = 16;
  4687. break;
  4688. }
  4689. return bit_per_sample;
  4690. }
  4691. static void update_mi2s_clk_val(int dai_id, int stream)
  4692. {
  4693. u32 bit_per_sample;
  4694. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4695. bit_per_sample =
  4696. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4697. mi2s_clk[dai_id].clk_freq_in_hz =
  4698. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4699. } else {
  4700. bit_per_sample =
  4701. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4702. mi2s_clk[dai_id].clk_freq_in_hz =
  4703. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4704. }
  4705. }
  4706. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4707. {
  4708. int ret = 0;
  4709. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4710. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4711. int port_id = 0;
  4712. int index = cpu_dai->id;
  4713. port_id = msm_get_port_id(rtd->dai_link->id);
  4714. if (port_id < 0) {
  4715. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4716. ret = port_id;
  4717. goto err;
  4718. }
  4719. if (enable) {
  4720. update_mi2s_clk_val(index, substream->stream);
  4721. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4722. mi2s_clk[index].clk_freq_in_hz);
  4723. }
  4724. mi2s_clk[index].enable = enable;
  4725. ret = afe_set_lpass_clock_v2(port_id,
  4726. &mi2s_clk[index]);
  4727. if (ret < 0) {
  4728. dev_err(rtd->card->dev,
  4729. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4730. __func__, port_id, ret);
  4731. goto err;
  4732. }
  4733. err:
  4734. return ret;
  4735. }
  4736. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4737. enum pinctrl_pin_state new_state)
  4738. {
  4739. int ret = 0;
  4740. int curr_state = 0;
  4741. if (pinctrl_info == NULL) {
  4742. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4743. ret = -EINVAL;
  4744. goto err;
  4745. }
  4746. if (pinctrl_info->pinctrl == NULL) {
  4747. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4748. ret = -EINVAL;
  4749. goto err;
  4750. }
  4751. curr_state = pinctrl_info->curr_state;
  4752. pinctrl_info->curr_state = new_state;
  4753. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4754. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4755. if (curr_state == pinctrl_info->curr_state) {
  4756. pr_debug("%s: Already in same state\n", __func__);
  4757. goto err;
  4758. }
  4759. if (curr_state != STATE_DISABLE &&
  4760. pinctrl_info->curr_state != STATE_DISABLE) {
  4761. pr_debug("%s: state already active cannot switch\n", __func__);
  4762. ret = -EIO;
  4763. goto err;
  4764. }
  4765. switch (pinctrl_info->curr_state) {
  4766. case STATE_MI2S_ACTIVE:
  4767. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4768. pinctrl_info->mi2s_active);
  4769. if (ret) {
  4770. pr_err("%s: MI2S state select failed with %d\n",
  4771. __func__, ret);
  4772. ret = -EIO;
  4773. goto err;
  4774. }
  4775. break;
  4776. case STATE_TDM_ACTIVE:
  4777. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4778. pinctrl_info->tdm_active);
  4779. if (ret) {
  4780. pr_err("%s: TDM state select failed with %d\n",
  4781. __func__, ret);
  4782. ret = -EIO;
  4783. goto err;
  4784. }
  4785. break;
  4786. case STATE_DISABLE:
  4787. if (curr_state == STATE_MI2S_ACTIVE) {
  4788. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4789. pinctrl_info->mi2s_disable);
  4790. } else {
  4791. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4792. pinctrl_info->tdm_disable);
  4793. }
  4794. if (ret) {
  4795. pr_err("%s: state disable failed with %d\n",
  4796. __func__, ret);
  4797. ret = -EIO;
  4798. goto err;
  4799. }
  4800. break;
  4801. default:
  4802. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4803. return -EINVAL;
  4804. }
  4805. err:
  4806. return ret;
  4807. }
  4808. static int msm_get_pinctrl(struct platform_device *pdev)
  4809. {
  4810. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4811. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4812. struct msm_pinctrl_info *pinctrl_info = NULL;
  4813. struct pinctrl *pinctrl;
  4814. int ret = 0;
  4815. pinctrl_info = &pdata->pinctrl_info;
  4816. if (pinctrl_info == NULL) {
  4817. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4818. return -EINVAL;
  4819. }
  4820. pinctrl = devm_pinctrl_get(&pdev->dev);
  4821. if (IS_ERR_OR_NULL(pinctrl)) {
  4822. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4823. return -EINVAL;
  4824. }
  4825. pinctrl_info->pinctrl = pinctrl;
  4826. /* get all the states handles from Device Tree */
  4827. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4828. "quat-mi2s-sleep");
  4829. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4830. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4831. goto err;
  4832. }
  4833. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4834. "quat-mi2s-active");
  4835. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4836. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4837. goto err;
  4838. }
  4839. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4840. "quat-tdm-sleep");
  4841. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4842. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4843. goto err;
  4844. }
  4845. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4846. "quat-tdm-active");
  4847. if (IS_ERR(pinctrl_info->tdm_active)) {
  4848. pr_err("%s: could not get tdm_active pinstate\n",
  4849. __func__);
  4850. goto err;
  4851. }
  4852. /* Reset the TLMM pins to a default state */
  4853. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4854. pinctrl_info->mi2s_disable);
  4855. if (ret != 0) {
  4856. pr_err("%s: Disable TLMM pins failed with %d\n",
  4857. __func__, ret);
  4858. ret = -EIO;
  4859. goto err;
  4860. }
  4861. pinctrl_info->curr_state = STATE_DISABLE;
  4862. return 0;
  4863. err:
  4864. devm_pinctrl_put(pinctrl);
  4865. pinctrl_info->pinctrl = NULL;
  4866. return -EINVAL;
  4867. }
  4868. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4869. struct snd_pcm_hw_params *params)
  4870. {
  4871. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4872. struct snd_interval *rate = hw_param_interval(params,
  4873. SNDRV_PCM_HW_PARAM_RATE);
  4874. struct snd_interval *channels = hw_param_interval(params,
  4875. SNDRV_PCM_HW_PARAM_CHANNELS);
  4876. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4877. channels->min = channels->max =
  4878. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4879. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4880. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4881. rate->min = rate->max =
  4882. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4883. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4884. channels->min = channels->max =
  4885. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4886. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4887. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4888. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4889. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4890. channels->min = channels->max =
  4891. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4892. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4893. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4894. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4895. } else {
  4896. pr_err("%s: dai id 0x%x not supported\n",
  4897. __func__, cpu_dai->id);
  4898. return -EINVAL;
  4899. }
  4900. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4901. __func__, cpu_dai->id, channels->max, rate->max,
  4902. params_format(params));
  4903. return 0;
  4904. }
  4905. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4906. struct snd_pcm_hw_params *params)
  4907. {
  4908. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4909. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4910. int ret = 0;
  4911. int slot_width = 32;
  4912. int channels, slots;
  4913. unsigned int slot_mask, rate, clk_freq;
  4914. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4915. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4916. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4917. switch (cpu_dai->id) {
  4918. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4919. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4920. break;
  4921. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4922. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4923. break;
  4924. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4925. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4926. break;
  4927. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4928. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4929. break;
  4930. case AFE_PORT_ID_QUINARY_TDM_RX:
  4931. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4932. break;
  4933. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4934. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4935. break;
  4936. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4937. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4938. break;
  4939. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4940. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4941. break;
  4942. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4943. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4944. break;
  4945. case AFE_PORT_ID_QUINARY_TDM_TX:
  4946. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4947. break;
  4948. default:
  4949. pr_err("%s: dai id 0x%x not supported\n",
  4950. __func__, cpu_dai->id);
  4951. return -EINVAL;
  4952. }
  4953. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4954. /*2 slot config - bits 0 and 1 set for the first two slots */
  4955. slot_mask = 0x0000FFFF >> (16-slots);
  4956. channels = slots;
  4957. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4958. __func__, slot_width, slots);
  4959. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4960. slots, slot_width);
  4961. if (ret < 0) {
  4962. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4963. __func__, ret);
  4964. goto end;
  4965. }
  4966. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4967. 0, NULL, channels, slot_offset);
  4968. if (ret < 0) {
  4969. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4970. __func__, ret);
  4971. goto end;
  4972. }
  4973. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4974. /*2 slot config - bits 0 and 1 set for the first two slots */
  4975. slot_mask = 0x0000FFFF >> (16-slots);
  4976. channels = slots;
  4977. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4978. __func__, slot_width, slots);
  4979. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4980. slots, slot_width);
  4981. if (ret < 0) {
  4982. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4983. __func__, ret);
  4984. goto end;
  4985. }
  4986. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4987. channels, slot_offset, 0, NULL);
  4988. if (ret < 0) {
  4989. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4990. __func__, ret);
  4991. goto end;
  4992. }
  4993. } else {
  4994. ret = -EINVAL;
  4995. pr_err("%s: invalid use case, err:%d\n",
  4996. __func__, ret);
  4997. goto end;
  4998. }
  4999. rate = params_rate(params);
  5000. clk_freq = rate * slot_width * slots;
  5001. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5002. if (ret < 0)
  5003. pr_err("%s: failed to set tdm clk, err:%d\n",
  5004. __func__, ret);
  5005. end:
  5006. return ret;
  5007. }
  5008. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5009. {
  5010. int ret = 0;
  5011. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5012. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5013. struct snd_soc_card *card = rtd->card;
  5014. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5015. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5016. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5017. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5018. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5019. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5020. if (ret)
  5021. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5022. __func__, ret);
  5023. }
  5024. return ret;
  5025. }
  5026. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5027. {
  5028. int ret = 0;
  5029. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5030. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5031. struct snd_soc_card *card = rtd->card;
  5032. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5033. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5034. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5035. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5036. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5037. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5038. if (ret)
  5039. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5040. __func__, ret);
  5041. }
  5042. }
  5043. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5044. .hw_params = sm6150_tdm_snd_hw_params,
  5045. .startup = sm6150_tdm_snd_startup,
  5046. .shutdown = sm6150_tdm_snd_shutdown
  5047. };
  5048. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5049. {
  5050. cpumask_t mask;
  5051. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5052. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5053. cpumask_clear(&mask);
  5054. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5055. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5056. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5057. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5058. pm_qos_add_request(&substream->latency_pm_qos_req,
  5059. PM_QOS_CPU_DMA_LATENCY,
  5060. MSM_LL_QOS_VALUE);
  5061. return 0;
  5062. }
  5063. static struct snd_soc_ops msm_fe_qos_ops = {
  5064. .prepare = msm_fe_qos_prepare,
  5065. };
  5066. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5067. {
  5068. int ret = 0;
  5069. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5070. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5071. int index = cpu_dai->id;
  5072. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5073. struct snd_soc_card *card = rtd->card;
  5074. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5075. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5076. int ret_pinctrl = 0;
  5077. dev_dbg(rtd->card->dev,
  5078. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5079. __func__, substream->name, substream->stream,
  5080. cpu_dai->name, cpu_dai->id);
  5081. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5082. ret = -EINVAL;
  5083. dev_err(rtd->card->dev,
  5084. "%s: CPU DAI id (%d) out of range\n",
  5085. __func__, cpu_dai->id);
  5086. goto err;
  5087. }
  5088. /*
  5089. * Mutex protection in case the same MI2S
  5090. * interface using for both TX and RX so
  5091. * that the same clock won't be enable twice.
  5092. */
  5093. mutex_lock(&mi2s_intf_conf[index].lock);
  5094. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5095. /* Check if msm needs to provide the clock to the interface */
  5096. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5097. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5098. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5099. }
  5100. ret = msm_mi2s_set_sclk(substream, true);
  5101. if (ret < 0) {
  5102. dev_err(rtd->card->dev,
  5103. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5104. __func__, ret);
  5105. goto clean_up;
  5106. }
  5107. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5108. if (ret < 0) {
  5109. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5110. __func__, index, ret);
  5111. goto clk_off;
  5112. }
  5113. if (index == QUAT_MI2S) {
  5114. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5115. STATE_MI2S_ACTIVE);
  5116. if (ret_pinctrl)
  5117. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5118. __func__, ret_pinctrl);
  5119. }
  5120. }
  5121. clk_off:
  5122. if (ret < 0)
  5123. msm_mi2s_set_sclk(substream, false);
  5124. clean_up:
  5125. if (ret < 0)
  5126. mi2s_intf_conf[index].ref_cnt--;
  5127. mutex_unlock(&mi2s_intf_conf[index].lock);
  5128. err:
  5129. return ret;
  5130. }
  5131. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5132. {
  5133. int ret;
  5134. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5135. int index = rtd->cpu_dai->id;
  5136. struct snd_soc_card *card = rtd->card;
  5137. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5138. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5139. int ret_pinctrl = 0;
  5140. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5141. substream->name, substream->stream);
  5142. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5143. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5144. return;
  5145. }
  5146. mutex_lock(&mi2s_intf_conf[index].lock);
  5147. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5148. ret = msm_mi2s_set_sclk(substream, false);
  5149. if (ret < 0)
  5150. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5151. __func__, index, ret);
  5152. if (index == QUAT_MI2S) {
  5153. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5154. STATE_DISABLE);
  5155. if (ret_pinctrl)
  5156. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5157. __func__, ret_pinctrl);
  5158. }
  5159. }
  5160. mutex_unlock(&mi2s_intf_conf[index].lock);
  5161. }
  5162. static struct snd_soc_ops msm_mi2s_be_ops = {
  5163. .startup = msm_mi2s_snd_startup,
  5164. .shutdown = msm_mi2s_snd_shutdown,
  5165. };
  5166. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5167. .hw_params = msm_snd_cdc_dma_hw_params,
  5168. };
  5169. static struct snd_soc_ops msm_be_ops = {
  5170. .hw_params = msm_snd_hw_params,
  5171. };
  5172. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5173. .hw_params = msm_slimbus_2_hw_params,
  5174. };
  5175. static struct snd_soc_ops msm_wcn_ops = {
  5176. .hw_params = msm_wcn_hw_params,
  5177. };
  5178. /* Digital audio interface glue - connects codec <---> CPU */
  5179. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5180. /* FrontEnd DAI Links */
  5181. {
  5182. .name = MSM_DAILINK_NAME(Media1),
  5183. .stream_name = "MultiMedia1",
  5184. .cpu_dai_name = "MultiMedia1",
  5185. .platform_name = "msm-pcm-dsp.0",
  5186. .dynamic = 1,
  5187. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5188. .dpcm_playback = 1,
  5189. .dpcm_capture = 1,
  5190. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5191. SND_SOC_DPCM_TRIGGER_POST},
  5192. .codec_dai_name = "snd-soc-dummy-dai",
  5193. .codec_name = "snd-soc-dummy",
  5194. .ignore_suspend = 1,
  5195. /* this dainlink has playback support */
  5196. .ignore_pmdown_time = 1,
  5197. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5198. },
  5199. {
  5200. .name = MSM_DAILINK_NAME(Media2),
  5201. .stream_name = "MultiMedia2",
  5202. .cpu_dai_name = "MultiMedia2",
  5203. .platform_name = "msm-pcm-dsp.0",
  5204. .dynamic = 1,
  5205. .dpcm_playback = 1,
  5206. .dpcm_capture = 1,
  5207. .codec_dai_name = "snd-soc-dummy-dai",
  5208. .codec_name = "snd-soc-dummy",
  5209. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5210. SND_SOC_DPCM_TRIGGER_POST},
  5211. .ignore_suspend = 1,
  5212. /* this dainlink has playback support */
  5213. .ignore_pmdown_time = 1,
  5214. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5215. },
  5216. {
  5217. .name = "VoiceMMode1",
  5218. .stream_name = "VoiceMMode1",
  5219. .cpu_dai_name = "VoiceMMode1",
  5220. .platform_name = "msm-pcm-voice",
  5221. .dynamic = 1,
  5222. .dpcm_playback = 1,
  5223. .dpcm_capture = 1,
  5224. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5225. SND_SOC_DPCM_TRIGGER_POST},
  5226. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5227. .ignore_suspend = 1,
  5228. .ignore_pmdown_time = 1,
  5229. .codec_dai_name = "snd-soc-dummy-dai",
  5230. .codec_name = "snd-soc-dummy",
  5231. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5232. },
  5233. {
  5234. .name = "MSM VoIP",
  5235. .stream_name = "VoIP",
  5236. .cpu_dai_name = "VoIP",
  5237. .platform_name = "msm-voip-dsp",
  5238. .dynamic = 1,
  5239. .dpcm_playback = 1,
  5240. .dpcm_capture = 1,
  5241. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5242. SND_SOC_DPCM_TRIGGER_POST},
  5243. .codec_dai_name = "snd-soc-dummy-dai",
  5244. .codec_name = "snd-soc-dummy",
  5245. .ignore_suspend = 1,
  5246. /* this dainlink has playback support */
  5247. .ignore_pmdown_time = 1,
  5248. .id = MSM_FRONTEND_DAI_VOIP,
  5249. },
  5250. {
  5251. .name = MSM_DAILINK_NAME(ULL),
  5252. .stream_name = "MultiMedia3",
  5253. .cpu_dai_name = "MultiMedia3",
  5254. .platform_name = "msm-pcm-dsp.2",
  5255. .dynamic = 1,
  5256. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5257. .dpcm_playback = 1,
  5258. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5259. SND_SOC_DPCM_TRIGGER_POST},
  5260. .codec_dai_name = "snd-soc-dummy-dai",
  5261. .codec_name = "snd-soc-dummy",
  5262. .ignore_suspend = 1,
  5263. /* this dainlink has playback support */
  5264. .ignore_pmdown_time = 1,
  5265. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5266. },
  5267. /* Hostless PCM purpose */
  5268. {
  5269. .name = "SLIMBUS_0 Hostless",
  5270. .stream_name = "SLIMBUS_0 Hostless",
  5271. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5272. .platform_name = "msm-pcm-hostless",
  5273. .dynamic = 1,
  5274. .dpcm_playback = 1,
  5275. .dpcm_capture = 1,
  5276. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5277. SND_SOC_DPCM_TRIGGER_POST},
  5278. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5279. .ignore_suspend = 1,
  5280. /* this dailink has playback support */
  5281. .ignore_pmdown_time = 1,
  5282. .codec_dai_name = "snd-soc-dummy-dai",
  5283. .codec_name = "snd-soc-dummy",
  5284. },
  5285. {
  5286. .name = "MSM AFE-PCM RX",
  5287. .stream_name = "AFE-PROXY RX",
  5288. .cpu_dai_name = "msm-dai-q6-dev.241",
  5289. .codec_name = "msm-stub-codec.1",
  5290. .codec_dai_name = "msm-stub-rx",
  5291. .platform_name = "msm-pcm-afe",
  5292. .dpcm_playback = 1,
  5293. .ignore_suspend = 1,
  5294. /* this dainlink has playback support */
  5295. .ignore_pmdown_time = 1,
  5296. },
  5297. {
  5298. .name = "MSM AFE-PCM TX",
  5299. .stream_name = "AFE-PROXY TX",
  5300. .cpu_dai_name = "msm-dai-q6-dev.240",
  5301. .codec_name = "msm-stub-codec.1",
  5302. .codec_dai_name = "msm-stub-tx",
  5303. .platform_name = "msm-pcm-afe",
  5304. .dpcm_capture = 1,
  5305. .ignore_suspend = 1,
  5306. },
  5307. {
  5308. .name = MSM_DAILINK_NAME(Compress1),
  5309. .stream_name = "Compress1",
  5310. .cpu_dai_name = "MultiMedia4",
  5311. .platform_name = "msm-compress-dsp",
  5312. .dynamic = 1,
  5313. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5314. .dpcm_playback = 1,
  5315. .dpcm_capture = 1,
  5316. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5317. SND_SOC_DPCM_TRIGGER_POST},
  5318. .codec_dai_name = "snd-soc-dummy-dai",
  5319. .codec_name = "snd-soc-dummy",
  5320. .ignore_suspend = 1,
  5321. .ignore_pmdown_time = 1,
  5322. /* this dainlink has playback support */
  5323. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5324. },
  5325. {
  5326. .name = "AUXPCM Hostless",
  5327. .stream_name = "AUXPCM Hostless",
  5328. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5329. .platform_name = "msm-pcm-hostless",
  5330. .dynamic = 1,
  5331. .dpcm_playback = 1,
  5332. .dpcm_capture = 1,
  5333. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5334. SND_SOC_DPCM_TRIGGER_POST},
  5335. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5336. .ignore_suspend = 1,
  5337. /* this dainlink has playback support */
  5338. .ignore_pmdown_time = 1,
  5339. .codec_dai_name = "snd-soc-dummy-dai",
  5340. .codec_name = "snd-soc-dummy",
  5341. },
  5342. {
  5343. .name = "SLIMBUS_1 Hostless",
  5344. .stream_name = "SLIMBUS_1 Hostless",
  5345. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5346. .platform_name = "msm-pcm-hostless",
  5347. .dynamic = 1,
  5348. .dpcm_playback = 1,
  5349. .dpcm_capture = 1,
  5350. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5351. SND_SOC_DPCM_TRIGGER_POST},
  5352. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5353. .ignore_suspend = 1,
  5354. /* this dailink has playback support */
  5355. .ignore_pmdown_time = 1,
  5356. .codec_dai_name = "snd-soc-dummy-dai",
  5357. .codec_name = "snd-soc-dummy",
  5358. },
  5359. {
  5360. .name = "SLIMBUS_3 Hostless",
  5361. .stream_name = "SLIMBUS_3 Hostless",
  5362. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5363. .platform_name = "msm-pcm-hostless",
  5364. .dynamic = 1,
  5365. .dpcm_playback = 1,
  5366. .dpcm_capture = 1,
  5367. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5368. SND_SOC_DPCM_TRIGGER_POST},
  5369. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5370. .ignore_suspend = 1,
  5371. /* this dailink has playback support */
  5372. .ignore_pmdown_time = 1,
  5373. .codec_dai_name = "snd-soc-dummy-dai",
  5374. .codec_name = "snd-soc-dummy",
  5375. },
  5376. {
  5377. .name = "SLIMBUS_4 Hostless",
  5378. .stream_name = "SLIMBUS_4 Hostless",
  5379. .cpu_dai_name = "SLIMBUS4_HOSTLESS",
  5380. .platform_name = "msm-pcm-hostless",
  5381. .dynamic = 1,
  5382. .dpcm_playback = 1,
  5383. .dpcm_capture = 1,
  5384. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5385. SND_SOC_DPCM_TRIGGER_POST},
  5386. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5387. .ignore_suspend = 1,
  5388. /* this dailink has playback support */
  5389. .ignore_pmdown_time = 1,
  5390. .codec_dai_name = "snd-soc-dummy-dai",
  5391. .codec_name = "snd-soc-dummy",
  5392. },
  5393. {
  5394. .name = MSM_DAILINK_NAME(LowLatency),
  5395. .stream_name = "MultiMedia5",
  5396. .cpu_dai_name = "MultiMedia5",
  5397. .platform_name = "msm-pcm-dsp.1",
  5398. .dynamic = 1,
  5399. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5400. .dpcm_playback = 1,
  5401. .dpcm_capture = 1,
  5402. .codec_dai_name = "snd-soc-dummy-dai",
  5403. .codec_name = "snd-soc-dummy",
  5404. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5405. SND_SOC_DPCM_TRIGGER_POST},
  5406. .ignore_suspend = 1,
  5407. /* this dainlink has playback support */
  5408. .ignore_pmdown_time = 1,
  5409. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5410. .ops = &msm_fe_qos_ops,
  5411. },
  5412. {
  5413. .name = "Listen 1 Audio Service",
  5414. .stream_name = "Listen 1 Audio Service",
  5415. .cpu_dai_name = "LSM1",
  5416. .platform_name = "msm-lsm-client",
  5417. .dynamic = 1,
  5418. .dpcm_capture = 1,
  5419. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5420. SND_SOC_DPCM_TRIGGER_POST },
  5421. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5422. .ignore_suspend = 1,
  5423. .codec_dai_name = "snd-soc-dummy-dai",
  5424. .codec_name = "snd-soc-dummy",
  5425. .id = MSM_FRONTEND_DAI_LSM1,
  5426. },
  5427. /* Multiple Tunnel instances */
  5428. {
  5429. .name = MSM_DAILINK_NAME(Compress2),
  5430. .stream_name = "Compress2",
  5431. .cpu_dai_name = "MultiMedia7",
  5432. .platform_name = "msm-compress-dsp",
  5433. .dynamic = 1,
  5434. .dpcm_playback = 1,
  5435. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5436. SND_SOC_DPCM_TRIGGER_POST},
  5437. .codec_dai_name = "snd-soc-dummy-dai",
  5438. .codec_name = "snd-soc-dummy",
  5439. .ignore_suspend = 1,
  5440. .ignore_pmdown_time = 1,
  5441. /* this dainlink has playback support */
  5442. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5443. },
  5444. {
  5445. .name = MSM_DAILINK_NAME(MultiMedia10),
  5446. .stream_name = "MultiMedia10",
  5447. .cpu_dai_name = "MultiMedia10",
  5448. .platform_name = "msm-pcm-dsp.1",
  5449. .dynamic = 1,
  5450. .dpcm_playback = 1,
  5451. .dpcm_capture = 1,
  5452. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5453. SND_SOC_DPCM_TRIGGER_POST},
  5454. .codec_dai_name = "snd-soc-dummy-dai",
  5455. .codec_name = "snd-soc-dummy",
  5456. .ignore_suspend = 1,
  5457. .ignore_pmdown_time = 1,
  5458. /* this dainlink has playback support */
  5459. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5460. },
  5461. {
  5462. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5463. .stream_name = "MM_NOIRQ",
  5464. .cpu_dai_name = "MultiMedia8",
  5465. .platform_name = "msm-pcm-dsp-noirq",
  5466. .dynamic = 1,
  5467. .dpcm_playback = 1,
  5468. .dpcm_capture = 1,
  5469. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5470. SND_SOC_DPCM_TRIGGER_POST},
  5471. .codec_dai_name = "snd-soc-dummy-dai",
  5472. .codec_name = "snd-soc-dummy",
  5473. .ignore_suspend = 1,
  5474. .ignore_pmdown_time = 1,
  5475. /* this dainlink has playback support */
  5476. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5477. .ops = &msm_fe_qos_ops,
  5478. },
  5479. /* HDMI Hostless */
  5480. {
  5481. .name = "HDMI_RX_HOSTLESS",
  5482. .stream_name = "HDMI_RX_HOSTLESS",
  5483. .cpu_dai_name = "HDMI_HOSTLESS",
  5484. .platform_name = "msm-pcm-hostless",
  5485. .dynamic = 1,
  5486. .dpcm_playback = 1,
  5487. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5488. SND_SOC_DPCM_TRIGGER_POST},
  5489. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5490. .ignore_suspend = 1,
  5491. .ignore_pmdown_time = 1,
  5492. .codec_dai_name = "snd-soc-dummy-dai",
  5493. .codec_name = "snd-soc-dummy",
  5494. },
  5495. {
  5496. .name = "VoiceMMode2",
  5497. .stream_name = "VoiceMMode2",
  5498. .cpu_dai_name = "VoiceMMode2",
  5499. .platform_name = "msm-pcm-voice",
  5500. .dynamic = 1,
  5501. .dpcm_playback = 1,
  5502. .dpcm_capture = 1,
  5503. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5504. SND_SOC_DPCM_TRIGGER_POST},
  5505. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5506. .ignore_suspend = 1,
  5507. .ignore_pmdown_time = 1,
  5508. .codec_dai_name = "snd-soc-dummy-dai",
  5509. .codec_name = "snd-soc-dummy",
  5510. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5511. },
  5512. /* LSM FE */
  5513. {
  5514. .name = "Listen 2 Audio Service",
  5515. .stream_name = "Listen 2 Audio Service",
  5516. .cpu_dai_name = "LSM2",
  5517. .platform_name = "msm-lsm-client",
  5518. .dynamic = 1,
  5519. .dpcm_capture = 1,
  5520. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5521. SND_SOC_DPCM_TRIGGER_POST },
  5522. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5523. .ignore_suspend = 1,
  5524. .codec_dai_name = "snd-soc-dummy-dai",
  5525. .codec_name = "snd-soc-dummy",
  5526. .id = MSM_FRONTEND_DAI_LSM2,
  5527. },
  5528. {
  5529. .name = "Listen 3 Audio Service",
  5530. .stream_name = "Listen 3 Audio Service",
  5531. .cpu_dai_name = "LSM3",
  5532. .platform_name = "msm-lsm-client",
  5533. .dynamic = 1,
  5534. .dpcm_capture = 1,
  5535. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5536. SND_SOC_DPCM_TRIGGER_POST },
  5537. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5538. .ignore_suspend = 1,
  5539. .codec_dai_name = "snd-soc-dummy-dai",
  5540. .codec_name = "snd-soc-dummy",
  5541. .id = MSM_FRONTEND_DAI_LSM3,
  5542. },
  5543. {
  5544. .name = "Listen 4 Audio Service",
  5545. .stream_name = "Listen 4 Audio Service",
  5546. .cpu_dai_name = "LSM4",
  5547. .platform_name = "msm-lsm-client",
  5548. .dynamic = 1,
  5549. .dpcm_capture = 1,
  5550. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5551. SND_SOC_DPCM_TRIGGER_POST },
  5552. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5553. .ignore_suspend = 1,
  5554. .codec_dai_name = "snd-soc-dummy-dai",
  5555. .codec_name = "snd-soc-dummy",
  5556. .id = MSM_FRONTEND_DAI_LSM4,
  5557. },
  5558. {
  5559. .name = "Listen 5 Audio Service",
  5560. .stream_name = "Listen 5 Audio Service",
  5561. .cpu_dai_name = "LSM5",
  5562. .platform_name = "msm-lsm-client",
  5563. .dynamic = 1,
  5564. .dpcm_capture = 1,
  5565. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5566. SND_SOC_DPCM_TRIGGER_POST },
  5567. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5568. .ignore_suspend = 1,
  5569. .codec_dai_name = "snd-soc-dummy-dai",
  5570. .codec_name = "snd-soc-dummy",
  5571. .id = MSM_FRONTEND_DAI_LSM5,
  5572. },
  5573. {
  5574. .name = "Listen 6 Audio Service",
  5575. .stream_name = "Listen 6 Audio Service",
  5576. .cpu_dai_name = "LSM6",
  5577. .platform_name = "msm-lsm-client",
  5578. .dynamic = 1,
  5579. .dpcm_capture = 1,
  5580. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5581. SND_SOC_DPCM_TRIGGER_POST },
  5582. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5583. .ignore_suspend = 1,
  5584. .codec_dai_name = "snd-soc-dummy-dai",
  5585. .codec_name = "snd-soc-dummy",
  5586. .id = MSM_FRONTEND_DAI_LSM6,
  5587. },
  5588. {
  5589. .name = "Listen 7 Audio Service",
  5590. .stream_name = "Listen 7 Audio Service",
  5591. .cpu_dai_name = "LSM7",
  5592. .platform_name = "msm-lsm-client",
  5593. .dynamic = 1,
  5594. .dpcm_capture = 1,
  5595. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5596. SND_SOC_DPCM_TRIGGER_POST },
  5597. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5598. .ignore_suspend = 1,
  5599. .codec_dai_name = "snd-soc-dummy-dai",
  5600. .codec_name = "snd-soc-dummy",
  5601. .id = MSM_FRONTEND_DAI_LSM7,
  5602. },
  5603. {
  5604. .name = "Listen 8 Audio Service",
  5605. .stream_name = "Listen 8 Audio Service",
  5606. .cpu_dai_name = "LSM8",
  5607. .platform_name = "msm-lsm-client",
  5608. .dynamic = 1,
  5609. .dpcm_capture = 1,
  5610. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5611. SND_SOC_DPCM_TRIGGER_POST },
  5612. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5613. .ignore_suspend = 1,
  5614. .codec_dai_name = "snd-soc-dummy-dai",
  5615. .codec_name = "snd-soc-dummy",
  5616. .id = MSM_FRONTEND_DAI_LSM8,
  5617. },
  5618. {
  5619. .name = MSM_DAILINK_NAME(Media9),
  5620. .stream_name = "MultiMedia9",
  5621. .cpu_dai_name = "MultiMedia9",
  5622. .platform_name = "msm-pcm-dsp.0",
  5623. .dynamic = 1,
  5624. .dpcm_playback = 1,
  5625. .dpcm_capture = 1,
  5626. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5627. SND_SOC_DPCM_TRIGGER_POST},
  5628. .codec_dai_name = "snd-soc-dummy-dai",
  5629. .codec_name = "snd-soc-dummy",
  5630. .ignore_suspend = 1,
  5631. /* this dainlink has playback support */
  5632. .ignore_pmdown_time = 1,
  5633. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5634. },
  5635. {
  5636. .name = MSM_DAILINK_NAME(Compress4),
  5637. .stream_name = "Compress4",
  5638. .cpu_dai_name = "MultiMedia11",
  5639. .platform_name = "msm-compress-dsp",
  5640. .dynamic = 1,
  5641. .dpcm_playback = 1,
  5642. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5643. SND_SOC_DPCM_TRIGGER_POST},
  5644. .codec_dai_name = "snd-soc-dummy-dai",
  5645. .codec_name = "snd-soc-dummy",
  5646. .ignore_suspend = 1,
  5647. .ignore_pmdown_time = 1,
  5648. /* this dainlink has playback support */
  5649. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5650. },
  5651. {
  5652. .name = MSM_DAILINK_NAME(Compress5),
  5653. .stream_name = "Compress5",
  5654. .cpu_dai_name = "MultiMedia12",
  5655. .platform_name = "msm-compress-dsp",
  5656. .dynamic = 1,
  5657. .dpcm_playback = 1,
  5658. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5659. SND_SOC_DPCM_TRIGGER_POST},
  5660. .codec_dai_name = "snd-soc-dummy-dai",
  5661. .codec_name = "snd-soc-dummy",
  5662. .ignore_suspend = 1,
  5663. .ignore_pmdown_time = 1,
  5664. /* this dainlink has playback support */
  5665. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5666. },
  5667. {
  5668. .name = MSM_DAILINK_NAME(Compress6),
  5669. .stream_name = "Compress6",
  5670. .cpu_dai_name = "MultiMedia13",
  5671. .platform_name = "msm-compress-dsp",
  5672. .dynamic = 1,
  5673. .dpcm_playback = 1,
  5674. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5675. SND_SOC_DPCM_TRIGGER_POST},
  5676. .codec_dai_name = "snd-soc-dummy-dai",
  5677. .codec_name = "snd-soc-dummy",
  5678. .ignore_suspend = 1,
  5679. .ignore_pmdown_time = 1,
  5680. /* this dainlink has playback support */
  5681. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5682. },
  5683. {
  5684. .name = MSM_DAILINK_NAME(Compress7),
  5685. .stream_name = "Compress7",
  5686. .cpu_dai_name = "MultiMedia14",
  5687. .platform_name = "msm-compress-dsp",
  5688. .dynamic = 1,
  5689. .dpcm_playback = 1,
  5690. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5691. SND_SOC_DPCM_TRIGGER_POST},
  5692. .codec_dai_name = "snd-soc-dummy-dai",
  5693. .codec_name = "snd-soc-dummy",
  5694. .ignore_suspend = 1,
  5695. .ignore_pmdown_time = 1,
  5696. /* this dainlink has playback support */
  5697. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5698. },
  5699. {
  5700. .name = MSM_DAILINK_NAME(Compress8),
  5701. .stream_name = "Compress8",
  5702. .cpu_dai_name = "MultiMedia15",
  5703. .platform_name = "msm-compress-dsp",
  5704. .dynamic = 1,
  5705. .dpcm_playback = 1,
  5706. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5707. SND_SOC_DPCM_TRIGGER_POST},
  5708. .codec_dai_name = "snd-soc-dummy-dai",
  5709. .codec_name = "snd-soc-dummy",
  5710. .ignore_suspend = 1,
  5711. .ignore_pmdown_time = 1,
  5712. /* this dainlink has playback support */
  5713. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5714. },
  5715. {
  5716. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5717. .stream_name = "MM_NOIRQ_2",
  5718. .cpu_dai_name = "MultiMedia16",
  5719. .platform_name = "msm-pcm-dsp-noirq",
  5720. .dynamic = 1,
  5721. .dpcm_playback = 1,
  5722. .dpcm_capture = 1,
  5723. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5724. SND_SOC_DPCM_TRIGGER_POST},
  5725. .codec_dai_name = "snd-soc-dummy-dai",
  5726. .codec_name = "snd-soc-dummy",
  5727. .ignore_suspend = 1,
  5728. .ignore_pmdown_time = 1,
  5729. /* this dainlink has playback support */
  5730. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5731. },
  5732. {
  5733. .name = "SLIMBUS_8 Hostless",
  5734. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5735. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5736. .platform_name = "msm-pcm-hostless",
  5737. .dynamic = 1,
  5738. .dpcm_capture = 1,
  5739. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5740. SND_SOC_DPCM_TRIGGER_POST},
  5741. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5742. .ignore_suspend = 1,
  5743. .codec_dai_name = "snd-soc-dummy-dai",
  5744. .codec_name = "snd-soc-dummy",
  5745. },
  5746. };
  5747. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5748. {
  5749. .name = LPASS_BE_SLIMBUS_4_TX,
  5750. .stream_name = "Slimbus4 Capture",
  5751. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5752. .platform_name = "msm-pcm-hostless",
  5753. .codec_name = "tavil_codec",
  5754. .codec_dai_name = "tavil_vifeedback",
  5755. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5756. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5757. .ops = &msm_be_ops,
  5758. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5759. .ignore_suspend = 1,
  5760. },
  5761. /* Ultrasound RX DAI Link */
  5762. {
  5763. .name = "SLIMBUS_2 Hostless Playback",
  5764. .stream_name = "SLIMBUS_2 Hostless Playback",
  5765. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5766. .platform_name = "msm-pcm-hostless",
  5767. .codec_name = "tavil_codec",
  5768. .codec_dai_name = "tavil_rx2",
  5769. .ignore_suspend = 1,
  5770. .ignore_pmdown_time = 1,
  5771. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5772. .ops = &msm_slimbus_2_be_ops,
  5773. },
  5774. /* Ultrasound TX DAI Link */
  5775. {
  5776. .name = "SLIMBUS_2 Hostless Capture",
  5777. .stream_name = "SLIMBUS_2 Hostless Capture",
  5778. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5779. .platform_name = "msm-pcm-hostless",
  5780. .codec_name = "tavil_codec",
  5781. .codec_dai_name = "tavil_tx2",
  5782. .ignore_suspend = 1,
  5783. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5784. .ops = &msm_slimbus_2_be_ops,
  5785. },
  5786. };
  5787. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5788. {
  5789. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5790. .stream_name = "WSA CDC DMA0 Capture",
  5791. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5792. .platform_name = "msm-pcm-hostless",
  5793. .codec_name = "bolero_codec",
  5794. .codec_dai_name = "wsa_macro_vifeedback",
  5795. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5796. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5797. .ignore_suspend = 1,
  5798. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5799. .ops = &msm_cdc_dma_be_ops,
  5800. },
  5801. };
  5802. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5803. {
  5804. .name = MSM_DAILINK_NAME(ASM Loopback),
  5805. .stream_name = "MultiMedia6",
  5806. .cpu_dai_name = "MultiMedia6",
  5807. .platform_name = "msm-pcm-loopback",
  5808. .dynamic = 1,
  5809. .dpcm_playback = 1,
  5810. .dpcm_capture = 1,
  5811. .codec_dai_name = "snd-soc-dummy-dai",
  5812. .codec_name = "snd-soc-dummy",
  5813. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5814. SND_SOC_DPCM_TRIGGER_POST},
  5815. .ignore_suspend = 1,
  5816. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5817. .ignore_pmdown_time = 1,
  5818. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5819. },
  5820. {
  5821. .name = "USB Audio Hostless",
  5822. .stream_name = "USB Audio Hostless",
  5823. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5824. .platform_name = "msm-pcm-hostless",
  5825. .dynamic = 1,
  5826. .dpcm_playback = 1,
  5827. .dpcm_capture = 1,
  5828. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5829. SND_SOC_DPCM_TRIGGER_POST},
  5830. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5831. .ignore_suspend = 1,
  5832. .ignore_pmdown_time = 1,
  5833. .codec_dai_name = "snd-soc-dummy-dai",
  5834. .codec_name = "snd-soc-dummy",
  5835. },
  5836. };
  5837. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5838. /* Backend AFE DAI Links */
  5839. {
  5840. .name = LPASS_BE_AFE_PCM_RX,
  5841. .stream_name = "AFE Playback",
  5842. .cpu_dai_name = "msm-dai-q6-dev.224",
  5843. .platform_name = "msm-pcm-routing",
  5844. .codec_name = "msm-stub-codec.1",
  5845. .codec_dai_name = "msm-stub-rx",
  5846. .no_pcm = 1,
  5847. .dpcm_playback = 1,
  5848. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5849. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5850. /* this dainlink has playback support */
  5851. .ignore_pmdown_time = 1,
  5852. .ignore_suspend = 1,
  5853. },
  5854. {
  5855. .name = LPASS_BE_AFE_PCM_TX,
  5856. .stream_name = "AFE Capture",
  5857. .cpu_dai_name = "msm-dai-q6-dev.225",
  5858. .platform_name = "msm-pcm-routing",
  5859. .codec_name = "msm-stub-codec.1",
  5860. .codec_dai_name = "msm-stub-tx",
  5861. .no_pcm = 1,
  5862. .dpcm_capture = 1,
  5863. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5864. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5865. .ignore_suspend = 1,
  5866. },
  5867. /* Incall Record Uplink BACK END DAI Link */
  5868. {
  5869. .name = LPASS_BE_INCALL_RECORD_TX,
  5870. .stream_name = "Voice Uplink Capture",
  5871. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5872. .platform_name = "msm-pcm-routing",
  5873. .codec_name = "msm-stub-codec.1",
  5874. .codec_dai_name = "msm-stub-tx",
  5875. .no_pcm = 1,
  5876. .dpcm_capture = 1,
  5877. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5878. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5879. .ignore_suspend = 1,
  5880. },
  5881. /* Incall Record Downlink BACK END DAI Link */
  5882. {
  5883. .name = LPASS_BE_INCALL_RECORD_RX,
  5884. .stream_name = "Voice Downlink Capture",
  5885. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5886. .platform_name = "msm-pcm-routing",
  5887. .codec_name = "msm-stub-codec.1",
  5888. .codec_dai_name = "msm-stub-tx",
  5889. .no_pcm = 1,
  5890. .dpcm_capture = 1,
  5891. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5892. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5893. .ignore_suspend = 1,
  5894. },
  5895. /* Incall Music BACK END DAI Link */
  5896. {
  5897. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5898. .stream_name = "Voice Farend Playback",
  5899. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5900. .platform_name = "msm-pcm-routing",
  5901. .codec_name = "msm-stub-codec.1",
  5902. .codec_dai_name = "msm-stub-rx",
  5903. .no_pcm = 1,
  5904. .dpcm_playback = 1,
  5905. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5906. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5907. .ignore_suspend = 1,
  5908. .ignore_pmdown_time = 1,
  5909. },
  5910. /* Incall Music 2 BACK END DAI Link */
  5911. {
  5912. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5913. .stream_name = "Voice2 Farend Playback",
  5914. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5915. .platform_name = "msm-pcm-routing",
  5916. .codec_name = "msm-stub-codec.1",
  5917. .codec_dai_name = "msm-stub-rx",
  5918. .no_pcm = 1,
  5919. .dpcm_playback = 1,
  5920. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5921. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5922. .ignore_suspend = 1,
  5923. .ignore_pmdown_time = 1,
  5924. },
  5925. {
  5926. .name = LPASS_BE_USB_AUDIO_RX,
  5927. .stream_name = "USB Audio Playback",
  5928. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5929. .platform_name = "msm-pcm-routing",
  5930. .codec_name = "msm-stub-codec.1",
  5931. .codec_dai_name = "msm-stub-rx",
  5932. .no_pcm = 1,
  5933. .dpcm_playback = 1,
  5934. .id = MSM_BACKEND_DAI_USB_RX,
  5935. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5936. .ignore_pmdown_time = 1,
  5937. .ignore_suspend = 1,
  5938. },
  5939. {
  5940. .name = LPASS_BE_USB_AUDIO_TX,
  5941. .stream_name = "USB Audio Capture",
  5942. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5943. .platform_name = "msm-pcm-routing",
  5944. .codec_name = "msm-stub-codec.1",
  5945. .codec_dai_name = "msm-stub-tx",
  5946. .no_pcm = 1,
  5947. .dpcm_capture = 1,
  5948. .id = MSM_BACKEND_DAI_USB_TX,
  5949. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5950. .ignore_suspend = 1,
  5951. },
  5952. {
  5953. .name = LPASS_BE_PRI_TDM_RX_0,
  5954. .stream_name = "Primary TDM0 Playback",
  5955. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5956. .platform_name = "msm-pcm-routing",
  5957. .codec_name = "msm-stub-codec.1",
  5958. .codec_dai_name = "msm-stub-rx",
  5959. .no_pcm = 1,
  5960. .dpcm_playback = 1,
  5961. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5962. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5963. .ops = &sm6150_tdm_be_ops,
  5964. .ignore_suspend = 1,
  5965. .ignore_pmdown_time = 1,
  5966. },
  5967. {
  5968. .name = LPASS_BE_PRI_TDM_TX_0,
  5969. .stream_name = "Primary TDM0 Capture",
  5970. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  5971. .platform_name = "msm-pcm-routing",
  5972. .codec_name = "msm-stub-codec.1",
  5973. .codec_dai_name = "msm-stub-tx",
  5974. .no_pcm = 1,
  5975. .dpcm_capture = 1,
  5976. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  5977. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5978. .ops = &sm6150_tdm_be_ops,
  5979. .ignore_suspend = 1,
  5980. },
  5981. {
  5982. .name = LPASS_BE_SEC_TDM_RX_0,
  5983. .stream_name = "Secondary TDM0 Playback",
  5984. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  5985. .platform_name = "msm-pcm-routing",
  5986. .codec_name = "msm-stub-codec.1",
  5987. .codec_dai_name = "msm-stub-rx",
  5988. .no_pcm = 1,
  5989. .dpcm_playback = 1,
  5990. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  5991. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5992. .ops = &sm6150_tdm_be_ops,
  5993. .ignore_suspend = 1,
  5994. .ignore_pmdown_time = 1,
  5995. },
  5996. {
  5997. .name = LPASS_BE_SEC_TDM_TX_0,
  5998. .stream_name = "Secondary TDM0 Capture",
  5999. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6000. .platform_name = "msm-pcm-routing",
  6001. .codec_name = "msm-stub-codec.1",
  6002. .codec_dai_name = "msm-stub-tx",
  6003. .no_pcm = 1,
  6004. .dpcm_capture = 1,
  6005. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6006. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6007. .ops = &sm6150_tdm_be_ops,
  6008. .ignore_suspend = 1,
  6009. },
  6010. {
  6011. .name = LPASS_BE_TERT_TDM_RX_0,
  6012. .stream_name = "Tertiary TDM0 Playback",
  6013. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6014. .platform_name = "msm-pcm-routing",
  6015. .codec_name = "msm-stub-codec.1",
  6016. .codec_dai_name = "msm-stub-rx",
  6017. .no_pcm = 1,
  6018. .dpcm_playback = 1,
  6019. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6020. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6021. .ops = &sm6150_tdm_be_ops,
  6022. .ignore_suspend = 1,
  6023. .ignore_pmdown_time = 1,
  6024. },
  6025. {
  6026. .name = LPASS_BE_TERT_TDM_TX_0,
  6027. .stream_name = "Tertiary TDM0 Capture",
  6028. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6029. .platform_name = "msm-pcm-routing",
  6030. .codec_name = "msm-stub-codec.1",
  6031. .codec_dai_name = "msm-stub-tx",
  6032. .no_pcm = 1,
  6033. .dpcm_capture = 1,
  6034. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6035. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6036. .ops = &sm6150_tdm_be_ops,
  6037. .ignore_suspend = 1,
  6038. },
  6039. {
  6040. .name = LPASS_BE_QUAT_TDM_RX_0,
  6041. .stream_name = "Quaternary TDM0 Playback",
  6042. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6043. .platform_name = "msm-pcm-routing",
  6044. .codec_name = "msm-stub-codec.1",
  6045. .codec_dai_name = "msm-stub-rx",
  6046. .no_pcm = 1,
  6047. .dpcm_playback = 1,
  6048. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6049. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6050. .ops = &sm6150_tdm_be_ops,
  6051. .ignore_suspend = 1,
  6052. .ignore_pmdown_time = 1,
  6053. },
  6054. {
  6055. .name = LPASS_BE_QUAT_TDM_TX_0,
  6056. .stream_name = "Quaternary TDM0 Capture",
  6057. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6058. .platform_name = "msm-pcm-routing",
  6059. .codec_name = "msm-stub-codec.1",
  6060. .codec_dai_name = "msm-stub-tx",
  6061. .no_pcm = 1,
  6062. .dpcm_capture = 1,
  6063. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6064. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6065. .ops = &sm6150_tdm_be_ops,
  6066. .ignore_suspend = 1,
  6067. },
  6068. };
  6069. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6070. {
  6071. .name = LPASS_BE_SLIMBUS_0_RX,
  6072. .stream_name = "Slimbus Playback",
  6073. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6074. .platform_name = "msm-pcm-routing",
  6075. .codec_name = "tavil_codec",
  6076. .codec_dai_name = "tavil_rx1",
  6077. .no_pcm = 1,
  6078. .dpcm_playback = 1,
  6079. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6080. .init = &msm_audrx_tavil_init,
  6081. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6082. /* this dainlink has playback support */
  6083. .ignore_pmdown_time = 1,
  6084. .ignore_suspend = 1,
  6085. .ops = &msm_be_ops,
  6086. },
  6087. {
  6088. .name = LPASS_BE_SLIMBUS_0_TX,
  6089. .stream_name = "Slimbus Capture",
  6090. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6091. .platform_name = "msm-pcm-routing",
  6092. .codec_name = "tavil_codec",
  6093. .codec_dai_name = "tavil_tx1",
  6094. .no_pcm = 1,
  6095. .dpcm_capture = 1,
  6096. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6097. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6098. .ignore_suspend = 1,
  6099. .ops = &msm_be_ops,
  6100. },
  6101. {
  6102. .name = LPASS_BE_SLIMBUS_1_RX,
  6103. .stream_name = "Slimbus1 Playback",
  6104. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6105. .platform_name = "msm-pcm-routing",
  6106. .codec_name = "tavil_codec",
  6107. .codec_dai_name = "tavil_rx1",
  6108. .no_pcm = 1,
  6109. .dpcm_playback = 1,
  6110. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6111. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6112. .ops = &msm_be_ops,
  6113. /* dai link has playback support */
  6114. .ignore_pmdown_time = 1,
  6115. .ignore_suspend = 1,
  6116. },
  6117. {
  6118. .name = LPASS_BE_SLIMBUS_1_TX,
  6119. .stream_name = "Slimbus1 Capture",
  6120. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6121. .platform_name = "msm-pcm-routing",
  6122. .codec_name = "tavil_codec",
  6123. .codec_dai_name = "tavil_tx3",
  6124. .no_pcm = 1,
  6125. .dpcm_capture = 1,
  6126. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6127. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6128. .ops = &msm_be_ops,
  6129. .ignore_suspend = 1,
  6130. },
  6131. {
  6132. .name = LPASS_BE_SLIMBUS_2_RX,
  6133. .stream_name = "Slimbus2 Playback",
  6134. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6135. .platform_name = "msm-pcm-routing",
  6136. .codec_name = "tavil_codec",
  6137. .codec_dai_name = "tavil_rx2",
  6138. .no_pcm = 1,
  6139. .dpcm_playback = 1,
  6140. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6141. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6142. .ops = &msm_be_ops,
  6143. .ignore_pmdown_time = 1,
  6144. .ignore_suspend = 1,
  6145. },
  6146. {
  6147. .name = LPASS_BE_SLIMBUS_3_RX,
  6148. .stream_name = "Slimbus3 Playback",
  6149. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6150. .platform_name = "msm-pcm-routing",
  6151. .codec_name = "tavil_codec",
  6152. .codec_dai_name = "tavil_rx1",
  6153. .no_pcm = 1,
  6154. .dpcm_playback = 1,
  6155. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6156. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6157. .ops = &msm_be_ops,
  6158. /* dai link has playback support */
  6159. .ignore_pmdown_time = 1,
  6160. .ignore_suspend = 1,
  6161. },
  6162. {
  6163. .name = LPASS_BE_SLIMBUS_3_TX,
  6164. .stream_name = "Slimbus3 Capture",
  6165. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6166. .platform_name = "msm-pcm-routing",
  6167. .codec_name = "tavil_codec",
  6168. .codec_dai_name = "tavil_tx1",
  6169. .no_pcm = 1,
  6170. .dpcm_capture = 1,
  6171. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6172. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6173. .ops = &msm_be_ops,
  6174. .ignore_suspend = 1,
  6175. },
  6176. {
  6177. .name = LPASS_BE_SLIMBUS_4_RX,
  6178. .stream_name = "Slimbus4 Playback",
  6179. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6180. .platform_name = "msm-pcm-routing",
  6181. .codec_name = "tavil_codec",
  6182. .codec_dai_name = "tavil_rx1",
  6183. .no_pcm = 1,
  6184. .dpcm_playback = 1,
  6185. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6186. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6187. .ops = &msm_be_ops,
  6188. /* dai link has playback support */
  6189. .ignore_pmdown_time = 1,
  6190. .ignore_suspend = 1,
  6191. },
  6192. {
  6193. .name = LPASS_BE_SLIMBUS_5_RX,
  6194. .stream_name = "Slimbus5 Playback",
  6195. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6196. .platform_name = "msm-pcm-routing",
  6197. .codec_name = "tavil_codec",
  6198. .codec_dai_name = "tavil_rx3",
  6199. .no_pcm = 1,
  6200. .dpcm_playback = 1,
  6201. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6202. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6203. .ops = &msm_be_ops,
  6204. /* dai link has playback support */
  6205. .ignore_pmdown_time = 1,
  6206. .ignore_suspend = 1,
  6207. },
  6208. /* MAD BE */
  6209. {
  6210. .name = LPASS_BE_SLIMBUS_5_TX,
  6211. .stream_name = "Slimbus5 Capture",
  6212. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6213. .platform_name = "msm-pcm-routing",
  6214. .codec_name = "tavil_codec",
  6215. .codec_dai_name = "tavil_mad1",
  6216. .no_pcm = 1,
  6217. .dpcm_capture = 1,
  6218. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6219. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6220. .ops = &msm_be_ops,
  6221. .ignore_suspend = 1,
  6222. },
  6223. {
  6224. .name = LPASS_BE_SLIMBUS_6_RX,
  6225. .stream_name = "Slimbus6 Playback",
  6226. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6227. .platform_name = "msm-pcm-routing",
  6228. .codec_name = "tavil_codec",
  6229. .codec_dai_name = "tavil_rx4",
  6230. .no_pcm = 1,
  6231. .dpcm_playback = 1,
  6232. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6233. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6234. .ops = &msm_be_ops,
  6235. /* dai link has playback support */
  6236. .ignore_pmdown_time = 1,
  6237. .ignore_suspend = 1,
  6238. },
  6239. /* Slimbus VI Recording */
  6240. {
  6241. .name = LPASS_BE_SLIMBUS_TX_VI,
  6242. .stream_name = "Slimbus4 Capture",
  6243. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6244. .platform_name = "msm-pcm-routing",
  6245. .codec_name = "tavil_codec",
  6246. .codec_dai_name = "tavil_vifeedback",
  6247. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6248. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6249. .ops = &msm_be_ops,
  6250. .ignore_suspend = 1,
  6251. .no_pcm = 1,
  6252. .dpcm_capture = 1,
  6253. },
  6254. };
  6255. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6256. {
  6257. .name = LPASS_BE_SLIMBUS_7_RX,
  6258. .stream_name = "Slimbus7 Playback",
  6259. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6260. .platform_name = "msm-pcm-routing",
  6261. .codec_name = "btfmslim_slave",
  6262. /* BT codec driver determines capabilities based on
  6263. * dai name, bt codecdai name should always contains
  6264. * supported usecase information
  6265. */
  6266. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6267. .no_pcm = 1,
  6268. .dpcm_playback = 1,
  6269. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6270. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6271. .ops = &msm_wcn_ops,
  6272. /* dai link has playback support */
  6273. .ignore_pmdown_time = 1,
  6274. .ignore_suspend = 1,
  6275. },
  6276. {
  6277. .name = LPASS_BE_SLIMBUS_7_TX,
  6278. .stream_name = "Slimbus7 Capture",
  6279. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6280. .platform_name = "msm-pcm-routing",
  6281. .codec_name = "btfmslim_slave",
  6282. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6283. .no_pcm = 1,
  6284. .dpcm_capture = 1,
  6285. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6286. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6287. .ops = &msm_wcn_ops,
  6288. .ignore_suspend = 1,
  6289. },
  6290. {
  6291. .name = LPASS_BE_SLIMBUS_8_TX,
  6292. .stream_name = "Slimbus8 Capture",
  6293. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6294. .platform_name = "msm-pcm-routing",
  6295. .codec_name = "btfmslim_slave",
  6296. .codec_dai_name = "btfm_fm_slim_tx",
  6297. .no_pcm = 1,
  6298. .dpcm_capture = 1,
  6299. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6300. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6301. .init = &msm_wcn_init,
  6302. .ops = &msm_wcn_ops,
  6303. .ignore_suspend = 1,
  6304. },
  6305. };
  6306. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6307. /* DISP PORT BACK END DAI Link */
  6308. {
  6309. .name = LPASS_BE_DISPLAY_PORT,
  6310. .stream_name = "Display Port Playback",
  6311. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6312. .platform_name = "msm-pcm-routing",
  6313. .codec_name = "msm-ext-disp-audio-codec-rx",
  6314. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6315. .no_pcm = 1,
  6316. .dpcm_playback = 1,
  6317. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6318. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6319. .ignore_pmdown_time = 1,
  6320. .ignore_suspend = 1,
  6321. },
  6322. };
  6323. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6324. {
  6325. .name = LPASS_BE_PRI_MI2S_RX,
  6326. .stream_name = "Primary MI2S Playback",
  6327. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6328. .platform_name = "msm-pcm-routing",
  6329. .codec_name = "msm-stub-codec.1",
  6330. .codec_dai_name = "msm-stub-rx",
  6331. .no_pcm = 1,
  6332. .dpcm_playback = 1,
  6333. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6334. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6335. .ops = &msm_mi2s_be_ops,
  6336. .ignore_suspend = 1,
  6337. .ignore_pmdown_time = 1,
  6338. },
  6339. {
  6340. .name = LPASS_BE_PRI_MI2S_TX,
  6341. .stream_name = "Primary MI2S Capture",
  6342. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6343. .platform_name = "msm-pcm-routing",
  6344. .codec_name = "msm-stub-codec.1",
  6345. .codec_dai_name = "msm-stub-tx",
  6346. .no_pcm = 1,
  6347. .dpcm_capture = 1,
  6348. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6349. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6350. .ops = &msm_mi2s_be_ops,
  6351. .ignore_suspend = 1,
  6352. },
  6353. {
  6354. .name = LPASS_BE_SEC_MI2S_RX,
  6355. .stream_name = "Secondary MI2S Playback",
  6356. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6357. .platform_name = "msm-pcm-routing",
  6358. .codec_name = "msm-stub-codec.1",
  6359. .codec_dai_name = "msm-stub-rx",
  6360. .no_pcm = 1,
  6361. .dpcm_playback = 1,
  6362. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6363. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6364. .ops = &msm_mi2s_be_ops,
  6365. .ignore_suspend = 1,
  6366. .ignore_pmdown_time = 1,
  6367. },
  6368. {
  6369. .name = LPASS_BE_SEC_MI2S_TX,
  6370. .stream_name = "Secondary MI2S Capture",
  6371. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6372. .platform_name = "msm-pcm-routing",
  6373. .codec_name = "msm-stub-codec.1",
  6374. .codec_dai_name = "msm-stub-tx",
  6375. .no_pcm = 1,
  6376. .dpcm_capture = 1,
  6377. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6378. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6379. .ops = &msm_mi2s_be_ops,
  6380. .ignore_suspend = 1,
  6381. },
  6382. {
  6383. .name = LPASS_BE_TERT_MI2S_RX,
  6384. .stream_name = "Tertiary MI2S Playback",
  6385. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6386. .platform_name = "msm-pcm-routing",
  6387. .codec_name = "msm-stub-codec.1",
  6388. .codec_dai_name = "msm-stub-rx",
  6389. .no_pcm = 1,
  6390. .dpcm_playback = 1,
  6391. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6392. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6393. .ops = &msm_mi2s_be_ops,
  6394. .ignore_suspend = 1,
  6395. .ignore_pmdown_time = 1,
  6396. },
  6397. {
  6398. .name = LPASS_BE_TERT_MI2S_TX,
  6399. .stream_name = "Tertiary MI2S Capture",
  6400. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6401. .platform_name = "msm-pcm-routing",
  6402. .codec_name = "msm-stub-codec.1",
  6403. .codec_dai_name = "msm-stub-tx",
  6404. .no_pcm = 1,
  6405. .dpcm_capture = 1,
  6406. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6407. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6408. .ops = &msm_mi2s_be_ops,
  6409. .ignore_suspend = 1,
  6410. },
  6411. {
  6412. .name = LPASS_BE_QUAT_MI2S_RX,
  6413. .stream_name = "Quaternary MI2S Playback",
  6414. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6415. .platform_name = "msm-pcm-routing",
  6416. .codec_name = "msm-stub-codec.1",
  6417. .codec_dai_name = "msm-stub-rx",
  6418. .no_pcm = 1,
  6419. .dpcm_playback = 1,
  6420. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6421. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6422. .ops = &msm_mi2s_be_ops,
  6423. .ignore_suspend = 1,
  6424. .ignore_pmdown_time = 1,
  6425. },
  6426. {
  6427. .name = LPASS_BE_QUAT_MI2S_TX,
  6428. .stream_name = "Quaternary MI2S Capture",
  6429. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6430. .platform_name = "msm-pcm-routing",
  6431. .codec_name = "msm-stub-codec.1",
  6432. .codec_dai_name = "msm-stub-tx",
  6433. .no_pcm = 1,
  6434. .dpcm_capture = 1,
  6435. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6436. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6437. .ops = &msm_mi2s_be_ops,
  6438. .ignore_suspend = 1,
  6439. },
  6440. {
  6441. .name = LPASS_BE_QUIN_MI2S_RX,
  6442. .stream_name = "Quinary MI2S Playback",
  6443. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6444. .platform_name = "msm-pcm-routing",
  6445. .codec_name = "msm-stub-codec.1",
  6446. .codec_dai_name = "msm-stub-rx",
  6447. .no_pcm = 1,
  6448. .dpcm_playback = 1,
  6449. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6450. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6451. .ops = &msm_mi2s_be_ops,
  6452. .ignore_suspend = 1,
  6453. .ignore_pmdown_time = 1,
  6454. },
  6455. {
  6456. .name = LPASS_BE_QUIN_MI2S_TX,
  6457. .stream_name = "Quinary MI2S Capture",
  6458. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6459. .platform_name = "msm-pcm-routing",
  6460. .codec_name = "msm-stub-codec.1",
  6461. .codec_dai_name = "msm-stub-tx",
  6462. .no_pcm = 1,
  6463. .dpcm_capture = 1,
  6464. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6465. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6466. .ops = &msm_mi2s_be_ops,
  6467. .ignore_suspend = 1,
  6468. },
  6469. };
  6470. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6471. /* Primary AUX PCM Backend DAI Links */
  6472. {
  6473. .name = LPASS_BE_AUXPCM_RX,
  6474. .stream_name = "AUX PCM Playback",
  6475. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6476. .platform_name = "msm-pcm-routing",
  6477. .codec_name = "msm-stub-codec.1",
  6478. .codec_dai_name = "msm-stub-rx",
  6479. .no_pcm = 1,
  6480. .dpcm_playback = 1,
  6481. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6482. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6483. .ignore_pmdown_time = 1,
  6484. .ignore_suspend = 1,
  6485. },
  6486. {
  6487. .name = LPASS_BE_AUXPCM_TX,
  6488. .stream_name = "AUX PCM Capture",
  6489. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6490. .platform_name = "msm-pcm-routing",
  6491. .codec_name = "msm-stub-codec.1",
  6492. .codec_dai_name = "msm-stub-tx",
  6493. .no_pcm = 1,
  6494. .dpcm_capture = 1,
  6495. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6496. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6497. .ignore_suspend = 1,
  6498. },
  6499. /* Secondary AUX PCM Backend DAI Links */
  6500. {
  6501. .name = LPASS_BE_SEC_AUXPCM_RX,
  6502. .stream_name = "Sec AUX PCM Playback",
  6503. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6504. .platform_name = "msm-pcm-routing",
  6505. .codec_name = "msm-stub-codec.1",
  6506. .codec_dai_name = "msm-stub-rx",
  6507. .no_pcm = 1,
  6508. .dpcm_playback = 1,
  6509. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6510. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6511. .ignore_pmdown_time = 1,
  6512. .ignore_suspend = 1,
  6513. },
  6514. {
  6515. .name = LPASS_BE_SEC_AUXPCM_TX,
  6516. .stream_name = "Sec AUX PCM Capture",
  6517. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6518. .platform_name = "msm-pcm-routing",
  6519. .codec_name = "msm-stub-codec.1",
  6520. .codec_dai_name = "msm-stub-tx",
  6521. .no_pcm = 1,
  6522. .dpcm_capture = 1,
  6523. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6524. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6525. .ignore_suspend = 1,
  6526. },
  6527. /* Tertiary AUX PCM Backend DAI Links */
  6528. {
  6529. .name = LPASS_BE_TERT_AUXPCM_RX,
  6530. .stream_name = "Tert AUX PCM Playback",
  6531. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6532. .platform_name = "msm-pcm-routing",
  6533. .codec_name = "msm-stub-codec.1",
  6534. .codec_dai_name = "msm-stub-rx",
  6535. .no_pcm = 1,
  6536. .dpcm_playback = 1,
  6537. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6538. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6539. .ignore_suspend = 1,
  6540. },
  6541. {
  6542. .name = LPASS_BE_TERT_AUXPCM_TX,
  6543. .stream_name = "Tert AUX PCM Capture",
  6544. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6545. .platform_name = "msm-pcm-routing",
  6546. .codec_name = "msm-stub-codec.1",
  6547. .codec_dai_name = "msm-stub-tx",
  6548. .no_pcm = 1,
  6549. .dpcm_capture = 1,
  6550. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6551. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6552. .ignore_suspend = 1,
  6553. },
  6554. /* Quaternary AUX PCM Backend DAI Links */
  6555. {
  6556. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6557. .stream_name = "Quat AUX PCM Playback",
  6558. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6559. .platform_name = "msm-pcm-routing",
  6560. .codec_name = "msm-stub-codec.1",
  6561. .codec_dai_name = "msm-stub-rx",
  6562. .no_pcm = 1,
  6563. .dpcm_playback = 1,
  6564. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6565. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6566. .ignore_pmdown_time = 1,
  6567. .ignore_suspend = 1,
  6568. },
  6569. {
  6570. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6571. .stream_name = "Quat AUX PCM Capture",
  6572. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6573. .platform_name = "msm-pcm-routing",
  6574. .codec_name = "msm-stub-codec.1",
  6575. .codec_dai_name = "msm-stub-tx",
  6576. .no_pcm = 1,
  6577. .dpcm_capture = 1,
  6578. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6579. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6580. .ignore_suspend = 1,
  6581. },
  6582. /* Quinary AUX PCM Backend DAI Links */
  6583. {
  6584. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6585. .stream_name = "Quin AUX PCM Playback",
  6586. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6587. .platform_name = "msm-pcm-routing",
  6588. .codec_name = "msm-stub-codec.1",
  6589. .codec_dai_name = "msm-stub-rx",
  6590. .no_pcm = 1,
  6591. .dpcm_playback = 1,
  6592. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6593. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6594. .ignore_pmdown_time = 1,
  6595. .ignore_suspend = 1,
  6596. },
  6597. {
  6598. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6599. .stream_name = "Quin AUX PCM Capture",
  6600. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6601. .platform_name = "msm-pcm-routing",
  6602. .codec_name = "msm-stub-codec.1",
  6603. .codec_dai_name = "msm-stub-tx",
  6604. .no_pcm = 1,
  6605. .dpcm_capture = 1,
  6606. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6607. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6608. .ignore_suspend = 1,
  6609. },
  6610. };
  6611. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6612. /* WSA CDC DMA Backend DAI Links */
  6613. {
  6614. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6615. .stream_name = "WSA CDC DMA0 Playback",
  6616. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6617. .platform_name = "msm-pcm-routing",
  6618. .codec_name = "bolero_codec",
  6619. .codec_dai_name = "wsa_macro_rx1",
  6620. .no_pcm = 1,
  6621. .dpcm_playback = 1,
  6622. .init = &msm_int_audrx_init,
  6623. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6624. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6625. .ignore_pmdown_time = 1,
  6626. .ignore_suspend = 1,
  6627. .ops = &msm_cdc_dma_be_ops,
  6628. },
  6629. {
  6630. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6631. .stream_name = "WSA CDC DMA1 Playback",
  6632. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6633. .platform_name = "msm-pcm-routing",
  6634. .codec_name = "bolero_codec",
  6635. .codec_dai_name = "wsa_macro_rx_mix",
  6636. .no_pcm = 1,
  6637. .dpcm_playback = 1,
  6638. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6639. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6640. .ignore_pmdown_time = 1,
  6641. .ignore_suspend = 1,
  6642. .ops = &msm_cdc_dma_be_ops,
  6643. },
  6644. {
  6645. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6646. .stream_name = "WSA CDC DMA1 Capture",
  6647. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6648. .platform_name = "msm-pcm-routing",
  6649. .codec_name = "bolero_codec",
  6650. .codec_dai_name = "wsa_macro_echo",
  6651. .no_pcm = 1,
  6652. .dpcm_capture = 1,
  6653. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6654. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6655. .ignore_suspend = 1,
  6656. .ops = &msm_cdc_dma_be_ops,
  6657. },
  6658. };
  6659. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6660. /* RX CDC DMA Backend DAI Links */
  6661. {
  6662. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6663. .stream_name = "RX CDC DMA0 Playback",
  6664. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6665. .platform_name = "msm-pcm-routing",
  6666. .codec_name = "bolero_codec",
  6667. .codec_dai_name = "rx_macro_rx1",
  6668. .no_pcm = 1,
  6669. .dpcm_playback = 1,
  6670. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6671. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6672. .ignore_pmdown_time = 1,
  6673. .ignore_suspend = 1,
  6674. .ops = &msm_cdc_dma_be_ops,
  6675. },
  6676. {
  6677. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6678. .stream_name = "RX CDC DMA1 Playback",
  6679. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6680. .platform_name = "msm-pcm-routing",
  6681. .codec_name = "bolero_codec",
  6682. .codec_dai_name = "rx_macro_rx2",
  6683. .no_pcm = 1,
  6684. .dpcm_playback = 1,
  6685. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6686. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6687. .ignore_pmdown_time = 1,
  6688. .ignore_suspend = 1,
  6689. .ops = &msm_cdc_dma_be_ops,
  6690. },
  6691. {
  6692. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6693. .stream_name = "RX CDC DMA2 Playback",
  6694. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6695. .platform_name = "msm-pcm-routing",
  6696. .codec_name = "bolero_codec",
  6697. .codec_dai_name = "rx_macro_rx3",
  6698. .no_pcm = 1,
  6699. .dpcm_playback = 1,
  6700. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6701. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6702. .ignore_pmdown_time = 1,
  6703. .ignore_suspend = 1,
  6704. .ops = &msm_cdc_dma_be_ops,
  6705. },
  6706. {
  6707. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6708. .stream_name = "RX CDC DMA3 Playback",
  6709. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6710. .platform_name = "msm-pcm-routing",
  6711. .codec_name = "bolero_codec",
  6712. .codec_dai_name = "rx_macro_rx4",
  6713. .no_pcm = 1,
  6714. .dpcm_playback = 1,
  6715. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6716. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6717. .ignore_pmdown_time = 1,
  6718. .ignore_suspend = 1,
  6719. .ops = &msm_cdc_dma_be_ops,
  6720. },
  6721. /* TX CDC DMA Backend DAI Links */
  6722. {
  6723. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6724. .stream_name = "TX CDC DMA3 Capture",
  6725. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6726. .platform_name = "msm-pcm-routing",
  6727. .codec_name = "bolero_codec",
  6728. .codec_dai_name = "tx_macro_tx1",
  6729. .no_pcm = 1,
  6730. .dpcm_capture = 1,
  6731. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6732. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6733. .ignore_suspend = 1,
  6734. .ops = &msm_cdc_dma_be_ops,
  6735. },
  6736. {
  6737. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6738. .stream_name = "TX CDC DMA4 Capture",
  6739. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6740. .platform_name = "msm-pcm-routing",
  6741. .codec_name = "bolero_codec",
  6742. .codec_dai_name = "tx_macro_tx2",
  6743. .no_pcm = 1,
  6744. .dpcm_capture = 1,
  6745. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6746. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6747. .ignore_suspend = 1,
  6748. .ops = &msm_cdc_dma_be_ops,
  6749. },
  6750. };
  6751. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6752. ARRAY_SIZE(msm_common_dai_links) +
  6753. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6754. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6755. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6756. ARRAY_SIZE(msm_common_be_dai_links) +
  6757. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6758. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6759. ARRAY_SIZE(ext_disp_be_dai_link) +
  6760. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6761. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6762. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6763. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6764. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6765. {
  6766. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6767. struct snd_soc_pcm_runtime *rtd;
  6768. int ret = 0;
  6769. void *mbhc_calibration;
  6770. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6771. if (!rtd) {
  6772. dev_err(card->dev,
  6773. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6774. __func__, be_dl_name);
  6775. ret = -EINVAL;
  6776. goto err_pcm_runtime;
  6777. }
  6778. mbhc_calibration = def_wcd_mbhc_cal();
  6779. if (!mbhc_calibration) {
  6780. ret = -ENOMEM;
  6781. goto err_mbhc_cal;
  6782. }
  6783. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6784. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6785. if (ret) {
  6786. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6787. __func__, ret);
  6788. goto err_hs_detect;
  6789. }
  6790. return 0;
  6791. err_hs_detect:
  6792. kfree(mbhc_calibration);
  6793. err_mbhc_cal:
  6794. err_pcm_runtime:
  6795. return ret;
  6796. }
  6797. static int msm_populate_dai_link_component_of_node(
  6798. struct snd_soc_card *card)
  6799. {
  6800. int i, index, ret = 0;
  6801. struct device *cdev = card->dev;
  6802. struct snd_soc_dai_link *dai_link = card->dai_link;
  6803. struct device_node *np;
  6804. if (!cdev) {
  6805. pr_err("%s: Sound card device memory NULL\n", __func__);
  6806. return -ENODEV;
  6807. }
  6808. for (i = 0; i < card->num_links; i++) {
  6809. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6810. continue;
  6811. /* populate platform_of_node for snd card dai links */
  6812. if (dai_link[i].platform_name &&
  6813. !dai_link[i].platform_of_node) {
  6814. index = of_property_match_string(cdev->of_node,
  6815. "asoc-platform-names",
  6816. dai_link[i].platform_name);
  6817. if (index < 0) {
  6818. pr_err("%s: No match found for platform name: %s\n",
  6819. __func__, dai_link[i].platform_name);
  6820. ret = index;
  6821. goto err;
  6822. }
  6823. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6824. index);
  6825. if (!np) {
  6826. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6827. __func__, dai_link[i].platform_name,
  6828. index);
  6829. ret = -ENODEV;
  6830. goto err;
  6831. }
  6832. dai_link[i].platform_of_node = np;
  6833. dai_link[i].platform_name = NULL;
  6834. }
  6835. /* populate cpu_of_node for snd card dai links */
  6836. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6837. index = of_property_match_string(cdev->of_node,
  6838. "asoc-cpu-names",
  6839. dai_link[i].cpu_dai_name);
  6840. if (index >= 0) {
  6841. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6842. index);
  6843. if (!np) {
  6844. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6845. __func__,
  6846. dai_link[i].cpu_dai_name);
  6847. ret = -ENODEV;
  6848. goto err;
  6849. }
  6850. dai_link[i].cpu_of_node = np;
  6851. dai_link[i].cpu_dai_name = NULL;
  6852. }
  6853. }
  6854. /* populate codec_of_node for snd card dai links */
  6855. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6856. index = of_property_match_string(cdev->of_node,
  6857. "asoc-codec-names",
  6858. dai_link[i].codec_name);
  6859. if (index < 0)
  6860. continue;
  6861. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6862. index);
  6863. if (!np) {
  6864. pr_err("%s: retrieving phandle for codec %s failed\n",
  6865. __func__, dai_link[i].codec_name);
  6866. ret = -ENODEV;
  6867. goto err;
  6868. }
  6869. dai_link[i].codec_of_node = np;
  6870. dai_link[i].codec_name = NULL;
  6871. }
  6872. }
  6873. err:
  6874. return ret;
  6875. }
  6876. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6877. {
  6878. int ret = 0;
  6879. struct snd_soc_codec *codec = rtd->codec;
  6880. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6881. ARRAY_SIZE(msm_tavil_snd_controls));
  6882. if (ret < 0) {
  6883. dev_err(codec->dev,
  6884. "%s: add_codec_controls failed, err = %d\n",
  6885. __func__, ret);
  6886. return ret;
  6887. }
  6888. return 0;
  6889. }
  6890. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6891. struct snd_pcm_hw_params *params)
  6892. {
  6893. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6894. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6895. int ret = 0;
  6896. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6897. 151};
  6898. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6899. 134, 135, 136, 137, 138, 139,
  6900. 140, 141, 142, 143};
  6901. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6902. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6903. slim_rx_cfg[SLIM_RX_0].channels,
  6904. rx_ch);
  6905. if (ret < 0)
  6906. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6907. __func__, ret);
  6908. } else {
  6909. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6910. slim_tx_cfg[SLIM_TX_0].channels,
  6911. tx_ch, 0, 0);
  6912. if (ret < 0)
  6913. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6914. __func__, ret);
  6915. }
  6916. return ret;
  6917. }
  6918. static struct snd_soc_ops msm_stub_be_ops = {
  6919. .hw_params = msm_snd_stub_hw_params,
  6920. };
  6921. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6922. /* FrontEnd DAI Links */
  6923. {
  6924. .name = "MSMSTUB Media1",
  6925. .stream_name = "MultiMedia1",
  6926. .cpu_dai_name = "MultiMedia1",
  6927. .platform_name = "msm-pcm-dsp.0",
  6928. .dynamic = 1,
  6929. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6930. .dpcm_playback = 1,
  6931. .dpcm_capture = 1,
  6932. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6933. SND_SOC_DPCM_TRIGGER_POST},
  6934. .codec_dai_name = "snd-soc-dummy-dai",
  6935. .codec_name = "snd-soc-dummy",
  6936. .ignore_suspend = 1,
  6937. /* this dainlink has playback support */
  6938. .ignore_pmdown_time = 1,
  6939. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6940. },
  6941. };
  6942. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6943. /* Backend DAI Links */
  6944. {
  6945. .name = LPASS_BE_SLIMBUS_0_RX,
  6946. .stream_name = "Slimbus Playback",
  6947. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6948. .platform_name = "msm-pcm-routing",
  6949. .codec_name = "msm-stub-codec.1",
  6950. .codec_dai_name = "msm-stub-rx",
  6951. .no_pcm = 1,
  6952. .dpcm_playback = 1,
  6953. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6954. .init = &msm_audrx_stub_init,
  6955. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6956. .ignore_pmdown_time = 1, /* dai link has playback support */
  6957. .ignore_suspend = 1,
  6958. .ops = &msm_stub_be_ops,
  6959. },
  6960. {
  6961. .name = LPASS_BE_SLIMBUS_0_TX,
  6962. .stream_name = "Slimbus Capture",
  6963. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6964. .platform_name = "msm-pcm-routing",
  6965. .codec_name = "msm-stub-codec.1",
  6966. .codec_dai_name = "msm-stub-tx",
  6967. .no_pcm = 1,
  6968. .dpcm_capture = 1,
  6969. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6970. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6971. .ignore_suspend = 1,
  6972. .ops = &msm_stub_be_ops,
  6973. },
  6974. };
  6975. static struct snd_soc_dai_link msm_stub_dai_links[
  6976. ARRAY_SIZE(msm_stub_fe_dai_links) +
  6977. ARRAY_SIZE(msm_stub_be_dai_links)];
  6978. struct snd_soc_card snd_soc_card_stub_msm = {
  6979. .name = "sm6150-stub-snd-card",
  6980. };
  6981. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  6982. { .compatible = "qcom,sm6150-asoc-snd",
  6983. .data = "codec"},
  6984. { .compatible = "qcom,sm6150-asoc-snd-stub",
  6985. .data = "stub_codec"},
  6986. {},
  6987. };
  6988. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  6989. {
  6990. struct snd_soc_card *card = NULL;
  6991. struct snd_soc_dai_link *dailink;
  6992. int total_links = 0, rc = 0;
  6993. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  6994. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  6995. u32 wcn_btfm_intf = 0;
  6996. const struct of_device_id *match;
  6997. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  6998. if (!match) {
  6999. dev_err(dev, "%s: No DT match found for sound card\n",
  7000. __func__);
  7001. return NULL;
  7002. }
  7003. if (!strcmp(match->data, "codec")) {
  7004. card = &snd_soc_card_sm6150_msm;
  7005. memcpy(msm_sm6150_dai_links + total_links,
  7006. msm_common_dai_links,
  7007. sizeof(msm_common_dai_links));
  7008. total_links += ARRAY_SIZE(msm_common_dai_links);
  7009. memcpy(msm_sm6150_dai_links + total_links,
  7010. msm_common_misc_fe_dai_links,
  7011. sizeof(msm_common_misc_fe_dai_links));
  7012. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7013. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7014. &tavil_codec);
  7015. if (rc) {
  7016. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7017. __func__);
  7018. } else {
  7019. if (tavil_codec) {
  7020. card->late_probe =
  7021. msm_snd_card_tavil_late_probe;
  7022. memcpy(msm_sm6150_dai_links + total_links,
  7023. msm_tavil_fe_dai_links,
  7024. sizeof(msm_tavil_fe_dai_links));
  7025. total_links +=
  7026. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7027. }
  7028. }
  7029. if (!tavil_codec) {
  7030. memcpy(msm_sm6150_dai_links + total_links,
  7031. msm_bolero_fe_dai_links,
  7032. sizeof(msm_bolero_fe_dai_links));
  7033. total_links +=
  7034. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7035. }
  7036. memcpy(msm_sm6150_dai_links + total_links,
  7037. msm_common_be_dai_links,
  7038. sizeof(msm_common_be_dai_links));
  7039. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7040. if (tavil_codec) {
  7041. memcpy(msm_sm6150_dai_links + total_links,
  7042. msm_tavil_be_dai_links,
  7043. sizeof(msm_tavil_be_dai_links));
  7044. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7045. } else {
  7046. memcpy(msm_sm6150_dai_links + total_links,
  7047. msm_wsa_cdc_dma_be_dai_links,
  7048. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7049. total_links +=
  7050. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7051. memcpy(msm_sm6150_dai_links + total_links,
  7052. msm_rx_tx_cdc_dma_be_dai_links,
  7053. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7054. total_links +=
  7055. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7056. }
  7057. rc = of_property_read_u32(dev->of_node,
  7058. "qcom,ext-disp-audio-rx",
  7059. &ext_disp_audio_intf);
  7060. if (rc) {
  7061. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7062. __func__);
  7063. } else {
  7064. if (auxpcm_audio_intf) {
  7065. memcpy(msm_sm6150_dai_links + total_links,
  7066. ext_disp_be_dai_link,
  7067. sizeof(ext_disp_be_dai_link));
  7068. total_links +=
  7069. ARRAY_SIZE(ext_disp_be_dai_link);
  7070. }
  7071. }
  7072. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7073. &mi2s_audio_intf);
  7074. if (rc) {
  7075. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7076. __func__);
  7077. } else {
  7078. if (mi2s_audio_intf) {
  7079. memcpy(msm_sm6150_dai_links + total_links,
  7080. msm_mi2s_be_dai_links,
  7081. sizeof(msm_mi2s_be_dai_links));
  7082. total_links +=
  7083. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7084. }
  7085. }
  7086. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7087. &wcn_btfm_intf);
  7088. if (rc) {
  7089. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7090. __func__);
  7091. } else {
  7092. if (wcn_btfm_intf) {
  7093. memcpy(msm_sm6150_dai_links + total_links,
  7094. msm_wcn_be_dai_links,
  7095. sizeof(msm_wcn_be_dai_links));
  7096. total_links +=
  7097. ARRAY_SIZE(msm_wcn_be_dai_links);
  7098. }
  7099. }
  7100. rc = of_property_read_u32(dev->of_node,
  7101. "qcom,auxpcm-audio-intf",
  7102. &auxpcm_audio_intf);
  7103. if (rc) {
  7104. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7105. __func__);
  7106. } else {
  7107. if (auxpcm_audio_intf) {
  7108. memcpy(msm_sm6150_dai_links + total_links,
  7109. msm_auxpcm_be_dai_links,
  7110. sizeof(msm_auxpcm_be_dai_links));
  7111. total_links +=
  7112. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7113. }
  7114. }
  7115. dailink = msm_sm6150_dai_links;
  7116. } else if (!strcmp(match->data, "stub_codec")) {
  7117. card = &snd_soc_card_stub_msm;
  7118. memcpy(msm_stub_dai_links + total_links,
  7119. msm_stub_fe_dai_links,
  7120. sizeof(msm_stub_fe_dai_links));
  7121. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7122. memcpy(msm_stub_dai_links + total_links,
  7123. msm_stub_be_dai_links,
  7124. sizeof(msm_stub_be_dai_links));
  7125. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7126. dailink = msm_stub_dai_links;
  7127. }
  7128. if (card) {
  7129. card->dai_link = dailink;
  7130. card->num_links = total_links;
  7131. }
  7132. return card;
  7133. }
  7134. static int msm_wsa881x_init(struct snd_soc_component *component)
  7135. {
  7136. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7137. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7138. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7139. SPKR_L_BOOST, SPKR_L_VI};
  7140. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7141. SPKR_R_BOOST, SPKR_R_VI};
  7142. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7143. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7144. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7145. struct msm_asoc_mach_data *pdata;
  7146. struct snd_soc_dapm_context *dapm;
  7147. struct snd_card *card = component->card->snd_card;
  7148. struct snd_info_entry *entry;
  7149. int ret = 0;
  7150. if (!codec) {
  7151. pr_err("%s codec is NULL\n", __func__);
  7152. return -EINVAL;
  7153. }
  7154. dapm = snd_soc_codec_get_dapm(codec);
  7155. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7156. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7157. __func__, codec->component.name);
  7158. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7159. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7160. &ch_rate[0], &spkleft_port_types[0]);
  7161. if (dapm->component) {
  7162. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7163. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7164. }
  7165. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7166. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7167. __func__, codec->component.name);
  7168. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7169. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7170. &ch_rate[0], &spkright_port_types[0]);
  7171. if (dapm->component) {
  7172. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7173. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7174. }
  7175. } else {
  7176. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7177. codec->component.name);
  7178. ret = -EINVAL;
  7179. goto err;
  7180. }
  7181. pdata = snd_soc_card_get_drvdata(component->card);
  7182. if (!pdata->codec_root) {
  7183. entry = snd_info_create_subdir(card->module, "codecs",
  7184. card->proc_root);
  7185. if (!entry) {
  7186. pr_err("%s: Cannot create codecs module entry\n",
  7187. __func__);
  7188. ret = 0;
  7189. goto err;
  7190. }
  7191. pdata->codec_root = entry;
  7192. }
  7193. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7194. codec);
  7195. err:
  7196. return ret;
  7197. }
  7198. static int msm_aux_codec_init(struct snd_soc_component *component)
  7199. {
  7200. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7201. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7202. int ret = 0;
  7203. void *mbhc_calibration;
  7204. struct snd_info_entry *entry;
  7205. struct snd_card *card = component->card->snd_card;
  7206. struct msm_asoc_mach_data *pdata;
  7207. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7208. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7209. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7210. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7211. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7212. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7213. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7214. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7215. snd_soc_dapm_sync(dapm);
  7216. pdata = snd_soc_card_get_drvdata(component->card);
  7217. if (!pdata->codec_root) {
  7218. entry = snd_info_create_subdir(card->module, "codecs",
  7219. card->proc_root);
  7220. if (!entry) {
  7221. pr_err("%s: Cannot create codecs module entry\n",
  7222. __func__);
  7223. ret = 0;
  7224. goto codec_root_err;
  7225. }
  7226. pdata->codec_root = entry;
  7227. }
  7228. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7229. codec_root_err:
  7230. mbhc_calibration = def_wcd_mbhc_cal();
  7231. if (!mbhc_calibration) {
  7232. return -ENOMEM;
  7233. }
  7234. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7235. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7236. return ret;
  7237. }
  7238. static int msm_init_aux_dev(struct platform_device *pdev,
  7239. struct snd_soc_card *card)
  7240. {
  7241. struct device_node *wsa_of_node;
  7242. struct device_node *aux_codec_of_node;
  7243. u32 wsa_max_devs;
  7244. u32 wsa_dev_cnt;
  7245. u32 codec_aux_dev_cnt = 0;
  7246. int i;
  7247. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7248. struct aux_codec_dev_info *aux_cdc_dev_info;
  7249. const char *auxdev_name_prefix[1];
  7250. char *dev_name_str = NULL;
  7251. int found = 0;
  7252. int codecs_found = 0;
  7253. int ret = 0;
  7254. /* Get maximum WSA device count for this platform */
  7255. ret = of_property_read_u32(pdev->dev.of_node,
  7256. "qcom,wsa-max-devs", &wsa_max_devs);
  7257. if (ret) {
  7258. dev_info(&pdev->dev,
  7259. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7260. __func__, pdev->dev.of_node->full_name, ret);
  7261. wsa_max_devs = 0;
  7262. goto codec_aux_dev;
  7263. }
  7264. if (wsa_max_devs == 0) {
  7265. dev_warn(&pdev->dev,
  7266. "%s: Max WSA devices is 0 for this target?\n",
  7267. __func__);
  7268. goto codec_aux_dev;
  7269. }
  7270. /* Get count of WSA device phandles for this platform */
  7271. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7272. "qcom,wsa-devs", NULL);
  7273. if (wsa_dev_cnt == -ENOENT) {
  7274. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7275. __func__);
  7276. goto err;
  7277. } else if (wsa_dev_cnt <= 0) {
  7278. dev_err(&pdev->dev,
  7279. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7280. __func__, wsa_dev_cnt);
  7281. ret = -EINVAL;
  7282. goto err;
  7283. }
  7284. /*
  7285. * Expect total phandles count to be NOT less than maximum possible
  7286. * WSA count. However, if it is less, then assign same value to
  7287. * max count as well.
  7288. */
  7289. if (wsa_dev_cnt < wsa_max_devs) {
  7290. dev_dbg(&pdev->dev,
  7291. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7292. __func__, wsa_max_devs, wsa_dev_cnt);
  7293. wsa_max_devs = wsa_dev_cnt;
  7294. }
  7295. /* Make sure prefix string passed for each WSA device */
  7296. ret = of_property_count_strings(pdev->dev.of_node,
  7297. "qcom,wsa-aux-dev-prefix");
  7298. if (ret != wsa_dev_cnt) {
  7299. dev_err(&pdev->dev,
  7300. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7301. __func__, wsa_dev_cnt, ret);
  7302. ret = -EINVAL;
  7303. goto err;
  7304. }
  7305. /*
  7306. * Alloc mem to store phandle and index info of WSA device, if already
  7307. * registered with ALSA core
  7308. */
  7309. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7310. sizeof(struct msm_wsa881x_dev_info),
  7311. GFP_KERNEL);
  7312. if (!wsa881x_dev_info) {
  7313. ret = -ENOMEM;
  7314. goto err;
  7315. }
  7316. /*
  7317. * search and check whether all WSA devices are already
  7318. * registered with ALSA core or not. If found a node, store
  7319. * the node and the index in a local array of struct for later
  7320. * use.
  7321. */
  7322. for (i = 0; i < wsa_dev_cnt; i++) {
  7323. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7324. "qcom,wsa-devs", i);
  7325. if (unlikely(!wsa_of_node)) {
  7326. /* we should not be here */
  7327. dev_err(&pdev->dev,
  7328. "%s: wsa dev node is not present\n",
  7329. __func__);
  7330. ret = -EINVAL;
  7331. goto err;
  7332. }
  7333. if (soc_find_component(wsa_of_node, NULL)) {
  7334. /* WSA device registered with ALSA core */
  7335. wsa881x_dev_info[found].of_node = wsa_of_node;
  7336. wsa881x_dev_info[found].index = i;
  7337. found++;
  7338. if (found == wsa_max_devs)
  7339. break;
  7340. }
  7341. }
  7342. if (found < wsa_max_devs) {
  7343. dev_dbg(&pdev->dev,
  7344. "%s: failed to find %d components. Found only %d\n",
  7345. __func__, wsa_max_devs, found);
  7346. return -EPROBE_DEFER;
  7347. }
  7348. dev_info(&pdev->dev,
  7349. "%s: found %d wsa881x devices registered with ALSA core\n",
  7350. __func__, found);
  7351. codec_aux_dev:
  7352. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7353. /* Get count of aux codec device phandles for this platform */
  7354. codec_aux_dev_cnt = of_count_phandle_with_args(
  7355. pdev->dev.of_node,
  7356. "qcom,codec-aux-devs", NULL);
  7357. if (codec_aux_dev_cnt == -ENOENT) {
  7358. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7359. __func__);
  7360. goto err;
  7361. } else if (codec_aux_dev_cnt <= 0) {
  7362. dev_err(&pdev->dev,
  7363. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7364. __func__, codec_aux_dev_cnt);
  7365. ret = -EINVAL;
  7366. goto err;
  7367. }
  7368. /*
  7369. * Alloc mem to store phandle and index info of aux codec
  7370. * if already registered with ALSA core
  7371. */
  7372. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7373. sizeof(struct aux_codec_dev_info),
  7374. GFP_KERNEL);
  7375. if (!aux_cdc_dev_info) {
  7376. ret = -ENOMEM;
  7377. goto err;
  7378. }
  7379. /*
  7380. * search and check whether all aux codecs are already
  7381. * registered with ALSA core or not. If found a node, store
  7382. * the node and the index in a local array of struct for later
  7383. * use.
  7384. */
  7385. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7386. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7387. "qcom,codec-aux-devs", i);
  7388. if (unlikely(!aux_codec_of_node)) {
  7389. /* we should not be here */
  7390. dev_err(&pdev->dev,
  7391. "%s: aux codec dev node is not present\n",
  7392. __func__);
  7393. ret = -EINVAL;
  7394. goto err;
  7395. }
  7396. if (soc_find_component(aux_codec_of_node, NULL)) {
  7397. /* AUX codec registered with ALSA core */
  7398. aux_cdc_dev_info[codecs_found].of_node =
  7399. aux_codec_of_node;
  7400. aux_cdc_dev_info[codecs_found].index = i;
  7401. codecs_found++;
  7402. }
  7403. }
  7404. if (codecs_found < codec_aux_dev_cnt) {
  7405. dev_dbg(&pdev->dev,
  7406. "%s: failed to find %d components. Found only %d\n",
  7407. __func__, codec_aux_dev_cnt, codecs_found);
  7408. return -EPROBE_DEFER;
  7409. }
  7410. dev_info(&pdev->dev,
  7411. "%s: found %d AUX codecs registered with ALSA core\n",
  7412. __func__, codecs_found);
  7413. }
  7414. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7415. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7416. /* Alloc array of AUX devs struct */
  7417. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7418. sizeof(struct snd_soc_aux_dev),
  7419. GFP_KERNEL);
  7420. if (!msm_aux_dev) {
  7421. ret = -ENOMEM;
  7422. goto err;
  7423. }
  7424. /* Alloc array of codec conf struct */
  7425. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7426. sizeof(struct snd_soc_codec_conf),
  7427. GFP_KERNEL);
  7428. if (!msm_codec_conf) {
  7429. ret = -ENOMEM;
  7430. goto err;
  7431. }
  7432. for (i = 0; i < wsa_max_devs; i++) {
  7433. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7434. GFP_KERNEL);
  7435. if (!dev_name_str) {
  7436. ret = -ENOMEM;
  7437. goto err;
  7438. }
  7439. ret = of_property_read_string_index(pdev->dev.of_node,
  7440. "qcom,wsa-aux-dev-prefix",
  7441. wsa881x_dev_info[i].index,
  7442. auxdev_name_prefix);
  7443. if (ret) {
  7444. dev_err(&pdev->dev,
  7445. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7446. __func__, ret);
  7447. ret = -EINVAL;
  7448. goto err;
  7449. }
  7450. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7451. msm_aux_dev[i].name = dev_name_str;
  7452. msm_aux_dev[i].codec_name = NULL;
  7453. msm_aux_dev[i].codec_of_node =
  7454. wsa881x_dev_info[i].of_node;
  7455. msm_aux_dev[i].init = msm_wsa881x_init;
  7456. msm_codec_conf[i].dev_name = NULL;
  7457. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7458. msm_codec_conf[i].of_node =
  7459. wsa881x_dev_info[i].of_node;
  7460. }
  7461. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7462. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7463. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7464. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7465. aux_cdc_dev_info[i].of_node;
  7466. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7467. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7468. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7469. NULL;
  7470. msm_codec_conf[wsa_max_devs + i].of_node =
  7471. aux_cdc_dev_info[i].of_node;
  7472. }
  7473. card->codec_conf = msm_codec_conf;
  7474. card->aux_dev = msm_aux_dev;
  7475. err:
  7476. return ret;
  7477. }
  7478. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7479. {
  7480. int count;
  7481. u32 mi2s_master_slave[MI2S_MAX];
  7482. int ret;
  7483. for (count = 0; count < MI2S_MAX; count++) {
  7484. mutex_init(&mi2s_intf_conf[count].lock);
  7485. mi2s_intf_conf[count].ref_cnt = 0;
  7486. }
  7487. ret = of_property_read_u32_array(pdev->dev.of_node,
  7488. "qcom,msm-mi2s-master",
  7489. mi2s_master_slave, MI2S_MAX);
  7490. if (ret) {
  7491. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7492. __func__);
  7493. } else {
  7494. for (count = 0; count < MI2S_MAX; count++) {
  7495. mi2s_intf_conf[count].msm_is_mi2s_master =
  7496. mi2s_master_slave[count];
  7497. }
  7498. }
  7499. }
  7500. static void msm_i2s_auxpcm_deinit(void)
  7501. {
  7502. int count;
  7503. for (count = 0; count < MI2S_MAX; count++) {
  7504. mutex_destroy(&mi2s_intf_conf[count].lock);
  7505. mi2s_intf_conf[count].ref_cnt = 0;
  7506. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7507. }
  7508. }
  7509. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7510. {
  7511. struct snd_soc_card *card;
  7512. struct msm_asoc_mach_data *pdata;
  7513. const char *mbhc_audio_jack_type = NULL;
  7514. int ret;
  7515. if (!pdev->dev.of_node) {
  7516. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7517. return -EINVAL;
  7518. }
  7519. pdata = devm_kzalloc(&pdev->dev,
  7520. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7521. if (!pdata)
  7522. return -ENOMEM;
  7523. card = populate_snd_card_dailinks(&pdev->dev);
  7524. if (!card) {
  7525. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7526. ret = -EINVAL;
  7527. goto err;
  7528. }
  7529. card->dev = &pdev->dev;
  7530. platform_set_drvdata(pdev, card);
  7531. snd_soc_card_set_drvdata(card, pdata);
  7532. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7533. if (ret) {
  7534. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7535. ret);
  7536. goto err;
  7537. }
  7538. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7539. if (ret) {
  7540. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7541. ret);
  7542. goto err;
  7543. }
  7544. ret = msm_populate_dai_link_component_of_node(card);
  7545. if (ret) {
  7546. ret = -EPROBE_DEFER;
  7547. goto err;
  7548. }
  7549. ret = msm_init_aux_dev(pdev, card);
  7550. if (ret)
  7551. goto err;
  7552. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7553. if (ret == -EPROBE_DEFER) {
  7554. if (codec_reg_done)
  7555. ret = -EINVAL;
  7556. goto err;
  7557. } else if (ret) {
  7558. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7559. ret);
  7560. goto err;
  7561. }
  7562. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7563. spdev = pdev;
  7564. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7565. "qcom,hph-en1-gpio", 0);
  7566. if (!pdata->hph_en1_gpio_p) {
  7567. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7568. "qcom,hph-en1-gpio",
  7569. pdev->dev.of_node->full_name);
  7570. }
  7571. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7572. "qcom,hph-en0-gpio", 0);
  7573. if (!pdata->hph_en0_gpio_p) {
  7574. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7575. "qcom,hph-en0-gpio",
  7576. pdev->dev.of_node->full_name);
  7577. }
  7578. ret = of_property_read_string(pdev->dev.of_node,
  7579. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7580. if (ret) {
  7581. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7582. "qcom,mbhc-audio-jack-type",
  7583. pdev->dev.of_node->full_name);
  7584. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7585. } else {
  7586. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7587. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7588. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7589. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7590. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7591. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7592. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7593. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7594. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7595. } else {
  7596. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7597. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7598. }
  7599. }
  7600. /*
  7601. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7602. * entry is not found in DT file as some targets do not support
  7603. * US-Euro detection
  7604. */
  7605. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7606. "qcom,us-euro-gpios", 0);
  7607. if (!pdata->us_euro_gpio_p) {
  7608. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7609. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7610. } else {
  7611. dev_dbg(&pdev->dev, "%s detected\n",
  7612. "qcom,us-euro-gpios");
  7613. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7614. }
  7615. /* Parse pinctrl info from devicetree */
  7616. ret = msm_get_pinctrl(pdev);
  7617. if (!ret) {
  7618. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7619. } else {
  7620. dev_dbg(&pdev->dev,
  7621. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7622. __func__, ret);
  7623. ret = 0;
  7624. }
  7625. msm_i2s_auxpcm_init(pdev);
  7626. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7627. is_initial_boot = true;
  7628. ret = audio_notifier_register("sm6150",
  7629. AUDIO_NOTIFIER_ADSP_DOMAIN,
  7630. &service_nb);
  7631. if (ret < 0)
  7632. pr_err("%s: Audio notifier register failed ret = %d\n",
  7633. __func__, ret);
  7634. } else {
  7635. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7636. "qcom,cdc-dmic01-gpios",
  7637. 0);
  7638. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7639. "qcom,cdc-dmic23-gpios",
  7640. 0);
  7641. }
  7642. err:
  7643. return ret;
  7644. }
  7645. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7646. {
  7647. audio_notifier_deregister("sm6150");
  7648. msm_i2s_auxpcm_deinit();
  7649. return 0;
  7650. }
  7651. static struct platform_driver sm6150_asoc_machine_driver = {
  7652. .driver = {
  7653. .name = DRV_NAME,
  7654. .owner = THIS_MODULE,
  7655. .pm = &snd_soc_pm_ops,
  7656. .of_match_table = sm6150_asoc_machine_of_match,
  7657. },
  7658. .probe = msm_asoc_machine_probe,
  7659. .remove = msm_asoc_machine_remove,
  7660. };
  7661. module_platform_driver(sm6150_asoc_machine_driver);
  7662. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7663. MODULE_LICENSE("GPL v2");
  7664. MODULE_ALIAS("platform:" DRV_NAME);
  7665. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);