main.c 146 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define MAX_NAME_LEN 12
  62. #define CNSS_QUIRKS_DEFAULT 0
  63. #ifdef CONFIG_CNSS_EMULATION
  64. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  65. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  66. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  67. #else
  68. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  69. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  70. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  71. #endif
  72. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  73. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  74. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  76. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  77. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  78. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  79. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  80. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  81. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  82. enum cnss_cal_db_op {
  83. CNSS_CAL_DB_UPLOAD,
  84. CNSS_CAL_DB_DOWNLOAD,
  85. CNSS_CAL_DB_INVALID_OP,
  86. };
  87. enum cnss_recovery_type {
  88. CNSS_WLAN_RECOVERY = 0x1,
  89. CNSS_PCSS_RECOVERY = 0x2,
  90. };
  91. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  92. #define CNSS_MAX_DEV_NUM 2
  93. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  94. static int plat_env_count;
  95. #else
  96. static struct cnss_plat_data *plat_env;
  97. #endif
  98. static bool cnss_allow_driver_loading;
  99. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  100. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  101. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  102. };
  103. static struct cnss_fw_files FW_FILES_DEFAULT = {
  104. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  105. "utfbd.bin", "epping.bin", "evicted.bin"
  106. };
  107. struct cnss_driver_event {
  108. struct list_head list;
  109. enum cnss_driver_event_type type;
  110. bool sync;
  111. struct completion complete;
  112. int ret;
  113. void *data;
  114. };
  115. bool cnss_check_driver_loading_allowed(void)
  116. {
  117. return cnss_allow_driver_loading;
  118. }
  119. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  120. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  121. struct cnss_plat_data *plat_priv)
  122. {
  123. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  124. if (plat_priv) {
  125. plat_priv->plat_idx = plat_env_count;
  126. plat_env[plat_priv->plat_idx] = plat_priv;
  127. plat_env_count++;
  128. }
  129. }
  130. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  131. *plat_dev)
  132. {
  133. int i;
  134. if (!plat_dev)
  135. return NULL;
  136. for (i = 0; i < plat_env_count; i++) {
  137. if (plat_env[i]->plat_dev == plat_dev)
  138. return plat_env[i];
  139. }
  140. return NULL;
  141. }
  142. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  143. *plat_dev)
  144. {
  145. int i;
  146. if (!plat_dev) {
  147. for (i = 0; i < plat_env_count; i++) {
  148. if (plat_env[i])
  149. return plat_env[i];
  150. }
  151. }
  152. return NULL;
  153. }
  154. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  155. {
  156. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  157. plat_env[plat_priv->plat_idx] = NULL;
  158. plat_env_count--;
  159. }
  160. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  161. {
  162. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  163. "wlan_%d", plat_priv->plat_idx);
  164. return 0;
  165. }
  166. static int cnss_plat_env_available(void)
  167. {
  168. int ret = 0;
  169. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  170. cnss_pr_err("ERROR: No space to store plat_priv\n");
  171. ret = -ENOMEM;
  172. }
  173. return ret;
  174. }
  175. int cnss_get_plat_env_count(void)
  176. {
  177. return plat_env_count;
  178. }
  179. struct cnss_plat_data *cnss_get_plat_env(int index)
  180. {
  181. return plat_env[index];
  182. }
  183. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  184. {
  185. int i;
  186. for (i = 0; i < plat_env_count; i++) {
  187. if (plat_env[i]->rc_num == rc_num)
  188. return plat_env[i];
  189. }
  190. return NULL;
  191. }
  192. static inline int
  193. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  194. {
  195. return of_property_read_u32(plat_priv->dev_node,
  196. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  197. }
  198. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  199. {
  200. int ret = 0;
  201. ret = cnss_get_qrtr_node_id(plat_priv);
  202. if (ret) {
  203. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  204. plat_priv->qrtr_node_id = 0;
  205. plat_priv->wlfw_service_instance_id = 0;
  206. } else {
  207. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  208. QRTR_NODE_FW_ID_BASE;
  209. cnss_pr_dbg("service_instance_id=0x%x\n",
  210. plat_priv->wlfw_service_instance_id);
  211. }
  212. }
  213. static inline int
  214. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  215. {
  216. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  217. "qcom,pld_bus_ops_name",
  218. &plat_priv->pld_bus_ops_name);
  219. }
  220. #else
  221. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  222. struct cnss_plat_data *plat_priv)
  223. {
  224. plat_env = plat_priv;
  225. }
  226. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  227. {
  228. return plat_env;
  229. }
  230. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  231. {
  232. plat_env = NULL;
  233. }
  234. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  235. {
  236. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  237. "wlan");
  238. return 0;
  239. }
  240. static int cnss_plat_env_available(void)
  241. {
  242. return 0;
  243. }
  244. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  245. {
  246. return cnss_bus_dev_to_plat_priv(NULL);
  247. }
  248. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  249. {
  250. }
  251. static int
  252. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  253. {
  254. return 0;
  255. }
  256. #endif
  257. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  258. {
  259. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  260. "qcom,sleep-clk-support");
  261. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  262. plat_priv->sleep_clk);
  263. }
  264. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  265. {
  266. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  267. "qcom,no-bwscale");
  268. }
  269. static inline int
  270. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  271. {
  272. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  273. "qcom,wlan-rc-num", &plat_priv->rc_num);
  274. }
  275. bool cnss_is_dual_wlan_enabled(void)
  276. {
  277. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  278. }
  279. /**
  280. * cnss_get_mem_seg_count - Get segment count of memory
  281. * @type: memory type
  282. * @seg: segment count
  283. *
  284. * Return: 0 on success, negative value on failure
  285. */
  286. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  287. {
  288. struct cnss_plat_data *plat_priv;
  289. plat_priv = cnss_get_plat_priv(NULL);
  290. if (!plat_priv)
  291. return -ENODEV;
  292. switch (type) {
  293. case CNSS_REMOTE_MEM_TYPE_FW:
  294. *seg = plat_priv->fw_mem_seg_len;
  295. break;
  296. case CNSS_REMOTE_MEM_TYPE_QDSS:
  297. *seg = plat_priv->qdss_mem_seg_len;
  298. break;
  299. default:
  300. return -EINVAL;
  301. }
  302. return 0;
  303. }
  304. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  305. /**
  306. * cnss_get_wifi_kobject -return wifi kobject
  307. * Return: Null, to maintain driver comnpatibilty
  308. */
  309. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  310. {
  311. struct cnss_plat_data *plat_priv;
  312. plat_priv = cnss_get_plat_priv(NULL);
  313. if (!plat_priv)
  314. return NULL;
  315. return plat_priv->wifi_kobj;
  316. }
  317. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  318. /**
  319. * cnss_get_mem_segment_info - Get memory info of different type
  320. * @type: memory type
  321. * @segment: array to save the segment info
  322. * @seg: segment count
  323. *
  324. * Return: 0 on success, negative value on failure
  325. */
  326. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  327. struct cnss_mem_segment segment[],
  328. u32 segment_count)
  329. {
  330. struct cnss_plat_data *plat_priv;
  331. u32 i;
  332. plat_priv = cnss_get_plat_priv(NULL);
  333. if (!plat_priv)
  334. return -ENODEV;
  335. switch (type) {
  336. case CNSS_REMOTE_MEM_TYPE_FW:
  337. if (segment_count > plat_priv->fw_mem_seg_len)
  338. segment_count = plat_priv->fw_mem_seg_len;
  339. for (i = 0; i < segment_count; i++) {
  340. segment[i].size = plat_priv->fw_mem[i].size;
  341. segment[i].va = plat_priv->fw_mem[i].va;
  342. segment[i].pa = plat_priv->fw_mem[i].pa;
  343. }
  344. break;
  345. case CNSS_REMOTE_MEM_TYPE_QDSS:
  346. if (segment_count > plat_priv->qdss_mem_seg_len)
  347. segment_count = plat_priv->qdss_mem_seg_len;
  348. for (i = 0; i < segment_count; i++) {
  349. segment[i].size = plat_priv->qdss_mem[i].size;
  350. segment[i].va = plat_priv->qdss_mem[i].va;
  351. segment[i].pa = plat_priv->qdss_mem[i].pa;
  352. }
  353. break;
  354. default:
  355. return -EINVAL;
  356. }
  357. return 0;
  358. }
  359. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  360. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  361. {
  362. struct device_node *audio_ion_node;
  363. struct platform_device *audio_ion_pdev;
  364. audio_ion_node = of_find_compatible_node(NULL, NULL,
  365. "qcom,msm-audio-ion");
  366. if (!audio_ion_node) {
  367. cnss_pr_err("Unable to get Audio ion node");
  368. return -EINVAL;
  369. }
  370. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  371. of_node_put(audio_ion_node);
  372. if (!audio_ion_pdev) {
  373. cnss_pr_err("Unable to get Audio ion platform device");
  374. return -EINVAL;
  375. }
  376. plat_priv->audio_iommu_domain =
  377. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  378. put_device(&audio_ion_pdev->dev);
  379. if (!plat_priv->audio_iommu_domain) {
  380. cnss_pr_err("Unable to get Audio ion iommu domain");
  381. return -EINVAL;
  382. }
  383. return 0;
  384. }
  385. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  386. enum cnss_feature_v01 feature)
  387. {
  388. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  389. return -EINVAL;
  390. plat_priv->feature_list |= 1 << feature;
  391. return 0;
  392. }
  393. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  394. enum cnss_feature_v01 feature)
  395. {
  396. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  397. return -EINVAL;
  398. plat_priv->feature_list &= ~(1 << feature);
  399. return 0;
  400. }
  401. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  402. u64 *feature_list)
  403. {
  404. if (unlikely(!plat_priv))
  405. return -EINVAL;
  406. *feature_list = plat_priv->feature_list;
  407. return 0;
  408. }
  409. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  410. char *buf, const size_t buf_len)
  411. {
  412. if (unlikely(!plat_priv || !buf || !buf_len))
  413. return 0;
  414. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  415. "platform-name-required")) {
  416. struct device_node *root;
  417. root = of_find_node_by_path("/");
  418. if (root) {
  419. const char *model;
  420. size_t model_len;
  421. model = of_get_property(root, "model", NULL);
  422. if (model) {
  423. model_len = strlcpy(buf, model, buf_len);
  424. cnss_pr_dbg("Platform name: %s (%zu)\n",
  425. buf, model_len);
  426. return model_len;
  427. }
  428. }
  429. }
  430. return 0;
  431. }
  432. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  433. {
  434. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  435. return;
  436. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  437. plat_priv->driver_state,
  438. atomic_read(&plat_priv->pm_count));
  439. pm_stay_awake(&plat_priv->plat_dev->dev);
  440. }
  441. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  442. {
  443. int r = atomic_dec_return(&plat_priv->pm_count);
  444. WARN_ON(r < 0);
  445. if (r != 0)
  446. return;
  447. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  448. plat_priv->driver_state,
  449. atomic_read(&plat_priv->pm_count));
  450. pm_relax(&plat_priv->plat_dev->dev);
  451. }
  452. int cnss_get_fw_files_for_target(struct device *dev,
  453. struct cnss_fw_files *pfw_files,
  454. u32 target_type, u32 target_version)
  455. {
  456. if (!pfw_files)
  457. return -ENODEV;
  458. switch (target_version) {
  459. case QCA6174_REV3_VERSION:
  460. case QCA6174_REV3_2_VERSION:
  461. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  462. break;
  463. default:
  464. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  465. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  466. target_type, target_version);
  467. break;
  468. }
  469. return 0;
  470. }
  471. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  472. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  473. {
  474. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  475. if (!plat_priv)
  476. return -ENODEV;
  477. if (!cap)
  478. return -EINVAL;
  479. *cap = plat_priv->cap;
  480. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  481. return 0;
  482. }
  483. EXPORT_SYMBOL(cnss_get_platform_cap);
  484. /**
  485. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  486. * @dev: Device
  487. * @fw_cap: FW Capability which needs to be checked
  488. *
  489. * Return: TRUE if supported, FALSE on failure or if not supported
  490. */
  491. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  492. {
  493. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  494. bool is_supported = false;
  495. if (!plat_priv)
  496. return is_supported;
  497. if (!plat_priv->fw_caps)
  498. return is_supported;
  499. switch (fw_cap) {
  500. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  501. is_supported = !!(plat_priv->fw_caps &
  502. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  503. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  504. is_supported = false;
  505. break;
  506. case CNSS_FW_CAP_CALDB_SEG_DDR_SUPPORT:
  507. is_supported = !!(plat_priv->fw_caps &
  508. QMI_WLFW_CALDB_SEG_DDR_SUPPORT_V01);
  509. break;
  510. default:
  511. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  512. }
  513. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  514. is_supported ? "supported" : "not supported");
  515. return is_supported;
  516. }
  517. EXPORT_SYMBOL(cnss_get_fw_cap);
  518. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  519. {
  520. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  521. if (!plat_priv)
  522. return;
  523. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  524. }
  525. EXPORT_SYMBOL(cnss_request_pm_qos);
  526. void cnss_remove_pm_qos(struct device *dev)
  527. {
  528. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  529. if (!plat_priv)
  530. return;
  531. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  532. }
  533. EXPORT_SYMBOL(cnss_remove_pm_qos);
  534. int cnss_wlan_enable(struct device *dev,
  535. struct cnss_wlan_enable_cfg *config,
  536. enum cnss_driver_mode mode,
  537. const char *host_version)
  538. {
  539. int ret = 0;
  540. struct cnss_plat_data *plat_priv;
  541. if (!dev) {
  542. cnss_pr_err("Invalid dev pointer\n");
  543. return -EINVAL;
  544. }
  545. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  546. if (!plat_priv)
  547. return -ENODEV;
  548. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  549. return 0;
  550. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  551. return 0;
  552. if (!config || !host_version) {
  553. cnss_pr_err("Invalid config or host_version pointer\n");
  554. return -EINVAL;
  555. }
  556. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  557. mode, config, host_version);
  558. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  559. goto skip_cfg;
  560. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  561. config->send_msi_ce = true;
  562. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  563. if (ret)
  564. goto out;
  565. skip_cfg:
  566. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  567. out:
  568. return ret;
  569. }
  570. EXPORT_SYMBOL(cnss_wlan_enable);
  571. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  572. {
  573. int ret = 0;
  574. struct cnss_plat_data *plat_priv;
  575. if (!dev) {
  576. cnss_pr_err("Invalid dev pointer\n");
  577. return -EINVAL;
  578. }
  579. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  580. if (!plat_priv)
  581. return -ENODEV;
  582. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  583. return 0;
  584. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  585. return 0;
  586. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  587. cnss_bus_free_qdss_mem(plat_priv);
  588. return ret;
  589. }
  590. EXPORT_SYMBOL(cnss_wlan_disable);
  591. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  592. int cnss_iommu_map(struct iommu_domain *domain,
  593. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  594. {
  595. return iommu_map(domain, iova, paddr, size, prot);
  596. }
  597. #else
  598. int cnss_iommu_map(struct iommu_domain *domain,
  599. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  600. {
  601. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  602. }
  603. #endif
  604. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  605. dma_addr_t iova, size_t size)
  606. {
  607. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  608. uint32_t page_offset;
  609. if (!plat_priv)
  610. return -ENODEV;
  611. if (!plat_priv->audio_iommu_domain)
  612. return -EINVAL;
  613. page_offset = iova & (PAGE_SIZE - 1);
  614. if (page_offset + size > PAGE_SIZE)
  615. size += PAGE_SIZE;
  616. iova -= page_offset;
  617. paddr -= page_offset;
  618. return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  619. roundup(size, PAGE_SIZE), IOMMU_READ |
  620. IOMMU_WRITE | IOMMU_CACHE);
  621. }
  622. EXPORT_SYMBOL(cnss_audio_smmu_map);
  623. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  624. {
  625. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  626. uint32_t page_offset;
  627. if (!plat_priv)
  628. return;
  629. if (!plat_priv->audio_iommu_domain)
  630. return;
  631. page_offset = iova & (PAGE_SIZE - 1);
  632. if (page_offset + size > PAGE_SIZE)
  633. size += PAGE_SIZE;
  634. iova -= page_offset;
  635. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  636. roundup(size, PAGE_SIZE));
  637. }
  638. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  639. int cnss_get_fw_lpass_shared_mem(struct device *dev, dma_addr_t *iova,
  640. size_t *size)
  641. {
  642. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  643. uint8_t i;
  644. if (!plat_priv)
  645. return -EINVAL;
  646. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  647. if (plat_priv->fw_mem[i].type ==
  648. QMI_WLFW_MEM_LPASS_SHARED_V01) {
  649. *iova = plat_priv->fw_mem[i].pa;
  650. *size = plat_priv->fw_mem[i].size;
  651. return 0;
  652. }
  653. }
  654. return -EINVAL;
  655. }
  656. EXPORT_SYMBOL(cnss_get_fw_lpass_shared_mem);
  657. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  658. u32 data_len, u8 *output)
  659. {
  660. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  661. int ret = 0;
  662. if (!plat_priv) {
  663. cnss_pr_err("plat_priv is NULL!\n");
  664. return -EINVAL;
  665. }
  666. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  667. return 0;
  668. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  669. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  670. plat_priv->driver_state);
  671. ret = -EINVAL;
  672. goto out;
  673. }
  674. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  675. data_len, output);
  676. out:
  677. return ret;
  678. }
  679. EXPORT_SYMBOL(cnss_athdiag_read);
  680. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  681. u32 data_len, u8 *input)
  682. {
  683. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  684. int ret = 0;
  685. if (!plat_priv) {
  686. cnss_pr_err("plat_priv is NULL!\n");
  687. return -EINVAL;
  688. }
  689. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  690. return 0;
  691. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  692. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  693. plat_priv->driver_state);
  694. ret = -EINVAL;
  695. goto out;
  696. }
  697. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  698. data_len, input);
  699. out:
  700. return ret;
  701. }
  702. EXPORT_SYMBOL(cnss_athdiag_write);
  703. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  704. {
  705. struct cnss_plat_data *plat_priv;
  706. if (!dev) {
  707. cnss_pr_err("Invalid dev pointer\n");
  708. return -EINVAL;
  709. }
  710. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  711. if (!plat_priv)
  712. return -ENODEV;
  713. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  714. return 0;
  715. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  716. }
  717. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  718. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  719. {
  720. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  721. if (!plat_priv)
  722. return -EINVAL;
  723. if (!plat_priv->fw_pcie_gen_switch) {
  724. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  725. return -EOPNOTSUPP;
  726. }
  727. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  728. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  729. return -EINVAL;
  730. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  731. plat_priv->pcie_gen_speed = pcie_gen_speed;
  732. return 0;
  733. }
  734. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  735. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  736. {
  737. switch (plat_priv->device_id) {
  738. case PEACH_DEVICE_ID:
  739. if (!plat_priv->fw_aux_uc_support) {
  740. cnss_pr_dbg("FW does not support aux uc capability\n");
  741. return false;
  742. }
  743. break;
  744. default:
  745. cnss_pr_dbg("Host does not support aux uc capability\n");
  746. return false;
  747. }
  748. return true;
  749. }
  750. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  751. {
  752. int ret = 0;
  753. if (!plat_priv)
  754. return -ENODEV;
  755. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  756. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  757. if (ret)
  758. goto out;
  759. cnss_bus_load_tme_patch(plat_priv);
  760. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  761. WLFW_TME_LITE_PATCH_FILE_V01);
  762. if (plat_priv->hds_enabled)
  763. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  764. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  765. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  766. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  767. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  768. plat_priv->ctrl_params.bdf_type);
  769. if (ret)
  770. goto out;
  771. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  772. return 0;
  773. ret = cnss_bus_load_m3(plat_priv);
  774. if (ret)
  775. goto out;
  776. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  777. if (ret)
  778. goto out;
  779. if (cnss_is_aux_support_enabled(plat_priv)) {
  780. ret = cnss_bus_load_aux(plat_priv);
  781. if (ret)
  782. goto out;
  783. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  784. if (ret)
  785. goto out;
  786. }
  787. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  788. return 0;
  789. out:
  790. return ret;
  791. }
  792. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  793. {
  794. int ret = 0;
  795. if (!plat_priv->antenna) {
  796. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  797. if (ret)
  798. goto out;
  799. }
  800. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  801. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  802. if (ret)
  803. goto out;
  804. }
  805. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  806. if (ret)
  807. goto out;
  808. return 0;
  809. out:
  810. return ret;
  811. }
  812. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  813. {
  814. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  815. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  816. }
  817. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  818. {
  819. u32 i;
  820. int ret = 0;
  821. struct cnss_plat_ipc_daemon_config *cfg;
  822. ret = cnss_qmi_get_dms_mac(plat_priv);
  823. if (ret == 0 && plat_priv->dms.mac_valid)
  824. goto qmi_send;
  825. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  826. * Thus assert on failure to get MAC from DMS even after retries
  827. */
  828. if (plat_priv->use_nv_mac) {
  829. /* Check if Daemon says platform support DMS MAC provisioning */
  830. cfg = cnss_plat_ipc_qmi_daemon_config();
  831. if (cfg) {
  832. if (!cfg->dms_mac_addr_supported) {
  833. cnss_pr_err("DMS MAC address not supported\n");
  834. CNSS_ASSERT(0);
  835. return -EINVAL;
  836. }
  837. }
  838. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  839. if (plat_priv->dms.mac_valid)
  840. break;
  841. ret = cnss_qmi_get_dms_mac(plat_priv);
  842. if (ret == 0)
  843. break;
  844. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  845. }
  846. if (!plat_priv->dms.mac_valid) {
  847. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  848. CNSS_ASSERT(0);
  849. return -EINVAL;
  850. }
  851. }
  852. qmi_send:
  853. if (plat_priv->dms.mac_valid)
  854. ret =
  855. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  856. ARRAY_SIZE(plat_priv->dms.mac));
  857. return ret;
  858. }
  859. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  860. enum cnss_cal_db_op op, u32 *size)
  861. {
  862. int ret = 0;
  863. u32 timeout = cnss_get_timeout(plat_priv,
  864. CNSS_TIMEOUT_DAEMON_CONNECTION);
  865. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  866. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  867. if (op >= CNSS_CAL_DB_INVALID_OP)
  868. return -EINVAL;
  869. if (!plat_priv->cbc_file_download) {
  870. cnss_pr_info("CAL DB file not required as per BDF\n");
  871. return 0;
  872. }
  873. if (*size == 0) {
  874. cnss_pr_err("Invalid cal file size\n");
  875. return -EINVAL;
  876. }
  877. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  878. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  879. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  880. msecs_to_jiffies(timeout));
  881. if (!ret) {
  882. cnss_pr_err("Daemon not yet connected\n");
  883. CNSS_ASSERT(0);
  884. return ret;
  885. }
  886. }
  887. if (!plat_priv->cal_mem->va) {
  888. cnss_pr_err("CAL DB Memory not setup for FW\n");
  889. return -EINVAL;
  890. }
  891. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  892. if (op == CNSS_CAL_DB_DOWNLOAD) {
  893. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  894. ret = cnss_plat_ipc_qmi_file_download(client_id,
  895. CNSS_CAL_DB_FILE_NAME,
  896. plat_priv->cal_mem->va,
  897. size);
  898. } else {
  899. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  900. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  901. CNSS_CAL_DB_FILE_NAME,
  902. plat_priv->cal_mem->va,
  903. *size);
  904. }
  905. if (ret)
  906. cnss_pr_err("Cal DB file %s %s failure\n",
  907. CNSS_CAL_DB_FILE_NAME,
  908. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  909. else
  910. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  911. CNSS_CAL_DB_FILE_NAME,
  912. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  913. *size);
  914. return ret;
  915. }
  916. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  917. {
  918. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  919. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  920. return -EINVAL;
  921. }
  922. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  923. &plat_priv->cal_file_size);
  924. }
  925. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  926. u32 *cal_file_size)
  927. {
  928. /* To download pass the total size of cal DB mem allocated.
  929. * After cal file is download to mem, its size is updated in
  930. * return pointer
  931. */
  932. *cal_file_size = plat_priv->cal_mem->size;
  933. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  934. cal_file_size);
  935. }
  936. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  937. {
  938. int ret = 0;
  939. u32 cal_file_size = 0;
  940. if (!plat_priv)
  941. return -ENODEV;
  942. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  943. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  944. return -EINVAL;
  945. }
  946. cnss_pr_dbg("Processing FW Init Done..\n");
  947. del_timer(&plat_priv->fw_boot_timer);
  948. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  949. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  950. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  951. cnss_send_subsys_restart_level_msg(plat_priv);
  952. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  953. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  954. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  955. }
  956. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  957. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  958. CNSS_WALTEST);
  959. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  960. cnss_request_antenna_sharing(plat_priv);
  961. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  962. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  963. plat_priv->cal_time = jiffies;
  964. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  965. CNSS_CALIBRATION);
  966. } else {
  967. ret = cnss_setup_dms_mac(plat_priv);
  968. ret = cnss_bus_call_driver_probe(plat_priv);
  969. }
  970. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  971. goto out;
  972. else if (ret)
  973. goto shutdown;
  974. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  975. return 0;
  976. shutdown:
  977. cnss_bus_dev_shutdown(plat_priv);
  978. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  979. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  980. out:
  981. return ret;
  982. }
  983. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  984. {
  985. switch (type) {
  986. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  987. return "SERVER_ARRIVE";
  988. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  989. return "SERVER_EXIT";
  990. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  991. return "REQUEST_MEM";
  992. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  993. return "FW_MEM_READY";
  994. case CNSS_DRIVER_EVENT_FW_READY:
  995. return "FW_READY";
  996. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  997. return "COLD_BOOT_CAL_START";
  998. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  999. return "COLD_BOOT_CAL_DONE";
  1000. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1001. return "REGISTER_DRIVER";
  1002. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1003. return "UNREGISTER_DRIVER";
  1004. case CNSS_DRIVER_EVENT_RECOVERY:
  1005. return "RECOVERY";
  1006. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1007. return "FORCE_FW_ASSERT";
  1008. case CNSS_DRIVER_EVENT_POWER_UP:
  1009. return "POWER_UP";
  1010. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1011. return "POWER_DOWN";
  1012. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1013. return "IDLE_RESTART";
  1014. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1015. return "IDLE_SHUTDOWN";
  1016. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1017. return "IMS_WFC_CALL_IND";
  1018. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1019. return "WLFW_TWC_CFG_IND";
  1020. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1021. return "QDSS_TRACE_REQ_MEM";
  1022. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1023. return "FW_MEM_FILE_SAVE";
  1024. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1025. return "QDSS_TRACE_FREE";
  1026. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1027. return "QDSS_TRACE_REQ_DATA";
  1028. case CNSS_DRIVER_EVENT_MAX:
  1029. return "EVENT_MAX";
  1030. }
  1031. return "UNKNOWN";
  1032. };
  1033. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  1034. enum cnss_driver_event_type type,
  1035. u32 flags, void *data)
  1036. {
  1037. struct cnss_driver_event *event;
  1038. unsigned long irq_flags;
  1039. int gfp = GFP_KERNEL;
  1040. int ret = 0;
  1041. if (!plat_priv)
  1042. return -ENODEV;
  1043. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1044. cnss_driver_event_to_str(type), type,
  1045. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1046. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1047. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1048. return -EINVAL;
  1049. }
  1050. if (in_interrupt() || irqs_disabled())
  1051. gfp = GFP_ATOMIC;
  1052. event = kzalloc(sizeof(*event), gfp);
  1053. if (!event)
  1054. return -ENOMEM;
  1055. cnss_pm_stay_awake(plat_priv);
  1056. event->type = type;
  1057. event->data = data;
  1058. init_completion(&event->complete);
  1059. event->ret = CNSS_EVENT_PENDING;
  1060. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1061. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1062. list_add_tail(&event->list, &plat_priv->event_list);
  1063. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1064. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1065. if (!(flags & CNSS_EVENT_SYNC))
  1066. goto out;
  1067. if (flags & CNSS_EVENT_UNKILLABLE)
  1068. wait_for_completion(&event->complete);
  1069. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1070. ret = wait_for_completion_killable(&event->complete);
  1071. else
  1072. ret = wait_for_completion_interruptible(&event->complete);
  1073. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1074. cnss_driver_event_to_str(type), type,
  1075. plat_priv->driver_state, ret, event->ret);
  1076. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1077. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1078. event->sync = false;
  1079. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1080. ret = -EINTR;
  1081. goto out;
  1082. }
  1083. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1084. ret = event->ret;
  1085. kfree(event);
  1086. out:
  1087. cnss_pm_relax(plat_priv);
  1088. return ret;
  1089. }
  1090. /**
  1091. * cnss_get_timeout - Get timeout for corresponding type.
  1092. * @plat_priv: Pointer to platform driver context.
  1093. * @cnss_timeout_type: Timeout type.
  1094. *
  1095. * Return: Timeout in milliseconds.
  1096. */
  1097. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1098. enum cnss_timeout_type timeout_type)
  1099. {
  1100. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1101. switch (timeout_type) {
  1102. case CNSS_TIMEOUT_QMI:
  1103. return qmi_timeout;
  1104. case CNSS_TIMEOUT_POWER_UP:
  1105. return (qmi_timeout << 2);
  1106. case CNSS_TIMEOUT_IDLE_RESTART:
  1107. /* In idle restart power up sequence, we have fw_boot_timer to
  1108. * handle FW initialization failure.
  1109. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1110. * account for FW dump collection and FW re-initialization on
  1111. * retry.
  1112. */
  1113. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1114. case CNSS_TIMEOUT_CALIBRATION:
  1115. /* Similar to mission mode, in CBC if FW init fails
  1116. * fw recovery is tried. Thus return 2x the CBC timeout.
  1117. */
  1118. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1119. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1120. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1121. case CNSS_TIMEOUT_RDDM:
  1122. return CNSS_RDDM_TIMEOUT_MS;
  1123. case CNSS_TIMEOUT_RECOVERY:
  1124. return RECOVERY_TIMEOUT;
  1125. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1126. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1127. default:
  1128. return qmi_timeout;
  1129. }
  1130. }
  1131. unsigned int cnss_get_boot_timeout(struct device *dev)
  1132. {
  1133. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1134. if (!plat_priv) {
  1135. cnss_pr_err("plat_priv is NULL\n");
  1136. return 0;
  1137. }
  1138. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1139. }
  1140. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1141. int cnss_power_up(struct device *dev)
  1142. {
  1143. int ret = 0;
  1144. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1145. unsigned int timeout;
  1146. if (!plat_priv) {
  1147. cnss_pr_err("plat_priv is NULL\n");
  1148. return -ENODEV;
  1149. }
  1150. cnss_pr_dbg("Powering up device\n");
  1151. ret = cnss_driver_event_post(plat_priv,
  1152. CNSS_DRIVER_EVENT_POWER_UP,
  1153. CNSS_EVENT_SYNC, NULL);
  1154. if (ret)
  1155. goto out;
  1156. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1157. goto out;
  1158. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1159. reinit_completion(&plat_priv->power_up_complete);
  1160. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1161. msecs_to_jiffies(timeout));
  1162. if (!ret) {
  1163. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1164. timeout);
  1165. ret = -EAGAIN;
  1166. goto out;
  1167. }
  1168. return 0;
  1169. out:
  1170. return ret;
  1171. }
  1172. EXPORT_SYMBOL(cnss_power_up);
  1173. int cnss_power_down(struct device *dev)
  1174. {
  1175. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1176. if (!plat_priv) {
  1177. cnss_pr_err("plat_priv is NULL\n");
  1178. return -ENODEV;
  1179. }
  1180. cnss_pr_dbg("Powering down device\n");
  1181. return cnss_driver_event_post(plat_priv,
  1182. CNSS_DRIVER_EVENT_POWER_DOWN,
  1183. CNSS_EVENT_SYNC, NULL);
  1184. }
  1185. EXPORT_SYMBOL(cnss_power_down);
  1186. int cnss_idle_restart(struct device *dev)
  1187. {
  1188. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1189. unsigned int timeout;
  1190. int ret = 0;
  1191. if (!plat_priv) {
  1192. cnss_pr_err("plat_priv is NULL\n");
  1193. return -ENODEV;
  1194. }
  1195. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1196. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1197. return -EBUSY;
  1198. }
  1199. cnss_pr_dbg("Doing idle restart\n");
  1200. reinit_completion(&plat_priv->power_up_complete);
  1201. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1202. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1203. ret = -EINVAL;
  1204. goto out;
  1205. }
  1206. ret = cnss_driver_event_post(plat_priv,
  1207. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1208. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1209. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1210. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1211. else if (ret)
  1212. goto out;
  1213. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1214. ret = cnss_bus_call_driver_probe(plat_priv);
  1215. goto out;
  1216. }
  1217. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1218. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1219. msecs_to_jiffies(timeout));
  1220. if (plat_priv->power_up_error) {
  1221. ret = plat_priv->power_up_error;
  1222. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1223. cnss_pr_dbg("Power up error:%d, exiting\n",
  1224. plat_priv->power_up_error);
  1225. goto out;
  1226. }
  1227. if (!ret) {
  1228. /* This exception occurs after attempting retry of FW recovery.
  1229. * Thus we can safely power off the device.
  1230. */
  1231. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1232. timeout);
  1233. ret = -ETIMEDOUT;
  1234. cnss_power_down(dev);
  1235. CNSS_ASSERT(0);
  1236. goto out;
  1237. }
  1238. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1239. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1240. del_timer(&plat_priv->fw_boot_timer);
  1241. ret = -EINVAL;
  1242. goto out;
  1243. }
  1244. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1245. * non-DRV is supported only once after device reboots and before wifi
  1246. * is turned on. We do not allow switching back to DRV.
  1247. * To bring device back into DRV, user needs to reboot device.
  1248. */
  1249. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1250. cnss_pr_dbg("DRV is disabled\n");
  1251. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1252. }
  1253. mutex_unlock(&plat_priv->driver_ops_lock);
  1254. return 0;
  1255. out:
  1256. mutex_unlock(&plat_priv->driver_ops_lock);
  1257. return ret;
  1258. }
  1259. EXPORT_SYMBOL(cnss_idle_restart);
  1260. int cnss_idle_shutdown(struct device *dev)
  1261. {
  1262. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1263. if (!plat_priv) {
  1264. cnss_pr_err("plat_priv is NULL\n");
  1265. return -ENODEV;
  1266. }
  1267. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1268. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1269. return -EAGAIN;
  1270. }
  1271. cnss_pr_dbg("Doing idle shutdown\n");
  1272. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1273. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1274. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1275. return -EBUSY;
  1276. }
  1277. return cnss_driver_event_post(plat_priv,
  1278. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1279. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1280. }
  1281. EXPORT_SYMBOL(cnss_idle_shutdown);
  1282. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1283. {
  1284. int ret = 0;
  1285. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1286. if (ret < 0) {
  1287. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1288. goto out;
  1289. }
  1290. ret = cnss_get_clk(plat_priv);
  1291. if (ret) {
  1292. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1293. goto put_vreg;
  1294. }
  1295. ret = cnss_get_pinctrl(plat_priv);
  1296. if (ret) {
  1297. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1298. goto put_clk;
  1299. }
  1300. return 0;
  1301. put_clk:
  1302. cnss_put_clk(plat_priv);
  1303. put_vreg:
  1304. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1305. out:
  1306. return ret;
  1307. }
  1308. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1309. {
  1310. cnss_put_clk(plat_priv);
  1311. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1312. }
  1313. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1314. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1315. unsigned long code,
  1316. void *ss_handle)
  1317. {
  1318. struct cnss_plat_data *plat_priv =
  1319. container_of(nb, struct cnss_plat_data, modem_nb);
  1320. struct cnss_esoc_info *esoc_info;
  1321. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1322. if (!plat_priv)
  1323. return NOTIFY_DONE;
  1324. esoc_info = &plat_priv->esoc_info;
  1325. if (code == SUBSYS_AFTER_POWERUP)
  1326. esoc_info->modem_current_status = 1;
  1327. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1328. esoc_info->modem_current_status = 0;
  1329. else
  1330. return NOTIFY_DONE;
  1331. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1332. esoc_info->modem_current_status))
  1333. return NOTIFY_DONE;
  1334. return NOTIFY_OK;
  1335. }
  1336. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1337. {
  1338. int ret = 0;
  1339. struct device *dev;
  1340. struct cnss_esoc_info *esoc_info;
  1341. struct esoc_desc *esoc_desc;
  1342. const char *client_desc;
  1343. dev = &plat_priv->plat_dev->dev;
  1344. esoc_info = &plat_priv->esoc_info;
  1345. esoc_info->notify_modem_status =
  1346. of_property_read_bool(dev->of_node,
  1347. "qcom,notify-modem-status");
  1348. if (!esoc_info->notify_modem_status)
  1349. goto out;
  1350. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1351. &client_desc);
  1352. if (ret) {
  1353. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1354. } else {
  1355. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1356. if (IS_ERR_OR_NULL(esoc_desc)) {
  1357. ret = PTR_RET(esoc_desc);
  1358. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1359. ret);
  1360. goto out;
  1361. }
  1362. esoc_info->esoc_desc = esoc_desc;
  1363. }
  1364. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1365. esoc_info->modem_current_status = 0;
  1366. esoc_info->modem_notify_handler =
  1367. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1368. esoc_info->esoc_desc->name :
  1369. "modem", &plat_priv->modem_nb);
  1370. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1371. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1372. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1373. ret);
  1374. goto unreg_esoc;
  1375. }
  1376. return 0;
  1377. unreg_esoc:
  1378. if (esoc_info->esoc_desc)
  1379. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1380. out:
  1381. return ret;
  1382. }
  1383. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1384. {
  1385. struct device *dev;
  1386. struct cnss_esoc_info *esoc_info;
  1387. dev = &plat_priv->plat_dev->dev;
  1388. esoc_info = &plat_priv->esoc_info;
  1389. if (esoc_info->notify_modem_status)
  1390. subsys_notif_unregister_notifier
  1391. (esoc_info->modem_notify_handler,
  1392. &plat_priv->modem_nb);
  1393. if (esoc_info->esoc_desc)
  1394. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1395. }
  1396. #else
  1397. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1398. {
  1399. return 0;
  1400. }
  1401. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1402. #endif
  1403. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1404. {
  1405. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1406. int ret = 0;
  1407. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1408. return 0;
  1409. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1410. if (ret)
  1411. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1412. ret);
  1413. return ret;
  1414. }
  1415. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1416. {
  1417. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1418. int ret = 0;
  1419. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1420. return 0;
  1421. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1422. if (ret)
  1423. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1424. ret);
  1425. return ret;
  1426. }
  1427. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1428. {
  1429. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1430. if (sol_gpio->dev_sol_gpio < 0)
  1431. return -EINVAL;
  1432. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1433. }
  1434. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1435. {
  1436. struct cnss_plat_data *plat_priv = data;
  1437. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1438. if (test_bit(CNSS_POWER_OFF, &plat_priv->driver_state)) {
  1439. cnss_pr_dbg("Ignore Dev SOL during device power off");
  1440. return IRQ_HANDLED;
  1441. }
  1442. sol_gpio->dev_sol_counter++;
  1443. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u, dev_sol_val: %d\n",
  1444. irq, sol_gpio->dev_sol_counter,
  1445. cnss_get_dev_sol_value(plat_priv));
  1446. /* Make sure abort current suspend */
  1447. cnss_pm_stay_awake(plat_priv);
  1448. cnss_pm_relax(plat_priv);
  1449. pm_system_wakeup();
  1450. cnss_bus_handle_dev_sol_irq(plat_priv);
  1451. return IRQ_HANDLED;
  1452. }
  1453. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1454. {
  1455. struct device *dev = &plat_priv->plat_dev->dev;
  1456. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1457. int ret = 0;
  1458. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1459. "wlan-dev-sol-gpio", 0);
  1460. if (sol_gpio->dev_sol_gpio < 0)
  1461. goto out;
  1462. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1463. sol_gpio->dev_sol_gpio);
  1464. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1465. if (ret) {
  1466. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1467. ret);
  1468. goto out;
  1469. }
  1470. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1471. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1472. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1473. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1474. if (ret) {
  1475. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1476. goto free_gpio;
  1477. }
  1478. return 0;
  1479. free_gpio:
  1480. gpio_free(sol_gpio->dev_sol_gpio);
  1481. out:
  1482. return ret;
  1483. }
  1484. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1485. {
  1486. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1487. if (sol_gpio->dev_sol_gpio < 0)
  1488. return;
  1489. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1490. gpio_free(sol_gpio->dev_sol_gpio);
  1491. }
  1492. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1493. {
  1494. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1495. if (sol_gpio->host_sol_gpio < 0)
  1496. return -EINVAL;
  1497. if (value)
  1498. cnss_pr_dbg("Assert host SOL GPIO\n");
  1499. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1500. return 0;
  1501. }
  1502. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1503. {
  1504. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1505. if (sol_gpio->host_sol_gpio < 0)
  1506. return -EINVAL;
  1507. return gpio_get_value(sol_gpio->host_sol_gpio);
  1508. }
  1509. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1510. {
  1511. struct device *dev = &plat_priv->plat_dev->dev;
  1512. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1513. int ret = 0;
  1514. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1515. "wlan-host-sol-gpio", 0);
  1516. if (sol_gpio->host_sol_gpio < 0)
  1517. goto out;
  1518. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1519. sol_gpio->host_sol_gpio);
  1520. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1521. if (ret) {
  1522. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1523. ret);
  1524. goto out;
  1525. }
  1526. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1527. return 0;
  1528. out:
  1529. return ret;
  1530. }
  1531. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1532. {
  1533. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1534. if (sol_gpio->host_sol_gpio < 0)
  1535. return;
  1536. gpio_free(sol_gpio->host_sol_gpio);
  1537. }
  1538. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1539. {
  1540. int ret;
  1541. ret = cnss_init_dev_sol_gpio(plat_priv);
  1542. if (ret)
  1543. goto out;
  1544. ret = cnss_init_host_sol_gpio(plat_priv);
  1545. if (ret)
  1546. goto deinit_dev_sol;
  1547. return 0;
  1548. deinit_dev_sol:
  1549. cnss_deinit_dev_sol_gpio(plat_priv);
  1550. out:
  1551. return ret;
  1552. }
  1553. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1554. {
  1555. cnss_deinit_host_sol_gpio(plat_priv);
  1556. cnss_deinit_dev_sol_gpio(plat_priv);
  1557. }
  1558. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1559. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1560. {
  1561. struct cnss_plat_data *plat_priv;
  1562. int ret = 0;
  1563. if (!subsys_desc->dev) {
  1564. cnss_pr_err("dev from subsys_desc is NULL\n");
  1565. return -ENODEV;
  1566. }
  1567. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1568. if (!plat_priv) {
  1569. cnss_pr_err("plat_priv is NULL\n");
  1570. return -ENODEV;
  1571. }
  1572. if (!plat_priv->driver_state) {
  1573. cnss_pr_dbg("subsys powerup is ignored\n");
  1574. return 0;
  1575. }
  1576. ret = cnss_bus_dev_powerup(plat_priv);
  1577. if (ret)
  1578. __pm_relax(plat_priv->recovery_ws);
  1579. return ret;
  1580. }
  1581. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1582. bool force_stop)
  1583. {
  1584. struct cnss_plat_data *plat_priv;
  1585. if (!subsys_desc->dev) {
  1586. cnss_pr_err("dev from subsys_desc is NULL\n");
  1587. return -ENODEV;
  1588. }
  1589. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1590. if (!plat_priv) {
  1591. cnss_pr_err("plat_priv is NULL\n");
  1592. return -ENODEV;
  1593. }
  1594. if (!plat_priv->driver_state) {
  1595. cnss_pr_dbg("subsys shutdown is ignored\n");
  1596. return 0;
  1597. }
  1598. return cnss_bus_dev_shutdown(plat_priv);
  1599. }
  1600. void cnss_device_crashed(struct device *dev)
  1601. {
  1602. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1603. struct cnss_subsys_info *subsys_info;
  1604. if (!plat_priv)
  1605. return;
  1606. subsys_info = &plat_priv->subsys_info;
  1607. if (subsys_info->subsys_device) {
  1608. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1609. subsys_set_crash_status(subsys_info->subsys_device, true);
  1610. subsystem_restart_dev(subsys_info->subsys_device);
  1611. }
  1612. }
  1613. EXPORT_SYMBOL(cnss_device_crashed);
  1614. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1615. {
  1616. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1617. if (!plat_priv) {
  1618. cnss_pr_err("plat_priv is NULL\n");
  1619. return;
  1620. }
  1621. cnss_bus_dev_crash_shutdown(plat_priv);
  1622. }
  1623. static int cnss_subsys_ramdump(int enable,
  1624. const struct subsys_desc *subsys_desc)
  1625. {
  1626. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1627. if (!plat_priv) {
  1628. cnss_pr_err("plat_priv is NULL\n");
  1629. return -ENODEV;
  1630. }
  1631. if (!enable)
  1632. return 0;
  1633. return cnss_bus_dev_ramdump(plat_priv);
  1634. }
  1635. static void cnss_recovery_work_handler(struct work_struct *work)
  1636. {
  1637. }
  1638. #else
  1639. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1640. {
  1641. int ret;
  1642. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1643. if (!plat_priv->recovery_enabled)
  1644. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1645. cnss_bus_dev_shutdown(plat_priv);
  1646. cnss_bus_dev_ramdump(plat_priv);
  1647. /* If recovery is triggered before Host driver registration,
  1648. * avoid device power up because eventually device will be
  1649. * power up as part of driver registration.
  1650. */
  1651. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1652. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1653. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1654. plat_priv->driver_state);
  1655. return;
  1656. }
  1657. msleep(POWER_RESET_MIN_DELAY_MS);
  1658. ret = cnss_bus_dev_powerup(plat_priv);
  1659. if (ret) {
  1660. __pm_relax(plat_priv->recovery_ws);
  1661. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1662. }
  1663. return;
  1664. }
  1665. static void cnss_recovery_work_handler(struct work_struct *work)
  1666. {
  1667. struct cnss_plat_data *plat_priv =
  1668. container_of(work, struct cnss_plat_data, recovery_work);
  1669. cnss_recovery_handler(plat_priv);
  1670. }
  1671. void cnss_device_crashed(struct device *dev)
  1672. {
  1673. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1674. if (!plat_priv)
  1675. return;
  1676. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1677. schedule_work(&plat_priv->recovery_work);
  1678. }
  1679. EXPORT_SYMBOL(cnss_device_crashed);
  1680. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1681. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1682. {
  1683. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1684. struct cnss_ramdump_info *ramdump_info;
  1685. if (!plat_priv)
  1686. return NULL;
  1687. ramdump_info = &plat_priv->ramdump_info;
  1688. *size = ramdump_info->ramdump_size;
  1689. return ramdump_info->ramdump_va;
  1690. }
  1691. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1692. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1693. {
  1694. switch (reason) {
  1695. case CNSS_REASON_DEFAULT:
  1696. return "DEFAULT";
  1697. case CNSS_REASON_LINK_DOWN:
  1698. return "LINK_DOWN";
  1699. case CNSS_REASON_RDDM:
  1700. return "RDDM";
  1701. case CNSS_REASON_TIMEOUT:
  1702. return "TIMEOUT";
  1703. }
  1704. return "UNKNOWN";
  1705. };
  1706. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1707. enum cnss_recovery_reason reason)
  1708. {
  1709. int ret;
  1710. plat_priv->recovery_count++;
  1711. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1712. goto self_recovery;
  1713. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1714. cnss_pr_dbg("Skip device recovery\n");
  1715. return 0;
  1716. }
  1717. /* FW recovery sequence has multiple steps and firmware load requires
  1718. * linux PM in awake state. Thus hold the cnss wake source until
  1719. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1720. * time taken in this process.
  1721. */
  1722. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1723. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1724. true);
  1725. switch (reason) {
  1726. case CNSS_REASON_LINK_DOWN:
  1727. if (!cnss_bus_check_link_status(plat_priv)) {
  1728. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1729. return 0;
  1730. }
  1731. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1732. &plat_priv->ctrl_params.quirks))
  1733. goto self_recovery;
  1734. if (!cnss_bus_recover_link_down(plat_priv)) {
  1735. /* clear recovery bit here to avoid skipping
  1736. * the recovery work for RDDM later
  1737. */
  1738. clear_bit(CNSS_DRIVER_RECOVERY,
  1739. &plat_priv->driver_state);
  1740. return 0;
  1741. }
  1742. break;
  1743. case CNSS_REASON_RDDM:
  1744. cnss_bus_collect_dump_info(plat_priv, false);
  1745. break;
  1746. case CNSS_REASON_DEFAULT:
  1747. case CNSS_REASON_TIMEOUT:
  1748. break;
  1749. default:
  1750. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1751. cnss_recovery_reason_to_str(reason), reason);
  1752. break;
  1753. }
  1754. cnss_bus_device_crashed(plat_priv);
  1755. return 0;
  1756. self_recovery:
  1757. cnss_pr_dbg("Going for self recovery\n");
  1758. cnss_bus_dev_shutdown(plat_priv);
  1759. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1760. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1761. &plat_priv->ctrl_params.quirks);
  1762. /* If link down self recovery is triggered before Host driver
  1763. * registration, avoid device power up because eventually device
  1764. * will be power up as part of driver registration.
  1765. */
  1766. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1767. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1768. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1769. plat_priv->driver_state);
  1770. return 0;
  1771. }
  1772. ret = cnss_bus_dev_powerup(plat_priv);
  1773. if (ret)
  1774. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1775. return 0;
  1776. }
  1777. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1778. void *data)
  1779. {
  1780. struct cnss_recovery_data *recovery_data = data;
  1781. int ret = 0;
  1782. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1783. cnss_recovery_reason_to_str(recovery_data->reason),
  1784. recovery_data->reason);
  1785. if (!plat_priv->driver_state) {
  1786. cnss_pr_err("Improper driver state, ignore recovery\n");
  1787. ret = -EINVAL;
  1788. goto out;
  1789. }
  1790. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1791. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1792. ret = -EINVAL;
  1793. goto out;
  1794. }
  1795. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1796. cnss_pr_err("Recovery is already in progress\n");
  1797. CNSS_ASSERT(0);
  1798. ret = -EINVAL;
  1799. goto out;
  1800. }
  1801. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1802. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1803. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1804. ret = -EINVAL;
  1805. goto out;
  1806. }
  1807. switch (plat_priv->device_id) {
  1808. case QCA6174_DEVICE_ID:
  1809. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1810. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1811. &plat_priv->driver_state)) {
  1812. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1813. ret = -EINVAL;
  1814. goto out;
  1815. }
  1816. break;
  1817. default:
  1818. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1819. set_bit(CNSS_FW_BOOT_RECOVERY,
  1820. &plat_priv->driver_state);
  1821. }
  1822. break;
  1823. }
  1824. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1825. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1826. out:
  1827. kfree(data);
  1828. return ret;
  1829. }
  1830. int cnss_self_recovery(struct device *dev,
  1831. enum cnss_recovery_reason reason)
  1832. {
  1833. cnss_schedule_recovery(dev, reason);
  1834. return 0;
  1835. }
  1836. EXPORT_SYMBOL(cnss_self_recovery);
  1837. void cnss_schedule_recovery(struct device *dev,
  1838. enum cnss_recovery_reason reason)
  1839. {
  1840. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1841. struct cnss_recovery_data *data;
  1842. int gfp = GFP_KERNEL;
  1843. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1844. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1845. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1846. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1847. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1848. return;
  1849. }
  1850. if (in_interrupt() || irqs_disabled())
  1851. gfp = GFP_ATOMIC;
  1852. data = kzalloc(sizeof(*data), gfp);
  1853. if (!data)
  1854. return;
  1855. data->reason = reason;
  1856. cnss_driver_event_post(plat_priv,
  1857. CNSS_DRIVER_EVENT_RECOVERY,
  1858. 0, data);
  1859. }
  1860. EXPORT_SYMBOL(cnss_schedule_recovery);
  1861. int cnss_force_fw_assert(struct device *dev)
  1862. {
  1863. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1864. if (!plat_priv) {
  1865. cnss_pr_err("plat_priv is NULL\n");
  1866. return -ENODEV;
  1867. }
  1868. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1869. cnss_pr_info("Forced FW assert is not supported\n");
  1870. return -EOPNOTSUPP;
  1871. }
  1872. if (cnss_bus_is_device_down(plat_priv)) {
  1873. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1874. return 0;
  1875. }
  1876. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1877. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1878. return 0;
  1879. }
  1880. if (in_interrupt() || irqs_disabled())
  1881. cnss_driver_event_post(plat_priv,
  1882. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1883. 0, NULL);
  1884. else
  1885. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1886. return 0;
  1887. }
  1888. EXPORT_SYMBOL(cnss_force_fw_assert);
  1889. int cnss_force_collect_rddm(struct device *dev)
  1890. {
  1891. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1892. unsigned int timeout;
  1893. int ret = 0;
  1894. if (!plat_priv) {
  1895. cnss_pr_err("plat_priv is NULL\n");
  1896. return -ENODEV;
  1897. }
  1898. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1899. cnss_pr_info("Force collect rddm is not supported\n");
  1900. return -EOPNOTSUPP;
  1901. }
  1902. if (cnss_bus_is_device_down(plat_priv)) {
  1903. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1904. goto wait_rddm;
  1905. }
  1906. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1907. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1908. goto wait_rddm;
  1909. }
  1910. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1911. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1912. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1913. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1914. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1915. return 0;
  1916. }
  1917. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1918. if (ret)
  1919. return ret;
  1920. wait_rddm:
  1921. reinit_completion(&plat_priv->rddm_complete);
  1922. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1923. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1924. msecs_to_jiffies(timeout));
  1925. if (!ret) {
  1926. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1927. timeout);
  1928. ret = -ETIMEDOUT;
  1929. } else if (ret > 0) {
  1930. ret = 0;
  1931. }
  1932. return ret;
  1933. }
  1934. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1935. int cnss_qmi_send_get(struct device *dev)
  1936. {
  1937. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1938. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1939. return 0;
  1940. return cnss_bus_qmi_send_get(plat_priv);
  1941. }
  1942. EXPORT_SYMBOL(cnss_qmi_send_get);
  1943. int cnss_qmi_send_put(struct device *dev)
  1944. {
  1945. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1946. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1947. return 0;
  1948. return cnss_bus_qmi_send_put(plat_priv);
  1949. }
  1950. EXPORT_SYMBOL(cnss_qmi_send_put);
  1951. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1952. int cmd_len, void *cb_ctx,
  1953. int (*cb)(void *ctx, void *event, int event_len))
  1954. {
  1955. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1956. int ret;
  1957. if (!plat_priv)
  1958. return -ENODEV;
  1959. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1960. return -EINVAL;
  1961. plat_priv->get_info_cb = cb;
  1962. plat_priv->get_info_cb_ctx = cb_ctx;
  1963. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1964. if (ret) {
  1965. plat_priv->get_info_cb = NULL;
  1966. plat_priv->get_info_cb_ctx = NULL;
  1967. }
  1968. return ret;
  1969. }
  1970. EXPORT_SYMBOL(cnss_qmi_send);
  1971. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1972. {
  1973. int ret = 0;
  1974. u32 retry = 0, timeout;
  1975. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1976. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1977. goto out;
  1978. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1979. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1980. goto out;
  1981. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1982. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1983. goto out;
  1984. }
  1985. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1986. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1987. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1988. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1989. CNSS_ASSERT(0);
  1990. return -EINVAL;
  1991. }
  1992. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1993. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1994. break;
  1995. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1996. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1997. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1998. CNSS_ASSERT(0);
  1999. ret = -EINVAL;
  2000. goto mark_cal_fail;
  2001. }
  2002. }
  2003. switch (plat_priv->device_id) {
  2004. case QCA6290_DEVICE_ID:
  2005. case QCA6390_DEVICE_ID:
  2006. case QCA6490_DEVICE_ID:
  2007. case KIWI_DEVICE_ID:
  2008. case MANGO_DEVICE_ID:
  2009. case PEACH_DEVICE_ID:
  2010. break;
  2011. default:
  2012. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2013. plat_priv->device_id);
  2014. ret = -EINVAL;
  2015. goto mark_cal_fail;
  2016. }
  2017. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2018. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  2019. timeout = cnss_get_timeout(plat_priv,
  2020. CNSS_TIMEOUT_CALIBRATION);
  2021. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  2022. timeout / 1000);
  2023. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2024. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2025. msecs_to_jiffies(timeout));
  2026. }
  2027. reinit_completion(&plat_priv->cal_complete);
  2028. ret = cnss_bus_dev_powerup(plat_priv);
  2029. mark_cal_fail:
  2030. if (ret) {
  2031. complete(&plat_priv->cal_complete);
  2032. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2033. /* Set CBC done in driver state to mark attempt and note error
  2034. * since calibration cannot be retried at boot.
  2035. */
  2036. plat_priv->cal_done = CNSS_CAL_FAILURE;
  2037. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2038. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  2039. plat_priv->device_id == QCN7605_DEVICE_ID) {
  2040. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2041. goto out;
  2042. cnss_pr_info("Schedule WLAN driver load\n");
  2043. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2044. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2045. 0);
  2046. }
  2047. }
  2048. out:
  2049. return ret;
  2050. }
  2051. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2052. void *data)
  2053. {
  2054. struct cnss_cal_info *cal_info = data;
  2055. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2056. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2057. goto out;
  2058. switch (cal_info->cal_status) {
  2059. case CNSS_CAL_DONE:
  2060. cnss_pr_dbg("Calibration completed successfully\n");
  2061. plat_priv->cal_done = true;
  2062. break;
  2063. case CNSS_CAL_TIMEOUT:
  2064. case CNSS_CAL_FAILURE:
  2065. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2066. cal_info->cal_status);
  2067. break;
  2068. default:
  2069. cnss_pr_err("Unknown calibration status: %u\n",
  2070. cal_info->cal_status);
  2071. break;
  2072. }
  2073. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2074. cnss_bus_free_qdss_mem(plat_priv);
  2075. cnss_release_antenna_sharing(plat_priv);
  2076. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2077. goto skip_shutdown;
  2078. cnss_bus_dev_shutdown(plat_priv);
  2079. msleep(POWER_RESET_MIN_DELAY_MS);
  2080. skip_shutdown:
  2081. complete(&plat_priv->cal_complete);
  2082. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2083. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2084. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2085. cnss_cal_mem_upload_to_file(plat_priv);
  2086. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2087. goto out;
  2088. cnss_pr_dbg("Schedule WLAN driver load\n");
  2089. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2090. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2091. 0);
  2092. }
  2093. out:
  2094. kfree(data);
  2095. return 0;
  2096. }
  2097. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2098. {
  2099. int ret;
  2100. ret = cnss_bus_dev_powerup(plat_priv);
  2101. if (ret)
  2102. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2103. return ret;
  2104. }
  2105. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2106. {
  2107. cnss_bus_dev_shutdown(plat_priv);
  2108. return 0;
  2109. }
  2110. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2111. {
  2112. int ret = 0;
  2113. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2114. if (ret < 0)
  2115. return ret;
  2116. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2117. }
  2118. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2119. u32 mem_seg_len, u64 pa, u32 size)
  2120. {
  2121. int i = 0;
  2122. u64 offset = 0;
  2123. void *va = NULL;
  2124. u64 local_pa;
  2125. u32 local_size;
  2126. for (i = 0; i < mem_seg_len; i++) {
  2127. if (i == QMI_WLFW_MEM_LPASS_SHARED_V01)
  2128. continue;
  2129. local_pa = (u64)fw_mem[i].pa;
  2130. local_size = (u32)fw_mem[i].size;
  2131. if (pa == local_pa && size <= local_size) {
  2132. va = fw_mem[i].va;
  2133. break;
  2134. }
  2135. if (pa > local_pa &&
  2136. pa < local_pa + local_size &&
  2137. pa + size <= local_pa + local_size) {
  2138. offset = pa - local_pa;
  2139. va = fw_mem[i].va + offset;
  2140. break;
  2141. }
  2142. }
  2143. return va;
  2144. }
  2145. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2146. void *data)
  2147. {
  2148. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2149. struct cnss_fw_mem *fw_mem_seg;
  2150. int ret = 0L;
  2151. void *va = NULL;
  2152. u32 i, fw_mem_seg_len;
  2153. switch (event_data->mem_type) {
  2154. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2155. if (!plat_priv->fw_mem_seg_len)
  2156. goto invalid_mem_save;
  2157. fw_mem_seg = plat_priv->fw_mem;
  2158. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2159. break;
  2160. case QMI_WLFW_MEM_QDSS_V01:
  2161. if (!plat_priv->qdss_mem_seg_len)
  2162. goto invalid_mem_save;
  2163. fw_mem_seg = plat_priv->qdss_mem;
  2164. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2165. break;
  2166. default:
  2167. goto invalid_mem_save;
  2168. }
  2169. for (i = 0; i < event_data->mem_seg_len; i++) {
  2170. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2171. event_data->mem_seg[i].addr,
  2172. event_data->mem_seg[i].size);
  2173. if (!va) {
  2174. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2175. &event_data->mem_seg[i].addr,
  2176. event_data->mem_type);
  2177. ret = -EINVAL;
  2178. break;
  2179. }
  2180. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2181. event_data->file_name,
  2182. event_data->mem_seg[i].size);
  2183. if (ret < 0) {
  2184. cnss_pr_err("Fail to save fw mem data: %d\n",
  2185. ret);
  2186. break;
  2187. }
  2188. }
  2189. kfree(data);
  2190. return ret;
  2191. invalid_mem_save:
  2192. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2193. event_data->mem_type);
  2194. kfree(data);
  2195. return -EINVAL;
  2196. }
  2197. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2198. {
  2199. cnss_bus_free_qdss_mem(plat_priv);
  2200. return 0;
  2201. }
  2202. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2203. void *data)
  2204. {
  2205. int ret = 0;
  2206. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2207. if (!plat_priv)
  2208. return -ENODEV;
  2209. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2210. event_data->total_size);
  2211. kfree(data);
  2212. return ret;
  2213. }
  2214. static void cnss_driver_event_work(struct work_struct *work)
  2215. {
  2216. struct cnss_plat_data *plat_priv =
  2217. container_of(work, struct cnss_plat_data, event_work);
  2218. struct cnss_driver_event *event;
  2219. unsigned long flags;
  2220. int ret = 0;
  2221. if (!plat_priv) {
  2222. cnss_pr_err("plat_priv is NULL!\n");
  2223. return;
  2224. }
  2225. cnss_pm_stay_awake(plat_priv);
  2226. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2227. while (!list_empty(&plat_priv->event_list)) {
  2228. event = list_first_entry(&plat_priv->event_list,
  2229. struct cnss_driver_event, list);
  2230. list_del(&event->list);
  2231. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2232. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2233. cnss_driver_event_to_str(event->type),
  2234. event->sync ? "-sync" : "", event->type,
  2235. plat_priv->driver_state);
  2236. switch (event->type) {
  2237. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2238. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2239. break;
  2240. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2241. ret = cnss_wlfw_server_exit(plat_priv);
  2242. break;
  2243. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2244. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2245. if (ret)
  2246. break;
  2247. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2248. break;
  2249. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2250. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2251. break;
  2252. case CNSS_DRIVER_EVENT_FW_READY:
  2253. ret = cnss_fw_ready_hdlr(plat_priv);
  2254. break;
  2255. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2256. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2257. break;
  2258. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2259. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2260. event->data);
  2261. break;
  2262. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2263. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2264. event->data);
  2265. break;
  2266. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2267. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2268. break;
  2269. case CNSS_DRIVER_EVENT_RECOVERY:
  2270. ret = cnss_driver_recovery_hdlr(plat_priv,
  2271. event->data);
  2272. break;
  2273. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2274. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2275. break;
  2276. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2277. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2278. &plat_priv->driver_state);
  2279. fallthrough;
  2280. case CNSS_DRIVER_EVENT_POWER_UP:
  2281. ret = cnss_power_up_hdlr(plat_priv);
  2282. break;
  2283. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2284. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2285. &plat_priv->driver_state);
  2286. fallthrough;
  2287. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2288. ret = cnss_power_down_hdlr(plat_priv);
  2289. break;
  2290. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2291. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2292. event->data);
  2293. break;
  2294. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2295. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2296. event->data);
  2297. break;
  2298. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2299. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2300. break;
  2301. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2302. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2303. event->data);
  2304. break;
  2305. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2306. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2307. break;
  2308. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2309. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2310. event->data);
  2311. break;
  2312. default:
  2313. cnss_pr_err("Invalid driver event type: %d",
  2314. event->type);
  2315. kfree(event);
  2316. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2317. continue;
  2318. }
  2319. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2320. if (event->sync) {
  2321. event->ret = ret;
  2322. complete(&event->complete);
  2323. continue;
  2324. }
  2325. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2326. kfree(event);
  2327. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2328. }
  2329. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2330. cnss_pm_relax(plat_priv);
  2331. }
  2332. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2333. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2334. {
  2335. int ret = 0;
  2336. struct cnss_subsys_info *subsys_info;
  2337. subsys_info = &plat_priv->subsys_info;
  2338. subsys_info->subsys_desc.name = plat_priv->device_name;
  2339. subsys_info->subsys_desc.owner = THIS_MODULE;
  2340. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2341. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2342. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2343. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2344. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2345. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2346. if (IS_ERR(subsys_info->subsys_device)) {
  2347. ret = PTR_ERR(subsys_info->subsys_device);
  2348. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2349. goto out;
  2350. }
  2351. subsys_info->subsys_handle =
  2352. subsystem_get(subsys_info->subsys_desc.name);
  2353. if (!subsys_info->subsys_handle) {
  2354. cnss_pr_err("Failed to get subsys_handle!\n");
  2355. ret = -EINVAL;
  2356. goto unregister_subsys;
  2357. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2358. ret = PTR_ERR(subsys_info->subsys_handle);
  2359. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2360. goto unregister_subsys;
  2361. }
  2362. return 0;
  2363. unregister_subsys:
  2364. subsys_unregister(subsys_info->subsys_device);
  2365. out:
  2366. return ret;
  2367. }
  2368. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2369. {
  2370. struct cnss_subsys_info *subsys_info;
  2371. subsys_info = &plat_priv->subsys_info;
  2372. subsystem_put(subsys_info->subsys_handle);
  2373. subsys_unregister(subsys_info->subsys_device);
  2374. }
  2375. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2376. {
  2377. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2378. return create_ramdump_device(subsys_info->subsys_desc.name,
  2379. subsys_info->subsys_desc.dev);
  2380. }
  2381. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2382. void *ramdump_dev)
  2383. {
  2384. destroy_ramdump_device(ramdump_dev);
  2385. }
  2386. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2387. {
  2388. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2389. struct ramdump_segment segment;
  2390. memset(&segment, 0, sizeof(segment));
  2391. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2392. segment.size = ramdump_info->ramdump_size;
  2393. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2394. }
  2395. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2396. {
  2397. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2398. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2399. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2400. struct ramdump_segment *ramdump_segs, *s;
  2401. struct cnss_dump_meta_info meta_info = {0};
  2402. int i, ret = 0;
  2403. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2404. sizeof(*ramdump_segs),
  2405. GFP_KERNEL);
  2406. if (!ramdump_segs)
  2407. return -ENOMEM;
  2408. s = ramdump_segs + 1;
  2409. for (i = 0; i < dump_data->nentries; i++) {
  2410. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2411. cnss_pr_err("Unsupported dump type: %d",
  2412. dump_seg->type);
  2413. continue;
  2414. }
  2415. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2416. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2417. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2418. }
  2419. meta_info.entry[dump_seg->type].entry_num++;
  2420. s->address = dump_seg->address;
  2421. s->v_address = (void __iomem *)dump_seg->v_address;
  2422. s->size = dump_seg->size;
  2423. s++;
  2424. dump_seg++;
  2425. }
  2426. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2427. meta_info.version = CNSS_RAMDUMP_VERSION;
  2428. meta_info.chipset = plat_priv->device_id;
  2429. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2430. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2431. ramdump_segs->size = sizeof(meta_info);
  2432. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2433. dump_data->nentries + 1);
  2434. kfree(ramdump_segs);
  2435. return ret;
  2436. }
  2437. #else
  2438. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2439. void *data)
  2440. {
  2441. struct cnss_plat_data *plat_priv =
  2442. container_of(nb, struct cnss_plat_data, panic_nb);
  2443. cnss_bus_dev_crash_shutdown(plat_priv);
  2444. return NOTIFY_DONE;
  2445. }
  2446. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2447. {
  2448. int ret;
  2449. if (!plat_priv)
  2450. return -ENODEV;
  2451. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2452. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2453. &plat_priv->panic_nb);
  2454. if (ret) {
  2455. cnss_pr_err("Failed to register panic handler\n");
  2456. return -EINVAL;
  2457. }
  2458. return 0;
  2459. }
  2460. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2461. {
  2462. int ret;
  2463. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2464. &plat_priv->panic_nb);
  2465. if (ret)
  2466. cnss_pr_err("Failed to unregister panic handler\n");
  2467. }
  2468. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2469. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2470. {
  2471. return &plat_priv->plat_dev->dev;
  2472. }
  2473. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2474. void *ramdump_dev)
  2475. {
  2476. }
  2477. #endif
  2478. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2479. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2480. {
  2481. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2482. struct qcom_dump_segment segment;
  2483. struct list_head head;
  2484. INIT_LIST_HEAD(&head);
  2485. memset(&segment, 0, sizeof(segment));
  2486. segment.va = ramdump_info->ramdump_va;
  2487. segment.size = ramdump_info->ramdump_size;
  2488. list_add(&segment.node, &head);
  2489. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2490. }
  2491. #else
  2492. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2493. {
  2494. return 0;
  2495. }
  2496. /* Using completion event inside dynamically allocated ramdump_desc
  2497. * may result a race between freeing the event after setting it to
  2498. * complete inside dev coredump free callback and the thread that is
  2499. * waiting for completion.
  2500. */
  2501. DECLARE_COMPLETION(dump_done);
  2502. #define TIMEOUT_SAVE_DUMP_MS 30000
  2503. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2504. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2505. { \
  2506. if (class == ELFCLASS32) \
  2507. return sizeof(struct elf32_##__xhdr); \
  2508. else \
  2509. return sizeof(struct elf64_##__xhdr); \
  2510. }
  2511. SIZEOF_ELF_STRUCT(phdr)
  2512. SIZEOF_ELF_STRUCT(hdr)
  2513. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2514. do { \
  2515. if (class == ELFCLASS32) \
  2516. ((struct elf32_##__xhdr *)arg)->member = value; \
  2517. else \
  2518. ((struct elf64_##__xhdr *)arg)->member = value; \
  2519. } while (0)
  2520. #define set_ehdr_property(arg, class, member, value) \
  2521. set_xhdr_property(hdr, arg, class, member, value)
  2522. #define set_phdr_property(arg, class, member, value) \
  2523. set_xhdr_property(phdr, arg, class, member, value)
  2524. /* These replace qcom_ramdump driver APIs called from common API
  2525. * cnss_do_elf_dump() by the ones defined here.
  2526. */
  2527. #define qcom_dump_segment cnss_qcom_dump_segment
  2528. #define qcom_elf_dump cnss_qcom_elf_dump
  2529. #define dump_enabled cnss_dump_enabled
  2530. struct cnss_qcom_dump_segment {
  2531. struct list_head node;
  2532. dma_addr_t da;
  2533. void *va;
  2534. size_t size;
  2535. };
  2536. struct cnss_qcom_ramdump_desc {
  2537. void *data;
  2538. struct completion dump_done;
  2539. };
  2540. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2541. void *data, size_t datalen)
  2542. {
  2543. struct cnss_qcom_ramdump_desc *desc = data;
  2544. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2545. datalen);
  2546. }
  2547. static void cnss_qcom_devcd_freev(void *data)
  2548. {
  2549. struct cnss_qcom_ramdump_desc *desc = data;
  2550. cnss_pr_dbg("Free dump data for dev coredump\n");
  2551. complete(&dump_done);
  2552. vfree(desc->data);
  2553. kfree(desc);
  2554. }
  2555. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2556. gfp_t gfp)
  2557. {
  2558. struct cnss_qcom_ramdump_desc *desc;
  2559. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2560. int ret;
  2561. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2562. if (!desc)
  2563. return -ENOMEM;
  2564. desc->data = data;
  2565. reinit_completion(&dump_done);
  2566. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2567. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2568. ret = wait_for_completion_timeout(&dump_done,
  2569. msecs_to_jiffies(timeout));
  2570. if (!ret)
  2571. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2572. timeout);
  2573. return ret ? 0 : -ETIMEDOUT;
  2574. }
  2575. /* Since the elf32 and elf64 identification is identical apart from
  2576. * the class, use elf32 by default.
  2577. */
  2578. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2579. {
  2580. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2581. ehdr->e_ident[EI_CLASS] = class;
  2582. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2583. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2584. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2585. }
  2586. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2587. unsigned char class)
  2588. {
  2589. struct cnss_qcom_dump_segment *segment;
  2590. void *phdr, *ehdr;
  2591. size_t data_size, offset;
  2592. int phnum = 0;
  2593. void *data;
  2594. void __iomem *ptr;
  2595. if (!segs || list_empty(segs))
  2596. return -EINVAL;
  2597. data_size = sizeof_elf_hdr(class);
  2598. list_for_each_entry(segment, segs, node) {
  2599. data_size += sizeof_elf_phdr(class) + segment->size;
  2600. phnum++;
  2601. }
  2602. data = vmalloc(data_size);
  2603. if (!data)
  2604. return -ENOMEM;
  2605. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2606. ehdr = data;
  2607. memset(ehdr, 0, sizeof_elf_hdr(class));
  2608. init_elf_identification(ehdr, class);
  2609. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2610. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2611. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2612. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2613. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2614. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2615. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2616. phdr = data + sizeof_elf_hdr(class);
  2617. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2618. list_for_each_entry(segment, segs, node) {
  2619. memset(phdr, 0, sizeof_elf_phdr(class));
  2620. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2621. set_phdr_property(phdr, class, p_offset, offset);
  2622. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2623. set_phdr_property(phdr, class, p_paddr, segment->da);
  2624. set_phdr_property(phdr, class, p_filesz, segment->size);
  2625. set_phdr_property(phdr, class, p_memsz, segment->size);
  2626. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2627. set_phdr_property(phdr, class, p_align, 0);
  2628. if (segment->va) {
  2629. memcpy(data + offset, segment->va, segment->size);
  2630. } else {
  2631. ptr = devm_ioremap(dev, segment->da, segment->size);
  2632. if (!ptr) {
  2633. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2634. &segment->da, segment->size);
  2635. memset(data + offset, 0xff, segment->size);
  2636. } else {
  2637. memcpy_fromio(data + offset, ptr,
  2638. segment->size);
  2639. }
  2640. }
  2641. offset += segment->size;
  2642. phdr += sizeof_elf_phdr(class);
  2643. }
  2644. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2645. }
  2646. /* Saving dump to file system is always needed in this case. */
  2647. static bool cnss_dump_enabled(void)
  2648. {
  2649. return true;
  2650. }
  2651. #endif /* CONFIG_QCOM_RAMDUMP */
  2652. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2653. {
  2654. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2655. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2656. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2657. struct qcom_dump_segment *seg;
  2658. struct cnss_dump_meta_info meta_info = {0};
  2659. struct list_head head;
  2660. int i, ret = 0;
  2661. if (!dump_enabled()) {
  2662. cnss_pr_info("Dump collection is not enabled\n");
  2663. return ret;
  2664. }
  2665. INIT_LIST_HEAD(&head);
  2666. for (i = 0; i < dump_data->nentries; i++) {
  2667. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2668. cnss_pr_err("Unsupported dump type: %d",
  2669. dump_seg->type);
  2670. continue;
  2671. }
  2672. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2673. if (!seg) {
  2674. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2675. __func__, i);
  2676. continue;
  2677. }
  2678. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2679. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2680. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2681. }
  2682. meta_info.entry[dump_seg->type].entry_num++;
  2683. seg->da = dump_seg->address;
  2684. seg->va = dump_seg->v_address;
  2685. seg->size = dump_seg->size;
  2686. list_add_tail(&seg->node, &head);
  2687. dump_seg++;
  2688. }
  2689. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2690. if (!seg) {
  2691. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2692. __func__);
  2693. goto skip_elf_dump;
  2694. }
  2695. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2696. meta_info.version = CNSS_RAMDUMP_VERSION;
  2697. meta_info.chipset = plat_priv->device_id;
  2698. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2699. seg->va = &meta_info;
  2700. seg->size = sizeof(meta_info);
  2701. list_add(&seg->node, &head);
  2702. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2703. skip_elf_dump:
  2704. while (!list_empty(&head)) {
  2705. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2706. list_del(&seg->node);
  2707. kfree(seg);
  2708. }
  2709. return ret;
  2710. }
  2711. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2712. /**
  2713. * cnss_host_ramdump_dev_release() - callback function for device release
  2714. * @dev: device to be released
  2715. *
  2716. * Return: None
  2717. */
  2718. static void cnss_host_ramdump_dev_release(struct device *dev)
  2719. {
  2720. cnss_pr_dbg("free host ramdump device\n");
  2721. kfree(dev);
  2722. }
  2723. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2724. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2725. size_t num_entries_loaded)
  2726. {
  2727. struct qcom_dump_segment *seg;
  2728. struct cnss_host_dump_meta_info meta_info = {0};
  2729. struct list_head head;
  2730. int dev_ret = 0;
  2731. struct device *new_device;
  2732. static const char * const wlan_str[] = {
  2733. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2734. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2735. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2736. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2737. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2738. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2739. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2740. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2741. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2742. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2743. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2744. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2745. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2746. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2747. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2748. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2749. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2750. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2751. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2752. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2753. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2754. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2755. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max",
  2756. [CNSS_HOST_DP_WBM_DESC_REL] = "wbm_desc_rel_ring",
  2757. [CNSS_HOST_DP_WBM_DESC_REL_HANDLE] = "wbm_desc_rel_ring_handle",
  2758. [CNSS_HOST_DP_TCL_CMD] = "tcl_cmd_ring",
  2759. [CNSS_HOST_DP_TCL_CMD_HANDLE] = "tcl_cmd_ring_handle",
  2760. [CNSS_HOST_DP_TCL_STATUS] = "tcl_status_ring",
  2761. [CNSS_HOST_DP_TCL_STATUS_HANDLE] = "tcl_status_ring_handle",
  2762. [CNSS_HOST_DP_REO_REINJ] = "reo_reinject_ring",
  2763. [CNSS_HOST_DP_REO_REINJ_HANDLE] = "reo_reinject_ring_handle",
  2764. [CNSS_HOST_DP_RX_REL] = "rx_rel_ring",
  2765. [CNSS_HOST_DP_RX_REL_HANDLE] = "rx_rel_ring_handle",
  2766. [CNSS_HOST_DP_REO_EXP] = "reo_exception_ring",
  2767. [CNSS_HOST_DP_REO_EXP_HANDLE] = "reo_exception_ring_handle",
  2768. [CNSS_HOST_DP_REO_CMD] = "reo_cmd_ring",
  2769. [CNSS_HOST_DP_REO_CMD_HANDLE] = "reo_cmd_ring_handle",
  2770. [CNSS_HOST_DP_REO_STATUS] = "reo_status_ring",
  2771. [CNSS_HOST_DP_REO_STATUS_HANDLE] = "reo_status_ring_handle",
  2772. [CNSS_HOST_DP_TCL_DATA_0] = "tcl_data_ring_0",
  2773. [CNSS_HOST_DP_TCL_DATA_0_HANDLE] = "tcl_data_ring_0_handle",
  2774. [CNSS_HOST_DP_TX_COMP_0] = "tx_comp_ring_0",
  2775. [CNSS_HOST_DP_TX_COMP_0_HANDLE] = "tx_comp_ring_0_handle",
  2776. [CNSS_HOST_DP_TCL_DATA_1] = "tcl_data_ring_1",
  2777. [CNSS_HOST_DP_TCL_DATA_1_HANDLE] = "tcl_data_ring_1_handle",
  2778. [CNSS_HOST_DP_TX_COMP_1] = "tx_comp_ring_1",
  2779. [CNSS_HOST_DP_TX_COMP_1_HANDLE] = "tx_comp_ring_1_handle",
  2780. [CNSS_HOST_DP_TCL_DATA_2] = "tcl_data_ring_2",
  2781. [CNSS_HOST_DP_TCL_DATA_2_HANDLE] = "tcl_data_ring_2_handle",
  2782. [CNSS_HOST_DP_TX_COMP_2] = "tx_comp_ring_2",
  2783. [CNSS_HOST_DP_TX_COMP_2_HANDLE] = "tx_comp_ring_2_handle",
  2784. [CNSS_HOST_DP_REO_DST_0] = "reo_dest_ring_0",
  2785. [CNSS_HOST_DP_REO_DST_0_HANDLE] = "reo_dest_ring_0_handle",
  2786. [CNSS_HOST_DP_REO_DST_1] = "reo_dest_ring_1",
  2787. [CNSS_HOST_DP_REO_DST_1_HANDLE] = "reo_dest_ring_1_handle",
  2788. [CNSS_HOST_DP_REO_DST_2] = "reo_dest_ring_2",
  2789. [CNSS_HOST_DP_REO_DST_2_HANDLE] = "reo_dest_ring_2_handle",
  2790. [CNSS_HOST_DP_REO_DST_3] = "reo_dest_ring_3",
  2791. [CNSS_HOST_DP_REO_DST_3_HANDLE] = "reo_dest_ring_3_handle",
  2792. [CNSS_HOST_DP_REO_DST_4] = "reo_dest_ring_4",
  2793. [CNSS_HOST_DP_REO_DST_4_HANDLE] = "reo_dest_ring_4_handle",
  2794. [CNSS_HOST_DP_REO_DST_5] = "reo_dest_ring_5",
  2795. [CNSS_HOST_DP_REO_DST_5_HANDLE] = "reo_dest_ring_5_handle",
  2796. [CNSS_HOST_DP_REO_DST_6] = "reo_dest_ring_6",
  2797. [CNSS_HOST_DP_REO_DST_6_HANDLE] = "reo_dest_ring_6_handle",
  2798. [CNSS_HOST_DP_REO_DST_7] = "reo_dest_ring_7",
  2799. [CNSS_HOST_DP_REO_DST_7_HANDLE] = "reo_dest_ring_7_handle",
  2800. [CNSS_HOST_DP_PDEV_0] = "dp_pdev_0",
  2801. [CNSS_HOST_DP_WLAN_CFG_CTX] = "wlan_cfg_ctx",
  2802. [CNSS_HOST_DP_SOC] = "dp_soc",
  2803. [CNSS_HOST_HAL_RX_FST] = "hal_rx_fst",
  2804. [CNSS_HOST_DP_FISA] = "dp_fisa",
  2805. [CNSS_HOST_DP_FISA_HW_FSE_TABLE] = "dp_fisa_hw_fse_table",
  2806. [CNSS_HOST_DP_FISA_SW_FSE_TABLE] = "dp_fisa_sw_fse_table",
  2807. [CNSS_HOST_HIF] = "hif",
  2808. [CNSS_HOST_QDF_NBUF_HIST] = "qdf_nbuf_history",
  2809. [CNSS_HOST_TCL_WBM_MAP] = "tcl_wbm_map_array",
  2810. [CNSS_HOST_RX_MAC_BUF_RING_0] = "rx_mac_buf_ring_0",
  2811. [CNSS_HOST_RX_MAC_BUF_RING_0_HANDLE] = "rx_mac_buf_ring_0_handle",
  2812. [CNSS_HOST_RX_MAC_BUF_RING_1] = "rx_mac_buf_ring_1",
  2813. [CNSS_HOST_RX_MAC_BUF_RING_1_HANDLE] = "rx_mac_buf_ring_1_handle",
  2814. [CNSS_HOST_RX_REFILL_0] = "rx_refill_buf_ring_0",
  2815. [CNSS_HOST_RX_REFILL_0_HANDLE] = "rx_refill_buf_ring_0_handle",
  2816. [CNSS_HOST_CE_0] = "ce_0",
  2817. [CNSS_HOST_CE_0_SRC_RING] = "ce_0_src_ring",
  2818. [CNSS_HOST_CE_0_SRC_RING_CTX] = "ce_0_src_ring_ctx",
  2819. [CNSS_HOST_CE_1] = "ce_1",
  2820. [CNSS_HOST_CE_1_STATUS_RING] = "ce_1_status_ring",
  2821. [CNSS_HOST_CE_1_STATUS_RING_CTX] = "ce_1_status_ring_ctx",
  2822. [CNSS_HOST_CE_1_DEST_RING] = "ce_1_dest_ring",
  2823. [CNSS_HOST_CE_1_DEST_RING_CTX] = "ce_1_dest_ring_ctx",
  2824. [CNSS_HOST_CE_2] = "ce_2",
  2825. [CNSS_HOST_CE_2_STATUS_RING] = "ce_2_status_ring",
  2826. [CNSS_HOST_CE_2_STATUS_RING_CTX] = "ce_2_status_ring_ctx",
  2827. [CNSS_HOST_CE_2_DEST_RING] = "ce_2_dest_ring",
  2828. [CNSS_HOST_CE_2_DEST_RING_CTX] = "ce_2_dest_ring_ctx",
  2829. [CNSS_HOST_CE_3] = "ce_3",
  2830. [CNSS_HOST_CE_3_SRC_RING] = "ce_3_src_ring",
  2831. [CNSS_HOST_CE_3_SRC_RING_CTX] = "ce_3_src_ring_ctx",
  2832. [CNSS_HOST_CE_4] = "ce_4",
  2833. [CNSS_HOST_CE_4_SRC_RING] = "ce_4_src_ring",
  2834. [CNSS_HOST_CE_4_SRC_RING_CTX] = "ce_4_src_ring_ctx",
  2835. [CNSS_HOST_CE_5] = "ce_5",
  2836. [CNSS_HOST_CE_6] = "ce_6",
  2837. [CNSS_HOST_CE_7] = "ce_7",
  2838. [CNSS_HOST_CE_7_STATUS_RING] = "ce_7_status_ring",
  2839. [CNSS_HOST_CE_7_STATUS_RING_CTX] = "ce_7_status_ring_ctx",
  2840. [CNSS_HOST_CE_7_DEST_RING] = "ce_7_dest_ring",
  2841. [CNSS_HOST_CE_7_DEST_RING_CTX] = "ce_7_dest_ring_ctx",
  2842. [CNSS_HOST_CE_8] = "ce_8",
  2843. [CNSS_HOST_DP_TCL_DATA_3] = "tcl_data_ring_3",
  2844. [CNSS_HOST_DP_TCL_DATA_3_HANDLE] = "tcl_data_ring_3_handle",
  2845. [CNSS_HOST_DP_TX_COMP_3] = "tx_comp_ring_3",
  2846. [CNSS_HOST_DP_TX_COMP_3_HANDLE] = "tx_comp_ring_3_handle"
  2847. };
  2848. int i;
  2849. int ret = 0;
  2850. enum cnss_host_dump_type j;
  2851. if (!dump_enabled()) {
  2852. cnss_pr_info("Dump collection is not enabled\n");
  2853. return ret;
  2854. }
  2855. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2856. if (!new_device) {
  2857. cnss_pr_err("Failed to alloc device mem\n");
  2858. return -ENOMEM;
  2859. }
  2860. new_device->release = cnss_host_ramdump_dev_release;
  2861. device_initialize(new_device);
  2862. dev_set_name(new_device, "wlan_driver");
  2863. dev_ret = device_add(new_device);
  2864. if (dev_ret) {
  2865. cnss_pr_err("Failed to add new device\n");
  2866. goto put_device;
  2867. }
  2868. INIT_LIST_HEAD(&head);
  2869. for (i = 0; i < num_entries_loaded; i++) {
  2870. /* If region name registered by driver is not present in
  2871. * wlan_str. type for that entry will not be set, but entry will
  2872. * be added. Which will result in entry type being 0. Currently
  2873. * entry type 0 is for wlan_logs, which will result in parsing
  2874. * issue for wlan_logs as parsing is done based upon type field.
  2875. * So initialize type with -1(Invalid) to avoid such issues.
  2876. */
  2877. meta_info.entry[i].type = -1;
  2878. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2879. if (!seg) {
  2880. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2881. continue;
  2882. }
  2883. seg->va = ssr_entry[i].buffer_pointer;
  2884. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2885. seg->size = ssr_entry[i].buffer_size;
  2886. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2887. if (strcmp(ssr_entry[i].region_name, wlan_str[j]) == 0) {
  2888. meta_info.entry[i].type = j;
  2889. }
  2890. }
  2891. meta_info.entry[i].entry_start = i + 1;
  2892. meta_info.entry[i].entry_num++;
  2893. list_add_tail(&seg->node, &head);
  2894. }
  2895. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2896. if (!seg) {
  2897. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2898. __func__);
  2899. goto skip_host_dump;
  2900. }
  2901. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2902. meta_info.version = CNSS_RAMDUMP_VERSION;
  2903. meta_info.chipset = plat_priv->device_id;
  2904. meta_info.total_entries = num_entries_loaded;
  2905. seg->va = &meta_info;
  2906. seg->da = (dma_addr_t)&meta_info;
  2907. seg->size = sizeof(meta_info);
  2908. list_add(&seg->node, &head);
  2909. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2910. skip_host_dump:
  2911. while (!list_empty(&head)) {
  2912. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2913. list_del(&seg->node);
  2914. kfree(seg);
  2915. }
  2916. device_del(new_device);
  2917. put_device:
  2918. put_device(new_device);
  2919. cnss_pr_dbg("host ramdump result %d\n", ret);
  2920. return ret;
  2921. }
  2922. #endif
  2923. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2924. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2925. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2926. {
  2927. struct cnss_ramdump_info *ramdump_info;
  2928. struct msm_dump_entry dump_entry;
  2929. ramdump_info = &plat_priv->ramdump_info;
  2930. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2931. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2932. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2933. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2934. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2935. sizeof(ramdump_info->dump_data.name));
  2936. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2937. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2938. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2939. &dump_entry);
  2940. }
  2941. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2942. {
  2943. int ret = 0;
  2944. struct device *dev;
  2945. struct cnss_ramdump_info *ramdump_info;
  2946. u32 ramdump_size = 0;
  2947. dev = &plat_priv->plat_dev->dev;
  2948. ramdump_info = &plat_priv->ramdump_info;
  2949. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2950. /* dt type: legacy or converged */
  2951. ret = of_property_read_u32(dev->of_node,
  2952. "qcom,wlan-ramdump-dynamic",
  2953. &ramdump_size);
  2954. } else {
  2955. ret = of_property_read_u32(plat_priv->dev_node,
  2956. "qcom,wlan-ramdump-dynamic",
  2957. &ramdump_size);
  2958. }
  2959. if (ret == 0) {
  2960. ramdump_info->ramdump_va =
  2961. dma_alloc_coherent(dev, ramdump_size,
  2962. &ramdump_info->ramdump_pa,
  2963. GFP_KERNEL);
  2964. if (ramdump_info->ramdump_va)
  2965. ramdump_info->ramdump_size = ramdump_size;
  2966. }
  2967. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2968. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2969. if (ramdump_info->ramdump_size == 0) {
  2970. cnss_pr_info("Ramdump will not be collected");
  2971. goto out;
  2972. }
  2973. ret = cnss_init_dump_entry(plat_priv);
  2974. if (ret) {
  2975. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2976. goto free_ramdump;
  2977. }
  2978. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2979. if (!ramdump_info->ramdump_dev) {
  2980. cnss_pr_err("Failed to create ramdump device!");
  2981. ret = -ENOMEM;
  2982. goto free_ramdump;
  2983. }
  2984. return 0;
  2985. free_ramdump:
  2986. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2987. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2988. out:
  2989. return ret;
  2990. }
  2991. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2992. {
  2993. struct device *dev;
  2994. struct cnss_ramdump_info *ramdump_info;
  2995. dev = &plat_priv->plat_dev->dev;
  2996. ramdump_info = &plat_priv->ramdump_info;
  2997. if (ramdump_info->ramdump_dev)
  2998. cnss_destroy_ramdump_device(plat_priv,
  2999. ramdump_info->ramdump_dev);
  3000. if (ramdump_info->ramdump_va)
  3001. dma_free_coherent(dev, ramdump_info->ramdump_size,
  3002. ramdump_info->ramdump_va,
  3003. ramdump_info->ramdump_pa);
  3004. }
  3005. /**
  3006. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  3007. * @ret: Error returned by msm_dump_data_register_nominidump
  3008. *
  3009. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  3010. * ignore failure.
  3011. *
  3012. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  3013. */
  3014. static int cnss_ignore_dump_data_reg_fail(int ret)
  3015. {
  3016. return ret;
  3017. }
  3018. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  3019. {
  3020. int ret = 0;
  3021. struct cnss_ramdump_info_v2 *info_v2;
  3022. struct cnss_dump_data *dump_data;
  3023. struct msm_dump_entry dump_entry;
  3024. struct device *dev = &plat_priv->plat_dev->dev;
  3025. u32 ramdump_size = 0;
  3026. info_v2 = &plat_priv->ramdump_info_v2;
  3027. dump_data = &info_v2->dump_data;
  3028. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  3029. /* dt type: legacy or converged */
  3030. ret = of_property_read_u32(dev->of_node,
  3031. "qcom,wlan-ramdump-dynamic",
  3032. &ramdump_size);
  3033. } else {
  3034. ret = of_property_read_u32(plat_priv->dev_node,
  3035. "qcom,wlan-ramdump-dynamic",
  3036. &ramdump_size);
  3037. }
  3038. if (ret == 0)
  3039. info_v2->ramdump_size = ramdump_size;
  3040. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3041. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3042. if (!info_v2->dump_data_vaddr)
  3043. return -ENOMEM;
  3044. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3045. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3046. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3047. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3048. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3049. sizeof(dump_data->name));
  3050. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3051. dump_entry.addr = virt_to_phys(dump_data);
  3052. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  3053. &dump_entry);
  3054. if (ret) {
  3055. ret = cnss_ignore_dump_data_reg_fail(ret);
  3056. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  3057. ret ? "Error" : "Ignoring", ret);
  3058. goto free_ramdump;
  3059. }
  3060. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  3061. if (!info_v2->ramdump_dev) {
  3062. cnss_pr_err("Failed to create ramdump device!\n");
  3063. ret = -ENOMEM;
  3064. goto free_ramdump;
  3065. }
  3066. return 0;
  3067. free_ramdump:
  3068. kfree(info_v2->dump_data_vaddr);
  3069. info_v2->dump_data_vaddr = NULL;
  3070. return ret;
  3071. }
  3072. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  3073. {
  3074. struct cnss_ramdump_info_v2 *info_v2;
  3075. info_v2 = &plat_priv->ramdump_info_v2;
  3076. if (info_v2->ramdump_dev)
  3077. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  3078. kfree(info_v2->dump_data_vaddr);
  3079. info_v2->dump_data_vaddr = NULL;
  3080. info_v2->dump_data_valid = false;
  3081. }
  3082. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3083. {
  3084. int ret = 0;
  3085. switch (plat_priv->device_id) {
  3086. case QCA6174_DEVICE_ID:
  3087. ret = cnss_register_ramdump_v1(plat_priv);
  3088. break;
  3089. case QCA6290_DEVICE_ID:
  3090. case QCA6390_DEVICE_ID:
  3091. case QCN7605_DEVICE_ID:
  3092. case QCA6490_DEVICE_ID:
  3093. case KIWI_DEVICE_ID:
  3094. case MANGO_DEVICE_ID:
  3095. case PEACH_DEVICE_ID:
  3096. ret = cnss_register_ramdump_v2(plat_priv);
  3097. break;
  3098. default:
  3099. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3100. ret = -ENODEV;
  3101. break;
  3102. }
  3103. return ret;
  3104. }
  3105. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3106. {
  3107. switch (plat_priv->device_id) {
  3108. case QCA6174_DEVICE_ID:
  3109. cnss_unregister_ramdump_v1(plat_priv);
  3110. break;
  3111. case QCA6290_DEVICE_ID:
  3112. case QCA6390_DEVICE_ID:
  3113. case QCN7605_DEVICE_ID:
  3114. case QCA6490_DEVICE_ID:
  3115. case KIWI_DEVICE_ID:
  3116. case MANGO_DEVICE_ID:
  3117. case PEACH_DEVICE_ID:
  3118. cnss_unregister_ramdump_v2(plat_priv);
  3119. break;
  3120. default:
  3121. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3122. break;
  3123. }
  3124. }
  3125. #else
  3126. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3127. {
  3128. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3129. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  3130. struct device *dev = &plat_priv->plat_dev->dev;
  3131. u32 ramdump_size = 0;
  3132. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  3133. &ramdump_size) == 0)
  3134. info_v2->ramdump_size = ramdump_size;
  3135. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3136. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3137. if (!info_v2->dump_data_vaddr)
  3138. return -ENOMEM;
  3139. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3140. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3141. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3142. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3143. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3144. sizeof(dump_data->name));
  3145. info_v2->ramdump_dev = dev;
  3146. return 0;
  3147. }
  3148. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3149. {
  3150. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3151. info_v2->ramdump_dev = NULL;
  3152. kfree(info_v2->dump_data_vaddr);
  3153. info_v2->dump_data_vaddr = NULL;
  3154. info_v2->dump_data_valid = false;
  3155. }
  3156. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3157. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3158. phys_addr_t *pa, unsigned long attrs)
  3159. {
  3160. struct sg_table sgt;
  3161. int ret;
  3162. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3163. if (ret) {
  3164. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3165. va, &dma, size, attrs);
  3166. return -EINVAL;
  3167. }
  3168. *pa = page_to_phys(sg_page(sgt.sgl));
  3169. sg_free_table(&sgt);
  3170. return 0;
  3171. }
  3172. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3173. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3174. enum cnss_fw_dump_type type, int seg_no,
  3175. void *va, phys_addr_t pa, size_t size)
  3176. {
  3177. struct md_region md_entry;
  3178. int ret;
  3179. switch (type) {
  3180. case CNSS_FW_IMAGE:
  3181. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3182. seg_no);
  3183. break;
  3184. case CNSS_FW_RDDM:
  3185. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3186. seg_no);
  3187. break;
  3188. case CNSS_FW_REMOTE_HEAP:
  3189. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3190. seg_no);
  3191. break;
  3192. default:
  3193. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3194. return -EINVAL;
  3195. }
  3196. md_entry.phys_addr = pa;
  3197. md_entry.virt_addr = (uintptr_t)va;
  3198. md_entry.size = size;
  3199. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3200. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3201. md_entry.name, va, &pa, size);
  3202. ret = msm_minidump_add_region(&md_entry);
  3203. if (ret < 0)
  3204. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3205. return ret;
  3206. }
  3207. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3208. enum cnss_fw_dump_type type, int seg_no,
  3209. void *va, phys_addr_t pa, size_t size)
  3210. {
  3211. struct md_region md_entry;
  3212. int ret;
  3213. switch (type) {
  3214. case CNSS_FW_IMAGE:
  3215. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3216. seg_no);
  3217. break;
  3218. case CNSS_FW_RDDM:
  3219. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3220. seg_no);
  3221. break;
  3222. case CNSS_FW_REMOTE_HEAP:
  3223. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3224. seg_no);
  3225. break;
  3226. default:
  3227. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3228. return -EINVAL;
  3229. }
  3230. md_entry.phys_addr = pa;
  3231. md_entry.virt_addr = (uintptr_t)va;
  3232. md_entry.size = size;
  3233. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3234. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3235. md_entry.name, va, &pa, size);
  3236. ret = msm_minidump_remove_region(&md_entry);
  3237. if (ret)
  3238. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3239. ret);
  3240. return ret;
  3241. }
  3242. #else
  3243. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3244. enum cnss_fw_dump_type type, int seg_no,
  3245. void *va, phys_addr_t pa, size_t size)
  3246. {
  3247. char name[MAX_NAME_LEN];
  3248. switch (type) {
  3249. case CNSS_FW_IMAGE:
  3250. snprintf(name, MAX_NAME_LEN, "FBC_%X", seg_no);
  3251. break;
  3252. case CNSS_FW_RDDM:
  3253. snprintf(name, MAX_NAME_LEN, "RDDM_%X", seg_no);
  3254. break;
  3255. case CNSS_FW_REMOTE_HEAP:
  3256. snprintf(name, MAX_NAME_LEN, "RHEAP_%X", seg_no);
  3257. break;
  3258. default:
  3259. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3260. return -EINVAL;
  3261. }
  3262. cnss_pr_dbg("Dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3263. name, va, &pa, size);
  3264. return 0;
  3265. }
  3266. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3267. enum cnss_fw_dump_type type, int seg_no,
  3268. void *va, phys_addr_t pa, size_t size)
  3269. {
  3270. return 0;
  3271. }
  3272. #endif /* CONFIG_QCOM_MINIDUMP */
  3273. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3274. const struct firmware **fw_entry,
  3275. const char *filename)
  3276. {
  3277. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3278. return request_firmware_direct(fw_entry, filename,
  3279. &plat_priv->plat_dev->dev);
  3280. else
  3281. return firmware_request_nowarn(fw_entry, filename,
  3282. &plat_priv->plat_dev->dev);
  3283. }
  3284. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3285. /**
  3286. * cnss_register_bus_scale() - Setup interconnect voting data
  3287. * @plat_priv: Platform data structure
  3288. *
  3289. * For different interconnect path configured in device tree setup voting data
  3290. * for list of bandwidth requirements.
  3291. *
  3292. * Result: 0 for success. -EINVAL if not configured
  3293. */
  3294. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3295. {
  3296. int ret = -EINVAL;
  3297. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3298. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3299. struct device *dev = &plat_priv->plat_dev->dev;
  3300. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3301. ret = of_property_read_u32(dev->of_node,
  3302. "qcom,icc-path-count",
  3303. &plat_priv->icc.path_count);
  3304. if (ret) {
  3305. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3306. return 0;
  3307. }
  3308. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3309. "qcom,bus-bw-cfg-count",
  3310. &plat_priv->icc.bus_bw_cfg_count);
  3311. if (ret) {
  3312. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3313. goto cleanup;
  3314. }
  3315. cfg_arr_size = plat_priv->icc.path_count *
  3316. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3317. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3318. if (!cfg_arr) {
  3319. cnss_pr_err("Failed to alloc cfg table mem\n");
  3320. ret = -ENOMEM;
  3321. goto cleanup;
  3322. }
  3323. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3324. "qcom,bus-bw-cfg", cfg_arr,
  3325. cfg_arr_size);
  3326. if (ret) {
  3327. cnss_pr_err("Invalid Bus BW Config Table\n");
  3328. goto cleanup;
  3329. }
  3330. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3331. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3332. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3333. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3334. GFP_KERNEL);
  3335. if (!bus_bw_info) {
  3336. ret = -ENOMEM;
  3337. goto out;
  3338. }
  3339. ret = of_property_read_string_index(dev->of_node,
  3340. "interconnect-names", idx,
  3341. &bus_bw_info->icc_name);
  3342. if (ret)
  3343. goto out;
  3344. bus_bw_info->icc_path =
  3345. of_icc_get(&plat_priv->plat_dev->dev,
  3346. bus_bw_info->icc_name);
  3347. if (IS_ERR(bus_bw_info->icc_path)) {
  3348. ret = PTR_ERR(bus_bw_info->icc_path);
  3349. if (ret != -EPROBE_DEFER) {
  3350. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3351. bus_bw_info->icc_name, ret);
  3352. goto out;
  3353. }
  3354. }
  3355. bus_bw_info->cfg_table =
  3356. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3357. sizeof(*bus_bw_info->cfg_table),
  3358. GFP_KERNEL);
  3359. if (!bus_bw_info->cfg_table) {
  3360. ret = -ENOMEM;
  3361. goto out;
  3362. }
  3363. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3364. bus_bw_info->icc_name);
  3365. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3366. CNSS_ICC_VOTE_MAX);
  3367. i < plat_priv->icc.bus_bw_cfg_count;
  3368. i++, j += 2) {
  3369. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3370. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3371. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3372. i, bus_bw_info->cfg_table[i].avg_bw,
  3373. bus_bw_info->cfg_table[i].peak_bw);
  3374. }
  3375. list_add_tail(&bus_bw_info->list,
  3376. &plat_priv->icc.list_head);
  3377. }
  3378. kfree(cfg_arr);
  3379. return 0;
  3380. out:
  3381. list_for_each_entry_safe(bus_bw_info, tmp,
  3382. &plat_priv->icc.list_head, list) {
  3383. list_del(&bus_bw_info->list);
  3384. }
  3385. cleanup:
  3386. kfree(cfg_arr);
  3387. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3388. return ret;
  3389. }
  3390. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3391. {
  3392. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3393. list_for_each_entry_safe(bus_bw_info, tmp,
  3394. &plat_priv->icc.list_head, list) {
  3395. list_del(&bus_bw_info->list);
  3396. if (bus_bw_info->icc_path)
  3397. icc_put(bus_bw_info->icc_path);
  3398. }
  3399. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3400. }
  3401. #else
  3402. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3403. {
  3404. return 0;
  3405. }
  3406. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3407. #endif /* CONFIG_INTERCONNECT */
  3408. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3409. {
  3410. struct cnss_plat_data *plat_priv = cb_ctx;
  3411. if (!plat_priv) {
  3412. cnss_pr_err("%s: Invalid context\n", __func__);
  3413. return;
  3414. }
  3415. if (status) {
  3416. cnss_pr_info("CNSS Daemon connected\n");
  3417. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3418. complete(&plat_priv->daemon_connected);
  3419. } else {
  3420. cnss_pr_info("CNSS Daemon disconnected\n");
  3421. reinit_completion(&plat_priv->daemon_connected);
  3422. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3423. }
  3424. }
  3425. static ssize_t enable_hds_store(struct device *dev,
  3426. struct device_attribute *attr,
  3427. const char *buf, size_t count)
  3428. {
  3429. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3430. unsigned int enable_hds = 0;
  3431. if (!plat_priv)
  3432. return -ENODEV;
  3433. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3434. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3435. return -EINVAL;
  3436. }
  3437. if (enable_hds)
  3438. plat_priv->hds_enabled = true;
  3439. else
  3440. plat_priv->hds_enabled = false;
  3441. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3442. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3443. return count;
  3444. }
  3445. static ssize_t recovery_show(struct device *dev,
  3446. struct device_attribute *attr,
  3447. char *buf)
  3448. {
  3449. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3450. u32 buf_size = PAGE_SIZE;
  3451. u32 curr_len = 0;
  3452. u32 buf_written = 0;
  3453. if (!plat_priv)
  3454. return -ENODEV;
  3455. buf_written = scnprintf(buf, buf_size,
  3456. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3457. "BIT0 -- wlan fw recovery\n"
  3458. "BIT1 -- wlan pcss recovery\n"
  3459. "---------------------------------\n");
  3460. curr_len += buf_written;
  3461. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3462. "WLAN recovery %s[%d]\n",
  3463. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3464. plat_priv->recovery_enabled);
  3465. curr_len += buf_written;
  3466. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3467. "WLAN PCSS recovery %s[%d]\n",
  3468. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3469. plat_priv->recovery_pcss_enabled);
  3470. curr_len += buf_written;
  3471. /*
  3472. * Now size of curr_len is not over page size for sure,
  3473. * later if new item or none-fixed size item added, need
  3474. * add check to make sure curr_len is not over page size.
  3475. */
  3476. return curr_len;
  3477. }
  3478. static ssize_t tme_opt_file_download_show(struct device *dev,
  3479. struct device_attribute *attr, char *buf)
  3480. {
  3481. u32 buf_size = PAGE_SIZE;
  3482. u32 curr_len = 0;
  3483. u32 buf_written = 0;
  3484. buf_written = scnprintf(buf, buf_size,
  3485. "Usage: echo [file_type] > /sys/kernel/cnss/tme_opt_file_download\n"
  3486. "file_type = sec -- For OEM_FUSE file\n"
  3487. "file_type = rpr -- For RPR file\n"
  3488. "file_type = dpr -- For DPR file\n");
  3489. curr_len += buf_written;
  3490. return curr_len;
  3491. }
  3492. static ssize_t time_sync_period_show(struct device *dev,
  3493. struct device_attribute *attr,
  3494. char *buf)
  3495. {
  3496. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3497. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3498. plat_priv->ctrl_params.time_sync_period);
  3499. }
  3500. /**
  3501. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3502. * @plat_priv: Platform data structure
  3503. *
  3504. * Result: return minimum time sync period present in vote from wlan and sys
  3505. */
  3506. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3507. {
  3508. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3509. unsigned int time_sync_period;
  3510. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3511. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3512. if (min_time_sync_period > time_sync_period)
  3513. min_time_sync_period = time_sync_period;
  3514. }
  3515. return min_time_sync_period;
  3516. }
  3517. static ssize_t time_sync_period_store(struct device *dev,
  3518. struct device_attribute *attr,
  3519. const char *buf, size_t count)
  3520. {
  3521. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3522. unsigned int time_sync_period = 0;
  3523. if (!plat_priv)
  3524. return -ENODEV;
  3525. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3526. cnss_pr_err("Invalid time sync sysfs command\n");
  3527. return -EINVAL;
  3528. }
  3529. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3530. cnss_pr_err("Invalid time sync value\n");
  3531. return -EINVAL;
  3532. }
  3533. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3534. time_sync_period;
  3535. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3536. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3537. cnss_pr_err("Invalid min time sync value\n");
  3538. return -EINVAL;
  3539. }
  3540. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3541. return count;
  3542. }
  3543. /**
  3544. * cnss_update_time_sync_period() - Set time sync period given by driver
  3545. * @dev: device structure
  3546. * @time_sync_period: time sync period value
  3547. *
  3548. * Update time sync period vote of driver and set minimum of time sync period
  3549. * from stored vote through wlan and sys config
  3550. * Result: return 0 for success, error in case of invalid value and no dev
  3551. */
  3552. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3553. {
  3554. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3555. if (!plat_priv)
  3556. return -ENODEV;
  3557. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3558. cnss_pr_err("Invalid time sync value\n");
  3559. return -EINVAL;
  3560. }
  3561. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3562. time_sync_period;
  3563. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3564. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3565. cnss_pr_err("Invalid min time sync value\n");
  3566. return -EINVAL;
  3567. }
  3568. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3569. return 0;
  3570. }
  3571. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3572. /**
  3573. * cnss_reset_time_sync_period() - Reset time sync period
  3574. * @dev: device structure
  3575. *
  3576. * Update time sync period vote of driver as invalid
  3577. * and reset minimum of time sync period from
  3578. * stored vote through wlan and sys config
  3579. * Result: return 0 for success, error in case of no dev
  3580. */
  3581. int cnss_reset_time_sync_period(struct device *dev)
  3582. {
  3583. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3584. unsigned int time_sync_period = 0;
  3585. if (!plat_priv)
  3586. return -ENODEV;
  3587. /* Driver vote is set to invalid in case of reset
  3588. * In this case, only vote valid to check is sys config
  3589. */
  3590. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3591. CNSS_TIME_SYNC_PERIOD_INVALID;
  3592. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3593. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3594. cnss_pr_err("Invalid min time sync value\n");
  3595. return -EINVAL;
  3596. }
  3597. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3598. return 0;
  3599. }
  3600. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3601. static ssize_t recovery_store(struct device *dev,
  3602. struct device_attribute *attr,
  3603. const char *buf, size_t count)
  3604. {
  3605. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3606. unsigned int recovery = 0;
  3607. if (!plat_priv)
  3608. return -ENODEV;
  3609. if (sscanf(buf, "%du", &recovery) != 1) {
  3610. cnss_pr_err("Invalid recovery sysfs command\n");
  3611. return -EINVAL;
  3612. }
  3613. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3614. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3615. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3616. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3617. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3618. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3619. cnss_send_subsys_restart_level_msg(plat_priv);
  3620. return count;
  3621. }
  3622. static ssize_t shutdown_store(struct device *dev,
  3623. struct device_attribute *attr,
  3624. const char *buf, size_t count)
  3625. {
  3626. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3627. cnss_pr_dbg("Received shutdown notification\n");
  3628. if (plat_priv) {
  3629. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3630. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3631. del_timer(&plat_priv->fw_boot_timer);
  3632. complete_all(&plat_priv->power_up_complete);
  3633. complete_all(&plat_priv->cal_complete);
  3634. cnss_pr_dbg("Shutdown notification handled\n");
  3635. }
  3636. return count;
  3637. }
  3638. static ssize_t fs_ready_store(struct device *dev,
  3639. struct device_attribute *attr,
  3640. const char *buf, size_t count)
  3641. {
  3642. int fs_ready = 0;
  3643. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3644. if (sscanf(buf, "%du", &fs_ready) != 1)
  3645. return -EINVAL;
  3646. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3647. fs_ready, count);
  3648. if (!plat_priv) {
  3649. cnss_pr_err("plat_priv is NULL\n");
  3650. return count;
  3651. }
  3652. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3653. cnss_pr_dbg("QMI is bypassed\n");
  3654. return count;
  3655. }
  3656. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3657. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3658. cnss_driver_event_post(plat_priv,
  3659. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3660. 0, NULL);
  3661. }
  3662. return count;
  3663. }
  3664. static ssize_t qdss_trace_start_store(struct device *dev,
  3665. struct device_attribute *attr,
  3666. const char *buf, size_t count)
  3667. {
  3668. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3669. wlfw_qdss_trace_start(plat_priv);
  3670. cnss_pr_dbg("Received QDSS start command\n");
  3671. return count;
  3672. }
  3673. static ssize_t qdss_trace_stop_store(struct device *dev,
  3674. struct device_attribute *attr,
  3675. const char *buf, size_t count)
  3676. {
  3677. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3678. u32 option = 0;
  3679. if (sscanf(buf, "%du", &option) != 1)
  3680. return -EINVAL;
  3681. wlfw_qdss_trace_stop(plat_priv, option);
  3682. cnss_pr_dbg("Received QDSS stop command\n");
  3683. return count;
  3684. }
  3685. static ssize_t qdss_conf_download_store(struct device *dev,
  3686. struct device_attribute *attr,
  3687. const char *buf, size_t count)
  3688. {
  3689. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3690. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3691. cnss_pr_dbg("Received QDSS download config command\n");
  3692. return count;
  3693. }
  3694. static ssize_t tme_opt_file_download_store(struct device *dev,
  3695. struct device_attribute *attr,
  3696. const char *buf, size_t count)
  3697. {
  3698. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3699. char cmd[5];
  3700. if (sscanf(buf, "%s", cmd) != 1)
  3701. return -EINVAL;
  3702. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3703. cnss_pr_err("Firmware is not ready yet\n");
  3704. return 0;
  3705. }
  3706. if (plat_priv->device_id == PEACH_DEVICE_ID &&
  3707. cnss_bus_runtime_pm_get_sync(plat_priv) < 0)
  3708. goto runtime_pm_put;
  3709. if (strcmp(cmd, "sec") == 0) {
  3710. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3711. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3712. } else if (strcmp(cmd, "rpr") == 0) {
  3713. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3714. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3715. } else if (strcmp(cmd, "dpr") == 0) {
  3716. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3717. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3718. }
  3719. cnss_pr_dbg("Received tme_opt_file_download indication cmd: %s\n", cmd);
  3720. runtime_pm_put:
  3721. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3722. cnss_bus_runtime_pm_put(plat_priv);
  3723. return count;
  3724. }
  3725. static ssize_t hw_trace_override_store(struct device *dev,
  3726. struct device_attribute *attr,
  3727. const char *buf, size_t count)
  3728. {
  3729. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3730. int tmp = 0;
  3731. if (sscanf(buf, "%du", &tmp) != 1)
  3732. return -EINVAL;
  3733. plat_priv->hw_trc_override = tmp;
  3734. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3735. return count;
  3736. }
  3737. static ssize_t charger_mode_store(struct device *dev,
  3738. struct device_attribute *attr,
  3739. const char *buf, size_t count)
  3740. {
  3741. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3742. int tmp = 0;
  3743. if (sscanf(buf, "%du", &tmp) != 1)
  3744. return -EINVAL;
  3745. plat_priv->charger_mode = tmp;
  3746. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3747. return count;
  3748. }
  3749. static DEVICE_ATTR_WO(fs_ready);
  3750. static DEVICE_ATTR_WO(shutdown);
  3751. static DEVICE_ATTR_RW(recovery);
  3752. static DEVICE_ATTR_WO(enable_hds);
  3753. static DEVICE_ATTR_WO(qdss_trace_start);
  3754. static DEVICE_ATTR_WO(qdss_trace_stop);
  3755. static DEVICE_ATTR_WO(qdss_conf_download);
  3756. static DEVICE_ATTR_RW(tme_opt_file_download);
  3757. static DEVICE_ATTR_WO(hw_trace_override);
  3758. static DEVICE_ATTR_WO(charger_mode);
  3759. static DEVICE_ATTR_RW(time_sync_period);
  3760. static struct attribute *cnss_attrs[] = {
  3761. &dev_attr_fs_ready.attr,
  3762. &dev_attr_shutdown.attr,
  3763. &dev_attr_recovery.attr,
  3764. &dev_attr_enable_hds.attr,
  3765. &dev_attr_qdss_trace_start.attr,
  3766. &dev_attr_qdss_trace_stop.attr,
  3767. &dev_attr_qdss_conf_download.attr,
  3768. &dev_attr_tme_opt_file_download.attr,
  3769. &dev_attr_hw_trace_override.attr,
  3770. &dev_attr_charger_mode.attr,
  3771. &dev_attr_time_sync_period.attr,
  3772. NULL,
  3773. };
  3774. static struct attribute_group cnss_attr_group = {
  3775. .attrs = cnss_attrs,
  3776. };
  3777. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3778. {
  3779. struct device *dev = &plat_priv->plat_dev->dev;
  3780. int ret;
  3781. char cnss_name[CNSS_FS_NAME_SIZE];
  3782. char shutdown_name[32];
  3783. if (cnss_is_dual_wlan_enabled()) {
  3784. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3785. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3786. snprintf(shutdown_name, sizeof(shutdown_name),
  3787. "shutdown_wlan_%d", plat_priv->plat_idx);
  3788. } else {
  3789. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3790. snprintf(shutdown_name, sizeof(shutdown_name),
  3791. "shutdown_wlan");
  3792. }
  3793. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3794. if (ret) {
  3795. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3796. ret);
  3797. goto out;
  3798. }
  3799. /* This is only for backward compatibility. */
  3800. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3801. if (ret) {
  3802. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3803. ret);
  3804. goto rm_cnss_link;
  3805. }
  3806. return 0;
  3807. rm_cnss_link:
  3808. sysfs_remove_link(kernel_kobj, cnss_name);
  3809. out:
  3810. return ret;
  3811. }
  3812. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3813. {
  3814. char cnss_name[CNSS_FS_NAME_SIZE];
  3815. char shutdown_name[32];
  3816. if (cnss_is_dual_wlan_enabled()) {
  3817. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3818. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3819. snprintf(shutdown_name, sizeof(shutdown_name),
  3820. "shutdown_wlan_%d", plat_priv->plat_idx);
  3821. } else {
  3822. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3823. snprintf(shutdown_name, sizeof(shutdown_name),
  3824. "shutdown_wlan");
  3825. }
  3826. sysfs_remove_link(kernel_kobj, shutdown_name);
  3827. sysfs_remove_link(kernel_kobj, cnss_name);
  3828. }
  3829. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3830. {
  3831. int ret = 0;
  3832. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3833. &cnss_attr_group);
  3834. if (ret) {
  3835. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3836. ret);
  3837. goto out;
  3838. }
  3839. cnss_create_sysfs_link(plat_priv);
  3840. return 0;
  3841. out:
  3842. return ret;
  3843. }
  3844. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3845. union cnss_device_group_devres {
  3846. const struct attribute_group *group;
  3847. };
  3848. static void devm_cnss_group_remove(struct device *dev, void *res)
  3849. {
  3850. union cnss_device_group_devres *devres = res;
  3851. const struct attribute_group *group = devres->group;
  3852. cnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3853. sysfs_remove_group(&dev->kobj, group);
  3854. }
  3855. static int devm_cnss_group_match(struct device *dev, void *res, void *data)
  3856. {
  3857. return ((union cnss_device_group_devres *)res) == data;
  3858. }
  3859. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3860. {
  3861. cnss_remove_sysfs_link(plat_priv);
  3862. WARN_ON(devres_release(&plat_priv->plat_dev->dev,
  3863. devm_cnss_group_remove, devm_cnss_group_match,
  3864. (void *)&cnss_attr_group));
  3865. }
  3866. #else
  3867. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3868. {
  3869. cnss_remove_sysfs_link(plat_priv);
  3870. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3871. }
  3872. #endif
  3873. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3874. {
  3875. spin_lock_init(&plat_priv->event_lock);
  3876. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3877. WQ_UNBOUND, 1);
  3878. if (!plat_priv->event_wq) {
  3879. cnss_pr_err("Failed to create event workqueue!\n");
  3880. return -EFAULT;
  3881. }
  3882. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3883. INIT_LIST_HEAD(&plat_priv->event_list);
  3884. return 0;
  3885. }
  3886. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3887. {
  3888. destroy_workqueue(plat_priv->event_wq);
  3889. }
  3890. static int cnss_reboot_notifier(struct notifier_block *nb,
  3891. unsigned long action,
  3892. void *data)
  3893. {
  3894. struct cnss_plat_data *plat_priv =
  3895. container_of(nb, struct cnss_plat_data, reboot_nb);
  3896. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3897. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3898. del_timer(&plat_priv->fw_boot_timer);
  3899. complete_all(&plat_priv->power_up_complete);
  3900. complete_all(&plat_priv->cal_complete);
  3901. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3902. return NOTIFY_DONE;
  3903. }
  3904. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3905. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3906. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3907. {
  3908. uint32_t *peripheralStateInfo = NULL;
  3909. size_t size = 0;
  3910. /* Once this flag is set, secure peripheral feature
  3911. * will not be supported till next reboot
  3912. */
  3913. if (plat_priv->sec_peri_feature_disable)
  3914. return 0;
  3915. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3916. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3917. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3918. CNSS_ASSERT(0);
  3919. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3920. PTR_ERR(peripheralStateInfo));
  3921. plat_priv->sec_peri_feature_disable = true;
  3922. return 0;
  3923. }
  3924. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3925. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3926. set_bit(CNSS_WLAN_HW_DISABLED,
  3927. &plat_priv->driver_state);
  3928. else
  3929. clear_bit(CNSS_WLAN_HW_DISABLED,
  3930. &plat_priv->driver_state);
  3931. return 0;
  3932. }
  3933. #else
  3934. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3935. {
  3936. struct Object client_env;
  3937. struct Object app_object;
  3938. u32 wifi_uid = HW_WIFI_UID;
  3939. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3940. int ret;
  3941. u8 state = 0;
  3942. /* Once this flag is set, secure peripheral feature
  3943. * will not be supported till next reboot
  3944. */
  3945. if (plat_priv->sec_peri_feature_disable)
  3946. return 0;
  3947. /* get rootObj */
  3948. ret = get_client_env_object(&client_env);
  3949. if (ret) {
  3950. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3951. goto end;
  3952. }
  3953. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3954. if (ret) {
  3955. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3956. if (ret == FEATURE_NOT_SUPPORTED) {
  3957. ret = 0; /* Do not Assert */
  3958. plat_priv->sec_peri_feature_disable = true;
  3959. cnss_pr_dbg("Secure HW feature not supported\n");
  3960. }
  3961. goto exit_release_clientenv;
  3962. }
  3963. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3964. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3965. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3966. ObjectCounts_pack(1, 1, 0, 0));
  3967. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3968. if (ret) {
  3969. if (ret == PERIPHERAL_NOT_FOUND) {
  3970. ret = 0; /* Do not Assert */
  3971. plat_priv->sec_peri_feature_disable = true;
  3972. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3973. }
  3974. goto exit_release_app_obj;
  3975. }
  3976. if (state == 1)
  3977. set_bit(CNSS_WLAN_HW_DISABLED,
  3978. &plat_priv->driver_state);
  3979. else
  3980. clear_bit(CNSS_WLAN_HW_DISABLED,
  3981. &plat_priv->driver_state);
  3982. exit_release_app_obj:
  3983. Object_release(app_object);
  3984. exit_release_clientenv:
  3985. Object_release(client_env);
  3986. end:
  3987. if (ret) {
  3988. cnss_pr_err("Unable to get HW disable status\n");
  3989. CNSS_ASSERT(0);
  3990. }
  3991. return ret;
  3992. }
  3993. #endif
  3994. #else
  3995. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3996. {
  3997. return 0;
  3998. }
  3999. #endif
  4000. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  4001. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  4002. {
  4003. }
  4004. #else
  4005. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  4006. {
  4007. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  4008. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  4009. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  4010. }
  4011. #endif
  4012. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  4013. static void cnss_initialize_mem_pool(unsigned long device_id)
  4014. {
  4015. cnss_initialize_prealloc_pool(device_id);
  4016. }
  4017. static void cnss_deinitialize_mem_pool(void)
  4018. {
  4019. cnss_deinitialize_prealloc_pool();
  4020. }
  4021. #else
  4022. static void cnss_initialize_mem_pool(unsigned long device_id)
  4023. {
  4024. }
  4025. static void cnss_deinitialize_mem_pool(void)
  4026. {
  4027. }
  4028. #endif
  4029. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  4030. {
  4031. int ret;
  4032. ret = cnss_init_sol_gpio(plat_priv);
  4033. if (ret)
  4034. return ret;
  4035. timer_setup(&plat_priv->fw_boot_timer,
  4036. cnss_bus_fw_boot_timeout_hdlr, 0);
  4037. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  4038. if (ret)
  4039. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  4040. ret);
  4041. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  4042. init_completion(&plat_priv->power_up_complete);
  4043. init_completion(&plat_priv->cal_complete);
  4044. init_completion(&plat_priv->rddm_complete);
  4045. init_completion(&plat_priv->recovery_complete);
  4046. init_completion(&plat_priv->daemon_connected);
  4047. mutex_init(&plat_priv->dev_lock);
  4048. mutex_init(&plat_priv->driver_ops_lock);
  4049. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  4050. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  4051. if (ret)
  4052. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  4053. ret);
  4054. plat_priv->recovery_ws =
  4055. wakeup_source_register(&plat_priv->plat_dev->dev,
  4056. "CNSS_FW_RECOVERY");
  4057. if (!plat_priv->recovery_ws)
  4058. cnss_pr_err("Failed to setup FW recovery wake source\n");
  4059. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4060. cnss_daemon_connection_update_cb,
  4061. plat_priv);
  4062. if (ret)
  4063. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  4064. ret);
  4065. cnss_sram_dump_init(plat_priv);
  4066. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4067. "qcom,rc-ep-short-channel"))
  4068. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  4069. if (plat_priv->device_id == PEACH_DEVICE_ID)
  4070. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  4071. return 0;
  4072. }
  4073. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  4074. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4075. {
  4076. }
  4077. #else
  4078. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4079. {
  4080. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  4081. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  4082. kfree(plat_priv->sram_dump);
  4083. }
  4084. #endif
  4085. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  4086. {
  4087. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4088. plat_priv);
  4089. complete_all(&plat_priv->recovery_complete);
  4090. complete_all(&plat_priv->rddm_complete);
  4091. complete_all(&plat_priv->cal_complete);
  4092. complete_all(&plat_priv->power_up_complete);
  4093. complete_all(&plat_priv->daemon_connected);
  4094. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  4095. unregister_reboot_notifier(&plat_priv->reboot_nb);
  4096. del_timer(&plat_priv->fw_boot_timer);
  4097. wakeup_source_unregister(plat_priv->recovery_ws);
  4098. cnss_deinit_sol_gpio(plat_priv);
  4099. cnss_sram_dump_deinit(plat_priv);
  4100. kfree(plat_priv->on_chip_pmic_board_ids);
  4101. }
  4102. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  4103. {
  4104. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  4105. CNSS_TIME_SYNC_PERIOD_INVALID;
  4106. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  4107. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4108. }
  4109. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  4110. {
  4111. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  4112. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  4113. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4114. "qcom,wlan-cbc-enabled");
  4115. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  4116. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  4117. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  4118. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  4119. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4120. cnss_init_time_sync_period_default(plat_priv);
  4121. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  4122. * enabled by default
  4123. */
  4124. plat_priv->adsp_pc_enabled = true;
  4125. }
  4126. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  4127. {
  4128. struct device *dev = &plat_priv->plat_dev->dev;
  4129. plat_priv->use_pm_domain =
  4130. of_property_read_bool(dev->of_node, "use-pm-domain");
  4131. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  4132. }
  4133. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  4134. {
  4135. struct device *dev = &plat_priv->plat_dev->dev;
  4136. plat_priv->set_wlaon_pwr_ctrl =
  4137. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  4138. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  4139. plat_priv->set_wlaon_pwr_ctrl);
  4140. }
  4141. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  4142. {
  4143. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4144. "qcom,converged-dt") ||
  4145. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4146. "qcom,same-dt-multi-dev") ||
  4147. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4148. "qcom,multi-wlan-exchg"));
  4149. }
  4150. static const struct platform_device_id cnss_platform_id_table[] = {
  4151. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  4152. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  4153. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  4154. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  4155. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  4156. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  4157. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  4158. { .name = "qcaconv", .driver_data = 0, },
  4159. { },
  4160. };
  4161. static const struct of_device_id cnss_of_match_table[] = {
  4162. {
  4163. .compatible = "qcom,cnss",
  4164. .data = (void *)&cnss_platform_id_table[0]},
  4165. {
  4166. .compatible = "qcom,cnss-qca6290",
  4167. .data = (void *)&cnss_platform_id_table[1]},
  4168. {
  4169. .compatible = "qcom,cnss-qca6390",
  4170. .data = (void *)&cnss_platform_id_table[2]},
  4171. {
  4172. .compatible = "qcom,cnss-qca6490",
  4173. .data = (void *)&cnss_platform_id_table[3]},
  4174. {
  4175. .compatible = "qcom,cnss-kiwi",
  4176. .data = (void *)&cnss_platform_id_table[4]},
  4177. {
  4178. .compatible = "qcom,cnss-mango",
  4179. .data = (void *)&cnss_platform_id_table[5]},
  4180. {
  4181. .compatible = "qcom,cnss-peach",
  4182. .data = (void *)&cnss_platform_id_table[6]},
  4183. {
  4184. .compatible = "qcom,cnss-qca-converged",
  4185. .data = (void *)&cnss_platform_id_table[7]},
  4186. { },
  4187. };
  4188. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  4189. static inline bool
  4190. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  4191. {
  4192. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4193. "use-nv-mac");
  4194. }
  4195. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  4196. {
  4197. struct device_node *child;
  4198. u32 id, i;
  4199. int id_n, device_identifier_gpio, ret;
  4200. u8 gpio_value;
  4201. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  4202. return 0;
  4203. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  4204. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  4205. if (ret) {
  4206. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  4207. return ret;
  4208. }
  4209. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  4210. gpio_value = gpio_get_value(device_identifier_gpio);
  4211. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  4212. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  4213. child) {
  4214. if (strcmp(child->name, "chip_cfg"))
  4215. continue;
  4216. id_n = of_property_count_u32_elems(child, "supported-ids");
  4217. if (id_n <= 0) {
  4218. cnss_pr_err("Device id is NOT set\n");
  4219. return -EINVAL;
  4220. }
  4221. for (i = 0; i < id_n; i++) {
  4222. ret = of_property_read_u32_index(child,
  4223. "supported-ids",
  4224. i, &id);
  4225. if (ret) {
  4226. cnss_pr_err("Failed to read supported ids\n");
  4227. return -EINVAL;
  4228. }
  4229. if (gpio_value && id == QCA6490_DEVICE_ID) {
  4230. plat_priv->plat_dev->dev.of_node = child;
  4231. plat_priv->device_id = QCA6490_DEVICE_ID;
  4232. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  4233. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4234. child->name, i, id);
  4235. return 0;
  4236. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  4237. plat_priv->plat_dev->dev.of_node = child;
  4238. plat_priv->device_id = KIWI_DEVICE_ID;
  4239. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4240. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4241. child->name, i, id);
  4242. return 0;
  4243. }
  4244. }
  4245. }
  4246. return -EINVAL;
  4247. }
  4248. static inline u32
  4249. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4250. {
  4251. bool is_converged_dt = of_property_read_bool(
  4252. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4253. bool is_multi_wlan_xchg;
  4254. if (is_converged_dt)
  4255. return CNSS_DTT_CONVERGED;
  4256. is_multi_wlan_xchg = of_property_read_bool(
  4257. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4258. if (is_multi_wlan_xchg)
  4259. return CNSS_DTT_MULTIEXCHG;
  4260. return CNSS_DTT_LEGACY;
  4261. }
  4262. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4263. {
  4264. int ret = 0;
  4265. int retry = 0;
  4266. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4267. return 0;
  4268. retry:
  4269. ret = cnss_power_on_device(plat_priv, true);
  4270. if (ret)
  4271. goto end;
  4272. ret = cnss_bus_init(plat_priv);
  4273. if (ret) {
  4274. if ((ret != -EPROBE_DEFER) &&
  4275. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4276. cnss_power_off_device(plat_priv);
  4277. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4278. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4279. goto retry;
  4280. }
  4281. goto power_off;
  4282. }
  4283. return 0;
  4284. power_off:
  4285. cnss_power_off_device(plat_priv);
  4286. end:
  4287. return ret;
  4288. }
  4289. int cnss_wlan_hw_enable(void)
  4290. {
  4291. struct cnss_plat_data *plat_priv;
  4292. int ret = 0;
  4293. if (cnss_is_dual_wlan_enabled())
  4294. plat_priv = cnss_get_first_plat_priv(NULL);
  4295. else
  4296. plat_priv = cnss_get_plat_priv(NULL);
  4297. if (!plat_priv)
  4298. return -ENODEV;
  4299. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4300. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4301. goto register_driver;
  4302. ret = cnss_wlan_device_init(plat_priv);
  4303. if (ret) {
  4304. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4305. CNSS_ASSERT(0);
  4306. return ret;
  4307. }
  4308. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4309. cnss_driver_event_post(plat_priv,
  4310. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4311. 0, NULL);
  4312. register_driver:
  4313. if (plat_priv->driver_ops)
  4314. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4315. return ret;
  4316. }
  4317. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4318. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4319. {
  4320. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4321. int ret = 0;
  4322. if (!plat_priv)
  4323. return -ENODEV;
  4324. /* If IMS server is connected, return success without QMI send */
  4325. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4326. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4327. return ret;
  4328. }
  4329. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4330. return ret;
  4331. }
  4332. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4333. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4334. unsigned long *thermal_state)
  4335. {
  4336. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4337. if (!tcdev || !tcdev->devdata) {
  4338. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4339. return -EINVAL;
  4340. }
  4341. cnss_tcdev = tcdev->devdata;
  4342. *thermal_state = cnss_tcdev->max_thermal_state;
  4343. return 0;
  4344. }
  4345. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4346. unsigned long *thermal_state)
  4347. {
  4348. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4349. if (!tcdev || !tcdev->devdata) {
  4350. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4351. return -EINVAL;
  4352. }
  4353. cnss_tcdev = tcdev->devdata;
  4354. *thermal_state = cnss_tcdev->curr_thermal_state;
  4355. return 0;
  4356. }
  4357. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4358. unsigned long thermal_state)
  4359. {
  4360. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4361. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4362. int ret = 0;
  4363. if (!tcdev || !tcdev->devdata) {
  4364. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4365. return -EINVAL;
  4366. }
  4367. cnss_tcdev = tcdev->devdata;
  4368. if (thermal_state > cnss_tcdev->max_thermal_state)
  4369. return -EINVAL;
  4370. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4371. thermal_state, cnss_tcdev->tcdev_id);
  4372. mutex_lock(&plat_priv->tcdev_lock);
  4373. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4374. thermal_state,
  4375. cnss_tcdev->tcdev_id);
  4376. if (!ret)
  4377. cnss_tcdev->curr_thermal_state = thermal_state;
  4378. mutex_unlock(&plat_priv->tcdev_lock);
  4379. if (ret) {
  4380. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4381. ret, cnss_tcdev->tcdev_id);
  4382. return ret;
  4383. }
  4384. return 0;
  4385. }
  4386. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4387. .get_max_state = cnss_tcdev_get_max_state,
  4388. .get_cur_state = cnss_tcdev_get_cur_state,
  4389. .set_cur_state = cnss_tcdev_set_cur_state,
  4390. };
  4391. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4392. int tcdev_id)
  4393. {
  4394. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4395. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4396. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4397. struct device_node *dev_node;
  4398. int ret = 0;
  4399. if (!priv) {
  4400. cnss_pr_err("Platform driver is not initialized!\n");
  4401. return -ENODEV;
  4402. }
  4403. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4404. if (!cnss_tcdev) {
  4405. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4406. return -ENOMEM;
  4407. }
  4408. cnss_tcdev->tcdev_id = tcdev_id;
  4409. cnss_tcdev->max_thermal_state = max_state;
  4410. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4411. "qcom,cnss_cdev%d", tcdev_id);
  4412. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4413. if (!dev_node) {
  4414. cnss_pr_err("Failed to get cooling device node\n");
  4415. kfree(cnss_tcdev);
  4416. return -EINVAL;
  4417. }
  4418. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4419. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4420. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4421. cdev_node_name,
  4422. cnss_tcdev,
  4423. &cnss_cooling_ops);
  4424. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4425. ret = PTR_ERR(cnss_tcdev->tcdev);
  4426. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4427. ret, cnss_tcdev->tcdev_id);
  4428. kfree(cnss_tcdev);
  4429. } else {
  4430. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4431. cnss_tcdev->tcdev_id);
  4432. mutex_lock(&priv->tcdev_lock);
  4433. list_add(&cnss_tcdev->tcdev_list,
  4434. &priv->cnss_tcdev_list);
  4435. mutex_unlock(&priv->tcdev_lock);
  4436. }
  4437. } else {
  4438. cnss_pr_dbg("Cooling device registration not supported");
  4439. kfree(cnss_tcdev);
  4440. ret = -EOPNOTSUPP;
  4441. }
  4442. return ret;
  4443. }
  4444. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4445. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4446. {
  4447. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4448. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4449. if (!priv) {
  4450. cnss_pr_err("Platform driver is not initialized!\n");
  4451. return;
  4452. }
  4453. mutex_lock(&priv->tcdev_lock);
  4454. while (!list_empty(&priv->cnss_tcdev_list)) {
  4455. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4456. struct cnss_thermal_cdev,
  4457. tcdev_list);
  4458. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4459. list_del(&cnss_tcdev->tcdev_list);
  4460. kfree(cnss_tcdev);
  4461. }
  4462. mutex_unlock(&priv->tcdev_lock);
  4463. }
  4464. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4465. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4466. unsigned long *thermal_state,
  4467. int tcdev_id)
  4468. {
  4469. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4470. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4471. if (!priv) {
  4472. cnss_pr_err("Platform driver is not initialized!\n");
  4473. return -ENODEV;
  4474. }
  4475. mutex_lock(&priv->tcdev_lock);
  4476. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4477. if (cnss_tcdev->tcdev_id != tcdev_id)
  4478. continue;
  4479. *thermal_state = cnss_tcdev->curr_thermal_state;
  4480. mutex_unlock(&priv->tcdev_lock);
  4481. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4482. cnss_tcdev->curr_thermal_state, tcdev_id);
  4483. return 0;
  4484. }
  4485. mutex_unlock(&priv->tcdev_lock);
  4486. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4487. return -EINVAL;
  4488. }
  4489. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4490. static int cnss_probe(struct platform_device *plat_dev)
  4491. {
  4492. int ret = 0;
  4493. struct cnss_plat_data *plat_priv;
  4494. const struct of_device_id *of_id;
  4495. const struct platform_device_id *device_id;
  4496. if (cnss_get_plat_priv(plat_dev)) {
  4497. cnss_pr_err("Driver is already initialized!\n");
  4498. ret = -EEXIST;
  4499. goto out;
  4500. }
  4501. ret = cnss_plat_env_available();
  4502. if (ret)
  4503. goto out;
  4504. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4505. if (!of_id || !of_id->data) {
  4506. cnss_pr_err("Failed to find of match device!\n");
  4507. ret = -ENODEV;
  4508. goto out;
  4509. }
  4510. device_id = of_id->data;
  4511. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4512. GFP_KERNEL);
  4513. if (!plat_priv) {
  4514. ret = -ENOMEM;
  4515. goto out;
  4516. }
  4517. plat_priv->plat_dev = plat_dev;
  4518. plat_priv->dev_node = NULL;
  4519. plat_priv->device_id = device_id->driver_data;
  4520. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4521. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4522. plat_priv->dt_type);
  4523. plat_priv->use_fw_path_with_prefix =
  4524. cnss_use_fw_path_with_prefix(plat_priv);
  4525. ret = cnss_get_dev_cfg_node(plat_priv);
  4526. if (ret) {
  4527. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4528. goto reset_plat_dev;
  4529. }
  4530. cnss_initialize_mem_pool(plat_priv->device_id);
  4531. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4532. if (ret)
  4533. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4534. ret);
  4535. ret = cnss_get_rc_num(plat_priv);
  4536. if (ret)
  4537. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4538. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4539. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4540. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4541. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4542. cnss_set_plat_priv(plat_dev, plat_priv);
  4543. cnss_set_device_name(plat_priv);
  4544. platform_set_drvdata(plat_dev, plat_priv);
  4545. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4546. INIT_LIST_HEAD(&plat_priv->clk_list);
  4547. cnss_get_pm_domain_info(plat_priv);
  4548. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4549. cnss_power_misc_params_init(plat_priv);
  4550. cnss_get_tcs_info(plat_priv);
  4551. cnss_get_cpr_info(plat_priv);
  4552. cnss_aop_interface_init(plat_priv);
  4553. cnss_init_control_params(plat_priv);
  4554. ret = cnss_get_resources(plat_priv);
  4555. if (ret)
  4556. goto reset_ctx;
  4557. ret = cnss_register_esoc(plat_priv);
  4558. if (ret)
  4559. goto free_res;
  4560. ret = cnss_register_bus_scale(plat_priv);
  4561. if (ret)
  4562. goto unreg_esoc;
  4563. ret = cnss_create_sysfs(plat_priv);
  4564. if (ret)
  4565. goto unreg_bus_scale;
  4566. ret = cnss_event_work_init(plat_priv);
  4567. if (ret)
  4568. goto remove_sysfs;
  4569. ret = cnss_dms_init(plat_priv);
  4570. if (ret)
  4571. goto deinit_event_work;
  4572. ret = cnss_debugfs_create(plat_priv);
  4573. if (ret)
  4574. goto deinit_dms;
  4575. ret = cnss_misc_init(plat_priv);
  4576. if (ret)
  4577. goto destroy_debugfs;
  4578. ret = cnss_wlan_hw_disable_check(plat_priv);
  4579. if (ret)
  4580. goto deinit_misc;
  4581. /* Make sure all platform related init are done before
  4582. * device power on and bus init.
  4583. */
  4584. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4585. ret = cnss_wlan_device_init(plat_priv);
  4586. if (ret)
  4587. goto deinit_misc;
  4588. } else {
  4589. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4590. }
  4591. cnss_register_coex_service(plat_priv);
  4592. cnss_register_ims_service(plat_priv);
  4593. mutex_init(&plat_priv->tcdev_lock);
  4594. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4595. cnss_pr_info("Platform driver probed successfully.\n");
  4596. return 0;
  4597. deinit_misc:
  4598. cnss_misc_deinit(plat_priv);
  4599. destroy_debugfs:
  4600. cnss_debugfs_destroy(plat_priv);
  4601. deinit_dms:
  4602. cnss_dms_deinit(plat_priv);
  4603. deinit_event_work:
  4604. cnss_event_work_deinit(plat_priv);
  4605. remove_sysfs:
  4606. cnss_remove_sysfs(plat_priv);
  4607. unreg_bus_scale:
  4608. cnss_unregister_bus_scale(plat_priv);
  4609. unreg_esoc:
  4610. cnss_unregister_esoc(plat_priv);
  4611. free_res:
  4612. cnss_put_resources(plat_priv);
  4613. reset_ctx:
  4614. cnss_aop_interface_deinit(plat_priv);
  4615. platform_set_drvdata(plat_dev, NULL);
  4616. cnss_deinitialize_mem_pool();
  4617. reset_plat_dev:
  4618. cnss_clear_plat_priv(plat_priv);
  4619. out:
  4620. return ret;
  4621. }
  4622. static int cnss_remove(struct platform_device *plat_dev)
  4623. {
  4624. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4625. plat_priv->audio_iommu_domain = NULL;
  4626. cnss_genl_exit();
  4627. cnss_unregister_ims_service(plat_priv);
  4628. cnss_unregister_coex_service(plat_priv);
  4629. cnss_bus_deinit(plat_priv);
  4630. cnss_misc_deinit(plat_priv);
  4631. cnss_debugfs_destroy(plat_priv);
  4632. cnss_dms_deinit(plat_priv);
  4633. cnss_qmi_deinit(plat_priv);
  4634. cnss_event_work_deinit(plat_priv);
  4635. cnss_cancel_dms_work();
  4636. cnss_remove_sysfs(plat_priv);
  4637. cnss_unregister_bus_scale(plat_priv);
  4638. cnss_unregister_esoc(plat_priv);
  4639. cnss_put_resources(plat_priv);
  4640. cnss_aop_interface_deinit(plat_priv);
  4641. cnss_deinitialize_mem_pool();
  4642. platform_set_drvdata(plat_dev, NULL);
  4643. cnss_clear_plat_priv(plat_priv);
  4644. return 0;
  4645. }
  4646. static struct platform_driver cnss_platform_driver = {
  4647. .probe = cnss_probe,
  4648. .remove = cnss_remove,
  4649. .driver = {
  4650. .name = "cnss2",
  4651. .of_match_table = cnss_of_match_table,
  4652. #ifdef CONFIG_CNSS_ASYNC
  4653. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4654. #endif
  4655. },
  4656. };
  4657. static bool cnss_check_compatible_node(void)
  4658. {
  4659. struct device_node *dn = NULL;
  4660. for_each_matching_node(dn, cnss_of_match_table) {
  4661. if (of_device_is_available(dn)) {
  4662. cnss_allow_driver_loading = true;
  4663. return true;
  4664. }
  4665. }
  4666. return false;
  4667. }
  4668. /**
  4669. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4670. *
  4671. * Valid device tree node means a node with "compatible" property from the
  4672. * device match table and "status" property is not disabled.
  4673. *
  4674. * Return: true if valid device tree node found, false if not found
  4675. */
  4676. static bool cnss_is_valid_dt_node_found(void)
  4677. {
  4678. struct device_node *dn = NULL;
  4679. for_each_matching_node(dn, cnss_of_match_table) {
  4680. if (of_device_is_available(dn))
  4681. break;
  4682. }
  4683. if (dn)
  4684. return true;
  4685. return false;
  4686. }
  4687. static int __init cnss_initialize(void)
  4688. {
  4689. int ret = 0;
  4690. if (!cnss_is_valid_dt_node_found())
  4691. return -ENODEV;
  4692. if (!cnss_check_compatible_node())
  4693. return ret;
  4694. cnss_debug_init();
  4695. ret = platform_driver_register(&cnss_platform_driver);
  4696. if (ret)
  4697. cnss_debug_deinit();
  4698. ret = cnss_genl_init();
  4699. if (ret < 0)
  4700. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4701. return ret;
  4702. }
  4703. static void __exit cnss_exit(void)
  4704. {
  4705. cnss_genl_exit();
  4706. platform_driver_unregister(&cnss_platform_driver);
  4707. cnss_debug_deinit();
  4708. }
  4709. module_init(cnss_initialize);
  4710. module_exit(cnss_exit);
  4711. MODULE_LICENSE("GPL v2");
  4712. MODULE_DESCRIPTION("CNSS2 Platform Driver");