dsi_panel.c 120 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. #define RSCC_MODE_THRESHOLD_TIME_US 40
  34. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  35. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  36. {
  37. char *bp;
  38. bp = buf;
  39. /* First 7 bytes are cmd header */
  40. *bp++ = 0x0A;
  41. *bp++ = 1;
  42. *bp++ = 0;
  43. *bp++ = 0;
  44. *bp++ = pps_delay_ms;
  45. *bp++ = 0;
  46. *bp++ = 128;
  47. }
  48. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  49. char *buf, int pps_id, u32 size)
  50. {
  51. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  52. buf += DSI_CMD_PPS_HDR_SIZE;
  53. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  54. size);
  55. }
  56. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  57. char *buf, int pps_id, u32 size)
  58. {
  59. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  60. buf += DSI_CMD_PPS_HDR_SIZE;
  61. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  62. size);
  63. }
  64. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  65. {
  66. int rc = 0;
  67. int i;
  68. struct regulator *vreg = NULL;
  69. for (i = 0; i < panel->power_info.count; i++) {
  70. vreg = devm_regulator_get(panel->parent,
  71. panel->power_info.vregs[i].vreg_name);
  72. rc = PTR_ERR_OR_ZERO(vreg);
  73. if (rc) {
  74. DSI_ERR("failed to get %s regulator\n",
  75. panel->power_info.vregs[i].vreg_name);
  76. goto error_put;
  77. }
  78. panel->power_info.vregs[i].vreg = vreg;
  79. }
  80. return rc;
  81. error_put:
  82. for (i = i - 1; i >= 0; i--) {
  83. devm_regulator_put(panel->power_info.vregs[i].vreg);
  84. panel->power_info.vregs[i].vreg = NULL;
  85. }
  86. return rc;
  87. }
  88. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  89. {
  90. int rc = 0;
  91. int i;
  92. for (i = panel->power_info.count - 1; i >= 0; i--)
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. return rc;
  95. }
  96. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  97. {
  98. int rc = 0;
  99. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  100. if (gpio_is_valid(r_config->reset_gpio)) {
  101. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  102. if (rc) {
  103. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  104. goto error;
  105. }
  106. }
  107. if (gpio_is_valid(r_config->disp_en_gpio)) {
  108. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  109. if (rc) {
  110. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  111. goto error_release_reset;
  112. }
  113. }
  114. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  115. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  116. if (rc) {
  117. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  118. goto error_release_disp_en;
  119. }
  120. }
  121. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  122. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  123. if (rc) {
  124. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  125. goto error_release_mode_sel;
  126. }
  127. }
  128. if (gpio_is_valid(panel->panel_test_gpio)) {
  129. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  130. if (rc) {
  131. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  132. rc);
  133. panel->panel_test_gpio = -1;
  134. rc = 0;
  135. }
  136. }
  137. goto error;
  138. error_release_mode_sel:
  139. if (gpio_is_valid(panel->bl_config.en_gpio))
  140. gpio_free(panel->bl_config.en_gpio);
  141. error_release_disp_en:
  142. if (gpio_is_valid(r_config->disp_en_gpio))
  143. gpio_free(r_config->disp_en_gpio);
  144. error_release_reset:
  145. if (gpio_is_valid(r_config->reset_gpio))
  146. gpio_free(r_config->reset_gpio);
  147. error:
  148. return rc;
  149. }
  150. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  151. {
  152. int rc = 0;
  153. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  154. if (gpio_is_valid(r_config->reset_gpio))
  155. gpio_free(r_config->reset_gpio);
  156. if (gpio_is_valid(r_config->disp_en_gpio))
  157. gpio_free(r_config->disp_en_gpio);
  158. if (gpio_is_valid(panel->bl_config.en_gpio))
  159. gpio_free(panel->bl_config.en_gpio);
  160. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  161. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  162. if (gpio_is_valid(panel->panel_test_gpio))
  163. gpio_free(panel->panel_test_gpio);
  164. return rc;
  165. }
  166. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  167. {
  168. if (!gpio_is_valid(reset_gpio)) {
  169. DSI_INFO("failed to pull down the reset gpio\n");
  170. return -EINVAL;
  171. }
  172. gpio_set_value(reset_gpio, 0);
  173. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  174. DSI_INFO("GPIO pulled low to simulate ESD\n");
  175. return 0;
  176. }
  177. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  178. {
  179. struct dsi_parser_utils *utils = &panel->utils;
  180. int reset_gpio;
  181. int rc = 0;
  182. reset_gpio = utils->get_named_gpio(utils->data,
  183. "qcom,platform-reset-gpio", 0);
  184. if (!gpio_is_valid(reset_gpio)) {
  185. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  186. return -EINVAL;
  187. }
  188. rc = gpio_request(reset_gpio, "reset_gpio");
  189. if (rc) {
  190. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  191. return rc;
  192. }
  193. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  194. gpio_free(reset_gpio);
  195. return rc;
  196. }
  197. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  198. {
  199. struct dsi_panel_reset_config *r_config;
  200. if (!panel) {
  201. DSI_ERR("Invalid panel param\n");
  202. return -EINVAL;
  203. }
  204. r_config = &panel->reset_config;
  205. if (!r_config) {
  206. DSI_ERR("Invalid panel reset configuration\n");
  207. return -EINVAL;
  208. }
  209. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  210. }
  211. static int dsi_panel_reset(struct dsi_panel *panel)
  212. {
  213. int rc = 0;
  214. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  215. int i;
  216. if (!gpio_is_valid(r_config->reset_gpio))
  217. goto skip_reset_gpio;
  218. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  219. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  220. if (rc) {
  221. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  222. goto exit;
  223. }
  224. }
  225. if (r_config->count) {
  226. rc = gpio_direction_output(r_config->reset_gpio,
  227. r_config->sequence[0].level);
  228. if (rc) {
  229. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  230. goto exit;
  231. }
  232. }
  233. for (i = 0; i < r_config->count; i++) {
  234. gpio_set_value(r_config->reset_gpio,
  235. r_config->sequence[i].level);
  236. if (r_config->sequence[i].sleep_ms)
  237. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  238. (r_config->sequence[i].sleep_ms * 1000) + 100);
  239. }
  240. skip_reset_gpio:
  241. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  242. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  243. if (rc)
  244. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  245. }
  246. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  247. bool out = true;
  248. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  249. || (panel->reset_config.mode_sel_state
  250. == MODE_GPIO_LOW))
  251. out = false;
  252. else if ((panel->reset_config.mode_sel_state
  253. == MODE_SEL_SINGLE_PORT) ||
  254. (panel->reset_config.mode_sel_state
  255. == MODE_GPIO_HIGH))
  256. out = true;
  257. rc = gpio_direction_output(
  258. panel->reset_config.lcd_mode_sel_gpio, out);
  259. if (rc)
  260. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  261. }
  262. if (gpio_is_valid(panel->panel_test_gpio)) {
  263. rc = gpio_direction_input(panel->panel_test_gpio);
  264. if (rc)
  265. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  266. rc);
  267. }
  268. exit:
  269. return rc;
  270. }
  271. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  272. {
  273. int rc = 0;
  274. struct pinctrl_state *state;
  275. if (panel->host_config.ext_bridge_mode)
  276. return 0;
  277. if (!panel->pinctrl.pinctrl)
  278. return 0;
  279. if (enable)
  280. state = panel->pinctrl.active;
  281. else
  282. state = panel->pinctrl.suspend;
  283. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  284. if (rc)
  285. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  286. panel->name, rc);
  287. return rc;
  288. }
  289. static int dsi_panel_power_on(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  293. if (rc) {
  294. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  295. panel->name, rc);
  296. goto exit;
  297. }
  298. rc = dsi_panel_set_pinctrl_state(panel, true);
  299. if (rc) {
  300. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  301. goto error_disable_vregs;
  302. }
  303. rc = dsi_panel_reset(panel);
  304. if (rc) {
  305. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  306. goto error_disable_gpio;
  307. }
  308. goto exit;
  309. error_disable_gpio:
  310. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  311. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  312. if (gpio_is_valid(panel->bl_config.en_gpio))
  313. gpio_set_value(panel->bl_config.en_gpio, 0);
  314. (void)dsi_panel_set_pinctrl_state(panel, false);
  315. error_disable_vregs:
  316. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  317. exit:
  318. return rc;
  319. }
  320. static int dsi_panel_power_off(struct dsi_panel *panel)
  321. {
  322. int rc = 0;
  323. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  324. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  325. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  326. !panel->reset_gpio_always_on)
  327. gpio_set_value(panel->reset_config.reset_gpio, 0);
  328. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  329. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  330. if (gpio_is_valid(panel->panel_test_gpio)) {
  331. rc = gpio_direction_input(panel->panel_test_gpio);
  332. if (rc)
  333. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  334. rc);
  335. }
  336. rc = dsi_panel_set_pinctrl_state(panel, false);
  337. if (rc) {
  338. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  339. rc);
  340. }
  341. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  342. if (rc)
  343. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  344. panel->name, rc);
  345. return rc;
  346. }
  347. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  348. enum dsi_cmd_set_type type)
  349. {
  350. int rc = 0, i = 0;
  351. ssize_t len;
  352. struct dsi_cmd_desc *cmds;
  353. u32 count;
  354. enum dsi_cmd_set_state state;
  355. struct dsi_display_mode *mode;
  356. if (!panel || !panel->cur_mode)
  357. return -EINVAL;
  358. mode = panel->cur_mode;
  359. cmds = mode->priv_info->cmd_sets[type].cmds;
  360. count = mode->priv_info->cmd_sets[type].count;
  361. state = mode->priv_info->cmd_sets[type].state;
  362. SDE_EVT32(type, state, count);
  363. if (count == 0) {
  364. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  365. panel->name, type);
  366. goto error;
  367. }
  368. for (i = 0; i < count; i++) {
  369. cmds->ctrl_flags = 0;
  370. if (state == DSI_CMD_SET_STATE_LP)
  371. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  372. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  373. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  374. len = dsi_host_transfer_sub(panel->host, cmds);
  375. if (len < 0) {
  376. rc = len;
  377. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  378. goto error;
  379. }
  380. if (cmds->post_wait_ms)
  381. usleep_range(cmds->post_wait_ms*1000,
  382. ((cmds->post_wait_ms*1000)+10));
  383. cmds++;
  384. }
  385. error:
  386. return rc;
  387. }
  388. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  389. {
  390. int rc = 0;
  391. if (panel->host_config.ext_bridge_mode)
  392. return 0;
  393. devm_pinctrl_put(panel->pinctrl.pinctrl);
  394. return rc;
  395. }
  396. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  397. {
  398. int rc = 0;
  399. if (panel->host_config.ext_bridge_mode)
  400. return 0;
  401. /* TODO: pinctrl is defined in dsi dt node */
  402. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  403. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  404. rc = PTR_ERR(panel->pinctrl.pinctrl);
  405. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  406. goto error;
  407. }
  408. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  409. "panel_active");
  410. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  411. rc = PTR_ERR(panel->pinctrl.active);
  412. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  413. goto error;
  414. }
  415. panel->pinctrl.suspend =
  416. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  417. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  418. rc = PTR_ERR(panel->pinctrl.suspend);
  419. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  420. goto error;
  421. }
  422. panel->pinctrl.pwm_pin =
  423. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  424. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  425. panel->pinctrl.pwm_pin = NULL;
  426. DSI_DEBUG("failed to get pinctrl pwm_pin");
  427. }
  428. error:
  429. return rc;
  430. }
  431. static int dsi_panel_wled_register(struct dsi_panel *panel,
  432. struct dsi_backlight_config *bl)
  433. {
  434. struct backlight_device *bd;
  435. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  436. if (!bd) {
  437. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  438. panel->name, -EPROBE_DEFER);
  439. return -EPROBE_DEFER;
  440. }
  441. bl->raw_bd = bd;
  442. return 0;
  443. }
  444. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  445. u32 bl_lvl)
  446. {
  447. int rc = 0;
  448. unsigned long mode_flags = 0;
  449. struct mipi_dsi_device *dsi = NULL;
  450. if (!panel || (bl_lvl > 0xffff)) {
  451. DSI_ERR("invalid params\n");
  452. return -EINVAL;
  453. }
  454. dsi = &panel->mipi_device;
  455. if (unlikely(panel->bl_config.lp_mode)) {
  456. mode_flags = dsi->mode_flags;
  457. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  458. }
  459. if (panel->bl_config.bl_inverted_dbv)
  460. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  461. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  462. if (rc < 0)
  463. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  464. if (unlikely(panel->bl_config.lp_mode))
  465. dsi->mode_flags = mode_flags;
  466. return rc;
  467. }
  468. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  469. u32 bl_lvl)
  470. {
  471. int rc = 0;
  472. u32 duty = 0;
  473. u32 period_ns = 0;
  474. struct dsi_backlight_config *bl;
  475. if (!panel) {
  476. DSI_ERR("Invalid Params\n");
  477. return -EINVAL;
  478. }
  479. bl = &panel->bl_config;
  480. if (!bl->pwm_bl) {
  481. DSI_ERR("pwm device not found\n");
  482. return -EINVAL;
  483. }
  484. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  485. duty = bl_lvl * period_ns;
  486. duty /= bl->bl_max_level;
  487. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  488. if (rc) {
  489. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  490. rc);
  491. goto error;
  492. }
  493. if (bl_lvl == 0 && bl->pwm_enabled) {
  494. pwm_disable(bl->pwm_bl);
  495. bl->pwm_enabled = false;
  496. return 0;
  497. }
  498. if (bl_lvl != 0 && !bl->pwm_enabled) {
  499. rc = pwm_enable(bl->pwm_bl);
  500. if (rc) {
  501. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  502. rc);
  503. goto error;
  504. }
  505. bl->pwm_enabled = true;
  506. }
  507. error:
  508. return rc;
  509. }
  510. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  511. {
  512. int rc = 0;
  513. struct dsi_backlight_config *bl = &panel->bl_config;
  514. if (panel->host_config.ext_bridge_mode)
  515. return 0;
  516. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  517. switch (bl->type) {
  518. case DSI_BACKLIGHT_WLED:
  519. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  520. break;
  521. case DSI_BACKLIGHT_DCS:
  522. rc = dsi_panel_update_backlight(panel, bl_lvl);
  523. break;
  524. case DSI_BACKLIGHT_EXTERNAL:
  525. break;
  526. case DSI_BACKLIGHT_PWM:
  527. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  528. break;
  529. default:
  530. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  531. rc = -ENOTSUPP;
  532. }
  533. return rc;
  534. }
  535. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  536. {
  537. u32 cur_bl_level;
  538. struct backlight_device *bd = bl->raw_bd;
  539. /* default the brightness level to 50% */
  540. cur_bl_level = bl->bl_max_level >> 1;
  541. switch (bl->type) {
  542. case DSI_BACKLIGHT_WLED:
  543. /* Try to query the backlight level from the backlight device */
  544. if (bd->ops && bd->ops->get_brightness)
  545. cur_bl_level = bd->ops->get_brightness(bd);
  546. break;
  547. case DSI_BACKLIGHT_DCS:
  548. case DSI_BACKLIGHT_EXTERNAL:
  549. case DSI_BACKLIGHT_PWM:
  550. default:
  551. /*
  552. * Ideally, we should read the backlight level from the
  553. * panel. For now, just set it default value.
  554. */
  555. break;
  556. }
  557. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  558. return cur_bl_level;
  559. }
  560. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  561. {
  562. struct dsi_backlight_config *bl = &panel->bl_config;
  563. bl->bl_level = dsi_panel_get_brightness(bl);
  564. }
  565. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  566. {
  567. int rc = 0;
  568. struct dsi_backlight_config *bl = &panel->bl_config;
  569. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  570. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  571. rc = PTR_ERR(bl->pwm_bl);
  572. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  573. rc);
  574. return rc;
  575. }
  576. if (panel->pinctrl.pwm_pin) {
  577. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  578. panel->pinctrl.pwm_pin);
  579. if (rc)
  580. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  581. panel->name, rc);
  582. }
  583. return 0;
  584. }
  585. static int dsi_panel_bl_register(struct dsi_panel *panel)
  586. {
  587. int rc = 0;
  588. struct dsi_backlight_config *bl = &panel->bl_config;
  589. if (panel->host_config.ext_bridge_mode)
  590. return 0;
  591. switch (bl->type) {
  592. case DSI_BACKLIGHT_WLED:
  593. rc = dsi_panel_wled_register(panel, bl);
  594. break;
  595. case DSI_BACKLIGHT_DCS:
  596. break;
  597. case DSI_BACKLIGHT_EXTERNAL:
  598. break;
  599. case DSI_BACKLIGHT_PWM:
  600. rc = dsi_panel_pwm_register(panel);
  601. break;
  602. default:
  603. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  604. rc = -ENOTSUPP;
  605. goto error;
  606. }
  607. error:
  608. return rc;
  609. }
  610. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  611. {
  612. struct dsi_backlight_config *bl = &panel->bl_config;
  613. devm_pwm_put(panel->parent, bl->pwm_bl);
  614. }
  615. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  616. {
  617. int rc = 0;
  618. struct dsi_backlight_config *bl = &panel->bl_config;
  619. if (panel->host_config.ext_bridge_mode)
  620. return 0;
  621. switch (bl->type) {
  622. case DSI_BACKLIGHT_WLED:
  623. break;
  624. case DSI_BACKLIGHT_DCS:
  625. break;
  626. case DSI_BACKLIGHT_EXTERNAL:
  627. break;
  628. case DSI_BACKLIGHT_PWM:
  629. dsi_panel_pwm_unregister(panel);
  630. break;
  631. default:
  632. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  633. rc = -ENOTSUPP;
  634. goto error;
  635. }
  636. error:
  637. return rc;
  638. }
  639. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  640. struct dsi_parser_utils *utils)
  641. {
  642. int rc = 0;
  643. u64 tmp64 = 0;
  644. struct dsi_display_mode *display_mode;
  645. struct dsi_display_mode_priv_info *priv_info;
  646. display_mode = container_of(mode, struct dsi_display_mode, timing);
  647. priv_info = display_mode->priv_info;
  648. rc = utils->read_u64(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  650. if (rc == -EOVERFLOW) {
  651. tmp64 = 0;
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  654. }
  655. mode->clk_rate_hz = !rc ? tmp64 : 0;
  656. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  657. mode->pclk_scale.numer = 1;
  658. mode->pclk_scale.denom = 1;
  659. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  660. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  661. &mode->mdp_transfer_time_us);
  662. if (!rc)
  663. display_mode->priv_info->mdp_transfer_time_us =
  664. mode->mdp_transfer_time_us;
  665. else
  666. display_mode->priv_info->mdp_transfer_time_us = 0;
  667. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  668. rc = utils->read_u32(utils->data,
  669. "qcom,mdss-dsi-panel-framerate",
  670. &mode->refresh_rate);
  671. if (rc) {
  672. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  673. rc);
  674. goto error;
  675. }
  676. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  677. &mode->h_active);
  678. if (rc) {
  679. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  680. rc);
  681. goto error;
  682. }
  683. rc = utils->read_u32(utils->data,
  684. "qcom,mdss-dsi-h-front-porch",
  685. &mode->h_front_porch);
  686. if (rc) {
  687. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  688. rc);
  689. goto error;
  690. }
  691. rc = utils->read_u32(utils->data,
  692. "qcom,mdss-dsi-h-back-porch",
  693. &mode->h_back_porch);
  694. if (rc) {
  695. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  696. rc);
  697. goto error;
  698. }
  699. rc = utils->read_u32(utils->data,
  700. "qcom,mdss-dsi-h-pulse-width",
  701. &mode->h_sync_width);
  702. if (rc) {
  703. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  704. rc);
  705. goto error;
  706. }
  707. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  708. &mode->h_skew);
  709. if (rc)
  710. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  711. rc);
  712. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  713. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  714. mode->h_sync_width);
  715. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  716. &mode->v_active);
  717. if (rc) {
  718. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  719. rc);
  720. goto error;
  721. }
  722. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  723. &mode->v_back_porch);
  724. if (rc) {
  725. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  726. rc);
  727. goto error;
  728. }
  729. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  730. &mode->v_front_porch);
  731. if (rc) {
  732. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  733. rc);
  734. goto error;
  735. }
  736. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  737. &mode->v_sync_width);
  738. if (rc) {
  739. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  740. rc);
  741. goto error;
  742. }
  743. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  744. if (rc) {
  745. DSI_DEBUG("qsync min fps not defined in timing node\n");
  746. rc = 0;
  747. }
  748. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  749. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  750. mode->v_sync_width);
  751. error:
  752. return rc;
  753. }
  754. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  755. struct dsi_parser_utils *utils,
  756. const char *name)
  757. {
  758. int rc = 0;
  759. u32 bpp = 0;
  760. enum dsi_pixel_format fmt;
  761. const char *packing;
  762. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  763. if (rc) {
  764. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  765. name, rc);
  766. return rc;
  767. }
  768. host->bpp = bpp;
  769. switch (bpp) {
  770. case 3:
  771. fmt = DSI_PIXEL_FORMAT_RGB111;
  772. break;
  773. case 8:
  774. fmt = DSI_PIXEL_FORMAT_RGB332;
  775. break;
  776. case 12:
  777. fmt = DSI_PIXEL_FORMAT_RGB444;
  778. break;
  779. case 16:
  780. fmt = DSI_PIXEL_FORMAT_RGB565;
  781. break;
  782. case 18:
  783. fmt = DSI_PIXEL_FORMAT_RGB666;
  784. break;
  785. case 24:
  786. default:
  787. fmt = DSI_PIXEL_FORMAT_RGB888;
  788. break;
  789. }
  790. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  791. packing = utils->get_property(utils->data,
  792. "qcom,mdss-dsi-pixel-packing",
  793. NULL);
  794. if (packing && !strcmp(packing, "loose"))
  795. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  796. }
  797. host->dst_format = fmt;
  798. return rc;
  799. }
  800. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  801. struct dsi_parser_utils *utils,
  802. const char *name)
  803. {
  804. int rc = 0;
  805. bool lane_enabled;
  806. u32 num_of_lanes = 0;
  807. lane_enabled = utils->read_bool(utils->data,
  808. "qcom,mdss-dsi-lane-0-state");
  809. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  810. lane_enabled = utils->read_bool(utils->data,
  811. "qcom,mdss-dsi-lane-1-state");
  812. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  813. lane_enabled = utils->read_bool(utils->data,
  814. "qcom,mdss-dsi-lane-2-state");
  815. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  816. lane_enabled = utils->read_bool(utils->data,
  817. "qcom,mdss-dsi-lane-3-state");
  818. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  819. if (host->data_lanes & DSI_DATA_LANE_0)
  820. num_of_lanes++;
  821. if (host->data_lanes & DSI_DATA_LANE_1)
  822. num_of_lanes++;
  823. if (host->data_lanes & DSI_DATA_LANE_2)
  824. num_of_lanes++;
  825. if (host->data_lanes & DSI_DATA_LANE_3)
  826. num_of_lanes++;
  827. host->num_data_lanes = num_of_lanes;
  828. if (host->data_lanes == 0) {
  829. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  830. rc = -EINVAL;
  831. }
  832. return rc;
  833. }
  834. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  835. struct dsi_parser_utils *utils,
  836. const char *name)
  837. {
  838. int rc = 0;
  839. const char *swap_mode;
  840. swap_mode = utils->get_property(utils->data,
  841. "qcom,mdss-dsi-color-order", NULL);
  842. if (swap_mode) {
  843. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  844. host->swap_mode = DSI_COLOR_SWAP_RGB;
  845. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  846. host->swap_mode = DSI_COLOR_SWAP_RBG;
  847. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  848. host->swap_mode = DSI_COLOR_SWAP_BRG;
  849. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  850. host->swap_mode = DSI_COLOR_SWAP_GRB;
  851. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  852. host->swap_mode = DSI_COLOR_SWAP_GBR;
  853. } else {
  854. DSI_ERR("[%s] Unrecognized color order-%s\n",
  855. name, swap_mode);
  856. rc = -EINVAL;
  857. }
  858. } else {
  859. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  860. host->swap_mode = DSI_COLOR_SWAP_RGB;
  861. }
  862. /* bit swap on color channel is not defined in dt */
  863. host->bit_swap_red = false;
  864. host->bit_swap_green = false;
  865. host->bit_swap_blue = false;
  866. return rc;
  867. }
  868. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  869. struct dsi_parser_utils *utils,
  870. const char *name)
  871. {
  872. const char *trig;
  873. int rc = 0;
  874. trig = utils->get_property(utils->data,
  875. "qcom,mdss-dsi-mdp-trigger", NULL);
  876. if (trig) {
  877. if (!strcmp(trig, "none")) {
  878. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  879. } else if (!strcmp(trig, "trigger_te")) {
  880. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  881. } else if (!strcmp(trig, "trigger_sw")) {
  882. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  883. } else if (!strcmp(trig, "trigger_sw_te")) {
  884. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  885. } else {
  886. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  887. name, trig);
  888. rc = -EINVAL;
  889. }
  890. } else {
  891. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  892. name);
  893. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  894. }
  895. trig = utils->get_property(utils->data,
  896. "qcom,mdss-dsi-dma-trigger", NULL);
  897. if (trig) {
  898. if (!strcmp(trig, "none")) {
  899. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  900. } else if (!strcmp(trig, "trigger_te")) {
  901. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  902. } else if (!strcmp(trig, "trigger_sw")) {
  903. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  904. } else if (!strcmp(trig, "trigger_sw_seof")) {
  905. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  906. } else if (!strcmp(trig, "trigger_sw_te")) {
  907. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  908. } else {
  909. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  910. name, trig);
  911. rc = -EINVAL;
  912. }
  913. } else {
  914. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  915. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  916. }
  917. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  918. &host->te_mode);
  919. if (rc) {
  920. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  921. host->te_mode = 1;
  922. rc = 0;
  923. }
  924. return rc;
  925. }
  926. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  927. struct dsi_parser_utils *utils,
  928. const char *name)
  929. {
  930. u32 val = 0, line_no = 0, window = 0;
  931. int rc = 0;
  932. bool panel_cphy_mode = false;
  933. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  934. if (!rc) {
  935. host->t_clk_post = val;
  936. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  937. }
  938. val = 0;
  939. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  940. if (!rc) {
  941. host->t_clk_pre = val;
  942. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  943. }
  944. host->ignore_rx_eot = utils->read_bool(utils->data,
  945. "qcom,mdss-dsi-rx-eot-ignore");
  946. host->append_tx_eot = utils->read_bool(utils->data,
  947. "qcom,mdss-dsi-tx-eot-append");
  948. host->ext_bridge_mode = utils->read_bool(utils->data,
  949. "qcom,mdss-dsi-ext-bridge-mode");
  950. host->force_hs_clk_lane = utils->read_bool(utils->data,
  951. "qcom,mdss-dsi-force-clock-lane-hs");
  952. panel_cphy_mode = utils->read_bool(utils->data,
  953. "qcom,panel-cphy-mode");
  954. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  955. : DSI_PHY_TYPE_DPHY;
  956. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  957. &line_no);
  958. if (rc)
  959. host->dma_sched_line = 0;
  960. else
  961. host->dma_sched_line = line_no;
  962. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  963. &window);
  964. if (rc)
  965. host->dma_sched_window = 0;
  966. else
  967. host->dma_sched_window = window;
  968. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  969. host->dma_sched_line, host->dma_sched_window);
  970. return 0;
  971. }
  972. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  973. struct dsi_parser_utils *utils,
  974. const char *name)
  975. {
  976. int rc = 0;
  977. u32 val = 0;
  978. bool supported = false;
  979. struct dsi_split_link_config *split_link = &host->split_link;
  980. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  981. if (!supported) {
  982. DSI_DEBUG("[%s] Split link is not supported\n", name);
  983. split_link->enabled = false;
  984. return;
  985. }
  986. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  987. if (rc || val < 1) {
  988. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  989. split_link->num_sublinks = 2;
  990. } else {
  991. split_link->num_sublinks = val;
  992. }
  993. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  994. if (rc || val < 1) {
  995. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  996. split_link->lanes_per_sublink = 2;
  997. } else {
  998. split_link->lanes_per_sublink = val;
  999. }
  1000. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  1001. if (!supported)
  1002. split_link->sublink_swap = false;
  1003. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  1004. split_link->num_sublinks, split_link->lanes_per_sublink);
  1005. split_link->enabled = true;
  1006. }
  1007. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1008. {
  1009. int rc = 0;
  1010. struct dsi_parser_utils *utils = &panel->utils;
  1011. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1012. panel->name);
  1013. if (rc) {
  1014. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1015. panel->name, rc);
  1016. goto error;
  1017. }
  1018. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1019. panel->name);
  1020. if (rc) {
  1021. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1022. panel->name, rc);
  1023. goto error;
  1024. }
  1025. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1026. panel->name);
  1027. if (rc) {
  1028. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1029. panel->name, rc);
  1030. goto error;
  1031. }
  1032. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1033. panel->name);
  1034. if (rc) {
  1035. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1036. panel->name, rc);
  1037. goto error;
  1038. }
  1039. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1040. panel->name);
  1041. if (rc) {
  1042. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1043. panel->name, rc);
  1044. goto error;
  1045. }
  1046. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1047. panel->name);
  1048. error:
  1049. return rc;
  1050. }
  1051. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1052. struct device_node *of_node)
  1053. {
  1054. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1055. struct dsi_parser_utils *utils = &panel->utils;
  1056. int val, rc = 0;
  1057. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1058. if (val <= 0) {
  1059. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1060. return rc;
  1061. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1062. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1063. val, panel->dfps_caps.dfps_list_len);
  1064. return -EINVAL;
  1065. }
  1066. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1067. if (!avr_caps->avr_step_fps_list)
  1068. return -ENOMEM;
  1069. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1070. avr_caps->avr_step_fps_list, val);
  1071. if (rc) {
  1072. kfree(avr_caps->avr_step_fps_list);
  1073. return rc;
  1074. }
  1075. avr_caps->avr_step_fps_list_len = val;
  1076. return rc;
  1077. }
  1078. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1079. struct device_node *of_node)
  1080. {
  1081. int rc = 0;
  1082. u32 val = 0, i;
  1083. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1084. struct dsi_parser_utils *utils = &panel->utils;
  1085. const char *name = panel->name;
  1086. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1087. if (!qsync_caps->qsync_support) {
  1088. DSI_DEBUG("qsync feature not enabled\n");
  1089. goto error;
  1090. }
  1091. /**
  1092. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1093. * video mode when there is only one qsync min fps present.
  1094. */
  1095. rc = of_property_read_u32(of_node,
  1096. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1097. &val);
  1098. if (rc)
  1099. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1100. panel->name, rc);
  1101. qsync_caps->qsync_min_fps = val;
  1102. /**
  1103. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1104. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1105. * is defined.
  1106. */
  1107. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1108. "qcom,dsi-supported-qsync-min-fps-list");
  1109. if (qsync_caps->qsync_min_fps_list_len < 1)
  1110. goto qsync_support;
  1111. /**
  1112. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1113. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1114. */
  1115. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1116. qsync_caps->qsync_min_fps) {
  1117. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1118. name);
  1119. rc = -EINVAL;
  1120. goto error;
  1121. }
  1122. if (panel->dfps_caps.dfps_list_len !=
  1123. qsync_caps->qsync_min_fps_list_len) {
  1124. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1125. rc = -EINVAL;
  1126. goto error;
  1127. }
  1128. qsync_caps->qsync_min_fps_list =
  1129. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1130. GFP_KERNEL);
  1131. if (!qsync_caps->qsync_min_fps_list) {
  1132. rc = -ENOMEM;
  1133. goto error;
  1134. }
  1135. rc = utils->read_u32_array(utils->data,
  1136. "qcom,dsi-supported-qsync-min-fps-list",
  1137. qsync_caps->qsync_min_fps_list,
  1138. qsync_caps->qsync_min_fps_list_len);
  1139. if (rc) {
  1140. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1141. rc = -EINVAL;
  1142. goto error;
  1143. }
  1144. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1145. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1146. if (qsync_caps->qsync_min_fps_list[i] <
  1147. qsync_caps->qsync_min_fps)
  1148. qsync_caps->qsync_min_fps =
  1149. qsync_caps->qsync_min_fps_list[i];
  1150. }
  1151. qsync_support:
  1152. /* allow qsync support only if DFPS is with VFP approach */
  1153. if ((panel->dfps_caps.dfps_support) &&
  1154. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1155. qsync_caps->qsync_support = false;
  1156. qsync_caps->qsync_min_fps = 0;
  1157. }
  1158. error:
  1159. if (rc < 0) {
  1160. qsync_caps->qsync_min_fps = 0;
  1161. qsync_caps->qsync_min_fps_list_len = 0;
  1162. }
  1163. return rc;
  1164. }
  1165. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1166. struct dsi_parser_utils *utils)
  1167. {
  1168. int i, rc = 0;
  1169. struct msm_dyn_clk_list *bit_clk_list;
  1170. if (!mode || !mode->priv_info) {
  1171. DSI_ERR("invalid arguments\n");
  1172. return -EINVAL;
  1173. }
  1174. bit_clk_list = &mode->priv_info->bit_clk_list;
  1175. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1176. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1177. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1178. return -EINVAL;
  1179. }
  1180. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1181. if (!bit_clk_list->rates) {
  1182. DSI_ERR("failed to allocate space for bit clock list\n");
  1183. rc = -ENOMEM;
  1184. goto error;
  1185. }
  1186. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1187. if (!bit_clk_list->front_porches) {
  1188. DSI_ERR("failed to allocate space for front porch list\n");
  1189. rc = -ENOMEM;
  1190. goto error;
  1191. }
  1192. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1193. if (!bit_clk_list->pixel_clks_khz) {
  1194. DSI_ERR("failed to allocate space for pclk list\n");
  1195. rc = -ENOMEM;
  1196. goto error;
  1197. }
  1198. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1199. bit_clk_list->rates, bit_clk_list->count);
  1200. if (rc) {
  1201. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1202. goto error;
  1203. }
  1204. for (i = 0; i < bit_clk_list->count; i++)
  1205. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1206. return 0;
  1207. error:
  1208. bit_clk_list->count = 0;
  1209. kfree(bit_clk_list->rates);
  1210. kfree(bit_clk_list->front_porches);
  1211. kfree(bit_clk_list->pixel_clks_khz);
  1212. return rc;
  1213. }
  1214. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1215. {
  1216. int rc = 0;
  1217. bool supported = false;
  1218. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1219. struct dsi_parser_utils *utils = &panel->utils;
  1220. const char *type;
  1221. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1222. if (!supported) {
  1223. dyn_clk_caps->dyn_clk_support = false;
  1224. return rc;
  1225. }
  1226. dyn_clk_caps->dyn_clk_support = true;
  1227. type = utils->get_property(utils->data,
  1228. "qcom,dsi-dyn-clk-type", NULL);
  1229. if (!type) {
  1230. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1231. dyn_clk_caps->maintain_const_fps = false;
  1232. return 0;
  1233. }
  1234. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1235. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1236. dyn_clk_caps->maintain_const_fps = true;
  1237. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1238. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1239. dyn_clk_caps->maintain_const_fps = true;
  1240. } else {
  1241. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1242. dyn_clk_caps->maintain_const_fps = false;
  1243. }
  1244. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1245. return 0;
  1246. }
  1247. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1248. {
  1249. int rc = 0;
  1250. bool supported = false;
  1251. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1252. struct dsi_parser_utils *utils = &panel->utils;
  1253. const char *name = panel->name;
  1254. const char *type;
  1255. u32 i;
  1256. supported = utils->read_bool(utils->data,
  1257. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1258. if (!supported) {
  1259. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1260. dfps_caps->dfps_support = false;
  1261. return rc;
  1262. }
  1263. type = utils->get_property(utils->data,
  1264. "qcom,mdss-dsi-pan-fps-update", NULL);
  1265. if (!type) {
  1266. DSI_ERR("[%s] dfps type not defined\n", name);
  1267. rc = -EINVAL;
  1268. goto error;
  1269. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1270. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1271. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1272. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1273. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1274. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1275. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1276. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1277. } else {
  1278. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1279. rc = -EINVAL;
  1280. goto error;
  1281. }
  1282. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1283. "qcom,dsi-supported-dfps-list");
  1284. if (dfps_caps->dfps_list_len < 1) {
  1285. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1286. rc = -EINVAL;
  1287. goto error;
  1288. }
  1289. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1290. GFP_KERNEL);
  1291. if (!dfps_caps->dfps_list) {
  1292. rc = -ENOMEM;
  1293. goto error;
  1294. }
  1295. rc = utils->read_u32_array(utils->data,
  1296. "qcom,dsi-supported-dfps-list",
  1297. dfps_caps->dfps_list,
  1298. dfps_caps->dfps_list_len);
  1299. if (rc) {
  1300. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1301. rc = -EINVAL;
  1302. goto error;
  1303. }
  1304. dfps_caps->dfps_support = true;
  1305. /* calculate max and min fps */
  1306. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1307. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1308. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1309. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1310. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1311. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1312. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1313. }
  1314. error:
  1315. return rc;
  1316. }
  1317. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1318. struct dsi_parser_utils *utils,
  1319. const char *name)
  1320. {
  1321. int rc = 0;
  1322. const char *traffic_mode;
  1323. u32 vc_id = 0;
  1324. u32 val = 0;
  1325. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1326. if (rc) {
  1327. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1328. cfg->pulse_mode_hsa_he = false;
  1329. } else if (val == 1) {
  1330. cfg->pulse_mode_hsa_he = true;
  1331. } else if (val == 0) {
  1332. cfg->pulse_mode_hsa_he = false;
  1333. } else {
  1334. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1335. name);
  1336. rc = -EINVAL;
  1337. goto error;
  1338. }
  1339. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1340. "qcom,mdss-dsi-hfp-power-mode");
  1341. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1342. "qcom,mdss-dsi-hbp-power-mode");
  1343. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1344. "qcom,mdss-dsi-hsa-power-mode");
  1345. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1346. "qcom,mdss-dsi-last-line-interleave");
  1347. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1348. "qcom,mdss-dsi-bllp-eof-power-mode");
  1349. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1350. "qcom,mdss-dsi-bllp-power-mode");
  1351. traffic_mode = utils->get_property(utils->data,
  1352. "qcom,mdss-dsi-traffic-mode",
  1353. NULL);
  1354. if (!traffic_mode) {
  1355. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1356. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1357. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1358. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1359. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1360. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1361. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1362. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1363. } else {
  1364. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1365. traffic_mode);
  1366. rc = -EINVAL;
  1367. goto error;
  1368. }
  1369. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1370. &vc_id);
  1371. if (rc) {
  1372. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1373. cfg->vc_id = 0;
  1374. } else {
  1375. cfg->vc_id = vc_id;
  1376. }
  1377. error:
  1378. return rc;
  1379. }
  1380. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1381. struct dsi_parser_utils *utils,
  1382. const char *name)
  1383. {
  1384. u32 val = 0;
  1385. int rc = 0;
  1386. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1387. if (rc) {
  1388. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1389. cfg->wr_mem_start = 0x2C;
  1390. } else {
  1391. cfg->wr_mem_start = val;
  1392. }
  1393. val = 0;
  1394. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1395. &val);
  1396. if (rc) {
  1397. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1398. cfg->wr_mem_continue = 0x3C;
  1399. } else {
  1400. cfg->wr_mem_continue = val;
  1401. }
  1402. /* TODO: fix following */
  1403. cfg->max_cmd_packets_interleave = 0;
  1404. val = 0;
  1405. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1406. &val);
  1407. if (rc) {
  1408. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1409. cfg->insert_dcs_command = true;
  1410. } else if (val == 1) {
  1411. cfg->insert_dcs_command = true;
  1412. } else if (val == 0) {
  1413. cfg->insert_dcs_command = false;
  1414. } else {
  1415. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1416. name);
  1417. rc = -EINVAL;
  1418. goto error;
  1419. }
  1420. cfg->mdp_idle_ctrl_en =
  1421. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1422. if (cfg->mdp_idle_ctrl_en) {
  1423. val = 0;
  1424. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1425. if (rc) {
  1426. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1427. cfg->mdp_idle_ctrl_len = 0;
  1428. cfg->mdp_idle_ctrl_en = false;
  1429. rc = 0;
  1430. } else {
  1431. cfg->mdp_idle_ctrl_len = val;
  1432. }
  1433. }
  1434. error:
  1435. return rc;
  1436. }
  1437. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1438. {
  1439. int rc = 0;
  1440. struct dsi_parser_utils *utils = &panel->utils;
  1441. bool panel_mode_switch_enabled;
  1442. enum dsi_op_mode panel_mode;
  1443. const char *mode;
  1444. mode = utils->get_property(utils->data,
  1445. "qcom,mdss-dsi-panel-type", NULL);
  1446. if (!mode) {
  1447. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1448. panel_mode = DSI_OP_VIDEO_MODE;
  1449. } else if (!strcmp(mode, "dsi_video_mode")) {
  1450. panel_mode = DSI_OP_VIDEO_MODE;
  1451. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1452. panel_mode = DSI_OP_CMD_MODE;
  1453. } else {
  1454. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1455. rc = -EINVAL;
  1456. goto error;
  1457. }
  1458. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1459. "qcom,mdss-dsi-panel-mode-switch");
  1460. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1461. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1462. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1463. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1464. utils,
  1465. panel->name);
  1466. if (rc) {
  1467. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1468. panel->name, rc);
  1469. goto error;
  1470. }
  1471. }
  1472. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1473. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1474. utils,
  1475. panel->name);
  1476. if (rc) {
  1477. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1478. panel->name, rc);
  1479. goto error;
  1480. }
  1481. }
  1482. panel->poms_align_vsync = utils->read_bool(utils->data,
  1483. "qcom,poms-align-panel-vsync");
  1484. panel->panel_mode = panel_mode;
  1485. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1486. error:
  1487. return rc;
  1488. }
  1489. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1490. {
  1491. int rc = 0;
  1492. u32 val = 0;
  1493. const char *str;
  1494. struct dsi_panel_phy_props *props = &panel->phy_props;
  1495. struct dsi_parser_utils *utils = &panel->utils;
  1496. const char *name = panel->name;
  1497. rc = utils->read_u32(utils->data,
  1498. "qcom,mdss-pan-physical-width-dimension", &val);
  1499. if (rc) {
  1500. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1501. props->panel_width_mm = 0;
  1502. rc = 0;
  1503. } else {
  1504. props->panel_width_mm = val;
  1505. }
  1506. rc = utils->read_u32(utils->data,
  1507. "qcom,mdss-pan-physical-height-dimension",
  1508. &val);
  1509. if (rc) {
  1510. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1511. props->panel_height_mm = 0;
  1512. rc = 0;
  1513. } else {
  1514. props->panel_height_mm = val;
  1515. }
  1516. str = utils->get_property(utils->data,
  1517. "qcom,mdss-dsi-panel-orientation", NULL);
  1518. if (!str) {
  1519. props->rotation = DSI_PANEL_ROTATE_NONE;
  1520. } else if (!strcmp(str, "180")) {
  1521. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1522. } else if (!strcmp(str, "hflip")) {
  1523. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1524. } else if (!strcmp(str, "vflip")) {
  1525. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1526. } else {
  1527. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1528. rc = -EINVAL;
  1529. goto error;
  1530. }
  1531. error:
  1532. return rc;
  1533. }
  1534. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1535. "qcom,mdss-dsi-pre-on-command",
  1536. "qcom,mdss-dsi-on-command",
  1537. "qcom,vid-on-commands",
  1538. "qcom,cmd-on-commands",
  1539. "qcom,mdss-dsi-post-panel-on-command",
  1540. "qcom,mdss-dsi-pre-off-command",
  1541. "qcom,mdss-dsi-off-command",
  1542. "qcom,mdss-dsi-post-off-command",
  1543. "qcom,mdss-dsi-pre-res-switch",
  1544. "qcom,mdss-dsi-res-switch",
  1545. "qcom,mdss-dsi-post-res-switch",
  1546. "qcom,video-mode-switch-in-commands",
  1547. "qcom,video-mode-switch-out-commands",
  1548. "qcom,cmd-mode-switch-in-commands",
  1549. "qcom,cmd-mode-switch-out-commands",
  1550. "qcom,mdss-dsi-panel-status-command",
  1551. "qcom,mdss-dsi-lp1-command",
  1552. "qcom,mdss-dsi-lp2-command",
  1553. "qcom,mdss-dsi-nolp-command",
  1554. "PPS not parsed from DTSI, generated dynamically",
  1555. "ROI not parsed from DTSI, generated dynamically",
  1556. "qcom,mdss-dsi-timing-switch-command",
  1557. "qcom,mdss-dsi-post-mode-switch-on-command",
  1558. "qcom,mdss-dsi-qsync-on-commands",
  1559. "qcom,mdss-dsi-qsync-off-commands",
  1560. };
  1561. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1562. "qcom,mdss-dsi-pre-on-command-state",
  1563. "qcom,mdss-dsi-on-command-state",
  1564. "qcom,vid-on-commands-state",
  1565. "qcom,cmd-on-commands-state",
  1566. "qcom,mdss-dsi-post-on-command-state",
  1567. "qcom,mdss-dsi-pre-off-command-state",
  1568. "qcom,mdss-dsi-off-command-state",
  1569. "qcom,mdss-dsi-post-off-command-state",
  1570. "qcom,mdss-dsi-pre-res-switch-state",
  1571. "qcom,mdss-dsi-res-switch-state",
  1572. "qcom,mdss-dsi-post-res-switch-state",
  1573. "qcom,video-mode-switch-in-commands-state",
  1574. "qcom,video-mode-switch-out-commands-state",
  1575. "qcom,cmd-mode-switch-in-commands-state",
  1576. "qcom,cmd-mode-switch-out-commands-state",
  1577. "qcom,mdss-dsi-panel-status-command-state",
  1578. "qcom,mdss-dsi-lp1-command-state",
  1579. "qcom,mdss-dsi-lp2-command-state",
  1580. "qcom,mdss-dsi-nolp-command-state",
  1581. "PPS not parsed from DTSI, generated dynamically",
  1582. "ROI not parsed from DTSI, generated dynamically",
  1583. "qcom,mdss-dsi-timing-switch-command-state",
  1584. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1585. "qcom,mdss-dsi-qsync-on-commands-state",
  1586. "qcom,mdss-dsi-qsync-off-commands-state",
  1587. };
  1588. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1589. {
  1590. const u32 cmd_set_min_size = 7;
  1591. u32 count = 0;
  1592. u32 packet_length;
  1593. u32 tmp;
  1594. while (length >= cmd_set_min_size) {
  1595. packet_length = cmd_set_min_size;
  1596. tmp = ((data[5] << 8) | (data[6]));
  1597. packet_length += tmp;
  1598. if (packet_length > length) {
  1599. DSI_ERR("format error\n");
  1600. return -EINVAL;
  1601. }
  1602. length -= packet_length;
  1603. data += packet_length;
  1604. count++;
  1605. }
  1606. *cnt = count;
  1607. return 0;
  1608. }
  1609. int dsi_panel_create_cmd_packets(const char *data,
  1610. u32 length,
  1611. u32 count,
  1612. struct dsi_cmd_desc *cmd)
  1613. {
  1614. int rc = 0;
  1615. int i, j;
  1616. u8 *payload;
  1617. for (i = 0; i < count; i++) {
  1618. u32 size;
  1619. cmd[i].msg.type = data[0];
  1620. cmd[i].msg.channel = data[2];
  1621. cmd[i].msg.flags |= data[3];
  1622. cmd[i].ctrl = 0;
  1623. cmd[i].post_wait_ms = data[4];
  1624. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1625. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1626. cmd[i].last_command = false;
  1627. else
  1628. cmd[i].last_command = true;
  1629. size = cmd[i].msg.tx_len * sizeof(u8);
  1630. payload = kzalloc(size, GFP_KERNEL);
  1631. if (!payload) {
  1632. rc = -ENOMEM;
  1633. goto error_free_payloads;
  1634. }
  1635. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1636. payload[j] = data[7 + j];
  1637. cmd[i].msg.tx_buf = payload;
  1638. data += (7 + cmd[i].msg.tx_len);
  1639. }
  1640. return rc;
  1641. error_free_payloads:
  1642. for (i = i - 1; i >= 0; i--) {
  1643. cmd--;
  1644. kfree(cmd->msg.tx_buf);
  1645. }
  1646. return rc;
  1647. }
  1648. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1649. {
  1650. u32 i = 0;
  1651. struct dsi_cmd_desc *cmd;
  1652. for (i = 0; i < set->count; i++) {
  1653. cmd = &set->cmds[i];
  1654. kfree(cmd->msg.tx_buf);
  1655. }
  1656. }
  1657. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1658. {
  1659. kfree(set->cmds);
  1660. }
  1661. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1662. u32 packet_count)
  1663. {
  1664. u32 size;
  1665. size = packet_count * sizeof(*cmd->cmds);
  1666. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1667. if (!cmd->cmds)
  1668. return -ENOMEM;
  1669. cmd->count = packet_count;
  1670. return 0;
  1671. }
  1672. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1673. enum dsi_cmd_set_type type,
  1674. struct dsi_parser_utils *utils)
  1675. {
  1676. int rc = 0;
  1677. u32 length = 0;
  1678. const char *data;
  1679. const char *state;
  1680. u32 packet_count = 0;
  1681. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1682. &length);
  1683. if (!data) {
  1684. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1685. rc = -ENOTSUPP;
  1686. goto error;
  1687. }
  1688. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1689. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1690. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1691. if (rc) {
  1692. DSI_ERR("commands failed, rc=%d\n", rc);
  1693. goto error;
  1694. }
  1695. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1696. packet_count, length);
  1697. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1698. if (rc) {
  1699. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1700. goto error;
  1701. }
  1702. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1703. cmd->cmds);
  1704. if (rc) {
  1705. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1706. goto error_free_mem;
  1707. }
  1708. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1709. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1710. cmd->state = DSI_CMD_SET_STATE_LP;
  1711. } else if (!strcmp(state, "dsi_hs_mode")) {
  1712. cmd->state = DSI_CMD_SET_STATE_HS;
  1713. } else {
  1714. DSI_ERR("[%s] command state unrecognized-%s\n",
  1715. cmd_set_state_map[type], state);
  1716. goto error_free_mem;
  1717. }
  1718. return rc;
  1719. error_free_mem:
  1720. kfree(cmd->cmds);
  1721. cmd->cmds = NULL;
  1722. error:
  1723. return rc;
  1724. }
  1725. static int dsi_panel_parse_cmd_sets(
  1726. struct dsi_display_mode_priv_info *priv_info,
  1727. struct dsi_parser_utils *utils)
  1728. {
  1729. int rc = 0;
  1730. struct dsi_panel_cmd_set *set;
  1731. u32 i;
  1732. if (!priv_info) {
  1733. DSI_ERR("invalid mode priv info\n");
  1734. return -EINVAL;
  1735. }
  1736. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1737. set = &priv_info->cmd_sets[i];
  1738. set->type = i;
  1739. set->count = 0;
  1740. if (i == DSI_CMD_SET_PPS) {
  1741. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1742. if (rc)
  1743. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1744. i, rc);
  1745. set->state = DSI_CMD_SET_STATE_LP;
  1746. } else {
  1747. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1748. if (rc)
  1749. DSI_DEBUG("failed to parse set %d\n", i);
  1750. }
  1751. }
  1752. rc = 0;
  1753. return rc;
  1754. }
  1755. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1756. {
  1757. int rc = 0;
  1758. int i;
  1759. u32 length = 0;
  1760. u32 count = 0;
  1761. u32 size = 0;
  1762. u32 *arr_32 = NULL;
  1763. const u32 *arr;
  1764. struct dsi_parser_utils *utils = &panel->utils;
  1765. struct dsi_reset_seq *seq;
  1766. if (panel->host_config.ext_bridge_mode)
  1767. return 0;
  1768. arr = utils->get_property(utils->data,
  1769. "qcom,mdss-dsi-reset-sequence", &length);
  1770. if (!arr) {
  1771. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1772. rc = -EINVAL;
  1773. goto error;
  1774. }
  1775. if (length & 0x1) {
  1776. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1777. panel->name);
  1778. rc = -EINVAL;
  1779. goto error;
  1780. }
  1781. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1782. length = length / sizeof(u32);
  1783. size = length * sizeof(u32);
  1784. arr_32 = kzalloc(size, GFP_KERNEL);
  1785. if (!arr_32) {
  1786. rc = -ENOMEM;
  1787. goto error;
  1788. }
  1789. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1790. arr_32, length);
  1791. if (rc) {
  1792. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1793. goto error_free_arr_32;
  1794. }
  1795. count = length / 2;
  1796. size = count * sizeof(*seq);
  1797. seq = kzalloc(size, GFP_KERNEL);
  1798. if (!seq) {
  1799. rc = -ENOMEM;
  1800. goto error_free_arr_32;
  1801. }
  1802. panel->reset_config.sequence = seq;
  1803. panel->reset_config.count = count;
  1804. for (i = 0; i < length; i += 2) {
  1805. seq->level = arr_32[i];
  1806. seq->sleep_ms = arr_32[i + 1];
  1807. seq++;
  1808. }
  1809. error_free_arr_32:
  1810. kfree(arr_32);
  1811. error:
  1812. return rc;
  1813. }
  1814. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1815. {
  1816. struct dsi_parser_utils *utils = &panel->utils;
  1817. const char *string;
  1818. int i, rc = 0;
  1819. panel->ulps_feature_enabled =
  1820. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1821. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1822. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1823. panel->ulps_suspend_enabled =
  1824. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1825. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1826. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1827. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1828. "qcom,mdss-dsi-te-using-wd");
  1829. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1830. "qcom,cmd-sync-wait-broadcast");
  1831. panel->lp11_init = utils->read_bool(utils->data,
  1832. "qcom,mdss-dsi-lp11-init");
  1833. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1834. "qcom,platform-reset-gpio-always-on");
  1835. panel->spr_info.enable = false;
  1836. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1837. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1838. if (!rc) {
  1839. // find match for pack-type string
  1840. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1841. if (msm_spr_pack_type_str[i] &&
  1842. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1843. panel->spr_info.enable = true;
  1844. panel->spr_info.pack_type = i;
  1845. break;
  1846. }
  1847. }
  1848. }
  1849. pr_debug("%s source side spr packing, pack-type %s\n",
  1850. panel->spr_info.enable ? "enable" : "disable",
  1851. panel->spr_info.enable ?
  1852. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1853. return 0;
  1854. }
  1855. static int dsi_panel_parse_jitter_config(
  1856. struct dsi_display_mode *mode,
  1857. struct dsi_parser_utils *utils)
  1858. {
  1859. int rc;
  1860. struct dsi_display_mode_priv_info *priv_info;
  1861. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1862. u64 jitter_val = 0;
  1863. priv_info = mode->priv_info;
  1864. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1865. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1866. if (rc) {
  1867. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1868. } else {
  1869. jitter_val = jitter[0];
  1870. jitter_val = div_u64(jitter_val, jitter[1]);
  1871. }
  1872. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1873. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1874. priv_info->panel_jitter_denom =
  1875. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1876. } else {
  1877. priv_info->panel_jitter_numer = jitter[0];
  1878. priv_info->panel_jitter_denom = jitter[1];
  1879. }
  1880. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1881. &priv_info->panel_prefill_lines);
  1882. if (rc) {
  1883. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1884. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1885. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1886. } else if (priv_info->panel_prefill_lines >=
  1887. DSI_V_TOTAL(&mode->timing)) {
  1888. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1889. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1890. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1891. }
  1892. return 0;
  1893. }
  1894. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1895. {
  1896. int rc = 0;
  1897. char *supply_name;
  1898. if (panel->host_config.ext_bridge_mode)
  1899. return 0;
  1900. if (!strcmp(panel->type, "primary"))
  1901. supply_name = "qcom,panel-supply-entries";
  1902. else
  1903. supply_name = "qcom,panel-sec-supply-entries";
  1904. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1905. &panel->power_info, supply_name);
  1906. if (rc) {
  1907. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1908. goto error;
  1909. }
  1910. error:
  1911. return rc;
  1912. }
  1913. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1914. struct msm_io_res *io_res)
  1915. {
  1916. struct dsi_parser_utils *utils = &panel->utils;
  1917. struct list_head *mem_list = &io_res->mem;
  1918. int reset_gpio;
  1919. int rc = 0;
  1920. reset_gpio = utils->get_named_gpio(utils->data,
  1921. "qcom,platform-reset-gpio", 0);
  1922. if (gpio_is_valid(reset_gpio)) {
  1923. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1924. if (rc) {
  1925. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1926. goto end;
  1927. }
  1928. }
  1929. end:
  1930. return rc;
  1931. }
  1932. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1933. {
  1934. int rc = 0;
  1935. const char *data;
  1936. struct dsi_parser_utils *utils = &panel->utils;
  1937. char *reset_gpio_name, *mode_set_gpio_name;
  1938. if (!strcmp(panel->type, "primary")) {
  1939. reset_gpio_name = "qcom,platform-reset-gpio";
  1940. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1941. } else {
  1942. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1943. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1944. }
  1945. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1946. reset_gpio_name, 0);
  1947. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1948. !panel->host_config.ext_bridge_mode) {
  1949. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1950. panel->reset_config.reset_gpio);
  1951. }
  1952. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1953. "qcom,5v-boost-gpio",
  1954. 0);
  1955. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1956. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1957. panel->name, rc);
  1958. panel->reset_config.disp_en_gpio =
  1959. utils->get_named_gpio(utils->data,
  1960. "qcom,platform-en-gpio", 0);
  1961. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1962. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1963. panel->name, rc);
  1964. }
  1965. }
  1966. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1967. utils->data, mode_set_gpio_name, 0);
  1968. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1969. DSI_DEBUG("mode gpio not specified\n");
  1970. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1971. data = utils->get_property(utils->data,
  1972. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1973. if (data) {
  1974. if (!strcmp(data, "single_port"))
  1975. panel->reset_config.mode_sel_state =
  1976. MODE_SEL_SINGLE_PORT;
  1977. else if (!strcmp(data, "dual_port"))
  1978. panel->reset_config.mode_sel_state =
  1979. MODE_SEL_DUAL_PORT;
  1980. else if (!strcmp(data, "high"))
  1981. panel->reset_config.mode_sel_state =
  1982. MODE_GPIO_HIGH;
  1983. else if (!strcmp(data, "low"))
  1984. panel->reset_config.mode_sel_state =
  1985. MODE_GPIO_LOW;
  1986. } else {
  1987. /* Set default mode as SPLIT mode */
  1988. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1989. }
  1990. /* TODO: release memory */
  1991. rc = dsi_panel_parse_reset_sequence(panel);
  1992. if (rc) {
  1993. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1994. panel->name, rc);
  1995. goto error;
  1996. }
  1997. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1998. "qcom,mdss-dsi-panel-test-pin",
  1999. 0);
  2000. if (!gpio_is_valid(panel->panel_test_gpio))
  2001. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  2002. __LINE__);
  2003. error:
  2004. return rc;
  2005. }
  2006. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2007. {
  2008. int rc = 0;
  2009. u32 val;
  2010. struct dsi_backlight_config *config = &panel->bl_config;
  2011. struct dsi_parser_utils *utils = &panel->utils;
  2012. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2013. &val);
  2014. if (rc) {
  2015. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2016. goto error;
  2017. }
  2018. config->pwm_period_usecs = val;
  2019. error:
  2020. return rc;
  2021. }
  2022. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2023. {
  2024. int rc = 0;
  2025. u32 val = 0;
  2026. const char *bl_type = NULL;
  2027. const char *data = NULL;
  2028. const char *state = NULL;
  2029. struct dsi_parser_utils *utils = &panel->utils;
  2030. char *bl_name = NULL;
  2031. if (!strcmp(panel->type, "primary"))
  2032. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2033. else
  2034. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2035. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2036. if (!bl_type) {
  2037. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2038. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2039. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2040. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2041. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2042. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2043. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2044. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2045. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2046. } else {
  2047. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2048. panel->name, bl_type);
  2049. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2050. }
  2051. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2052. if (!data) {
  2053. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2054. } else if (!strcmp(data, "delay_until_first_frame")) {
  2055. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2056. } else {
  2057. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2058. panel->name, data);
  2059. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2060. }
  2061. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2062. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2063. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2064. if (rc) {
  2065. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2066. panel->name);
  2067. panel->bl_config.bl_min_level = 0;
  2068. } else {
  2069. panel->bl_config.bl_min_level = val;
  2070. }
  2071. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2072. if (rc) {
  2073. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2074. panel->name);
  2075. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2076. } else {
  2077. panel->bl_config.bl_max_level = val;
  2078. }
  2079. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2080. &val);
  2081. if (rc) {
  2082. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2083. panel->name);
  2084. panel->bl_config.brightness_max_level = 255;
  2085. rc = 0;
  2086. } else {
  2087. panel->bl_config.brightness_max_level = val;
  2088. }
  2089. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2090. "qcom,mdss-dsi-bl-inverted-dbv");
  2091. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2092. if (!state || !strcmp(state, "dsi_hs_mode"))
  2093. panel->bl_config.lp_mode = false;
  2094. else if (!strcmp(state, "dsi_lp_mode"))
  2095. panel->bl_config.lp_mode = true;
  2096. else
  2097. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2098. state);
  2099. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2100. rc = dsi_panel_parse_bl_pwm_config(panel);
  2101. if (rc) {
  2102. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2103. panel->name, rc);
  2104. goto error;
  2105. }
  2106. }
  2107. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2108. "qcom,platform-bklight-en-gpio",
  2109. 0);
  2110. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2111. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2112. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2113. panel->name, rc);
  2114. rc = -EPROBE_DEFER;
  2115. goto error;
  2116. } else {
  2117. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2118. panel->name, rc);
  2119. rc = 0;
  2120. goto error;
  2121. }
  2122. }
  2123. error:
  2124. return rc;
  2125. }
  2126. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2127. struct dsi_parser_utils *utils)
  2128. {
  2129. const char *data;
  2130. u32 len, i;
  2131. int rc = 0;
  2132. struct dsi_display_mode_priv_info *priv_info;
  2133. u64 pixel_clk_khz;
  2134. if (!mode || !mode->priv_info)
  2135. return -EINVAL;
  2136. priv_info = mode->priv_info;
  2137. data = utils->get_property(utils->data,
  2138. "qcom,mdss-dsi-panel-phy-timings", &len);
  2139. if (!data) {
  2140. DSI_DEBUG("Unable to read Phy timing settings\n");
  2141. } else {
  2142. priv_info->phy_timing_val =
  2143. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2144. if (!priv_info->phy_timing_val)
  2145. return -EINVAL;
  2146. for (i = 0; i < len; i++)
  2147. priv_info->phy_timing_val[i] = data[i];
  2148. priv_info->phy_timing_len = len;
  2149. }
  2150. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2151. /*
  2152. * For command mode we update the pclk as part of
  2153. * function dsi_panel_calc_dsi_transfer_time( )
  2154. * as we set it based on dsi clock or mdp transfer time.
  2155. */
  2156. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2157. DSI_V_TOTAL(&mode->timing) *
  2158. mode->timing.refresh_rate);
  2159. do_div(pixel_clk_khz, 1000);
  2160. mode->pixel_clk_khz = pixel_clk_khz;
  2161. }
  2162. return rc;
  2163. }
  2164. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2165. struct dsi_parser_utils *utils)
  2166. {
  2167. u32 data;
  2168. int rc = -EINVAL;
  2169. int intf_width;
  2170. const char *compression;
  2171. struct dsi_display_mode_priv_info *priv_info;
  2172. if (!mode || !mode->priv_info)
  2173. return -EINVAL;
  2174. priv_info = mode->priv_info;
  2175. priv_info->dsc_enabled = false;
  2176. compression = utils->get_property(utils->data,
  2177. "qcom,compression-mode", NULL);
  2178. if (compression && !strcmp(compression, "dsc"))
  2179. priv_info->dsc_enabled = true;
  2180. if (!priv_info->dsc_enabled) {
  2181. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2182. return 0;
  2183. }
  2184. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2185. if (rc) {
  2186. priv_info->dsc.config.dsc_version_major = 0x1;
  2187. priv_info->dsc.config.dsc_version_minor = 0x1;
  2188. rc = 0;
  2189. } else {
  2190. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2191. * major version information
  2192. */
  2193. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2194. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2195. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2196. ((priv_info->dsc.config.dsc_version_minor
  2197. != 0x1) &&
  2198. (priv_info->dsc.config.dsc_version_minor
  2199. != 0x2))) {
  2200. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2201. __func__,
  2202. priv_info->dsc.config.dsc_version_major,
  2203. priv_info->dsc.config.dsc_version_minor
  2204. );
  2205. rc = -EINVAL;
  2206. goto error;
  2207. }
  2208. }
  2209. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2210. if (rc) {
  2211. priv_info->dsc.scr_rev = 0x0;
  2212. rc = 0;
  2213. } else {
  2214. priv_info->dsc.scr_rev = data & 0xff;
  2215. /* only one scr rev supported */
  2216. if (priv_info->dsc.scr_rev > 0x1) {
  2217. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2218. __func__, priv_info->dsc.scr_rev);
  2219. rc = -EINVAL;
  2220. goto error;
  2221. }
  2222. }
  2223. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2224. if (rc) {
  2225. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2226. goto error;
  2227. }
  2228. priv_info->dsc.config.slice_height = data;
  2229. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2230. if (rc) {
  2231. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2232. goto error;
  2233. }
  2234. priv_info->dsc.config.slice_width = data;
  2235. intf_width = mode->timing.h_active;
  2236. if (intf_width % priv_info->dsc.config.slice_width) {
  2237. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2238. intf_width, priv_info->dsc.config.slice_width);
  2239. rc = -EINVAL;
  2240. goto error;
  2241. }
  2242. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2243. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2244. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2245. if (rc) {
  2246. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2247. goto error;
  2248. } else if (!data || (data > 2)) {
  2249. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2250. goto error;
  2251. }
  2252. priv_info->dsc.slice_per_pkt = data;
  2253. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2254. &data);
  2255. if (rc) {
  2256. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2257. goto error;
  2258. }
  2259. priv_info->dsc.config.bits_per_component = data;
  2260. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2261. if (rc) {
  2262. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2263. data = 0;
  2264. }
  2265. priv_info->dsc.pps_delay_ms = data;
  2266. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2267. &data);
  2268. if (rc) {
  2269. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2270. goto error;
  2271. }
  2272. priv_info->dsc.config.bits_per_pixel = data << 4;
  2273. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2274. &data);
  2275. if (rc) {
  2276. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2277. rc = 0;
  2278. data = MSM_CHROMA_444;
  2279. } else if (data == MSM_CHROMA_422) {
  2280. priv_info->dsc.config.native_422 = 1;
  2281. } else if (data == MSM_CHROMA_420) {
  2282. priv_info->dsc.config.native_420 = 1;
  2283. }
  2284. priv_info->dsc.chroma_format = data;
  2285. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2286. &data);
  2287. if (rc) {
  2288. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2289. rc = 0;
  2290. data = MSM_RGB;
  2291. }
  2292. priv_info->dsc.source_color_space = data;
  2293. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2294. "qcom,mdss-dsc-block-prediction-enable");
  2295. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2296. priv_info->dsc.config.slice_width);
  2297. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2298. priv_info->dsc.scr_rev);
  2299. if (rc) {
  2300. DSI_DEBUG("failed populating dsc params\n");
  2301. rc = -EINVAL;
  2302. goto error;
  2303. }
  2304. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2305. if (rc) {
  2306. DSI_DEBUG("failed populating other dsc params\n");
  2307. rc = -EINVAL;
  2308. goto error;
  2309. }
  2310. priv_info->pclk_scale.numer =
  2311. priv_info->dsc.config.bits_per_pixel >> 4;
  2312. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2313. priv_info->dsc.chroma_format,
  2314. priv_info->dsc.config.bits_per_component);
  2315. mode->timing.dsc_enabled = true;
  2316. mode->timing.dsc = &priv_info->dsc;
  2317. mode->timing.pclk_scale = priv_info->pclk_scale;
  2318. error:
  2319. return rc;
  2320. }
  2321. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2322. struct dsi_parser_utils *utils, int traffic_mode)
  2323. {
  2324. u32 data;
  2325. int rc = -EINVAL;
  2326. const char *compression;
  2327. struct dsi_display_mode_priv_info *priv_info;
  2328. int intf_width;
  2329. if (!mode || !mode->priv_info)
  2330. return -EINVAL;
  2331. priv_info = mode->priv_info;
  2332. priv_info->vdc_enabled = false;
  2333. compression = utils->get_property(utils->data,
  2334. "qcom,compression-mode", NULL);
  2335. if (compression && !strcmp(compression, "vdc"))
  2336. priv_info->vdc_enabled = true;
  2337. if (!priv_info->vdc_enabled) {
  2338. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2339. return 0;
  2340. }
  2341. priv_info->vdc.traffic_mode = traffic_mode;
  2342. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2343. if (rc) {
  2344. priv_info->vdc.version_major = 0x1;
  2345. priv_info->vdc.version_minor = 0x2;
  2346. priv_info->vdc.version_release = 0x0;
  2347. rc = 0;
  2348. } else {
  2349. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2350. * major version information
  2351. */
  2352. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2353. priv_info->vdc.version_minor = data & 0x0F;
  2354. if ((priv_info->vdc.version_major != 0x1) &&
  2355. ((priv_info->vdc.version_minor
  2356. != 0x2))) {
  2357. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2358. __func__,
  2359. priv_info->vdc.version_major,
  2360. priv_info->vdc.version_minor
  2361. );
  2362. rc = -EINVAL;
  2363. goto error;
  2364. }
  2365. }
  2366. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2367. if (rc) {
  2368. priv_info->vdc.version_release = 0x0;
  2369. rc = 0;
  2370. } else {
  2371. priv_info->vdc.version_release = data & 0xff;
  2372. /* only one release version is supported */
  2373. if (priv_info->vdc.version_release != 0x0) {
  2374. DSI_ERR("unsupported vdc release version %d\n",
  2375. priv_info->vdc.version_release);
  2376. rc = -EINVAL;
  2377. goto error;
  2378. }
  2379. }
  2380. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2381. priv_info->vdc.version_major,
  2382. priv_info->vdc.version_minor,
  2383. priv_info->vdc.version_release);
  2384. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2385. if (rc) {
  2386. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2387. goto error;
  2388. }
  2389. priv_info->vdc.slice_height = data;
  2390. /* slice height should be atleast 16 lines */
  2391. if (priv_info->vdc.slice_height < 16) {
  2392. DSI_ERR("invalid slice height %d\n",
  2393. priv_info->vdc.slice_height);
  2394. rc = -EINVAL;
  2395. goto error;
  2396. }
  2397. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2398. if (rc) {
  2399. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2400. goto error;
  2401. }
  2402. priv_info->vdc.slice_width = data;
  2403. /*
  2404. * slide-width should be multiple of 8
  2405. * slice-width should be atlease 64 pixels
  2406. */
  2407. if ((priv_info->vdc.slice_width & 7) ||
  2408. (priv_info->vdc.slice_width < 64)) {
  2409. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2410. rc = -EINVAL;
  2411. goto error;
  2412. }
  2413. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2414. if (rc) {
  2415. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2416. goto error;
  2417. } else if (!data || (data > 2)) {
  2418. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2419. rc = -EINVAL;
  2420. goto error;
  2421. }
  2422. intf_width = mode->timing.h_active;
  2423. priv_info->vdc.slice_per_pkt = data;
  2424. priv_info->vdc.frame_width = mode->timing.h_active;
  2425. priv_info->vdc.frame_height = mode->timing.v_active;
  2426. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2427. &data);
  2428. if (rc) {
  2429. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2430. goto error;
  2431. }
  2432. priv_info->vdc.bits_per_component = data;
  2433. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2434. if (rc) {
  2435. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2436. data = 0;
  2437. }
  2438. priv_info->vdc.pps_delay_ms = data;
  2439. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2440. &data);
  2441. if (rc) {
  2442. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2443. goto error;
  2444. }
  2445. priv_info->vdc.bits_per_pixel = data << 4;
  2446. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2447. &data);
  2448. if (rc) {
  2449. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2450. rc = 0;
  2451. data = MSM_CHROMA_444;
  2452. }
  2453. priv_info->vdc.chroma_format = data;
  2454. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2455. &data);
  2456. if (rc) {
  2457. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2458. rc = 0;
  2459. data = MSM_RGB;
  2460. }
  2461. priv_info->vdc.source_color_space = data;
  2462. rc = sde_vdc_populate_config(&priv_info->vdc,
  2463. intf_width, traffic_mode);
  2464. if (rc) {
  2465. DSI_DEBUG("failed populating vdc config\n");
  2466. rc = -EINVAL;
  2467. goto error;
  2468. }
  2469. priv_info->pclk_scale.numer =
  2470. priv_info->vdc.bits_per_pixel >> 4;
  2471. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2472. priv_info->vdc.chroma_format,
  2473. priv_info->vdc.bits_per_component);
  2474. mode->timing.vdc_enabled = true;
  2475. mode->timing.vdc = &priv_info->vdc;
  2476. mode->timing.pclk_scale = priv_info->pclk_scale;
  2477. error:
  2478. return rc;
  2479. }
  2480. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2481. {
  2482. int rc = 0;
  2483. struct drm_panel_hdr_properties *hdr_prop;
  2484. struct dsi_parser_utils *utils = &panel->utils;
  2485. hdr_prop = &panel->hdr_props;
  2486. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2487. "qcom,mdss-dsi-panel-hdr-enabled");
  2488. if (hdr_prop->hdr_enabled) {
  2489. rc = utils->read_u32_array(utils->data,
  2490. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2491. hdr_prop->display_primaries,
  2492. DISPLAY_PRIMARIES_MAX);
  2493. if (rc) {
  2494. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2495. __func__, __LINE__, rc);
  2496. hdr_prop->hdr_enabled = false;
  2497. return rc;
  2498. }
  2499. rc = utils->read_u32(utils->data,
  2500. "qcom,mdss-dsi-panel-peak-brightness",
  2501. &(hdr_prop->peak_brightness));
  2502. if (rc) {
  2503. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2504. __func__, __LINE__, rc);
  2505. hdr_prop->hdr_enabled = false;
  2506. return rc;
  2507. }
  2508. rc = utils->read_u32(utils->data,
  2509. "qcom,mdss-dsi-panel-blackness-level",
  2510. &(hdr_prop->blackness_level));
  2511. if (rc) {
  2512. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2513. __func__, __LINE__, rc);
  2514. hdr_prop->hdr_enabled = false;
  2515. return rc;
  2516. }
  2517. }
  2518. return 0;
  2519. }
  2520. static int dsi_panel_parse_topology(
  2521. struct dsi_display_mode_priv_info *priv_info,
  2522. struct dsi_parser_utils *utils,
  2523. int topology_override)
  2524. {
  2525. struct msm_display_topology *topology;
  2526. u32 top_count, top_sel, *array = NULL;
  2527. int i, len = 0;
  2528. int rc = -EINVAL;
  2529. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2530. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2531. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2532. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2533. return rc;
  2534. }
  2535. top_count = len / TOPOLOGY_SET_LEN;
  2536. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2537. if (!array)
  2538. return -ENOMEM;
  2539. rc = utils->read_u32_array(utils->data,
  2540. "qcom,display-topology", array, len);
  2541. if (rc) {
  2542. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2543. goto read_fail;
  2544. }
  2545. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2546. if (!topology) {
  2547. rc = -ENOMEM;
  2548. goto read_fail;
  2549. }
  2550. for (i = 0; i < top_count; i++) {
  2551. struct msm_display_topology *top = &topology[i];
  2552. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2553. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2554. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2555. }
  2556. if (topology_override >= 0 && topology_override < top_count) {
  2557. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2558. topology_override,
  2559. topology[topology_override].num_lm,
  2560. topology[topology_override].num_enc,
  2561. topology[topology_override].num_intf);
  2562. top_sel = topology_override;
  2563. goto parse_done;
  2564. }
  2565. rc = utils->read_u32(utils->data,
  2566. "qcom,default-topology-index", &top_sel);
  2567. if (rc) {
  2568. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2569. goto parse_fail;
  2570. }
  2571. if (top_sel >= top_count) {
  2572. rc = -EINVAL;
  2573. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2574. rc);
  2575. goto parse_fail;
  2576. }
  2577. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2578. !topology[top_sel].num_enc) {
  2579. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2580. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2581. topology[top_sel].num_enc);
  2582. goto parse_fail;
  2583. }
  2584. if (priv_info->dsc_enabled)
  2585. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2586. else if (priv_info->vdc_enabled)
  2587. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2588. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2589. topology[top_sel].num_lm,
  2590. topology[top_sel].num_enc,
  2591. topology[top_sel].num_intf);
  2592. parse_done:
  2593. memcpy(&priv_info->topology, &topology[top_sel],
  2594. sizeof(struct msm_display_topology));
  2595. parse_fail:
  2596. kfree(topology);
  2597. read_fail:
  2598. kfree(array);
  2599. return rc;
  2600. }
  2601. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2602. struct msm_roi_alignment *align)
  2603. {
  2604. int len = 0, rc = 0;
  2605. u32 value[6];
  2606. struct property *data;
  2607. if (!align)
  2608. return -EINVAL;
  2609. memset(align, 0, sizeof(*align));
  2610. data = utils->find_property(utils->data,
  2611. "qcom,panel-roi-alignment", &len);
  2612. len /= sizeof(u32);
  2613. if (!data) {
  2614. DSI_ERR("panel roi alignment not found\n");
  2615. rc = -EINVAL;
  2616. } else if (len != 6) {
  2617. DSI_ERR("incorrect roi alignment len %d\n", len);
  2618. rc = -EINVAL;
  2619. } else {
  2620. rc = utils->read_u32_array(utils->data,
  2621. "qcom,panel-roi-alignment", value, len);
  2622. if (rc)
  2623. DSI_DEBUG("error reading panel roi alignment values\n");
  2624. else {
  2625. align->xstart_pix_align = value[0];
  2626. align->ystart_pix_align = value[1];
  2627. align->width_pix_align = value[2];
  2628. align->height_pix_align = value[3];
  2629. align->min_width = value[4];
  2630. align->min_height = value[5];
  2631. }
  2632. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2633. align->xstart_pix_align,
  2634. align->width_pix_align,
  2635. align->ystart_pix_align,
  2636. align->height_pix_align,
  2637. align->min_width,
  2638. align->min_height);
  2639. }
  2640. return rc;
  2641. }
  2642. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2643. struct dsi_parser_utils *utils)
  2644. {
  2645. struct msm_roi_caps *roi_caps = NULL;
  2646. const char *data;
  2647. int rc = 0;
  2648. if (!mode || !mode->priv_info) {
  2649. DSI_ERR("invalid arguments\n");
  2650. return -EINVAL;
  2651. }
  2652. roi_caps = &mode->priv_info->roi_caps;
  2653. memset(roi_caps, 0, sizeof(*roi_caps));
  2654. data = utils->get_property(utils->data,
  2655. "qcom,partial-update-enabled", NULL);
  2656. if (data) {
  2657. if (!strcmp(data, "dual_roi"))
  2658. roi_caps->num_roi = 2;
  2659. else if (!strcmp(data, "single_roi"))
  2660. roi_caps->num_roi = 1;
  2661. else {
  2662. DSI_INFO(
  2663. "invalid value for qcom,partial-update-enabled: %s\n",
  2664. data);
  2665. return 0;
  2666. }
  2667. } else {
  2668. DSI_DEBUG("partial update disabled as the property is not set\n");
  2669. return 0;
  2670. }
  2671. roi_caps->merge_rois = utils->read_bool(utils->data,
  2672. "qcom,partial-update-roi-merge");
  2673. roi_caps->enabled = roi_caps->num_roi > 0;
  2674. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2675. roi_caps->enabled);
  2676. if (roi_caps->enabled)
  2677. rc = dsi_panel_parse_roi_alignment(utils,
  2678. &roi_caps->align);
  2679. if (rc)
  2680. memset(roi_caps, 0, sizeof(*roi_caps));
  2681. return rc;
  2682. }
  2683. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2684. struct dsi_parser_utils *utils)
  2685. {
  2686. if (!mode || !mode->priv_info) {
  2687. DSI_ERR("invalid arguments\n");
  2688. return false;
  2689. }
  2690. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2691. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2692. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2693. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2694. if (!mode->panel_mode_caps)
  2695. return false;
  2696. return true;
  2697. };
  2698. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2699. {
  2700. int dms_enabled;
  2701. const char *data;
  2702. struct dsi_parser_utils *utils = &panel->utils;
  2703. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2704. dms_enabled = utils->read_bool(utils->data,
  2705. "qcom,dynamic-mode-switch-enabled");
  2706. if (!dms_enabled)
  2707. return 0;
  2708. data = utils->get_property(utils->data,
  2709. "qcom,dynamic-mode-switch-type", NULL);
  2710. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2711. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2712. } else {
  2713. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2714. panel->name, data);
  2715. return -EINVAL;
  2716. }
  2717. return 0;
  2718. };
  2719. /*
  2720. * The length of all the valid values to be checked should not be greater
  2721. * than the length of returned data from read command.
  2722. */
  2723. static bool
  2724. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2725. {
  2726. int i;
  2727. struct drm_panel_esd_config *config = &panel->esd_config;
  2728. for (i = 0; i < count; ++i) {
  2729. if (config->status_valid_params[i] >
  2730. config->status_cmds_rlen[i]) {
  2731. DSI_DEBUG("ignore valid params\n");
  2732. return false;
  2733. }
  2734. }
  2735. return true;
  2736. }
  2737. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2738. char *prop_key, u32 **target, u32 cmd_cnt)
  2739. {
  2740. int tmp;
  2741. if (!utils->find_property(utils->data, prop_key, &tmp))
  2742. return false;
  2743. tmp /= sizeof(u32);
  2744. if (tmp != cmd_cnt) {
  2745. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2746. tmp, cmd_cnt);
  2747. return false;
  2748. }
  2749. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2750. if (IS_ERR_OR_NULL(*target)) {
  2751. DSI_ERR("Error allocating memory for property\n");
  2752. return false;
  2753. }
  2754. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2755. DSI_ERR("cannot get values from dts\n");
  2756. kfree(*target);
  2757. *target = NULL;
  2758. return false;
  2759. }
  2760. return true;
  2761. }
  2762. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2763. {
  2764. kfree(esd_config->status_buf);
  2765. kfree(esd_config->return_buf);
  2766. kfree(esd_config->status_value);
  2767. kfree(esd_config->status_valid_params);
  2768. kfree(esd_config->status_cmds_rlen);
  2769. kfree(esd_config->status_cmd.cmds);
  2770. }
  2771. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2772. {
  2773. struct drm_panel_esd_config *esd_config;
  2774. int rc = 0;
  2775. u32 tmp;
  2776. u32 i, status_len, *lenp;
  2777. struct property *data;
  2778. struct dsi_parser_utils *utils = &panel->utils;
  2779. if (!panel) {
  2780. DSI_ERR("Invalid Params\n");
  2781. return -EINVAL;
  2782. }
  2783. esd_config = &panel->esd_config;
  2784. if (!esd_config)
  2785. return -EINVAL;
  2786. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2787. DSI_CMD_SET_PANEL_STATUS, utils);
  2788. if (!esd_config->status_cmd.count) {
  2789. DSI_ERR("panel status command parsing failed\n");
  2790. rc = -EINVAL;
  2791. goto error;
  2792. }
  2793. if (!dsi_panel_parse_esd_status_len(utils,
  2794. "qcom,mdss-dsi-panel-status-read-length",
  2795. &panel->esd_config.status_cmds_rlen,
  2796. esd_config->status_cmd.count)) {
  2797. DSI_ERR("Invalid status read length\n");
  2798. rc = -EINVAL;
  2799. goto error1;
  2800. }
  2801. if (dsi_panel_parse_esd_status_len(utils,
  2802. "qcom,mdss-dsi-panel-status-valid-params",
  2803. &panel->esd_config.status_valid_params,
  2804. esd_config->status_cmd.count)) {
  2805. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2806. esd_config->status_cmd.count)) {
  2807. rc = -EINVAL;
  2808. goto error2;
  2809. }
  2810. }
  2811. status_len = 0;
  2812. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2813. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2814. status_len += lenp[i];
  2815. if (!status_len) {
  2816. rc = -EINVAL;
  2817. goto error2;
  2818. }
  2819. /*
  2820. * Some panel may need multiple read commands to properly
  2821. * check panel status. Do a sanity check for proper status
  2822. * value which will be compared with the value read by dsi
  2823. * controller during ESD check. Also check if multiple read
  2824. * commands are there then, there should be corresponding
  2825. * status check values for each read command.
  2826. */
  2827. data = utils->find_property(utils->data,
  2828. "qcom,mdss-dsi-panel-status-value", &tmp);
  2829. tmp /= sizeof(u32);
  2830. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2831. esd_config->groups = tmp / status_len;
  2832. } else {
  2833. DSI_ERR("error parse panel-status-value\n");
  2834. rc = -EINVAL;
  2835. goto error2;
  2836. }
  2837. esd_config->status_value =
  2838. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2839. GFP_KERNEL);
  2840. if (!esd_config->status_value) {
  2841. rc = -ENOMEM;
  2842. goto error2;
  2843. }
  2844. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2845. sizeof(unsigned char), GFP_KERNEL);
  2846. if (!esd_config->return_buf) {
  2847. rc = -ENOMEM;
  2848. goto error3;
  2849. }
  2850. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2851. if (!esd_config->status_buf) {
  2852. rc = -ENOMEM;
  2853. goto error4;
  2854. }
  2855. rc = utils->read_u32_array(utils->data,
  2856. "qcom,mdss-dsi-panel-status-value",
  2857. esd_config->status_value, esd_config->groups * status_len);
  2858. if (rc) {
  2859. DSI_DEBUG("error reading panel status values\n");
  2860. memset(esd_config->status_value, 0,
  2861. esd_config->groups * status_len);
  2862. }
  2863. return 0;
  2864. error4:
  2865. kfree(esd_config->return_buf);
  2866. error3:
  2867. kfree(esd_config->status_value);
  2868. error2:
  2869. kfree(esd_config->status_valid_params);
  2870. kfree(esd_config->status_cmds_rlen);
  2871. error1:
  2872. kfree(esd_config->status_cmd.cmds);
  2873. error:
  2874. return rc;
  2875. }
  2876. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2877. {
  2878. int rc = 0;
  2879. const char *string;
  2880. struct drm_panel_esd_config *esd_config;
  2881. struct dsi_parser_utils *utils = &panel->utils;
  2882. u8 *esd_mode = NULL;
  2883. esd_config = &panel->esd_config;
  2884. esd_config->status_mode = ESD_MODE_MAX;
  2885. esd_config->esd_enabled = utils->read_bool(utils->data,
  2886. "qcom,esd-check-enabled");
  2887. if (!esd_config->esd_enabled)
  2888. return 0;
  2889. rc = utils->read_string(utils->data,
  2890. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2891. if (!rc) {
  2892. if (!strcmp(string, "bta_check")) {
  2893. esd_config->status_mode = ESD_MODE_SW_BTA;
  2894. } else if (!strcmp(string, "reg_read")) {
  2895. esd_config->status_mode = ESD_MODE_REG_READ;
  2896. } else if (!strcmp(string, "te_signal_check")) {
  2897. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2898. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2899. } else {
  2900. DSI_ERR("TE-ESD not valid for video mode\n");
  2901. rc = -EINVAL;
  2902. goto error;
  2903. }
  2904. } else {
  2905. DSI_ERR("No valid panel-status-check-mode string\n");
  2906. rc = -EINVAL;
  2907. goto error;
  2908. }
  2909. } else {
  2910. DSI_DEBUG("status check method not defined!\n");
  2911. rc = -EINVAL;
  2912. goto error;
  2913. }
  2914. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2915. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2916. if (rc) {
  2917. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2918. rc);
  2919. goto error;
  2920. }
  2921. esd_mode = "register_read";
  2922. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2923. esd_mode = "bta_trigger";
  2924. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2925. esd_mode = "te_check";
  2926. }
  2927. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2928. return 0;
  2929. error:
  2930. panel->esd_config.esd_enabled = false;
  2931. return rc;
  2932. }
  2933. static void dsi_panel_update_util(struct dsi_panel *panel,
  2934. struct device_node *parser_node)
  2935. {
  2936. struct dsi_parser_utils *utils = &panel->utils;
  2937. if (parser_node) {
  2938. *utils = *dsi_parser_get_parser_utils();
  2939. utils->data = parser_node;
  2940. DSI_DEBUG("switching to parser APIs\n");
  2941. goto end;
  2942. }
  2943. *utils = *dsi_parser_get_of_utils();
  2944. utils->data = panel->panel_of_node;
  2945. end:
  2946. utils->node = panel->panel_of_node;
  2947. }
  2948. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2949. {
  2950. return 0;
  2951. }
  2952. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2953. {
  2954. if (trusted_vm_env) {
  2955. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2956. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2957. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2958. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2959. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2960. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2961. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2962. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2963. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  2964. } else {
  2965. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2966. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2967. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2968. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2969. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2970. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2971. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2972. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2973. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  2974. }
  2975. }
  2976. struct dsi_panel *dsi_panel_get(struct device *parent,
  2977. struct device_node *of_node,
  2978. struct device_node *parser_node,
  2979. const char *type,
  2980. int topology_override,
  2981. bool trusted_vm_env)
  2982. {
  2983. struct dsi_panel *panel;
  2984. struct dsi_parser_utils *utils;
  2985. const char *panel_physical_type;
  2986. int rc = 0;
  2987. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2988. if (!panel)
  2989. return ERR_PTR(-ENOMEM);
  2990. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2991. panel->panel_of_node = of_node;
  2992. panel->parent = parent;
  2993. panel->type = type;
  2994. dsi_panel_update_util(panel, parser_node);
  2995. utils = &panel->utils;
  2996. panel->name = utils->get_property(utils->data,
  2997. "qcom,mdss-dsi-panel-name", NULL);
  2998. if (!panel->name)
  2999. panel->name = DSI_PANEL_DEFAULT_LABEL;
  3000. /*
  3001. * Set panel type to LCD as default.
  3002. */
  3003. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3004. panel_physical_type = utils->get_property(utils->data,
  3005. "qcom,mdss-dsi-panel-physical-type", NULL);
  3006. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3007. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3008. rc = dsi_panel_parse_host_config(panel);
  3009. if (rc) {
  3010. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3011. rc);
  3012. goto error;
  3013. }
  3014. rc = dsi_panel_parse_panel_mode(panel);
  3015. if (rc) {
  3016. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3017. rc);
  3018. goto error;
  3019. }
  3020. rc = dsi_panel_parse_dfps_caps(panel);
  3021. if (rc)
  3022. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3023. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3024. if (rc)
  3025. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3026. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3027. if (rc)
  3028. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3029. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3030. if (rc)
  3031. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3032. rc = dsi_panel_parse_phy_props(panel);
  3033. if (rc) {
  3034. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3035. rc);
  3036. goto error;
  3037. }
  3038. rc = panel->panel_ops.parse_gpios(panel);
  3039. if (rc) {
  3040. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3041. goto error;
  3042. }
  3043. rc = panel->panel_ops.parse_power_cfg(panel);
  3044. if (rc)
  3045. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3046. rc = dsi_panel_parse_bl_config(panel);
  3047. if (rc) {
  3048. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3049. if (rc == -EPROBE_DEFER)
  3050. goto error;
  3051. }
  3052. rc = dsi_panel_parse_misc_features(panel);
  3053. if (rc)
  3054. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3055. rc = dsi_panel_parse_hdr_config(panel);
  3056. if (rc)
  3057. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3058. rc = dsi_panel_get_mode_count(panel);
  3059. if (rc) {
  3060. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3061. goto error;
  3062. }
  3063. rc = dsi_panel_parse_dms_info(panel);
  3064. if (rc)
  3065. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3066. rc = dsi_panel_parse_esd_config(panel);
  3067. if (rc)
  3068. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3069. rc = dsi_panel_vreg_get(panel);
  3070. if (rc) {
  3071. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3072. panel->name, rc);
  3073. goto error;
  3074. }
  3075. panel->power_mode = SDE_MODE_DPMS_OFF;
  3076. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3077. NULL, DRM_MODE_CONNECTOR_DSI);
  3078. panel->mipi_device.dev.of_node = of_node;
  3079. drm_panel_add(&panel->drm_panel);
  3080. mutex_init(&panel->panel_lock);
  3081. return panel;
  3082. error:
  3083. kfree(panel);
  3084. return ERR_PTR(rc);
  3085. }
  3086. void dsi_panel_put(struct dsi_panel *panel)
  3087. {
  3088. drm_panel_remove(&panel->drm_panel);
  3089. /* free resources allocated for ESD check */
  3090. dsi_panel_esd_config_deinit(&panel->esd_config);
  3091. kfree(panel->avr_caps.avr_step_fps_list);
  3092. kfree(panel);
  3093. }
  3094. int dsi_panel_drv_init(struct dsi_panel *panel,
  3095. struct mipi_dsi_host *host)
  3096. {
  3097. int rc = 0;
  3098. struct mipi_dsi_device *dev;
  3099. if (!panel || !host) {
  3100. DSI_ERR("invalid params\n");
  3101. return -EINVAL;
  3102. }
  3103. mutex_lock(&panel->panel_lock);
  3104. dev = &panel->mipi_device;
  3105. dev->host = host;
  3106. /*
  3107. * We dont have device structure since panel is not a device node.
  3108. * When using drm panel framework, the device is probed when the host is
  3109. * create.
  3110. */
  3111. dev->channel = 0;
  3112. dev->lanes = 4;
  3113. panel->host = host;
  3114. rc = panel->panel_ops.pinctrl_init(panel);
  3115. if (rc) {
  3116. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3117. panel->name, rc);
  3118. goto exit;
  3119. }
  3120. rc = panel->panel_ops.gpio_request(panel);
  3121. if (rc) {
  3122. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3123. rc);
  3124. goto error_pinctrl_deinit;
  3125. }
  3126. rc = panel->panel_ops.bl_register(panel);
  3127. if (rc) {
  3128. if (rc != -EPROBE_DEFER)
  3129. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3130. panel->name, rc);
  3131. goto error_gpio_release;
  3132. }
  3133. goto exit;
  3134. error_gpio_release:
  3135. (void)dsi_panel_gpio_release(panel);
  3136. error_pinctrl_deinit:
  3137. (void)dsi_panel_pinctrl_deinit(panel);
  3138. exit:
  3139. mutex_unlock(&panel->panel_lock);
  3140. return rc;
  3141. }
  3142. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3143. {
  3144. int rc = 0;
  3145. if (!panel) {
  3146. DSI_ERR("invalid params\n");
  3147. return -EINVAL;
  3148. }
  3149. mutex_lock(&panel->panel_lock);
  3150. rc = panel->panel_ops.bl_unregister(panel);
  3151. if (rc)
  3152. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3153. panel->name, rc);
  3154. rc = panel->panel_ops.gpio_release(panel);
  3155. if (rc)
  3156. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3157. rc);
  3158. rc = panel->panel_ops.pinctrl_deinit(panel);
  3159. if (rc)
  3160. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3161. rc);
  3162. rc = dsi_panel_vreg_put(panel);
  3163. if (rc)
  3164. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3165. panel->host = NULL;
  3166. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3167. mutex_unlock(&panel->panel_lock);
  3168. return rc;
  3169. }
  3170. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3171. struct dsi_display_mode *mode)
  3172. {
  3173. return 0;
  3174. }
  3175. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3176. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3177. {
  3178. const char *compression;
  3179. u32 *array = NULL, top_count, len, i;
  3180. int rc = -EINVAL;
  3181. bool dsc_enable = false;
  3182. *dsc_count = 0;
  3183. *lm_count = 0;
  3184. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3185. if (compression && !strcmp(compression, "dsc"))
  3186. dsc_enable = true;
  3187. len = utils->count_u32_elems(node, "qcom,display-topology");
  3188. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3189. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3190. return rc;
  3191. top_count = len / TOPOLOGY_SET_LEN;
  3192. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3193. if (!array)
  3194. return -ENOMEM;
  3195. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3196. if (rc) {
  3197. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3198. goto read_fail;
  3199. }
  3200. for (i = 0; i < top_count; i++) {
  3201. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3202. if (dsc_enable)
  3203. *dsc_count = max(*dsc_count,
  3204. array[i * TOPOLOGY_SET_LEN + 1]);
  3205. }
  3206. read_fail:
  3207. kfree(array);
  3208. return 0;
  3209. }
  3210. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3211. {
  3212. const u32 SINGLE_MODE_SUPPORT = 1;
  3213. struct dsi_parser_utils *utils;
  3214. struct device_node *timings_np, *child_np;
  3215. int num_dfps_rates;
  3216. int num_video_modes = 0, num_cmd_modes = 0;
  3217. int count, rc = 0;
  3218. u32 dsc_count = 0, lm_count = 0;
  3219. if (!panel) {
  3220. DSI_ERR("invalid params\n");
  3221. return -EINVAL;
  3222. }
  3223. utils = &panel->utils;
  3224. panel->num_timing_nodes = 0;
  3225. timings_np = utils->get_child_by_name(utils->data,
  3226. "qcom,mdss-dsi-display-timings");
  3227. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3228. DSI_ERR("no display timing nodes defined\n");
  3229. rc = -EINVAL;
  3230. goto error;
  3231. }
  3232. count = utils->get_child_count(timings_np);
  3233. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3234. count > DSI_MODE_MAX) {
  3235. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3236. rc = -EINVAL;
  3237. goto error;
  3238. }
  3239. /* No multiresolution support is available for video mode panels.
  3240. * Multi-mode is supported for video mode during POMS is enabled.
  3241. */
  3242. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3243. !panel->host_config.ext_bridge_mode &&
  3244. !panel->panel_mode_switch_enabled)
  3245. count = SINGLE_MODE_SUPPORT;
  3246. panel->num_timing_nodes = count;
  3247. dsi_for_each_child_node(timings_np, child_np) {
  3248. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3249. num_video_modes++;
  3250. else if (utils->read_bool(child_np,
  3251. "qcom,mdss-dsi-cmd-mode"))
  3252. num_cmd_modes++;
  3253. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3254. num_video_modes++;
  3255. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3256. num_cmd_modes++;
  3257. dsi_panel_get_max_res_count(utils, child_np,
  3258. &dsc_count, &lm_count);
  3259. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3260. panel->lm_count = max(lm_count, panel->lm_count);
  3261. }
  3262. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3263. panel->dfps_caps.dfps_list_len;
  3264. /*
  3265. * Inflate num_of_modes by fps in dfps.
  3266. * Single command mode for video mode panels supporting
  3267. * panel operating mode switch.
  3268. */
  3269. num_video_modes = num_video_modes * num_dfps_rates;
  3270. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3271. (panel->panel_mode_switch_enabled))
  3272. num_cmd_modes = 1;
  3273. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3274. error:
  3275. return rc;
  3276. }
  3277. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3278. struct dsi_panel_phy_props *phy_props)
  3279. {
  3280. int rc = 0;
  3281. if (!panel || !phy_props) {
  3282. DSI_ERR("invalid params\n");
  3283. return -EINVAL;
  3284. }
  3285. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3286. return rc;
  3287. }
  3288. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3289. struct dsi_dfps_capabilities *dfps_caps)
  3290. {
  3291. int rc = 0;
  3292. if (!panel || !dfps_caps) {
  3293. DSI_ERR("invalid params\n");
  3294. return -EINVAL;
  3295. }
  3296. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3297. return rc;
  3298. }
  3299. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3300. {
  3301. int i;
  3302. if (!mode->priv_info)
  3303. return;
  3304. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3305. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3306. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3307. }
  3308. kfree(mode->priv_info);
  3309. }
  3310. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3311. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3312. {
  3313. u32 frame_time_us, nslices;
  3314. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3315. dsi_transfer_time_us, pixel_clk_khz;
  3316. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3317. struct dsi_mode_info *timing = &mode->timing;
  3318. struct dsi_display_mode *display_mode;
  3319. u32 jitter_numer, jitter_denom, prefill_lines;
  3320. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3321. u16 bpp;
  3322. /* Packet overhead in bits,
  3323. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3324. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3325. * 1 byte dcs data command.
  3326. */
  3327. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3328. packet_overhead = 120;
  3329. else
  3330. packet_overhead = 56;
  3331. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3332. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3333. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3334. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3335. if (timing->refresh_rate >= 120)
  3336. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3337. if (timing->dsc_enabled) {
  3338. nslices = (timing->h_active)/(dsc->config.slice_width);
  3339. /* (slice width x bit-per-pixel + packet overhead) x
  3340. * number of slices x height x fps / lane
  3341. */
  3342. bpp = DSC_BPP(dsc->config);
  3343. bits_per_line = ((dsc->config.slice_width * bpp) +
  3344. packet_overhead) * nslices;
  3345. bits_per_line = bits_per_line / (config->num_data_lanes);
  3346. min_bitclk_hz = (bits_per_line * timing->v_active *
  3347. timing->refresh_rate);
  3348. } else {
  3349. total_active_pixels = ((dsi_h_active_dce(timing)
  3350. * timing->v_active));
  3351. /* calculate the actual bitclk needed to transfer the frame */
  3352. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3353. (config->bpp));
  3354. do_div(min_bitclk_hz, config->num_data_lanes);
  3355. }
  3356. timing->min_dsi_clk_hz = min_bitclk_hz;
  3357. /*
  3358. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3359. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3360. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3361. * threshold time are configured to 40us.
  3362. */
  3363. if (mode->priv_info->disable_rsc_solver) {
  3364. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3365. } else {
  3366. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3367. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3368. }
  3369. /*
  3370. * Increase the prefill_lines proportionately as recommended
  3371. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3372. */
  3373. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3374. timing->refresh_rate, 60);
  3375. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3376. (timing->v_active));
  3377. min_threshold_us = min_threshold_us + prefill_time_us;
  3378. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3379. if (timing->clk_rate_hz) {
  3380. /* adjust the transfer time proportionately for bit clk*/
  3381. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3382. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3383. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3384. } else if (mode->priv_info->mdp_transfer_time_us) {
  3385. max_transfer_us = frame_time_us - min_threshold_us;
  3386. mode->priv_info->mdp_transfer_time_us = min(
  3387. mode->priv_info->mdp_transfer_time_us,
  3388. max_transfer_us);
  3389. timing->dsi_transfer_time_us =
  3390. mode->priv_info->mdp_transfer_time_us;
  3391. } else {
  3392. if ((min_threshold_us > frame_threshold_us) ||
  3393. (mode->priv_info->disable_rsc_solver))
  3394. frame_threshold_us = min_threshold_us;
  3395. timing->dsi_transfer_time_us = frame_time_us -
  3396. frame_threshold_us;
  3397. }
  3398. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3399. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3400. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3401. timing->mdp_transfer_time_us =
  3402. mode->priv_info->mdp_transfer_time_us;
  3403. }
  3404. /* Calculate pclk_khz to update modeinfo */
  3405. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3406. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3407. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3408. do_div(pixel_clk_khz, config->bpp);
  3409. display_mode->pixel_clk_khz = pixel_clk_khz;
  3410. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3411. }
  3412. int dsi_panel_get_mode(struct dsi_panel *panel,
  3413. u32 index, struct dsi_display_mode *mode,
  3414. int topology_override)
  3415. {
  3416. struct device_node *timings_np, *child_np;
  3417. struct dsi_parser_utils *utils;
  3418. struct dsi_display_mode_priv_info *prv_info;
  3419. u32 child_idx = 0;
  3420. int rc = 0, num_timings;
  3421. int traffic_mode;
  3422. void *utils_data = NULL;
  3423. if (!panel || !mode) {
  3424. DSI_ERR("invalid params\n");
  3425. return -EINVAL;
  3426. }
  3427. mutex_lock(&panel->panel_lock);
  3428. utils = &panel->utils;
  3429. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3430. if (!mode->priv_info) {
  3431. rc = -ENOMEM;
  3432. goto done;
  3433. }
  3434. prv_info = mode->priv_info;
  3435. timings_np = utils->get_child_by_name(utils->data,
  3436. "qcom,mdss-dsi-display-timings");
  3437. if (!timings_np) {
  3438. DSI_ERR("no display timing nodes defined\n");
  3439. rc = -EINVAL;
  3440. goto parse_fail;
  3441. }
  3442. num_timings = utils->get_child_count(timings_np);
  3443. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3444. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3445. rc = -EINVAL;
  3446. goto parse_fail;
  3447. }
  3448. utils_data = utils->data;
  3449. traffic_mode = panel->video_config.traffic_mode;
  3450. dsi_for_each_child_node(timings_np, child_np) {
  3451. if (index != child_idx++)
  3452. continue;
  3453. utils->data = child_np;
  3454. if (panel->panel_mode_switch_enabled) {
  3455. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3456. mode->panel_mode_caps = panel->panel_mode;
  3457. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3458. child_idx);
  3459. }
  3460. } else {
  3461. mode->panel_mode_caps = panel->panel_mode;
  3462. }
  3463. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3464. if (rc)
  3465. mode->mode_idx = index;
  3466. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3467. if (rc) {
  3468. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3469. goto parse_fail;
  3470. }
  3471. if (panel->dyn_clk_caps.dyn_clk_support) {
  3472. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3473. if (rc)
  3474. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3475. }
  3476. rc = dsi_panel_parse_dsc_params(mode, utils);
  3477. if (rc) {
  3478. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3479. goto parse_fail;
  3480. }
  3481. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3482. if (rc) {
  3483. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3484. goto parse_fail;
  3485. }
  3486. rc = dsi_panel_parse_topology(prv_info, utils,
  3487. topology_override);
  3488. if (rc) {
  3489. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3490. goto parse_fail;
  3491. }
  3492. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3493. if (rc) {
  3494. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3495. goto parse_fail;
  3496. }
  3497. rc = dsi_panel_parse_jitter_config(mode, utils);
  3498. if (rc)
  3499. DSI_ERR(
  3500. "failed to parse panel jitter config, rc=%d\n", rc);
  3501. rc = dsi_panel_parse_phy_timing(mode, utils);
  3502. if (rc) {
  3503. DSI_ERR(
  3504. "failed to parse panel phy timings, rc=%d\n", rc);
  3505. goto parse_fail;
  3506. }
  3507. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3508. if (rc)
  3509. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3510. }
  3511. goto done;
  3512. parse_fail:
  3513. kfree(mode->priv_info);
  3514. mode->priv_info = NULL;
  3515. done:
  3516. utils->data = utils_data;
  3517. mutex_unlock(&panel->panel_lock);
  3518. return rc;
  3519. }
  3520. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3521. struct dsi_display_mode *mode,
  3522. struct dsi_host_config *config)
  3523. {
  3524. int rc = 0;
  3525. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3526. if (!panel || !mode || !config) {
  3527. DSI_ERR("invalid params\n");
  3528. return -EINVAL;
  3529. }
  3530. mutex_lock(&panel->panel_lock);
  3531. config->panel_mode = panel->panel_mode;
  3532. memcpy(&config->common_config, &panel->host_config,
  3533. sizeof(config->common_config));
  3534. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3535. memcpy(&config->u.video_engine, &panel->video_config,
  3536. sizeof(config->u.video_engine));
  3537. } else {
  3538. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3539. sizeof(config->u.cmd_engine));
  3540. }
  3541. memcpy(&config->video_timing, &mode->timing,
  3542. sizeof(config->video_timing));
  3543. config->video_timing.mdp_transfer_time_us =
  3544. mode->priv_info->mdp_transfer_time_us;
  3545. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3546. config->video_timing.dsc = &mode->priv_info->dsc;
  3547. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3548. config->video_timing.vdc = &mode->priv_info->vdc;
  3549. if (dyn_clk_caps->dyn_clk_support)
  3550. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3551. else
  3552. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3553. config->esc_clk_rate_hz = 19200000;
  3554. mutex_unlock(&panel->panel_lock);
  3555. return rc;
  3556. }
  3557. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3558. {
  3559. int rc = 0;
  3560. if (!panel) {
  3561. DSI_ERR("invalid params\n");
  3562. return -EINVAL;
  3563. }
  3564. mutex_lock(&panel->panel_lock);
  3565. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3566. if (panel->lp11_init)
  3567. goto error;
  3568. rc = dsi_panel_power_on(panel);
  3569. if (rc) {
  3570. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3571. goto error;
  3572. }
  3573. error:
  3574. mutex_unlock(&panel->panel_lock);
  3575. return rc;
  3576. }
  3577. int dsi_panel_update_pps(struct dsi_panel *panel)
  3578. {
  3579. int rc = 0;
  3580. struct dsi_panel_cmd_set *set = NULL;
  3581. struct dsi_display_mode_priv_info *priv_info = NULL;
  3582. if (!panel || !panel->cur_mode) {
  3583. DSI_ERR("invalid params\n");
  3584. return -EINVAL;
  3585. }
  3586. mutex_lock(&panel->panel_lock);
  3587. priv_info = panel->cur_mode->priv_info;
  3588. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3589. if (priv_info->dsc_enabled)
  3590. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3591. panel->dce_pps_cmd, 0,
  3592. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3593. else if (priv_info->vdc_enabled)
  3594. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3595. panel->dce_pps_cmd, 0,
  3596. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3597. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3598. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3599. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3600. if (rc) {
  3601. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3602. goto error;
  3603. }
  3604. }
  3605. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3606. if (rc) {
  3607. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3608. panel->name, rc);
  3609. }
  3610. dsi_panel_destroy_cmd_packets(set);
  3611. error:
  3612. mutex_unlock(&panel->panel_lock);
  3613. return rc;
  3614. }
  3615. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3616. {
  3617. int rc = 0;
  3618. if (!panel) {
  3619. DSI_ERR("invalid params\n");
  3620. return -EINVAL;
  3621. }
  3622. mutex_lock(&panel->panel_lock);
  3623. if (!panel->panel_initialized)
  3624. goto exit;
  3625. /*
  3626. * Consider LP1->LP2->LP1.
  3627. * If the panel is already in LP mode, do not need to
  3628. * set the regulator.
  3629. * IBB and AB power mode would be set at the same time
  3630. * in PMIC driver, so we only call ibb setting that is enough.
  3631. */
  3632. if (dsi_panel_is_type_oled(panel) &&
  3633. panel->power_mode != SDE_MODE_DPMS_LP2)
  3634. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3635. "ibb", REGULATOR_MODE_IDLE);
  3636. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3637. if (rc)
  3638. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3639. panel->name, rc);
  3640. exit:
  3641. mutex_unlock(&panel->panel_lock);
  3642. return rc;
  3643. }
  3644. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3645. {
  3646. int rc = 0;
  3647. if (!panel) {
  3648. DSI_ERR("invalid params\n");
  3649. return -EINVAL;
  3650. }
  3651. mutex_lock(&panel->panel_lock);
  3652. if (!panel->panel_initialized)
  3653. goto exit;
  3654. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3655. if (rc)
  3656. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3657. panel->name, rc);
  3658. exit:
  3659. mutex_unlock(&panel->panel_lock);
  3660. return rc;
  3661. }
  3662. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3663. {
  3664. int rc = 0;
  3665. if (!panel) {
  3666. DSI_ERR("invalid params\n");
  3667. return -EINVAL;
  3668. }
  3669. mutex_lock(&panel->panel_lock);
  3670. if (!panel->panel_initialized)
  3671. goto exit;
  3672. /*
  3673. * Consider about LP1->LP2->NOLP.
  3674. */
  3675. if (dsi_panel_is_type_oled(panel) &&
  3676. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3677. panel->power_mode == SDE_MODE_DPMS_LP2))
  3678. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3679. "ibb", REGULATOR_MODE_NORMAL);
  3680. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3681. if (rc)
  3682. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3683. panel->name, rc);
  3684. exit:
  3685. mutex_unlock(&panel->panel_lock);
  3686. return rc;
  3687. }
  3688. int dsi_panel_prepare(struct dsi_panel *panel)
  3689. {
  3690. int rc = 0;
  3691. if (!panel) {
  3692. DSI_ERR("invalid params\n");
  3693. return -EINVAL;
  3694. }
  3695. mutex_lock(&panel->panel_lock);
  3696. if (panel->lp11_init) {
  3697. rc = dsi_panel_power_on(panel);
  3698. if (rc) {
  3699. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3700. panel->name, rc);
  3701. goto error;
  3702. }
  3703. }
  3704. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3705. if (rc) {
  3706. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3707. panel->name, rc);
  3708. goto error;
  3709. }
  3710. error:
  3711. mutex_unlock(&panel->panel_lock);
  3712. return rc;
  3713. }
  3714. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3715. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3716. {
  3717. static const int ROI_CMD_LEN = 5;
  3718. int rc = 0;
  3719. /* DTYPE_DCS_LWRITE */
  3720. char *caset, *paset;
  3721. set->cmds = NULL;
  3722. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3723. if (!caset) {
  3724. rc = -ENOMEM;
  3725. goto exit;
  3726. }
  3727. caset[0] = 0x2a;
  3728. caset[1] = (roi->x & 0xFF00) >> 8;
  3729. caset[2] = roi->x & 0xFF;
  3730. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3731. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3732. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3733. if (!paset) {
  3734. rc = -ENOMEM;
  3735. goto error_free_mem;
  3736. }
  3737. paset[0] = 0x2b;
  3738. paset[1] = (roi->y & 0xFF00) >> 8;
  3739. paset[2] = roi->y & 0xFF;
  3740. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3741. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3742. set->type = DSI_CMD_SET_ROI;
  3743. set->state = DSI_CMD_SET_STATE_LP;
  3744. set->count = 2; /* send caset + paset together */
  3745. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3746. if (!set->cmds) {
  3747. rc = -ENOMEM;
  3748. goto error_free_mem;
  3749. }
  3750. set->cmds[0].msg.channel = 0;
  3751. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3752. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3753. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3754. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3755. set->cmds[0].msg.tx_buf = caset;
  3756. set->cmds[0].msg.rx_len = 0;
  3757. set->cmds[0].msg.rx_buf = 0;
  3758. set->cmds[0].last_command = 0;
  3759. set->cmds[0].post_wait_ms = 0;
  3760. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3761. set->cmds[1].msg.channel = 0;
  3762. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3763. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3764. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3765. set->cmds[1].msg.tx_buf = paset;
  3766. set->cmds[1].msg.rx_len = 0;
  3767. set->cmds[1].msg.rx_buf = 0;
  3768. set->cmds[1].last_command = 1;
  3769. set->cmds[1].post_wait_ms = 0;
  3770. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3771. goto exit;
  3772. error_free_mem:
  3773. kfree(caset);
  3774. kfree(paset);
  3775. kfree(set->cmds);
  3776. exit:
  3777. return rc;
  3778. }
  3779. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3780. int ctrl_idx)
  3781. {
  3782. int rc = 0;
  3783. if (!panel) {
  3784. DSI_ERR("invalid params\n");
  3785. return -EINVAL;
  3786. }
  3787. mutex_lock(&panel->panel_lock);
  3788. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3789. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3790. if (rc)
  3791. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3792. panel->name, rc);
  3793. mutex_unlock(&panel->panel_lock);
  3794. return rc;
  3795. }
  3796. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3797. int ctrl_idx)
  3798. {
  3799. int rc = 0;
  3800. if (!panel) {
  3801. DSI_ERR("invalid params\n");
  3802. return -EINVAL;
  3803. }
  3804. mutex_lock(&panel->panel_lock);
  3805. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3806. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3807. if (rc)
  3808. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3809. panel->name, rc);
  3810. mutex_unlock(&panel->panel_lock);
  3811. return rc;
  3812. }
  3813. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3814. struct dsi_rect *roi)
  3815. {
  3816. int rc = 0;
  3817. struct dsi_panel_cmd_set *set;
  3818. struct dsi_display_mode_priv_info *priv_info;
  3819. if (!panel || !panel->cur_mode) {
  3820. DSI_ERR("Invalid params\n");
  3821. return -EINVAL;
  3822. }
  3823. priv_info = panel->cur_mode->priv_info;
  3824. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3825. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3826. if (rc) {
  3827. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3828. panel->name, rc);
  3829. return rc;
  3830. }
  3831. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3832. roi->x, roi->y, roi->w, roi->h);
  3833. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3834. mutex_lock(&panel->panel_lock);
  3835. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3836. if (rc)
  3837. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3838. panel->name, rc);
  3839. mutex_unlock(&panel->panel_lock);
  3840. dsi_panel_destroy_cmd_packets(set);
  3841. dsi_panel_dealloc_cmd_packets(set);
  3842. return rc;
  3843. }
  3844. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3845. {
  3846. int rc = 0;
  3847. if (!panel) {
  3848. DSI_ERR("Invalid params\n");
  3849. return -EINVAL;
  3850. }
  3851. mutex_lock(&panel->panel_lock);
  3852. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3853. if (rc)
  3854. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3855. panel->name, rc);
  3856. mutex_unlock(&panel->panel_lock);
  3857. return rc;
  3858. }
  3859. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3860. {
  3861. int rc = 0;
  3862. if (!panel) {
  3863. DSI_ERR("Invalid params\n");
  3864. return -EINVAL;
  3865. }
  3866. mutex_lock(&panel->panel_lock);
  3867. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3868. if (rc)
  3869. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3870. panel->name, rc);
  3871. mutex_unlock(&panel->panel_lock);
  3872. return rc;
  3873. }
  3874. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3875. {
  3876. int rc = 0;
  3877. if (!panel) {
  3878. DSI_ERR("Invalid params\n");
  3879. return -EINVAL;
  3880. }
  3881. mutex_lock(&panel->panel_lock);
  3882. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3883. if (rc)
  3884. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3885. panel->name, rc);
  3886. mutex_unlock(&panel->panel_lock);
  3887. return rc;
  3888. }
  3889. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3890. {
  3891. int rc = 0;
  3892. if (!panel) {
  3893. DSI_ERR("Invalid params\n");
  3894. return -EINVAL;
  3895. }
  3896. mutex_lock(&panel->panel_lock);
  3897. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3898. if (rc)
  3899. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3900. panel->name, rc);
  3901. mutex_unlock(&panel->panel_lock);
  3902. return rc;
  3903. }
  3904. int dsi_panel_switch(struct dsi_panel *panel)
  3905. {
  3906. int rc = 0;
  3907. if (!panel) {
  3908. DSI_ERR("Invalid params\n");
  3909. return -EINVAL;
  3910. }
  3911. mutex_lock(&panel->panel_lock);
  3912. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3913. if (rc)
  3914. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3915. panel->name, rc);
  3916. mutex_unlock(&panel->panel_lock);
  3917. return rc;
  3918. }
  3919. int dsi_panel_post_switch(struct dsi_panel *panel)
  3920. {
  3921. int rc = 0;
  3922. if (!panel) {
  3923. DSI_ERR("Invalid params\n");
  3924. return -EINVAL;
  3925. }
  3926. mutex_lock(&panel->panel_lock);
  3927. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3928. if (rc)
  3929. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3930. panel->name, rc);
  3931. mutex_unlock(&panel->panel_lock);
  3932. return rc;
  3933. }
  3934. int dsi_panel_enable(struct dsi_panel *panel)
  3935. {
  3936. int rc = 0;
  3937. if (!panel) {
  3938. DSI_ERR("Invalid params\n");
  3939. return -EINVAL;
  3940. }
  3941. mutex_lock(&panel->panel_lock);
  3942. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3943. if (rc) {
  3944. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3945. panel->name, rc);
  3946. goto error;
  3947. }
  3948. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3949. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3950. if (rc) {
  3951. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3952. panel->name, rc);
  3953. goto error;
  3954. }
  3955. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3956. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3957. if (rc) {
  3958. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3959. panel->name, rc);
  3960. goto error;
  3961. }
  3962. }
  3963. panel->panel_initialized = true;
  3964. error:
  3965. mutex_unlock(&panel->panel_lock);
  3966. return rc;
  3967. }
  3968. int dsi_panel_post_enable(struct dsi_panel *panel)
  3969. {
  3970. int rc = 0;
  3971. if (!panel) {
  3972. DSI_ERR("invalid params\n");
  3973. return -EINVAL;
  3974. }
  3975. mutex_lock(&panel->panel_lock);
  3976. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3977. if (rc) {
  3978. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3979. panel->name, rc);
  3980. goto error;
  3981. }
  3982. error:
  3983. mutex_unlock(&panel->panel_lock);
  3984. return rc;
  3985. }
  3986. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3987. {
  3988. int rc = 0;
  3989. if (!panel) {
  3990. DSI_ERR("invalid params\n");
  3991. return -EINVAL;
  3992. }
  3993. mutex_lock(&panel->panel_lock);
  3994. if (gpio_is_valid(panel->bl_config.en_gpio))
  3995. gpio_set_value(panel->bl_config.en_gpio, 0);
  3996. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3997. if (rc) {
  3998. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3999. panel->name, rc);
  4000. goto error;
  4001. }
  4002. error:
  4003. mutex_unlock(&panel->panel_lock);
  4004. return rc;
  4005. }
  4006. int dsi_panel_disable(struct dsi_panel *panel)
  4007. {
  4008. int rc = 0;
  4009. if (!panel) {
  4010. DSI_ERR("invalid params\n");
  4011. return -EINVAL;
  4012. }
  4013. mutex_lock(&panel->panel_lock);
  4014. /* Avoid sending panel off commands when ESD recovery is underway */
  4015. if (!atomic_read(&panel->esd_recovery_pending)) {
  4016. /*
  4017. * Need to set IBB/AB regulator mode to STANDBY,
  4018. * if panel is going off from AOD mode.
  4019. */
  4020. if (dsi_panel_is_type_oled(panel) &&
  4021. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4022. panel->power_mode == SDE_MODE_DPMS_LP2))
  4023. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4024. "ibb", REGULATOR_MODE_STANDBY);
  4025. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4026. if (rc) {
  4027. /*
  4028. * Sending panel off commands may fail when DSI
  4029. * controller is in a bad state. These failures can be
  4030. * ignored since controller will go for full reset on
  4031. * subsequent display enable anyway.
  4032. */
  4033. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4034. panel->name, rc);
  4035. rc = 0;
  4036. }
  4037. }
  4038. panel->panel_initialized = false;
  4039. panel->power_mode = SDE_MODE_DPMS_OFF;
  4040. mutex_unlock(&panel->panel_lock);
  4041. return rc;
  4042. }
  4043. int dsi_panel_unprepare(struct dsi_panel *panel)
  4044. {
  4045. int rc = 0;
  4046. if (!panel) {
  4047. DSI_ERR("invalid params\n");
  4048. return -EINVAL;
  4049. }
  4050. mutex_lock(&panel->panel_lock);
  4051. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4052. if (rc) {
  4053. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4054. panel->name, rc);
  4055. goto error;
  4056. }
  4057. error:
  4058. mutex_unlock(&panel->panel_lock);
  4059. return rc;
  4060. }
  4061. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4062. {
  4063. int rc = 0;
  4064. if (!panel) {
  4065. DSI_ERR("invalid params\n");
  4066. return -EINVAL;
  4067. }
  4068. mutex_lock(&panel->panel_lock);
  4069. rc = dsi_panel_power_off(panel);
  4070. if (rc) {
  4071. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4072. panel->name, rc);
  4073. goto error;
  4074. }
  4075. error:
  4076. mutex_unlock(&panel->panel_lock);
  4077. return rc;
  4078. }