dp_rings_main.c 112 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include <wlan_ipa_obj_mgmt_api.h>
  20. #include <qdf_types.h>
  21. #include <qdf_lock.h>
  22. #include <qdf_net_types.h>
  23. #include <qdf_lro.h>
  24. #include <qdf_module.h>
  25. #include <hal_hw_headers.h>
  26. #include <hal_api.h>
  27. #include <hif.h>
  28. #include <htt.h>
  29. #include <wdi_event.h>
  30. #include <queue.h>
  31. #include "dp_types.h"
  32. #include "dp_rings.h"
  33. #include "dp_internal.h"
  34. #include "dp_tx.h"
  35. #include "dp_tx_desc.h"
  36. #include "dp_rx.h"
  37. #ifdef DP_RATETABLE_SUPPORT
  38. #include "dp_ratetable.h"
  39. #endif
  40. #include <cdp_txrx_handle.h>
  41. #include <wlan_cfg.h>
  42. #include <wlan_utility.h>
  43. #include "cdp_txrx_cmn_struct.h"
  44. #include "cdp_txrx_stats_struct.h"
  45. #include "cdp_txrx_cmn_reg.h"
  46. #include <qdf_util.h>
  47. #include "dp_peer.h"
  48. #include "htt_stats.h"
  49. #include "dp_htt.h"
  50. #include "htt_ppdu_stats.h"
  51. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  52. #include "cfg_ucfg_api.h"
  53. #include <wlan_module_ids.h>
  54. #ifdef WIFI_MONITOR_SUPPORT
  55. #include <dp_mon.h>
  56. #endif
  57. #ifdef WLAN_FEATURE_STATS_EXT
  58. #define INIT_RX_HW_STATS_LOCK(_soc) \
  59. qdf_spinlock_create(&(_soc)->rx_hw_stats_lock)
  60. #define DEINIT_RX_HW_STATS_LOCK(_soc) \
  61. qdf_spinlock_destroy(&(_soc)->rx_hw_stats_lock)
  62. #else
  63. #define INIT_RX_HW_STATS_LOCK(_soc) /* no op */
  64. #define DEINIT_RX_HW_STATS_LOCK(_soc) /* no op */
  65. #endif
  66. static QDF_STATUS dp_init_tx_ring_pair_by_index(struct dp_soc *soc,
  67. uint8_t index);
  68. static void dp_deinit_tx_pair_by_index(struct dp_soc *soc, int index);
  69. static void dp_free_tx_ring_pair_by_index(struct dp_soc *soc, uint8_t index);
  70. static QDF_STATUS dp_alloc_tx_ring_pair_by_index(struct dp_soc *soc,
  71. uint8_t index);
  72. /* default_dscp_tid_map - Default DSCP-TID mapping
  73. *
  74. * DSCP TID
  75. * 000000 0
  76. * 001000 1
  77. * 010000 2
  78. * 011000 3
  79. * 100000 4
  80. * 101000 5
  81. * 110000 6
  82. * 111000 7
  83. */
  84. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  85. 0, 0, 0, 0, 0, 0, 0, 0,
  86. 1, 1, 1, 1, 1, 1, 1, 1,
  87. 2, 2, 2, 2, 2, 2, 2, 2,
  88. 3, 3, 3, 3, 3, 3, 3, 3,
  89. 4, 4, 4, 4, 4, 4, 4, 4,
  90. 5, 5, 5, 5, 5, 5, 5, 5,
  91. 6, 6, 6, 6, 6, 6, 6, 6,
  92. 7, 7, 7, 7, 7, 7, 7, 7,
  93. };
  94. /* default_pcp_tid_map - Default PCP-TID mapping
  95. *
  96. * PCP TID
  97. * 000 0
  98. * 001 1
  99. * 010 2
  100. * 011 3
  101. * 100 4
  102. * 101 5
  103. * 110 6
  104. * 111 7
  105. */
  106. static uint8_t default_pcp_tid_map[PCP_TID_MAP_MAX] = {
  107. 0, 1, 2, 3, 4, 5, 6, 7,
  108. };
  109. uint8_t
  110. dp_cpu_ring_map[DP_NSS_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS_MAX] = {
  111. {0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2, 0x0, 0x0, 0x1, 0x2},
  112. {0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1, 0x2, 0x1},
  113. {0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0, 0x2, 0x0},
  114. {0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2},
  115. {0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3},
  116. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  117. {0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1}
  118. #endif
  119. };
  120. qdf_export_symbol(dp_cpu_ring_map);
  121. /**
  122. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  123. * @soc: DP soc handle
  124. * @ring_type: ring type
  125. * @ring_num: ring_num
  126. *
  127. * Return: 0 if the ring is not offloaded, non-0 if it is offloaded
  128. */
  129. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc,
  130. enum hal_ring_type ring_type,
  131. int ring_num)
  132. {
  133. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  134. uint8_t status = 0;
  135. switch (ring_type) {
  136. case WBM2SW_RELEASE:
  137. case REO_DST:
  138. case RXDMA_BUF:
  139. case REO_EXCEPTION:
  140. status = ((nss_config) & (1 << ring_num));
  141. break;
  142. default:
  143. break;
  144. }
  145. return status;
  146. }
  147. #if !defined(DP_CON_MON)
  148. void dp_soc_reset_mon_intr_mask(struct dp_soc *soc)
  149. {
  150. int i;
  151. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  152. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  153. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  154. }
  155. }
  156. qdf_export_symbol(dp_soc_reset_mon_intr_mask);
  157. void dp_service_lmac_rings(void *arg)
  158. {
  159. struct dp_soc *soc = (struct dp_soc *)arg;
  160. int ring = 0, i;
  161. struct dp_pdev *pdev = NULL;
  162. union dp_rx_desc_list_elem_t *desc_list = NULL;
  163. union dp_rx_desc_list_elem_t *tail = NULL;
  164. /* Process LMAC interrupts */
  165. for (ring = 0 ; ring < MAX_NUM_LMAC_HW; ring++) {
  166. int mac_for_pdev = ring;
  167. struct dp_srng *rx_refill_buf_ring;
  168. pdev = dp_get_pdev_for_lmac_id(soc, mac_for_pdev);
  169. if (!pdev)
  170. continue;
  171. rx_refill_buf_ring = &soc->rx_refill_buf_ring[mac_for_pdev];
  172. dp_monitor_process(soc, NULL, mac_for_pdev,
  173. QCA_NAPI_BUDGET);
  174. for (i = 0;
  175. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  176. dp_rxdma_err_process(&soc->intr_ctx[i], soc,
  177. mac_for_pdev,
  178. QCA_NAPI_BUDGET);
  179. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF,
  180. mac_for_pdev))
  181. dp_rx_buffers_replenish(soc, mac_for_pdev,
  182. rx_refill_buf_ring,
  183. &soc->rx_desc_buf[mac_for_pdev],
  184. 0, &desc_list, &tail, false);
  185. }
  186. qdf_timer_mod(&soc->lmac_reap_timer, DP_INTR_POLL_TIMER_MS);
  187. }
  188. #endif
  189. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  190. /**
  191. * dp_is_reo_ring_num_in_nf_grp1() - Check if the current reo ring is part of
  192. * rx_near_full_grp1 mask
  193. * @soc: Datapath SoC Handle
  194. * @ring_num: REO ring number
  195. *
  196. * Return: 1 if the ring_num belongs to reo_nf_grp1,
  197. * 0, otherwise.
  198. */
  199. static inline int
  200. dp_is_reo_ring_num_in_nf_grp1(struct dp_soc *soc, int ring_num)
  201. {
  202. return (WLAN_CFG_RX_NEAR_FULL_IRQ_MASK_1 & (1 << ring_num));
  203. }
  204. /**
  205. * dp_is_reo_ring_num_in_nf_grp2() - Check if the current reo ring is part of
  206. * rx_near_full_grp2 mask
  207. * @soc: Datapath SoC Handle
  208. * @ring_num: REO ring number
  209. *
  210. * Return: 1 if the ring_num belongs to reo_nf_grp2,
  211. * 0, otherwise.
  212. */
  213. static inline int
  214. dp_is_reo_ring_num_in_nf_grp2(struct dp_soc *soc, int ring_num)
  215. {
  216. return (WLAN_CFG_RX_NEAR_FULL_IRQ_MASK_2 & (1 << ring_num));
  217. }
  218. /**
  219. * dp_srng_get_near_full_irq_mask() - Get near-full irq mask for a particular
  220. * ring type and number
  221. * @soc: Datapath SoC handle
  222. * @ring_type: SRNG type
  223. * @ring_num: ring num
  224. *
  225. * Return: near-full irq mask pointer
  226. */
  227. uint8_t *dp_srng_get_near_full_irq_mask(struct dp_soc *soc,
  228. enum hal_ring_type ring_type,
  229. int ring_num)
  230. {
  231. struct wlan_cfg_dp_soc_ctxt *cfg_ctx = soc->wlan_cfg_ctx;
  232. uint8_t wbm2_sw_rx_rel_ring_id;
  233. uint8_t *nf_irq_mask = NULL;
  234. switch (ring_type) {
  235. case WBM2SW_RELEASE:
  236. wbm2_sw_rx_rel_ring_id =
  237. wlan_cfg_get_rx_rel_ring_id(cfg_ctx);
  238. if (ring_num != wbm2_sw_rx_rel_ring_id) {
  239. nf_irq_mask = &soc->wlan_cfg_ctx->
  240. int_tx_ring_near_full_irq_mask[0];
  241. }
  242. break;
  243. case REO_DST:
  244. if (dp_is_reo_ring_num_in_nf_grp1(soc, ring_num))
  245. nf_irq_mask =
  246. &soc->wlan_cfg_ctx->int_rx_ring_near_full_irq_1_mask[0];
  247. else if (dp_is_reo_ring_num_in_nf_grp2(soc, ring_num))
  248. nf_irq_mask =
  249. &soc->wlan_cfg_ctx->int_rx_ring_near_full_irq_2_mask[0];
  250. else
  251. qdf_assert(0);
  252. break;
  253. default:
  254. break;
  255. }
  256. return nf_irq_mask;
  257. }
  258. /**
  259. * dp_srng_set_msi2_ring_params() - Set the msi2 addr/data in the ring params
  260. * @soc: Datapath SoC handle
  261. * @ring_params: srng params handle
  262. * @msi2_addr: MSI2 addr to be set for the SRNG
  263. * @msi2_data: MSI2 data to be set for the SRNG
  264. *
  265. * Return: None
  266. */
  267. void dp_srng_set_msi2_ring_params(struct dp_soc *soc,
  268. struct hal_srng_params *ring_params,
  269. qdf_dma_addr_t msi2_addr,
  270. uint32_t msi2_data)
  271. {
  272. ring_params->msi2_addr = msi2_addr;
  273. ring_params->msi2_data = msi2_data;
  274. }
  275. /**
  276. * dp_srng_msi2_setup() - Setup MSI2 details for near full IRQ of an SRNG
  277. * @soc: Datapath SoC handle
  278. * @ring_params: ring_params for SRNG
  279. * @ring_type: SENG type
  280. * @ring_num: ring number for the SRNG
  281. * @nf_msi_grp_num: near full msi group number
  282. *
  283. * Return: None
  284. */
  285. void dp_srng_msi2_setup(struct dp_soc *soc,
  286. struct hal_srng_params *ring_params,
  287. int ring_type, int ring_num, int nf_msi_grp_num)
  288. {
  289. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  290. int msi_data_count, ret;
  291. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  292. &msi_data_count, &msi_data_start,
  293. &msi_irq_start);
  294. if (ret)
  295. return;
  296. if (nf_msi_grp_num < 0) {
  297. dp_init_info("%pK: ring near full IRQ not part of an ext_group; ring_type: %d,ring_num %d",
  298. soc, ring_type, ring_num);
  299. ring_params->msi2_addr = 0;
  300. ring_params->msi2_data = 0;
  301. return;
  302. }
  303. if (dp_is_msi_group_number_invalid(soc, nf_msi_grp_num,
  304. msi_data_count)) {
  305. dp_init_warn("%pK: 2 msi_groups will share an msi for near full IRQ; msi_group_num %d",
  306. soc, nf_msi_grp_num);
  307. QDF_ASSERT(0);
  308. }
  309. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  310. ring_params->nf_irq_support = 1;
  311. ring_params->msi2_addr = addr_low;
  312. ring_params->msi2_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  313. ring_params->msi2_data = (nf_msi_grp_num % msi_data_count)
  314. + msi_data_start;
  315. ring_params->flags |= HAL_SRNG_MSI_INTR;
  316. }
  317. /* Percentage of ring entries considered as nearly full */
  318. #define DP_NF_HIGH_THRESH_PERCENTAGE 75
  319. /* Percentage of ring entries considered as critically full */
  320. #define DP_NF_CRIT_THRESH_PERCENTAGE 90
  321. /* Percentage of ring entries considered as safe threshold */
  322. #define DP_NF_SAFE_THRESH_PERCENTAGE 50
  323. /**
  324. * dp_srng_configure_nf_interrupt_thresholds() - Configure the thresholds for
  325. * near full irq
  326. * @soc: Datapath SoC handle
  327. * @ring_params: ring params for SRNG
  328. * @ring_type: ring type
  329. */
  330. void
  331. dp_srng_configure_nf_interrupt_thresholds(struct dp_soc *soc,
  332. struct hal_srng_params *ring_params,
  333. int ring_type)
  334. {
  335. if (ring_params->nf_irq_support) {
  336. ring_params->high_thresh = (ring_params->num_entries *
  337. DP_NF_HIGH_THRESH_PERCENTAGE) / 100;
  338. ring_params->crit_thresh = (ring_params->num_entries *
  339. DP_NF_CRIT_THRESH_PERCENTAGE) / 100;
  340. ring_params->safe_thresh = (ring_params->num_entries *
  341. DP_NF_SAFE_THRESH_PERCENTAGE) /100;
  342. }
  343. }
  344. /**
  345. * dp_srng_set_nf_thresholds() - Set the near full thresholds to srng data
  346. * structure from the ring params
  347. * @soc: Datapath SoC handle
  348. * @srng: SRNG handle
  349. * @ring_params: ring params for a SRNG
  350. *
  351. * Return: None
  352. */
  353. static inline void
  354. dp_srng_set_nf_thresholds(struct dp_soc *soc, struct dp_srng *srng,
  355. struct hal_srng_params *ring_params)
  356. {
  357. srng->crit_thresh = ring_params->crit_thresh;
  358. srng->safe_thresh = ring_params->safe_thresh;
  359. }
  360. #else
  361. static inline void
  362. dp_srng_set_nf_thresholds(struct dp_soc *soc, struct dp_srng *srng,
  363. struct hal_srng_params *ring_params)
  364. {
  365. }
  366. #endif
  367. /**
  368. * dp_get_num_msi_available()- API to get number of MSIs available
  369. * @soc: DP soc Handle
  370. * @interrupt_mode: Mode of interrupts
  371. *
  372. * Return: Number of MSIs available or 0 in case of integrated
  373. */
  374. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  375. static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
  376. {
  377. return 0;
  378. }
  379. #else
  380. static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
  381. {
  382. int msi_data_count;
  383. int msi_data_start;
  384. int msi_irq_start;
  385. int ret;
  386. if (interrupt_mode == DP_INTR_INTEGRATED) {
  387. return 0;
  388. } else if (interrupt_mode == DP_INTR_MSI || interrupt_mode ==
  389. DP_INTR_POLL) {
  390. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  391. &msi_data_count,
  392. &msi_data_start,
  393. &msi_irq_start);
  394. if (ret) {
  395. qdf_err("Unable to get DP MSI assignment %d",
  396. interrupt_mode);
  397. return -EINVAL;
  398. }
  399. return msi_data_count;
  400. }
  401. qdf_err("Interrupt mode invalid %d", interrupt_mode);
  402. return -EINVAL;
  403. }
  404. #endif
  405. /**
  406. * dp_srng_configure_pointer_update_thresholds() - Retrieve pointer
  407. * update threshold value from wlan_cfg_ctx
  408. * @soc: device handle
  409. * @ring_params: per ring specific parameters
  410. * @ring_type: Ring type
  411. * @ring_num: Ring number for a given ring type
  412. * @num_entries: number of entries to fill
  413. *
  414. * Fill the ring params with the pointer update threshold
  415. * configuration parameters available in wlan_cfg_ctx
  416. *
  417. * Return: None
  418. */
  419. static void
  420. dp_srng_configure_pointer_update_thresholds(
  421. struct dp_soc *soc,
  422. struct hal_srng_params *ring_params,
  423. int ring_type, int ring_num,
  424. int num_entries)
  425. {
  426. if (ring_type == REO_DST) {
  427. ring_params->pointer_timer_threshold =
  428. wlan_cfg_get_pointer_timer_threshold_rx(
  429. soc->wlan_cfg_ctx);
  430. ring_params->pointer_num_threshold =
  431. wlan_cfg_get_pointer_num_threshold_rx(
  432. soc->wlan_cfg_ctx);
  433. }
  434. }
  435. QDF_STATUS dp_srng_init_idx(struct dp_soc *soc, struct dp_srng *srng,
  436. int ring_type, int ring_num, int mac_id,
  437. uint32_t idx)
  438. {
  439. bool idle_check;
  440. hal_soc_handle_t hal_soc = soc->hal_soc;
  441. struct hal_srng_params ring_params;
  442. if (srng->hal_srng) {
  443. dp_init_err("%pK: Ring type: %d, num:%d is already initialized",
  444. soc, ring_type, ring_num);
  445. return QDF_STATUS_SUCCESS;
  446. }
  447. /* memset the srng ring to zero */
  448. qdf_mem_zero(srng->base_vaddr_unaligned, srng->alloc_size);
  449. qdf_mem_zero(&ring_params, sizeof(struct hal_srng_params));
  450. ring_params.ring_base_paddr = srng->base_paddr_aligned;
  451. ring_params.ring_base_vaddr = srng->base_vaddr_aligned;
  452. ring_params.num_entries = srng->num_entries;
  453. dp_info("Ring type: %d, num:%d vaddr %pK paddr %pK entries %u",
  454. ring_type, ring_num,
  455. (void *)ring_params.ring_base_vaddr,
  456. (void *)ring_params.ring_base_paddr,
  457. ring_params.num_entries);
  458. if (soc->intr_mode == DP_INTR_MSI && !dp_skip_msi_cfg(soc, ring_type)) {
  459. dp_srng_msi_setup(soc, srng, &ring_params, ring_type, ring_num);
  460. dp_verbose_debug("Using MSI for ring_type: %d, ring_num %d",
  461. ring_type, ring_num);
  462. } else {
  463. ring_params.msi_data = 0;
  464. ring_params.msi_addr = 0;
  465. dp_srng_set_msi2_ring_params(soc, &ring_params, 0, 0);
  466. dp_verbose_debug("Skipping MSI for ring_type: %d, ring_num %d",
  467. ring_type, ring_num);
  468. }
  469. dp_srng_configure_interrupt_thresholds(soc, &ring_params,
  470. ring_type, ring_num,
  471. srng->num_entries);
  472. dp_srng_set_nf_thresholds(soc, srng, &ring_params);
  473. dp_srng_configure_pointer_update_thresholds(soc, &ring_params,
  474. ring_type, ring_num,
  475. srng->num_entries);
  476. if (srng->cached)
  477. ring_params.flags |= HAL_SRNG_CACHED_DESC;
  478. idle_check = dp_check_umac_reset_in_progress(soc);
  479. srng->hal_srng = hal_srng_setup_idx(hal_soc, ring_type, ring_num,
  480. mac_id, &ring_params, idle_check,
  481. idx);
  482. if (!srng->hal_srng) {
  483. dp_srng_free(soc, srng);
  484. return QDF_STATUS_E_FAILURE;
  485. }
  486. return QDF_STATUS_SUCCESS;
  487. }
  488. qdf_export_symbol(dp_srng_init_idx);
  489. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  490. /**
  491. * dp_service_near_full_srngs() - Bottom half handler to process the near
  492. * full IRQ on a SRNG
  493. * @dp_ctx: Datapath SoC handle
  494. * @dp_budget: Number of SRNGs which can be processed in a single attempt
  495. * without rescheduling
  496. * @cpu: cpu id
  497. *
  498. * Return: remaining budget/quota for the soc device
  499. */
  500. static
  501. uint32_t dp_service_near_full_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  502. {
  503. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  504. struct dp_soc *soc = int_ctx->soc;
  505. /*
  506. * dp_service_near_full_srngs arch ops should be initialized always
  507. * if the NEAR FULL IRQ feature is enabled.
  508. */
  509. return soc->arch_ops.dp_service_near_full_srngs(soc, int_ctx,
  510. dp_budget);
  511. }
  512. #endif
  513. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  514. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  515. {
  516. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  517. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  518. struct dp_soc *soc = int_ctx->soc;
  519. int ring = 0;
  520. int index;
  521. uint32_t work_done = 0;
  522. int budget = dp_budget;
  523. uint32_t remaining_quota = dp_budget;
  524. uint8_t tx_mask = 0;
  525. uint8_t rx_mask = 0;
  526. uint8_t rx_err_mask = 0;
  527. uint8_t rx_wbm_rel_mask = 0;
  528. uint8_t reo_status_mask = 0;
  529. qdf_atomic_set_bit(cpu, &soc->service_rings_running);
  530. tx_mask = int_ctx->tx_ring_mask;
  531. rx_mask = int_ctx->rx_ring_mask;
  532. rx_err_mask = int_ctx->rx_err_ring_mask;
  533. rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  534. reo_status_mask = int_ctx->reo_status_ring_mask;
  535. dp_verbose_debug("tx %x rx %x rx_err %x rx_wbm_rel %x reo_status %x rx_mon_ring %x host2rxdma %x rxdma2host %x",
  536. tx_mask, rx_mask, rx_err_mask, rx_wbm_rel_mask,
  537. reo_status_mask,
  538. int_ctx->rx_mon_ring_mask,
  539. int_ctx->host2rxdma_ring_mask,
  540. int_ctx->rxdma2host_ring_mask);
  541. /* Process Tx completion interrupts first to return back buffers */
  542. for (index = 0; index < soc->num_tx_comp_rings; index++) {
  543. if (!(1 << wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, index) & tx_mask))
  544. continue;
  545. work_done = dp_tx_comp_handler(int_ctx,
  546. soc,
  547. soc->tx_comp_ring[index].hal_srng,
  548. index, remaining_quota);
  549. if (work_done) {
  550. intr_stats->num_tx_ring_masks[index]++;
  551. dp_verbose_debug("tx mask 0x%x index %d, budget %d, work_done %d",
  552. tx_mask, index, budget,
  553. work_done);
  554. }
  555. budget -= work_done;
  556. if (budget <= 0)
  557. goto budget_done;
  558. remaining_quota = budget;
  559. }
  560. /* Process REO Exception ring interrupt */
  561. if (rx_err_mask) {
  562. work_done = dp_rx_err_process(int_ctx, soc,
  563. soc->reo_exception_ring.hal_srng,
  564. remaining_quota);
  565. if (work_done) {
  566. intr_stats->num_rx_err_ring_masks++;
  567. dp_verbose_debug("REO Exception Ring: work_done %d budget %d",
  568. work_done, budget);
  569. }
  570. budget -= work_done;
  571. if (budget <= 0) {
  572. goto budget_done;
  573. }
  574. remaining_quota = budget;
  575. }
  576. /* Process Rx WBM release ring interrupt */
  577. if (rx_wbm_rel_mask) {
  578. work_done = dp_rx_wbm_err_process(int_ctx, soc,
  579. soc->rx_rel_ring.hal_srng,
  580. remaining_quota);
  581. if (work_done) {
  582. intr_stats->num_rx_wbm_rel_ring_masks++;
  583. dp_verbose_debug("WBM Release Ring: work_done %d budget %d",
  584. work_done, budget);
  585. }
  586. budget -= work_done;
  587. if (budget <= 0) {
  588. goto budget_done;
  589. }
  590. remaining_quota = budget;
  591. }
  592. /* Process Rx interrupts */
  593. if (rx_mask) {
  594. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  595. if (!(rx_mask & (1 << ring)))
  596. continue;
  597. work_done = soc->arch_ops.dp_rx_process(int_ctx,
  598. soc->reo_dest_ring[ring].hal_srng,
  599. ring,
  600. remaining_quota);
  601. if (work_done) {
  602. intr_stats->num_rx_ring_masks[ring]++;
  603. dp_verbose_debug("rx mask 0x%x ring %d, work_done %d budget %d",
  604. rx_mask, ring,
  605. work_done, budget);
  606. budget -= work_done;
  607. if (budget <= 0)
  608. goto budget_done;
  609. remaining_quota = budget;
  610. }
  611. }
  612. }
  613. if (reo_status_mask) {
  614. if (dp_reo_status_ring_handler(int_ctx, soc))
  615. int_ctx->intr_stats.num_reo_status_ring_masks++;
  616. }
  617. if (qdf_unlikely(!dp_monitor_is_vdev_timer_running(soc))) {
  618. work_done = dp_process_lmac_rings(int_ctx, remaining_quota);
  619. if (work_done) {
  620. budget -= work_done;
  621. if (budget <= 0)
  622. goto budget_done;
  623. remaining_quota = budget;
  624. }
  625. }
  626. qdf_lro_flush(int_ctx->lro_ctx);
  627. intr_stats->num_masks++;
  628. budget_done:
  629. qdf_atomic_clear_bit(cpu, &soc->service_rings_running);
  630. if (soc->notify_fw_callback)
  631. soc->notify_fw_callback(soc);
  632. return dp_budget - budget;
  633. }
  634. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  635. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget, int cpu)
  636. {
  637. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  638. struct dp_intr_stats *intr_stats = &int_ctx->intr_stats;
  639. struct dp_soc *soc = int_ctx->soc;
  640. uint32_t remaining_quota = dp_budget;
  641. uint32_t work_done = 0;
  642. int budget = dp_budget;
  643. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  644. if (reo_status_mask) {
  645. if (dp_reo_status_ring_handler(int_ctx, soc))
  646. int_ctx->intr_stats.num_reo_status_ring_masks++;
  647. }
  648. if (qdf_unlikely(!dp_monitor_is_vdev_timer_running(soc))) {
  649. work_done = dp_process_lmac_rings(int_ctx, remaining_quota);
  650. if (work_done) {
  651. budget -= work_done;
  652. if (budget <= 0)
  653. goto budget_done;
  654. remaining_quota = budget;
  655. }
  656. }
  657. qdf_lro_flush(int_ctx->lro_ctx);
  658. intr_stats->num_masks++;
  659. budget_done:
  660. return dp_budget - budget;
  661. }
  662. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  663. QDF_STATUS dp_soc_attach_poll(struct cdp_soc_t *txrx_soc)
  664. {
  665. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  666. int i;
  667. int lmac_id = 0;
  668. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  669. sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID);
  670. soc->intr_mode = DP_INTR_POLL;
  671. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  672. soc->intr_ctx[i].dp_intr_id = i;
  673. soc->intr_ctx[i].tx_ring_mask =
  674. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  675. soc->intr_ctx[i].rx_ring_mask =
  676. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  677. soc->intr_ctx[i].rx_mon_ring_mask =
  678. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  679. soc->intr_ctx[i].rx_err_ring_mask =
  680. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  681. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  682. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  683. soc->intr_ctx[i].reo_status_ring_mask =
  684. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  685. soc->intr_ctx[i].rxdma2host_ring_mask =
  686. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  687. soc->intr_ctx[i].soc = soc;
  688. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  689. if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) {
  690. hif_event_history_init(soc->hif_handle, i);
  691. soc->mon_intr_id_lmac_map[lmac_id] = i;
  692. lmac_id++;
  693. }
  694. }
  695. qdf_timer_init(soc->osdev, &soc->int_timer,
  696. dp_interrupt_timer, (void *)soc,
  697. QDF_TIMER_TYPE_WAKE_APPS);
  698. return QDF_STATUS_SUCCESS;
  699. }
  700. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  701. /**
  702. * dp_soc_near_full_interrupt_attach() - Register handler for DP near fill irq
  703. * @soc: DP soc handle
  704. * @num_irq: IRQ number
  705. * @irq_id_map: IRQ map
  706. * @intr_id: interrupt context ID
  707. *
  708. * Return: 0 for success. nonzero for failure.
  709. */
  710. static inline int
  711. dp_soc_near_full_interrupt_attach(struct dp_soc *soc, int num_irq,
  712. int irq_id_map[], int intr_id)
  713. {
  714. return hif_register_ext_group(soc->hif_handle,
  715. num_irq, irq_id_map,
  716. dp_service_near_full_srngs,
  717. &soc->intr_ctx[intr_id], "dp_nf_intr",
  718. HIF_EXEC_NAPI_TYPE,
  719. QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  720. }
  721. #else
  722. static inline int
  723. dp_soc_near_full_interrupt_attach(struct dp_soc *soc, int num_irq,
  724. int *irq_id_map, int intr_id)
  725. {
  726. return 0;
  727. }
  728. #endif
  729. #ifdef DP_CON_MON_MSI_SKIP_SET
  730. static inline bool dp_skip_rx_mon_ring_mask_set(struct dp_soc *soc)
  731. {
  732. return !!(soc->cdp_soc.ol_ops->get_con_mode() !=
  733. QDF_GLOBAL_MONITOR_MODE &&
  734. !wlan_cfg_get_local_pkt_capture(soc->wlan_cfg_ctx));
  735. }
  736. #else
  737. static inline bool dp_skip_rx_mon_ring_mask_set(struct dp_soc *soc)
  738. {
  739. return false;
  740. }
  741. #endif
  742. void dp_soc_interrupt_detach(struct cdp_soc_t *txrx_soc)
  743. {
  744. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  745. int i;
  746. if (soc->intr_mode == DP_INTR_POLL) {
  747. qdf_timer_free(&soc->int_timer);
  748. } else {
  749. hif_deconfigure_ext_group_interrupts(soc->hif_handle);
  750. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  751. hif_deregister_exec_group(soc->hif_handle, "dp_nf_intr");
  752. }
  753. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  754. soc->intr_ctx[i].tx_ring_mask = 0;
  755. soc->intr_ctx[i].rx_ring_mask = 0;
  756. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  757. soc->intr_ctx[i].rx_err_ring_mask = 0;
  758. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  759. soc->intr_ctx[i].reo_status_ring_mask = 0;
  760. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  761. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  762. soc->intr_ctx[i].host2rxdma_mon_ring_mask = 0;
  763. soc->intr_ctx[i].rx_near_full_grp_1_mask = 0;
  764. soc->intr_ctx[i].rx_near_full_grp_2_mask = 0;
  765. soc->intr_ctx[i].tx_ring_near_full_mask = 0;
  766. soc->intr_ctx[i].tx_mon_ring_mask = 0;
  767. soc->intr_ctx[i].host2txmon_ring_mask = 0;
  768. soc->intr_ctx[i].umac_reset_intr_mask = 0;
  769. hif_event_history_deinit(soc->hif_handle, i);
  770. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  771. }
  772. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  773. sizeof(soc->mon_intr_id_lmac_map),
  774. DP_MON_INVALID_LMAC_ID);
  775. }
  776. QDF_STATUS dp_soc_interrupt_attach(struct cdp_soc_t *txrx_soc)
  777. {
  778. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  779. int i = 0;
  780. int num_irq = 0;
  781. int rx_err_ring_intr_ctxt_id = HIF_MAX_GROUP;
  782. int lmac_id = 0;
  783. int napi_scale;
  784. qdf_mem_set(&soc->mon_intr_id_lmac_map,
  785. sizeof(soc->mon_intr_id_lmac_map), DP_MON_INVALID_LMAC_ID);
  786. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  787. int ret = 0;
  788. /* Map of IRQ ids registered with one interrupt context */
  789. int irq_id_map[HIF_MAX_GRP_IRQ];
  790. int tx_mask =
  791. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  792. int rx_mask =
  793. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  794. int rx_mon_mask =
  795. dp_soc_get_mon_mask_for_interrupt_mode(soc, i);
  796. int tx_mon_ring_mask =
  797. wlan_cfg_get_tx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  798. int rx_err_ring_mask =
  799. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  800. int rx_wbm_rel_ring_mask =
  801. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  802. int reo_status_ring_mask =
  803. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  804. int rxdma2host_ring_mask =
  805. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  806. int host2rxdma_ring_mask =
  807. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  808. int host2rxdma_mon_ring_mask =
  809. wlan_cfg_get_host2rxdma_mon_ring_mask(
  810. soc->wlan_cfg_ctx, i);
  811. int rx_near_full_grp_1_mask =
  812. wlan_cfg_get_rx_near_full_grp_1_mask(soc->wlan_cfg_ctx,
  813. i);
  814. int rx_near_full_grp_2_mask =
  815. wlan_cfg_get_rx_near_full_grp_2_mask(soc->wlan_cfg_ctx,
  816. i);
  817. int tx_ring_near_full_mask =
  818. wlan_cfg_get_tx_ring_near_full_mask(soc->wlan_cfg_ctx,
  819. i);
  820. int host2txmon_ring_mask =
  821. wlan_cfg_get_host2txmon_ring_mask(soc->wlan_cfg_ctx, i);
  822. int umac_reset_intr_mask =
  823. wlan_cfg_get_umac_reset_intr_mask(soc->wlan_cfg_ctx, i);
  824. if (dp_skip_rx_mon_ring_mask_set(soc))
  825. rx_mon_mask = 0;
  826. soc->intr_ctx[i].dp_intr_id = i;
  827. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  828. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  829. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  830. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  831. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  832. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  833. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  834. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  835. soc->intr_ctx[i].host2rxdma_mon_ring_mask =
  836. host2rxdma_mon_ring_mask;
  837. soc->intr_ctx[i].rx_near_full_grp_1_mask =
  838. rx_near_full_grp_1_mask;
  839. soc->intr_ctx[i].rx_near_full_grp_2_mask =
  840. rx_near_full_grp_2_mask;
  841. soc->intr_ctx[i].tx_ring_near_full_mask =
  842. tx_ring_near_full_mask;
  843. soc->intr_ctx[i].tx_mon_ring_mask = tx_mon_ring_mask;
  844. soc->intr_ctx[i].host2txmon_ring_mask = host2txmon_ring_mask;
  845. soc->intr_ctx[i].umac_reset_intr_mask = umac_reset_intr_mask;
  846. soc->intr_ctx[i].soc = soc;
  847. num_irq = 0;
  848. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  849. &num_irq);
  850. if (rx_near_full_grp_1_mask | rx_near_full_grp_2_mask |
  851. tx_ring_near_full_mask) {
  852. dp_soc_near_full_interrupt_attach(soc, num_irq,
  853. irq_id_map, i);
  854. } else {
  855. napi_scale = wlan_cfg_get_napi_scale_factor(
  856. soc->wlan_cfg_ctx);
  857. if (!napi_scale)
  858. napi_scale = QCA_NAPI_DEF_SCALE_BIN_SHIFT;
  859. ret = hif_register_ext_group(soc->hif_handle,
  860. num_irq, irq_id_map, dp_service_srngs_wrapper,
  861. &soc->intr_ctx[i], "dp_intr",
  862. HIF_EXEC_NAPI_TYPE, napi_scale);
  863. }
  864. dp_debug(" int ctx %u num_irq %u irq_id_map %u %u",
  865. i, num_irq, irq_id_map[0], irq_id_map[1]);
  866. if (ret) {
  867. dp_init_err("%pK: failed, ret = %d", soc, ret);
  868. dp_soc_interrupt_detach(txrx_soc);
  869. return QDF_STATUS_E_FAILURE;
  870. }
  871. hif_event_history_init(soc->hif_handle, i);
  872. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  873. if (rx_err_ring_mask)
  874. rx_err_ring_intr_ctxt_id = i;
  875. if (dp_is_mon_mask_valid(soc, &soc->intr_ctx[i])) {
  876. soc->mon_intr_id_lmac_map[lmac_id] = i;
  877. lmac_id++;
  878. }
  879. }
  880. hif_configure_ext_group_interrupts(soc->hif_handle);
  881. if (rx_err_ring_intr_ctxt_id != HIF_MAX_GROUP)
  882. hif_config_irq_clear_cpu_affinity(soc->hif_handle,
  883. rx_err_ring_intr_ctxt_id, 0);
  884. return QDF_STATUS_SUCCESS;
  885. }
  886. #define AVG_MAX_MPDUS_PER_TID 128
  887. #define AVG_TIDS_PER_CLIENT 2
  888. #define AVG_FLOWS_PER_TID 2
  889. #define AVG_MSDUS_PER_FLOW 128
  890. #define AVG_MSDUS_PER_MPDU 4
  891. void dp_hw_link_desc_pool_banks_free(struct dp_soc *soc, uint32_t mac_id)
  892. {
  893. struct qdf_mem_multi_page_t *pages;
  894. if (mac_id != WLAN_INVALID_PDEV_ID) {
  895. pages = dp_monitor_get_link_desc_pages(soc, mac_id);
  896. } else {
  897. pages = &soc->link_desc_pages;
  898. }
  899. if (!pages) {
  900. dp_err("can not get link desc pages");
  901. QDF_ASSERT(0);
  902. return;
  903. }
  904. if (pages->dma_pages) {
  905. wlan_minidump_remove((void *)
  906. pages->dma_pages->page_v_addr_start,
  907. pages->num_pages * pages->page_size,
  908. soc->ctrl_psoc,
  909. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  910. "hw_link_desc_bank");
  911. dp_desc_multi_pages_mem_free(soc, QDF_DP_HW_LINK_DESC_TYPE,
  912. pages, 0, false);
  913. }
  914. }
  915. qdf_export_symbol(dp_hw_link_desc_pool_banks_free);
  916. QDF_STATUS dp_hw_link_desc_pool_banks_alloc(struct dp_soc *soc, uint32_t mac_id)
  917. {
  918. hal_soc_handle_t hal_soc = soc->hal_soc;
  919. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  920. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  921. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  922. uint32_t num_mpdus_per_link_desc = hal_num_mpdus_per_link_desc(hal_soc);
  923. uint32_t num_msdus_per_link_desc = hal_num_msdus_per_link_desc(hal_soc);
  924. uint32_t num_mpdu_links_per_queue_desc =
  925. hal_num_mpdu_links_per_queue_desc(hal_soc);
  926. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  927. uint32_t *total_link_descs, total_mem_size;
  928. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  929. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  930. uint32_t num_entries;
  931. struct qdf_mem_multi_page_t *pages;
  932. struct dp_srng *dp_srng;
  933. uint8_t minidump_str[MINIDUMP_STR_SIZE];
  934. /* Only Tx queue descriptors are allocated from common link descriptor
  935. * pool Rx queue descriptors are not included in this because (REO queue
  936. * extension descriptors) they are expected to be allocated contiguously
  937. * with REO queue descriptors
  938. */
  939. if (mac_id != WLAN_INVALID_PDEV_ID) {
  940. pages = dp_monitor_get_link_desc_pages(soc, mac_id);
  941. /* dp_monitor_get_link_desc_pages returns NULL only
  942. * if monitor SOC is NULL
  943. */
  944. if (!pages) {
  945. dp_err("can not get link desc pages");
  946. QDF_ASSERT(0);
  947. return QDF_STATUS_E_FAULT;
  948. }
  949. dp_srng = &soc->rxdma_mon_desc_ring[mac_id];
  950. num_entries = dp_srng->alloc_size /
  951. hal_srng_get_entrysize(soc->hal_soc,
  952. RXDMA_MONITOR_DESC);
  953. total_link_descs = dp_monitor_get_total_link_descs(soc, mac_id);
  954. qdf_str_lcopy(minidump_str, "mon_link_desc_bank",
  955. MINIDUMP_STR_SIZE);
  956. } else {
  957. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  958. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  959. num_mpdu_queue_descs = num_mpdu_link_descs /
  960. num_mpdu_links_per_queue_desc;
  961. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  962. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  963. num_msdus_per_link_desc;
  964. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  965. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  966. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  967. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  968. pages = &soc->link_desc_pages;
  969. total_link_descs = &soc->total_link_descs;
  970. qdf_str_lcopy(minidump_str, "link_desc_bank",
  971. MINIDUMP_STR_SIZE);
  972. }
  973. /* If link descriptor banks are allocated, return from here */
  974. if (pages->num_pages)
  975. return QDF_STATUS_SUCCESS;
  976. /* Round up to power of 2 */
  977. *total_link_descs = 1;
  978. while (*total_link_descs < num_entries)
  979. *total_link_descs <<= 1;
  980. dp_init_info("%pK: total_link_descs: %u, link_desc_size: %d",
  981. soc, *total_link_descs, link_desc_size);
  982. total_mem_size = *total_link_descs * link_desc_size;
  983. total_mem_size += link_desc_align;
  984. dp_init_info("%pK: total_mem_size: %d",
  985. soc, total_mem_size);
  986. dp_set_max_page_size(pages, max_alloc_size);
  987. dp_desc_multi_pages_mem_alloc(soc, QDF_DP_HW_LINK_DESC_TYPE,
  988. pages,
  989. link_desc_size,
  990. *total_link_descs,
  991. 0, false);
  992. if (!pages->num_pages) {
  993. dp_err("Multi page alloc fail for hw link desc pool");
  994. return QDF_STATUS_E_FAULT;
  995. }
  996. wlan_minidump_log(pages->dma_pages->page_v_addr_start,
  997. pages->num_pages * pages->page_size,
  998. soc->ctrl_psoc,
  999. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1000. "hw_link_desc_bank");
  1001. return QDF_STATUS_SUCCESS;
  1002. }
  1003. void dp_hw_link_desc_ring_free(struct dp_soc *soc)
  1004. {
  1005. uint32_t i;
  1006. uint32_t size = soc->wbm_idle_scatter_buf_size;
  1007. void *vaddr = soc->wbm_idle_link_ring.base_vaddr_unaligned;
  1008. qdf_dma_addr_t paddr;
  1009. if (soc->wbm_idle_scatter_buf_base_vaddr[0]) {
  1010. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1011. vaddr = soc->wbm_idle_scatter_buf_base_vaddr[i];
  1012. paddr = soc->wbm_idle_scatter_buf_base_paddr[i];
  1013. if (vaddr) {
  1014. qdf_mem_free_consistent(soc->osdev,
  1015. soc->osdev->dev,
  1016. size,
  1017. vaddr,
  1018. paddr,
  1019. 0);
  1020. vaddr = NULL;
  1021. }
  1022. }
  1023. } else {
  1024. wlan_minidump_remove(soc->wbm_idle_link_ring.base_vaddr_unaligned,
  1025. soc->wbm_idle_link_ring.alloc_size,
  1026. soc->ctrl_psoc,
  1027. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1028. "wbm_idle_link_ring");
  1029. dp_srng_free(soc, &soc->wbm_idle_link_ring);
  1030. }
  1031. }
  1032. QDF_STATUS dp_hw_link_desc_ring_alloc(struct dp_soc *soc)
  1033. {
  1034. uint32_t entry_size, i;
  1035. uint32_t total_mem_size;
  1036. qdf_dma_addr_t *baseaddr = NULL;
  1037. struct dp_srng *dp_srng;
  1038. uint32_t ring_type;
  1039. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1040. uint32_t tlds;
  1041. ring_type = WBM_IDLE_LINK;
  1042. dp_srng = &soc->wbm_idle_link_ring;
  1043. tlds = soc->total_link_descs;
  1044. entry_size = hal_srng_get_entrysize(soc->hal_soc, ring_type);
  1045. total_mem_size = entry_size * tlds;
  1046. if (total_mem_size <= max_alloc_size) {
  1047. if (dp_srng_alloc(soc, dp_srng, ring_type, tlds, 0)) {
  1048. dp_init_err("%pK: Link desc idle ring setup failed",
  1049. soc);
  1050. goto fail;
  1051. }
  1052. wlan_minidump_log(soc->wbm_idle_link_ring.base_vaddr_unaligned,
  1053. soc->wbm_idle_link_ring.alloc_size,
  1054. soc->ctrl_psoc,
  1055. WLAN_MD_DP_SRNG_WBM_IDLE_LINK,
  1056. "wbm_idle_link_ring");
  1057. } else {
  1058. uint32_t num_scatter_bufs;
  1059. uint32_t buf_size = 0;
  1060. soc->wbm_idle_scatter_buf_size =
  1061. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1062. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1063. soc->hal_soc, total_mem_size,
  1064. soc->wbm_idle_scatter_buf_size);
  1065. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1066. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1067. FL("scatter bufs size out of bounds"));
  1068. goto fail;
  1069. }
  1070. for (i = 0; i < num_scatter_bufs; i++) {
  1071. baseaddr = &soc->wbm_idle_scatter_buf_base_paddr[i];
  1072. buf_size = soc->wbm_idle_scatter_buf_size;
  1073. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1074. qdf_mem_alloc_consistent(soc->osdev,
  1075. soc->osdev->dev,
  1076. buf_size,
  1077. baseaddr);
  1078. if (!soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1079. QDF_TRACE(QDF_MODULE_ID_DP,
  1080. QDF_TRACE_LEVEL_ERROR,
  1081. FL("Scatter lst memory alloc fail"));
  1082. goto fail;
  1083. }
  1084. }
  1085. soc->num_scatter_bufs = num_scatter_bufs;
  1086. }
  1087. return QDF_STATUS_SUCCESS;
  1088. fail:
  1089. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1090. void *vaddr = soc->wbm_idle_scatter_buf_base_vaddr[i];
  1091. qdf_dma_addr_t paddr = soc->wbm_idle_scatter_buf_base_paddr[i];
  1092. if (vaddr) {
  1093. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1094. soc->wbm_idle_scatter_buf_size,
  1095. vaddr,
  1096. paddr, 0);
  1097. vaddr = NULL;
  1098. }
  1099. }
  1100. return QDF_STATUS_E_NOMEM;
  1101. }
  1102. qdf_export_symbol(dp_hw_link_desc_pool_banks_alloc);
  1103. QDF_STATUS dp_hw_link_desc_ring_init(struct dp_soc *soc)
  1104. {
  1105. struct dp_srng *dp_srng = &soc->wbm_idle_link_ring;
  1106. if (dp_srng->base_vaddr_unaligned) {
  1107. if (dp_srng_init(soc, dp_srng, WBM_IDLE_LINK, 0, 0))
  1108. return QDF_STATUS_E_FAILURE;
  1109. }
  1110. return QDF_STATUS_SUCCESS;
  1111. }
  1112. void dp_hw_link_desc_ring_deinit(struct dp_soc *soc)
  1113. {
  1114. dp_srng_deinit(soc, &soc->wbm_idle_link_ring, WBM_IDLE_LINK, 0);
  1115. }
  1116. #ifdef IPA_OFFLOAD
  1117. #define USE_1_IPA_RX_REO_RING 1
  1118. #define USE_2_IPA_RX_REO_RINGS 2
  1119. #define REO_DST_RING_SIZE_QCA6290 1023
  1120. #ifndef CONFIG_WIFI_EMULATION_WIFI_3_0
  1121. #define REO_DST_RING_SIZE_QCA8074 1023
  1122. #define REO_DST_RING_SIZE_QCN9000 2048
  1123. #else
  1124. #define REO_DST_RING_SIZE_QCA8074 8
  1125. #define REO_DST_RING_SIZE_QCN9000 8
  1126. #endif /* CONFIG_WIFI_EMULATION_WIFI_3_0 */
  1127. #ifdef IPA_WDI3_TX_TWO_PIPES
  1128. #ifdef DP_MEMORY_OPT
  1129. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1130. {
  1131. return dp_init_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1132. }
  1133. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1134. {
  1135. dp_deinit_tx_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1136. }
  1137. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1138. {
  1139. return dp_alloc_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1140. }
  1141. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1142. {
  1143. dp_free_tx_ring_pair_by_index(soc, IPA_TX_ALT_RING_IDX);
  1144. }
  1145. #else /* !DP_MEMORY_OPT */
  1146. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1147. {
  1148. return 0;
  1149. }
  1150. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1151. {
  1152. }
  1153. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1154. {
  1155. return 0;
  1156. }
  1157. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1158. {
  1159. }
  1160. #endif /* DP_MEMORY_OPT */
  1161. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  1162. {
  1163. hal_tx_init_data_ring(soc->hal_soc,
  1164. soc->tcl_data_ring[IPA_TX_ALT_RING_IDX].hal_srng);
  1165. }
  1166. #else /* !IPA_WDI3_TX_TWO_PIPES */
  1167. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1168. {
  1169. return 0;
  1170. }
  1171. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1172. {
  1173. }
  1174. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1175. {
  1176. return 0;
  1177. }
  1178. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1179. {
  1180. }
  1181. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  1182. {
  1183. }
  1184. #endif /* IPA_WDI3_TX_TWO_PIPES */
  1185. #else
  1186. #define REO_DST_RING_SIZE_QCA6290 1024
  1187. static int dp_ipa_init_alt_tx_ring(struct dp_soc *soc)
  1188. {
  1189. return 0;
  1190. }
  1191. static void dp_ipa_deinit_alt_tx_ring(struct dp_soc *soc)
  1192. {
  1193. }
  1194. static int dp_ipa_alloc_alt_tx_ring(struct dp_soc *soc)
  1195. {
  1196. return 0;
  1197. }
  1198. static void dp_ipa_free_alt_tx_ring(struct dp_soc *soc)
  1199. {
  1200. }
  1201. void dp_ipa_hal_tx_init_alt_data_ring(struct dp_soc *soc)
  1202. {
  1203. }
  1204. #endif /* IPA_OFFLOAD */
  1205. /**
  1206. * dp_soc_reset_cpu_ring_map() - Reset cpu ring map
  1207. * @soc: Datapath soc handler
  1208. *
  1209. * This api resets the default cpu ring map
  1210. */
  1211. void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1212. {
  1213. uint8_t i;
  1214. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1215. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1216. switch (nss_config) {
  1217. case dp_nss_cfg_first_radio:
  1218. /*
  1219. * Setting Tx ring map for one nss offloaded radio
  1220. */
  1221. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1222. break;
  1223. case dp_nss_cfg_second_radio:
  1224. /*
  1225. * Setting Tx ring for two nss offloaded radios
  1226. */
  1227. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1228. break;
  1229. case dp_nss_cfg_dbdc:
  1230. /*
  1231. * Setting Tx ring map for 2 nss offloaded radios
  1232. */
  1233. soc->tx_ring_map[i] =
  1234. dp_cpu_ring_map[DP_NSS_DBDC_OFFLOADED_MAP][i];
  1235. break;
  1236. case dp_nss_cfg_dbtc:
  1237. /*
  1238. * Setting Tx ring map for 3 nss offloaded radios
  1239. */
  1240. soc->tx_ring_map[i] =
  1241. dp_cpu_ring_map[DP_NSS_DBTC_OFFLOADED_MAP][i];
  1242. break;
  1243. default:
  1244. dp_err("tx_ring_map failed due to invalid nss cfg");
  1245. break;
  1246. }
  1247. }
  1248. }
  1249. /**
  1250. * dp_soc_disable_unused_mac_intr_mask() - reset interrupt mask for
  1251. * unused WMAC hw rings
  1252. * @soc: DP Soc handle
  1253. * @mac_num: wmac num
  1254. *
  1255. * Return: Return void
  1256. */
  1257. static void dp_soc_disable_unused_mac_intr_mask(struct dp_soc *soc,
  1258. int mac_num)
  1259. {
  1260. uint8_t *grp_mask = NULL;
  1261. int group_number;
  1262. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1263. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1264. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1265. group_number, 0x0);
  1266. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  1267. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1268. wlan_cfg_set_rx_mon_ring_mask(soc->wlan_cfg_ctx,
  1269. group_number, 0x0);
  1270. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  1271. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1272. wlan_cfg_set_rxdma2host_ring_mask(soc->wlan_cfg_ctx,
  1273. group_number, 0x0);
  1274. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[0];
  1275. group_number = dp_srng_find_ring_in_mask(mac_num, grp_mask);
  1276. wlan_cfg_set_host2rxdma_mon_ring_mask(soc->wlan_cfg_ctx,
  1277. group_number, 0x0);
  1278. }
  1279. #ifdef IPA_OFFLOAD
  1280. #ifdef IPA_WDI3_VLAN_SUPPORT
  1281. /**
  1282. * dp_soc_reset_ipa_vlan_intr_mask() - reset interrupt mask for IPA offloaded
  1283. * ring for vlan tagged traffic
  1284. * @soc: DP Soc handle
  1285. *
  1286. * Return: Return void
  1287. */
  1288. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  1289. {
  1290. uint8_t *grp_mask = NULL;
  1291. int group_number, mask;
  1292. if (!wlan_ipa_is_vlan_enabled())
  1293. return;
  1294. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1295. group_number = dp_srng_find_ring_in_mask(IPA_ALT_REO_DEST_RING_IDX, grp_mask);
  1296. if (group_number < 0) {
  1297. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1298. soc, REO_DST, IPA_ALT_REO_DEST_RING_IDX);
  1299. return;
  1300. }
  1301. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1302. /* reset the interrupt mask for offloaded ring */
  1303. mask &= (~(1 << IPA_ALT_REO_DEST_RING_IDX));
  1304. /*
  1305. * set the interrupt mask to zero for rx offloaded radio.
  1306. */
  1307. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1308. }
  1309. #else
  1310. inline
  1311. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  1312. { }
  1313. #endif /* IPA_WDI3_VLAN_SUPPORT */
  1314. #else
  1315. inline
  1316. void dp_soc_reset_ipa_vlan_intr_mask(struct dp_soc *soc)
  1317. { }
  1318. #endif /* IPA_OFFLOAD */
  1319. /**
  1320. * dp_soc_reset_intr_mask() - reset interrupt mask
  1321. * @soc: DP Soc handle
  1322. *
  1323. * Return: Return void
  1324. */
  1325. void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1326. {
  1327. uint8_t j;
  1328. uint8_t *grp_mask = NULL;
  1329. int group_number, mask, num_ring;
  1330. /* number of tx ring */
  1331. num_ring = soc->num_tcl_data_rings;
  1332. /*
  1333. * group mask for tx completion ring.
  1334. */
  1335. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1336. /* loop and reset the mask for only offloaded ring */
  1337. for (j = 0; j < WLAN_CFG_NUM_TCL_DATA_RINGS; j++) {
  1338. /*
  1339. * Group number corresponding to tx offloaded ring.
  1340. */
  1341. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1342. if (group_number < 0) {
  1343. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1344. soc, WBM2SW_RELEASE, j);
  1345. continue;
  1346. }
  1347. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1348. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j) &&
  1349. (!mask)) {
  1350. continue;
  1351. }
  1352. /* reset the tx mask for offloaded ring */
  1353. mask &= (~(1 << j));
  1354. /*
  1355. * reset the interrupt mask for offloaded ring.
  1356. */
  1357. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1358. }
  1359. /* number of rx rings */
  1360. num_ring = soc->num_reo_dest_rings;
  1361. /*
  1362. * group mask for reo destination ring.
  1363. */
  1364. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1365. /* loop and reset the mask for only offloaded ring */
  1366. for (j = 0; j < WLAN_CFG_NUM_REO_DEST_RING; j++) {
  1367. /*
  1368. * Group number corresponding to rx offloaded ring.
  1369. */
  1370. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1371. if (group_number < 0) {
  1372. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1373. soc, REO_DST, j);
  1374. continue;
  1375. }
  1376. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1377. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j) &&
  1378. (!mask)) {
  1379. continue;
  1380. }
  1381. /* reset the interrupt mask for offloaded ring */
  1382. mask &= (~(1 << j));
  1383. /*
  1384. * set the interrupt mask to zero for rx offloaded radio.
  1385. */
  1386. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1387. }
  1388. /*
  1389. * group mask for Rx buffer refill ring
  1390. */
  1391. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1392. /* loop and reset the mask for only offloaded ring */
  1393. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1394. int lmac_id = wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1395. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1396. continue;
  1397. }
  1398. /*
  1399. * Group number corresponding to rx offloaded ring.
  1400. */
  1401. group_number = dp_srng_find_ring_in_mask(lmac_id, grp_mask);
  1402. if (group_number < 0) {
  1403. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1404. soc, REO_DST, lmac_id);
  1405. continue;
  1406. }
  1407. /* set the interrupt mask for offloaded ring */
  1408. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1409. group_number);
  1410. mask &= (~(1 << lmac_id));
  1411. /*
  1412. * set the interrupt mask to zero for rx offloaded radio.
  1413. */
  1414. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1415. group_number, mask);
  1416. }
  1417. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  1418. for (j = 0; j < num_ring; j++) {
  1419. if (!dp_soc_ring_if_nss_offloaded(soc, REO_EXCEPTION, j)) {
  1420. continue;
  1421. }
  1422. /*
  1423. * Group number corresponding to rx err ring.
  1424. */
  1425. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1426. if (group_number < 0) {
  1427. dp_init_debug("%pK: ring not part of any group; ring_type: %d,ring_num %d",
  1428. soc, REO_EXCEPTION, j);
  1429. continue;
  1430. }
  1431. wlan_cfg_set_rx_err_ring_mask(soc->wlan_cfg_ctx,
  1432. group_number, 0);
  1433. }
  1434. }
  1435. #ifdef IPA_OFFLOAD
  1436. bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap0,
  1437. uint32_t *remap1, uint32_t *remap2)
  1438. {
  1439. uint32_t ring[WLAN_CFG_NUM_REO_DEST_RING_MAX] = {
  1440. REO_REMAP_SW1, REO_REMAP_SW2, REO_REMAP_SW3,
  1441. REO_REMAP_SW5, REO_REMAP_SW6, REO_REMAP_SW7};
  1442. switch (soc->arch_id) {
  1443. case CDP_ARCH_TYPE_BE:
  1444. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1445. soc->num_reo_dest_rings -
  1446. USE_2_IPA_RX_REO_RINGS, remap1,
  1447. remap2);
  1448. break;
  1449. case CDP_ARCH_TYPE_LI:
  1450. if (wlan_ipa_is_vlan_enabled()) {
  1451. hal_compute_reo_remap_ix2_ix3(
  1452. soc->hal_soc, ring,
  1453. soc->num_reo_dest_rings -
  1454. USE_2_IPA_RX_REO_RINGS, remap1,
  1455. remap2);
  1456. } else {
  1457. hal_compute_reo_remap_ix2_ix3(
  1458. soc->hal_soc, ring,
  1459. soc->num_reo_dest_rings -
  1460. USE_1_IPA_RX_REO_RING, remap1,
  1461. remap2);
  1462. }
  1463. hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
  1464. break;
  1465. default:
  1466. dp_err("unknown arch_id 0x%x", soc->arch_id);
  1467. QDF_BUG(0);
  1468. }
  1469. dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
  1470. return true;
  1471. }
  1472. #ifdef IPA_WDI3_TX_TWO_PIPES
  1473. static bool dp_ipa_is_alt_tx_ring(int index)
  1474. {
  1475. return index == IPA_TX_ALT_RING_IDX;
  1476. }
  1477. static bool dp_ipa_is_alt_tx_comp_ring(int index)
  1478. {
  1479. return index == IPA_TX_ALT_COMP_RING_IDX;
  1480. }
  1481. #else /* !IPA_WDI3_TX_TWO_PIPES */
  1482. static bool dp_ipa_is_alt_tx_ring(int index)
  1483. {
  1484. return false;
  1485. }
  1486. static bool dp_ipa_is_alt_tx_comp_ring(int index)
  1487. {
  1488. return false;
  1489. }
  1490. #endif /* IPA_WDI3_TX_TWO_PIPES */
  1491. /**
  1492. * dp_ipa_get_tx_ring_size() - Get Tx ring size for IPA
  1493. *
  1494. * @tx_ring_num: Tx ring number
  1495. * @tx_ipa_ring_sz: Return param only updated for IPA.
  1496. * @soc_cfg_ctx: dp soc cfg context
  1497. *
  1498. * Return: None
  1499. */
  1500. static void dp_ipa_get_tx_ring_size(int tx_ring_num, int *tx_ipa_ring_sz,
  1501. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1502. {
  1503. if (!soc_cfg_ctx->ipa_enabled)
  1504. return;
  1505. if (tx_ring_num == IPA_TCL_DATA_RING_IDX)
  1506. *tx_ipa_ring_sz = wlan_cfg_ipa_tx_ring_size(soc_cfg_ctx);
  1507. else if (dp_ipa_is_alt_tx_ring(tx_ring_num))
  1508. *tx_ipa_ring_sz = wlan_cfg_ipa_tx_alt_ring_size(soc_cfg_ctx);
  1509. }
  1510. /**
  1511. * dp_ipa_get_tx_comp_ring_size() - Get Tx comp ring size for IPA
  1512. *
  1513. * @tx_comp_ring_num: Tx comp ring number
  1514. * @tx_comp_ipa_ring_sz: Return param only updated for IPA.
  1515. * @soc_cfg_ctx: dp soc cfg context
  1516. *
  1517. * Return: None
  1518. */
  1519. static void dp_ipa_get_tx_comp_ring_size(int tx_comp_ring_num,
  1520. int *tx_comp_ipa_ring_sz,
  1521. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1522. {
  1523. if (!soc_cfg_ctx->ipa_enabled)
  1524. return;
  1525. if (tx_comp_ring_num == IPA_TCL_DATA_RING_IDX)
  1526. *tx_comp_ipa_ring_sz =
  1527. wlan_cfg_ipa_tx_comp_ring_size(soc_cfg_ctx);
  1528. else if (dp_ipa_is_alt_tx_comp_ring(tx_comp_ring_num))
  1529. *tx_comp_ipa_ring_sz =
  1530. wlan_cfg_ipa_tx_alt_comp_ring_size(soc_cfg_ctx);
  1531. }
  1532. #else
  1533. static uint8_t dp_reo_ring_selection(uint32_t value, uint32_t *ring)
  1534. {
  1535. uint8_t num = 0;
  1536. switch (value) {
  1537. /* should we have all the different possible ring configs */
  1538. case 0xFF:
  1539. num = 8;
  1540. ring[0] = REO_REMAP_SW1;
  1541. ring[1] = REO_REMAP_SW2;
  1542. ring[2] = REO_REMAP_SW3;
  1543. ring[3] = REO_REMAP_SW4;
  1544. ring[4] = REO_REMAP_SW5;
  1545. ring[5] = REO_REMAP_SW6;
  1546. ring[6] = REO_REMAP_SW7;
  1547. ring[7] = REO_REMAP_SW8;
  1548. break;
  1549. case 0x3F:
  1550. num = 6;
  1551. ring[0] = REO_REMAP_SW1;
  1552. ring[1] = REO_REMAP_SW2;
  1553. ring[2] = REO_REMAP_SW3;
  1554. ring[3] = REO_REMAP_SW4;
  1555. ring[4] = REO_REMAP_SW5;
  1556. ring[5] = REO_REMAP_SW6;
  1557. break;
  1558. case 0xF:
  1559. num = 4;
  1560. ring[0] = REO_REMAP_SW1;
  1561. ring[1] = REO_REMAP_SW2;
  1562. ring[2] = REO_REMAP_SW3;
  1563. ring[3] = REO_REMAP_SW4;
  1564. break;
  1565. case 0xE:
  1566. num = 3;
  1567. ring[0] = REO_REMAP_SW2;
  1568. ring[1] = REO_REMAP_SW3;
  1569. ring[2] = REO_REMAP_SW4;
  1570. break;
  1571. case 0xD:
  1572. num = 3;
  1573. ring[0] = REO_REMAP_SW1;
  1574. ring[1] = REO_REMAP_SW3;
  1575. ring[2] = REO_REMAP_SW4;
  1576. break;
  1577. case 0xC:
  1578. num = 2;
  1579. ring[0] = REO_REMAP_SW3;
  1580. ring[1] = REO_REMAP_SW4;
  1581. break;
  1582. case 0xB:
  1583. num = 3;
  1584. ring[0] = REO_REMAP_SW1;
  1585. ring[1] = REO_REMAP_SW2;
  1586. ring[2] = REO_REMAP_SW4;
  1587. break;
  1588. case 0xA:
  1589. num = 2;
  1590. ring[0] = REO_REMAP_SW2;
  1591. ring[1] = REO_REMAP_SW4;
  1592. break;
  1593. case 0x9:
  1594. num = 2;
  1595. ring[0] = REO_REMAP_SW1;
  1596. ring[1] = REO_REMAP_SW4;
  1597. break;
  1598. case 0x8:
  1599. num = 1;
  1600. ring[0] = REO_REMAP_SW4;
  1601. break;
  1602. case 0x7:
  1603. num = 3;
  1604. ring[0] = REO_REMAP_SW1;
  1605. ring[1] = REO_REMAP_SW2;
  1606. ring[2] = REO_REMAP_SW3;
  1607. break;
  1608. case 0x6:
  1609. num = 2;
  1610. ring[0] = REO_REMAP_SW2;
  1611. ring[1] = REO_REMAP_SW3;
  1612. break;
  1613. case 0x5:
  1614. num = 2;
  1615. ring[0] = REO_REMAP_SW1;
  1616. ring[1] = REO_REMAP_SW3;
  1617. break;
  1618. case 0x4:
  1619. num = 1;
  1620. ring[0] = REO_REMAP_SW3;
  1621. break;
  1622. case 0x3:
  1623. num = 2;
  1624. ring[0] = REO_REMAP_SW1;
  1625. ring[1] = REO_REMAP_SW2;
  1626. break;
  1627. case 0x2:
  1628. num = 1;
  1629. ring[0] = REO_REMAP_SW2;
  1630. break;
  1631. case 0x1:
  1632. num = 1;
  1633. ring[0] = REO_REMAP_SW1;
  1634. break;
  1635. default:
  1636. dp_err("unknown reo ring map 0x%x", value);
  1637. QDF_BUG(0);
  1638. }
  1639. return num;
  1640. }
  1641. bool dp_reo_remap_config(struct dp_soc *soc,
  1642. uint32_t *remap0,
  1643. uint32_t *remap1,
  1644. uint32_t *remap2)
  1645. {
  1646. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1647. uint32_t reo_config = wlan_cfg_get_reo_rings_mapping(soc->wlan_cfg_ctx);
  1648. uint8_t num;
  1649. uint32_t ring[WLAN_CFG_NUM_REO_DEST_RING_MAX];
  1650. uint32_t value;
  1651. switch (offload_radio) {
  1652. case dp_nss_cfg_default:
  1653. value = reo_config & WLAN_CFG_NUM_REO_RINGS_MAP_MAX;
  1654. num = dp_reo_ring_selection(value, ring);
  1655. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1656. num, remap1, remap2);
  1657. hal_compute_reo_remap_ix0(soc->hal_soc, remap0);
  1658. break;
  1659. case dp_nss_cfg_first_radio:
  1660. value = reo_config & 0xE;
  1661. num = dp_reo_ring_selection(value, ring);
  1662. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1663. num, remap1, remap2);
  1664. break;
  1665. case dp_nss_cfg_second_radio:
  1666. value = reo_config & 0xD;
  1667. num = dp_reo_ring_selection(value, ring);
  1668. hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
  1669. num, remap1, remap2);
  1670. break;
  1671. case dp_nss_cfg_dbdc:
  1672. case dp_nss_cfg_dbtc:
  1673. /* return false if both or all are offloaded to NSS */
  1674. return false;
  1675. }
  1676. dp_debug("remap1 %x remap2 %x offload_radio %u",
  1677. *remap1, *remap2, offload_radio);
  1678. return true;
  1679. }
  1680. static void dp_ipa_get_tx_ring_size(int ring_num, int *tx_ipa_ring_sz,
  1681. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1682. {
  1683. }
  1684. static void dp_ipa_get_tx_comp_ring_size(int tx_comp_ring_num,
  1685. int *tx_comp_ipa_ring_sz,
  1686. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx)
  1687. {
  1688. }
  1689. #endif /* IPA_OFFLOAD */
  1690. /**
  1691. * dp_reo_frag_dst_set() - configure reo register to set the
  1692. * fragment destination ring
  1693. * @soc: Datapath soc
  1694. * @frag_dst_ring: output parameter to set fragment destination ring
  1695. *
  1696. * Based on offload_radio below fragment destination rings is selected
  1697. * 0 - TCL
  1698. * 1 - SW1
  1699. * 2 - SW2
  1700. * 3 - SW3
  1701. * 4 - SW4
  1702. * 5 - Release
  1703. * 6 - FW
  1704. * 7 - alternate select
  1705. *
  1706. * Return: void
  1707. */
  1708. void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1709. {
  1710. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1711. switch (offload_radio) {
  1712. case dp_nss_cfg_default:
  1713. *frag_dst_ring = REO_REMAP_TCL;
  1714. break;
  1715. case dp_nss_cfg_first_radio:
  1716. /*
  1717. * This configuration is valid for single band radio which
  1718. * is also NSS offload.
  1719. */
  1720. case dp_nss_cfg_dbdc:
  1721. case dp_nss_cfg_dbtc:
  1722. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1723. break;
  1724. default:
  1725. dp_init_err("%pK: dp_reo_frag_dst_set invalid offload radio config", soc);
  1726. break;
  1727. }
  1728. }
  1729. #ifdef WLAN_FEATURE_STATS_EXT
  1730. static inline void dp_create_ext_stats_event(struct dp_soc *soc)
  1731. {
  1732. qdf_event_create(&soc->rx_hw_stats_event);
  1733. }
  1734. #else
  1735. static inline void dp_create_ext_stats_event(struct dp_soc *soc)
  1736. {
  1737. }
  1738. #endif
  1739. static void dp_deinit_tx_pair_by_index(struct dp_soc *soc, int index)
  1740. {
  1741. int tcl_ring_num, wbm_ring_num;
  1742. wlan_cfg_get_tcl_wbm_ring_num_for_index(soc->wlan_cfg_ctx,
  1743. index,
  1744. &tcl_ring_num,
  1745. &wbm_ring_num);
  1746. if (tcl_ring_num == -1) {
  1747. dp_err("incorrect tcl ring num for index %u", index);
  1748. return;
  1749. }
  1750. wlan_minidump_remove(soc->tcl_data_ring[index].base_vaddr_unaligned,
  1751. soc->tcl_data_ring[index].alloc_size,
  1752. soc->ctrl_psoc,
  1753. WLAN_MD_DP_SRNG_TCL_DATA,
  1754. "tcl_data_ring");
  1755. dp_info("index %u tcl %u wbm %u", index, tcl_ring_num, wbm_ring_num);
  1756. dp_srng_deinit(soc, &soc->tcl_data_ring[index], TCL_DATA,
  1757. tcl_ring_num);
  1758. if (wbm_ring_num == INVALID_WBM_RING_NUM)
  1759. return;
  1760. wlan_minidump_remove(soc->tx_comp_ring[index].base_vaddr_unaligned,
  1761. soc->tx_comp_ring[index].alloc_size,
  1762. soc->ctrl_psoc,
  1763. WLAN_MD_DP_SRNG_TX_COMP,
  1764. "tcl_comp_ring");
  1765. dp_srng_deinit(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  1766. wbm_ring_num);
  1767. }
  1768. /**
  1769. * dp_init_tx_ring_pair_by_index() - The function inits tcl data/wbm completion
  1770. * ring pair
  1771. * @soc: DP soc pointer
  1772. * @index: index of soc->tcl_data or soc->tx_comp to initialize
  1773. *
  1774. * Return: QDF_STATUS_SUCCESS on success, error code otherwise.
  1775. */
  1776. static QDF_STATUS dp_init_tx_ring_pair_by_index(struct dp_soc *soc,
  1777. uint8_t index)
  1778. {
  1779. int tcl_ring_num, wbm_ring_num;
  1780. uint8_t bm_id;
  1781. if (index >= MAX_TCL_DATA_RINGS) {
  1782. dp_err("unexpected index!");
  1783. QDF_BUG(0);
  1784. goto fail1;
  1785. }
  1786. wlan_cfg_get_tcl_wbm_ring_num_for_index(soc->wlan_cfg_ctx,
  1787. index,
  1788. &tcl_ring_num,
  1789. &wbm_ring_num);
  1790. if (tcl_ring_num == -1) {
  1791. dp_err("incorrect tcl ring num for index %u", index);
  1792. goto fail1;
  1793. }
  1794. dp_info("index %u tcl %u wbm %u", index, tcl_ring_num, wbm_ring_num);
  1795. if (dp_srng_init(soc, &soc->tcl_data_ring[index], TCL_DATA,
  1796. tcl_ring_num, 0)) {
  1797. dp_err("dp_srng_init failed for tcl_data_ring");
  1798. goto fail1;
  1799. }
  1800. wlan_minidump_log(soc->tcl_data_ring[index].base_vaddr_unaligned,
  1801. soc->tcl_data_ring[index].alloc_size,
  1802. soc->ctrl_psoc,
  1803. WLAN_MD_DP_SRNG_TCL_DATA,
  1804. "tcl_data_ring");
  1805. if (wbm_ring_num == INVALID_WBM_RING_NUM)
  1806. goto set_rbm;
  1807. if (dp_srng_init(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  1808. wbm_ring_num, 0)) {
  1809. dp_err("dp_srng_init failed for tx_comp_ring");
  1810. goto fail1;
  1811. }
  1812. wlan_minidump_log(soc->tx_comp_ring[index].base_vaddr_unaligned,
  1813. soc->tx_comp_ring[index].alloc_size,
  1814. soc->ctrl_psoc,
  1815. WLAN_MD_DP_SRNG_TX_COMP,
  1816. "tcl_comp_ring");
  1817. set_rbm:
  1818. bm_id = wlan_cfg_get_rbm_id_for_index(soc->wlan_cfg_ctx, tcl_ring_num);
  1819. soc->arch_ops.tx_implicit_rbm_set(soc, tcl_ring_num, bm_id);
  1820. return QDF_STATUS_SUCCESS;
  1821. fail1:
  1822. return QDF_STATUS_E_FAILURE;
  1823. }
  1824. static void dp_free_tx_ring_pair_by_index(struct dp_soc *soc, uint8_t index)
  1825. {
  1826. dp_debug("index %u", index);
  1827. dp_srng_free(soc, &soc->tcl_data_ring[index]);
  1828. dp_srng_free(soc, &soc->tx_comp_ring[index]);
  1829. }
  1830. /**
  1831. * dp_alloc_tx_ring_pair_by_index() - The function allocs tcl data/wbm2sw
  1832. * ring pair for the given "index"
  1833. * @soc: DP soc pointer
  1834. * @index: index of soc->tcl_data or soc->tx_comp to initialize
  1835. *
  1836. * Return: QDF_STATUS_SUCCESS on success, error code otherwise.
  1837. */
  1838. static QDF_STATUS dp_alloc_tx_ring_pair_by_index(struct dp_soc *soc,
  1839. uint8_t index)
  1840. {
  1841. int tx_ring_size;
  1842. int tx_comp_ring_size;
  1843. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  1844. int cached = 0;
  1845. if (index >= MAX_TCL_DATA_RINGS) {
  1846. dp_err("unexpected index!");
  1847. QDF_BUG(0);
  1848. goto fail1;
  1849. }
  1850. dp_debug("index %u", index);
  1851. tx_ring_size = wlan_cfg_tx_ring_size(soc_cfg_ctx);
  1852. dp_ipa_get_tx_ring_size(index, &tx_ring_size, soc_cfg_ctx);
  1853. if (dp_srng_alloc(soc, &soc->tcl_data_ring[index], TCL_DATA,
  1854. tx_ring_size, cached)) {
  1855. dp_err("dp_srng_alloc failed for tcl_data_ring");
  1856. goto fail1;
  1857. }
  1858. tx_comp_ring_size = wlan_cfg_tx_comp_ring_size(soc_cfg_ctx);
  1859. dp_ipa_get_tx_comp_ring_size(index, &tx_comp_ring_size, soc_cfg_ctx);
  1860. /* Enable cached TCL desc if NSS offload is disabled */
  1861. if (!wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx))
  1862. cached = WLAN_CFG_DST_RING_CACHED_DESC;
  1863. if (wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, index) ==
  1864. INVALID_WBM_RING_NUM)
  1865. return QDF_STATUS_SUCCESS;
  1866. if (dp_srng_alloc(soc, &soc->tx_comp_ring[index], WBM2SW_RELEASE,
  1867. tx_comp_ring_size, cached)) {
  1868. dp_err("dp_srng_alloc failed for tx_comp_ring");
  1869. goto fail1;
  1870. }
  1871. return QDF_STATUS_SUCCESS;
  1872. fail1:
  1873. return QDF_STATUS_E_FAILURE;
  1874. }
  1875. /**
  1876. * dp_dscp_tid_map_setup() - Initialize the dscp-tid maps
  1877. * @pdev: DP_PDEV handle
  1878. *
  1879. * Return: void
  1880. */
  1881. void
  1882. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1883. {
  1884. uint8_t map_id;
  1885. struct dp_soc *soc = pdev->soc;
  1886. if (!soc)
  1887. return;
  1888. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1889. qdf_mem_copy(pdev->dscp_tid_map[map_id],
  1890. default_dscp_tid_map,
  1891. sizeof(default_dscp_tid_map));
  1892. }
  1893. for (map_id = 0; map_id < soc->num_hw_dscp_tid_map; map_id++) {
  1894. hal_tx_set_dscp_tid_map(soc->hal_soc,
  1895. default_dscp_tid_map,
  1896. map_id);
  1897. }
  1898. }
  1899. /**
  1900. * dp_pcp_tid_map_setup() - Initialize the pcp-tid maps
  1901. * @pdev: DP_PDEV handle
  1902. *
  1903. * Return: void
  1904. */
  1905. void
  1906. dp_pcp_tid_map_setup(struct dp_pdev *pdev)
  1907. {
  1908. struct dp_soc *soc = pdev->soc;
  1909. if (!soc)
  1910. return;
  1911. qdf_mem_copy(soc->pcp_tid_map, default_pcp_tid_map,
  1912. sizeof(default_pcp_tid_map));
  1913. hal_tx_set_pcp_tid_map_default(soc->hal_soc, default_pcp_tid_map);
  1914. }
  1915. #ifndef DP_UMAC_HW_RESET_SUPPORT
  1916. static inline
  1917. #endif
  1918. void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1919. {
  1920. struct reo_desc_list_node *desc;
  1921. struct dp_rx_tid *rx_tid;
  1922. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1923. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1924. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1925. rx_tid = &desc->rx_tid;
  1926. qdf_mem_unmap_nbytes_single(soc->osdev,
  1927. rx_tid->hw_qdesc_paddr,
  1928. QDF_DMA_BIDIRECTIONAL,
  1929. rx_tid->hw_qdesc_alloc_size);
  1930. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  1931. qdf_mem_free(desc);
  1932. }
  1933. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1934. qdf_list_destroy(&soc->reo_desc_freelist);
  1935. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1936. }
  1937. #ifdef WLAN_DP_FEATURE_DEFERRED_REO_QDESC_DESTROY
  1938. /**
  1939. * dp_reo_desc_deferred_freelist_create() - Initialize the resources used
  1940. * for deferred reo desc list
  1941. * @soc: Datapath soc handle
  1942. *
  1943. * Return: void
  1944. */
  1945. static void dp_reo_desc_deferred_freelist_create(struct dp_soc *soc)
  1946. {
  1947. qdf_spinlock_create(&soc->reo_desc_deferred_freelist_lock);
  1948. qdf_list_create(&soc->reo_desc_deferred_freelist,
  1949. REO_DESC_DEFERRED_FREELIST_SIZE);
  1950. soc->reo_desc_deferred_freelist_init = true;
  1951. }
  1952. /**
  1953. * dp_reo_desc_deferred_freelist_destroy() - loop the deferred free list &
  1954. * free the leftover REO QDESCs
  1955. * @soc: Datapath soc handle
  1956. *
  1957. * Return: void
  1958. */
  1959. static void dp_reo_desc_deferred_freelist_destroy(struct dp_soc *soc)
  1960. {
  1961. struct reo_desc_deferred_freelist_node *desc;
  1962. qdf_spin_lock_bh(&soc->reo_desc_deferred_freelist_lock);
  1963. soc->reo_desc_deferred_freelist_init = false;
  1964. while (qdf_list_remove_front(&soc->reo_desc_deferred_freelist,
  1965. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1966. qdf_mem_unmap_nbytes_single(soc->osdev,
  1967. desc->hw_qdesc_paddr,
  1968. QDF_DMA_BIDIRECTIONAL,
  1969. desc->hw_qdesc_alloc_size);
  1970. qdf_mem_free(desc->hw_qdesc_vaddr_unaligned);
  1971. qdf_mem_free(desc);
  1972. }
  1973. qdf_spin_unlock_bh(&soc->reo_desc_deferred_freelist_lock);
  1974. qdf_list_destroy(&soc->reo_desc_deferred_freelist);
  1975. qdf_spinlock_destroy(&soc->reo_desc_deferred_freelist_lock);
  1976. }
  1977. #else
  1978. static inline void dp_reo_desc_deferred_freelist_create(struct dp_soc *soc)
  1979. {
  1980. }
  1981. static inline void dp_reo_desc_deferred_freelist_destroy(struct dp_soc *soc)
  1982. {
  1983. }
  1984. #endif /* !WLAN_DP_FEATURE_DEFERRED_REO_QDESC_DESTROY */
  1985. /**
  1986. * dp_soc_reset_txrx_ring_map() - reset tx ring map
  1987. * @soc: DP SOC handle
  1988. *
  1989. */
  1990. static void dp_soc_reset_txrx_ring_map(struct dp_soc *soc)
  1991. {
  1992. uint32_t i;
  1993. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++)
  1994. soc->tx_ring_map[i] = 0;
  1995. }
  1996. /**
  1997. * dp_soc_deinit() - Deinitialize txrx SOC
  1998. * @txrx_soc: Opaque DP SOC handle
  1999. *
  2000. * Return: None
  2001. */
  2002. void dp_soc_deinit(void *txrx_soc)
  2003. {
  2004. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2005. struct htt_soc *htt_soc = soc->htt_handle;
  2006. dp_monitor_soc_deinit(soc);
  2007. /* free peer tables & AST tables allocated during peer_map_attach */
  2008. if (soc->peer_map_attach_success) {
  2009. dp_peer_find_detach(soc);
  2010. soc->arch_ops.txrx_peer_map_detach(soc);
  2011. soc->peer_map_attach_success = FALSE;
  2012. }
  2013. qdf_flush_work(&soc->htt_stats.work);
  2014. qdf_disable_work(&soc->htt_stats.work);
  2015. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2016. dp_soc_reset_txrx_ring_map(soc);
  2017. dp_reo_desc_freelist_destroy(soc);
  2018. dp_reo_desc_deferred_freelist_destroy(soc);
  2019. DEINIT_RX_HW_STATS_LOCK(soc);
  2020. qdf_spinlock_destroy(&soc->ast_lock);
  2021. dp_peer_mec_spinlock_destroy(soc);
  2022. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2023. qdf_nbuf_queue_free(&soc->invalid_buf_queue);
  2024. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2025. qdf_spinlock_destroy(&soc->vdev_map_lock);
  2026. dp_reo_cmdlist_destroy(soc);
  2027. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2028. dp_soc_tx_desc_sw_pools_deinit(soc);
  2029. dp_soc_srng_deinit(soc);
  2030. dp_hw_link_desc_ring_deinit(soc);
  2031. dp_soc_print_inactive_objects(soc);
  2032. qdf_spinlock_destroy(&soc->inactive_peer_list_lock);
  2033. qdf_spinlock_destroy(&soc->inactive_vdev_list_lock);
  2034. htt_soc_htc_dealloc(soc->htt_handle);
  2035. htt_soc_detach(htt_soc);
  2036. /* Free wbm sg list and reset flags in down path */
  2037. dp_rx_wbm_sg_list_deinit(soc);
  2038. wlan_minidump_remove(soc, sizeof(*soc), soc->ctrl_psoc,
  2039. WLAN_MD_DP_SOC, "dp_soc");
  2040. }
  2041. #ifdef QCA_HOST2FW_RXBUF_RING
  2042. void
  2043. dp_htt_setup_rxdma_err_dst_ring(struct dp_soc *soc, int mac_id,
  2044. int lmac_id)
  2045. {
  2046. if (soc->rxdma_err_dst_ring[lmac_id].hal_srng)
  2047. htt_srng_setup(soc->htt_handle, mac_id,
  2048. soc->rxdma_err_dst_ring[lmac_id].hal_srng,
  2049. RXDMA_DST);
  2050. }
  2051. #endif
  2052. void dp_vdev_get_default_reo_hash(struct dp_vdev *vdev,
  2053. enum cdp_host_reo_dest_ring *reo_dest,
  2054. bool *hash_based)
  2055. {
  2056. struct dp_soc *soc;
  2057. struct dp_pdev *pdev;
  2058. pdev = vdev->pdev;
  2059. soc = pdev->soc;
  2060. /*
  2061. * hash based steering is disabled for Radios which are offloaded
  2062. * to NSS
  2063. */
  2064. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2065. *hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2066. /*
  2067. * Below line of code will ensure the proper reo_dest ring is chosen
  2068. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2069. */
  2070. *reo_dest = pdev->reo_dest;
  2071. }
  2072. #ifdef IPA_OFFLOAD
  2073. /**
  2074. * dp_is_vdev_subtype_p2p() - Check if the subtype for vdev is P2P
  2075. * @vdev: Virtual device
  2076. *
  2077. * Return: true if the vdev is of subtype P2P
  2078. * false if the vdev is of any other subtype
  2079. */
  2080. static inline bool dp_is_vdev_subtype_p2p(struct dp_vdev *vdev)
  2081. {
  2082. if (vdev->subtype == wlan_op_subtype_p2p_device ||
  2083. vdev->subtype == wlan_op_subtype_p2p_cli ||
  2084. vdev->subtype == wlan_op_subtype_p2p_go)
  2085. return true;
  2086. return false;
  2087. }
  2088. /**
  2089. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  2090. * @vdev: Datapath VDEV handle
  2091. * @setup_info:
  2092. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  2093. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  2094. * @lmac_peer_id_msb:
  2095. *
  2096. * If IPA is enabled in ini, for SAP mode, disable hash based
  2097. * steering, use default reo_dst ring for RX. Use config values for other modes.
  2098. *
  2099. * Return: None
  2100. */
  2101. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  2102. struct cdp_peer_setup_info *setup_info,
  2103. enum cdp_host_reo_dest_ring *reo_dest,
  2104. bool *hash_based,
  2105. uint8_t *lmac_peer_id_msb)
  2106. {
  2107. struct dp_soc *soc;
  2108. struct dp_pdev *pdev;
  2109. pdev = vdev->pdev;
  2110. soc = pdev->soc;
  2111. dp_vdev_get_default_reo_hash(vdev, reo_dest, hash_based);
  2112. /* For P2P-GO interfaces we do not need to change the REO
  2113. * configuration even if IPA config is enabled
  2114. */
  2115. if (dp_is_vdev_subtype_p2p(vdev))
  2116. return;
  2117. /*
  2118. * If IPA is enabled, disable hash-based flow steering and set
  2119. * reo_dest_ring_4 as the REO ring to receive packets on.
  2120. * IPA is configured to reap reo_dest_ring_4.
  2121. *
  2122. * Note - REO DST indexes are from 0 - 3, while cdp_host_reo_dest_ring
  2123. * value enum value is from 1 - 4.
  2124. * Hence, *reo_dest = IPA_REO_DEST_RING_IDX + 1
  2125. */
  2126. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  2127. if (dp_ipa_is_mdm_platform()) {
  2128. *reo_dest = IPA_REO_DEST_RING_IDX + 1;
  2129. if (vdev->opmode == wlan_op_mode_ap)
  2130. *hash_based = 0;
  2131. } else {
  2132. dp_debug("opt_dp: default HOST reo ring is set");
  2133. }
  2134. }
  2135. }
  2136. #else
  2137. /**
  2138. * dp_peer_setup_get_reo_hash() - get reo dest ring and hash values for a peer
  2139. * @vdev: Datapath VDEV handle
  2140. * @setup_info:
  2141. * @reo_dest: pointer to default reo_dest ring for vdev to be populated
  2142. * @hash_based: pointer to hash value (enabled/disabled) to be populated
  2143. * @lmac_peer_id_msb:
  2144. *
  2145. * Use system config values for hash based steering.
  2146. * Return: None
  2147. */
  2148. static void dp_peer_setup_get_reo_hash(struct dp_vdev *vdev,
  2149. struct cdp_peer_setup_info *setup_info,
  2150. enum cdp_host_reo_dest_ring *reo_dest,
  2151. bool *hash_based,
  2152. uint8_t *lmac_peer_id_msb)
  2153. {
  2154. struct dp_soc *soc = vdev->pdev->soc;
  2155. soc->arch_ops.peer_get_reo_hash(vdev, setup_info, reo_dest, hash_based,
  2156. lmac_peer_id_msb);
  2157. }
  2158. #endif /* IPA_OFFLOAD */
  2159. /**
  2160. * dp_peer_setup_wifi3() - initialize the peer
  2161. * @soc_hdl: soc handle object
  2162. * @vdev_id: vdev_id of vdev object
  2163. * @peer_mac: Peer's mac address
  2164. * @setup_info: peer setup info for MLO
  2165. *
  2166. * Return: QDF_STATUS
  2167. */
  2168. QDF_STATUS
  2169. dp_peer_setup_wifi3(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  2170. uint8_t *peer_mac,
  2171. struct cdp_peer_setup_info *setup_info)
  2172. {
  2173. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2174. struct dp_pdev *pdev;
  2175. bool hash_based = 0;
  2176. enum cdp_host_reo_dest_ring reo_dest;
  2177. QDF_STATUS status = QDF_STATUS_SUCCESS;
  2178. struct dp_vdev *vdev = NULL;
  2179. struct dp_peer *peer =
  2180. dp_peer_find_hash_find(soc, peer_mac, 0, vdev_id,
  2181. DP_MOD_ID_CDP);
  2182. struct dp_peer *mld_peer = NULL;
  2183. enum wlan_op_mode vdev_opmode;
  2184. uint8_t lmac_peer_id_msb = 0;
  2185. if (!peer)
  2186. return QDF_STATUS_E_FAILURE;
  2187. vdev = peer->vdev;
  2188. if (!vdev) {
  2189. status = QDF_STATUS_E_FAILURE;
  2190. goto fail;
  2191. }
  2192. /* save vdev related member in case vdev freed */
  2193. vdev_opmode = vdev->opmode;
  2194. pdev = vdev->pdev;
  2195. dp_peer_setup_get_reo_hash(vdev, setup_info,
  2196. &reo_dest, &hash_based,
  2197. &lmac_peer_id_msb);
  2198. dp_cfg_event_record_peer_setup_evt(soc, DP_CFG_EVENT_PEER_SETUP,
  2199. peer, vdev, vdev->vdev_id,
  2200. setup_info);
  2201. dp_info("pdev: %d vdev :%d opmode:%u peer %pK (" QDF_MAC_ADDR_FMT ") "
  2202. "hash-based-steering:%d default-reo_dest:%u",
  2203. pdev->pdev_id, vdev->vdev_id,
  2204. vdev->opmode, peer,
  2205. QDF_MAC_ADDR_REF(peer->mac_addr.raw), hash_based, reo_dest);
  2206. /*
  2207. * There are corner cases where the AD1 = AD2 = "VAPs address"
  2208. * i.e both the devices have same MAC address. In these
  2209. * cases we want such pkts to be processed in NULL Q handler
  2210. * which is REO2TCL ring. for this reason we should
  2211. * not setup reo_queues and default route for bss_peer.
  2212. */
  2213. if (!IS_MLO_DP_MLD_PEER(peer))
  2214. dp_monitor_peer_tx_init(pdev, peer);
  2215. if (!setup_info)
  2216. if (dp_peer_legacy_setup(soc, peer) !=
  2217. QDF_STATUS_SUCCESS) {
  2218. status = QDF_STATUS_E_RESOURCES;
  2219. goto fail;
  2220. }
  2221. if (peer->bss_peer && vdev->opmode == wlan_op_mode_ap) {
  2222. status = QDF_STATUS_E_FAILURE;
  2223. goto fail;
  2224. }
  2225. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2226. /* TODO: Check the destination ring number to be passed to FW */
  2227. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2228. soc->ctrl_psoc,
  2229. peer->vdev->pdev->pdev_id,
  2230. peer->mac_addr.raw,
  2231. peer->vdev->vdev_id, hash_based, reo_dest,
  2232. lmac_peer_id_msb);
  2233. }
  2234. qdf_atomic_set(&peer->is_default_route_set, 1);
  2235. status = dp_peer_mlo_setup(soc, peer, vdev->vdev_id, setup_info);
  2236. if (QDF_IS_STATUS_ERROR(status)) {
  2237. dp_peer_err("peer mlo setup failed");
  2238. qdf_assert_always(0);
  2239. }
  2240. if (vdev_opmode != wlan_op_mode_monitor) {
  2241. /* In case of MLD peer, switch peer to mld peer and
  2242. * do peer_rx_init.
  2243. */
  2244. if (hal_reo_shared_qaddr_is_enable(soc->hal_soc) &&
  2245. IS_MLO_DP_LINK_PEER(peer)) {
  2246. if (setup_info && setup_info->is_first_link) {
  2247. mld_peer = DP_GET_MLD_PEER_FROM_PEER(peer);
  2248. if (mld_peer)
  2249. dp_peer_rx_init(pdev, mld_peer);
  2250. else
  2251. dp_peer_err("MLD peer null. Primary link peer:%pK", peer);
  2252. }
  2253. } else {
  2254. dp_peer_rx_init(pdev, peer);
  2255. }
  2256. }
  2257. if (!IS_MLO_DP_MLD_PEER(peer))
  2258. dp_peer_ppdu_delayed_ba_init(peer);
  2259. fail:
  2260. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  2261. return status;
  2262. }
  2263. /**
  2264. * dp_set_ba_aging_timeout() - set ba aging timeout per AC
  2265. * @txrx_soc: cdp soc handle
  2266. * @ac: Access category
  2267. * @value: timeout value in millisec
  2268. *
  2269. * Return: void
  2270. */
  2271. void dp_set_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  2272. uint8_t ac, uint32_t value)
  2273. {
  2274. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2275. hal_set_ba_aging_timeout(soc->hal_soc, ac, value);
  2276. }
  2277. /**
  2278. * dp_get_ba_aging_timeout() - get ba aging timeout per AC
  2279. * @txrx_soc: cdp soc handle
  2280. * @ac: access category
  2281. * @value: timeout value in millisec
  2282. *
  2283. * Return: void
  2284. */
  2285. void dp_get_ba_aging_timeout(struct cdp_soc_t *txrx_soc,
  2286. uint8_t ac, uint32_t *value)
  2287. {
  2288. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2289. hal_get_ba_aging_timeout(soc->hal_soc, ac, value);
  2290. }
  2291. /**
  2292. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  2293. * @txrx_soc: cdp soc handle
  2294. * @pdev_id: id of physical device object
  2295. * @val: reo destination ring index (1 - 4)
  2296. *
  2297. * Return: QDF_STATUS
  2298. */
  2299. QDF_STATUS
  2300. dp_set_pdev_reo_dest(struct cdp_soc_t *txrx_soc, uint8_t pdev_id,
  2301. enum cdp_host_reo_dest_ring val)
  2302. {
  2303. struct dp_pdev *pdev =
  2304. dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)txrx_soc,
  2305. pdev_id);
  2306. if (pdev) {
  2307. pdev->reo_dest = val;
  2308. return QDF_STATUS_SUCCESS;
  2309. }
  2310. return QDF_STATUS_E_FAILURE;
  2311. }
  2312. /**
  2313. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  2314. * @txrx_soc: cdp soc handle
  2315. * @pdev_id: id of physical device object
  2316. *
  2317. * Return: reo destination ring index
  2318. */
  2319. enum cdp_host_reo_dest_ring
  2320. dp_get_pdev_reo_dest(struct cdp_soc_t *txrx_soc, uint8_t pdev_id)
  2321. {
  2322. struct dp_pdev *pdev =
  2323. dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)txrx_soc,
  2324. pdev_id);
  2325. if (pdev)
  2326. return pdev->reo_dest;
  2327. else
  2328. return cdp_host_reo_dest_ring_unknown;
  2329. }
  2330. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  2331. union hal_reo_status *reo_status)
  2332. {
  2333. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  2334. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  2335. if (!dp_check_pdev_exists(soc, pdev)) {
  2336. dp_err_rl("pdev doesn't exist");
  2337. return;
  2338. }
  2339. if (!qdf_atomic_read(&soc->cmn_init_done))
  2340. return;
  2341. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  2342. DP_PRINT_STATS("REO stats failure %d",
  2343. queue_status->header.status);
  2344. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  2345. return;
  2346. }
  2347. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  2348. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  2349. }
  2350. /**
  2351. * dp_dump_wbm_idle_hptp() - dump wbm idle ring, hw hp tp info.
  2352. * @soc: dp soc.
  2353. * @pdev: dp pdev.
  2354. *
  2355. * Return: None.
  2356. */
  2357. void
  2358. dp_dump_wbm_idle_hptp(struct dp_soc *soc, struct dp_pdev *pdev)
  2359. {
  2360. uint32_t hw_head;
  2361. uint32_t hw_tail;
  2362. struct dp_srng *srng;
  2363. if (!soc) {
  2364. dp_err("soc is NULL");
  2365. return;
  2366. }
  2367. if (!pdev) {
  2368. dp_err("pdev is NULL");
  2369. return;
  2370. }
  2371. srng = &pdev->soc->wbm_idle_link_ring;
  2372. if (!srng) {
  2373. dp_err("wbm_idle_link_ring srng is NULL");
  2374. return;
  2375. }
  2376. hal_get_hw_hptp(soc->hal_soc, srng->hal_srng, &hw_head,
  2377. &hw_tail, WBM_IDLE_LINK);
  2378. dp_debug("WBM_IDLE_LINK: HW hp: %d, HW tp: %d",
  2379. hw_head, hw_tail);
  2380. }
  2381. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  2382. static void dp_update_soft_irq_limits(struct dp_soc *soc, uint32_t tx_limit,
  2383. uint32_t rx_limit)
  2384. {
  2385. soc->wlan_cfg_ctx->tx_comp_loop_pkt_limit = tx_limit;
  2386. soc->wlan_cfg_ctx->rx_reap_loop_pkt_limit = rx_limit;
  2387. }
  2388. #else
  2389. static inline
  2390. void dp_update_soft_irq_limits(struct dp_soc *soc, uint32_t tx_limit,
  2391. uint32_t rx_limit)
  2392. {
  2393. }
  2394. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  2395. /**
  2396. * dp_display_srng_info() - Dump the srng HP TP info
  2397. * @soc_hdl: CDP Soc handle
  2398. *
  2399. * This function dumps the SW hp/tp values for the important rings.
  2400. * HW hp/tp values are not being dumped, since it can lead to
  2401. * READ NOC error when UMAC is in low power state. MCC does not have
  2402. * device force wake working yet.
  2403. *
  2404. * Return: none
  2405. */
  2406. void dp_display_srng_info(struct cdp_soc_t *soc_hdl)
  2407. {
  2408. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2409. hal_soc_handle_t hal_soc = soc->hal_soc;
  2410. uint32_t hp, tp, i;
  2411. dp_info("SRNG HP-TP data:");
  2412. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2413. hal_get_sw_hptp(hal_soc, soc->tcl_data_ring[i].hal_srng,
  2414. &tp, &hp);
  2415. dp_info("TCL DATA ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  2416. if (wlan_cfg_get_wbm_ring_num_for_index(soc->wlan_cfg_ctx, i) ==
  2417. INVALID_WBM_RING_NUM)
  2418. continue;
  2419. hal_get_sw_hptp(hal_soc, soc->tx_comp_ring[i].hal_srng,
  2420. &tp, &hp);
  2421. dp_info("TX comp ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  2422. }
  2423. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2424. hal_get_sw_hptp(hal_soc, soc->reo_dest_ring[i].hal_srng,
  2425. &tp, &hp);
  2426. dp_info("REO DST ring[%d]: hp=0x%x, tp=0x%x", i, hp, tp);
  2427. }
  2428. hal_get_sw_hptp(hal_soc, soc->reo_exception_ring.hal_srng, &tp, &hp);
  2429. dp_info("REO exception ring: hp=0x%x, tp=0x%x", hp, tp);
  2430. hal_get_sw_hptp(hal_soc, soc->rx_rel_ring.hal_srng, &tp, &hp);
  2431. dp_info("WBM RX release ring: hp=0x%x, tp=0x%x", hp, tp);
  2432. hal_get_sw_hptp(hal_soc, soc->wbm_desc_rel_ring.hal_srng, &tp, &hp);
  2433. dp_info("WBM desc release ring: hp=0x%x, tp=0x%x", hp, tp);
  2434. }
  2435. /**
  2436. * dp_set_pdev_pcp_tid_map_wifi3() - update pcp tid map in pdev
  2437. * @psoc: dp soc handle
  2438. * @pdev_id: id of DP_PDEV handle
  2439. * @pcp: pcp value
  2440. * @tid: tid value passed by the user
  2441. *
  2442. * Return: QDF_STATUS_SUCCESS on success
  2443. */
  2444. QDF_STATUS dp_set_pdev_pcp_tid_map_wifi3(ol_txrx_soc_handle psoc,
  2445. uint8_t pdev_id,
  2446. uint8_t pcp, uint8_t tid)
  2447. {
  2448. struct dp_soc *soc = (struct dp_soc *)psoc;
  2449. soc->pcp_tid_map[pcp] = tid;
  2450. hal_tx_update_pcp_tid_map(soc->hal_soc, pcp, tid);
  2451. return QDF_STATUS_SUCCESS;
  2452. }
  2453. /**
  2454. * dp_set_vdev_pcp_tid_map_wifi3() - update pcp tid map in vdev
  2455. * @soc_hdl: DP soc handle
  2456. * @vdev_id: id of DP_VDEV handle
  2457. * @pcp: pcp value
  2458. * @tid: tid value passed by the user
  2459. *
  2460. * Return: QDF_STATUS_SUCCESS on success
  2461. */
  2462. QDF_STATUS dp_set_vdev_pcp_tid_map_wifi3(struct cdp_soc_t *soc_hdl,
  2463. uint8_t vdev_id,
  2464. uint8_t pcp, uint8_t tid)
  2465. {
  2466. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  2467. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2468. DP_MOD_ID_CDP);
  2469. if (!vdev)
  2470. return QDF_STATUS_E_FAILURE;
  2471. vdev->pcp_tid_map[pcp] = tid;
  2472. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2473. return QDF_STATUS_SUCCESS;
  2474. }
  2475. #if defined(FEATURE_RUNTIME_PM) || defined(DP_POWER_SAVE)
  2476. void dp_drain_txrx(struct cdp_soc_t *soc_handle)
  2477. {
  2478. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  2479. uint32_t cur_tx_limit, cur_rx_limit;
  2480. uint32_t budget = 0xffff;
  2481. uint32_t val;
  2482. int i;
  2483. int cpu = dp_srng_get_cpu();
  2484. cur_tx_limit = soc->wlan_cfg_ctx->tx_comp_loop_pkt_limit;
  2485. cur_rx_limit = soc->wlan_cfg_ctx->rx_reap_loop_pkt_limit;
  2486. /* Temporarily increase soft irq limits when going to drain
  2487. * the UMAC/LMAC SRNGs and restore them after polling.
  2488. * Though the budget is on higher side, the TX/RX reaping loops
  2489. * will not execute longer as both TX and RX would be suspended
  2490. * by the time this API is called.
  2491. */
  2492. dp_update_soft_irq_limits(soc, budget, budget);
  2493. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  2494. soc->arch_ops.dp_service_srngs(&soc->intr_ctx[i], budget, cpu);
  2495. dp_update_soft_irq_limits(soc, cur_tx_limit, cur_rx_limit);
  2496. /* Do a dummy read at offset 0; this will ensure all
  2497. * pendings writes(HP/TP) are flushed before read returns.
  2498. */
  2499. val = HAL_REG_READ((struct hal_soc *)soc->hal_soc, 0);
  2500. dp_debug("Register value at offset 0: %u", val);
  2501. }
  2502. #endif
  2503. #if defined(DP_POWER_SAVE) || defined(FEATURE_RUNTIME_PM)
  2504. /**
  2505. * dp_flush_ring_hptp() - Update ring shadow
  2506. * register HP/TP address when runtime
  2507. * resume
  2508. * @soc: DP soc context
  2509. * @hal_srng: srng
  2510. *
  2511. * Return: None
  2512. */
  2513. static void dp_flush_ring_hptp(struct dp_soc *soc, hal_ring_handle_t hal_srng)
  2514. {
  2515. if (hal_srng && hal_srng_get_clear_event(hal_srng,
  2516. HAL_SRNG_FLUSH_EVENT)) {
  2517. /* Acquire the lock */
  2518. hal_srng_access_start(soc->hal_soc, hal_srng);
  2519. hal_srng_access_end(soc->hal_soc, hal_srng);
  2520. hal_srng_set_flush_last_ts(hal_srng);
  2521. dp_debug("flushed");
  2522. }
  2523. }
  2524. void dp_update_ring_hptp(struct dp_soc *soc, bool force_flush_tx)
  2525. {
  2526. uint8_t i;
  2527. if (force_flush_tx) {
  2528. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2529. hal_srng_set_event(soc->tcl_data_ring[i].hal_srng,
  2530. HAL_SRNG_FLUSH_EVENT);
  2531. dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
  2532. }
  2533. return;
  2534. }
  2535. for (i = 0; i < soc->num_tcl_data_rings; i++)
  2536. dp_flush_ring_hptp(soc, soc->tcl_data_ring[i].hal_srng);
  2537. dp_flush_ring_hptp(soc, soc->reo_cmd_ring.hal_srng);
  2538. }
  2539. #endif
  2540. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2541. /*
  2542. * dp_flush_tcl_ring() - flush TCL ring hp
  2543. * @pdev: dp pdev
  2544. * @ring_id: TCL ring id
  2545. *
  2546. * Return: 0 on success and error code on failure
  2547. */
  2548. int dp_flush_tcl_ring(struct dp_pdev *pdev, int ring_id)
  2549. {
  2550. struct dp_soc *soc = pdev->soc;
  2551. hal_ring_handle_t hal_ring_hdl =
  2552. soc->tcl_data_ring[ring_id].hal_srng;
  2553. int ret;
  2554. ret = hal_srng_try_access_start(soc->hal_soc, hal_ring_hdl);
  2555. if (ret)
  2556. return ret;
  2557. ret = hif_rtpm_get(HIF_RTPM_GET_ASYNC, HIF_RTPM_ID_DP);
  2558. if (ret) {
  2559. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  2560. hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
  2561. hal_srng_inc_flush_cnt(hal_ring_hdl);
  2562. return ret;
  2563. }
  2564. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  2565. hif_rtpm_put(HIF_RTPM_PUT_ASYNC, HIF_RTPM_ID_DP);
  2566. return ret;
  2567. }
  2568. #else
  2569. int dp_flush_tcl_ring(struct dp_pdev *pdev, int ring_id)
  2570. {
  2571. return QDF_STATUS_SUCCESS;
  2572. }
  2573. #endif
  2574. #ifdef WLAN_FEATURE_STATS_EXT
  2575. /* rx hw stats event wait timeout in ms */
  2576. #define DP_REO_STATUS_STATS_TIMEOUT 100
  2577. /**
  2578. * dp_rx_hw_stats_cb() - request rx hw stats response callback
  2579. * @soc: soc handle
  2580. * @cb_ctxt: callback context
  2581. * @reo_status: reo command response status
  2582. *
  2583. * Return: None
  2584. */
  2585. static void dp_rx_hw_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  2586. union hal_reo_status *reo_status)
  2587. {
  2588. struct dp_req_rx_hw_stats_t *rx_hw_stats = cb_ctxt;
  2589. struct hal_reo_queue_status *queue_status = &reo_status->queue_status;
  2590. bool is_query_timeout;
  2591. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  2592. is_query_timeout = rx_hw_stats->is_query_timeout;
  2593. /* free the cb_ctxt if all pending tid stats query is received */
  2594. if (qdf_atomic_dec_and_test(&rx_hw_stats->pending_tid_stats_cnt)) {
  2595. if (!is_query_timeout) {
  2596. qdf_event_set(&soc->rx_hw_stats_event);
  2597. soc->is_last_stats_ctx_init = false;
  2598. }
  2599. qdf_mem_free(rx_hw_stats);
  2600. }
  2601. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  2602. dp_info("REO stats failure %d",
  2603. queue_status->header.status);
  2604. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2605. return;
  2606. }
  2607. if (!is_query_timeout) {
  2608. soc->ext_stats.rx_mpdu_received +=
  2609. queue_status->mpdu_frms_cnt;
  2610. soc->ext_stats.rx_mpdu_missed +=
  2611. queue_status->hole_cnt;
  2612. }
  2613. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2614. }
  2615. /**
  2616. * dp_request_rx_hw_stats() - request rx hardware stats
  2617. * @soc_hdl: soc handle
  2618. * @vdev_id: vdev id
  2619. *
  2620. * Return: None
  2621. */
  2622. QDF_STATUS
  2623. dp_request_rx_hw_stats(struct cdp_soc_t *soc_hdl, uint8_t vdev_id)
  2624. {
  2625. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2626. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  2627. DP_MOD_ID_CDP);
  2628. struct dp_peer *peer = NULL;
  2629. QDF_STATUS status;
  2630. struct dp_req_rx_hw_stats_t *rx_hw_stats;
  2631. int rx_stats_sent_cnt = 0;
  2632. uint32_t last_rx_mpdu_received;
  2633. uint32_t last_rx_mpdu_missed;
  2634. if (!vdev) {
  2635. dp_err("vdev is null for vdev_id: %u", vdev_id);
  2636. status = QDF_STATUS_E_INVAL;
  2637. goto out;
  2638. }
  2639. peer = dp_vdev_bss_peer_ref_n_get(soc, vdev, DP_MOD_ID_CDP);
  2640. if (!peer) {
  2641. dp_err("Peer is NULL");
  2642. status = QDF_STATUS_E_INVAL;
  2643. goto out;
  2644. }
  2645. rx_hw_stats = qdf_mem_malloc(sizeof(*rx_hw_stats));
  2646. if (!rx_hw_stats) {
  2647. dp_err("malloc failed for hw stats structure");
  2648. status = QDF_STATUS_E_INVAL;
  2649. goto out;
  2650. }
  2651. qdf_event_reset(&soc->rx_hw_stats_event);
  2652. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  2653. /* save the last soc cumulative stats and reset it to 0 */
  2654. last_rx_mpdu_received = soc->ext_stats.rx_mpdu_received;
  2655. last_rx_mpdu_missed = soc->ext_stats.rx_mpdu_missed;
  2656. soc->ext_stats.rx_mpdu_received = 0;
  2657. soc->ext_stats.rx_mpdu_missed = 0;
  2658. dp_debug("HW stats query start");
  2659. rx_stats_sent_cnt =
  2660. dp_peer_rxtid_stats(peer, dp_rx_hw_stats_cb, rx_hw_stats);
  2661. if (!rx_stats_sent_cnt) {
  2662. dp_err("no tid stats sent successfully");
  2663. qdf_mem_free(rx_hw_stats);
  2664. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2665. status = QDF_STATUS_E_INVAL;
  2666. goto out;
  2667. }
  2668. qdf_atomic_set(&rx_hw_stats->pending_tid_stats_cnt,
  2669. rx_stats_sent_cnt);
  2670. rx_hw_stats->is_query_timeout = false;
  2671. soc->is_last_stats_ctx_init = true;
  2672. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2673. status = qdf_wait_single_event(&soc->rx_hw_stats_event,
  2674. DP_REO_STATUS_STATS_TIMEOUT);
  2675. dp_debug("HW stats query end with %d", rx_stats_sent_cnt);
  2676. qdf_spin_lock_bh(&soc->rx_hw_stats_lock);
  2677. if (status != QDF_STATUS_SUCCESS) {
  2678. dp_info("partial rx hw stats event collected with %d",
  2679. qdf_atomic_read(
  2680. &rx_hw_stats->pending_tid_stats_cnt));
  2681. if (soc->is_last_stats_ctx_init)
  2682. rx_hw_stats->is_query_timeout = true;
  2683. /*
  2684. * If query timeout happened, use the last saved stats
  2685. * for this time query.
  2686. */
  2687. soc->ext_stats.rx_mpdu_received = last_rx_mpdu_received;
  2688. soc->ext_stats.rx_mpdu_missed = last_rx_mpdu_missed;
  2689. DP_STATS_INC(soc, rx.rx_hw_stats_timeout, 1);
  2690. }
  2691. qdf_spin_unlock_bh(&soc->rx_hw_stats_lock);
  2692. out:
  2693. if (peer)
  2694. dp_peer_unref_delete(peer, DP_MOD_ID_CDP);
  2695. if (vdev)
  2696. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_CDP);
  2697. DP_STATS_INC(soc, rx.rx_hw_stats_requested, 1);
  2698. return status;
  2699. }
  2700. /**
  2701. * dp_reset_rx_hw_ext_stats() - Reset rx hardware ext stats
  2702. * @soc_hdl: soc handle
  2703. *
  2704. * Return: None
  2705. */
  2706. void dp_reset_rx_hw_ext_stats(struct cdp_soc_t *soc_hdl)
  2707. {
  2708. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2709. soc->ext_stats.rx_mpdu_received = 0;
  2710. soc->ext_stats.rx_mpdu_missed = 0;
  2711. }
  2712. #endif /* WLAN_FEATURE_STATS_EXT */
  2713. uint32_t dp_get_tx_rings_grp_bitmap(struct cdp_soc_t *soc_hdl)
  2714. {
  2715. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  2716. return soc->wlan_cfg_ctx->tx_rings_grp_bitmap;
  2717. }
  2718. void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  2719. {
  2720. uint32_t i;
  2721. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  2722. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_DEFAULT_MAP][i];
  2723. }
  2724. }
  2725. qdf_export_symbol(dp_soc_set_txrx_ring_map);
  2726. static void dp_soc_cfg_dump(struct dp_soc *soc, uint32_t target_type)
  2727. {
  2728. dp_init_info("DP soc Dump for Target = %d", target_type);
  2729. dp_init_info("ast_override_support = %d da_war_enabled = %d",
  2730. soc->ast_override_support, soc->da_war_enabled);
  2731. wlan_cfg_dp_soc_ctx_dump(soc->wlan_cfg_ctx);
  2732. }
  2733. /**
  2734. * dp_soc_cfg_init() - initialize target specific configuration
  2735. * during dp_soc_init
  2736. * @soc: dp soc handle
  2737. */
  2738. static void dp_soc_cfg_init(struct dp_soc *soc)
  2739. {
  2740. uint32_t target_type;
  2741. target_type = hal_get_target_type(soc->hal_soc);
  2742. switch (target_type) {
  2743. case TARGET_TYPE_QCA6290:
  2744. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  2745. REO_DST_RING_SIZE_QCA6290);
  2746. soc->ast_override_support = 1;
  2747. soc->da_war_enabled = false;
  2748. break;
  2749. case TARGET_TYPE_QCA6390:
  2750. case TARGET_TYPE_QCA6490:
  2751. case TARGET_TYPE_QCA6750:
  2752. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  2753. REO_DST_RING_SIZE_QCA6290);
  2754. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  2755. soc->ast_override_support = 1;
  2756. if (soc->cdp_soc.ol_ops->get_con_mode &&
  2757. soc->cdp_soc.ol_ops->get_con_mode() ==
  2758. QDF_GLOBAL_MONITOR_MODE) {
  2759. int int_ctx;
  2760. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS; int_ctx++) {
  2761. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  2762. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  2763. }
  2764. }
  2765. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  2766. break;
  2767. case TARGET_TYPE_KIWI:
  2768. case TARGET_TYPE_MANGO:
  2769. case TARGET_TYPE_PEACH:
  2770. soc->ast_override_support = 1;
  2771. soc->per_tid_basize_max_tid = 8;
  2772. if (soc->cdp_soc.ol_ops->get_con_mode &&
  2773. soc->cdp_soc.ol_ops->get_con_mode() ==
  2774. QDF_GLOBAL_MONITOR_MODE) {
  2775. int int_ctx;
  2776. for (int_ctx = 0; int_ctx < WLAN_CFG_INT_NUM_CONTEXTS;
  2777. int_ctx++) {
  2778. soc->wlan_cfg_ctx->int_rx_ring_mask[int_ctx] = 0;
  2779. if (dp_is_monitor_mode_using_poll(soc))
  2780. soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[int_ctx] = 0;
  2781. }
  2782. }
  2783. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  2784. soc->wlan_cfg_ctx->num_rxdma_dst_rings_per_pdev = 1;
  2785. break;
  2786. case TARGET_TYPE_QCA8074:
  2787. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, true);
  2788. soc->da_war_enabled = true;
  2789. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  2790. break;
  2791. case TARGET_TYPE_QCA8074V2:
  2792. case TARGET_TYPE_QCA6018:
  2793. case TARGET_TYPE_QCA9574:
  2794. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2795. soc->ast_override_support = 1;
  2796. soc->per_tid_basize_max_tid = 8;
  2797. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  2798. soc->da_war_enabled = false;
  2799. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  2800. break;
  2801. case TARGET_TYPE_QCN9000:
  2802. soc->ast_override_support = 1;
  2803. soc->da_war_enabled = false;
  2804. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2805. soc->per_tid_basize_max_tid = 8;
  2806. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  2807. soc->lmac_polled_mode = 0;
  2808. soc->wbm_release_desc_rx_sg_support = 1;
  2809. soc->is_rx_fse_full_cache_invalidate_war_enabled = true;
  2810. break;
  2811. case TARGET_TYPE_QCA5018:
  2812. case TARGET_TYPE_QCN6122:
  2813. case TARGET_TYPE_QCN9160:
  2814. soc->ast_override_support = 1;
  2815. soc->da_war_enabled = false;
  2816. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2817. soc->per_tid_basize_max_tid = 8;
  2818. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_MAPS_11AX;
  2819. soc->disable_mac1_intr = 1;
  2820. soc->disable_mac2_intr = 1;
  2821. soc->wbm_release_desc_rx_sg_support = 1;
  2822. break;
  2823. case TARGET_TYPE_QCN9224:
  2824. soc->umac_reset_supported = true;
  2825. soc->ast_override_support = 1;
  2826. soc->da_war_enabled = false;
  2827. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2828. soc->per_tid_basize_max_tid = 8;
  2829. soc->wbm_release_desc_rx_sg_support = 1;
  2830. soc->rxdma2sw_rings_not_supported = 1;
  2831. soc->wbm_sg_last_msdu_war = 1;
  2832. soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS;
  2833. soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED;
  2834. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS;
  2835. wlan_cfg_set_txmon_hw_support(soc->wlan_cfg_ctx, true);
  2836. soc->host_ast_db_enable = cfg_get(soc->ctrl_psoc,
  2837. CFG_DP_HOST_AST_DB_ENABLE);
  2838. soc->features.wds_ext_ast_override_enable = true;
  2839. break;
  2840. case TARGET_TYPE_QCA5332:
  2841. case TARGET_TYPE_QCN6432:
  2842. soc->umac_reset_supported = true;
  2843. soc->ast_override_support = 1;
  2844. soc->da_war_enabled = false;
  2845. wlan_cfg_set_raw_mode_war(soc->wlan_cfg_ctx, false);
  2846. soc->per_tid_basize_max_tid = 8;
  2847. soc->wbm_release_desc_rx_sg_support = 1;
  2848. soc->rxdma2sw_rings_not_supported = 1;
  2849. soc->wbm_sg_last_msdu_war = 1;
  2850. soc->ast_offload_support = AST_OFFLOAD_ENABLE_STATUS;
  2851. soc->mec_fw_offload = FW_MEC_FW_OFFLOAD_ENABLED;
  2852. soc->num_hw_dscp_tid_map = HAL_MAX_HW_DSCP_TID_V2_MAPS_5332;
  2853. wlan_cfg_set_txmon_hw_support(soc->wlan_cfg_ctx, true);
  2854. soc->host_ast_db_enable = cfg_get(soc->ctrl_psoc,
  2855. CFG_DP_HOST_AST_DB_ENABLE);
  2856. soc->features.wds_ext_ast_override_enable = true;
  2857. break;
  2858. default:
  2859. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  2860. qdf_assert_always(0);
  2861. break;
  2862. }
  2863. dp_soc_cfg_dump(soc, target_type);
  2864. }
  2865. /**
  2866. * dp_soc_get_ap_mld_mode() - store ap mld mode from ini
  2867. * @soc: Opaque DP SOC handle
  2868. *
  2869. * Return: none
  2870. */
  2871. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  2872. static inline void dp_soc_get_ap_mld_mode(struct dp_soc *soc)
  2873. {
  2874. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  2875. soc->mld_mode_ap =
  2876. soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  2877. CDP_CFG_MLD_NETDEV_MODE_AP);
  2878. }
  2879. dp_info("DP mld_mode_ap-%u\n", soc->mld_mode_ap);
  2880. }
  2881. #else
  2882. static inline void dp_soc_get_ap_mld_mode(struct dp_soc *soc)
  2883. {
  2884. (void)soc;
  2885. }
  2886. #endif
  2887. #ifdef QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT
  2888. /**
  2889. * dp_soc_hw_txrx_stats_init() - Initialize hw_txrx_stats_en in dp_soc
  2890. * @soc: Datapath soc handle
  2891. *
  2892. * Return: none
  2893. */
  2894. static inline
  2895. void dp_soc_hw_txrx_stats_init(struct dp_soc *soc)
  2896. {
  2897. soc->hw_txrx_stats_en =
  2898. wlan_cfg_get_vdev_stats_hw_offload_config(soc->wlan_cfg_ctx);
  2899. }
  2900. #else
  2901. static inline
  2902. void dp_soc_hw_txrx_stats_init(struct dp_soc *soc)
  2903. {
  2904. soc->hw_txrx_stats_en = 0;
  2905. }
  2906. #endif
  2907. /**
  2908. * dp_soc_init() - Initialize txrx SOC
  2909. * @soc: Opaque DP SOC handle
  2910. * @htc_handle: Opaque HTC handle
  2911. * @hif_handle: Opaque HIF handle
  2912. *
  2913. * Return: DP SOC handle on success, NULL on failure
  2914. */
  2915. void *dp_soc_init(struct dp_soc *soc, HTC_HANDLE htc_handle,
  2916. struct hif_opaque_softc *hif_handle)
  2917. {
  2918. struct htt_soc *htt_soc = (struct htt_soc *)soc->htt_handle;
  2919. bool is_monitor_mode = false;
  2920. uint8_t i;
  2921. int num_dp_msi;
  2922. bool ppeds_attached = false;
  2923. htt_soc = htt_soc_attach(soc, htc_handle);
  2924. if (!htt_soc)
  2925. goto fail1;
  2926. soc->htt_handle = htt_soc;
  2927. if (htt_soc_htc_prealloc(htt_soc) != QDF_STATUS_SUCCESS)
  2928. goto fail2;
  2929. htt_set_htc_handle(htt_soc, htc_handle);
  2930. dp_soc_cfg_init(soc);
  2931. dp_monitor_soc_cfg_init(soc);
  2932. /* Reset/Initialize wbm sg list and flags */
  2933. dp_rx_wbm_sg_list_reset(soc);
  2934. /* Note: Any SRNG ring initialization should happen only after
  2935. * Interrupt mode is set and followed by filling up the
  2936. * interrupt mask. IT SHOULD ALWAYS BE IN THIS ORDER.
  2937. */
  2938. dp_soc_set_interrupt_mode(soc);
  2939. if (soc->cdp_soc.ol_ops->get_con_mode &&
  2940. soc->cdp_soc.ol_ops->get_con_mode() ==
  2941. QDF_GLOBAL_MONITOR_MODE) {
  2942. is_monitor_mode = true;
  2943. soc->curr_rx_pkt_tlv_size = soc->rx_mon_pkt_tlv_size;
  2944. } else {
  2945. soc->curr_rx_pkt_tlv_size = soc->rx_pkt_tlv_size;
  2946. }
  2947. num_dp_msi = dp_get_num_msi_available(soc, soc->intr_mode);
  2948. if (num_dp_msi < 0) {
  2949. dp_init_err("%pK: dp_interrupt assignment failed", soc);
  2950. goto fail3;
  2951. }
  2952. if (soc->arch_ops.ppeds_handle_attached)
  2953. ppeds_attached = soc->arch_ops.ppeds_handle_attached(soc);
  2954. wlan_cfg_fill_interrupt_mask(soc->wlan_cfg_ctx, num_dp_msi,
  2955. soc->intr_mode, is_monitor_mode,
  2956. ppeds_attached,
  2957. soc->umac_reset_supported);
  2958. /* initialize WBM_IDLE_LINK ring */
  2959. if (dp_hw_link_desc_ring_init(soc)) {
  2960. dp_init_err("%pK: dp_hw_link_desc_ring_init failed", soc);
  2961. goto fail3;
  2962. }
  2963. dp_link_desc_ring_replenish(soc, WLAN_INVALID_PDEV_ID);
  2964. if (dp_soc_srng_init(soc)) {
  2965. dp_init_err("%pK: dp_soc_srng_init failed", soc);
  2966. goto fail4;
  2967. }
  2968. if (htt_soc_initialize(soc->htt_handle, soc->ctrl_psoc,
  2969. htt_get_htc_handle(htt_soc),
  2970. soc->hal_soc, soc->osdev) == NULL)
  2971. goto fail5;
  2972. /* Initialize descriptors in TCL Rings */
  2973. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2974. hal_tx_init_data_ring(soc->hal_soc,
  2975. soc->tcl_data_ring[i].hal_srng);
  2976. }
  2977. if (dp_soc_tx_desc_sw_pools_init(soc)) {
  2978. dp_init_err("%pK: dp_tx_soc_attach failed", soc);
  2979. goto fail6;
  2980. }
  2981. if (soc->arch_ops.txrx_soc_ppeds_start) {
  2982. if (soc->arch_ops.txrx_soc_ppeds_start(soc)) {
  2983. dp_init_err("%pK: ppeds start failed", soc);
  2984. goto fail7;
  2985. }
  2986. }
  2987. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx,
  2988. cfg_get(soc->ctrl_psoc, CFG_DP_RX_HASH));
  2989. #ifdef WLAN_SUPPORT_RX_FLOW_TAG
  2990. wlan_cfg_set_rx_rr(soc->wlan_cfg_ctx,
  2991. cfg_get(soc->ctrl_psoc, CFG_DP_RX_RR));
  2992. #endif
  2993. soc->cce_disable = false;
  2994. soc->max_ast_ageout_count = MAX_AST_AGEOUT_COUNT;
  2995. soc->sta_mode_search_policy = DP_TX_ADDR_SEARCH_ADDR_POLICY;
  2996. qdf_mem_zero(&soc->vdev_id_map, sizeof(soc->vdev_id_map));
  2997. qdf_spinlock_create(&soc->vdev_map_lock);
  2998. qdf_atomic_init(&soc->num_tx_outstanding);
  2999. qdf_atomic_init(&soc->num_tx_exception);
  3000. soc->num_tx_allowed =
  3001. wlan_cfg_get_dp_soc_tx_device_limit(soc->wlan_cfg_ctx);
  3002. soc->num_tx_spl_allowed =
  3003. wlan_cfg_get_dp_soc_tx_spl_device_limit(soc->wlan_cfg_ctx);
  3004. soc->num_reg_tx_allowed = soc->num_tx_allowed - soc->num_tx_spl_allowed;
  3005. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  3006. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  3007. CDP_CFG_MAX_PEER_ID);
  3008. if (ret != -EINVAL)
  3009. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  3010. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  3011. CDP_CFG_CCE_DISABLE);
  3012. if (ret == 1)
  3013. soc->cce_disable = true;
  3014. }
  3015. /*
  3016. * Skip registering hw ring interrupts for WMAC2 on IPQ6018
  3017. * and IPQ5018 WMAC2 is not there in these platforms.
  3018. */
  3019. if (hal_get_target_type(soc->hal_soc) == TARGET_TYPE_QCA6018 ||
  3020. soc->disable_mac2_intr)
  3021. dp_soc_disable_unused_mac_intr_mask(soc, 0x2);
  3022. /*
  3023. * Skip registering hw ring interrupts for WMAC1 on IPQ5018
  3024. * WMAC1 is not there in this platform.
  3025. */
  3026. if (soc->disable_mac1_intr)
  3027. dp_soc_disable_unused_mac_intr_mask(soc, 0x1);
  3028. /* setup the global rx defrag waitlist */
  3029. TAILQ_INIT(&soc->rx.defrag.waitlist);
  3030. soc->rx.defrag.timeout_ms =
  3031. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  3032. soc->rx.defrag.next_flush_ms = 0;
  3033. soc->rx.flags.defrag_timeout_check =
  3034. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  3035. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  3036. dp_monitor_soc_init(soc);
  3037. qdf_atomic_set(&soc->cmn_init_done, 1);
  3038. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  3039. qdf_spinlock_create(&soc->ast_lock);
  3040. dp_peer_mec_spinlock_create(soc);
  3041. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  3042. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  3043. INIT_RX_HW_STATS_LOCK(soc);
  3044. qdf_nbuf_queue_init(&soc->invalid_buf_queue);
  3045. /* fill the tx/rx cpu ring map*/
  3046. dp_soc_set_txrx_ring_map(soc);
  3047. TAILQ_INIT(&soc->inactive_peer_list);
  3048. qdf_spinlock_create(&soc->inactive_peer_list_lock);
  3049. TAILQ_INIT(&soc->inactive_vdev_list);
  3050. qdf_spinlock_create(&soc->inactive_vdev_list_lock);
  3051. qdf_spinlock_create(&soc->htt_stats.lock);
  3052. /* initialize work queue for stats processing */
  3053. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  3054. dp_reo_desc_deferred_freelist_create(soc);
  3055. dp_info("Mem stats: DMA = %u HEAP = %u SKB = %u",
  3056. qdf_dma_mem_stats_read(),
  3057. qdf_heap_mem_stats_read(),
  3058. qdf_skb_total_mem_stats_read());
  3059. soc->vdev_stats_id_map = 0;
  3060. dp_soc_hw_txrx_stats_init(soc);
  3061. dp_soc_get_ap_mld_mode(soc);
  3062. return soc;
  3063. fail7:
  3064. dp_soc_tx_desc_sw_pools_deinit(soc);
  3065. fail6:
  3066. htt_soc_htc_dealloc(soc->htt_handle);
  3067. fail5:
  3068. dp_soc_srng_deinit(soc);
  3069. fail4:
  3070. dp_hw_link_desc_ring_deinit(soc);
  3071. fail3:
  3072. htt_htc_pkt_pool_free(htt_soc);
  3073. fail2:
  3074. htt_soc_detach(htt_soc);
  3075. fail1:
  3076. return NULL;
  3077. }
  3078. #ifndef WLAN_DP_DISABLE_TCL_CMD_CRED_SRNG
  3079. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_init(struct dp_soc *soc)
  3080. {
  3081. QDF_STATUS status;
  3082. if (soc->init_tcl_cmd_cred_ring) {
  3083. status = dp_srng_init(soc, &soc->tcl_cmd_credit_ring,
  3084. TCL_CMD_CREDIT, 0, 0);
  3085. if (QDF_IS_STATUS_ERROR(status))
  3086. return status;
  3087. wlan_minidump_log(soc->tcl_cmd_credit_ring.base_vaddr_unaligned,
  3088. soc->tcl_cmd_credit_ring.alloc_size,
  3089. soc->ctrl_psoc,
  3090. WLAN_MD_DP_SRNG_TCL_CMD,
  3091. "wbm_desc_rel_ring");
  3092. }
  3093. return QDF_STATUS_SUCCESS;
  3094. }
  3095. static inline void dp_soc_tcl_cmd_cred_srng_deinit(struct dp_soc *soc)
  3096. {
  3097. if (soc->init_tcl_cmd_cred_ring) {
  3098. wlan_minidump_remove(soc->tcl_cmd_credit_ring.base_vaddr_unaligned,
  3099. soc->tcl_cmd_credit_ring.alloc_size,
  3100. soc->ctrl_psoc, WLAN_MD_DP_SRNG_TCL_CMD,
  3101. "wbm_desc_rel_ring");
  3102. dp_srng_deinit(soc, &soc->tcl_cmd_credit_ring,
  3103. TCL_CMD_CREDIT, 0);
  3104. }
  3105. }
  3106. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_alloc(struct dp_soc *soc)
  3107. {
  3108. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  3109. uint32_t entries;
  3110. QDF_STATUS status;
  3111. entries = wlan_cfg_get_dp_soc_tcl_cmd_credit_ring_size(soc_cfg_ctx);
  3112. if (soc->init_tcl_cmd_cred_ring) {
  3113. status = dp_srng_alloc(soc, &soc->tcl_cmd_credit_ring,
  3114. TCL_CMD_CREDIT, entries, 0);
  3115. if (QDF_IS_STATUS_ERROR(status))
  3116. return status;
  3117. }
  3118. return QDF_STATUS_SUCCESS;
  3119. }
  3120. static inline void dp_soc_tcl_cmd_cred_srng_free(struct dp_soc *soc)
  3121. {
  3122. if (soc->init_tcl_cmd_cred_ring)
  3123. dp_srng_free(soc, &soc->tcl_cmd_credit_ring);
  3124. }
  3125. inline void dp_tx_init_cmd_credit_ring(struct dp_soc *soc)
  3126. {
  3127. if (soc->init_tcl_cmd_cred_ring)
  3128. hal_tx_init_cmd_credit_ring(soc->hal_soc,
  3129. soc->tcl_cmd_credit_ring.hal_srng);
  3130. }
  3131. #else
  3132. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_init(struct dp_soc *soc)
  3133. {
  3134. return QDF_STATUS_SUCCESS;
  3135. }
  3136. static inline void dp_soc_tcl_cmd_cred_srng_deinit(struct dp_soc *soc)
  3137. {
  3138. }
  3139. static inline QDF_STATUS dp_soc_tcl_cmd_cred_srng_alloc(struct dp_soc *soc)
  3140. {
  3141. return QDF_STATUS_SUCCESS;
  3142. }
  3143. static inline void dp_soc_tcl_cmd_cred_srng_free(struct dp_soc *soc)
  3144. {
  3145. }
  3146. inline void dp_tx_init_cmd_credit_ring(struct dp_soc *soc)
  3147. {
  3148. }
  3149. #endif
  3150. #ifndef WLAN_DP_DISABLE_TCL_STATUS_SRNG
  3151. static inline QDF_STATUS dp_soc_tcl_status_srng_init(struct dp_soc *soc)
  3152. {
  3153. QDF_STATUS status;
  3154. status = dp_srng_init(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0);
  3155. if (QDF_IS_STATUS_ERROR(status))
  3156. return status;
  3157. wlan_minidump_log(soc->tcl_status_ring.base_vaddr_unaligned,
  3158. soc->tcl_status_ring.alloc_size,
  3159. soc->ctrl_psoc,
  3160. WLAN_MD_DP_SRNG_TCL_STATUS,
  3161. "wbm_desc_rel_ring");
  3162. return QDF_STATUS_SUCCESS;
  3163. }
  3164. static inline void dp_soc_tcl_status_srng_deinit(struct dp_soc *soc)
  3165. {
  3166. wlan_minidump_remove(soc->tcl_status_ring.base_vaddr_unaligned,
  3167. soc->tcl_status_ring.alloc_size,
  3168. soc->ctrl_psoc, WLAN_MD_DP_SRNG_TCL_STATUS,
  3169. "wbm_desc_rel_ring");
  3170. dp_srng_deinit(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  3171. }
  3172. static inline QDF_STATUS dp_soc_tcl_status_srng_alloc(struct dp_soc *soc)
  3173. {
  3174. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx = soc->wlan_cfg_ctx;
  3175. uint32_t entries;
  3176. QDF_STATUS status = QDF_STATUS_SUCCESS;
  3177. entries = wlan_cfg_get_dp_soc_tcl_status_ring_size(soc_cfg_ctx);
  3178. status = dp_srng_alloc(soc, &soc->tcl_status_ring,
  3179. TCL_STATUS, entries, 0);
  3180. return status;
  3181. }
  3182. static inline void dp_soc_tcl_status_srng_free(struct dp_soc *soc)
  3183. {
  3184. dp_srng_free(soc, &soc->tcl_status_ring);
  3185. }
  3186. #else
  3187. static inline QDF_STATUS dp_soc_tcl_status_srng_init(struct dp_soc *soc)
  3188. {
  3189. return QDF_STATUS_SUCCESS;
  3190. }
  3191. static inline void dp_soc_tcl_status_srng_deinit(struct dp_soc *soc)
  3192. {
  3193. }
  3194. static inline QDF_STATUS dp_soc_tcl_status_srng_alloc(struct dp_soc *soc)
  3195. {
  3196. return QDF_STATUS_SUCCESS;
  3197. }
  3198. static inline void dp_soc_tcl_status_srng_free(struct dp_soc *soc)
  3199. {
  3200. }
  3201. #endif
  3202. /**
  3203. * dp_soc_srng_deinit() - de-initialize soc srng rings
  3204. * @soc: Datapath soc handle
  3205. *
  3206. */
  3207. void dp_soc_srng_deinit(struct dp_soc *soc)
  3208. {
  3209. uint32_t i;
  3210. if (soc->arch_ops.txrx_soc_srng_deinit)
  3211. soc->arch_ops.txrx_soc_srng_deinit(soc);
  3212. /* Free the ring memories */
  3213. /* Common rings */
  3214. wlan_minidump_remove(soc->wbm_desc_rel_ring.base_vaddr_unaligned,
  3215. soc->wbm_desc_rel_ring.alloc_size,
  3216. soc->ctrl_psoc, WLAN_MD_DP_SRNG_WBM_DESC_REL,
  3217. "wbm_desc_rel_ring");
  3218. dp_srng_deinit(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  3219. /* Tx data rings */
  3220. for (i = 0; i < soc->num_tcl_data_rings; i++)
  3221. dp_deinit_tx_pair_by_index(soc, i);
  3222. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3223. dp_deinit_tx_pair_by_index(soc, IPA_TCL_DATA_RING_IDX);
  3224. dp_ipa_deinit_alt_tx_ring(soc);
  3225. }
  3226. /* TCL command and status rings */
  3227. dp_soc_tcl_cmd_cred_srng_deinit(soc);
  3228. dp_soc_tcl_status_srng_deinit(soc);
  3229. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3230. /* TODO: Get number of rings and ring sizes
  3231. * from wlan_cfg
  3232. */
  3233. wlan_minidump_remove(soc->reo_dest_ring[i].base_vaddr_unaligned,
  3234. soc->reo_dest_ring[i].alloc_size,
  3235. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_DEST,
  3236. "reo_dest_ring");
  3237. dp_srng_deinit(soc, &soc->reo_dest_ring[i], REO_DST, i);
  3238. }
  3239. /* REO reinjection ring */
  3240. wlan_minidump_remove(soc->reo_reinject_ring.base_vaddr_unaligned,
  3241. soc->reo_reinject_ring.alloc_size,
  3242. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_REINJECT,
  3243. "reo_reinject_ring");
  3244. dp_srng_deinit(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  3245. /* Rx release ring */
  3246. wlan_minidump_remove(soc->rx_rel_ring.base_vaddr_unaligned,
  3247. soc->rx_rel_ring.alloc_size,
  3248. soc->ctrl_psoc, WLAN_MD_DP_SRNG_RX_REL,
  3249. "reo_release_ring");
  3250. dp_srng_deinit(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  3251. /* Rx exception ring */
  3252. /* TODO: Better to store ring_type and ring_num in
  3253. * dp_srng during setup
  3254. */
  3255. wlan_minidump_remove(soc->reo_exception_ring.base_vaddr_unaligned,
  3256. soc->reo_exception_ring.alloc_size,
  3257. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_EXCEPTION,
  3258. "reo_exception_ring");
  3259. dp_srng_deinit(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  3260. /* REO command and status rings */
  3261. wlan_minidump_remove(soc->reo_cmd_ring.base_vaddr_unaligned,
  3262. soc->reo_cmd_ring.alloc_size,
  3263. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_CMD,
  3264. "reo_cmd_ring");
  3265. dp_srng_deinit(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  3266. wlan_minidump_remove(soc->reo_status_ring.base_vaddr_unaligned,
  3267. soc->reo_status_ring.alloc_size,
  3268. soc->ctrl_psoc, WLAN_MD_DP_SRNG_REO_STATUS,
  3269. "reo_status_ring");
  3270. dp_srng_deinit(soc, &soc->reo_status_ring, REO_STATUS, 0);
  3271. }
  3272. /**
  3273. * dp_soc_srng_init() - Initialize soc level srng rings
  3274. * @soc: Datapath soc handle
  3275. *
  3276. * Return: QDF_STATUS_SUCCESS on success
  3277. * QDF_STATUS_E_FAILURE on failure
  3278. */
  3279. QDF_STATUS dp_soc_srng_init(struct dp_soc *soc)
  3280. {
  3281. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  3282. uint8_t i;
  3283. uint8_t wbm2_sw_rx_rel_ring_id;
  3284. soc_cfg_ctx = soc->wlan_cfg_ctx;
  3285. dp_enable_verbose_debug(soc);
  3286. /* WBM descriptor release ring */
  3287. if (dp_srng_init(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0)) {
  3288. dp_init_err("%pK: dp_srng_init failed for wbm_desc_rel_ring", soc);
  3289. goto fail1;
  3290. }
  3291. wlan_minidump_log(soc->wbm_desc_rel_ring.base_vaddr_unaligned,
  3292. soc->wbm_desc_rel_ring.alloc_size,
  3293. soc->ctrl_psoc,
  3294. WLAN_MD_DP_SRNG_WBM_DESC_REL,
  3295. "wbm_desc_rel_ring");
  3296. /* TCL command and status rings */
  3297. if (dp_soc_tcl_cmd_cred_srng_init(soc)) {
  3298. dp_init_err("%pK: dp_srng_init failed for tcl_cmd_ring", soc);
  3299. goto fail1;
  3300. }
  3301. if (dp_soc_tcl_status_srng_init(soc)) {
  3302. dp_init_err("%pK: dp_srng_init failed for tcl_status_ring", soc);
  3303. goto fail1;
  3304. }
  3305. /* REO reinjection ring */
  3306. if (dp_srng_init(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0)) {
  3307. dp_init_err("%pK: dp_srng_init failed for reo_reinject_ring", soc);
  3308. goto fail1;
  3309. }
  3310. wlan_minidump_log(soc->reo_reinject_ring.base_vaddr_unaligned,
  3311. soc->reo_reinject_ring.alloc_size,
  3312. soc->ctrl_psoc,
  3313. WLAN_MD_DP_SRNG_REO_REINJECT,
  3314. "reo_reinject_ring");
  3315. wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc_cfg_ctx);
  3316. /* Rx release ring */
  3317. if (dp_srng_init(soc, &soc->rx_rel_ring, WBM2SW_RELEASE,
  3318. wbm2_sw_rx_rel_ring_id, 0)) {
  3319. dp_init_err("%pK: dp_srng_init failed for rx_rel_ring", soc);
  3320. goto fail1;
  3321. }
  3322. wlan_minidump_log(soc->rx_rel_ring.base_vaddr_unaligned,
  3323. soc->rx_rel_ring.alloc_size,
  3324. soc->ctrl_psoc,
  3325. WLAN_MD_DP_SRNG_RX_REL,
  3326. "reo_release_ring");
  3327. /* Rx exception ring */
  3328. if (dp_srng_init(soc, &soc->reo_exception_ring,
  3329. REO_EXCEPTION, 0, MAX_REO_DEST_RINGS)) {
  3330. dp_init_err("%pK: dp_srng_init failed - reo_exception", soc);
  3331. goto fail1;
  3332. }
  3333. wlan_minidump_log(soc->reo_exception_ring.base_vaddr_unaligned,
  3334. soc->reo_exception_ring.alloc_size,
  3335. soc->ctrl_psoc,
  3336. WLAN_MD_DP_SRNG_REO_EXCEPTION,
  3337. "reo_exception_ring");
  3338. /* REO command and status rings */
  3339. if (dp_srng_init(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0)) {
  3340. dp_init_err("%pK: dp_srng_init failed for reo_cmd_ring", soc);
  3341. goto fail1;
  3342. }
  3343. wlan_minidump_log(soc->reo_cmd_ring.base_vaddr_unaligned,
  3344. soc->reo_cmd_ring.alloc_size,
  3345. soc->ctrl_psoc,
  3346. WLAN_MD_DP_SRNG_REO_CMD,
  3347. "reo_cmd_ring");
  3348. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  3349. TAILQ_INIT(&soc->rx.reo_cmd_list);
  3350. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  3351. if (dp_srng_init(soc, &soc->reo_status_ring, REO_STATUS, 0, 0)) {
  3352. dp_init_err("%pK: dp_srng_init failed for reo_status_ring", soc);
  3353. goto fail1;
  3354. }
  3355. wlan_minidump_log(soc->reo_status_ring.base_vaddr_unaligned,
  3356. soc->reo_status_ring.alloc_size,
  3357. soc->ctrl_psoc,
  3358. WLAN_MD_DP_SRNG_REO_STATUS,
  3359. "reo_status_ring");
  3360. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3361. if (dp_init_tx_ring_pair_by_index(soc, i))
  3362. goto fail1;
  3363. }
  3364. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3365. if (dp_init_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX))
  3366. goto fail1;
  3367. if (dp_ipa_init_alt_tx_ring(soc))
  3368. goto fail1;
  3369. }
  3370. dp_create_ext_stats_event(soc);
  3371. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3372. /* Initialize REO destination ring */
  3373. if (dp_srng_init(soc, &soc->reo_dest_ring[i], REO_DST, i, 0)) {
  3374. dp_init_err("%pK: dp_srng_init failed for reo_dest_ringn", soc);
  3375. goto fail1;
  3376. }
  3377. wlan_minidump_log(soc->reo_dest_ring[i].base_vaddr_unaligned,
  3378. soc->reo_dest_ring[i].alloc_size,
  3379. soc->ctrl_psoc,
  3380. WLAN_MD_DP_SRNG_REO_DEST,
  3381. "reo_dest_ring");
  3382. }
  3383. if (soc->arch_ops.txrx_soc_srng_init) {
  3384. if (soc->arch_ops.txrx_soc_srng_init(soc)) {
  3385. dp_init_err("%pK: dp_srng_init failed for arch rings",
  3386. soc);
  3387. goto fail1;
  3388. }
  3389. }
  3390. return QDF_STATUS_SUCCESS;
  3391. fail1:
  3392. /*
  3393. * Cleanup will be done as part of soc_detach, which will
  3394. * be called on pdev attach failure
  3395. */
  3396. dp_soc_srng_deinit(soc);
  3397. return QDF_STATUS_E_FAILURE;
  3398. }
  3399. /**
  3400. * dp_soc_srng_free() - free soc level srng rings
  3401. * @soc: Datapath soc handle
  3402. *
  3403. */
  3404. void dp_soc_srng_free(struct dp_soc *soc)
  3405. {
  3406. uint32_t i;
  3407. if (soc->arch_ops.txrx_soc_srng_free)
  3408. soc->arch_ops.txrx_soc_srng_free(soc);
  3409. dp_srng_free(soc, &soc->wbm_desc_rel_ring);
  3410. for (i = 0; i < soc->num_tcl_data_rings; i++)
  3411. dp_free_tx_ring_pair_by_index(soc, i);
  3412. /* Free IPA rings for TCL_TX and TCL_COMPL ring */
  3413. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3414. dp_free_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX);
  3415. dp_ipa_free_alt_tx_ring(soc);
  3416. }
  3417. dp_soc_tcl_cmd_cred_srng_free(soc);
  3418. dp_soc_tcl_status_srng_free(soc);
  3419. for (i = 0; i < soc->num_reo_dest_rings; i++)
  3420. dp_srng_free(soc, &soc->reo_dest_ring[i]);
  3421. dp_srng_free(soc, &soc->reo_reinject_ring);
  3422. dp_srng_free(soc, &soc->rx_rel_ring);
  3423. dp_srng_free(soc, &soc->reo_exception_ring);
  3424. dp_srng_free(soc, &soc->reo_cmd_ring);
  3425. dp_srng_free(soc, &soc->reo_status_ring);
  3426. }
  3427. /**
  3428. * dp_soc_srng_alloc() - Allocate memory for soc level srng rings
  3429. * @soc: Datapath soc handle
  3430. *
  3431. * Return: QDF_STATUS_SUCCESS on success
  3432. * QDF_STATUS_E_NOMEM on failure
  3433. */
  3434. QDF_STATUS dp_soc_srng_alloc(struct dp_soc *soc)
  3435. {
  3436. uint32_t entries;
  3437. uint32_t i;
  3438. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  3439. uint32_t cached = WLAN_CFG_DST_RING_CACHED_DESC;
  3440. uint32_t reo_dst_ring_size;
  3441. soc_cfg_ctx = soc->wlan_cfg_ctx;
  3442. /* sw2wbm link descriptor release ring */
  3443. entries = wlan_cfg_get_dp_soc_wbm_release_ring_size(soc_cfg_ctx);
  3444. if (dp_srng_alloc(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE,
  3445. entries, 0)) {
  3446. dp_init_err("%pK: dp_srng_alloc failed for wbm_desc_rel_ring", soc);
  3447. goto fail1;
  3448. }
  3449. /* TCL command and status rings */
  3450. if (dp_soc_tcl_cmd_cred_srng_alloc(soc)) {
  3451. dp_init_err("%pK: dp_srng_alloc failed for tcl_cmd_ring", soc);
  3452. goto fail1;
  3453. }
  3454. if (dp_soc_tcl_status_srng_alloc(soc)) {
  3455. dp_init_err("%pK: dp_srng_alloc failed for tcl_status_ring", soc);
  3456. goto fail1;
  3457. }
  3458. /* REO reinjection ring */
  3459. entries = wlan_cfg_get_dp_soc_reo_reinject_ring_size(soc_cfg_ctx);
  3460. if (dp_srng_alloc(soc, &soc->reo_reinject_ring, REO_REINJECT,
  3461. entries, 0)) {
  3462. dp_init_err("%pK: dp_srng_alloc failed for reo_reinject_ring", soc);
  3463. goto fail1;
  3464. }
  3465. /* Rx release ring */
  3466. entries = wlan_cfg_get_dp_soc_rx_release_ring_size(soc_cfg_ctx);
  3467. if (dp_srng_alloc(soc, &soc->rx_rel_ring, WBM2SW_RELEASE,
  3468. entries, 0)) {
  3469. dp_init_err("%pK: dp_srng_alloc failed for rx_rel_ring", soc);
  3470. goto fail1;
  3471. }
  3472. /* Rx exception ring */
  3473. entries = wlan_cfg_get_dp_soc_reo_exception_ring_size(soc_cfg_ctx);
  3474. if (dp_srng_alloc(soc, &soc->reo_exception_ring, REO_EXCEPTION,
  3475. entries, 0)) {
  3476. dp_init_err("%pK: dp_srng_alloc failed - reo_exception", soc);
  3477. goto fail1;
  3478. }
  3479. /* REO command and status rings */
  3480. entries = wlan_cfg_get_dp_soc_reo_cmd_ring_size(soc_cfg_ctx);
  3481. if (dp_srng_alloc(soc, &soc->reo_cmd_ring, REO_CMD, entries, 0)) {
  3482. dp_init_err("%pK: dp_srng_alloc failed for reo_cmd_ring", soc);
  3483. goto fail1;
  3484. }
  3485. entries = wlan_cfg_get_dp_soc_reo_status_ring_size(soc_cfg_ctx);
  3486. if (dp_srng_alloc(soc, &soc->reo_status_ring, REO_STATUS,
  3487. entries, 0)) {
  3488. dp_init_err("%pK: dp_srng_alloc failed for reo_status_ring", soc);
  3489. goto fail1;
  3490. }
  3491. reo_dst_ring_size = wlan_cfg_get_reo_dst_ring_size(soc_cfg_ctx);
  3492. /* Disable cached desc if NSS offload is enabled */
  3493. if (wlan_cfg_get_dp_soc_nss_cfg(soc_cfg_ctx))
  3494. cached = 0;
  3495. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  3496. if (dp_alloc_tx_ring_pair_by_index(soc, i))
  3497. goto fail1;
  3498. }
  3499. /* IPA rings for TCL_TX and TX_COMP will be allocated here */
  3500. if (wlan_cfg_is_ipa_enabled(soc->wlan_cfg_ctx)) {
  3501. if (dp_alloc_tx_ring_pair_by_index(soc, IPA_TCL_DATA_RING_IDX))
  3502. goto fail1;
  3503. if (dp_ipa_alloc_alt_tx_ring(soc))
  3504. goto fail1;
  3505. }
  3506. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  3507. /* Setup REO destination ring */
  3508. if (dp_srng_alloc(soc, &soc->reo_dest_ring[i], REO_DST,
  3509. reo_dst_ring_size, cached)) {
  3510. dp_init_err("%pK: dp_srng_alloc failed for reo_dest_ring", soc);
  3511. goto fail1;
  3512. }
  3513. }
  3514. if (soc->arch_ops.txrx_soc_srng_alloc) {
  3515. if (soc->arch_ops.txrx_soc_srng_alloc(soc)) {
  3516. dp_init_err("%pK: dp_srng_alloc failed for arch rings",
  3517. soc);
  3518. goto fail1;
  3519. }
  3520. }
  3521. return QDF_STATUS_SUCCESS;
  3522. fail1:
  3523. dp_soc_srng_free(soc);
  3524. return QDF_STATUS_E_NOMEM;
  3525. }
  3526. /**
  3527. * dp_soc_cfg_attach() - set target specific configuration in
  3528. * dp soc cfg.
  3529. * @soc: dp soc handle
  3530. */
  3531. void dp_soc_cfg_attach(struct dp_soc *soc)
  3532. {
  3533. int target_type;
  3534. int nss_cfg = 0;
  3535. target_type = hal_get_target_type(soc->hal_soc);
  3536. switch (target_type) {
  3537. case TARGET_TYPE_QCA6290:
  3538. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  3539. REO_DST_RING_SIZE_QCA6290);
  3540. break;
  3541. case TARGET_TYPE_QCA6390:
  3542. case TARGET_TYPE_QCA6490:
  3543. case TARGET_TYPE_QCA6750:
  3544. wlan_cfg_set_reo_dst_ring_size(soc->wlan_cfg_ctx,
  3545. REO_DST_RING_SIZE_QCA6290);
  3546. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3547. break;
  3548. case TARGET_TYPE_KIWI:
  3549. case TARGET_TYPE_MANGO:
  3550. case TARGET_TYPE_PEACH:
  3551. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3552. break;
  3553. case TARGET_TYPE_QCA8074:
  3554. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3555. break;
  3556. case TARGET_TYPE_QCA8074V2:
  3557. case TARGET_TYPE_QCA6018:
  3558. case TARGET_TYPE_QCA9574:
  3559. case TARGET_TYPE_QCN6122:
  3560. case TARGET_TYPE_QCA5018:
  3561. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3562. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  3563. break;
  3564. case TARGET_TYPE_QCN9160:
  3565. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3566. soc->wlan_cfg_ctx->rxdma1_enable = 0;
  3567. break;
  3568. case TARGET_TYPE_QCN9000:
  3569. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3570. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  3571. break;
  3572. case TARGET_TYPE_QCN9224:
  3573. case TARGET_TYPE_QCA5332:
  3574. case TARGET_TYPE_QCN6432:
  3575. wlan_cfg_set_tso_desc_attach_defer(soc->wlan_cfg_ctx, 1);
  3576. wlan_cfg_set_rxdma1_enable(soc->wlan_cfg_ctx);
  3577. break;
  3578. default:
  3579. qdf_print("%s: Unknown tgt type %d\n", __func__, target_type);
  3580. qdf_assert_always(0);
  3581. break;
  3582. }
  3583. if (soc->cdp_soc.ol_ops->get_soc_nss_cfg)
  3584. nss_cfg = soc->cdp_soc.ol_ops->get_soc_nss_cfg(soc->ctrl_psoc);
  3585. wlan_cfg_set_dp_soc_nss_cfg(soc->wlan_cfg_ctx, nss_cfg);
  3586. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  3587. wlan_cfg_set_num_tx_desc_pool(soc->wlan_cfg_ctx, 0);
  3588. wlan_cfg_set_num_tx_ext_desc_pool(soc->wlan_cfg_ctx, 0);
  3589. wlan_cfg_set_num_tx_desc(soc->wlan_cfg_ctx, 0);
  3590. wlan_cfg_set_num_tx_ext_desc(soc->wlan_cfg_ctx, 0);
  3591. soc->init_tcl_cmd_cred_ring = false;
  3592. soc->num_tcl_data_rings =
  3593. wlan_cfg_num_nss_tcl_data_rings(soc->wlan_cfg_ctx);
  3594. soc->num_reo_dest_rings =
  3595. wlan_cfg_num_nss_reo_dest_rings(soc->wlan_cfg_ctx);
  3596. } else {
  3597. soc->init_tcl_cmd_cred_ring = true;
  3598. soc->num_tx_comp_rings =
  3599. wlan_cfg_num_tx_comp_rings(soc->wlan_cfg_ctx);
  3600. soc->num_tcl_data_rings =
  3601. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  3602. soc->num_reo_dest_rings =
  3603. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  3604. }
  3605. }
  3606. void dp_pdev_set_default_reo(struct dp_pdev *pdev)
  3607. {
  3608. struct dp_soc *soc = pdev->soc;
  3609. switch (pdev->pdev_id) {
  3610. case 0:
  3611. pdev->reo_dest =
  3612. wlan_cfg_radio0_default_reo_get(soc->wlan_cfg_ctx);
  3613. break;
  3614. case 1:
  3615. pdev->reo_dest =
  3616. wlan_cfg_radio1_default_reo_get(soc->wlan_cfg_ctx);
  3617. break;
  3618. case 2:
  3619. pdev->reo_dest =
  3620. wlan_cfg_radio2_default_reo_get(soc->wlan_cfg_ctx);
  3621. break;
  3622. default:
  3623. dp_init_err("%pK: Invalid pdev_id %d for reo selection",
  3624. soc, pdev->pdev_id);
  3625. break;
  3626. }
  3627. }