wsa883x.c 44 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/init.h>
  7. #include <linux/slab.h>
  8. #include <linux/platform_device.h>
  9. #include <linux/device.h>
  10. #include <linux/printk.h>
  11. #include <linux/bitops.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/delay.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gpio.h>
  17. #include <linux/of_gpio.h>
  18. #include <linux/of_platform.h>
  19. #include <linux/regmap.h>
  20. #include <linux/debugfs.h>
  21. #include <soc/soundwire.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/tlv.h>
  27. #include <asoc/msm-cdc-pinctrl.h>
  28. #include <asoc/msm-cdc-supply.h>
  29. #include "wsa883x.h"
  30. #include "internal.h"
  31. #define T1_TEMP -10
  32. #define T2_TEMP 150
  33. #define LOW_TEMP_THRESHOLD 5
  34. #define HIGH_TEMP_THRESHOLD 45
  35. #define TEMP_INVALID 0xFFFF
  36. #define WSA883X_TEMP_RETRY 3
  37. #define WSA883X_VBAT_TIMER_SEC 2
  38. static int wsa883x_vbat_timer_sec = WSA883X_VBAT_TIMER_SEC;
  39. module_param(wsa883x_vbat_timer_sec, int, 0664);
  40. MODULE_PARM_DESC(wsa883x_vbat_timer_sec, "timer for VBAT monitor polling");
  41. #define DRV_NAME "wsa-codec"
  42. enum {
  43. WSA_4OHMS =4,
  44. WSA_8OHMS = 8,
  45. WSA_16OHMS = 16,
  46. WSA_32OHMS = 32,
  47. };
  48. struct wsa_temp_register {
  49. u8 d1_msb;
  50. u8 d1_lsb;
  51. u8 d2_msb;
  52. u8 d2_lsb;
  53. u8 dmeas_msb;
  54. u8 dmeas_lsb;
  55. };
  56. struct wsa_reg_mask_val {
  57. u16 reg;
  58. u8 mask;
  59. u8 val;
  60. };
  61. static const struct wsa_reg_mask_val reg_init[] = {
  62. {WSA883X_PA_FSM_BYP, 0x01, 0x00},
  63. {WSA883X_CDC_SPK_DSM_A2_0, 0xFF, 0x0A},
  64. {WSA883X_CDC_SPK_DSM_A2_1, 0x0F, 0x08},
  65. {WSA883X_CDC_SPK_DSM_A3_0, 0xFF, 0xF3},
  66. {WSA883X_CDC_SPK_DSM_A3_1, 0x07, 0x07},
  67. {WSA883X_CDC_SPK_DSM_A4_0, 0xFF, 0x79},
  68. {WSA883X_CDC_SPK_DSM_A4_1, 0x03, 0x02},
  69. {WSA883X_CDC_SPK_DSM_A5_0, 0xFF, 0x0B},
  70. {WSA883X_CDC_SPK_DSM_A5_1, 0x03, 0x02},
  71. {WSA883X_CDC_SPK_DSM_A6_0, 0xFF, 0x8A},
  72. {WSA883X_CDC_SPK_DSM_A7_0, 0xFF, 0x9B},
  73. {WSA883X_CDC_SPK_DSM_C_0, 0xFF, 0x68},
  74. {WSA883X_CDC_SPK_DSM_C_1, 0xFF, 0x54},
  75. {WSA883X_CDC_SPK_DSM_C_2, 0xFF, 0xF2},
  76. {WSA883X_CDC_SPK_DSM_C_3, 0x3F, 0x20},
  77. {WSA883X_CDC_SPK_DSM_R1, 0xFF, 0x83},
  78. {WSA883X_CDC_SPK_DSM_R2, 0xFF, 0x7F},
  79. {WSA883X_CDC_SPK_DSM_R3, 0xFF, 0x9D},
  80. {WSA883X_CDC_SPK_DSM_R4, 0xFF, 0x82},
  81. {WSA883X_CDC_SPK_DSM_R5, 0xFF, 0x8B},
  82. {WSA883X_CDC_SPK_DSM_R6, 0xFF, 0x9B},
  83. {WSA883X_CDC_SPK_DSM_R7, 0xFF, 0x3F},
  84. {WSA883X_DRE_CTL_0, 0xF0, 0x90},
  85. {WSA883X_DRE_IDLE_DET_CTL, 0x10, 0x00},
  86. {WSA883X_PDM_WD_CTL, 0x01, 0x01},
  87. {WSA883X_CURRENT_LIMIT, 0x78, 0x40},
  88. {WSA883X_DRE_CTL_0, 0x07, 0x02},
  89. {WSA883X_VAGC_TIME, 0x03, 0x02},
  90. {WSA883X_VAGC_CTL, 0x01, 0x01},
  91. {WSA883X_TAGC_CTL, 0x0E, 0x0A},
  92. {WSA883X_TAGC_TIME, 0x0C, 0x0C},
  93. {WSA883X_TAGC_E2E_GAIN, 0x1F, 0x02},
  94. {WSA883X_TEMP_CONFIG0, 0x07, 0x02},
  95. {WSA883X_TEMP_CONFIG1, 0x07, 0x02},
  96. {WSA883X_OTP_REG_1, 0xFF, 0x49},
  97. {WSA883X_OTP_REG_2, 0xC0, 0x80},
  98. {WSA883X_OTP_REG_3, 0xFF, 0xC9},
  99. {WSA883X_OTP_REG_4, 0xC0, 0x40},
  100. {WSA883X_TAGC_CTL, 0x01, 0x01},
  101. {WSA883X_CKWD_CTL_0, 0x60, 0x00},
  102. {WSA883X_CKWD_CTL_1, 0x1F, 0x1B},
  103. };
  104. static int wsa883x_get_temperature(struct snd_soc_component *component,
  105. int *temp);
  106. enum {
  107. WSA8830 = 0,
  108. WSA8835,
  109. };
  110. enum {
  111. SPKR_STATUS = 0,
  112. };
  113. enum {
  114. WSA883X_IRQ_INT_SAF2WAR = 0,
  115. WSA883X_IRQ_INT_WAR2SAF,
  116. WSA883X_IRQ_INT_DISABLE,
  117. WSA883X_IRQ_INT_OCP,
  118. WSA883X_IRQ_INT_CLIP,
  119. WSA883X_IRQ_INT_PDM_WD,
  120. WSA883X_IRQ_INT_CLK_WD,
  121. WSA883X_IRQ_INT_INTR_PIN,
  122. WSA883X_IRQ_INT_UVLO,
  123. WSA883X_IRQ_INT_PA_ON_ERR,
  124. WSA883X_NUM_IRQS,
  125. };
  126. static const struct regmap_irq wsa883x_irqs[WSA883X_NUM_IRQS] = {
  127. REGMAP_IRQ_REG(WSA883X_IRQ_INT_SAF2WAR, 0, 0x01),
  128. REGMAP_IRQ_REG(WSA883X_IRQ_INT_WAR2SAF, 0, 0x02),
  129. REGMAP_IRQ_REG(WSA883X_IRQ_INT_DISABLE, 0, 0x04),
  130. REGMAP_IRQ_REG(WSA883X_IRQ_INT_OCP, 0, 0x08),
  131. REGMAP_IRQ_REG(WSA883X_IRQ_INT_CLIP, 0, 0x10),
  132. REGMAP_IRQ_REG(WSA883X_IRQ_INT_PDM_WD, 0, 0x20),
  133. REGMAP_IRQ_REG(WSA883X_IRQ_INT_CLK_WD, 0, 0x40),
  134. REGMAP_IRQ_REG(WSA883X_IRQ_INT_INTR_PIN, 0, 0x80),
  135. REGMAP_IRQ_REG(WSA883X_IRQ_INT_UVLO, 1, 0x01),
  136. REGMAP_IRQ_REG(WSA883X_IRQ_INT_PA_ON_ERR, 1, 0x02),
  137. };
  138. static struct regmap_irq_chip wsa883x_regmap_irq_chip = {
  139. .name = "wsa883x",
  140. .irqs = wsa883x_irqs,
  141. .num_irqs = ARRAY_SIZE(wsa883x_irqs),
  142. .num_regs = 2,
  143. .status_base = WSA883X_INTR_STATUS0,
  144. .mask_base = WSA883X_INTR_MASK0,
  145. .type_base = WSA883X_INTR_LEVEL0,
  146. .ack_base = WSA883X_INTR_CLEAR0,
  147. .use_ack = 1,
  148. .runtime_pm = false,
  149. .irq_drv_data = NULL,
  150. };
  151. #ifdef CONFIG_DEBUG_FS
  152. static int codec_debug_open(struct inode *inode, struct file *file)
  153. {
  154. file->private_data = inode->i_private;
  155. return 0;
  156. }
  157. static int get_parameters(char *buf, u32 *param1, int num_of_par)
  158. {
  159. char *token;
  160. int base, cnt;
  161. token = strsep(&buf, " ");
  162. for (cnt = 0; cnt < num_of_par; cnt++) {
  163. if (token) {
  164. if ((token[1] == 'x') || (token[1] == 'X'))
  165. base = 16;
  166. else
  167. base = 10;
  168. if (kstrtou32(token, base, &param1[cnt]) != 0)
  169. return -EINVAL;
  170. token = strsep(&buf, " ");
  171. } else {
  172. return -EINVAL;
  173. }
  174. }
  175. return 0;
  176. }
  177. static bool is_swr_slave_reg_readable(int reg)
  178. {
  179. int ret = true;
  180. if (((reg > 0x46) && (reg < 0x4A)) ||
  181. ((reg > 0x4A) && (reg < 0x50)) ||
  182. ((reg > 0x55) && (reg < 0xD0)) ||
  183. ((reg > 0xD0) && (reg < 0xE0)) ||
  184. ((reg > 0xE0) && (reg < 0xF0)) ||
  185. ((reg > 0xF0) && (reg < 0x100)) ||
  186. ((reg > 0x105) && (reg < 0x120)) ||
  187. ((reg > 0x205) && (reg < 0x220)) ||
  188. ((reg > 0x305) && (reg < 0x320)) ||
  189. ((reg > 0x405) && (reg < 0x420)) ||
  190. ((reg > 0x128) && (reg < 0x130)) ||
  191. ((reg > 0x228) && (reg < 0x230)) ||
  192. ((reg > 0x328) && (reg < 0x330)) ||
  193. ((reg > 0x428) && (reg < 0x430)) ||
  194. ((reg > 0x138) && (reg < 0x205)) ||
  195. ((reg > 0x238) && (reg < 0x305)) ||
  196. ((reg > 0x338) && (reg < 0x405)) ||
  197. ((reg > 0x405) && (reg < 0xF00)) ||
  198. ((reg > 0xF05) && (reg < 0xF20)) ||
  199. ((reg > 0xF25) && (reg < 0xF30)) ||
  200. ((reg > 0xF35) && (reg < 0x2000)))
  201. ret = false;
  202. return ret;
  203. }
  204. static ssize_t swr_slave_reg_show(struct swr_device *pdev, char __user *ubuf,
  205. size_t count, loff_t *ppos)
  206. {
  207. int i, reg_val, len;
  208. ssize_t total = 0;
  209. char tmp_buf[SWR_SLV_MAX_BUF_LEN];
  210. if (!ubuf || !ppos)
  211. return 0;
  212. for (i = (((int) *ppos/BYTES_PER_LINE) + SWR_SLV_START_REG_ADDR);
  213. i <= SWR_SLV_MAX_REG_ADDR; i++) {
  214. if (!is_swr_slave_reg_readable(i))
  215. continue;
  216. swr_read(pdev, pdev->dev_num, i, &reg_val, 1);
  217. len = snprintf(tmp_buf, sizeof(tmp_buf), "0x%.3x: 0x%.2x\n", i,
  218. (reg_val & 0xFF));
  219. if (((total + len) >= count - 1) || (len < 0))
  220. break;
  221. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  222. pr_err("%s: fail to copy reg dump\n", __func__);
  223. total = -EFAULT;
  224. goto copy_err;
  225. }
  226. total += len;
  227. *ppos += len;
  228. }
  229. copy_err:
  230. *ppos = SWR_SLV_MAX_REG_ADDR * BYTES_PER_LINE;
  231. return total;
  232. }
  233. static ssize_t codec_debug_dump(struct file *file, char __user *ubuf,
  234. size_t count, loff_t *ppos)
  235. {
  236. struct swr_device *pdev;
  237. if (!count || !file || !ppos || !ubuf)
  238. return -EINVAL;
  239. pdev = file->private_data;
  240. if (!pdev)
  241. return -EINVAL;
  242. if (*ppos < 0)
  243. return -EINVAL;
  244. return swr_slave_reg_show(pdev, ubuf, count, ppos);
  245. }
  246. static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
  247. size_t count, loff_t *ppos)
  248. {
  249. char lbuf[SWR_SLV_RD_BUF_LEN];
  250. struct swr_device *pdev = NULL;
  251. struct wsa883x_priv *wsa883x = NULL;
  252. if (!count || !file || !ppos || !ubuf)
  253. return -EINVAL;
  254. pdev = file->private_data;
  255. if (!pdev)
  256. return -EINVAL;
  257. wsa883x = swr_get_dev_data(pdev);
  258. if (!wsa883x)
  259. return -EINVAL;
  260. if (*ppos < 0)
  261. return -EINVAL;
  262. snprintf(lbuf, sizeof(lbuf), "0x%x\n",
  263. (wsa883x->read_data & 0xFF));
  264. return simple_read_from_buffer(ubuf, count, ppos, lbuf,
  265. strnlen(lbuf, 7));
  266. }
  267. static ssize_t codec_debug_peek_write(struct file *file,
  268. const char __user *ubuf, size_t cnt, loff_t *ppos)
  269. {
  270. char lbuf[SWR_SLV_WR_BUF_LEN];
  271. int rc = 0;
  272. u32 param[5];
  273. struct swr_device *pdev = NULL;
  274. struct wsa883x_priv *wsa883x = NULL;
  275. if (!cnt || !file || !ppos || !ubuf)
  276. return -EINVAL;
  277. pdev = file->private_data;
  278. if (!pdev)
  279. return -EINVAL;
  280. wsa883x = swr_get_dev_data(pdev);
  281. if (!wsa883x)
  282. return -EINVAL;
  283. if (*ppos < 0)
  284. return -EINVAL;
  285. if (cnt > sizeof(lbuf) - 1)
  286. return -EINVAL;
  287. rc = copy_from_user(lbuf, ubuf, cnt);
  288. if (rc)
  289. return -EFAULT;
  290. lbuf[cnt] = '\0';
  291. rc = get_parameters(lbuf, param, 1);
  292. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) && (rc == 0)))
  293. return -EINVAL;
  294. swr_read(pdev, pdev->dev_num, param[0], &wsa883x->read_data, 1);
  295. if (rc == 0)
  296. rc = cnt;
  297. else
  298. pr_err("%s: rc = %d\n", __func__, rc);
  299. return rc;
  300. }
  301. static ssize_t codec_debug_write(struct file *file,
  302. const char __user *ubuf, size_t cnt, loff_t *ppos)
  303. {
  304. char lbuf[SWR_SLV_WR_BUF_LEN];
  305. int rc = 0;
  306. u32 param[5];
  307. struct swr_device *pdev;
  308. if (!file || !ppos || !ubuf)
  309. return -EINVAL;
  310. pdev = file->private_data;
  311. if (!pdev)
  312. return -EINVAL;
  313. if (cnt > sizeof(lbuf) - 1)
  314. return -EINVAL;
  315. rc = copy_from_user(lbuf, ubuf, cnt);
  316. if (rc)
  317. return -EFAULT;
  318. lbuf[cnt] = '\0';
  319. rc = get_parameters(lbuf, param, 2);
  320. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) &&
  321. (param[1] <= 0xFF) && (rc == 0)))
  322. return -EINVAL;
  323. swr_write(pdev, pdev->dev_num, param[0], &param[1]);
  324. if (rc == 0)
  325. rc = cnt;
  326. else
  327. pr_err("%s: rc = %d\n", __func__, rc);
  328. return rc;
  329. }
  330. static const struct file_operations codec_debug_write_ops = {
  331. .open = codec_debug_open,
  332. .write = codec_debug_write,
  333. };
  334. static const struct file_operations codec_debug_read_ops = {
  335. .open = codec_debug_open,
  336. .read = codec_debug_read,
  337. .write = codec_debug_peek_write,
  338. };
  339. static const struct file_operations codec_debug_dump_ops = {
  340. .open = codec_debug_open,
  341. .read = codec_debug_dump,
  342. };
  343. #endif
  344. static irqreturn_t wsa883x_saf2war_handle_irq(int irq, void *data)
  345. {
  346. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  347. __func__, irq);
  348. return IRQ_HANDLED;
  349. }
  350. static irqreturn_t wsa883x_war2saf_handle_irq(int irq, void *data)
  351. {
  352. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  353. __func__, irq);
  354. return IRQ_HANDLED;
  355. }
  356. static irqreturn_t wsa883x_otp_handle_irq(int irq, void *data)
  357. {
  358. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  359. __func__, irq);
  360. return IRQ_HANDLED;
  361. }
  362. static irqreturn_t wsa883x_ocp_handle_irq(int irq, void *data)
  363. {
  364. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  365. __func__, irq);
  366. return IRQ_HANDLED;
  367. }
  368. static irqreturn_t wsa883x_clip_handle_irq(int irq, void *data)
  369. {
  370. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  371. __func__, irq);
  372. return IRQ_HANDLED;
  373. }
  374. static irqreturn_t wsa883x_pdm_wd_handle_irq(int irq, void *data)
  375. {
  376. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  377. __func__, irq);
  378. return IRQ_HANDLED;
  379. }
  380. static irqreturn_t wsa883x_clk_wd_handle_irq(int irq, void *data)
  381. {
  382. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  383. __func__, irq);
  384. return IRQ_HANDLED;
  385. }
  386. static irqreturn_t wsa883x_ext_int_handle_irq(int irq, void *data)
  387. {
  388. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  389. __func__, irq);
  390. return IRQ_HANDLED;
  391. }
  392. static irqreturn_t wsa883x_uvlo_handle_irq(int irq, void *data)
  393. {
  394. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  395. __func__, irq);
  396. return IRQ_HANDLED;
  397. }
  398. static irqreturn_t wsa883x_pa_on_err_handle_irq(int irq, void *data)
  399. {
  400. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  401. __func__, irq);
  402. return IRQ_HANDLED;
  403. }
  404. static const char * const wsa_dev_mode_text[] = {
  405. "speaker", "receiver", "ultrasound"
  406. };
  407. static const struct soc_enum wsa_dev_mode_enum =
  408. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_dev_mode_text), wsa_dev_mode_text);
  409. static int wsa_dev_mode_get(struct snd_kcontrol *kcontrol,
  410. struct snd_ctl_elem_value *ucontrol)
  411. {
  412. struct snd_soc_component *component =
  413. snd_soc_kcontrol_component(kcontrol);
  414. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  415. ucontrol->value.integer.value[0] = wsa883x->dev_mode;
  416. dev_dbg(component->dev, "%s: mode = 0x%x\n", __func__,
  417. wsa883x->dev_mode);
  418. return 0;
  419. }
  420. static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
  421. struct snd_ctl_elem_value *ucontrol)
  422. {
  423. struct snd_soc_component *component =
  424. snd_soc_kcontrol_component(kcontrol);
  425. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  426. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  427. __func__, ucontrol->value.integer.value[0]);
  428. wsa883x->dev_mode = ucontrol->value.integer.value[0];
  429. return 0;
  430. }
  431. static const char * const wsa_pa_gain_text[] = {
  432. "G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB", "G_12_DB", "G_10P5_DB",
  433. "G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB", "G_3_DB", "G_1P5_DB",
  434. "G_0_DB"
  435. };
  436. static const struct soc_enum wsa_pa_gain_enum =
  437. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_pa_gain_text), wsa_pa_gain_text);
  438. static int wsa_pa_gain_get(struct snd_kcontrol *kcontrol,
  439. struct snd_ctl_elem_value *ucontrol)
  440. {
  441. struct snd_soc_component *component =
  442. snd_soc_kcontrol_component(kcontrol);
  443. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  444. ucontrol->value.integer.value[0] = wsa883x->pa_gain;
  445. dev_dbg(component->dev, "%s: PA gain = 0x%x\n", __func__,
  446. wsa883x->pa_gain);
  447. return 0;
  448. }
  449. static int wsa_pa_gain_put(struct snd_kcontrol *kcontrol,
  450. struct snd_ctl_elem_value *ucontrol)
  451. {
  452. struct snd_soc_component *component =
  453. snd_soc_kcontrol_component(kcontrol);
  454. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  455. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  456. __func__, ucontrol->value.integer.value[0]);
  457. wsa883x->pa_gain = ucontrol->value.integer.value[0];
  458. return 0;
  459. }
  460. static int wsa883x_get_mute(struct snd_kcontrol *kcontrol,
  461. struct snd_ctl_elem_value *ucontrol)
  462. {
  463. struct snd_soc_component *component =
  464. snd_soc_kcontrol_component(kcontrol);
  465. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  466. ucontrol->value.integer.value[0] = wsa883x->pa_mute;
  467. return 0;
  468. }
  469. static int wsa883x_set_mute(struct snd_kcontrol *kcontrol,
  470. struct snd_ctl_elem_value *ucontrol)
  471. {
  472. struct snd_soc_component *component =
  473. snd_soc_kcontrol_component(kcontrol);
  474. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  475. int value = ucontrol->value.integer.value[0];
  476. dev_dbg(component->dev, "%s: mute current %d, new %d\n",
  477. __func__, wsa883x->pa_mute, value);
  478. wsa883x->pa_mute = value;
  479. return 0;
  480. }
  481. static int wsa_get_temp(struct snd_kcontrol *kcontrol,
  482. struct snd_ctl_elem_value *ucontrol)
  483. {
  484. struct snd_soc_component *component =
  485. snd_soc_kcontrol_component(kcontrol);
  486. int temp = 0;
  487. wsa883x_get_temperature(component, &temp);
  488. ucontrol->value.integer.value[0] = temp;
  489. return 0;
  490. }
  491. static ssize_t wsa883x_codec_version_read(struct snd_info_entry *entry,
  492. void *file_private_data, struct file *file,
  493. char __user *buf, size_t count, loff_t pos)
  494. {
  495. struct wsa883x_priv *wsa883x;
  496. char buffer[WSA883X_VERSION_ENTRY_SIZE];
  497. int len = 0;
  498. wsa883x = (struct wsa883x_priv *) entry->private_data;
  499. if (!wsa883x) {
  500. pr_err("%s: wsa883x priv is null\n", __func__);
  501. return -EINVAL;
  502. }
  503. switch (wsa883x->version) {
  504. case WSA883X_VERSION_1_0:
  505. len = snprintf(buffer, sizeof(buffer), "WSA883X_1_0\n");
  506. break;
  507. case WSA883X_VERSION_1_1:
  508. len = snprintf(buffer, sizeof(buffer), "WSA883X_1_1\n");
  509. break;
  510. default:
  511. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  512. break;
  513. }
  514. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  515. }
  516. static struct snd_info_entry_ops wsa883x_codec_info_ops = {
  517. .read = wsa883x_codec_version_read,
  518. };
  519. static ssize_t wsa883x_variant_read(struct snd_info_entry *entry,
  520. void *file_private_data,
  521. struct file *file,
  522. char __user *buf, size_t count,
  523. loff_t pos)
  524. {
  525. struct wsa883x_priv *wsa883x;
  526. char buffer[WSA883X_VARIANT_ENTRY_SIZE];
  527. int len = 0;
  528. wsa883x = (struct wsa883x_priv *) entry->private_data;
  529. if (!wsa883x) {
  530. pr_err("%s: wsa883x priv is null\n", __func__);
  531. return -EINVAL;
  532. }
  533. switch (wsa883x->variant) {
  534. case WSA8830:
  535. len = snprintf(buffer, sizeof(buffer), "WSA8830\n");
  536. break;
  537. case WSA8835:
  538. len = snprintf(buffer, sizeof(buffer), "WSA8835\n");
  539. break;
  540. default:
  541. len = snprintf(buffer, sizeof(buffer), "UNDEFINED\n");
  542. break;
  543. }
  544. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  545. }
  546. static struct snd_info_entry_ops wsa883x_variant_ops = {
  547. .read = wsa883x_variant_read,
  548. };
  549. /*
  550. * wsa883x_codec_info_create_codec_entry - creates wsa883x module
  551. * @codec_root: The parent directory
  552. * @component: Codec instance
  553. *
  554. * Creates wsa883x module and version entry under the given
  555. * parent directory.
  556. *
  557. * Return: 0 on success or negative error code on failure.
  558. */
  559. int wsa883x_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
  560. struct snd_soc_component *component)
  561. {
  562. struct snd_info_entry *version_entry;
  563. struct snd_info_entry *variant_entry;
  564. struct wsa883x_priv *wsa883x;
  565. struct snd_soc_card *card;
  566. char name[80];
  567. if (!codec_root || !component)
  568. return -EINVAL;
  569. wsa883x = snd_soc_component_get_drvdata(component);
  570. if (wsa883x->entry) {
  571. dev_dbg(wsa883x->dev,
  572. "%s:wsa883x module already created\n", __func__);
  573. return 0;
  574. }
  575. card = component->card;
  576. snprintf(name, sizeof(name), "%s.%x", "wsa883x",
  577. (u32)wsa883x->swr_slave->addr);
  578. wsa883x->entry = snd_info_create_module_entry(codec_root->module,
  579. (const char *)name,
  580. codec_root);
  581. if (!wsa883x->entry) {
  582. dev_dbg(component->dev, "%s: failed to create wsa883x entry\n",
  583. __func__);
  584. return -ENOMEM;
  585. }
  586. wsa883x->entry->mode = S_IFDIR | 0555;
  587. if (snd_info_register(wsa883x->entry) < 0) {
  588. snd_info_free_entry(wsa883x->entry);
  589. return -ENOMEM;
  590. }
  591. version_entry = snd_info_create_card_entry(card->snd_card,
  592. "version",
  593. wsa883x->entry);
  594. if (!version_entry) {
  595. dev_dbg(component->dev, "%s: failed to create wsa883x version entry\n",
  596. __func__);
  597. snd_info_free_entry(wsa883x->entry);
  598. return -ENOMEM;
  599. }
  600. version_entry->private_data = wsa883x;
  601. version_entry->size = WSA883X_VERSION_ENTRY_SIZE;
  602. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  603. version_entry->c.ops = &wsa883x_codec_info_ops;
  604. if (snd_info_register(version_entry) < 0) {
  605. snd_info_free_entry(version_entry);
  606. snd_info_free_entry(wsa883x->entry);
  607. return -ENOMEM;
  608. }
  609. wsa883x->version_entry = version_entry;
  610. variant_entry = snd_info_create_card_entry(card->snd_card,
  611. "variant",
  612. wsa883x->entry);
  613. if (!variant_entry) {
  614. dev_dbg(component->dev,
  615. "%s: failed to create wsa883x variant entry\n",
  616. __func__);
  617. snd_info_free_entry(version_entry);
  618. snd_info_free_entry(wsa883x->entry);
  619. return -ENOMEM;
  620. }
  621. variant_entry->private_data = wsa883x;
  622. variant_entry->size = WSA883X_VARIANT_ENTRY_SIZE;
  623. variant_entry->content = SNDRV_INFO_CONTENT_DATA;
  624. variant_entry->c.ops = &wsa883x_variant_ops;
  625. if (snd_info_register(variant_entry) < 0) {
  626. snd_info_free_entry(variant_entry);
  627. snd_info_free_entry(version_entry);
  628. snd_info_free_entry(wsa883x->entry);
  629. return -ENOMEM;
  630. }
  631. wsa883x->variant_entry = variant_entry;
  632. return 0;
  633. }
  634. EXPORT_SYMBOL(wsa883x_codec_info_create_codec_entry);
  635. static int wsa883x_get_compander(struct snd_kcontrol *kcontrol,
  636. struct snd_ctl_elem_value *ucontrol)
  637. {
  638. struct snd_soc_component *component =
  639. snd_soc_kcontrol_component(kcontrol);
  640. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  641. ucontrol->value.integer.value[0] = wsa883x->comp_enable;
  642. return 0;
  643. }
  644. static int wsa883x_set_compander(struct snd_kcontrol *kcontrol,
  645. struct snd_ctl_elem_value *ucontrol)
  646. {
  647. struct snd_soc_component *component =
  648. snd_soc_kcontrol_component(kcontrol);
  649. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  650. int value = ucontrol->value.integer.value[0];
  651. dev_dbg(component->dev, "%s: Compander enable current %d, new %d\n",
  652. __func__, wsa883x->comp_enable, value);
  653. wsa883x->comp_enable = value;
  654. return 0;
  655. }
  656. static int wsa883x_get_visense(struct snd_kcontrol *kcontrol,
  657. struct snd_ctl_elem_value *ucontrol)
  658. {
  659. struct snd_soc_component *component =
  660. snd_soc_kcontrol_component(kcontrol);
  661. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  662. ucontrol->value.integer.value[0] = wsa883x->visense_enable;
  663. return 0;
  664. }
  665. static int wsa883x_set_visense(struct snd_kcontrol *kcontrol,
  666. struct snd_ctl_elem_value *ucontrol)
  667. {
  668. struct snd_soc_component *component =
  669. snd_soc_kcontrol_component(kcontrol);
  670. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  671. int value = ucontrol->value.integer.value[0];
  672. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  673. __func__, wsa883x->visense_enable, value);
  674. wsa883x->visense_enable = value;
  675. return 0;
  676. }
  677. static int wsa883x_get_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  678. struct snd_ctl_elem_value *ucontrol)
  679. {
  680. struct snd_soc_component *component =
  681. snd_soc_kcontrol_component(kcontrol);
  682. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  683. ucontrol->value.integer.value[0] = wsa883x->ext_vdd_spk;
  684. return 0;
  685. }
  686. static int wsa883x_put_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  687. struct snd_ctl_elem_value *ucontrol)
  688. {
  689. struct snd_soc_component *component =
  690. snd_soc_kcontrol_component(kcontrol);
  691. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  692. int value = ucontrol->value.integer.value[0];
  693. dev_dbg(component->dev, "%s: Ext VDD SPK enable current %d, new %d\n",
  694. __func__, wsa883x->ext_vdd_spk, value);
  695. wsa883x->ext_vdd_spk = value;
  696. return 0;
  697. }
  698. static const struct snd_kcontrol_new wsa883x_snd_controls[] = {
  699. SOC_ENUM_EXT("WSA PA Gain", wsa_pa_gain_enum,
  700. wsa_pa_gain_get, wsa_pa_gain_put),
  701. SOC_SINGLE_EXT("WSA PA Mute", SND_SOC_NOPM, 0, 1, 0,
  702. wsa883x_get_mute, wsa883x_set_mute),
  703. SOC_SINGLE_EXT("WSA Temp", SND_SOC_NOPM, 0, UINT_MAX, 0,
  704. wsa_get_temp, NULL),
  705. SOC_ENUM_EXT("WSA MODE", wsa_dev_mode_enum,
  706. wsa_dev_mode_get, wsa_dev_mode_put),
  707. SOC_SINGLE_EXT("COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  708. wsa883x_get_compander, wsa883x_set_compander),
  709. SOC_SINGLE_EXT("VISENSE Switch", SND_SOC_NOPM, 0, 1, 0,
  710. wsa883x_get_visense, wsa883x_set_visense),
  711. SOC_SINGLE_EXT("External VDD_SPK", SND_SOC_NOPM, 0, 1, 0,
  712. wsa883x_get_ext_vdd_spk, wsa883x_put_ext_vdd_spk),
  713. };
  714. static const struct snd_kcontrol_new swr_dac_port[] = {
  715. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  716. };
  717. static int wsa883x_set_port(struct snd_soc_component *component, int port_idx,
  718. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  719. u8 *port_type)
  720. {
  721. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  722. *port_id = wsa883x->port[port_idx].port_id;
  723. *num_ch = wsa883x->port[port_idx].num_ch;
  724. *ch_mask = wsa883x->port[port_idx].ch_mask;
  725. *ch_rate = wsa883x->port[port_idx].ch_rate;
  726. *port_type = wsa883x->port[port_idx].port_type;
  727. return 0;
  728. }
  729. static int wsa883x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
  730. struct snd_kcontrol *kcontrol, int event)
  731. {
  732. struct snd_soc_component *component =
  733. snd_soc_dapm_to_component(w->dapm);
  734. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  735. u8 port_id[WSA883X_MAX_SWR_PORTS];
  736. u8 num_ch[WSA883X_MAX_SWR_PORTS];
  737. u8 ch_mask[WSA883X_MAX_SWR_PORTS];
  738. u32 ch_rate[WSA883X_MAX_SWR_PORTS];
  739. u8 port_type[WSA883X_MAX_SWR_PORTS];
  740. u8 num_port = 0;
  741. dev_dbg(component->dev, "%s: event %d name %s\n", __func__,
  742. event, w->name);
  743. if (wsa883x == NULL)
  744. return -EINVAL;
  745. switch (event) {
  746. case SND_SOC_DAPM_PRE_PMU:
  747. wsa883x_set_port(component, SWR_DAC_PORT,
  748. &port_id[num_port], &num_ch[num_port],
  749. &ch_mask[num_port], &ch_rate[num_port],
  750. &port_type[num_port]);
  751. ++num_port;
  752. if (wsa883x->comp_enable) {
  753. wsa883x_set_port(component, SWR_COMP_PORT,
  754. &port_id[num_port], &num_ch[num_port],
  755. &ch_mask[num_port], &ch_rate[num_port],
  756. &port_type[num_port]);
  757. ++num_port;
  758. }
  759. if (wsa883x->visense_enable) {
  760. wsa883x_set_port(component, SWR_VISENSE_PORT,
  761. &port_id[num_port], &num_ch[num_port],
  762. &ch_mask[num_port], &ch_rate[num_port],
  763. &port_type[num_port]);
  764. ++num_port;
  765. }
  766. swr_connect_port(wsa883x->swr_slave, &port_id[0], num_port,
  767. &ch_mask[0], &ch_rate[0], &num_ch[0],
  768. &port_type[0]);
  769. break;
  770. case SND_SOC_DAPM_POST_PMU:
  771. break;
  772. case SND_SOC_DAPM_PRE_PMD:
  773. wsa883x_set_port(component, SWR_DAC_PORT,
  774. &port_id[num_port], &num_ch[num_port],
  775. &ch_mask[num_port], &ch_rate[num_port],
  776. &port_type[num_port]);
  777. ++num_port;
  778. if (wsa883x->comp_enable) {
  779. wsa883x_set_port(component, SWR_COMP_PORT,
  780. &port_id[num_port], &num_ch[num_port],
  781. &ch_mask[num_port], &ch_rate[num_port],
  782. &port_type[num_port]);
  783. ++num_port;
  784. }
  785. if (wsa883x->visense_enable) {
  786. wsa883x_set_port(component, SWR_VISENSE_PORT,
  787. &port_id[num_port], &num_ch[num_port],
  788. &ch_mask[num_port], &ch_rate[num_port],
  789. &port_type[num_port]);
  790. ++num_port;
  791. }
  792. swr_disconnect_port(wsa883x->swr_slave, &port_id[0], num_port,
  793. &ch_mask[0], &port_type[0]);
  794. break;
  795. case SND_SOC_DAPM_POST_PMD:
  796. if (swr_set_device_group(wsa883x->swr_slave, SWR_GROUP_NONE))
  797. dev_err(component->dev,
  798. "%s: set num ch failed\n", __func__);
  799. swr_slvdev_datapath_control(wsa883x->swr_slave,
  800. wsa883x->swr_slave->dev_num,
  801. false);
  802. break;
  803. default:
  804. break;
  805. }
  806. return 0;
  807. }
  808. static int wsa883x_spkr_event(struct snd_soc_dapm_widget *w,
  809. struct snd_kcontrol *kcontrol, int event)
  810. {
  811. struct snd_soc_component *component =
  812. snd_soc_dapm_to_component(w->dapm);
  813. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  814. dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
  815. switch (event) {
  816. case SND_SOC_DAPM_POST_PMU:
  817. swr_slvdev_datapath_control(wsa883x->swr_slave,
  818. wsa883x->swr_slave->dev_num,
  819. true);
  820. wcd_enable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD);
  821. /* Force remove group */
  822. swr_remove_from_group(wsa883x->swr_slave,
  823. wsa883x->swr_slave->dev_num);
  824. snd_soc_component_update_bits(component,
  825. WSA883X_VBAT_ADC_FLT_CTL,
  826. 0x0E, 0x06);
  827. snd_soc_component_update_bits(component,
  828. WSA883X_VBAT_ADC_FLT_CTL,
  829. 0x01, 0x01);
  830. schedule_delayed_work(&wsa883x->vbat_work,
  831. msecs_to_jiffies(wsa883x_vbat_timer_sec * 1000));
  832. set_bit(SPKR_STATUS, &wsa883x->status_mask);
  833. break;
  834. case SND_SOC_DAPM_PRE_PMD:
  835. cancel_delayed_work_sync(&wsa883x->vbat_work);
  836. snd_soc_component_update_bits(component,
  837. WSA883X_VBAT_ADC_FLT_CTL,
  838. 0x01, 0x00);
  839. snd_soc_component_update_bits(component,
  840. WSA883X_VBAT_ADC_FLT_CTL,
  841. 0x0E, 0x00);
  842. snd_soc_component_update_bits(component, WSA883X_PA_FSM_CTL,
  843. 0x01, 0x00);
  844. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD);
  845. clear_bit(SPKR_STATUS, &wsa883x->status_mask);
  846. break;
  847. }
  848. return 0;
  849. }
  850. static const struct snd_soc_dapm_widget wsa883x_dapm_widgets[] = {
  851. SND_SOC_DAPM_INPUT("IN"),
  852. SND_SOC_DAPM_MIXER_E("SWR DAC_Port", SND_SOC_NOPM, 0, 0, swr_dac_port,
  853. ARRAY_SIZE(swr_dac_port), wsa883x_enable_swr_dac_port,
  854. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  855. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  856. SND_SOC_DAPM_SPK("SPKR", wsa883x_spkr_event),
  857. };
  858. static const struct snd_soc_dapm_route wsa883x_audio_map[] = {
  859. {"SWR DAC_Port", "Switch", "IN"},
  860. {"SPKR", NULL, "SWR DAC_Port"},
  861. };
  862. int wsa883x_set_channel_map(struct snd_soc_component *component, u8 *port,
  863. u8 num_port, unsigned int *ch_mask,
  864. unsigned int *ch_rate, u8 *port_type)
  865. {
  866. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  867. int i;
  868. if (!port || !ch_mask || !ch_rate ||
  869. (num_port > WSA883X_MAX_SWR_PORTS)) {
  870. dev_err(component->dev,
  871. "%s: Invalid port=%pK, ch_mask=%pK, ch_rate=%pK\n",
  872. __func__, port, ch_mask, ch_rate);
  873. return -EINVAL;
  874. }
  875. for (i = 0; i < num_port; i++) {
  876. wsa883x->port[i].port_id = port[i];
  877. wsa883x->port[i].ch_mask = ch_mask[i];
  878. wsa883x->port[i].ch_rate = ch_rate[i];
  879. wsa883x->port[i].num_ch = __sw_hweight8(ch_mask[i]);
  880. if (port_type)
  881. wsa883x->port[i].port_type = port_type[i];
  882. }
  883. return 0;
  884. }
  885. EXPORT_SYMBOL(wsa883x_set_channel_map);
  886. static void wsa883x_codec_init(struct snd_soc_component *component)
  887. {
  888. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  889. int i;
  890. if (!wsa883x)
  891. return;
  892. for (i = 0; i < ARRAY_SIZE(reg_init); i++)
  893. snd_soc_component_update_bits(component, reg_init[i].reg,
  894. reg_init[i].mask, reg_init[i].val);
  895. }
  896. static int32_t wsa883x_temp_reg_read(struct snd_soc_component *component,
  897. struct wsa_temp_register *wsa_temp_reg)
  898. {
  899. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  900. if (!wsa883x) {
  901. dev_err(component->dev, "%s: wsa883x is NULL\n", __func__);
  902. return -EINVAL;
  903. }
  904. mutex_lock(&wsa883x->res_lock);
  905. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  906. 0x01, 0x01);
  907. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  908. 0x04, 0x04);
  909. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  910. 0x02, 0x02);
  911. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  912. 0x80, 0x80);
  913. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  914. 0x20, 0x20);
  915. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  916. 0x40, 0x40);
  917. snd_soc_component_update_bits(component, WSA883X_TADC_VALUE_CTL,
  918. 0x01, 0x00);
  919. wsa_temp_reg->dmeas_msb = snd_soc_component_read32(
  920. component, WSA883X_TEMP_MSB);
  921. wsa_temp_reg->dmeas_lsb = snd_soc_component_read32(
  922. component, WSA883X_TEMP_LSB);
  923. snd_soc_component_update_bits(component, WSA883X_TADC_VALUE_CTL,
  924. 0x01, 0x01);
  925. wsa_temp_reg->d1_msb = snd_soc_component_read32(
  926. component, WSA883X_OTP_REG_1);
  927. wsa_temp_reg->d1_lsb = snd_soc_component_read32(
  928. component, WSA883X_OTP_REG_2);
  929. wsa_temp_reg->d2_msb = snd_soc_component_read32(
  930. component, WSA883X_OTP_REG_3);
  931. wsa_temp_reg->d2_lsb = snd_soc_component_read32(
  932. component, WSA883X_OTP_REG_4);
  933. snd_soc_component_update_bits(component, WSA883X_PA_FSM_BYP,
  934. 0xE7, 0x00);
  935. mutex_unlock(&wsa883x->res_lock);
  936. return 0;
  937. }
  938. static int wsa883x_get_temperature(struct snd_soc_component *component,
  939. int *temp)
  940. {
  941. struct wsa_temp_register reg;
  942. int dmeas, d1, d2;
  943. int ret = 0;
  944. int temp_val = 0;
  945. int t1 = T1_TEMP;
  946. int t2 = T2_TEMP;
  947. u8 retry = WSA883X_TEMP_RETRY;
  948. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  949. if (!wsa883x)
  950. return -EINVAL;
  951. do {
  952. ret = wsa883x_temp_reg_read(component, &reg);
  953. if (ret) {
  954. pr_err("%s: temp read failed: %d, current temp: %d\n",
  955. __func__, ret, wsa883x->curr_temp);
  956. if (temp)
  957. *temp = wsa883x->curr_temp;
  958. return 0;
  959. }
  960. /*
  961. * Temperature register values are expected to be in the
  962. * following range.
  963. * d1_msb = 68 - 92 and d1_lsb = 0, 64, 128, 192
  964. * d2_msb = 185 -218 and d2_lsb = 0, 64, 128, 192
  965. */
  966. if ((reg.d1_msb < 68 || reg.d1_msb > 92) ||
  967. (!(reg.d1_lsb == 0 || reg.d1_lsb == 64 || reg.d1_lsb == 128 ||
  968. reg.d1_lsb == 192)) ||
  969. (reg.d2_msb < 185 || reg.d2_msb > 218) ||
  970. (!(reg.d2_lsb == 0 || reg.d2_lsb == 64 || reg.d2_lsb == 128 ||
  971. reg.d2_lsb == 192))) {
  972. printk_ratelimited("%s: Temperature registers[%d %d %d %d] are out of range\n",
  973. __func__, reg.d1_msb, reg.d1_lsb, reg.d2_msb,
  974. reg.d2_lsb);
  975. }
  976. dmeas = ((reg.dmeas_msb << 0x8) | reg.dmeas_lsb) >> 0x6;
  977. d1 = ((reg.d1_msb << 0x8) | reg.d1_lsb) >> 0x6;
  978. d2 = ((reg.d2_msb << 0x8) | reg.d2_lsb) >> 0x6;
  979. if (d1 == d2)
  980. temp_val = TEMP_INVALID;
  981. else
  982. temp_val = t1 + (((dmeas - d1) * (t2 - t1))/(d2 - d1));
  983. if (temp_val <= LOW_TEMP_THRESHOLD ||
  984. temp_val >= HIGH_TEMP_THRESHOLD) {
  985. pr_debug("%s: T0: %d is out of range[%d, %d]\n", __func__,
  986. temp_val, LOW_TEMP_THRESHOLD, HIGH_TEMP_THRESHOLD);
  987. if (retry--)
  988. msleep(10);
  989. } else {
  990. break;
  991. }
  992. } while (retry);
  993. wsa883x->curr_temp = temp_val;
  994. if (temp)
  995. *temp = temp_val;
  996. pr_debug("%s: t0 measured: %d dmeas = %d, d1 = %d, d2 = %d\n",
  997. __func__, temp_val, dmeas, d1, d2);
  998. return ret;
  999. }
  1000. static void wsa883x_vbat_monitor_work(struct work_struct *work)
  1001. {
  1002. struct wsa883x_priv *wsa883x;
  1003. struct delayed_work *dwork;
  1004. struct snd_soc_component *component;
  1005. u16 val = 0, vbat_code = 0;
  1006. int vbat_val = 0;
  1007. dwork = to_delayed_work(work);
  1008. wsa883x = container_of(dwork, struct wsa883x_priv, vbat_work);
  1009. component = wsa883x->component;
  1010. val = snd_soc_component_read32(component, WSA883X_VBAT_DIN_MSB);
  1011. vbat_code = (val << 2);
  1012. val = (snd_soc_component_read32(component, WSA883X_VBAT_DIN_LSB)
  1013. & 0xC0);
  1014. vbat_code |= (val >> 6);
  1015. vbat_val = ((vbat_code * 5) / 1023);
  1016. dev_dbg(component->dev, "%s: instant vbat code = %d val = %d\n",
  1017. __func__, vbat_code, vbat_val);
  1018. val = snd_soc_component_read32(component, WSA883X_VBAT_DOUT);
  1019. vbat_val = ((val * 5) / 255);
  1020. dev_dbg(component->dev, "%s: low pass vbat code = %d val = %d\n",
  1021. __func__, val, vbat_val);
  1022. schedule_delayed_work(&wsa883x->vbat_work,
  1023. msecs_to_jiffies(wsa883x_vbat_timer_sec * 1000));
  1024. }
  1025. static int wsa883x_codec_probe(struct snd_soc_component *component)
  1026. {
  1027. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1028. struct swr_device *dev;
  1029. int variant = 0, version = 0;
  1030. if (!wsa883x)
  1031. return -EINVAL;
  1032. snd_soc_component_init_regmap(component, wsa883x->regmap);
  1033. dev = wsa883x->swr_slave;
  1034. wsa883x->component = component;
  1035. variant = (snd_soc_component_read32(component, WSA883X_OTP_REG_0)
  1036. & 0x0F);
  1037. wsa883x->variant = variant;
  1038. version = (snd_soc_component_read32(component, WSA883X_CHIP_ID0)
  1039. & 0xFF);
  1040. wsa883x->version = version;
  1041. wsa883x_codec_init(component);
  1042. wsa883x->global_pa_cnt = 0;
  1043. INIT_DELAYED_WORK(&wsa883x->vbat_work, wsa883x_vbat_monitor_work);
  1044. return 0;
  1045. }
  1046. static void wsa883x_codec_remove(struct snd_soc_component *component)
  1047. {
  1048. struct wsa883x_priv *wsa883x = snd_soc_component_get_drvdata(component);
  1049. if (!wsa883x)
  1050. return;
  1051. snd_soc_component_exit_regmap(component);
  1052. return;
  1053. }
  1054. static const struct snd_soc_component_driver soc_codec_dev_wsa883x = {
  1055. .name = DRV_NAME,
  1056. .probe = wsa883x_codec_probe,
  1057. .remove = wsa883x_codec_remove,
  1058. .controls = wsa883x_snd_controls,
  1059. .num_controls = ARRAY_SIZE(wsa883x_snd_controls),
  1060. .dapm_widgets = wsa883x_dapm_widgets,
  1061. .num_dapm_widgets = ARRAY_SIZE(wsa883x_dapm_widgets),
  1062. .dapm_routes = wsa883x_audio_map,
  1063. .num_dapm_routes = ARRAY_SIZE(wsa883x_audio_map),
  1064. };
  1065. static int wsa883x_gpio_ctrl(struct wsa883x_priv *wsa883x, bool enable)
  1066. {
  1067. int ret = 0;
  1068. if (enable)
  1069. ret = msm_cdc_pinctrl_select_active_state(
  1070. wsa883x->wsa_rst_np);
  1071. else
  1072. ret = msm_cdc_pinctrl_select_sleep_state(
  1073. wsa883x->wsa_rst_np);
  1074. if (ret != 0)
  1075. dev_err(wsa883x->dev,
  1076. "%s: Failed to turn state %d; ret=%d\n",
  1077. __func__, enable, ret);
  1078. return ret;
  1079. }
  1080. static int wsa883x_event_notify(struct notifier_block *nb,
  1081. unsigned long val, void *ptr)
  1082. {
  1083. u16 event = (val & 0xffff);
  1084. struct wsa883x_priv *wsa883x = container_of(nb, struct wsa883x_priv,
  1085. parent_nblock);
  1086. if (!wsa883x)
  1087. return -EINVAL;
  1088. switch (event) {
  1089. case BOLERO_WSA_EVT_PA_OFF_PRE_SSR:
  1090. if (delayed_work_pending(&wsa883x->vbat_work))
  1091. cancel_delayed_work_sync(&wsa883x->vbat_work);
  1092. snd_soc_component_update_bits(wsa883x->component,
  1093. WSA883X_PA_FSM_CTL,
  1094. 0x01, 0x00);
  1095. break;
  1096. case BOLERO_WSA_EVT_PA_ON_POST_FSCLK:
  1097. if (test_bit(SPKR_STATUS, &wsa883x->status_mask))
  1098. snd_soc_component_update_bits(wsa883x->component,
  1099. WSA883X_PA_FSM_CTL,
  1100. 0x01, 0x01);
  1101. break;
  1102. default:
  1103. dev_dbg(wsa883x->dev, "%s: unknown event %d\n",
  1104. __func__, event);
  1105. break;
  1106. }
  1107. return 0;
  1108. }
  1109. static int wsa883x_enable_supplies(struct device * dev,
  1110. struct wsa883x_priv *priv)
  1111. {
  1112. int ret = 0;
  1113. /* Parse power supplies */
  1114. msm_cdc_get_power_supplies(dev, &priv->regulator,
  1115. &priv->num_supplies);
  1116. if (!priv->regulator || (priv->num_supplies <= 0)) {
  1117. dev_err(dev, "%s: no power supplies defined\n", __func__);
  1118. return -EINVAL;
  1119. }
  1120. ret = msm_cdc_init_supplies(dev, &priv->supplies,
  1121. priv->regulator, priv->num_supplies);
  1122. if (!priv->supplies) {
  1123. dev_err(dev, "%s: Cannot init wsa supplies\n",
  1124. __func__);
  1125. return ret;
  1126. }
  1127. ret = msm_cdc_enable_static_supplies(dev, priv->supplies,
  1128. priv->regulator,
  1129. priv->num_supplies);
  1130. if (ret)
  1131. dev_err(dev, "%s: wsa static supply enable failed!\n",
  1132. __func__);
  1133. return ret;
  1134. }
  1135. static int wsa883x_swr_probe(struct swr_device *pdev)
  1136. {
  1137. int ret = 0, i = 0;
  1138. struct wsa883x_priv *wsa883x;
  1139. u8 devnum = 0;
  1140. bool pin_state_current = false;
  1141. struct wsa_ctrl_platform_data *plat_data = NULL;
  1142. wsa883x = devm_kzalloc(&pdev->dev, sizeof(struct wsa883x_priv),
  1143. GFP_KERNEL);
  1144. if (!wsa883x)
  1145. return -ENOMEM;
  1146. ret = wsa883x_enable_supplies(&pdev->dev, wsa883x);
  1147. if (ret)
  1148. return -EINVAL;
  1149. wsa883x->wsa_rst_np = of_parse_phandle(pdev->dev.of_node,
  1150. "qcom,spkr-sd-n-node", 0);
  1151. if (!wsa883x->wsa_rst_np) {
  1152. dev_dbg(&pdev->dev, "%s: pinctrl not defined\n", __func__);
  1153. goto err;
  1154. }
  1155. swr_set_dev_data(pdev, wsa883x);
  1156. wsa883x->swr_slave = pdev;
  1157. pin_state_current = msm_cdc_pinctrl_get_state(wsa883x->wsa_rst_np);
  1158. wsa883x_gpio_ctrl(wsa883x, true);
  1159. /*
  1160. * Add 5msec delay to provide sufficient time for
  1161. * soundwire auto enumeration of slave devices as
  1162. * as per HW requirement.
  1163. */
  1164. usleep_range(5000, 5010);
  1165. ret = swr_get_logical_dev_num(pdev, pdev->addr, &devnum);
  1166. if (ret) {
  1167. dev_dbg(&pdev->dev,
  1168. "%s get devnum %d for dev addr %lx failed\n",
  1169. __func__, devnum, pdev->addr);
  1170. goto dev_err;
  1171. }
  1172. pdev->dev_num = devnum;
  1173. wsa883x->regmap = devm_regmap_init_swr(pdev,
  1174. &wsa883x_regmap_config);
  1175. if (IS_ERR(wsa883x->regmap)) {
  1176. ret = PTR_ERR(wsa883x->regmap);
  1177. dev_err(&pdev->dev, "%s: regmap_init failed %d\n",
  1178. __func__, ret);
  1179. goto dev_err;
  1180. }
  1181. /* Set all interrupts as edge triggered */
  1182. for (i = 0; i < wsa883x_regmap_irq_chip.num_regs; i++)
  1183. regmap_write(wsa883x->regmap, (WSA883X_INTR_LEVEL0 + i), 0);
  1184. wsa883x_regmap_irq_chip.irq_drv_data = wsa883x;
  1185. wsa883x->irq_info.wcd_regmap_irq_chip = &wsa883x_regmap_irq_chip;
  1186. wsa883x->irq_info.codec_name = "WSA883X";
  1187. wsa883x->irq_info.regmap = wsa883x->regmap;
  1188. wsa883x->irq_info.dev = &pdev->dev;
  1189. ret = wcd_irq_init(&wsa883x->irq_info, &wsa883x->virq);
  1190. if (ret) {
  1191. dev_err(wsa883x->dev, "%s: IRQ init failed: %d\n",
  1192. __func__, ret);
  1193. goto dev_err;
  1194. }
  1195. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR,
  1196. "WSA SAF2WAR", wsa883x_saf2war_handle_irq, NULL);
  1197. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF,
  1198. "WSA WAR2SAF", wsa883x_war2saf_handle_irq, NULL);
  1199. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE,
  1200. "WSA OTP", wsa883x_otp_handle_irq, NULL);
  1201. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP,
  1202. "WSA OCP", wsa883x_ocp_handle_irq, NULL);
  1203. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP);
  1204. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP,
  1205. "WSA CLIP", wsa883x_clip_handle_irq, NULL);
  1206. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP);
  1207. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD,
  1208. "WSA PDM WD", wsa883x_pdm_wd_handle_irq, NULL);
  1209. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD);
  1210. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD,
  1211. "WSA CLK WD", wsa883x_clk_wd_handle_irq, NULL);
  1212. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD);
  1213. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN,
  1214. "WSA EXT INT", wsa883x_ext_int_handle_irq, NULL);
  1215. /* Under Voltage Lock out (UVLO) interrupt handle */
  1216. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO,
  1217. "WSA UVLO", wsa883x_uvlo_handle_irq, NULL);
  1218. wcd_request_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR,
  1219. "WSA PA ERR", wsa883x_pa_on_err_handle_irq, NULL);
  1220. wcd_disable_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR);
  1221. ret = snd_soc_register_component(&pdev->dev, &soc_codec_dev_wsa883x,
  1222. NULL, 0);
  1223. if (ret) {
  1224. dev_err(&pdev->dev, "%s: Codec registration failed\n",
  1225. __func__);
  1226. goto err_irq;
  1227. }
  1228. wsa883x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1229. "qcom,bolero-handle", 0);
  1230. if (wsa883x->parent_np) {
  1231. wsa883x->parent_dev =
  1232. of_find_device_by_node(wsa883x->parent_np);
  1233. if (wsa883x->parent_dev) {
  1234. plat_data = dev_get_platdata(&wsa883x->parent_dev->dev);
  1235. if (plat_data) {
  1236. wsa883x->parent_nblock.notifier_call =
  1237. wsa883x_event_notify;
  1238. if (plat_data->register_notifier)
  1239. plat_data->register_notifier(
  1240. plat_data->handle,
  1241. &wsa883x->parent_nblock,
  1242. true);
  1243. wsa883x->register_notifier =
  1244. plat_data->register_notifier;
  1245. wsa883x->handle = plat_data->handle;
  1246. } else {
  1247. dev_err(&pdev->dev, "%s: plat data not found\n",
  1248. __func__);
  1249. }
  1250. } else {
  1251. dev_err(&pdev->dev, "%s: parent dev not found\n",
  1252. __func__);
  1253. }
  1254. } else {
  1255. dev_info(&pdev->dev, "%s: parent node not found\n", __func__);
  1256. }
  1257. mutex_init(&wsa883x->res_lock);
  1258. #ifdef CONFIG_DEBUG_FS
  1259. if (!wsa883x->debugfs_dent) {
  1260. wsa883x->debugfs_dent = debugfs_create_dir(
  1261. dev_name(&pdev->dev), 0);
  1262. if (!IS_ERR(wsa883x->debugfs_dent)) {
  1263. wsa883x->debugfs_peek =
  1264. debugfs_create_file("swrslave_peek",
  1265. S_IFREG | 0444,
  1266. wsa883x->debugfs_dent,
  1267. (void *) pdev,
  1268. &codec_debug_read_ops);
  1269. wsa883x->debugfs_poke =
  1270. debugfs_create_file("swrslave_poke",
  1271. S_IFREG | 0444,
  1272. wsa883x->debugfs_dent,
  1273. (void *) pdev,
  1274. &codec_debug_write_ops);
  1275. wsa883x->debugfs_reg_dump =
  1276. debugfs_create_file(
  1277. "swrslave_reg_dump",
  1278. S_IFREG | 0444,
  1279. wsa883x->debugfs_dent,
  1280. (void *) pdev,
  1281. &codec_debug_dump_ops);
  1282. }
  1283. }
  1284. #endif
  1285. return 0;
  1286. err_irq:
  1287. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR, NULL);
  1288. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF, NULL);
  1289. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE, NULL);
  1290. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP, NULL);
  1291. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP, NULL);
  1292. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD, NULL);
  1293. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD, NULL);
  1294. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN, NULL);
  1295. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO, NULL);
  1296. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR, NULL);
  1297. wcd_irq_exit(&wsa883x->irq_info, wsa883x->virq);
  1298. dev_err:
  1299. if (pin_state_current == false)
  1300. wsa883x_gpio_ctrl(wsa883x, false);
  1301. swr_remove_device(pdev);
  1302. err:
  1303. return ret;
  1304. }
  1305. static int wsa883x_swr_remove(struct swr_device *pdev)
  1306. {
  1307. struct wsa883x_priv *wsa883x;
  1308. wsa883x = swr_get_dev_data(pdev);
  1309. if (!wsa883x) {
  1310. dev_err(&pdev->dev, "%s: wsa883x is NULL\n", __func__);
  1311. return -EINVAL;
  1312. }
  1313. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_SAF2WAR, NULL);
  1314. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_WAR2SAF, NULL);
  1315. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_DISABLE, NULL);
  1316. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_OCP, NULL);
  1317. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLIP, NULL);
  1318. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PDM_WD, NULL);
  1319. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_CLK_WD, NULL);
  1320. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_INTR_PIN, NULL);
  1321. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_UVLO, NULL);
  1322. wcd_free_irq(&wsa883x->irq_info, WSA883X_IRQ_INT_PA_ON_ERR, NULL);
  1323. if (wsa883x->register_notifier)
  1324. wsa883x->register_notifier(wsa883x->handle,
  1325. &wsa883x->parent_nblock, false);
  1326. #ifdef CONFIG_DEBUG_FS
  1327. debugfs_remove_recursive(wsa883x->debugfs_dent);
  1328. wsa883x->debugfs_dent = NULL;
  1329. #endif
  1330. mutex_destroy(&wsa883x->res_lock);
  1331. snd_soc_unregister_component(&pdev->dev);
  1332. swr_set_dev_data(pdev, NULL);
  1333. return 0;
  1334. }
  1335. #ifdef CONFIG_PM_SLEEP
  1336. static int wsa883x_swr_suspend(struct device *dev)
  1337. {
  1338. dev_dbg(dev, "%s: system suspend\n", __func__);
  1339. return 0;
  1340. }
  1341. static int wsa883x_swr_resume(struct device *dev)
  1342. {
  1343. struct wsa883x_priv *wsa883x = swr_get_dev_data(to_swr_device(dev));
  1344. if (!wsa883x) {
  1345. dev_err(dev, "%s: wsa883x private data is NULL\n", __func__);
  1346. return -EINVAL;
  1347. }
  1348. dev_dbg(dev, "%s: system resume\n", __func__);
  1349. return 0;
  1350. }
  1351. #endif /* CONFIG_PM_SLEEP */
  1352. static const struct dev_pm_ops wsa883x_swr_pm_ops = {
  1353. SET_SYSTEM_SLEEP_PM_OPS(wsa883x_swr_suspend, wsa883x_swr_resume)
  1354. };
  1355. static const struct swr_device_id wsa883x_swr_id[] = {
  1356. {"wsa883x", 0},
  1357. {}
  1358. };
  1359. static const struct of_device_id wsa883x_swr_dt_match[] = {
  1360. {
  1361. .compatible = "qcom,wsa883x",
  1362. },
  1363. {}
  1364. };
  1365. static struct swr_driver wsa883x_swr_driver = {
  1366. .driver = {
  1367. .name = "wsa883x",
  1368. .owner = THIS_MODULE,
  1369. .pm = &wsa883x_swr_pm_ops,
  1370. .of_match_table = wsa883x_swr_dt_match,
  1371. },
  1372. .probe = wsa883x_swr_probe,
  1373. .remove = wsa883x_swr_remove,
  1374. .id_table = wsa883x_swr_id,
  1375. };
  1376. static int __init wsa883x_swr_init(void)
  1377. {
  1378. return swr_driver_register(&wsa883x_swr_driver);
  1379. }
  1380. static void __exit wsa883x_swr_exit(void)
  1381. {
  1382. swr_driver_unregister(&wsa883x_swr_driver);
  1383. }
  1384. module_init(wsa883x_swr_init);
  1385. module_exit(wsa883x_swr_exit);
  1386. MODULE_DESCRIPTION("WSA883x codec driver");
  1387. MODULE_LICENSE("GPL v2");