dsi_panel.c 108 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define MIN_PREFILL_LINES 35
  31. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  32. {
  33. char *bp;
  34. bp = buf;
  35. /* First 7 bytes are cmd header */
  36. *bp++ = 0x0A;
  37. *bp++ = 1;
  38. *bp++ = 0;
  39. *bp++ = 0;
  40. *bp++ = pps_delay_ms;
  41. *bp++ = 0;
  42. *bp++ = 128;
  43. }
  44. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  45. char *buf, int pps_id, u32 size)
  46. {
  47. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  48. buf += DSI_CMD_PPS_HDR_SIZE;
  49. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  50. size);
  51. }
  52. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  53. char *buf, int pps_id, u32 size)
  54. {
  55. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  56. buf += DSI_CMD_PPS_HDR_SIZE;
  57. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  58. size);
  59. }
  60. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  61. {
  62. int rc = 0;
  63. int i;
  64. struct regulator *vreg = NULL;
  65. for (i = 0; i < panel->power_info.count; i++) {
  66. vreg = devm_regulator_get(panel->parent,
  67. panel->power_info.vregs[i].vreg_name);
  68. rc = PTR_RET(vreg);
  69. if (rc) {
  70. DSI_ERR("failed to get %s regulator\n",
  71. panel->power_info.vregs[i].vreg_name);
  72. goto error_put;
  73. }
  74. panel->power_info.vregs[i].vreg = vreg;
  75. }
  76. return rc;
  77. error_put:
  78. for (i = i - 1; i >= 0; i--) {
  79. devm_regulator_put(panel->power_info.vregs[i].vreg);
  80. panel->power_info.vregs[i].vreg = NULL;
  81. }
  82. return rc;
  83. }
  84. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  85. {
  86. int rc = 0;
  87. int i;
  88. for (i = panel->power_info.count - 1; i >= 0; i--)
  89. devm_regulator_put(panel->power_info.vregs[i].vreg);
  90. return rc;
  91. }
  92. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  93. {
  94. int rc = 0;
  95. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  96. if (gpio_is_valid(r_config->reset_gpio)) {
  97. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  98. if (rc) {
  99. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  100. goto error;
  101. }
  102. }
  103. if (gpio_is_valid(r_config->disp_en_gpio)) {
  104. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  105. if (rc) {
  106. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  107. goto error_release_reset;
  108. }
  109. }
  110. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  111. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  112. if (rc) {
  113. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  114. goto error_release_disp_en;
  115. }
  116. }
  117. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  118. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  119. if (rc) {
  120. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  121. goto error_release_mode_sel;
  122. }
  123. }
  124. if (gpio_is_valid(panel->panel_test_gpio)) {
  125. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  126. if (rc) {
  127. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  128. rc);
  129. panel->panel_test_gpio = -1;
  130. rc = 0;
  131. }
  132. }
  133. goto error;
  134. error_release_mode_sel:
  135. if (gpio_is_valid(panel->bl_config.en_gpio))
  136. gpio_free(panel->bl_config.en_gpio);
  137. error_release_disp_en:
  138. if (gpio_is_valid(r_config->disp_en_gpio))
  139. gpio_free(r_config->disp_en_gpio);
  140. error_release_reset:
  141. if (gpio_is_valid(r_config->reset_gpio))
  142. gpio_free(r_config->reset_gpio);
  143. error:
  144. return rc;
  145. }
  146. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  147. {
  148. int rc = 0;
  149. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  150. if (gpio_is_valid(r_config->reset_gpio))
  151. gpio_free(r_config->reset_gpio);
  152. if (gpio_is_valid(r_config->disp_en_gpio))
  153. gpio_free(r_config->disp_en_gpio);
  154. if (gpio_is_valid(panel->bl_config.en_gpio))
  155. gpio_free(panel->bl_config.en_gpio);
  156. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  157. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  158. if (gpio_is_valid(panel->panel_test_gpio))
  159. gpio_free(panel->panel_test_gpio);
  160. return rc;
  161. }
  162. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  163. {
  164. struct dsi_panel_reset_config *r_config;
  165. if (!panel) {
  166. DSI_ERR("Invalid panel param\n");
  167. return -EINVAL;
  168. }
  169. r_config = &panel->reset_config;
  170. if (!r_config) {
  171. DSI_ERR("Invalid panel reset configuration\n");
  172. return -EINVAL;
  173. }
  174. if (gpio_is_valid(r_config->reset_gpio)) {
  175. gpio_set_value(r_config->reset_gpio, 0);
  176. DSI_INFO("GPIO pulled low to simulate ESD\n");
  177. return 0;
  178. }
  179. DSI_ERR("failed to pull down gpio\n");
  180. return -EINVAL;
  181. }
  182. static int dsi_panel_reset(struct dsi_panel *panel)
  183. {
  184. int rc = 0;
  185. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  186. int i;
  187. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  188. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  189. if (rc) {
  190. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  191. goto exit;
  192. }
  193. }
  194. if (r_config->count) {
  195. rc = gpio_direction_output(r_config->reset_gpio,
  196. r_config->sequence[0].level);
  197. if (rc) {
  198. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  199. goto exit;
  200. }
  201. }
  202. for (i = 0; i < r_config->count; i++) {
  203. gpio_set_value(r_config->reset_gpio,
  204. r_config->sequence[i].level);
  205. if (r_config->sequence[i].sleep_ms)
  206. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  207. (r_config->sequence[i].sleep_ms * 1000) + 100);
  208. }
  209. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  210. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  211. if (rc)
  212. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  213. }
  214. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  215. bool out = true;
  216. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  217. || (panel->reset_config.mode_sel_state
  218. == MODE_GPIO_LOW))
  219. out = false;
  220. else if ((panel->reset_config.mode_sel_state
  221. == MODE_SEL_SINGLE_PORT) ||
  222. (panel->reset_config.mode_sel_state
  223. == MODE_GPIO_HIGH))
  224. out = true;
  225. rc = gpio_direction_output(
  226. panel->reset_config.lcd_mode_sel_gpio, out);
  227. if (rc)
  228. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  229. }
  230. if (gpio_is_valid(panel->panel_test_gpio)) {
  231. rc = gpio_direction_input(panel->panel_test_gpio);
  232. if (rc)
  233. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  234. rc);
  235. }
  236. exit:
  237. return rc;
  238. }
  239. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  240. {
  241. int rc = 0;
  242. struct pinctrl_state *state;
  243. if (panel->host_config.ext_bridge_mode)
  244. return 0;
  245. if (enable)
  246. state = panel->pinctrl.active;
  247. else
  248. state = panel->pinctrl.suspend;
  249. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  250. if (rc)
  251. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  252. panel->name, rc);
  253. return rc;
  254. }
  255. static int dsi_panel_power_on(struct dsi_panel *panel)
  256. {
  257. int rc = 0;
  258. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  259. if (rc) {
  260. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  261. panel->name, rc);
  262. goto exit;
  263. }
  264. rc = dsi_panel_set_pinctrl_state(panel, true);
  265. if (rc) {
  266. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  267. goto error_disable_vregs;
  268. }
  269. rc = dsi_panel_reset(panel);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  272. goto error_disable_gpio;
  273. }
  274. goto exit;
  275. error_disable_gpio:
  276. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  277. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  278. if (gpio_is_valid(panel->bl_config.en_gpio))
  279. gpio_set_value(panel->bl_config.en_gpio, 0);
  280. (void)dsi_panel_set_pinctrl_state(panel, false);
  281. error_disable_vregs:
  282. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  283. exit:
  284. return rc;
  285. }
  286. static int dsi_panel_power_off(struct dsi_panel *panel)
  287. {
  288. int rc = 0;
  289. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  290. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  291. if (gpio_is_valid(panel->reset_config.reset_gpio))
  292. gpio_set_value(panel->reset_config.reset_gpio, 0);
  293. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  294. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  295. if (gpio_is_valid(panel->panel_test_gpio)) {
  296. rc = gpio_direction_input(panel->panel_test_gpio);
  297. if (rc)
  298. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  299. rc);
  300. }
  301. rc = dsi_panel_set_pinctrl_state(panel, false);
  302. if (rc) {
  303. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  304. rc);
  305. }
  306. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  307. if (rc)
  308. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  309. panel->name, rc);
  310. return rc;
  311. }
  312. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  313. enum dsi_cmd_set_type type)
  314. {
  315. int rc = 0, i = 0;
  316. ssize_t len;
  317. struct dsi_cmd_desc *cmds;
  318. u32 count;
  319. enum dsi_cmd_set_state state;
  320. struct dsi_display_mode *mode;
  321. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  322. if (!panel || !panel->cur_mode)
  323. return -EINVAL;
  324. mode = panel->cur_mode;
  325. cmds = mode->priv_info->cmd_sets[type].cmds;
  326. count = mode->priv_info->cmd_sets[type].count;
  327. state = mode->priv_info->cmd_sets[type].state;
  328. if (count == 0) {
  329. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  330. panel->name, type);
  331. goto error;
  332. }
  333. for (i = 0; i < count; i++) {
  334. if (state == DSI_CMD_SET_STATE_LP)
  335. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  336. if (cmds->last_command)
  337. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  338. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  339. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  340. len = ops->transfer(panel->host, &cmds->msg);
  341. if (len < 0) {
  342. rc = len;
  343. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  344. goto error;
  345. }
  346. if (cmds->post_wait_ms)
  347. usleep_range(cmds->post_wait_ms*1000,
  348. ((cmds->post_wait_ms*1000)+10));
  349. cmds++;
  350. }
  351. error:
  352. return rc;
  353. }
  354. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  355. {
  356. int rc = 0;
  357. if (panel->host_config.ext_bridge_mode)
  358. return 0;
  359. devm_pinctrl_put(panel->pinctrl.pinctrl);
  360. return rc;
  361. }
  362. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  363. {
  364. int rc = 0;
  365. if (panel->host_config.ext_bridge_mode)
  366. return 0;
  367. /* TODO: pinctrl is defined in dsi dt node */
  368. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  369. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  370. rc = PTR_ERR(panel->pinctrl.pinctrl);
  371. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  372. goto error;
  373. }
  374. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  375. "panel_active");
  376. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  377. rc = PTR_ERR(panel->pinctrl.active);
  378. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  379. goto error;
  380. }
  381. panel->pinctrl.suspend =
  382. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  383. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  384. rc = PTR_ERR(panel->pinctrl.suspend);
  385. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  386. goto error;
  387. }
  388. error:
  389. return rc;
  390. }
  391. static int dsi_panel_wled_register(struct dsi_panel *panel,
  392. struct dsi_backlight_config *bl)
  393. {
  394. struct backlight_device *bd;
  395. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  396. if (!bd) {
  397. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  398. panel->name, -EPROBE_DEFER);
  399. return -EPROBE_DEFER;
  400. }
  401. bl->raw_bd = bd;
  402. return 0;
  403. }
  404. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  405. u32 bl_lvl)
  406. {
  407. int rc = 0;
  408. struct mipi_dsi_device *dsi;
  409. if (!panel || (bl_lvl > 0xffff)) {
  410. DSI_ERR("invalid params\n");
  411. return -EINVAL;
  412. }
  413. dsi = &panel->mipi_device;
  414. if (panel->bl_config.bl_inverted_dbv)
  415. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  416. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  417. if (rc < 0)
  418. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  419. return rc;
  420. }
  421. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  422. u32 bl_lvl)
  423. {
  424. int rc = 0;
  425. u32 duty = 0;
  426. u32 period_ns = 0;
  427. struct dsi_backlight_config *bl;
  428. if (!panel) {
  429. DSI_ERR("Invalid Params\n");
  430. return -EINVAL;
  431. }
  432. bl = &panel->bl_config;
  433. if (!bl->pwm_bl) {
  434. DSI_ERR("pwm device not found\n");
  435. return -EINVAL;
  436. }
  437. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  438. duty = bl_lvl * period_ns;
  439. duty /= bl->bl_max_level;
  440. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  441. if (rc) {
  442. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  443. rc);
  444. goto error;
  445. }
  446. if (bl_lvl == 0 && bl->pwm_enabled) {
  447. pwm_disable(bl->pwm_bl);
  448. bl->pwm_enabled = false;
  449. return 0;
  450. }
  451. if (!bl->pwm_enabled) {
  452. rc = pwm_enable(bl->pwm_bl);
  453. if (rc) {
  454. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  455. rc);
  456. goto error;
  457. }
  458. bl->pwm_enabled = true;
  459. }
  460. error:
  461. return rc;
  462. }
  463. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  464. {
  465. int rc = 0;
  466. struct dsi_backlight_config *bl = &panel->bl_config;
  467. if (panel->host_config.ext_bridge_mode)
  468. return 0;
  469. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  470. switch (bl->type) {
  471. case DSI_BACKLIGHT_WLED:
  472. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  473. break;
  474. case DSI_BACKLIGHT_DCS:
  475. rc = dsi_panel_update_backlight(panel, bl_lvl);
  476. break;
  477. case DSI_BACKLIGHT_EXTERNAL:
  478. break;
  479. case DSI_BACKLIGHT_PWM:
  480. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  481. break;
  482. default:
  483. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  484. rc = -ENOTSUPP;
  485. }
  486. return rc;
  487. }
  488. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  489. {
  490. u32 cur_bl_level;
  491. struct backlight_device *bd = bl->raw_bd;
  492. /* default the brightness level to 50% */
  493. cur_bl_level = bl->bl_max_level >> 1;
  494. switch (bl->type) {
  495. case DSI_BACKLIGHT_WLED:
  496. /* Try to query the backlight level from the backlight device */
  497. if (bd->ops && bd->ops->get_brightness)
  498. cur_bl_level = bd->ops->get_brightness(bd);
  499. break;
  500. case DSI_BACKLIGHT_DCS:
  501. case DSI_BACKLIGHT_EXTERNAL:
  502. case DSI_BACKLIGHT_PWM:
  503. default:
  504. /*
  505. * Ideally, we should read the backlight level from the
  506. * panel. For now, just set it default value.
  507. */
  508. break;
  509. }
  510. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  511. return cur_bl_level;
  512. }
  513. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  514. {
  515. struct dsi_backlight_config *bl = &panel->bl_config;
  516. bl->bl_level = dsi_panel_get_brightness(bl);
  517. }
  518. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  519. {
  520. int rc = 0;
  521. struct dsi_backlight_config *bl = &panel->bl_config;
  522. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  523. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  524. rc = PTR_ERR(bl->pwm_bl);
  525. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  526. rc);
  527. return rc;
  528. }
  529. return 0;
  530. }
  531. static int dsi_panel_bl_register(struct dsi_panel *panel)
  532. {
  533. int rc = 0;
  534. struct dsi_backlight_config *bl = &panel->bl_config;
  535. if (panel->host_config.ext_bridge_mode)
  536. return 0;
  537. switch (bl->type) {
  538. case DSI_BACKLIGHT_WLED:
  539. rc = dsi_panel_wled_register(panel, bl);
  540. break;
  541. case DSI_BACKLIGHT_DCS:
  542. break;
  543. case DSI_BACKLIGHT_EXTERNAL:
  544. break;
  545. case DSI_BACKLIGHT_PWM:
  546. rc = dsi_panel_pwm_register(panel);
  547. break;
  548. default:
  549. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  550. rc = -ENOTSUPP;
  551. goto error;
  552. }
  553. error:
  554. return rc;
  555. }
  556. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  557. {
  558. struct dsi_backlight_config *bl = &panel->bl_config;
  559. devm_pwm_put(panel->parent, bl->pwm_bl);
  560. }
  561. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  562. {
  563. int rc = 0;
  564. struct dsi_backlight_config *bl = &panel->bl_config;
  565. if (panel->host_config.ext_bridge_mode)
  566. return 0;
  567. switch (bl->type) {
  568. case DSI_BACKLIGHT_WLED:
  569. break;
  570. case DSI_BACKLIGHT_DCS:
  571. break;
  572. case DSI_BACKLIGHT_EXTERNAL:
  573. break;
  574. case DSI_BACKLIGHT_PWM:
  575. dsi_panel_pwm_unregister(panel);
  576. break;
  577. default:
  578. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  579. rc = -ENOTSUPP;
  580. goto error;
  581. }
  582. error:
  583. return rc;
  584. }
  585. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  586. struct dsi_parser_utils *utils)
  587. {
  588. int rc = 0;
  589. u64 tmp64 = 0;
  590. struct dsi_display_mode *display_mode;
  591. struct dsi_display_mode_priv_info *priv_info;
  592. display_mode = container_of(mode, struct dsi_display_mode, timing);
  593. priv_info = display_mode->priv_info;
  594. rc = utils->read_u64(utils->data,
  595. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  596. if (rc == -EOVERFLOW) {
  597. tmp64 = 0;
  598. rc = utils->read_u32(utils->data,
  599. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  600. }
  601. mode->clk_rate_hz = !rc ? tmp64 : 0;
  602. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  603. mode->pclk_scale.numer = 1;
  604. mode->pclk_scale.denom = 1;
  605. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  606. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  607. &mode->mdp_transfer_time_us);
  608. if (!rc)
  609. display_mode->priv_info->mdp_transfer_time_us =
  610. mode->mdp_transfer_time_us;
  611. else
  612. display_mode->priv_info->mdp_transfer_time_us = 0;
  613. rc = utils->read_u32(utils->data,
  614. "qcom,mdss-dsi-panel-framerate",
  615. &mode->refresh_rate);
  616. if (rc) {
  617. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  618. rc);
  619. goto error;
  620. }
  621. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  622. &mode->h_active);
  623. if (rc) {
  624. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  625. rc);
  626. goto error;
  627. }
  628. rc = utils->read_u32(utils->data,
  629. "qcom,mdss-dsi-h-front-porch",
  630. &mode->h_front_porch);
  631. if (rc) {
  632. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  633. rc);
  634. goto error;
  635. }
  636. rc = utils->read_u32(utils->data,
  637. "qcom,mdss-dsi-h-back-porch",
  638. &mode->h_back_porch);
  639. if (rc) {
  640. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  641. rc);
  642. goto error;
  643. }
  644. rc = utils->read_u32(utils->data,
  645. "qcom,mdss-dsi-h-pulse-width",
  646. &mode->h_sync_width);
  647. if (rc) {
  648. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  649. rc);
  650. goto error;
  651. }
  652. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  653. &mode->h_skew);
  654. if (rc)
  655. DSI_ERR("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  656. rc);
  657. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  658. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  659. mode->h_sync_width);
  660. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  661. &mode->v_active);
  662. if (rc) {
  663. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  664. rc);
  665. goto error;
  666. }
  667. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  668. &mode->v_back_porch);
  669. if (rc) {
  670. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  671. rc);
  672. goto error;
  673. }
  674. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  675. &mode->v_front_porch);
  676. if (rc) {
  677. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  678. rc);
  679. goto error;
  680. }
  681. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  682. &mode->v_sync_width);
  683. if (rc) {
  684. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  685. rc);
  686. goto error;
  687. }
  688. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  689. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  690. mode->v_sync_width);
  691. error:
  692. return rc;
  693. }
  694. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  695. struct dsi_parser_utils *utils,
  696. const char *name)
  697. {
  698. int rc = 0;
  699. u32 bpp = 0;
  700. enum dsi_pixel_format fmt;
  701. const char *packing;
  702. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  703. if (rc) {
  704. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  705. name, rc);
  706. return rc;
  707. }
  708. host->bpp = bpp;
  709. switch (bpp) {
  710. case 3:
  711. fmt = DSI_PIXEL_FORMAT_RGB111;
  712. break;
  713. case 8:
  714. fmt = DSI_PIXEL_FORMAT_RGB332;
  715. break;
  716. case 12:
  717. fmt = DSI_PIXEL_FORMAT_RGB444;
  718. break;
  719. case 16:
  720. fmt = DSI_PIXEL_FORMAT_RGB565;
  721. break;
  722. case 18:
  723. fmt = DSI_PIXEL_FORMAT_RGB666;
  724. break;
  725. case 24:
  726. default:
  727. fmt = DSI_PIXEL_FORMAT_RGB888;
  728. break;
  729. }
  730. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  731. packing = utils->get_property(utils->data,
  732. "qcom,mdss-dsi-pixel-packing",
  733. NULL);
  734. if (packing && !strcmp(packing, "loose"))
  735. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  736. }
  737. host->dst_format = fmt;
  738. return rc;
  739. }
  740. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  741. struct dsi_parser_utils *utils,
  742. const char *name)
  743. {
  744. int rc = 0;
  745. bool lane_enabled;
  746. u32 num_of_lanes = 0;
  747. lane_enabled = utils->read_bool(utils->data,
  748. "qcom,mdss-dsi-lane-0-state");
  749. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  750. lane_enabled = utils->read_bool(utils->data,
  751. "qcom,mdss-dsi-lane-1-state");
  752. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  753. lane_enabled = utils->read_bool(utils->data,
  754. "qcom,mdss-dsi-lane-2-state");
  755. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  756. lane_enabled = utils->read_bool(utils->data,
  757. "qcom,mdss-dsi-lane-3-state");
  758. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  759. if (host->data_lanes & DSI_DATA_LANE_0)
  760. num_of_lanes++;
  761. if (host->data_lanes & DSI_DATA_LANE_1)
  762. num_of_lanes++;
  763. if (host->data_lanes & DSI_DATA_LANE_2)
  764. num_of_lanes++;
  765. if (host->data_lanes & DSI_DATA_LANE_3)
  766. num_of_lanes++;
  767. host->num_data_lanes = num_of_lanes;
  768. if (host->data_lanes == 0) {
  769. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  770. rc = -EINVAL;
  771. }
  772. return rc;
  773. }
  774. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  775. struct dsi_parser_utils *utils,
  776. const char *name)
  777. {
  778. int rc = 0;
  779. const char *swap_mode;
  780. swap_mode = utils->get_property(utils->data,
  781. "qcom,mdss-dsi-color-order", NULL);
  782. if (swap_mode) {
  783. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  784. host->swap_mode = DSI_COLOR_SWAP_RGB;
  785. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  786. host->swap_mode = DSI_COLOR_SWAP_RBG;
  787. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  788. host->swap_mode = DSI_COLOR_SWAP_BRG;
  789. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  790. host->swap_mode = DSI_COLOR_SWAP_GRB;
  791. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  792. host->swap_mode = DSI_COLOR_SWAP_GBR;
  793. } else {
  794. DSI_ERR("[%s] Unrecognized color order-%s\n",
  795. name, swap_mode);
  796. rc = -EINVAL;
  797. }
  798. } else {
  799. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  800. host->swap_mode = DSI_COLOR_SWAP_RGB;
  801. }
  802. /* bit swap on color channel is not defined in dt */
  803. host->bit_swap_red = false;
  804. host->bit_swap_green = false;
  805. host->bit_swap_blue = false;
  806. return rc;
  807. }
  808. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  809. struct dsi_parser_utils *utils,
  810. const char *name)
  811. {
  812. const char *trig;
  813. int rc = 0;
  814. trig = utils->get_property(utils->data,
  815. "qcom,mdss-dsi-mdp-trigger", NULL);
  816. if (trig) {
  817. if (!strcmp(trig, "none")) {
  818. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  819. } else if (!strcmp(trig, "trigger_te")) {
  820. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  821. } else if (!strcmp(trig, "trigger_sw")) {
  822. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  823. } else if (!strcmp(trig, "trigger_sw_te")) {
  824. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  825. } else {
  826. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  827. name, trig);
  828. rc = -EINVAL;
  829. }
  830. } else {
  831. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  832. name);
  833. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  834. }
  835. trig = utils->get_property(utils->data,
  836. "qcom,mdss-dsi-dma-trigger", NULL);
  837. if (trig) {
  838. if (!strcmp(trig, "none")) {
  839. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  840. } else if (!strcmp(trig, "trigger_te")) {
  841. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  842. } else if (!strcmp(trig, "trigger_sw")) {
  843. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  844. } else if (!strcmp(trig, "trigger_sw_seof")) {
  845. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  846. } else if (!strcmp(trig, "trigger_sw_te")) {
  847. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  848. } else {
  849. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  850. name, trig);
  851. rc = -EINVAL;
  852. }
  853. } else {
  854. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  855. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  856. }
  857. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  858. &host->te_mode);
  859. if (rc) {
  860. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  861. host->te_mode = 1;
  862. rc = 0;
  863. }
  864. return rc;
  865. }
  866. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  867. struct dsi_parser_utils *utils,
  868. const char *name)
  869. {
  870. u32 val = 0;
  871. int rc = 0;
  872. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  873. if (!rc) {
  874. host->t_clk_post = val;
  875. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  876. }
  877. val = 0;
  878. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  879. if (!rc) {
  880. host->t_clk_pre = val;
  881. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  882. }
  883. host->ignore_rx_eot = utils->read_bool(utils->data,
  884. "qcom,mdss-dsi-rx-eot-ignore");
  885. host->append_tx_eot = utils->read_bool(utils->data,
  886. "qcom,mdss-dsi-tx-eot-append");
  887. host->ext_bridge_mode = utils->read_bool(utils->data,
  888. "qcom,mdss-dsi-ext-bridge-mode");
  889. host->force_hs_clk_lane = utils->read_bool(utils->data,
  890. "qcom,mdss-dsi-force-clock-lane-hs");
  891. return 0;
  892. }
  893. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  894. struct dsi_parser_utils *utils,
  895. const char *name)
  896. {
  897. int rc = 0;
  898. u32 val = 0;
  899. bool supported = false;
  900. struct dsi_split_link_config *split_link = &host->split_link;
  901. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  902. if (!supported) {
  903. DSI_DEBUG("[%s] Split link is not supported\n", name);
  904. split_link->split_link_enabled = false;
  905. return;
  906. }
  907. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  908. if (rc || val < 1) {
  909. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  910. split_link->num_sublinks = 2;
  911. } else {
  912. split_link->num_sublinks = val;
  913. }
  914. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  915. if (rc || val < 1) {
  916. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  917. split_link->lanes_per_sublink = 2;
  918. } else {
  919. split_link->lanes_per_sublink = val;
  920. }
  921. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  922. split_link->num_sublinks, split_link->lanes_per_sublink);
  923. split_link->split_link_enabled = true;
  924. }
  925. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  926. {
  927. int rc = 0;
  928. struct dsi_parser_utils *utils = &panel->utils;
  929. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  930. panel->name);
  931. if (rc) {
  932. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  933. panel->name, rc);
  934. goto error;
  935. }
  936. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  937. panel->name);
  938. if (rc) {
  939. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  940. panel->name, rc);
  941. goto error;
  942. }
  943. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  944. panel->name);
  945. if (rc) {
  946. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  947. panel->name, rc);
  948. goto error;
  949. }
  950. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  951. panel->name);
  952. if (rc) {
  953. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  954. panel->name, rc);
  955. goto error;
  956. }
  957. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  958. panel->name);
  959. if (rc) {
  960. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  961. panel->name, rc);
  962. goto error;
  963. }
  964. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  965. panel->name);
  966. error:
  967. return rc;
  968. }
  969. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  970. struct device_node *of_node)
  971. {
  972. int rc = 0;
  973. u32 val = 0;
  974. rc = of_property_read_u32(of_node,
  975. "qcom,mdss-dsi-qsync-min-refresh-rate",
  976. &val);
  977. if (rc)
  978. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  979. panel->name, rc);
  980. panel->qsync_min_fps = val;
  981. return rc;
  982. }
  983. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  984. {
  985. int rc = 0;
  986. bool supported = false;
  987. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  988. struct dsi_parser_utils *utils = &panel->utils;
  989. const char *name = panel->name;
  990. const char *type;
  991. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  992. if (!supported) {
  993. dyn_clk_caps->dyn_clk_support = false;
  994. return rc;
  995. }
  996. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  997. "qcom,dsi-dyn-clk-list");
  998. if (dyn_clk_caps->bit_clk_list_len < 1) {
  999. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1000. return -EINVAL;
  1001. }
  1002. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1003. sizeof(u32), GFP_KERNEL);
  1004. if (!dyn_clk_caps->bit_clk_list)
  1005. return -ENOMEM;
  1006. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1007. dyn_clk_caps->bit_clk_list,
  1008. dyn_clk_caps->bit_clk_list_len);
  1009. if (rc) {
  1010. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1011. return -EINVAL;
  1012. }
  1013. dyn_clk_caps->dyn_clk_support = true;
  1014. type = utils->get_property(utils->data,
  1015. "qcom,dsi-dyn-clk-type", NULL);
  1016. if (!type) {
  1017. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1018. dyn_clk_caps->maintain_const_fps = false;
  1019. return 0;
  1020. }
  1021. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1022. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1023. dyn_clk_caps->maintain_const_fps = true;
  1024. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1025. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1026. dyn_clk_caps->maintain_const_fps = true;
  1027. } else {
  1028. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1029. dyn_clk_caps->maintain_const_fps = false;
  1030. }
  1031. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1032. return 0;
  1033. }
  1034. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1035. {
  1036. int rc = 0;
  1037. bool supported = false;
  1038. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1039. struct dsi_parser_utils *utils = &panel->utils;
  1040. const char *name = panel->name;
  1041. const char *type;
  1042. u32 i;
  1043. supported = utils->read_bool(utils->data,
  1044. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1045. if (!supported) {
  1046. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1047. dfps_caps->dfps_support = false;
  1048. return rc;
  1049. }
  1050. type = utils->get_property(utils->data,
  1051. "qcom,mdss-dsi-pan-fps-update", NULL);
  1052. if (!type) {
  1053. DSI_ERR("[%s] dfps type not defined\n", name);
  1054. rc = -EINVAL;
  1055. goto error;
  1056. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1057. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1058. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1059. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1060. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1061. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1062. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1063. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1064. } else {
  1065. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1066. rc = -EINVAL;
  1067. goto error;
  1068. }
  1069. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1070. "qcom,dsi-supported-dfps-list");
  1071. if (dfps_caps->dfps_list_len < 1) {
  1072. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1073. rc = -EINVAL;
  1074. goto error;
  1075. }
  1076. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1077. GFP_KERNEL);
  1078. if (!dfps_caps->dfps_list) {
  1079. rc = -ENOMEM;
  1080. goto error;
  1081. }
  1082. rc = utils->read_u32_array(utils->data,
  1083. "qcom,dsi-supported-dfps-list",
  1084. dfps_caps->dfps_list,
  1085. dfps_caps->dfps_list_len);
  1086. if (rc) {
  1087. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1088. rc = -EINVAL;
  1089. goto error;
  1090. }
  1091. dfps_caps->dfps_support = true;
  1092. /* calculate max and min fps */
  1093. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1094. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1095. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1096. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1097. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1098. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1099. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1100. }
  1101. error:
  1102. return rc;
  1103. }
  1104. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1105. struct dsi_parser_utils *utils,
  1106. const char *name)
  1107. {
  1108. int rc = 0;
  1109. const char *traffic_mode;
  1110. u32 vc_id = 0;
  1111. u32 val = 0;
  1112. u32 line_no = 0;
  1113. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1114. if (rc) {
  1115. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1116. cfg->pulse_mode_hsa_he = false;
  1117. } else if (val == 1) {
  1118. cfg->pulse_mode_hsa_he = true;
  1119. } else if (val == 0) {
  1120. cfg->pulse_mode_hsa_he = false;
  1121. } else {
  1122. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1123. name);
  1124. rc = -EINVAL;
  1125. goto error;
  1126. }
  1127. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1128. "qcom,mdss-dsi-hfp-power-mode");
  1129. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1130. "qcom,mdss-dsi-hbp-power-mode");
  1131. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1132. "qcom,mdss-dsi-hsa-power-mode");
  1133. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1134. "qcom,mdss-dsi-last-line-interleave");
  1135. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1136. "qcom,mdss-dsi-bllp-eof-power-mode");
  1137. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1138. "qcom,mdss-dsi-bllp-power-mode");
  1139. cfg->force_clk_lane_hs = of_property_read_bool(utils->data,
  1140. "qcom,mdss-dsi-force-clock-lane-hs");
  1141. traffic_mode = utils->get_property(utils->data,
  1142. "qcom,mdss-dsi-traffic-mode",
  1143. NULL);
  1144. if (!traffic_mode) {
  1145. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1146. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1147. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1148. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1149. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1150. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1151. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1152. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1153. } else {
  1154. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1155. traffic_mode);
  1156. rc = -EINVAL;
  1157. goto error;
  1158. }
  1159. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1160. &vc_id);
  1161. if (rc) {
  1162. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1163. cfg->vc_id = 0;
  1164. } else {
  1165. cfg->vc_id = vc_id;
  1166. }
  1167. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1168. &line_no);
  1169. if (rc) {
  1170. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1171. cfg->dma_sched_line = 0x1;
  1172. /* do not fail since we have default value */
  1173. rc = 0;
  1174. } else {
  1175. cfg->dma_sched_line = line_no;
  1176. }
  1177. error:
  1178. return rc;
  1179. }
  1180. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1181. struct dsi_parser_utils *utils,
  1182. const char *name)
  1183. {
  1184. u32 val = 0;
  1185. int rc = 0;
  1186. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1187. if (rc) {
  1188. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1189. cfg->wr_mem_start = 0x2C;
  1190. } else {
  1191. cfg->wr_mem_start = val;
  1192. }
  1193. val = 0;
  1194. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1195. &val);
  1196. if (rc) {
  1197. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1198. cfg->wr_mem_continue = 0x3C;
  1199. } else {
  1200. cfg->wr_mem_continue = val;
  1201. }
  1202. /* TODO: fix following */
  1203. cfg->max_cmd_packets_interleave = 0;
  1204. val = 0;
  1205. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1206. &val);
  1207. if (rc) {
  1208. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1209. cfg->insert_dcs_command = true;
  1210. } else if (val == 1) {
  1211. cfg->insert_dcs_command = true;
  1212. } else if (val == 0) {
  1213. cfg->insert_dcs_command = false;
  1214. } else {
  1215. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1216. name);
  1217. rc = -EINVAL;
  1218. goto error;
  1219. }
  1220. error:
  1221. return rc;
  1222. }
  1223. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1224. {
  1225. int rc = 0;
  1226. struct dsi_parser_utils *utils = &panel->utils;
  1227. bool panel_mode_switch_enabled;
  1228. enum dsi_op_mode panel_mode;
  1229. const char *mode;
  1230. mode = utils->get_property(utils->data,
  1231. "qcom,mdss-dsi-panel-type", NULL);
  1232. if (!mode) {
  1233. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1234. panel_mode = DSI_OP_VIDEO_MODE;
  1235. } else if (!strcmp(mode, "dsi_video_mode")) {
  1236. panel_mode = DSI_OP_VIDEO_MODE;
  1237. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1238. panel_mode = DSI_OP_CMD_MODE;
  1239. } else {
  1240. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1241. rc = -EINVAL;
  1242. goto error;
  1243. }
  1244. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1245. "qcom,mdss-dsi-panel-mode-switch");
  1246. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1247. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1248. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1249. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1250. utils,
  1251. panel->name);
  1252. if (rc) {
  1253. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1254. panel->name, rc);
  1255. goto error;
  1256. }
  1257. }
  1258. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1259. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1260. utils,
  1261. panel->name);
  1262. if (rc) {
  1263. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1264. panel->name, rc);
  1265. goto error;
  1266. }
  1267. }
  1268. panel->poms_align_vsync = utils->read_bool(utils->data,
  1269. "qcom,poms-align-panel-vsync");
  1270. panel->panel_mode = panel_mode;
  1271. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1272. error:
  1273. return rc;
  1274. }
  1275. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1276. {
  1277. int rc = 0;
  1278. u32 val = 0;
  1279. const char *str;
  1280. struct dsi_panel_phy_props *props = &panel->phy_props;
  1281. struct dsi_parser_utils *utils = &panel->utils;
  1282. const char *name = panel->name;
  1283. rc = utils->read_u32(utils->data,
  1284. "qcom,mdss-pan-physical-width-dimension", &val);
  1285. if (rc) {
  1286. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1287. props->panel_width_mm = 0;
  1288. rc = 0;
  1289. } else {
  1290. props->panel_width_mm = val;
  1291. }
  1292. rc = utils->read_u32(utils->data,
  1293. "qcom,mdss-pan-physical-height-dimension",
  1294. &val);
  1295. if (rc) {
  1296. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1297. props->panel_height_mm = 0;
  1298. rc = 0;
  1299. } else {
  1300. props->panel_height_mm = val;
  1301. }
  1302. str = utils->get_property(utils->data,
  1303. "qcom,mdss-dsi-panel-orientation", NULL);
  1304. if (!str) {
  1305. props->rotation = DSI_PANEL_ROTATE_NONE;
  1306. } else if (!strcmp(str, "180")) {
  1307. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1308. } else if (!strcmp(str, "hflip")) {
  1309. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1310. } else if (!strcmp(str, "vflip")) {
  1311. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1312. } else {
  1313. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1314. rc = -EINVAL;
  1315. goto error;
  1316. }
  1317. error:
  1318. return rc;
  1319. }
  1320. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1321. "qcom,mdss-dsi-pre-on-command",
  1322. "qcom,mdss-dsi-on-command",
  1323. "qcom,mdss-dsi-post-panel-on-command",
  1324. "qcom,mdss-dsi-pre-off-command",
  1325. "qcom,mdss-dsi-off-command",
  1326. "qcom,mdss-dsi-post-off-command",
  1327. "qcom,mdss-dsi-pre-res-switch",
  1328. "qcom,mdss-dsi-res-switch",
  1329. "qcom,mdss-dsi-post-res-switch",
  1330. "qcom,cmd-to-video-mode-switch-commands",
  1331. "qcom,cmd-to-video-mode-post-switch-commands",
  1332. "qcom,video-to-cmd-mode-switch-commands",
  1333. "qcom,video-to-cmd-mode-post-switch-commands",
  1334. "qcom,mdss-dsi-panel-status-command",
  1335. "qcom,mdss-dsi-lp1-command",
  1336. "qcom,mdss-dsi-lp2-command",
  1337. "qcom,mdss-dsi-nolp-command",
  1338. "PPS not parsed from DTSI, generated dynamically",
  1339. "ROI not parsed from DTSI, generated dynamically",
  1340. "qcom,mdss-dsi-timing-switch-command",
  1341. "qcom,mdss-dsi-post-mode-switch-on-command",
  1342. "qcom,mdss-dsi-qsync-on-commands",
  1343. "qcom,mdss-dsi-qsync-off-commands",
  1344. };
  1345. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1346. "qcom,mdss-dsi-pre-on-command-state",
  1347. "qcom,mdss-dsi-on-command-state",
  1348. "qcom,mdss-dsi-post-on-command-state",
  1349. "qcom,mdss-dsi-pre-off-command-state",
  1350. "qcom,mdss-dsi-off-command-state",
  1351. "qcom,mdss-dsi-post-off-command-state",
  1352. "qcom,mdss-dsi-pre-res-switch-state",
  1353. "qcom,mdss-dsi-res-switch-state",
  1354. "qcom,mdss-dsi-post-res-switch-state",
  1355. "qcom,cmd-to-video-mode-switch-commands-state",
  1356. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1357. "qcom,video-to-cmd-mode-switch-commands-state",
  1358. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1359. "qcom,mdss-dsi-panel-status-command-state",
  1360. "qcom,mdss-dsi-lp1-command-state",
  1361. "qcom,mdss-dsi-lp2-command-state",
  1362. "qcom,mdss-dsi-nolp-command-state",
  1363. "PPS not parsed from DTSI, generated dynamically",
  1364. "ROI not parsed from DTSI, generated dynamically",
  1365. "qcom,mdss-dsi-timing-switch-command-state",
  1366. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1367. "qcom,mdss-dsi-qsync-on-commands-state",
  1368. "qcom,mdss-dsi-qsync-off-commands-state",
  1369. };
  1370. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1371. {
  1372. const u32 cmd_set_min_size = 7;
  1373. u32 count = 0;
  1374. u32 packet_length;
  1375. u32 tmp;
  1376. while (length >= cmd_set_min_size) {
  1377. packet_length = cmd_set_min_size;
  1378. tmp = ((data[5] << 8) | (data[6]));
  1379. packet_length += tmp;
  1380. if (packet_length > length) {
  1381. DSI_ERR("format error\n");
  1382. return -EINVAL;
  1383. }
  1384. length -= packet_length;
  1385. data += packet_length;
  1386. count++;
  1387. }
  1388. *cnt = count;
  1389. return 0;
  1390. }
  1391. static int dsi_panel_create_cmd_packets(const char *data,
  1392. u32 length,
  1393. u32 count,
  1394. struct dsi_cmd_desc *cmd)
  1395. {
  1396. int rc = 0;
  1397. int i, j;
  1398. u8 *payload;
  1399. for (i = 0; i < count; i++) {
  1400. u32 size;
  1401. cmd[i].msg.type = data[0];
  1402. cmd[i].last_command = (data[1] == 1);
  1403. cmd[i].msg.channel = data[2];
  1404. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1405. cmd[i].msg.ctrl = 0;
  1406. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1407. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1408. size = cmd[i].msg.tx_len * sizeof(u8);
  1409. payload = kzalloc(size, GFP_KERNEL);
  1410. if (!payload) {
  1411. rc = -ENOMEM;
  1412. goto error_free_payloads;
  1413. }
  1414. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1415. payload[j] = data[7 + j];
  1416. cmd[i].msg.tx_buf = payload;
  1417. data += (7 + cmd[i].msg.tx_len);
  1418. }
  1419. return rc;
  1420. error_free_payloads:
  1421. for (i = i - 1; i >= 0; i--) {
  1422. cmd--;
  1423. kfree(cmd->msg.tx_buf);
  1424. }
  1425. return rc;
  1426. }
  1427. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1428. {
  1429. u32 i = 0;
  1430. struct dsi_cmd_desc *cmd;
  1431. for (i = 0; i < set->count; i++) {
  1432. cmd = &set->cmds[i];
  1433. kfree(cmd->msg.tx_buf);
  1434. }
  1435. }
  1436. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1437. {
  1438. kfree(set->cmds);
  1439. }
  1440. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1441. u32 packet_count)
  1442. {
  1443. u32 size;
  1444. size = packet_count * sizeof(*cmd->cmds);
  1445. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1446. if (!cmd->cmds)
  1447. return -ENOMEM;
  1448. cmd->count = packet_count;
  1449. return 0;
  1450. }
  1451. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1452. enum dsi_cmd_set_type type,
  1453. struct dsi_parser_utils *utils)
  1454. {
  1455. int rc = 0;
  1456. u32 length = 0;
  1457. const char *data;
  1458. const char *state;
  1459. u32 packet_count = 0;
  1460. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1461. &length);
  1462. if (!data) {
  1463. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1464. rc = -ENOTSUPP;
  1465. goto error;
  1466. }
  1467. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1468. cmd_set_prop_map[type], length);
  1469. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1470. 8, 1, data, length, false);
  1471. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1472. if (rc) {
  1473. DSI_ERR("commands failed, rc=%d\n", rc);
  1474. goto error;
  1475. }
  1476. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1477. packet_count, length);
  1478. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1479. if (rc) {
  1480. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1481. goto error;
  1482. }
  1483. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1484. cmd->cmds);
  1485. if (rc) {
  1486. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1487. goto error_free_mem;
  1488. }
  1489. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1490. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1491. cmd->state = DSI_CMD_SET_STATE_LP;
  1492. } else if (!strcmp(state, "dsi_hs_mode")) {
  1493. cmd->state = DSI_CMD_SET_STATE_HS;
  1494. } else {
  1495. DSI_ERR("[%s] command state unrecognized-%s\n",
  1496. cmd_set_state_map[type], state);
  1497. goto error_free_mem;
  1498. }
  1499. return rc;
  1500. error_free_mem:
  1501. kfree(cmd->cmds);
  1502. cmd->cmds = NULL;
  1503. error:
  1504. return rc;
  1505. }
  1506. static int dsi_panel_parse_cmd_sets(
  1507. struct dsi_display_mode_priv_info *priv_info,
  1508. struct dsi_parser_utils *utils)
  1509. {
  1510. int rc = 0;
  1511. struct dsi_panel_cmd_set *set;
  1512. u32 i;
  1513. if (!priv_info) {
  1514. DSI_ERR("invalid mode priv info\n");
  1515. return -EINVAL;
  1516. }
  1517. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1518. set = &priv_info->cmd_sets[i];
  1519. set->type = i;
  1520. set->count = 0;
  1521. if (i == DSI_CMD_SET_PPS) {
  1522. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1523. if (rc)
  1524. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1525. i, rc);
  1526. set->state = DSI_CMD_SET_STATE_LP;
  1527. } else {
  1528. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1529. if (rc)
  1530. DSI_DEBUG("failed to parse set %d\n", i);
  1531. }
  1532. }
  1533. rc = 0;
  1534. return rc;
  1535. }
  1536. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1537. {
  1538. int rc = 0;
  1539. int i;
  1540. u32 length = 0;
  1541. u32 count = 0;
  1542. u32 size = 0;
  1543. u32 *arr_32 = NULL;
  1544. const u32 *arr;
  1545. struct dsi_parser_utils *utils = &panel->utils;
  1546. struct dsi_reset_seq *seq;
  1547. if (panel->host_config.ext_bridge_mode)
  1548. return 0;
  1549. arr = utils->get_property(utils->data,
  1550. "qcom,mdss-dsi-reset-sequence", &length);
  1551. if (!arr) {
  1552. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1553. rc = -EINVAL;
  1554. goto error;
  1555. }
  1556. if (length & 0x1) {
  1557. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1558. panel->name);
  1559. rc = -EINVAL;
  1560. goto error;
  1561. }
  1562. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1563. length = length / sizeof(u32);
  1564. size = length * sizeof(u32);
  1565. arr_32 = kzalloc(size, GFP_KERNEL);
  1566. if (!arr_32) {
  1567. rc = -ENOMEM;
  1568. goto error;
  1569. }
  1570. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1571. arr_32, length);
  1572. if (rc) {
  1573. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1574. goto error_free_arr_32;
  1575. }
  1576. count = length / 2;
  1577. size = count * sizeof(*seq);
  1578. seq = kzalloc(size, GFP_KERNEL);
  1579. if (!seq) {
  1580. rc = -ENOMEM;
  1581. goto error_free_arr_32;
  1582. }
  1583. panel->reset_config.sequence = seq;
  1584. panel->reset_config.count = count;
  1585. for (i = 0; i < length; i += 2) {
  1586. seq->level = arr_32[i];
  1587. seq->sleep_ms = arr_32[i + 1];
  1588. seq++;
  1589. }
  1590. error_free_arr_32:
  1591. kfree(arr_32);
  1592. error:
  1593. return rc;
  1594. }
  1595. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1596. {
  1597. struct dsi_parser_utils *utils = &panel->utils;
  1598. const char *string;
  1599. int i, rc = 0;
  1600. panel->ulps_feature_enabled =
  1601. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1602. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1603. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1604. panel->ulps_suspend_enabled =
  1605. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1606. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1607. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1608. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1609. "qcom,mdss-dsi-te-using-wd");
  1610. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1611. "qcom,cmd-sync-wait-broadcast");
  1612. panel->lp11_init = utils->read_bool(utils->data,
  1613. "qcom,mdss-dsi-lp11-init");
  1614. panel->spr_info.enable = false;
  1615. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1616. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1617. if (!rc) {
  1618. // find match for pack-type string
  1619. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1620. if (msm_spr_pack_type_str[i] &&
  1621. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1622. panel->spr_info.enable = true;
  1623. panel->spr_info.pack_type = i;
  1624. break;
  1625. }
  1626. }
  1627. }
  1628. pr_debug("%s source side spr packing, pack-type %s\n",
  1629. panel->spr_info.enable ? "enable" : "disable",
  1630. panel->spr_info.enable ?
  1631. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1632. return 0;
  1633. }
  1634. static int dsi_panel_parse_jitter_config(
  1635. struct dsi_display_mode *mode,
  1636. struct dsi_parser_utils *utils)
  1637. {
  1638. int rc;
  1639. struct dsi_display_mode_priv_info *priv_info;
  1640. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1641. u64 jitter_val = 0;
  1642. priv_info = mode->priv_info;
  1643. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1644. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1645. if (rc) {
  1646. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1647. } else {
  1648. jitter_val = jitter[0];
  1649. jitter_val = div_u64(jitter_val, jitter[1]);
  1650. }
  1651. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1652. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1653. priv_info->panel_jitter_denom =
  1654. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1655. } else {
  1656. priv_info->panel_jitter_numer = jitter[0];
  1657. priv_info->panel_jitter_denom = jitter[1];
  1658. }
  1659. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1660. &priv_info->panel_prefill_lines);
  1661. if (rc) {
  1662. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1663. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1664. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1665. } else if (priv_info->panel_prefill_lines >=
  1666. DSI_V_TOTAL(&mode->timing)) {
  1667. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1668. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1669. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1670. }
  1671. return 0;
  1672. }
  1673. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1674. {
  1675. int rc = 0;
  1676. char *supply_name;
  1677. if (panel->host_config.ext_bridge_mode)
  1678. return 0;
  1679. if (!strcmp(panel->type, "primary"))
  1680. supply_name = "qcom,panel-supply-entries";
  1681. else
  1682. supply_name = "qcom,panel-sec-supply-entries";
  1683. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1684. &panel->power_info, supply_name);
  1685. if (rc) {
  1686. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1687. goto error;
  1688. }
  1689. error:
  1690. return rc;
  1691. }
  1692. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1693. {
  1694. int rc = 0;
  1695. const char *data;
  1696. struct dsi_parser_utils *utils = &panel->utils;
  1697. char *reset_gpio_name, *mode_set_gpio_name;
  1698. if (!strcmp(panel->type, "primary")) {
  1699. reset_gpio_name = "qcom,platform-reset-gpio";
  1700. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1701. } else {
  1702. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1703. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1704. }
  1705. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1706. reset_gpio_name, 0);
  1707. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1708. !panel->host_config.ext_bridge_mode) {
  1709. rc = panel->reset_config.reset_gpio;
  1710. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1711. goto error;
  1712. }
  1713. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1714. "qcom,5v-boost-gpio",
  1715. 0);
  1716. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1717. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1718. panel->name, rc);
  1719. panel->reset_config.disp_en_gpio =
  1720. utils->get_named_gpio(utils->data,
  1721. "qcom,platform-en-gpio", 0);
  1722. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1723. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1724. panel->name, rc);
  1725. }
  1726. }
  1727. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1728. utils->data, mode_set_gpio_name, 0);
  1729. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1730. DSI_DEBUG("mode gpio not specified\n");
  1731. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1732. data = utils->get_property(utils->data,
  1733. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1734. if (data) {
  1735. if (!strcmp(data, "single_port"))
  1736. panel->reset_config.mode_sel_state =
  1737. MODE_SEL_SINGLE_PORT;
  1738. else if (!strcmp(data, "dual_port"))
  1739. panel->reset_config.mode_sel_state =
  1740. MODE_SEL_DUAL_PORT;
  1741. else if (!strcmp(data, "high"))
  1742. panel->reset_config.mode_sel_state =
  1743. MODE_GPIO_HIGH;
  1744. else if (!strcmp(data, "low"))
  1745. panel->reset_config.mode_sel_state =
  1746. MODE_GPIO_LOW;
  1747. } else {
  1748. /* Set default mode as SPLIT mode */
  1749. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1750. }
  1751. /* TODO: release memory */
  1752. rc = dsi_panel_parse_reset_sequence(panel);
  1753. if (rc) {
  1754. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1755. panel->name, rc);
  1756. goto error;
  1757. }
  1758. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1759. "qcom,mdss-dsi-panel-test-pin",
  1760. 0);
  1761. if (!gpio_is_valid(panel->panel_test_gpio))
  1762. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1763. __LINE__);
  1764. error:
  1765. return rc;
  1766. }
  1767. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1768. {
  1769. int rc = 0;
  1770. u32 val;
  1771. struct dsi_backlight_config *config = &panel->bl_config;
  1772. struct dsi_parser_utils *utils = &panel->utils;
  1773. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1774. &val);
  1775. if (rc) {
  1776. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1777. goto error;
  1778. }
  1779. config->pwm_period_usecs = val;
  1780. error:
  1781. return rc;
  1782. }
  1783. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1784. {
  1785. int rc = 0;
  1786. u32 val = 0;
  1787. const char *bl_type;
  1788. const char *data;
  1789. struct dsi_parser_utils *utils = &panel->utils;
  1790. char *bl_name;
  1791. if (!strcmp(panel->type, "primary"))
  1792. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1793. else
  1794. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1795. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1796. if (!bl_type) {
  1797. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1798. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1799. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1800. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1801. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1802. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1803. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1804. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1805. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1806. } else {
  1807. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1808. panel->name, bl_type);
  1809. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1810. }
  1811. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1812. if (!data) {
  1813. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1814. } else if (!strcmp(data, "delay_until_first_frame")) {
  1815. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1816. } else {
  1817. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1818. panel->name, data);
  1819. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1820. }
  1821. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1822. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1823. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1824. if (rc) {
  1825. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1826. panel->name);
  1827. panel->bl_config.bl_min_level = 0;
  1828. } else {
  1829. panel->bl_config.bl_min_level = val;
  1830. }
  1831. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1832. if (rc) {
  1833. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1834. panel->name);
  1835. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1836. } else {
  1837. panel->bl_config.bl_max_level = val;
  1838. }
  1839. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1840. &val);
  1841. if (rc) {
  1842. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1843. panel->name);
  1844. panel->bl_config.brightness_max_level = 255;
  1845. } else {
  1846. panel->bl_config.brightness_max_level = val;
  1847. }
  1848. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1849. "qcom,mdss-dsi-bl-inverted-dbv");
  1850. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1851. rc = dsi_panel_parse_bl_pwm_config(panel);
  1852. if (rc) {
  1853. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1854. panel->name, rc);
  1855. goto error;
  1856. }
  1857. }
  1858. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1859. "qcom,platform-bklight-en-gpio",
  1860. 0);
  1861. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1862. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1863. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1864. panel->name, rc);
  1865. rc = -EPROBE_DEFER;
  1866. goto error;
  1867. } else {
  1868. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1869. panel->name, rc);
  1870. rc = 0;
  1871. goto error;
  1872. }
  1873. }
  1874. error:
  1875. return rc;
  1876. }
  1877. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1878. struct dsi_parser_utils *utils)
  1879. {
  1880. const char *data;
  1881. u32 len, i;
  1882. int rc = 0;
  1883. struct dsi_display_mode_priv_info *priv_info;
  1884. u64 pixel_clk_khz;
  1885. if (!mode || !mode->priv_info)
  1886. return -EINVAL;
  1887. priv_info = mode->priv_info;
  1888. data = utils->get_property(utils->data,
  1889. "qcom,mdss-dsi-panel-phy-timings", &len);
  1890. if (!data) {
  1891. DSI_DEBUG("Unable to read Phy timing settings\n");
  1892. } else {
  1893. priv_info->phy_timing_val =
  1894. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1895. if (!priv_info->phy_timing_val)
  1896. return -EINVAL;
  1897. for (i = 0; i < len; i++)
  1898. priv_info->phy_timing_val[i] = data[i];
  1899. priv_info->phy_timing_len = len;
  1900. }
  1901. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1902. /*
  1903. * For command mode we update the pclk as part of
  1904. * function dsi_panel_calc_dsi_transfer_time( )
  1905. * as we set it based on dsi clock or mdp transfer time.
  1906. */
  1907. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1908. DSI_V_TOTAL(&mode->timing) *
  1909. mode->timing.refresh_rate);
  1910. do_div(pixel_clk_khz, 1000);
  1911. mode->pixel_clk_khz = pixel_clk_khz;
  1912. }
  1913. return rc;
  1914. }
  1915. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1916. struct dsi_parser_utils *utils)
  1917. {
  1918. u32 data;
  1919. int rc = -EINVAL;
  1920. int intf_width;
  1921. const char *compression;
  1922. struct dsi_display_mode_priv_info *priv_info;
  1923. if (!mode || !mode->priv_info)
  1924. return -EINVAL;
  1925. priv_info = mode->priv_info;
  1926. priv_info->dsc_enabled = false;
  1927. compression = utils->get_property(utils->data,
  1928. "qcom,compression-mode", NULL);
  1929. if (compression && !strcmp(compression, "dsc"))
  1930. priv_info->dsc_enabled = true;
  1931. if (!priv_info->dsc_enabled) {
  1932. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1933. return 0;
  1934. }
  1935. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1936. if (rc) {
  1937. priv_info->dsc.config.dsc_version_major = 0x1;
  1938. priv_info->dsc.config.dsc_version_minor = 0x1;
  1939. rc = 0;
  1940. } else {
  1941. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1942. * major version information
  1943. */
  1944. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1945. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1946. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1947. ((priv_info->dsc.config.dsc_version_minor
  1948. != 0x1) ||
  1949. (priv_info->dsc.config.dsc_version_minor
  1950. != 0x2))) {
  1951. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1952. __func__,
  1953. priv_info->dsc.config.dsc_version_major,
  1954. priv_info->dsc.config.dsc_version_minor
  1955. );
  1956. rc = -EINVAL;
  1957. goto error;
  1958. }
  1959. }
  1960. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1961. if (rc) {
  1962. priv_info->dsc.scr_rev = 0x0;
  1963. rc = 0;
  1964. } else {
  1965. priv_info->dsc.scr_rev = data & 0xff;
  1966. /* only one scr rev supported */
  1967. if (priv_info->dsc.scr_rev > 0x1) {
  1968. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1969. __func__, priv_info->dsc.scr_rev);
  1970. rc = -EINVAL;
  1971. goto error;
  1972. }
  1973. }
  1974. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1975. if (rc) {
  1976. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1977. goto error;
  1978. }
  1979. priv_info->dsc.config.slice_height = data;
  1980. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1981. if (rc) {
  1982. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1983. goto error;
  1984. }
  1985. priv_info->dsc.config.slice_width = data;
  1986. intf_width = mode->timing.h_active;
  1987. if (intf_width % priv_info->dsc.config.slice_width) {
  1988. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1989. intf_width, priv_info->dsc.config.slice_width);
  1990. rc = -EINVAL;
  1991. goto error;
  1992. }
  1993. priv_info->dsc.config.pic_width = mode->timing.h_active;
  1994. priv_info->dsc.config.pic_height = mode->timing.v_active;
  1995. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  1996. if (rc) {
  1997. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  1998. goto error;
  1999. } else if (!data || (data > 2)) {
  2000. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2001. goto error;
  2002. }
  2003. priv_info->dsc.slice_per_pkt = data;
  2004. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2005. &data);
  2006. if (rc) {
  2007. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2008. goto error;
  2009. }
  2010. priv_info->dsc.config.bits_per_component = data;
  2011. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2012. if (rc) {
  2013. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2014. data = 0;
  2015. }
  2016. priv_info->dsc.pps_delay_ms = data;
  2017. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2018. &data);
  2019. if (rc) {
  2020. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2021. goto error;
  2022. }
  2023. priv_info->dsc.config.bits_per_pixel = data << 4;
  2024. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2025. &data);
  2026. if (rc) {
  2027. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2028. rc = 0;
  2029. data = MSM_CHROMA_444;
  2030. }
  2031. priv_info->dsc.chroma_format = data;
  2032. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2033. &data);
  2034. if (rc) {
  2035. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2036. rc = 0;
  2037. data = MSM_RGB;
  2038. }
  2039. priv_info->dsc.source_color_space = data;
  2040. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2041. "qcom,mdss-dsc-block-prediction-enable");
  2042. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2043. priv_info->dsc.config.slice_width);
  2044. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2045. priv_info->dsc.scr_rev);
  2046. if (rc) {
  2047. DSI_DEBUG("failed populating dsc params \n");
  2048. rc = -EINVAL;
  2049. goto error;
  2050. }
  2051. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2052. if (rc) {
  2053. DSI_DEBUG("failed populating other dsc params \n");
  2054. rc = -EINVAL;
  2055. goto error;
  2056. }
  2057. priv_info->pclk_scale.numer =
  2058. priv_info->dsc.config.bits_per_pixel >> 4;
  2059. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2060. priv_info->dsc.chroma_format,
  2061. priv_info->dsc.config.bits_per_component);
  2062. mode->timing.dsc_enabled = true;
  2063. mode->timing.dsc = &priv_info->dsc;
  2064. mode->timing.pclk_scale = priv_info->pclk_scale;
  2065. error:
  2066. return rc;
  2067. }
  2068. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2069. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2070. {
  2071. u32 data;
  2072. int rc = -EINVAL;
  2073. const char *compression;
  2074. struct dsi_display_mode_priv_info *priv_info;
  2075. int intf_width;
  2076. if (!mode || !mode->priv_info)
  2077. return -EINVAL;
  2078. priv_info = mode->priv_info;
  2079. priv_info->vdc_enabled = false;
  2080. compression = utils->get_property(utils->data,
  2081. "qcom,compression-mode", NULL);
  2082. if (compression && !strcmp(compression, "vdc"))
  2083. priv_info->vdc_enabled = true;
  2084. if (!priv_info->vdc_enabled) {
  2085. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2086. return 0;
  2087. }
  2088. priv_info->vdc.panel_mode = panel_mode;
  2089. priv_info->vdc.traffic_mode = traffic_mode;
  2090. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2091. if (rc) {
  2092. priv_info->vdc.version_major = 0x1;
  2093. priv_info->vdc.version_minor = 0x2;
  2094. priv_info->vdc.version_release = 0x0;
  2095. rc = 0;
  2096. } else {
  2097. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2098. * major version information
  2099. */
  2100. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2101. priv_info->vdc.version_minor = data & 0x0F;
  2102. if ((priv_info->vdc.version_major != 0x1) &&
  2103. ((priv_info->vdc.version_minor
  2104. != 0x2))) {
  2105. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2106. __func__,
  2107. priv_info->vdc.version_major,
  2108. priv_info->vdc.version_minor
  2109. );
  2110. rc = -EINVAL;
  2111. goto error;
  2112. }
  2113. }
  2114. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2115. if (rc) {
  2116. priv_info->vdc.version_release = 0x0;
  2117. rc = 0;
  2118. } else {
  2119. priv_info->vdc.version_release = data & 0xff;
  2120. /* only one release version is supported */
  2121. if (priv_info->vdc.version_release != 0x0) {
  2122. DSI_ERR("unsupported vdc release version %d\n",
  2123. priv_info->vdc.version_release);
  2124. rc = -EINVAL;
  2125. goto error;
  2126. }
  2127. }
  2128. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2129. priv_info->vdc.version_major,
  2130. priv_info->vdc.version_minor,
  2131. priv_info->vdc.version_release);
  2132. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2133. if (rc) {
  2134. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2135. goto error;
  2136. }
  2137. priv_info->vdc.slice_height = data;
  2138. /* slice height should be atleast 16 lines */
  2139. if (priv_info->vdc.slice_height < 16) {
  2140. DSI_ERR("invalid slice height %d\n",
  2141. priv_info->vdc.slice_height);
  2142. rc = -EINVAL;
  2143. goto error;
  2144. }
  2145. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2146. if (rc) {
  2147. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2148. goto error;
  2149. }
  2150. priv_info->vdc.slice_width = data;
  2151. /*
  2152. * slide-width should be multiple of 8
  2153. * slice-width should be atlease 64 pixels
  2154. */
  2155. if ((priv_info->vdc.slice_width & 7) ||
  2156. (priv_info->vdc.slice_width < 64)) {
  2157. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2158. rc = -EINVAL;
  2159. goto error;
  2160. }
  2161. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2162. if (rc) {
  2163. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2164. goto error;
  2165. } else if (!data || (data > 2)) {
  2166. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2167. rc = -EINVAL;
  2168. goto error;
  2169. }
  2170. intf_width = mode->timing.h_active;
  2171. priv_info->vdc.slice_per_pkt = data;
  2172. priv_info->vdc.frame_width = mode->timing.h_active;
  2173. priv_info->vdc.frame_height = mode->timing.v_active;
  2174. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2175. &data);
  2176. if (rc) {
  2177. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2178. goto error;
  2179. }
  2180. priv_info->vdc.bits_per_component = data;
  2181. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2182. if (rc) {
  2183. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2184. data = 0;
  2185. }
  2186. priv_info->vdc.pps_delay_ms = data;
  2187. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2188. &data);
  2189. if (rc) {
  2190. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2191. goto error;
  2192. }
  2193. priv_info->vdc.bits_per_pixel = data << 4;
  2194. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2195. &data);
  2196. if (rc) {
  2197. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2198. rc = 0;
  2199. data = MSM_CHROMA_444;
  2200. }
  2201. priv_info->vdc.chroma_format = data;
  2202. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2203. &data);
  2204. if (rc) {
  2205. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2206. rc = 0;
  2207. data = MSM_RGB;
  2208. }
  2209. priv_info->vdc.source_color_space = data;
  2210. rc = sde_vdc_populate_config(&priv_info->vdc,
  2211. intf_width, traffic_mode);
  2212. if (rc) {
  2213. DSI_DEBUG("failed populating vdc config\n");
  2214. rc = -EINVAL;
  2215. goto error;
  2216. }
  2217. priv_info->pclk_scale.numer =
  2218. priv_info->vdc.bits_per_pixel >> 4;
  2219. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2220. priv_info->vdc.chroma_format,
  2221. priv_info->vdc.bits_per_component);
  2222. mode->timing.vdc_enabled = true;
  2223. mode->timing.vdc = &priv_info->vdc;
  2224. mode->timing.pclk_scale = priv_info->pclk_scale;
  2225. error:
  2226. return rc;
  2227. }
  2228. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2229. {
  2230. int rc = 0;
  2231. struct drm_panel_hdr_properties *hdr_prop;
  2232. struct dsi_parser_utils *utils = &panel->utils;
  2233. hdr_prop = &panel->hdr_props;
  2234. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2235. "qcom,mdss-dsi-panel-hdr-enabled");
  2236. if (hdr_prop->hdr_enabled) {
  2237. rc = utils->read_u32_array(utils->data,
  2238. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2239. hdr_prop->display_primaries,
  2240. DISPLAY_PRIMARIES_MAX);
  2241. if (rc) {
  2242. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2243. __func__, __LINE__, rc);
  2244. hdr_prop->hdr_enabled = false;
  2245. return rc;
  2246. }
  2247. rc = utils->read_u32(utils->data,
  2248. "qcom,mdss-dsi-panel-peak-brightness",
  2249. &(hdr_prop->peak_brightness));
  2250. if (rc) {
  2251. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2252. __func__, __LINE__, rc);
  2253. hdr_prop->hdr_enabled = false;
  2254. return rc;
  2255. }
  2256. rc = utils->read_u32(utils->data,
  2257. "qcom,mdss-dsi-panel-blackness-level",
  2258. &(hdr_prop->blackness_level));
  2259. if (rc) {
  2260. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2261. __func__, __LINE__, rc);
  2262. hdr_prop->hdr_enabled = false;
  2263. return rc;
  2264. }
  2265. }
  2266. return 0;
  2267. }
  2268. static int dsi_panel_parse_topology(
  2269. struct dsi_display_mode_priv_info *priv_info,
  2270. struct dsi_parser_utils *utils,
  2271. int topology_override)
  2272. {
  2273. struct msm_display_topology *topology;
  2274. u32 top_count, top_sel, *array = NULL;
  2275. int i, len = 0;
  2276. int rc = -EINVAL;
  2277. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2278. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2279. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2280. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2281. return rc;
  2282. }
  2283. top_count = len / TOPOLOGY_SET_LEN;
  2284. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2285. if (!array)
  2286. return -ENOMEM;
  2287. rc = utils->read_u32_array(utils->data,
  2288. "qcom,display-topology", array, len);
  2289. if (rc) {
  2290. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2291. goto read_fail;
  2292. }
  2293. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2294. if (!topology) {
  2295. rc = -ENOMEM;
  2296. goto read_fail;
  2297. }
  2298. for (i = 0; i < top_count; i++) {
  2299. struct msm_display_topology *top = &topology[i];
  2300. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2301. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2302. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2303. }
  2304. if (topology_override >= 0 && topology_override < top_count) {
  2305. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2306. topology_override,
  2307. topology[topology_override].num_lm,
  2308. topology[topology_override].num_enc,
  2309. topology[topology_override].num_intf);
  2310. top_sel = topology_override;
  2311. goto parse_done;
  2312. }
  2313. rc = utils->read_u32(utils->data,
  2314. "qcom,default-topology-index", &top_sel);
  2315. if (rc) {
  2316. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2317. goto parse_fail;
  2318. }
  2319. if (top_sel >= top_count) {
  2320. rc = -EINVAL;
  2321. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2322. rc);
  2323. goto parse_fail;
  2324. }
  2325. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2326. topology[top_sel].num_lm,
  2327. topology[top_sel].num_enc,
  2328. topology[top_sel].num_intf);
  2329. parse_done:
  2330. memcpy(&priv_info->topology, &topology[top_sel],
  2331. sizeof(struct msm_display_topology));
  2332. parse_fail:
  2333. kfree(topology);
  2334. read_fail:
  2335. kfree(array);
  2336. return rc;
  2337. }
  2338. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2339. struct msm_roi_alignment *align)
  2340. {
  2341. int len = 0, rc = 0;
  2342. u32 value[6];
  2343. struct property *data;
  2344. if (!align)
  2345. return -EINVAL;
  2346. memset(align, 0, sizeof(*align));
  2347. data = utils->find_property(utils->data,
  2348. "qcom,panel-roi-alignment", &len);
  2349. len /= sizeof(u32);
  2350. if (!data) {
  2351. DSI_ERR("panel roi alignment not found\n");
  2352. rc = -EINVAL;
  2353. } else if (len != 6) {
  2354. DSI_ERR("incorrect roi alignment len %d\n", len);
  2355. rc = -EINVAL;
  2356. } else {
  2357. rc = utils->read_u32_array(utils->data,
  2358. "qcom,panel-roi-alignment", value, len);
  2359. if (rc)
  2360. DSI_DEBUG("error reading panel roi alignment values\n");
  2361. else {
  2362. align->xstart_pix_align = value[0];
  2363. align->ystart_pix_align = value[1];
  2364. align->width_pix_align = value[2];
  2365. align->height_pix_align = value[3];
  2366. align->min_width = value[4];
  2367. align->min_height = value[5];
  2368. }
  2369. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2370. align->xstart_pix_align,
  2371. align->width_pix_align,
  2372. align->ystart_pix_align,
  2373. align->height_pix_align,
  2374. align->min_width,
  2375. align->min_height);
  2376. }
  2377. return rc;
  2378. }
  2379. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2380. struct dsi_parser_utils *utils)
  2381. {
  2382. struct msm_roi_caps *roi_caps = NULL;
  2383. const char *data;
  2384. int rc = 0;
  2385. if (!mode || !mode->priv_info) {
  2386. DSI_ERR("invalid arguments\n");
  2387. return -EINVAL;
  2388. }
  2389. roi_caps = &mode->priv_info->roi_caps;
  2390. memset(roi_caps, 0, sizeof(*roi_caps));
  2391. data = utils->get_property(utils->data,
  2392. "qcom,partial-update-enabled", NULL);
  2393. if (data) {
  2394. if (!strcmp(data, "dual_roi"))
  2395. roi_caps->num_roi = 2;
  2396. else if (!strcmp(data, "single_roi"))
  2397. roi_caps->num_roi = 1;
  2398. else {
  2399. DSI_INFO(
  2400. "invalid value for qcom,partial-update-enabled: %s\n",
  2401. data);
  2402. return 0;
  2403. }
  2404. } else {
  2405. DSI_DEBUG("partial update disabled as the property is not set\n");
  2406. return 0;
  2407. }
  2408. roi_caps->merge_rois = utils->read_bool(utils->data,
  2409. "qcom,partial-update-roi-merge");
  2410. roi_caps->enabled = roi_caps->num_roi > 0;
  2411. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2412. roi_caps->enabled);
  2413. if (roi_caps->enabled)
  2414. rc = dsi_panel_parse_roi_alignment(utils,
  2415. &roi_caps->align);
  2416. if (rc)
  2417. memset(roi_caps, 0, sizeof(*roi_caps));
  2418. return rc;
  2419. }
  2420. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2421. struct dsi_parser_utils *utils)
  2422. {
  2423. bool vid_mode_support, cmd_mode_support;
  2424. if (!mode || !mode->priv_info) {
  2425. DSI_ERR("invalid arguments\n");
  2426. return -EINVAL;
  2427. }
  2428. vid_mode_support = utils->read_bool(utils->data,
  2429. "qcom,mdss-dsi-video-mode");
  2430. cmd_mode_support = utils->read_bool(utils->data,
  2431. "qcom,mdss-dsi-cmd-mode");
  2432. if (cmd_mode_support)
  2433. mode->panel_mode = DSI_OP_CMD_MODE;
  2434. else if (vid_mode_support)
  2435. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2436. else
  2437. return -EINVAL;
  2438. return 0;
  2439. };
  2440. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2441. {
  2442. int dms_enabled;
  2443. const char *data;
  2444. struct dsi_parser_utils *utils = &panel->utils;
  2445. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2446. dms_enabled = utils->read_bool(utils->data,
  2447. "qcom,dynamic-mode-switch-enabled");
  2448. if (!dms_enabled)
  2449. return 0;
  2450. data = utils->get_property(utils->data,
  2451. "qcom,dynamic-mode-switch-type", NULL);
  2452. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2453. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2454. } else {
  2455. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2456. panel->name, data);
  2457. return -EINVAL;
  2458. }
  2459. return 0;
  2460. };
  2461. /*
  2462. * The length of all the valid values to be checked should not be greater
  2463. * than the length of returned data from read command.
  2464. */
  2465. static bool
  2466. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2467. {
  2468. int i;
  2469. struct drm_panel_esd_config *config = &panel->esd_config;
  2470. for (i = 0; i < count; ++i) {
  2471. if (config->status_valid_params[i] >
  2472. config->status_cmds_rlen[i]) {
  2473. DSI_DEBUG("ignore valid params\n");
  2474. return false;
  2475. }
  2476. }
  2477. return true;
  2478. }
  2479. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2480. char *prop_key, u32 **target, u32 cmd_cnt)
  2481. {
  2482. int tmp;
  2483. if (!utils->find_property(utils->data, prop_key, &tmp))
  2484. return false;
  2485. tmp /= sizeof(u32);
  2486. if (tmp != cmd_cnt) {
  2487. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2488. tmp, cmd_cnt);
  2489. return false;
  2490. }
  2491. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2492. if (IS_ERR_OR_NULL(*target)) {
  2493. DSI_ERR("Error allocating memory for property\n");
  2494. return false;
  2495. }
  2496. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2497. DSI_ERR("cannot get values from dts\n");
  2498. kfree(*target);
  2499. *target = NULL;
  2500. return false;
  2501. }
  2502. return true;
  2503. }
  2504. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2505. {
  2506. kfree(esd_config->status_buf);
  2507. kfree(esd_config->return_buf);
  2508. kfree(esd_config->status_value);
  2509. kfree(esd_config->status_valid_params);
  2510. kfree(esd_config->status_cmds_rlen);
  2511. kfree(esd_config->status_cmd.cmds);
  2512. }
  2513. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2514. {
  2515. struct drm_panel_esd_config *esd_config;
  2516. int rc = 0;
  2517. u32 tmp;
  2518. u32 i, status_len, *lenp;
  2519. struct property *data;
  2520. struct dsi_parser_utils *utils = &panel->utils;
  2521. if (!panel) {
  2522. DSI_ERR("Invalid Params\n");
  2523. return -EINVAL;
  2524. }
  2525. esd_config = &panel->esd_config;
  2526. if (!esd_config)
  2527. return -EINVAL;
  2528. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2529. DSI_CMD_SET_PANEL_STATUS, utils);
  2530. if (!esd_config->status_cmd.count) {
  2531. DSI_ERR("panel status command parsing failed\n");
  2532. rc = -EINVAL;
  2533. goto error;
  2534. }
  2535. if (!dsi_panel_parse_esd_status_len(utils,
  2536. "qcom,mdss-dsi-panel-status-read-length",
  2537. &panel->esd_config.status_cmds_rlen,
  2538. esd_config->status_cmd.count)) {
  2539. DSI_ERR("Invalid status read length\n");
  2540. rc = -EINVAL;
  2541. goto error1;
  2542. }
  2543. if (dsi_panel_parse_esd_status_len(utils,
  2544. "qcom,mdss-dsi-panel-status-valid-params",
  2545. &panel->esd_config.status_valid_params,
  2546. esd_config->status_cmd.count)) {
  2547. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2548. esd_config->status_cmd.count)) {
  2549. rc = -EINVAL;
  2550. goto error2;
  2551. }
  2552. }
  2553. status_len = 0;
  2554. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2555. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2556. status_len += lenp[i];
  2557. if (!status_len) {
  2558. rc = -EINVAL;
  2559. goto error2;
  2560. }
  2561. /*
  2562. * Some panel may need multiple read commands to properly
  2563. * check panel status. Do a sanity check for proper status
  2564. * value which will be compared with the value read by dsi
  2565. * controller during ESD check. Also check if multiple read
  2566. * commands are there then, there should be corresponding
  2567. * status check values for each read command.
  2568. */
  2569. data = utils->find_property(utils->data,
  2570. "qcom,mdss-dsi-panel-status-value", &tmp);
  2571. tmp /= sizeof(u32);
  2572. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2573. esd_config->groups = tmp / status_len;
  2574. } else {
  2575. DSI_ERR("error parse panel-status-value\n");
  2576. rc = -EINVAL;
  2577. goto error2;
  2578. }
  2579. esd_config->status_value =
  2580. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2581. GFP_KERNEL);
  2582. if (!esd_config->status_value) {
  2583. rc = -ENOMEM;
  2584. goto error2;
  2585. }
  2586. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2587. sizeof(unsigned char), GFP_KERNEL);
  2588. if (!esd_config->return_buf) {
  2589. rc = -ENOMEM;
  2590. goto error3;
  2591. }
  2592. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2593. if (!esd_config->status_buf) {
  2594. rc = -ENOMEM;
  2595. goto error4;
  2596. }
  2597. rc = utils->read_u32_array(utils->data,
  2598. "qcom,mdss-dsi-panel-status-value",
  2599. esd_config->status_value, esd_config->groups * status_len);
  2600. if (rc) {
  2601. DSI_DEBUG("error reading panel status values\n");
  2602. memset(esd_config->status_value, 0,
  2603. esd_config->groups * status_len);
  2604. }
  2605. return 0;
  2606. error4:
  2607. kfree(esd_config->return_buf);
  2608. error3:
  2609. kfree(esd_config->status_value);
  2610. error2:
  2611. kfree(esd_config->status_valid_params);
  2612. kfree(esd_config->status_cmds_rlen);
  2613. error1:
  2614. kfree(esd_config->status_cmd.cmds);
  2615. error:
  2616. return rc;
  2617. }
  2618. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2619. {
  2620. int rc = 0;
  2621. const char *string;
  2622. struct drm_panel_esd_config *esd_config;
  2623. struct dsi_parser_utils *utils = &panel->utils;
  2624. u8 *esd_mode = NULL;
  2625. esd_config = &panel->esd_config;
  2626. esd_config->status_mode = ESD_MODE_MAX;
  2627. esd_config->esd_enabled = utils->read_bool(utils->data,
  2628. "qcom,esd-check-enabled");
  2629. if (!esd_config->esd_enabled)
  2630. return 0;
  2631. rc = utils->read_string(utils->data,
  2632. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2633. if (!rc) {
  2634. if (!strcmp(string, "bta_check")) {
  2635. esd_config->status_mode = ESD_MODE_SW_BTA;
  2636. } else if (!strcmp(string, "reg_read")) {
  2637. esd_config->status_mode = ESD_MODE_REG_READ;
  2638. } else if (!strcmp(string, "te_signal_check")) {
  2639. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2640. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2641. } else {
  2642. DSI_ERR("TE-ESD not valid for video mode\n");
  2643. rc = -EINVAL;
  2644. goto error;
  2645. }
  2646. } else {
  2647. DSI_ERR("No valid panel-status-check-mode string\n");
  2648. rc = -EINVAL;
  2649. goto error;
  2650. }
  2651. } else {
  2652. DSI_DEBUG("status check method not defined!\n");
  2653. rc = -EINVAL;
  2654. goto error;
  2655. }
  2656. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2657. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2658. if (rc) {
  2659. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2660. rc);
  2661. goto error;
  2662. }
  2663. esd_mode = "register_read";
  2664. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2665. esd_mode = "bta_trigger";
  2666. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2667. esd_mode = "te_check";
  2668. }
  2669. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2670. return 0;
  2671. error:
  2672. panel->esd_config.esd_enabled = false;
  2673. return rc;
  2674. }
  2675. static void dsi_panel_update_util(struct dsi_panel *panel,
  2676. struct device_node *parser_node)
  2677. {
  2678. struct dsi_parser_utils *utils = &panel->utils;
  2679. if (parser_node) {
  2680. *utils = *dsi_parser_get_parser_utils();
  2681. utils->data = parser_node;
  2682. DSI_DEBUG("switching to parser APIs\n");
  2683. goto end;
  2684. }
  2685. *utils = *dsi_parser_get_of_utils();
  2686. utils->data = panel->panel_of_node;
  2687. end:
  2688. utils->node = panel->panel_of_node;
  2689. }
  2690. struct dsi_panel *dsi_panel_get(struct device *parent,
  2691. struct device_node *of_node,
  2692. struct device_node *parser_node,
  2693. const char *type,
  2694. int topology_override)
  2695. {
  2696. struct dsi_panel *panel;
  2697. struct dsi_parser_utils *utils;
  2698. const char *panel_physical_type;
  2699. int rc = 0;
  2700. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2701. if (!panel)
  2702. return ERR_PTR(-ENOMEM);
  2703. panel->panel_of_node = of_node;
  2704. panel->parent = parent;
  2705. panel->type = type;
  2706. dsi_panel_update_util(panel, parser_node);
  2707. utils = &panel->utils;
  2708. panel->name = utils->get_property(utils->data,
  2709. "qcom,mdss-dsi-panel-name", NULL);
  2710. if (!panel->name)
  2711. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2712. /*
  2713. * Set panel type to LCD as default.
  2714. */
  2715. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2716. panel_physical_type = utils->get_property(utils->data,
  2717. "qcom,mdss-dsi-panel-physical-type", NULL);
  2718. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2719. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2720. rc = dsi_panel_parse_host_config(panel);
  2721. if (rc) {
  2722. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2723. rc);
  2724. goto error;
  2725. }
  2726. rc = dsi_panel_parse_panel_mode(panel);
  2727. if (rc) {
  2728. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2729. rc);
  2730. goto error;
  2731. }
  2732. rc = dsi_panel_parse_dfps_caps(panel);
  2733. if (rc)
  2734. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2735. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2736. if (rc)
  2737. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2738. /* allow qsync support only if DFPS is with VFP approach */
  2739. if ((panel->dfps_caps.dfps_support) &&
  2740. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2741. panel->qsync_min_fps = 0;
  2742. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2743. if (rc)
  2744. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2745. rc = dsi_panel_parse_phy_props(panel);
  2746. if (rc) {
  2747. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2748. rc);
  2749. goto error;
  2750. }
  2751. rc = dsi_panel_parse_gpios(panel);
  2752. if (rc) {
  2753. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2754. goto error;
  2755. }
  2756. rc = dsi_panel_parse_power_cfg(panel);
  2757. if (rc)
  2758. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2759. rc = dsi_panel_parse_bl_config(panel);
  2760. if (rc) {
  2761. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2762. if (rc == -EPROBE_DEFER)
  2763. goto error;
  2764. }
  2765. rc = dsi_panel_parse_misc_features(panel);
  2766. if (rc)
  2767. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2768. rc = dsi_panel_parse_hdr_config(panel);
  2769. if (rc)
  2770. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2771. rc = dsi_panel_get_mode_count(panel);
  2772. if (rc) {
  2773. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2774. goto error;
  2775. }
  2776. rc = dsi_panel_parse_dms_info(panel);
  2777. if (rc)
  2778. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2779. rc = dsi_panel_parse_esd_config(panel);
  2780. if (rc)
  2781. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2782. rc = dsi_panel_vreg_get(panel);
  2783. if (rc) {
  2784. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2785. panel->name, rc);
  2786. goto error;
  2787. }
  2788. panel->power_mode = SDE_MODE_DPMS_OFF;
  2789. drm_panel_init(&panel->drm_panel);
  2790. panel->drm_panel.dev = &panel->mipi_device.dev;
  2791. panel->mipi_device.dev.of_node = of_node;
  2792. rc = drm_panel_add(&panel->drm_panel);
  2793. if (rc)
  2794. goto error_vreg_put;
  2795. mutex_init(&panel->panel_lock);
  2796. return panel;
  2797. error_vreg_put:
  2798. (void)dsi_panel_vreg_put(panel);
  2799. error:
  2800. kfree(panel);
  2801. return ERR_PTR(rc);
  2802. }
  2803. void dsi_panel_put(struct dsi_panel *panel)
  2804. {
  2805. drm_panel_remove(&panel->drm_panel);
  2806. /* free resources allocated for ESD check */
  2807. dsi_panel_esd_config_deinit(&panel->esd_config);
  2808. kfree(panel);
  2809. }
  2810. int dsi_panel_drv_init(struct dsi_panel *panel,
  2811. struct mipi_dsi_host *host)
  2812. {
  2813. int rc = 0;
  2814. struct mipi_dsi_device *dev;
  2815. if (!panel || !host) {
  2816. DSI_ERR("invalid params\n");
  2817. return -EINVAL;
  2818. }
  2819. mutex_lock(&panel->panel_lock);
  2820. dev = &panel->mipi_device;
  2821. dev->host = host;
  2822. /*
  2823. * We dont have device structure since panel is not a device node.
  2824. * When using drm panel framework, the device is probed when the host is
  2825. * create.
  2826. */
  2827. dev->channel = 0;
  2828. dev->lanes = 4;
  2829. panel->host = host;
  2830. rc = dsi_panel_pinctrl_init(panel);
  2831. if (rc) {
  2832. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2833. panel->name, rc);
  2834. goto exit;
  2835. }
  2836. rc = dsi_panel_gpio_request(panel);
  2837. if (rc) {
  2838. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2839. rc);
  2840. goto error_pinctrl_deinit;
  2841. }
  2842. rc = dsi_panel_bl_register(panel);
  2843. if (rc) {
  2844. if (rc != -EPROBE_DEFER)
  2845. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2846. panel->name, rc);
  2847. goto error_gpio_release;
  2848. }
  2849. goto exit;
  2850. error_gpio_release:
  2851. (void)dsi_panel_gpio_release(panel);
  2852. error_pinctrl_deinit:
  2853. (void)dsi_panel_pinctrl_deinit(panel);
  2854. exit:
  2855. mutex_unlock(&panel->panel_lock);
  2856. return rc;
  2857. }
  2858. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2859. {
  2860. int rc = 0;
  2861. if (!panel) {
  2862. DSI_ERR("invalid params\n");
  2863. return -EINVAL;
  2864. }
  2865. mutex_lock(&panel->panel_lock);
  2866. rc = dsi_panel_bl_unregister(panel);
  2867. if (rc)
  2868. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2869. panel->name, rc);
  2870. rc = dsi_panel_gpio_release(panel);
  2871. if (rc)
  2872. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2873. rc);
  2874. rc = dsi_panel_pinctrl_deinit(panel);
  2875. if (rc)
  2876. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2877. rc);
  2878. rc = dsi_panel_vreg_put(panel);
  2879. if (rc)
  2880. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2881. panel->host = NULL;
  2882. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2883. mutex_unlock(&panel->panel_lock);
  2884. return rc;
  2885. }
  2886. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2887. struct dsi_display_mode *mode)
  2888. {
  2889. return 0;
  2890. }
  2891. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2892. {
  2893. const u32 SINGLE_MODE_SUPPORT = 1;
  2894. struct dsi_parser_utils *utils;
  2895. struct device_node *timings_np, *child_np;
  2896. int num_dfps_rates, num_bit_clks;
  2897. int num_video_modes = 0, num_cmd_modes = 0;
  2898. int count, rc = 0;
  2899. if (!panel) {
  2900. DSI_ERR("invalid params\n");
  2901. return -EINVAL;
  2902. }
  2903. utils = &panel->utils;
  2904. panel->num_timing_nodes = 0;
  2905. timings_np = utils->get_child_by_name(utils->data,
  2906. "qcom,mdss-dsi-display-timings");
  2907. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2908. DSI_ERR("no display timing nodes defined\n");
  2909. rc = -EINVAL;
  2910. goto error;
  2911. }
  2912. count = utils->get_child_count(timings_np);
  2913. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2914. count > DSI_MODE_MAX) {
  2915. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2916. rc = -EINVAL;
  2917. goto error;
  2918. }
  2919. /* No multiresolution support is available for video mode panels.
  2920. * Multi-mode is supported for video mode during POMS is enabled.
  2921. */
  2922. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2923. !panel->host_config.ext_bridge_mode &&
  2924. !panel->panel_mode_switch_enabled)
  2925. count = SINGLE_MODE_SUPPORT;
  2926. panel->num_timing_nodes = count;
  2927. dsi_for_each_child_node(timings_np, child_np) {
  2928. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  2929. num_video_modes++;
  2930. else if (utils->read_bool(child_np,
  2931. "qcom,mdss-dsi-cmd-mode"))
  2932. num_cmd_modes++;
  2933. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  2934. num_video_modes++;
  2935. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  2936. num_cmd_modes++;
  2937. }
  2938. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  2939. panel->dfps_caps.dfps_list_len;
  2940. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  2941. panel->dyn_clk_caps.bit_clk_list_len;
  2942. /*
  2943. * Inflate num_of_modes by fps and bit clks in dfps.
  2944. * Single command mode for video mode panels supporting
  2945. * panel operating mode switch.
  2946. */
  2947. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  2948. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  2949. (panel->panel_mode_switch_enabled))
  2950. num_cmd_modes = 1;
  2951. else
  2952. num_cmd_modes = num_cmd_modes * num_bit_clks;
  2953. panel->num_display_modes = num_video_modes + num_cmd_modes;
  2954. error:
  2955. return rc;
  2956. }
  2957. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  2958. struct dsi_panel_phy_props *phy_props)
  2959. {
  2960. int rc = 0;
  2961. if (!panel || !phy_props) {
  2962. DSI_ERR("invalid params\n");
  2963. return -EINVAL;
  2964. }
  2965. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  2966. return rc;
  2967. }
  2968. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  2969. struct dsi_dfps_capabilities *dfps_caps)
  2970. {
  2971. int rc = 0;
  2972. if (!panel || !dfps_caps) {
  2973. DSI_ERR("invalid params\n");
  2974. return -EINVAL;
  2975. }
  2976. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  2977. return rc;
  2978. }
  2979. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  2980. {
  2981. int i;
  2982. if (!mode->priv_info)
  2983. return;
  2984. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  2985. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2986. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  2987. }
  2988. kfree(mode->priv_info);
  2989. }
  2990. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  2991. struct dsi_display_mode *mode, u32 frame_threshold_us)
  2992. {
  2993. u32 frame_time_us,nslices;
  2994. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  2995. dsi_transfer_time_us, pixel_clk_khz;
  2996. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  2997. struct dsi_mode_info *timing = &mode->timing;
  2998. struct dsi_display_mode *display_mode;
  2999. u32 jitter_numer, jitter_denom, prefill_lines;
  3000. u32 min_threshold_us, prefill_time_us;
  3001. u16 bpp;
  3002. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3003. * + 1 byte dcs data command.
  3004. */
  3005. const u32 packet_overhead = 56;
  3006. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3007. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3008. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3009. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3010. if (timing->dsc_enabled) {
  3011. nslices = (timing->h_active)/(dsc->config.slice_width);
  3012. /* (slice width x bit-per-pixel + packet overhead) x
  3013. * number of slices x height x fps / lane
  3014. */
  3015. bpp = DSC_BPP(dsc->config);
  3016. bits_per_line = ((dsc->config.slice_width * bpp) +
  3017. packet_overhead) * nslices;
  3018. bits_per_line = bits_per_line / (config->num_data_lanes);
  3019. min_bitclk_hz = (bits_per_line * timing->v_active *
  3020. timing->refresh_rate);
  3021. } else {
  3022. total_active_pixels = ((dsi_h_active_dce(timing)
  3023. * timing->v_active));
  3024. /* calculate the actual bitclk needed to transfer the frame */
  3025. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3026. (config->bpp));
  3027. do_div(min_bitclk_hz, config->num_data_lanes);
  3028. }
  3029. timing->min_dsi_clk_hz = min_bitclk_hz;
  3030. if (timing->clk_rate_hz) {
  3031. /* adjust the transfer time proportionately for bit clk*/
  3032. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3033. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3034. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3035. } else if (mode->priv_info->mdp_transfer_time_us) {
  3036. timing->dsi_transfer_time_us =
  3037. mode->priv_info->mdp_transfer_time_us;
  3038. } else {
  3039. min_threshold_us = mult_frac(frame_time_us,
  3040. jitter_numer, (jitter_denom * 100));
  3041. /*
  3042. * Increase the prefill_lines proportionately as recommended
  3043. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3044. */
  3045. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3046. timing->refresh_rate, 60);
  3047. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3048. (timing->v_active));
  3049. /*
  3050. * Threshold is sum of panel jitter time, prefill line time
  3051. * plus 100usec buffer time.
  3052. */
  3053. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3054. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3055. if (min_threshold_us > frame_threshold_us)
  3056. frame_threshold_us = min_threshold_us;
  3057. timing->dsi_transfer_time_us = frame_time_us -
  3058. frame_threshold_us;
  3059. }
  3060. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3061. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3062. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3063. timing->mdp_transfer_time_us =
  3064. mode->priv_info->mdp_transfer_time_us;
  3065. }
  3066. /* Calculate pclk_khz to update modeinfo */
  3067. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3068. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3069. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3070. do_div(pixel_clk_khz, config->bpp);
  3071. display_mode->pixel_clk_khz = pixel_clk_khz;
  3072. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3073. }
  3074. int dsi_panel_get_mode(struct dsi_panel *panel,
  3075. u32 index, struct dsi_display_mode *mode,
  3076. int topology_override)
  3077. {
  3078. struct device_node *timings_np, *child_np;
  3079. struct dsi_parser_utils *utils;
  3080. struct dsi_display_mode_priv_info *prv_info;
  3081. u32 child_idx = 0;
  3082. int rc = 0, num_timings;
  3083. int traffic_mode;
  3084. int panel_mode;
  3085. void *utils_data = NULL;
  3086. if (!panel || !mode) {
  3087. DSI_ERR("invalid params\n");
  3088. return -EINVAL;
  3089. }
  3090. mutex_lock(&panel->panel_lock);
  3091. utils = &panel->utils;
  3092. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3093. if (!mode->priv_info) {
  3094. rc = -ENOMEM;
  3095. goto done;
  3096. }
  3097. prv_info = mode->priv_info;
  3098. timings_np = utils->get_child_by_name(utils->data,
  3099. "qcom,mdss-dsi-display-timings");
  3100. if (!timings_np) {
  3101. DSI_ERR("no display timing nodes defined\n");
  3102. rc = -EINVAL;
  3103. goto parse_fail;
  3104. }
  3105. num_timings = utils->get_child_count(timings_np);
  3106. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3107. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3108. rc = -EINVAL;
  3109. goto parse_fail;
  3110. }
  3111. utils_data = utils->data;
  3112. traffic_mode = panel->video_config.traffic_mode;
  3113. panel_mode = panel->panel_mode;
  3114. dsi_for_each_child_node(timings_np, child_np) {
  3115. if (index != child_idx++)
  3116. continue;
  3117. utils->data = child_np;
  3118. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3119. if (rc) {
  3120. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3121. goto parse_fail;
  3122. }
  3123. rc = dsi_panel_parse_dsc_params(mode, utils);
  3124. if (rc) {
  3125. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3126. goto parse_fail;
  3127. }
  3128. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3129. panel_mode);
  3130. if (rc) {
  3131. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3132. goto parse_fail;
  3133. }
  3134. rc = dsi_panel_parse_topology(prv_info, utils,
  3135. topology_override);
  3136. if (rc) {
  3137. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3138. goto parse_fail;
  3139. }
  3140. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3141. if (rc) {
  3142. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3143. goto parse_fail;
  3144. }
  3145. rc = dsi_panel_parse_jitter_config(mode, utils);
  3146. if (rc)
  3147. DSI_ERR(
  3148. "failed to parse panel jitter config, rc=%d\n", rc);
  3149. rc = dsi_panel_parse_phy_timing(mode, utils);
  3150. if (rc) {
  3151. DSI_ERR(
  3152. "failed to parse panel phy timings, rc=%d\n", rc);
  3153. goto parse_fail;
  3154. }
  3155. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3156. if (rc)
  3157. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3158. if (panel->panel_mode_switch_enabled) {
  3159. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3160. if (rc) {
  3161. rc = 0;
  3162. mode->panel_mode = panel->panel_mode;
  3163. DSI_INFO(
  3164. "POMS: panel mode isn't specified in timing[%d]\n",
  3165. child_idx);
  3166. }
  3167. } else {
  3168. mode->panel_mode = panel->panel_mode;
  3169. }
  3170. }
  3171. goto done;
  3172. parse_fail:
  3173. kfree(mode->priv_info);
  3174. mode->priv_info = NULL;
  3175. done:
  3176. utils->data = utils_data;
  3177. mutex_unlock(&panel->panel_lock);
  3178. return rc;
  3179. }
  3180. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3181. struct dsi_display_mode *mode,
  3182. struct dsi_host_config *config)
  3183. {
  3184. int rc = 0;
  3185. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3186. if (!panel || !mode || !config) {
  3187. DSI_ERR("invalid params\n");
  3188. return -EINVAL;
  3189. }
  3190. mutex_lock(&panel->panel_lock);
  3191. config->panel_mode = panel->panel_mode;
  3192. memcpy(&config->common_config, &panel->host_config,
  3193. sizeof(config->common_config));
  3194. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3195. memcpy(&config->u.video_engine, &panel->video_config,
  3196. sizeof(config->u.video_engine));
  3197. } else {
  3198. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3199. sizeof(config->u.cmd_engine));
  3200. }
  3201. memcpy(&config->video_timing, &mode->timing,
  3202. sizeof(config->video_timing));
  3203. config->video_timing.mdp_transfer_time_us =
  3204. mode->priv_info->mdp_transfer_time_us;
  3205. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3206. config->video_timing.dsc = &mode->priv_info->dsc;
  3207. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3208. config->video_timing.vdc = &mode->priv_info->vdc;
  3209. if (dyn_clk_caps->dyn_clk_support)
  3210. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3211. else
  3212. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3213. config->esc_clk_rate_hz = 19200000;
  3214. mutex_unlock(&panel->panel_lock);
  3215. return rc;
  3216. }
  3217. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3218. {
  3219. int rc = 0;
  3220. if (!panel) {
  3221. DSI_ERR("invalid params\n");
  3222. return -EINVAL;
  3223. }
  3224. mutex_lock(&panel->panel_lock);
  3225. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3226. if (panel->lp11_init)
  3227. goto error;
  3228. rc = dsi_panel_power_on(panel);
  3229. if (rc) {
  3230. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3231. goto error;
  3232. }
  3233. error:
  3234. mutex_unlock(&panel->panel_lock);
  3235. return rc;
  3236. }
  3237. int dsi_panel_update_pps(struct dsi_panel *panel)
  3238. {
  3239. int rc = 0;
  3240. struct dsi_panel_cmd_set *set = NULL;
  3241. struct dsi_display_mode_priv_info *priv_info = NULL;
  3242. if (!panel || !panel->cur_mode) {
  3243. DSI_ERR("invalid params\n");
  3244. return -EINVAL;
  3245. }
  3246. mutex_lock(&panel->panel_lock);
  3247. priv_info = panel->cur_mode->priv_info;
  3248. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3249. if (priv_info->dsc_enabled)
  3250. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3251. panel->dce_pps_cmd, 0,
  3252. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3253. else if (priv_info->vdc_enabled)
  3254. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3255. panel->dce_pps_cmd, 0,
  3256. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3257. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3258. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3259. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3260. if (rc) {
  3261. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3262. goto error;
  3263. }
  3264. }
  3265. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3266. if (rc) {
  3267. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3268. panel->name, rc);
  3269. }
  3270. dsi_panel_destroy_cmd_packets(set);
  3271. error:
  3272. mutex_unlock(&panel->panel_lock);
  3273. return rc;
  3274. }
  3275. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3276. {
  3277. int rc = 0;
  3278. if (!panel) {
  3279. DSI_ERR("invalid params\n");
  3280. return -EINVAL;
  3281. }
  3282. mutex_lock(&panel->panel_lock);
  3283. if (!panel->panel_initialized)
  3284. goto exit;
  3285. /*
  3286. * Consider LP1->LP2->LP1.
  3287. * If the panel is already in LP mode, do not need to
  3288. * set the regulator.
  3289. * IBB and AB power mode would be set at the same time
  3290. * in PMIC driver, so we only call ibb setting that is enough.
  3291. */
  3292. if (dsi_panel_is_type_oled(panel) &&
  3293. panel->power_mode != SDE_MODE_DPMS_LP2)
  3294. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3295. "ibb", REGULATOR_MODE_IDLE);
  3296. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3297. if (rc)
  3298. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3299. panel->name, rc);
  3300. exit:
  3301. mutex_unlock(&panel->panel_lock);
  3302. return rc;
  3303. }
  3304. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3305. {
  3306. int rc = 0;
  3307. if (!panel) {
  3308. DSI_ERR("invalid params\n");
  3309. return -EINVAL;
  3310. }
  3311. mutex_lock(&panel->panel_lock);
  3312. if (!panel->panel_initialized)
  3313. goto exit;
  3314. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3315. if (rc)
  3316. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3317. panel->name, rc);
  3318. exit:
  3319. mutex_unlock(&panel->panel_lock);
  3320. return rc;
  3321. }
  3322. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3323. {
  3324. int rc = 0;
  3325. if (!panel) {
  3326. DSI_ERR("invalid params\n");
  3327. return -EINVAL;
  3328. }
  3329. mutex_lock(&panel->panel_lock);
  3330. if (!panel->panel_initialized)
  3331. goto exit;
  3332. /*
  3333. * Consider about LP1->LP2->NOLP.
  3334. */
  3335. if (dsi_panel_is_type_oled(panel) &&
  3336. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3337. panel->power_mode == SDE_MODE_DPMS_LP2))
  3338. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3339. "ibb", REGULATOR_MODE_NORMAL);
  3340. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3341. if (rc)
  3342. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3343. panel->name, rc);
  3344. exit:
  3345. mutex_unlock(&panel->panel_lock);
  3346. return rc;
  3347. }
  3348. int dsi_panel_prepare(struct dsi_panel *panel)
  3349. {
  3350. int rc = 0;
  3351. if (!panel) {
  3352. DSI_ERR("invalid params\n");
  3353. return -EINVAL;
  3354. }
  3355. mutex_lock(&panel->panel_lock);
  3356. if (panel->lp11_init) {
  3357. rc = dsi_panel_power_on(panel);
  3358. if (rc) {
  3359. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3360. panel->name, rc);
  3361. goto error;
  3362. }
  3363. }
  3364. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3365. if (rc) {
  3366. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3367. panel->name, rc);
  3368. goto error;
  3369. }
  3370. error:
  3371. mutex_unlock(&panel->panel_lock);
  3372. return rc;
  3373. }
  3374. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3375. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3376. {
  3377. static const int ROI_CMD_LEN = 5;
  3378. int rc = 0;
  3379. /* DTYPE_DCS_LWRITE */
  3380. char *caset, *paset;
  3381. set->cmds = NULL;
  3382. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3383. if (!caset) {
  3384. rc = -ENOMEM;
  3385. goto exit;
  3386. }
  3387. caset[0] = 0x2a;
  3388. caset[1] = (roi->x & 0xFF00) >> 8;
  3389. caset[2] = roi->x & 0xFF;
  3390. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3391. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3392. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3393. if (!paset) {
  3394. rc = -ENOMEM;
  3395. goto error_free_mem;
  3396. }
  3397. paset[0] = 0x2b;
  3398. paset[1] = (roi->y & 0xFF00) >> 8;
  3399. paset[2] = roi->y & 0xFF;
  3400. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3401. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3402. set->type = DSI_CMD_SET_ROI;
  3403. set->state = DSI_CMD_SET_STATE_LP;
  3404. set->count = 2; /* send caset + paset together */
  3405. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3406. if (!set->cmds) {
  3407. rc = -ENOMEM;
  3408. goto error_free_mem;
  3409. }
  3410. set->cmds[0].msg.channel = 0;
  3411. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3412. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3413. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3414. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3415. set->cmds[0].msg.tx_buf = caset;
  3416. set->cmds[0].msg.rx_len = 0;
  3417. set->cmds[0].msg.rx_buf = 0;
  3418. set->cmds[0].msg.wait_ms = 0;
  3419. set->cmds[0].last_command = 0;
  3420. set->cmds[0].post_wait_ms = 0;
  3421. set->cmds[1].msg.channel = 0;
  3422. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3423. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3424. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3425. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3426. set->cmds[1].msg.tx_buf = paset;
  3427. set->cmds[1].msg.rx_len = 0;
  3428. set->cmds[1].msg.rx_buf = 0;
  3429. set->cmds[1].msg.wait_ms = 0;
  3430. set->cmds[1].last_command = 1;
  3431. set->cmds[1].post_wait_ms = 0;
  3432. goto exit;
  3433. error_free_mem:
  3434. kfree(caset);
  3435. kfree(paset);
  3436. kfree(set->cmds);
  3437. exit:
  3438. return rc;
  3439. }
  3440. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3441. int ctrl_idx)
  3442. {
  3443. int rc = 0;
  3444. if (!panel) {
  3445. DSI_ERR("invalid params\n");
  3446. return -EINVAL;
  3447. }
  3448. mutex_lock(&panel->panel_lock);
  3449. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3450. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3451. if (rc)
  3452. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3453. panel->name, rc);
  3454. mutex_unlock(&panel->panel_lock);
  3455. return rc;
  3456. }
  3457. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3458. int ctrl_idx)
  3459. {
  3460. int rc = 0;
  3461. if (!panel) {
  3462. DSI_ERR("invalid params\n");
  3463. return -EINVAL;
  3464. }
  3465. mutex_lock(&panel->panel_lock);
  3466. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3467. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3468. if (rc)
  3469. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3470. panel->name, rc);
  3471. mutex_unlock(&panel->panel_lock);
  3472. return rc;
  3473. }
  3474. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3475. struct dsi_rect *roi)
  3476. {
  3477. int rc = 0;
  3478. struct dsi_panel_cmd_set *set;
  3479. struct dsi_display_mode_priv_info *priv_info;
  3480. if (!panel || !panel->cur_mode) {
  3481. DSI_ERR("Invalid params\n");
  3482. return -EINVAL;
  3483. }
  3484. priv_info = panel->cur_mode->priv_info;
  3485. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3486. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3487. if (rc) {
  3488. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3489. panel->name, rc);
  3490. return rc;
  3491. }
  3492. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3493. roi->x, roi->y, roi->w, roi->h);
  3494. mutex_lock(&panel->panel_lock);
  3495. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3496. if (rc)
  3497. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3498. panel->name, rc);
  3499. mutex_unlock(&panel->panel_lock);
  3500. dsi_panel_destroy_cmd_packets(set);
  3501. dsi_panel_dealloc_cmd_packets(set);
  3502. return rc;
  3503. }
  3504. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3505. {
  3506. int rc = 0;
  3507. if (!panel) {
  3508. DSI_ERR("Invalid params\n");
  3509. return -EINVAL;
  3510. }
  3511. mutex_lock(&panel->panel_lock);
  3512. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3513. if (rc)
  3514. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3515. panel->name, rc);
  3516. mutex_unlock(&panel->panel_lock);
  3517. return rc;
  3518. }
  3519. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3520. {
  3521. int rc = 0;
  3522. if (!panel) {
  3523. DSI_ERR("Invalid params\n");
  3524. return -EINVAL;
  3525. }
  3526. mutex_lock(&panel->panel_lock);
  3527. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3528. if (rc)
  3529. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3530. panel->name, rc);
  3531. mutex_unlock(&panel->panel_lock);
  3532. return rc;
  3533. }
  3534. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3535. {
  3536. int rc = 0;
  3537. if (!panel) {
  3538. DSI_ERR("Invalid params\n");
  3539. return -EINVAL;
  3540. }
  3541. mutex_lock(&panel->panel_lock);
  3542. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3543. if (rc)
  3544. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3545. panel->name, rc);
  3546. mutex_unlock(&panel->panel_lock);
  3547. return rc;
  3548. }
  3549. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3550. {
  3551. int rc = 0;
  3552. if (!panel) {
  3553. DSI_ERR("Invalid params\n");
  3554. return -EINVAL;
  3555. }
  3556. mutex_lock(&panel->panel_lock);
  3557. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3558. if (rc)
  3559. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3560. panel->name, rc);
  3561. mutex_unlock(&panel->panel_lock);
  3562. return rc;
  3563. }
  3564. int dsi_panel_switch(struct dsi_panel *panel)
  3565. {
  3566. int rc = 0;
  3567. if (!panel) {
  3568. DSI_ERR("Invalid params\n");
  3569. return -EINVAL;
  3570. }
  3571. mutex_lock(&panel->panel_lock);
  3572. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3573. if (rc)
  3574. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3575. panel->name, rc);
  3576. mutex_unlock(&panel->panel_lock);
  3577. return rc;
  3578. }
  3579. int dsi_panel_post_switch(struct dsi_panel *panel)
  3580. {
  3581. int rc = 0;
  3582. if (!panel) {
  3583. DSI_ERR("Invalid params\n");
  3584. return -EINVAL;
  3585. }
  3586. mutex_lock(&panel->panel_lock);
  3587. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3588. if (rc)
  3589. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3590. panel->name, rc);
  3591. mutex_unlock(&panel->panel_lock);
  3592. return rc;
  3593. }
  3594. int dsi_panel_enable(struct dsi_panel *panel)
  3595. {
  3596. int rc = 0;
  3597. if (!panel) {
  3598. DSI_ERR("Invalid params\n");
  3599. return -EINVAL;
  3600. }
  3601. mutex_lock(&panel->panel_lock);
  3602. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3603. if (rc)
  3604. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3605. panel->name, rc);
  3606. else
  3607. panel->panel_initialized = true;
  3608. mutex_unlock(&panel->panel_lock);
  3609. return rc;
  3610. }
  3611. int dsi_panel_post_enable(struct dsi_panel *panel)
  3612. {
  3613. int rc = 0;
  3614. if (!panel) {
  3615. DSI_ERR("invalid params\n");
  3616. return -EINVAL;
  3617. }
  3618. mutex_lock(&panel->panel_lock);
  3619. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3620. if (rc) {
  3621. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3622. panel->name, rc);
  3623. goto error;
  3624. }
  3625. error:
  3626. mutex_unlock(&panel->panel_lock);
  3627. return rc;
  3628. }
  3629. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3630. {
  3631. int rc = 0;
  3632. if (!panel) {
  3633. DSI_ERR("invalid params\n");
  3634. return -EINVAL;
  3635. }
  3636. mutex_lock(&panel->panel_lock);
  3637. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3638. if (rc) {
  3639. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3640. panel->name, rc);
  3641. goto error;
  3642. }
  3643. error:
  3644. mutex_unlock(&panel->panel_lock);
  3645. return rc;
  3646. }
  3647. int dsi_panel_disable(struct dsi_panel *panel)
  3648. {
  3649. int rc = 0;
  3650. if (!panel) {
  3651. DSI_ERR("invalid params\n");
  3652. return -EINVAL;
  3653. }
  3654. mutex_lock(&panel->panel_lock);
  3655. /* Avoid sending panel off commands when ESD recovery is underway */
  3656. if (!atomic_read(&panel->esd_recovery_pending)) {
  3657. /*
  3658. * Need to set IBB/AB regulator mode to STANDBY,
  3659. * if panel is going off from AOD mode.
  3660. */
  3661. if (dsi_panel_is_type_oled(panel) &&
  3662. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3663. panel->power_mode == SDE_MODE_DPMS_LP2))
  3664. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3665. "ibb", REGULATOR_MODE_STANDBY);
  3666. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3667. if (rc) {
  3668. /*
  3669. * Sending panel off commands may fail when DSI
  3670. * controller is in a bad state. These failures can be
  3671. * ignored since controller will go for full reset on
  3672. * subsequent display enable anyway.
  3673. */
  3674. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3675. panel->name, rc);
  3676. rc = 0;
  3677. }
  3678. }
  3679. panel->panel_initialized = false;
  3680. panel->power_mode = SDE_MODE_DPMS_OFF;
  3681. mutex_unlock(&panel->panel_lock);
  3682. return rc;
  3683. }
  3684. int dsi_panel_unprepare(struct dsi_panel *panel)
  3685. {
  3686. int rc = 0;
  3687. if (!panel) {
  3688. DSI_ERR("invalid params\n");
  3689. return -EINVAL;
  3690. }
  3691. mutex_lock(&panel->panel_lock);
  3692. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3693. if (rc) {
  3694. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3695. panel->name, rc);
  3696. goto error;
  3697. }
  3698. error:
  3699. mutex_unlock(&panel->panel_lock);
  3700. return rc;
  3701. }
  3702. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3703. {
  3704. int rc = 0;
  3705. if (!panel) {
  3706. DSI_ERR("invalid params\n");
  3707. return -EINVAL;
  3708. }
  3709. mutex_lock(&panel->panel_lock);
  3710. rc = dsi_panel_power_off(panel);
  3711. if (rc) {
  3712. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3713. panel->name, rc);
  3714. goto error;
  3715. }
  3716. error:
  3717. mutex_unlock(&panel->panel_lock);
  3718. return rc;
  3719. }