sm6150.c 261 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/soc/qcom/fsa4480-i2c.h>
  17. #include <sound/core.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/info.h>
  23. #include <soc/snd_event.h>
  24. #include <soc/qcom/socinfo.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include <asoc/msm-cdc-pinctrl.h>
  30. #include "codecs/wcd934x/wcd934x.h"
  31. #include "codecs/wcd9335.h"
  32. #include "codecs/wcd934x/wcd934x-mbhc.h"
  33. #include "codecs/wcd937x/wcd937x-mbhc.h"
  34. #include "codecs/wsa881x.h"
  35. #include "codecs/bolero/bolero-cdc.h"
  36. #include <dt-bindings/sound/audio-codec-port-types.h>
  37. #include "codecs/bolero/wsa-macro.h"
  38. #include "codecs/wcd937x/wcd937x.h"
  39. #define DRV_NAME "sm6150-asoc-snd"
  40. #define __CHIPSET__ "SM6150 "
  41. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  42. #define SAMPLING_RATE_8KHZ 8000
  43. #define SAMPLING_RATE_11P025KHZ 11025
  44. #define SAMPLING_RATE_16KHZ 16000
  45. #define SAMPLING_RATE_22P05KHZ 22050
  46. #define SAMPLING_RATE_32KHZ 32000
  47. #define SAMPLING_RATE_44P1KHZ 44100
  48. #define SAMPLING_RATE_48KHZ 48000
  49. #define SAMPLING_RATE_88P2KHZ 88200
  50. #define SAMPLING_RATE_96KHZ 96000
  51. #define SAMPLING_RATE_176P4KHZ 176400
  52. #define SAMPLING_RATE_192KHZ 192000
  53. #define SAMPLING_RATE_352P8KHZ 352800
  54. #define SAMPLING_RATE_384KHZ 384000
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define WCD9XXX_MBHC_DEF_RLOADS 5
  57. #define CODEC_EXT_CLK_RATE 9600000
  58. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  59. #define DEV_NAME_STR_LEN 32
  60. #define WSA8810_NAME_1 "wsa881x.20170211"
  61. #define WSA8810_NAME_2 "wsa881x.20170212"
  62. #define WCN_CDC_SLIM_RX_CH_MAX 2
  63. #define WCN_CDC_SLIM_TX_CH_MAX 3
  64. #define TDM_CHANNEL_MAX 8
  65. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  66. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  67. #define MSM_HIFI_ON 1
  68. #define SM6150_SOC_VERSION_1_0 0x00010000
  69. #define SM6150_SOC_MSM_ID 0x163
  70. enum {
  71. SLIM_RX_0 = 0,
  72. SLIM_RX_1,
  73. SLIM_RX_2,
  74. SLIM_RX_3,
  75. SLIM_RX_4,
  76. SLIM_RX_5,
  77. SLIM_RX_6,
  78. SLIM_RX_7,
  79. SLIM_RX_MAX,
  80. };
  81. enum {
  82. SLIM_TX_0 = 0,
  83. SLIM_TX_1,
  84. SLIM_TX_2,
  85. SLIM_TX_3,
  86. SLIM_TX_4,
  87. SLIM_TX_5,
  88. SLIM_TX_6,
  89. SLIM_TX_7,
  90. SLIM_TX_8,
  91. SLIM_TX_MAX,
  92. };
  93. enum {
  94. PRIM_MI2S = 0,
  95. SEC_MI2S,
  96. TERT_MI2S,
  97. QUAT_MI2S,
  98. QUIN_MI2S,
  99. MI2S_MAX,
  100. };
  101. enum {
  102. PRIM_AUX_PCM = 0,
  103. SEC_AUX_PCM,
  104. TERT_AUX_PCM,
  105. QUAT_AUX_PCM,
  106. QUIN_AUX_PCM,
  107. AUX_PCM_MAX,
  108. };
  109. enum {
  110. TDM_0 = 0,
  111. TDM_1,
  112. TDM_2,
  113. TDM_3,
  114. TDM_4,
  115. TDM_5,
  116. TDM_6,
  117. TDM_7,
  118. TDM_PORT_MAX,
  119. };
  120. enum {
  121. TDM_PRI = 0,
  122. TDM_SEC,
  123. TDM_TERT,
  124. TDM_QUAT,
  125. TDM_QUIN,
  126. TDM_INTERFACE_MAX,
  127. };
  128. struct tdm_port {
  129. u32 mode;
  130. u32 channel;
  131. };
  132. enum {
  133. WSA_CDC_DMA_RX_0 = 0,
  134. WSA_CDC_DMA_RX_1,
  135. RX_CDC_DMA_RX_0,
  136. RX_CDC_DMA_RX_1,
  137. RX_CDC_DMA_RX_2,
  138. RX_CDC_DMA_RX_3,
  139. RX_CDC_DMA_RX_5,
  140. CDC_DMA_RX_MAX,
  141. };
  142. enum {
  143. WSA_CDC_DMA_TX_0 = 0,
  144. WSA_CDC_DMA_TX_1,
  145. WSA_CDC_DMA_TX_2,
  146. TX_CDC_DMA_TX_0,
  147. TX_CDC_DMA_TX_3,
  148. TX_CDC_DMA_TX_4,
  149. CDC_DMA_TX_MAX,
  150. };
  151. struct mi2s_conf {
  152. struct mutex lock;
  153. u32 ref_cnt;
  154. u32 msm_is_mi2s_master;
  155. u32 msm_is_ext_mclk;
  156. };
  157. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  158. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  159. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  160. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  161. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  162. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  163. };
  164. struct dev_config {
  165. u32 sample_rate;
  166. u32 bit_format;
  167. u32 channels;
  168. };
  169. enum {
  170. DP_RX_IDX = 0,
  171. EXT_DISP_RX_IDX_MAX,
  172. };
  173. struct msm_wsa881x_dev_info {
  174. struct device_node *of_node;
  175. u32 index;
  176. };
  177. struct aux_codec_dev_info {
  178. struct device_node *of_node;
  179. u32 index;
  180. };
  181. struct msm_asoc_mach_data {
  182. struct snd_info_entry *codec_root;
  183. int usbc_en2_gpio; /* used by gpio driver API */
  184. struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
  185. int hph_en1_gpio;
  186. int hph_en0_gpio;
  187. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  188. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  189. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  190. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  191. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  192. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  193. bool is_afe_config_done;
  194. struct device_node *fsa_handle;
  195. };
  196. struct msm_asoc_wcd93xx_codec {
  197. void* (*get_afe_config_fn)(struct snd_soc_component *component,
  198. enum afe_config_type config_type);
  199. };
  200. static struct snd_soc_card snd_soc_card_sm6150_msm;
  201. /* TDM default config */
  202. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  203. { /* PRI TDM */
  204. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  205. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  206. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  207. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  208. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  209. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  210. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  211. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  212. },
  213. { /* SEC TDM */
  214. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  215. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  216. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  222. },
  223. { /* TERT TDM */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  232. },
  233. { /* QUAT TDM */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  242. },
  243. { /* QUIN TDM */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  252. }
  253. };
  254. /* TDM default config */
  255. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  256. { /* PRI TDM */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  265. },
  266. { /* SEC TDM */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  275. },
  276. { /* TERT TDM */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  285. },
  286. { /* QUAT TDM */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  295. },
  296. { /* QUIN TDM */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  305. }
  306. };
  307. /* Default configuration of slimbus channels */
  308. static struct dev_config slim_rx_cfg[] = {
  309. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  310. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  311. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  312. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  313. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  314. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  315. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  316. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  317. };
  318. static struct dev_config slim_tx_cfg[] = {
  319. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  320. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  321. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  322. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  328. };
  329. /* Default configuration of Codec DMA Interface Tx */
  330. static struct dev_config cdc_dma_rx_cfg[] = {
  331. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  332. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  333. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  334. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  335. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  336. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  337. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  338. };
  339. /* Default configuration of Codec DMA Interface Rx */
  340. static struct dev_config cdc_dma_tx_cfg[] = {
  341. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  342. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  343. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. };
  348. /* Default configuration of external display BE */
  349. static struct dev_config ext_disp_rx_cfg[] = {
  350. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. };
  352. static struct dev_config usb_rx_cfg = {
  353. .sample_rate = SAMPLING_RATE_48KHZ,
  354. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  355. .channels = 2,
  356. };
  357. static struct dev_config usb_tx_cfg = {
  358. .sample_rate = SAMPLING_RATE_48KHZ,
  359. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  360. .channels = 1,
  361. };
  362. static struct dev_config proxy_rx_cfg = {
  363. .sample_rate = SAMPLING_RATE_48KHZ,
  364. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  365. .channels = 2,
  366. };
  367. /* Default configuration of MI2S channels */
  368. static struct dev_config mi2s_rx_cfg[] = {
  369. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  370. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  371. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  372. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  373. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  374. };
  375. static struct dev_config mi2s_tx_cfg[] = {
  376. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  377. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  378. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  379. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  380. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  381. };
  382. static struct dev_config aux_pcm_rx_cfg[] = {
  383. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  384. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  385. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  386. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  387. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  388. };
  389. static struct dev_config aux_pcm_tx_cfg[] = {
  390. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. };
  396. static int msm_vi_feed_tx_ch = 2;
  397. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  398. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  399. "Five", "Six", "Seven",
  400. "Eight"};
  401. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  402. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  403. "S32_LE"};
  404. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  405. "S24_3LE"};
  406. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  407. "KHZ_32", "KHZ_44P1", "KHZ_48",
  408. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  409. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  410. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  411. "KHZ_44P1", "KHZ_48",
  412. "KHZ_88P2", "KHZ_96"};
  413. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  414. "KHZ_44P1", "KHZ_48",
  415. "KHZ_88P2", "KHZ_96"};
  416. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  417. "KHZ_44P1", "KHZ_48",
  418. "KHZ_88P2", "KHZ_96"};
  419. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  420. "Five", "Six", "Seven",
  421. "Eight"};
  422. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  423. "Six", "Seven", "Eight"};
  424. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  425. "KHZ_16", "KHZ_22P05",
  426. "KHZ_32", "KHZ_44P1", "KHZ_48",
  427. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  428. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  429. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  430. "KHZ_192", "KHZ_32", "KHZ_44P1",
  431. "KHZ_88P2", "KHZ_176P4" };
  432. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  433. "Five", "Six", "Seven", "Eight"};
  434. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  435. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  436. "KHZ_48", "KHZ_176P4",
  437. "KHZ_352P8"};
  438. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  439. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  440. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  441. "KHZ_48", "KHZ_96", "KHZ_192"};
  442. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  443. "Five", "Six", "Seven",
  444. "Eight"};
  445. static const char *const hifi_text[] = {"Off", "On"};
  446. static const char *const qos_text[] = {"Disable", "Enable"};
  447. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  448. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  449. "Five", "Six", "Seven",
  450. "Eight"};
  451. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  452. "KHZ_16", "KHZ_22P05",
  453. "KHZ_32", "KHZ_44P1", "KHZ_48",
  454. "KHZ_88P2", "KHZ_96",
  455. "KHZ_176P4", "KHZ_192",
  456. "KHZ_352P8", "KHZ_384"};
  457. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  459. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  461. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  463. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  486. ext_disp_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  554. cdc_dma_sample_rate_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  556. cdc_dma_sample_rate_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  558. cdc_dma_sample_rate_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  560. cdc_dma_sample_rate_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  562. cdc_dma_sample_rate_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  564. cdc_dma_sample_rate_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  566. cdc_dma_sample_rate_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  568. cdc_dma_sample_rate_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static int msm_hifi_control;
  580. static bool codec_reg_done;
  581. static struct snd_soc_aux_dev *msm_aux_dev;
  582. static struct snd_soc_codec_conf *msm_codec_conf;
  583. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  584. static int dmic_0_1_gpio_cnt;
  585. static int dmic_2_3_gpio_cnt;
  586. static void *def_wcd_mbhc_cal(void);
  587. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  588. int enable, bool dapm);
  589. static int msm_wsa881x_init(struct snd_soc_component *component);
  590. static int msm_aux_codec_init(struct snd_soc_component *component);
  591. /*
  592. * Need to report LINEIN
  593. * if R/L channel impedance is larger than 5K ohm
  594. */
  595. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  596. .read_fw_bin = false,
  597. .calibration = NULL,
  598. .detect_extn_cable = true,
  599. .mono_stero_detection = false,
  600. .swap_gnd_mic = NULL,
  601. .hs_ext_micbias = true,
  602. .key_code[0] = KEY_MEDIA,
  603. .key_code[1] = KEY_VOICECOMMAND,
  604. .key_code[2] = KEY_VOLUMEUP,
  605. .key_code[3] = KEY_VOLUMEDOWN,
  606. .key_code[4] = 0,
  607. .key_code[5] = 0,
  608. .key_code[6] = 0,
  609. .key_code[7] = 0,
  610. .linein_th = 5000,
  611. .moisture_en = false,
  612. .mbhc_micbias = MIC_BIAS_2,
  613. .anc_micbias = MIC_BIAS_2,
  614. .enable_anc_mic_detect = false,
  615. .moisture_duty_cycle_en = true,
  616. };
  617. static struct snd_soc_dapm_route wcd_audio_paths[] = {
  618. {"MIC BIAS1", NULL, "MCLK TX"},
  619. {"MIC BIAS2", NULL, "MCLK TX"},
  620. {"MIC BIAS3", NULL, "MCLK TX"},
  621. {"MIC BIAS4", NULL, "MCLK TX"},
  622. };
  623. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  624. {
  625. AFE_API_VERSION_I2S_CONFIG,
  626. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  627. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  628. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  629. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  630. 0,
  631. },
  632. {
  633. AFE_API_VERSION_I2S_CONFIG,
  634. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  635. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  636. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  637. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  638. 0,
  639. },
  640. {
  641. AFE_API_VERSION_I2S_CONFIG,
  642. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  643. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  644. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  645. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  646. 0,
  647. },
  648. {
  649. AFE_API_VERSION_I2S_CONFIG,
  650. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  651. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  652. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  653. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  654. 0,
  655. },
  656. {
  657. AFE_API_VERSION_I2S_CONFIG,
  658. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  659. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  660. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  661. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  662. 0,
  663. }
  664. };
  665. static struct afe_clk_set mi2s_mclk[MI2S_MAX] = {
  666. {
  667. AFE_API_VERSION_I2S_CONFIG,
  668. Q6AFE_LPASS_CLK_ID_MCLK_3,
  669. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  670. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  671. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  672. 0,
  673. },
  674. {
  675. AFE_API_VERSION_I2S_CONFIG,
  676. Q6AFE_LPASS_CLK_ID_MCLK_2,
  677. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  678. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  679. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  680. 0,
  681. },
  682. {
  683. AFE_API_VERSION_I2S_CONFIG,
  684. Q6AFE_LPASS_CLK_ID_MCLK_1,
  685. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  686. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  687. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  688. 0,
  689. },
  690. {
  691. AFE_API_VERSION_I2S_CONFIG,
  692. Q6AFE_LPASS_CLK_ID_MCLK_1,
  693. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  694. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  695. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  696. 0,
  697. },
  698. {
  699. AFE_API_VERSION_I2S_CONFIG,
  700. Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR,
  701. Q6AFE_LPASS_OSR_CLK_9_P600_MHZ,
  702. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  703. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  704. 0,
  705. }
  706. };
  707. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  708. static int slim_get_sample_rate_val(int sample_rate)
  709. {
  710. int sample_rate_val = 0;
  711. switch (sample_rate) {
  712. case SAMPLING_RATE_8KHZ:
  713. sample_rate_val = 0;
  714. break;
  715. case SAMPLING_RATE_16KHZ:
  716. sample_rate_val = 1;
  717. break;
  718. case SAMPLING_RATE_32KHZ:
  719. sample_rate_val = 2;
  720. break;
  721. case SAMPLING_RATE_44P1KHZ:
  722. sample_rate_val = 3;
  723. break;
  724. case SAMPLING_RATE_48KHZ:
  725. sample_rate_val = 4;
  726. break;
  727. case SAMPLING_RATE_88P2KHZ:
  728. sample_rate_val = 5;
  729. break;
  730. case SAMPLING_RATE_96KHZ:
  731. sample_rate_val = 6;
  732. break;
  733. case SAMPLING_RATE_176P4KHZ:
  734. sample_rate_val = 7;
  735. break;
  736. case SAMPLING_RATE_192KHZ:
  737. sample_rate_val = 8;
  738. break;
  739. case SAMPLING_RATE_352P8KHZ:
  740. sample_rate_val = 9;
  741. break;
  742. case SAMPLING_RATE_384KHZ:
  743. sample_rate_val = 10;
  744. break;
  745. default:
  746. sample_rate_val = 4;
  747. break;
  748. }
  749. return sample_rate_val;
  750. }
  751. static int slim_get_sample_rate(int value)
  752. {
  753. int sample_rate = 0;
  754. switch (value) {
  755. case 0:
  756. sample_rate = SAMPLING_RATE_8KHZ;
  757. break;
  758. case 1:
  759. sample_rate = SAMPLING_RATE_16KHZ;
  760. break;
  761. case 2:
  762. sample_rate = SAMPLING_RATE_32KHZ;
  763. break;
  764. case 3:
  765. sample_rate = SAMPLING_RATE_44P1KHZ;
  766. break;
  767. case 4:
  768. sample_rate = SAMPLING_RATE_48KHZ;
  769. break;
  770. case 5:
  771. sample_rate = SAMPLING_RATE_88P2KHZ;
  772. break;
  773. case 6:
  774. sample_rate = SAMPLING_RATE_96KHZ;
  775. break;
  776. case 7:
  777. sample_rate = SAMPLING_RATE_176P4KHZ;
  778. break;
  779. case 8:
  780. sample_rate = SAMPLING_RATE_192KHZ;
  781. break;
  782. case 9:
  783. sample_rate = SAMPLING_RATE_352P8KHZ;
  784. break;
  785. case 10:
  786. sample_rate = SAMPLING_RATE_384KHZ;
  787. break;
  788. default:
  789. sample_rate = SAMPLING_RATE_48KHZ;
  790. break;
  791. }
  792. return sample_rate;
  793. }
  794. static int slim_get_bit_format_val(int bit_format)
  795. {
  796. int val = 0;
  797. switch (bit_format) {
  798. case SNDRV_PCM_FORMAT_S32_LE:
  799. val = 3;
  800. break;
  801. case SNDRV_PCM_FORMAT_S24_3LE:
  802. val = 2;
  803. break;
  804. case SNDRV_PCM_FORMAT_S24_LE:
  805. val = 1;
  806. break;
  807. case SNDRV_PCM_FORMAT_S16_LE:
  808. default:
  809. val = 0;
  810. break;
  811. }
  812. return val;
  813. }
  814. static int slim_get_bit_format(int val)
  815. {
  816. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  817. switch (val) {
  818. case 0:
  819. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  820. break;
  821. case 1:
  822. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  823. break;
  824. case 2:
  825. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  826. break;
  827. case 3:
  828. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  829. break;
  830. default:
  831. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  832. break;
  833. }
  834. return bit_fmt;
  835. }
  836. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  837. {
  838. int port_id = 0;
  839. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  840. port_id = SLIM_RX_0;
  841. } else if (strnstr(kcontrol->id.name,
  842. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  843. port_id = SLIM_RX_2;
  844. } else if (strnstr(kcontrol->id.name,
  845. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  846. port_id = SLIM_RX_5;
  847. } else if (strnstr(kcontrol->id.name,
  848. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  849. port_id = SLIM_RX_6;
  850. } else if (strnstr(kcontrol->id.name,
  851. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  852. port_id = SLIM_TX_0;
  853. } else if (strnstr(kcontrol->id.name,
  854. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  855. port_id = SLIM_TX_1;
  856. } else {
  857. pr_err("%s: unsupported channel: %s\n",
  858. __func__, kcontrol->id.name);
  859. return -EINVAL;
  860. }
  861. return port_id;
  862. }
  863. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  864. struct snd_ctl_elem_value *ucontrol)
  865. {
  866. int ch_num = slim_get_port_idx(kcontrol);
  867. if (ch_num < 0)
  868. return ch_num;
  869. ucontrol->value.enumerated.item[0] =
  870. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  871. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  872. ch_num, slim_rx_cfg[ch_num].sample_rate,
  873. ucontrol->value.enumerated.item[0]);
  874. return 0;
  875. }
  876. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  877. struct snd_ctl_elem_value *ucontrol)
  878. {
  879. int ch_num = slim_get_port_idx(kcontrol);
  880. if (ch_num < 0)
  881. return ch_num;
  882. slim_rx_cfg[ch_num].sample_rate =
  883. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  884. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  885. ch_num, slim_rx_cfg[ch_num].sample_rate,
  886. ucontrol->value.enumerated.item[0]);
  887. return 0;
  888. }
  889. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  890. struct snd_ctl_elem_value *ucontrol)
  891. {
  892. int ch_num = slim_get_port_idx(kcontrol);
  893. if (ch_num < 0)
  894. return ch_num;
  895. ucontrol->value.enumerated.item[0] =
  896. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  897. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  898. ch_num, slim_tx_cfg[ch_num].sample_rate,
  899. ucontrol->value.enumerated.item[0]);
  900. return 0;
  901. }
  902. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  903. struct snd_ctl_elem_value *ucontrol)
  904. {
  905. int sample_rate = 0;
  906. int ch_num = slim_get_port_idx(kcontrol);
  907. if (ch_num < 0)
  908. return ch_num;
  909. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  910. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  911. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  912. __func__, sample_rate);
  913. return -EINVAL;
  914. }
  915. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  916. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  917. ch_num, slim_tx_cfg[ch_num].sample_rate,
  918. ucontrol->value.enumerated.item[0]);
  919. return 0;
  920. }
  921. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  922. struct snd_ctl_elem_value *ucontrol)
  923. {
  924. int ch_num = slim_get_port_idx(kcontrol);
  925. if (ch_num < 0)
  926. return ch_num;
  927. ucontrol->value.enumerated.item[0] =
  928. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  929. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  930. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  931. ucontrol->value.enumerated.item[0]);
  932. return 0;
  933. }
  934. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  935. struct snd_ctl_elem_value *ucontrol)
  936. {
  937. int ch_num = slim_get_port_idx(kcontrol);
  938. if (ch_num < 0)
  939. return ch_num;
  940. slim_rx_cfg[ch_num].bit_format =
  941. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  942. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  943. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  944. ucontrol->value.enumerated.item[0]);
  945. return 0;
  946. }
  947. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  948. struct snd_ctl_elem_value *ucontrol)
  949. {
  950. int ch_num = slim_get_port_idx(kcontrol);
  951. if (ch_num < 0)
  952. return ch_num;
  953. ucontrol->value.enumerated.item[0] =
  954. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  955. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  956. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  957. ucontrol->value.enumerated.item[0]);
  958. return 0;
  959. }
  960. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  961. struct snd_ctl_elem_value *ucontrol)
  962. {
  963. int ch_num = slim_get_port_idx(kcontrol);
  964. if (ch_num < 0)
  965. return ch_num;
  966. slim_tx_cfg[ch_num].bit_format =
  967. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  968. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  969. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  970. ucontrol->value.enumerated.item[0]);
  971. return 0;
  972. }
  973. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  974. struct snd_ctl_elem_value *ucontrol)
  975. {
  976. int ch_num = slim_get_port_idx(kcontrol);
  977. if (ch_num < 0)
  978. return ch_num;
  979. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  980. ch_num, slim_rx_cfg[ch_num].channels);
  981. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  982. return 0;
  983. }
  984. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  985. struct snd_ctl_elem_value *ucontrol)
  986. {
  987. int ch_num = slim_get_port_idx(kcontrol);
  988. if (ch_num < 0)
  989. return ch_num;
  990. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  991. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  992. ch_num, slim_rx_cfg[ch_num].channels);
  993. return 1;
  994. }
  995. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  996. struct snd_ctl_elem_value *ucontrol)
  997. {
  998. int ch_num = slim_get_port_idx(kcontrol);
  999. if (ch_num < 0)
  1000. return ch_num;
  1001. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  1002. ch_num, slim_tx_cfg[ch_num].channels);
  1003. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  1004. return 0;
  1005. }
  1006. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  1007. struct snd_ctl_elem_value *ucontrol)
  1008. {
  1009. int ch_num = slim_get_port_idx(kcontrol);
  1010. if (ch_num < 0)
  1011. return ch_num;
  1012. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  1013. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  1014. ch_num, slim_tx_cfg[ch_num].channels);
  1015. return 1;
  1016. }
  1017. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  1018. struct snd_ctl_elem_value *ucontrol)
  1019. {
  1020. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  1021. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  1022. ucontrol->value.integer.value[0]);
  1023. return 0;
  1024. }
  1025. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  1026. struct snd_ctl_elem_value *ucontrol)
  1027. {
  1028. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  1029. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  1030. return 1;
  1031. }
  1032. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1033. struct snd_ctl_elem_value *ucontrol)
  1034. {
  1035. /*
  1036. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1037. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1038. * value.
  1039. */
  1040. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1041. case SAMPLING_RATE_96KHZ:
  1042. ucontrol->value.integer.value[0] = 5;
  1043. break;
  1044. case SAMPLING_RATE_88P2KHZ:
  1045. ucontrol->value.integer.value[0] = 4;
  1046. break;
  1047. case SAMPLING_RATE_48KHZ:
  1048. ucontrol->value.integer.value[0] = 3;
  1049. break;
  1050. case SAMPLING_RATE_44P1KHZ:
  1051. ucontrol->value.integer.value[0] = 2;
  1052. break;
  1053. case SAMPLING_RATE_16KHZ:
  1054. ucontrol->value.integer.value[0] = 1;
  1055. break;
  1056. case SAMPLING_RATE_8KHZ:
  1057. default:
  1058. ucontrol->value.integer.value[0] = 0;
  1059. break;
  1060. }
  1061. pr_debug("%s: sample rate = %d\n", __func__,
  1062. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1063. return 0;
  1064. }
  1065. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1066. struct snd_ctl_elem_value *ucontrol)
  1067. {
  1068. switch (ucontrol->value.integer.value[0]) {
  1069. case 1:
  1070. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1071. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1072. break;
  1073. case 2:
  1074. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1075. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1076. break;
  1077. case 3:
  1078. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1079. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1080. break;
  1081. case 4:
  1082. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1083. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1084. break;
  1085. case 5:
  1086. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1087. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1088. break;
  1089. case 0:
  1090. default:
  1091. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1092. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1093. break;
  1094. }
  1095. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1096. __func__,
  1097. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1098. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1099. ucontrol->value.enumerated.item[0]);
  1100. return 0;
  1101. }
  1102. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1103. struct snd_ctl_elem_value *ucontrol)
  1104. {
  1105. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1106. case SAMPLING_RATE_96KHZ:
  1107. ucontrol->value.integer.value[0] = 5;
  1108. break;
  1109. case SAMPLING_RATE_88P2KHZ:
  1110. ucontrol->value.integer.value[0] = 4;
  1111. break;
  1112. case SAMPLING_RATE_48KHZ:
  1113. ucontrol->value.integer.value[0] = 3;
  1114. break;
  1115. case SAMPLING_RATE_44P1KHZ:
  1116. ucontrol->value.integer.value[0] = 2;
  1117. break;
  1118. case SAMPLING_RATE_16KHZ:
  1119. ucontrol->value.integer.value[0] = 1;
  1120. break;
  1121. case SAMPLING_RATE_8KHZ:
  1122. default:
  1123. ucontrol->value.integer.value[0] = 0;
  1124. break;
  1125. }
  1126. pr_debug("%s: sample rate rx = %d", __func__,
  1127. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1128. return 0;
  1129. }
  1130. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1131. struct snd_ctl_elem_value *ucontrol)
  1132. {
  1133. switch (ucontrol->value.integer.value[0]) {
  1134. case 1:
  1135. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1136. break;
  1137. case 2:
  1138. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1139. break;
  1140. case 3:
  1141. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1142. break;
  1143. case 4:
  1144. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1145. break;
  1146. case 5:
  1147. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1148. break;
  1149. case 0:
  1150. default:
  1151. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1152. break;
  1153. }
  1154. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1155. __func__,
  1156. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1157. ucontrol->value.enumerated.item[0]);
  1158. return 0;
  1159. }
  1160. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1161. struct snd_ctl_elem_value *ucontrol)
  1162. {
  1163. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1164. case SAMPLING_RATE_96KHZ:
  1165. ucontrol->value.integer.value[0] = 5;
  1166. break;
  1167. case SAMPLING_RATE_88P2KHZ:
  1168. ucontrol->value.integer.value[0] = 4;
  1169. break;
  1170. case SAMPLING_RATE_48KHZ:
  1171. ucontrol->value.integer.value[0] = 3;
  1172. break;
  1173. case SAMPLING_RATE_44P1KHZ:
  1174. ucontrol->value.integer.value[0] = 2;
  1175. break;
  1176. case SAMPLING_RATE_16KHZ:
  1177. ucontrol->value.integer.value[0] = 1;
  1178. break;
  1179. case SAMPLING_RATE_8KHZ:
  1180. default:
  1181. ucontrol->value.integer.value[0] = 0;
  1182. break;
  1183. }
  1184. pr_debug("%s: sample rate tx = %d", __func__,
  1185. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1186. return 0;
  1187. }
  1188. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1189. struct snd_ctl_elem_value *ucontrol)
  1190. {
  1191. switch (ucontrol->value.integer.value[0]) {
  1192. case 1:
  1193. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1194. break;
  1195. case 2:
  1196. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1197. break;
  1198. case 3:
  1199. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1200. break;
  1201. case 4:
  1202. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1203. break;
  1204. case 5:
  1205. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1206. break;
  1207. case 0:
  1208. default:
  1209. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1210. break;
  1211. }
  1212. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1213. __func__,
  1214. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1215. ucontrol->value.enumerated.item[0]);
  1216. return 0;
  1217. }
  1218. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1219. {
  1220. int idx = 0;
  1221. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1222. sizeof("WSA_CDC_DMA_RX_0")))
  1223. idx = WSA_CDC_DMA_RX_0;
  1224. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1225. sizeof("WSA_CDC_DMA_RX_0")))
  1226. idx = WSA_CDC_DMA_RX_1;
  1227. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1228. sizeof("RX_CDC_DMA_RX_0")))
  1229. idx = RX_CDC_DMA_RX_0;
  1230. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1231. sizeof("RX_CDC_DMA_RX_1")))
  1232. idx = RX_CDC_DMA_RX_1;
  1233. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1234. sizeof("RX_CDC_DMA_RX_2")))
  1235. idx = RX_CDC_DMA_RX_2;
  1236. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1237. sizeof("RX_CDC_DMA_RX_3")))
  1238. idx = RX_CDC_DMA_RX_3;
  1239. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1240. sizeof("RX_CDC_DMA_RX_5")))
  1241. idx = RX_CDC_DMA_RX_5;
  1242. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1243. sizeof("WSA_CDC_DMA_TX_0")))
  1244. idx = WSA_CDC_DMA_TX_0;
  1245. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1246. sizeof("WSA_CDC_DMA_TX_1")))
  1247. idx = WSA_CDC_DMA_TX_1;
  1248. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1249. sizeof("WSA_CDC_DMA_TX_2")))
  1250. idx = WSA_CDC_DMA_TX_2;
  1251. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1252. sizeof("TX_CDC_DMA_TX_0")))
  1253. idx = TX_CDC_DMA_TX_0;
  1254. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1255. sizeof("TX_CDC_DMA_TX_3")))
  1256. idx = TX_CDC_DMA_TX_3;
  1257. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1258. sizeof("TX_CDC_DMA_TX_4")))
  1259. idx = TX_CDC_DMA_TX_4;
  1260. else {
  1261. pr_err("%s: unsupported channel: %s\n",
  1262. __func__, kcontrol->id.name);
  1263. return -EINVAL;
  1264. }
  1265. return idx;
  1266. }
  1267. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1268. struct snd_ctl_elem_value *ucontrol)
  1269. {
  1270. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1271. if (ch_num < 0) {
  1272. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1273. return ch_num;
  1274. }
  1275. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1276. cdc_dma_rx_cfg[ch_num].channels - 1);
  1277. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1278. return 0;
  1279. }
  1280. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1281. struct snd_ctl_elem_value *ucontrol)
  1282. {
  1283. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1284. if (ch_num < 0) {
  1285. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1286. return ch_num;
  1287. }
  1288. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1289. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1290. cdc_dma_rx_cfg[ch_num].channels);
  1291. return 1;
  1292. }
  1293. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1294. struct snd_ctl_elem_value *ucontrol)
  1295. {
  1296. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1297. if (ch_num < 0) {
  1298. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1299. return ch_num;
  1300. }
  1301. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1302. case SNDRV_PCM_FORMAT_S32_LE:
  1303. ucontrol->value.integer.value[0] = 3;
  1304. break;
  1305. case SNDRV_PCM_FORMAT_S24_3LE:
  1306. ucontrol->value.integer.value[0] = 2;
  1307. break;
  1308. case SNDRV_PCM_FORMAT_S24_LE:
  1309. ucontrol->value.integer.value[0] = 1;
  1310. break;
  1311. case SNDRV_PCM_FORMAT_S16_LE:
  1312. default:
  1313. ucontrol->value.integer.value[0] = 0;
  1314. break;
  1315. }
  1316. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1317. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1318. ucontrol->value.integer.value[0]);
  1319. return 0;
  1320. }
  1321. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1322. struct snd_ctl_elem_value *ucontrol)
  1323. {
  1324. int rc = 0;
  1325. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1326. if (ch_num < 0) {
  1327. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1328. return ch_num;
  1329. }
  1330. switch (ucontrol->value.integer.value[0]) {
  1331. case 3:
  1332. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1333. break;
  1334. case 2:
  1335. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1336. break;
  1337. case 1:
  1338. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1339. break;
  1340. case 0:
  1341. default:
  1342. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1343. break;
  1344. }
  1345. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1346. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1347. ucontrol->value.integer.value[0]);
  1348. return rc;
  1349. }
  1350. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1351. {
  1352. int sample_rate_val = 0;
  1353. switch (sample_rate) {
  1354. case SAMPLING_RATE_8KHZ:
  1355. sample_rate_val = 0;
  1356. break;
  1357. case SAMPLING_RATE_11P025KHZ:
  1358. sample_rate_val = 1;
  1359. break;
  1360. case SAMPLING_RATE_16KHZ:
  1361. sample_rate_val = 2;
  1362. break;
  1363. case SAMPLING_RATE_22P05KHZ:
  1364. sample_rate_val = 3;
  1365. break;
  1366. case SAMPLING_RATE_32KHZ:
  1367. sample_rate_val = 4;
  1368. break;
  1369. case SAMPLING_RATE_44P1KHZ:
  1370. sample_rate_val = 5;
  1371. break;
  1372. case SAMPLING_RATE_48KHZ:
  1373. sample_rate_val = 6;
  1374. break;
  1375. case SAMPLING_RATE_88P2KHZ:
  1376. sample_rate_val = 7;
  1377. break;
  1378. case SAMPLING_RATE_96KHZ:
  1379. sample_rate_val = 8;
  1380. break;
  1381. case SAMPLING_RATE_176P4KHZ:
  1382. sample_rate_val = 9;
  1383. break;
  1384. case SAMPLING_RATE_192KHZ:
  1385. sample_rate_val = 10;
  1386. break;
  1387. case SAMPLING_RATE_352P8KHZ:
  1388. sample_rate_val = 11;
  1389. break;
  1390. case SAMPLING_RATE_384KHZ:
  1391. sample_rate_val = 12;
  1392. break;
  1393. default:
  1394. sample_rate_val = 6;
  1395. break;
  1396. }
  1397. return sample_rate_val;
  1398. }
  1399. static int cdc_dma_get_sample_rate(int value)
  1400. {
  1401. int sample_rate = 0;
  1402. switch (value) {
  1403. case 0:
  1404. sample_rate = SAMPLING_RATE_8KHZ;
  1405. break;
  1406. case 1:
  1407. sample_rate = SAMPLING_RATE_11P025KHZ;
  1408. break;
  1409. case 2:
  1410. sample_rate = SAMPLING_RATE_16KHZ;
  1411. break;
  1412. case 3:
  1413. sample_rate = SAMPLING_RATE_22P05KHZ;
  1414. break;
  1415. case 4:
  1416. sample_rate = SAMPLING_RATE_32KHZ;
  1417. break;
  1418. case 5:
  1419. sample_rate = SAMPLING_RATE_44P1KHZ;
  1420. break;
  1421. case 6:
  1422. sample_rate = SAMPLING_RATE_48KHZ;
  1423. break;
  1424. case 7:
  1425. sample_rate = SAMPLING_RATE_88P2KHZ;
  1426. break;
  1427. case 8:
  1428. sample_rate = SAMPLING_RATE_96KHZ;
  1429. break;
  1430. case 9:
  1431. sample_rate = SAMPLING_RATE_176P4KHZ;
  1432. break;
  1433. case 10:
  1434. sample_rate = SAMPLING_RATE_192KHZ;
  1435. break;
  1436. case 11:
  1437. sample_rate = SAMPLING_RATE_352P8KHZ;
  1438. break;
  1439. case 12:
  1440. sample_rate = SAMPLING_RATE_384KHZ;
  1441. break;
  1442. default:
  1443. sample_rate = SAMPLING_RATE_48KHZ;
  1444. break;
  1445. }
  1446. return sample_rate;
  1447. }
  1448. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1449. struct snd_ctl_elem_value *ucontrol)
  1450. {
  1451. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1452. if (ch_num < 0) {
  1453. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1454. return ch_num;
  1455. }
  1456. ucontrol->value.enumerated.item[0] =
  1457. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1458. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1459. cdc_dma_rx_cfg[ch_num].sample_rate);
  1460. return 0;
  1461. }
  1462. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1463. struct snd_ctl_elem_value *ucontrol)
  1464. {
  1465. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1466. if (ch_num < 0) {
  1467. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1468. return ch_num;
  1469. }
  1470. cdc_dma_rx_cfg[ch_num].sample_rate =
  1471. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1472. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1473. __func__, ucontrol->value.enumerated.item[0],
  1474. cdc_dma_rx_cfg[ch_num].sample_rate);
  1475. return 0;
  1476. }
  1477. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1478. struct snd_ctl_elem_value *ucontrol)
  1479. {
  1480. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1481. if (ch_num < 0) {
  1482. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1483. return ch_num;
  1484. }
  1485. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1486. cdc_dma_tx_cfg[ch_num].channels);
  1487. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1488. return 0;
  1489. }
  1490. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1491. struct snd_ctl_elem_value *ucontrol)
  1492. {
  1493. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1494. if (ch_num < 0) {
  1495. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1496. return ch_num;
  1497. }
  1498. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1499. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1500. cdc_dma_tx_cfg[ch_num].channels);
  1501. return 1;
  1502. }
  1503. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1504. struct snd_ctl_elem_value *ucontrol)
  1505. {
  1506. int sample_rate_val;
  1507. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1508. if (ch_num < 0) {
  1509. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1510. return ch_num;
  1511. }
  1512. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1513. case SAMPLING_RATE_384KHZ:
  1514. sample_rate_val = 12;
  1515. break;
  1516. case SAMPLING_RATE_352P8KHZ:
  1517. sample_rate_val = 11;
  1518. break;
  1519. case SAMPLING_RATE_192KHZ:
  1520. sample_rate_val = 10;
  1521. break;
  1522. case SAMPLING_RATE_176P4KHZ:
  1523. sample_rate_val = 9;
  1524. break;
  1525. case SAMPLING_RATE_96KHZ:
  1526. sample_rate_val = 8;
  1527. break;
  1528. case SAMPLING_RATE_88P2KHZ:
  1529. sample_rate_val = 7;
  1530. break;
  1531. case SAMPLING_RATE_48KHZ:
  1532. sample_rate_val = 6;
  1533. break;
  1534. case SAMPLING_RATE_44P1KHZ:
  1535. sample_rate_val = 5;
  1536. break;
  1537. case SAMPLING_RATE_32KHZ:
  1538. sample_rate_val = 4;
  1539. break;
  1540. case SAMPLING_RATE_22P05KHZ:
  1541. sample_rate_val = 3;
  1542. break;
  1543. case SAMPLING_RATE_16KHZ:
  1544. sample_rate_val = 2;
  1545. break;
  1546. case SAMPLING_RATE_11P025KHZ:
  1547. sample_rate_val = 1;
  1548. break;
  1549. case SAMPLING_RATE_8KHZ:
  1550. sample_rate_val = 0;
  1551. break;
  1552. default:
  1553. sample_rate_val = 6;
  1554. break;
  1555. }
  1556. ucontrol->value.integer.value[0] = sample_rate_val;
  1557. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1558. cdc_dma_tx_cfg[ch_num].sample_rate);
  1559. return 0;
  1560. }
  1561. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1562. struct snd_ctl_elem_value *ucontrol)
  1563. {
  1564. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1565. if (ch_num < 0) {
  1566. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1567. return ch_num;
  1568. }
  1569. switch (ucontrol->value.integer.value[0]) {
  1570. case 12:
  1571. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1572. break;
  1573. case 11:
  1574. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1575. break;
  1576. case 10:
  1577. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1578. break;
  1579. case 9:
  1580. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1581. break;
  1582. case 8:
  1583. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1584. break;
  1585. case 7:
  1586. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1587. break;
  1588. case 6:
  1589. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1590. break;
  1591. case 5:
  1592. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1593. break;
  1594. case 4:
  1595. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1596. break;
  1597. case 3:
  1598. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1599. break;
  1600. case 2:
  1601. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1602. break;
  1603. case 1:
  1604. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1605. break;
  1606. case 0:
  1607. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1608. break;
  1609. default:
  1610. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1611. break;
  1612. }
  1613. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1614. __func__, ucontrol->value.integer.value[0],
  1615. cdc_dma_tx_cfg[ch_num].sample_rate);
  1616. return 0;
  1617. }
  1618. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1619. struct snd_ctl_elem_value *ucontrol)
  1620. {
  1621. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1622. if (ch_num < 0) {
  1623. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1624. return ch_num;
  1625. }
  1626. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1627. case SNDRV_PCM_FORMAT_S32_LE:
  1628. ucontrol->value.integer.value[0] = 3;
  1629. break;
  1630. case SNDRV_PCM_FORMAT_S24_3LE:
  1631. ucontrol->value.integer.value[0] = 2;
  1632. break;
  1633. case SNDRV_PCM_FORMAT_S24_LE:
  1634. ucontrol->value.integer.value[0] = 1;
  1635. break;
  1636. case SNDRV_PCM_FORMAT_S16_LE:
  1637. default:
  1638. ucontrol->value.integer.value[0] = 0;
  1639. break;
  1640. }
  1641. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1642. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1643. ucontrol->value.integer.value[0]);
  1644. return 0;
  1645. }
  1646. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1647. struct snd_ctl_elem_value *ucontrol)
  1648. {
  1649. int rc = 0;
  1650. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1651. if (ch_num < 0) {
  1652. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1653. return ch_num;
  1654. }
  1655. switch (ucontrol->value.integer.value[0]) {
  1656. case 3:
  1657. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1658. break;
  1659. case 2:
  1660. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1661. break;
  1662. case 1:
  1663. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1664. break;
  1665. case 0:
  1666. default:
  1667. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1668. break;
  1669. }
  1670. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1671. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1672. ucontrol->value.integer.value[0]);
  1673. return rc;
  1674. }
  1675. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1676. struct snd_ctl_elem_value *ucontrol)
  1677. {
  1678. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1679. usb_rx_cfg.channels);
  1680. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1681. return 0;
  1682. }
  1683. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1684. struct snd_ctl_elem_value *ucontrol)
  1685. {
  1686. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1687. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1688. return 1;
  1689. }
  1690. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1691. struct snd_ctl_elem_value *ucontrol)
  1692. {
  1693. int sample_rate_val;
  1694. switch (usb_rx_cfg.sample_rate) {
  1695. case SAMPLING_RATE_384KHZ:
  1696. sample_rate_val = 12;
  1697. break;
  1698. case SAMPLING_RATE_352P8KHZ:
  1699. sample_rate_val = 11;
  1700. break;
  1701. case SAMPLING_RATE_192KHZ:
  1702. sample_rate_val = 10;
  1703. break;
  1704. case SAMPLING_RATE_176P4KHZ:
  1705. sample_rate_val = 9;
  1706. break;
  1707. case SAMPLING_RATE_96KHZ:
  1708. sample_rate_val = 8;
  1709. break;
  1710. case SAMPLING_RATE_88P2KHZ:
  1711. sample_rate_val = 7;
  1712. break;
  1713. case SAMPLING_RATE_48KHZ:
  1714. sample_rate_val = 6;
  1715. break;
  1716. case SAMPLING_RATE_44P1KHZ:
  1717. sample_rate_val = 5;
  1718. break;
  1719. case SAMPLING_RATE_32KHZ:
  1720. sample_rate_val = 4;
  1721. break;
  1722. case SAMPLING_RATE_22P05KHZ:
  1723. sample_rate_val = 3;
  1724. break;
  1725. case SAMPLING_RATE_16KHZ:
  1726. sample_rate_val = 2;
  1727. break;
  1728. case SAMPLING_RATE_11P025KHZ:
  1729. sample_rate_val = 1;
  1730. break;
  1731. case SAMPLING_RATE_8KHZ:
  1732. default:
  1733. sample_rate_val = 0;
  1734. break;
  1735. }
  1736. ucontrol->value.integer.value[0] = sample_rate_val;
  1737. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1738. usb_rx_cfg.sample_rate);
  1739. return 0;
  1740. }
  1741. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1742. struct snd_ctl_elem_value *ucontrol)
  1743. {
  1744. switch (ucontrol->value.integer.value[0]) {
  1745. case 12:
  1746. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1747. break;
  1748. case 11:
  1749. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1750. break;
  1751. case 10:
  1752. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1753. break;
  1754. case 9:
  1755. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1756. break;
  1757. case 8:
  1758. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1759. break;
  1760. case 7:
  1761. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1762. break;
  1763. case 6:
  1764. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1765. break;
  1766. case 5:
  1767. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1768. break;
  1769. case 4:
  1770. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1771. break;
  1772. case 3:
  1773. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1774. break;
  1775. case 2:
  1776. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1777. break;
  1778. case 1:
  1779. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1780. break;
  1781. case 0:
  1782. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1783. break;
  1784. default:
  1785. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1786. break;
  1787. }
  1788. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1789. __func__, ucontrol->value.integer.value[0],
  1790. usb_rx_cfg.sample_rate);
  1791. return 0;
  1792. }
  1793. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1794. struct snd_ctl_elem_value *ucontrol)
  1795. {
  1796. switch (usb_rx_cfg.bit_format) {
  1797. case SNDRV_PCM_FORMAT_S32_LE:
  1798. ucontrol->value.integer.value[0] = 3;
  1799. break;
  1800. case SNDRV_PCM_FORMAT_S24_3LE:
  1801. ucontrol->value.integer.value[0] = 2;
  1802. break;
  1803. case SNDRV_PCM_FORMAT_S24_LE:
  1804. ucontrol->value.integer.value[0] = 1;
  1805. break;
  1806. case SNDRV_PCM_FORMAT_S16_LE:
  1807. default:
  1808. ucontrol->value.integer.value[0] = 0;
  1809. break;
  1810. }
  1811. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1812. __func__, usb_rx_cfg.bit_format,
  1813. ucontrol->value.integer.value[0]);
  1814. return 0;
  1815. }
  1816. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1817. struct snd_ctl_elem_value *ucontrol)
  1818. {
  1819. int rc = 0;
  1820. switch (ucontrol->value.integer.value[0]) {
  1821. case 3:
  1822. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1823. break;
  1824. case 2:
  1825. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1826. break;
  1827. case 1:
  1828. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1829. break;
  1830. case 0:
  1831. default:
  1832. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1833. break;
  1834. }
  1835. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1836. __func__, usb_rx_cfg.bit_format,
  1837. ucontrol->value.integer.value[0]);
  1838. return rc;
  1839. }
  1840. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1841. struct snd_ctl_elem_value *ucontrol)
  1842. {
  1843. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1844. usb_tx_cfg.channels);
  1845. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1846. return 0;
  1847. }
  1848. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1849. struct snd_ctl_elem_value *ucontrol)
  1850. {
  1851. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1852. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1853. return 1;
  1854. }
  1855. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1856. struct snd_ctl_elem_value *ucontrol)
  1857. {
  1858. int sample_rate_val;
  1859. switch (usb_tx_cfg.sample_rate) {
  1860. case SAMPLING_RATE_384KHZ:
  1861. sample_rate_val = 12;
  1862. break;
  1863. case SAMPLING_RATE_352P8KHZ:
  1864. sample_rate_val = 11;
  1865. break;
  1866. case SAMPLING_RATE_192KHZ:
  1867. sample_rate_val = 10;
  1868. break;
  1869. case SAMPLING_RATE_176P4KHZ:
  1870. sample_rate_val = 9;
  1871. break;
  1872. case SAMPLING_RATE_96KHZ:
  1873. sample_rate_val = 8;
  1874. break;
  1875. case SAMPLING_RATE_88P2KHZ:
  1876. sample_rate_val = 7;
  1877. break;
  1878. case SAMPLING_RATE_48KHZ:
  1879. sample_rate_val = 6;
  1880. break;
  1881. case SAMPLING_RATE_44P1KHZ:
  1882. sample_rate_val = 5;
  1883. break;
  1884. case SAMPLING_RATE_32KHZ:
  1885. sample_rate_val = 4;
  1886. break;
  1887. case SAMPLING_RATE_22P05KHZ:
  1888. sample_rate_val = 3;
  1889. break;
  1890. case SAMPLING_RATE_16KHZ:
  1891. sample_rate_val = 2;
  1892. break;
  1893. case SAMPLING_RATE_11P025KHZ:
  1894. sample_rate_val = 1;
  1895. break;
  1896. case SAMPLING_RATE_8KHZ:
  1897. sample_rate_val = 0;
  1898. break;
  1899. default:
  1900. sample_rate_val = 6;
  1901. break;
  1902. }
  1903. ucontrol->value.integer.value[0] = sample_rate_val;
  1904. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1905. usb_tx_cfg.sample_rate);
  1906. return 0;
  1907. }
  1908. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1909. struct snd_ctl_elem_value *ucontrol)
  1910. {
  1911. switch (ucontrol->value.integer.value[0]) {
  1912. case 12:
  1913. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1914. break;
  1915. case 11:
  1916. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1917. break;
  1918. case 10:
  1919. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1920. break;
  1921. case 9:
  1922. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1923. break;
  1924. case 8:
  1925. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1926. break;
  1927. case 7:
  1928. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1929. break;
  1930. case 6:
  1931. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1932. break;
  1933. case 5:
  1934. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1935. break;
  1936. case 4:
  1937. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1938. break;
  1939. case 3:
  1940. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1941. break;
  1942. case 2:
  1943. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1944. break;
  1945. case 1:
  1946. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1947. break;
  1948. case 0:
  1949. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1950. break;
  1951. default:
  1952. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1953. break;
  1954. }
  1955. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1956. __func__, ucontrol->value.integer.value[0],
  1957. usb_tx_cfg.sample_rate);
  1958. return 0;
  1959. }
  1960. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1961. struct snd_ctl_elem_value *ucontrol)
  1962. {
  1963. switch (usb_tx_cfg.bit_format) {
  1964. case SNDRV_PCM_FORMAT_S32_LE:
  1965. ucontrol->value.integer.value[0] = 3;
  1966. break;
  1967. case SNDRV_PCM_FORMAT_S24_3LE:
  1968. ucontrol->value.integer.value[0] = 2;
  1969. break;
  1970. case SNDRV_PCM_FORMAT_S24_LE:
  1971. ucontrol->value.integer.value[0] = 1;
  1972. break;
  1973. case SNDRV_PCM_FORMAT_S16_LE:
  1974. default:
  1975. ucontrol->value.integer.value[0] = 0;
  1976. break;
  1977. }
  1978. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1979. __func__, usb_tx_cfg.bit_format,
  1980. ucontrol->value.integer.value[0]);
  1981. return 0;
  1982. }
  1983. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1984. struct snd_ctl_elem_value *ucontrol)
  1985. {
  1986. int rc = 0;
  1987. switch (ucontrol->value.integer.value[0]) {
  1988. case 3:
  1989. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1990. break;
  1991. case 2:
  1992. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1993. break;
  1994. case 1:
  1995. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1996. break;
  1997. case 0:
  1998. default:
  1999. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2000. break;
  2001. }
  2002. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  2003. __func__, usb_tx_cfg.bit_format,
  2004. ucontrol->value.integer.value[0]);
  2005. return rc;
  2006. }
  2007. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  2008. {
  2009. int idx;
  2010. if (strnstr(kcontrol->id.name, "Display Port RX",
  2011. sizeof("Display Port RX"))) {
  2012. idx = DP_RX_IDX;
  2013. } else {
  2014. pr_err("%s: unsupported BE: %s\n",
  2015. __func__, kcontrol->id.name);
  2016. idx = -EINVAL;
  2017. }
  2018. return idx;
  2019. }
  2020. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  2021. struct snd_ctl_elem_value *ucontrol)
  2022. {
  2023. int idx = ext_disp_get_port_idx(kcontrol);
  2024. if (idx < 0)
  2025. return idx;
  2026. switch (ext_disp_rx_cfg[idx].bit_format) {
  2027. case SNDRV_PCM_FORMAT_S24_3LE:
  2028. ucontrol->value.integer.value[0] = 2;
  2029. break;
  2030. case SNDRV_PCM_FORMAT_S24_LE:
  2031. ucontrol->value.integer.value[0] = 1;
  2032. break;
  2033. case SNDRV_PCM_FORMAT_S16_LE:
  2034. default:
  2035. ucontrol->value.integer.value[0] = 0;
  2036. break;
  2037. }
  2038. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2039. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2040. ucontrol->value.integer.value[0]);
  2041. return 0;
  2042. }
  2043. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2044. struct snd_ctl_elem_value *ucontrol)
  2045. {
  2046. int idx = ext_disp_get_port_idx(kcontrol);
  2047. if (idx < 0)
  2048. return idx;
  2049. switch (ucontrol->value.integer.value[0]) {
  2050. case 2:
  2051. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2052. break;
  2053. case 1:
  2054. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2055. break;
  2056. case 0:
  2057. default:
  2058. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2059. break;
  2060. }
  2061. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2062. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2063. ucontrol->value.integer.value[0]);
  2064. return 0;
  2065. }
  2066. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2067. struct snd_ctl_elem_value *ucontrol)
  2068. {
  2069. int idx = ext_disp_get_port_idx(kcontrol);
  2070. if (idx < 0)
  2071. return idx;
  2072. ucontrol->value.integer.value[0] =
  2073. ext_disp_rx_cfg[idx].channels - 2;
  2074. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2075. idx, ext_disp_rx_cfg[idx].channels);
  2076. return 0;
  2077. }
  2078. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2079. struct snd_ctl_elem_value *ucontrol)
  2080. {
  2081. int idx = ext_disp_get_port_idx(kcontrol);
  2082. if (idx < 0)
  2083. return idx;
  2084. ext_disp_rx_cfg[idx].channels =
  2085. ucontrol->value.integer.value[0] + 2;
  2086. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2087. idx, ext_disp_rx_cfg[idx].channels);
  2088. return 1;
  2089. }
  2090. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2091. struct snd_ctl_elem_value *ucontrol)
  2092. {
  2093. int sample_rate_val;
  2094. int idx = ext_disp_get_port_idx(kcontrol);
  2095. if (idx < 0)
  2096. return idx;
  2097. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2098. case SAMPLING_RATE_176P4KHZ:
  2099. sample_rate_val = 6;
  2100. break;
  2101. case SAMPLING_RATE_88P2KHZ:
  2102. sample_rate_val = 5;
  2103. break;
  2104. case SAMPLING_RATE_44P1KHZ:
  2105. sample_rate_val = 4;
  2106. break;
  2107. case SAMPLING_RATE_32KHZ:
  2108. sample_rate_val = 3;
  2109. break;
  2110. case SAMPLING_RATE_192KHZ:
  2111. sample_rate_val = 2;
  2112. break;
  2113. case SAMPLING_RATE_96KHZ:
  2114. sample_rate_val = 1;
  2115. break;
  2116. case SAMPLING_RATE_48KHZ:
  2117. default:
  2118. sample_rate_val = 0;
  2119. break;
  2120. }
  2121. ucontrol->value.integer.value[0] = sample_rate_val;
  2122. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2123. idx, ext_disp_rx_cfg[idx].sample_rate);
  2124. return 0;
  2125. }
  2126. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2127. struct snd_ctl_elem_value *ucontrol)
  2128. {
  2129. int idx = ext_disp_get_port_idx(kcontrol);
  2130. if (idx < 0)
  2131. return idx;
  2132. switch (ucontrol->value.integer.value[0]) {
  2133. case 6:
  2134. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2135. break;
  2136. case 5:
  2137. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2138. break;
  2139. case 4:
  2140. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2141. break;
  2142. case 3:
  2143. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2144. break;
  2145. case 2:
  2146. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2147. break;
  2148. case 1:
  2149. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2150. break;
  2151. case 0:
  2152. default:
  2153. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2154. break;
  2155. }
  2156. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2157. __func__, ucontrol->value.integer.value[0], idx,
  2158. ext_disp_rx_cfg[idx].sample_rate);
  2159. return 0;
  2160. }
  2161. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2162. struct snd_ctl_elem_value *ucontrol)
  2163. {
  2164. pr_debug("%s: proxy_rx channels = %d\n",
  2165. __func__, proxy_rx_cfg.channels);
  2166. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2167. return 0;
  2168. }
  2169. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2170. struct snd_ctl_elem_value *ucontrol)
  2171. {
  2172. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2173. pr_debug("%s: proxy_rx channels = %d\n",
  2174. __func__, proxy_rx_cfg.channels);
  2175. return 1;
  2176. }
  2177. static int tdm_get_sample_rate(int value)
  2178. {
  2179. int sample_rate = 0;
  2180. switch (value) {
  2181. case 0:
  2182. sample_rate = SAMPLING_RATE_8KHZ;
  2183. break;
  2184. case 1:
  2185. sample_rate = SAMPLING_RATE_16KHZ;
  2186. break;
  2187. case 2:
  2188. sample_rate = SAMPLING_RATE_32KHZ;
  2189. break;
  2190. case 3:
  2191. sample_rate = SAMPLING_RATE_48KHZ;
  2192. break;
  2193. case 4:
  2194. sample_rate = SAMPLING_RATE_176P4KHZ;
  2195. break;
  2196. case 5:
  2197. sample_rate = SAMPLING_RATE_352P8KHZ;
  2198. break;
  2199. default:
  2200. sample_rate = SAMPLING_RATE_48KHZ;
  2201. break;
  2202. }
  2203. return sample_rate;
  2204. }
  2205. static int aux_pcm_get_sample_rate(int value)
  2206. {
  2207. int sample_rate;
  2208. switch (value) {
  2209. case 1:
  2210. sample_rate = SAMPLING_RATE_16KHZ;
  2211. break;
  2212. case 0:
  2213. default:
  2214. sample_rate = SAMPLING_RATE_8KHZ;
  2215. break;
  2216. }
  2217. return sample_rate;
  2218. }
  2219. static int tdm_get_sample_rate_val(int sample_rate)
  2220. {
  2221. int sample_rate_val = 0;
  2222. switch (sample_rate) {
  2223. case SAMPLING_RATE_8KHZ:
  2224. sample_rate_val = 0;
  2225. break;
  2226. case SAMPLING_RATE_16KHZ:
  2227. sample_rate_val = 1;
  2228. break;
  2229. case SAMPLING_RATE_32KHZ:
  2230. sample_rate_val = 2;
  2231. break;
  2232. case SAMPLING_RATE_48KHZ:
  2233. sample_rate_val = 3;
  2234. break;
  2235. case SAMPLING_RATE_176P4KHZ:
  2236. sample_rate_val = 4;
  2237. break;
  2238. case SAMPLING_RATE_352P8KHZ:
  2239. sample_rate_val = 5;
  2240. break;
  2241. default:
  2242. sample_rate_val = 3;
  2243. break;
  2244. }
  2245. return sample_rate_val;
  2246. }
  2247. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2248. {
  2249. int sample_rate_val;
  2250. switch (sample_rate) {
  2251. case SAMPLING_RATE_16KHZ:
  2252. sample_rate_val = 1;
  2253. break;
  2254. case SAMPLING_RATE_8KHZ:
  2255. default:
  2256. sample_rate_val = 0;
  2257. break;
  2258. }
  2259. return sample_rate_val;
  2260. }
  2261. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2262. struct tdm_port *port)
  2263. {
  2264. if (port) {
  2265. if (strnstr(kcontrol->id.name, "PRI",
  2266. sizeof(kcontrol->id.name))) {
  2267. port->mode = TDM_PRI;
  2268. } else if (strnstr(kcontrol->id.name, "SEC",
  2269. sizeof(kcontrol->id.name))) {
  2270. port->mode = TDM_SEC;
  2271. } else if (strnstr(kcontrol->id.name, "TERT",
  2272. sizeof(kcontrol->id.name))) {
  2273. port->mode = TDM_TERT;
  2274. } else if (strnstr(kcontrol->id.name, "QUAT",
  2275. sizeof(kcontrol->id.name))) {
  2276. port->mode = TDM_QUAT;
  2277. } else if (strnstr(kcontrol->id.name, "QUIN",
  2278. sizeof(kcontrol->id.name))) {
  2279. port->mode = TDM_QUIN;
  2280. } else {
  2281. pr_err("%s: unsupported mode in: %s\n",
  2282. __func__, kcontrol->id.name);
  2283. return -EINVAL;
  2284. }
  2285. if (strnstr(kcontrol->id.name, "RX_0",
  2286. sizeof(kcontrol->id.name)) ||
  2287. strnstr(kcontrol->id.name, "TX_0",
  2288. sizeof(kcontrol->id.name))) {
  2289. port->channel = TDM_0;
  2290. } else if (strnstr(kcontrol->id.name, "RX_1",
  2291. sizeof(kcontrol->id.name)) ||
  2292. strnstr(kcontrol->id.name, "TX_1",
  2293. sizeof(kcontrol->id.name))) {
  2294. port->channel = TDM_1;
  2295. } else if (strnstr(kcontrol->id.name, "RX_2",
  2296. sizeof(kcontrol->id.name)) ||
  2297. strnstr(kcontrol->id.name, "TX_2",
  2298. sizeof(kcontrol->id.name))) {
  2299. port->channel = TDM_2;
  2300. } else if (strnstr(kcontrol->id.name, "RX_3",
  2301. sizeof(kcontrol->id.name)) ||
  2302. strnstr(kcontrol->id.name, "TX_3",
  2303. sizeof(kcontrol->id.name))) {
  2304. port->channel = TDM_3;
  2305. } else if (strnstr(kcontrol->id.name, "RX_4",
  2306. sizeof(kcontrol->id.name)) ||
  2307. strnstr(kcontrol->id.name, "TX_4",
  2308. sizeof(kcontrol->id.name))) {
  2309. port->channel = TDM_4;
  2310. } else if (strnstr(kcontrol->id.name, "RX_5",
  2311. sizeof(kcontrol->id.name)) ||
  2312. strnstr(kcontrol->id.name, "TX_5",
  2313. sizeof(kcontrol->id.name))) {
  2314. port->channel = TDM_5;
  2315. } else if (strnstr(kcontrol->id.name, "RX_6",
  2316. sizeof(kcontrol->id.name)) ||
  2317. strnstr(kcontrol->id.name, "TX_6",
  2318. sizeof(kcontrol->id.name))) {
  2319. port->channel = TDM_6;
  2320. } else if (strnstr(kcontrol->id.name, "RX_7",
  2321. sizeof(kcontrol->id.name)) ||
  2322. strnstr(kcontrol->id.name, "TX_7",
  2323. sizeof(kcontrol->id.name))) {
  2324. port->channel = TDM_7;
  2325. } else {
  2326. pr_err("%s: unsupported channel in: %s\n",
  2327. __func__, kcontrol->id.name);
  2328. return -EINVAL;
  2329. }
  2330. } else {
  2331. return -EINVAL;
  2332. }
  2333. return 0;
  2334. }
  2335. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2336. struct snd_ctl_elem_value *ucontrol)
  2337. {
  2338. struct tdm_port port;
  2339. int ret = tdm_get_port_idx(kcontrol, &port);
  2340. if (ret) {
  2341. pr_err("%s: unsupported control: %s\n",
  2342. __func__, kcontrol->id.name);
  2343. } else {
  2344. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2345. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2346. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2347. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2348. ucontrol->value.enumerated.item[0]);
  2349. }
  2350. return ret;
  2351. }
  2352. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2353. struct snd_ctl_elem_value *ucontrol)
  2354. {
  2355. struct tdm_port port;
  2356. int ret = tdm_get_port_idx(kcontrol, &port);
  2357. if (ret) {
  2358. pr_err("%s: unsupported control: %s\n",
  2359. __func__, kcontrol->id.name);
  2360. } else {
  2361. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2362. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2363. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2364. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2365. ucontrol->value.enumerated.item[0]);
  2366. }
  2367. return ret;
  2368. }
  2369. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2370. struct snd_ctl_elem_value *ucontrol)
  2371. {
  2372. struct tdm_port port;
  2373. int ret = tdm_get_port_idx(kcontrol, &port);
  2374. if (ret) {
  2375. pr_err("%s: unsupported control: %s\n",
  2376. __func__, kcontrol->id.name);
  2377. } else {
  2378. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2379. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2380. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2381. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2382. ucontrol->value.enumerated.item[0]);
  2383. }
  2384. return ret;
  2385. }
  2386. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2387. struct snd_ctl_elem_value *ucontrol)
  2388. {
  2389. struct tdm_port port;
  2390. int ret = tdm_get_port_idx(kcontrol, &port);
  2391. if (ret) {
  2392. pr_err("%s: unsupported control: %s\n",
  2393. __func__, kcontrol->id.name);
  2394. } else {
  2395. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2396. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2397. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2398. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2399. ucontrol->value.enumerated.item[0]);
  2400. }
  2401. return ret;
  2402. }
  2403. static int tdm_get_format(int value)
  2404. {
  2405. int format = 0;
  2406. switch (value) {
  2407. case 0:
  2408. format = SNDRV_PCM_FORMAT_S16_LE;
  2409. break;
  2410. case 1:
  2411. format = SNDRV_PCM_FORMAT_S24_LE;
  2412. break;
  2413. case 2:
  2414. format = SNDRV_PCM_FORMAT_S32_LE;
  2415. break;
  2416. default:
  2417. format = SNDRV_PCM_FORMAT_S16_LE;
  2418. break;
  2419. }
  2420. return format;
  2421. }
  2422. static int tdm_get_format_val(int format)
  2423. {
  2424. int value = 0;
  2425. switch (format) {
  2426. case SNDRV_PCM_FORMAT_S16_LE:
  2427. value = 0;
  2428. break;
  2429. case SNDRV_PCM_FORMAT_S24_LE:
  2430. value = 1;
  2431. break;
  2432. case SNDRV_PCM_FORMAT_S32_LE:
  2433. value = 2;
  2434. break;
  2435. default:
  2436. value = 0;
  2437. break;
  2438. }
  2439. return value;
  2440. }
  2441. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2442. struct snd_ctl_elem_value *ucontrol)
  2443. {
  2444. struct tdm_port port;
  2445. int ret = tdm_get_port_idx(kcontrol, &port);
  2446. if (ret) {
  2447. pr_err("%s: unsupported control: %s\n",
  2448. __func__, kcontrol->id.name);
  2449. } else {
  2450. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2451. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2452. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2453. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2454. ucontrol->value.enumerated.item[0]);
  2455. }
  2456. return ret;
  2457. }
  2458. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2459. struct snd_ctl_elem_value *ucontrol)
  2460. {
  2461. struct tdm_port port;
  2462. int ret = tdm_get_port_idx(kcontrol, &port);
  2463. if (ret) {
  2464. pr_err("%s: unsupported control: %s\n",
  2465. __func__, kcontrol->id.name);
  2466. } else {
  2467. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2468. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2469. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2470. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2471. ucontrol->value.enumerated.item[0]);
  2472. }
  2473. return ret;
  2474. }
  2475. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2476. struct snd_ctl_elem_value *ucontrol)
  2477. {
  2478. struct tdm_port port;
  2479. int ret = tdm_get_port_idx(kcontrol, &port);
  2480. if (ret) {
  2481. pr_err("%s: unsupported control: %s\n",
  2482. __func__, kcontrol->id.name);
  2483. } else {
  2484. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2485. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2486. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2487. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2488. ucontrol->value.enumerated.item[0]);
  2489. }
  2490. return ret;
  2491. }
  2492. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2493. struct snd_ctl_elem_value *ucontrol)
  2494. {
  2495. struct tdm_port port;
  2496. int ret = tdm_get_port_idx(kcontrol, &port);
  2497. if (ret) {
  2498. pr_err("%s: unsupported control: %s\n",
  2499. __func__, kcontrol->id.name);
  2500. } else {
  2501. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2502. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2503. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2504. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2505. ucontrol->value.enumerated.item[0]);
  2506. }
  2507. return ret;
  2508. }
  2509. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2510. struct snd_ctl_elem_value *ucontrol)
  2511. {
  2512. struct tdm_port port;
  2513. int ret = tdm_get_port_idx(kcontrol, &port);
  2514. if (ret) {
  2515. pr_err("%s: unsupported control: %s\n",
  2516. __func__, kcontrol->id.name);
  2517. } else {
  2518. ucontrol->value.enumerated.item[0] =
  2519. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2520. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2521. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2522. ucontrol->value.enumerated.item[0]);
  2523. }
  2524. return ret;
  2525. }
  2526. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2527. struct snd_ctl_elem_value *ucontrol)
  2528. {
  2529. struct tdm_port port;
  2530. int ret = tdm_get_port_idx(kcontrol, &port);
  2531. if (ret) {
  2532. pr_err("%s: unsupported control: %s\n",
  2533. __func__, kcontrol->id.name);
  2534. } else {
  2535. tdm_rx_cfg[port.mode][port.channel].channels =
  2536. ucontrol->value.enumerated.item[0] + 1;
  2537. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2538. tdm_rx_cfg[port.mode][port.channel].channels,
  2539. ucontrol->value.enumerated.item[0] + 1);
  2540. }
  2541. return ret;
  2542. }
  2543. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2544. struct snd_ctl_elem_value *ucontrol)
  2545. {
  2546. struct tdm_port port;
  2547. int ret = tdm_get_port_idx(kcontrol, &port);
  2548. if (ret) {
  2549. pr_err("%s: unsupported control: %s\n",
  2550. __func__, kcontrol->id.name);
  2551. } else {
  2552. ucontrol->value.enumerated.item[0] =
  2553. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2554. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2555. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2556. ucontrol->value.enumerated.item[0]);
  2557. }
  2558. return ret;
  2559. }
  2560. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2561. struct snd_ctl_elem_value *ucontrol)
  2562. {
  2563. struct tdm_port port;
  2564. int ret = tdm_get_port_idx(kcontrol, &port);
  2565. if (ret) {
  2566. pr_err("%s: unsupported control: %s\n",
  2567. __func__, kcontrol->id.name);
  2568. } else {
  2569. tdm_tx_cfg[port.mode][port.channel].channels =
  2570. ucontrol->value.enumerated.item[0] + 1;
  2571. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2572. tdm_tx_cfg[port.mode][port.channel].channels,
  2573. ucontrol->value.enumerated.item[0] + 1);
  2574. }
  2575. return ret;
  2576. }
  2577. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2578. {
  2579. int idx;
  2580. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2581. sizeof("PRIM_AUX_PCM"))) {
  2582. idx = PRIM_AUX_PCM;
  2583. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2584. sizeof("SEC_AUX_PCM"))) {
  2585. idx = SEC_AUX_PCM;
  2586. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2587. sizeof("TERT_AUX_PCM"))) {
  2588. idx = TERT_AUX_PCM;
  2589. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2590. sizeof("QUAT_AUX_PCM"))) {
  2591. idx = QUAT_AUX_PCM;
  2592. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2593. sizeof("QUIN_AUX_PCM"))) {
  2594. idx = QUIN_AUX_PCM;
  2595. } else {
  2596. pr_err("%s: unsupported port: %s\n",
  2597. __func__, kcontrol->id.name);
  2598. idx = -EINVAL;
  2599. }
  2600. return idx;
  2601. }
  2602. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2603. struct snd_ctl_elem_value *ucontrol)
  2604. {
  2605. int idx = aux_pcm_get_port_idx(kcontrol);
  2606. if (idx < 0)
  2607. return idx;
  2608. aux_pcm_rx_cfg[idx].sample_rate =
  2609. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2610. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2611. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2612. ucontrol->value.enumerated.item[0]);
  2613. return 0;
  2614. }
  2615. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2616. struct snd_ctl_elem_value *ucontrol)
  2617. {
  2618. int idx = aux_pcm_get_port_idx(kcontrol);
  2619. if (idx < 0)
  2620. return idx;
  2621. ucontrol->value.enumerated.item[0] =
  2622. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2623. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2624. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2625. ucontrol->value.enumerated.item[0]);
  2626. return 0;
  2627. }
  2628. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2629. struct snd_ctl_elem_value *ucontrol)
  2630. {
  2631. int idx = aux_pcm_get_port_idx(kcontrol);
  2632. if (idx < 0)
  2633. return idx;
  2634. aux_pcm_tx_cfg[idx].sample_rate =
  2635. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2636. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2637. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2638. ucontrol->value.enumerated.item[0]);
  2639. return 0;
  2640. }
  2641. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2642. struct snd_ctl_elem_value *ucontrol)
  2643. {
  2644. int idx = aux_pcm_get_port_idx(kcontrol);
  2645. if (idx < 0)
  2646. return idx;
  2647. ucontrol->value.enumerated.item[0] =
  2648. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2649. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2650. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2651. ucontrol->value.enumerated.item[0]);
  2652. return 0;
  2653. }
  2654. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2655. {
  2656. int idx;
  2657. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2658. sizeof("PRIM_MI2S_RX"))) {
  2659. idx = PRIM_MI2S;
  2660. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2661. sizeof("SEC_MI2S_RX"))) {
  2662. idx = SEC_MI2S;
  2663. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2664. sizeof("TERT_MI2S_RX"))) {
  2665. idx = TERT_MI2S;
  2666. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2667. sizeof("QUAT_MI2S_RX"))) {
  2668. idx = QUAT_MI2S;
  2669. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2670. sizeof("QUIN_MI2S_RX"))) {
  2671. idx = QUIN_MI2S;
  2672. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2673. sizeof("PRIM_MI2S_TX"))) {
  2674. idx = PRIM_MI2S;
  2675. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2676. sizeof("SEC_MI2S_TX"))) {
  2677. idx = SEC_MI2S;
  2678. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2679. sizeof("TERT_MI2S_TX"))) {
  2680. idx = TERT_MI2S;
  2681. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2682. sizeof("QUAT_MI2S_TX"))) {
  2683. idx = QUAT_MI2S;
  2684. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2685. sizeof("QUIN_MI2S_TX"))) {
  2686. idx = QUIN_MI2S;
  2687. } else {
  2688. pr_err("%s: unsupported channel: %s\n",
  2689. __func__, kcontrol->id.name);
  2690. idx = -EINVAL;
  2691. }
  2692. return idx;
  2693. }
  2694. static int mi2s_get_sample_rate_val(int sample_rate)
  2695. {
  2696. int sample_rate_val;
  2697. switch (sample_rate) {
  2698. case SAMPLING_RATE_8KHZ:
  2699. sample_rate_val = 0;
  2700. break;
  2701. case SAMPLING_RATE_11P025KHZ:
  2702. sample_rate_val = 1;
  2703. break;
  2704. case SAMPLING_RATE_16KHZ:
  2705. sample_rate_val = 2;
  2706. break;
  2707. case SAMPLING_RATE_22P05KHZ:
  2708. sample_rate_val = 3;
  2709. break;
  2710. case SAMPLING_RATE_32KHZ:
  2711. sample_rate_val = 4;
  2712. break;
  2713. case SAMPLING_RATE_44P1KHZ:
  2714. sample_rate_val = 5;
  2715. break;
  2716. case SAMPLING_RATE_48KHZ:
  2717. sample_rate_val = 6;
  2718. break;
  2719. case SAMPLING_RATE_96KHZ:
  2720. sample_rate_val = 7;
  2721. break;
  2722. case SAMPLING_RATE_192KHZ:
  2723. sample_rate_val = 8;
  2724. break;
  2725. default:
  2726. sample_rate_val = 6;
  2727. break;
  2728. }
  2729. return sample_rate_val;
  2730. }
  2731. static int mi2s_get_sample_rate(int value)
  2732. {
  2733. int sample_rate;
  2734. switch (value) {
  2735. case 0:
  2736. sample_rate = SAMPLING_RATE_8KHZ;
  2737. break;
  2738. case 1:
  2739. sample_rate = SAMPLING_RATE_11P025KHZ;
  2740. break;
  2741. case 2:
  2742. sample_rate = SAMPLING_RATE_16KHZ;
  2743. break;
  2744. case 3:
  2745. sample_rate = SAMPLING_RATE_22P05KHZ;
  2746. break;
  2747. case 4:
  2748. sample_rate = SAMPLING_RATE_32KHZ;
  2749. break;
  2750. case 5:
  2751. sample_rate = SAMPLING_RATE_44P1KHZ;
  2752. break;
  2753. case 6:
  2754. sample_rate = SAMPLING_RATE_48KHZ;
  2755. break;
  2756. case 7:
  2757. sample_rate = SAMPLING_RATE_96KHZ;
  2758. break;
  2759. case 8:
  2760. sample_rate = SAMPLING_RATE_192KHZ;
  2761. break;
  2762. default:
  2763. sample_rate = SAMPLING_RATE_48KHZ;
  2764. break;
  2765. }
  2766. return sample_rate;
  2767. }
  2768. static int mi2s_auxpcm_get_format(int value)
  2769. {
  2770. int format;
  2771. switch (value) {
  2772. case 0:
  2773. format = SNDRV_PCM_FORMAT_S16_LE;
  2774. break;
  2775. case 1:
  2776. format = SNDRV_PCM_FORMAT_S24_LE;
  2777. break;
  2778. case 2:
  2779. format = SNDRV_PCM_FORMAT_S24_3LE;
  2780. break;
  2781. case 3:
  2782. format = SNDRV_PCM_FORMAT_S32_LE;
  2783. break;
  2784. default:
  2785. format = SNDRV_PCM_FORMAT_S16_LE;
  2786. break;
  2787. }
  2788. return format;
  2789. }
  2790. static int mi2s_auxpcm_get_format_value(int format)
  2791. {
  2792. int value;
  2793. switch (format) {
  2794. case SNDRV_PCM_FORMAT_S16_LE:
  2795. value = 0;
  2796. break;
  2797. case SNDRV_PCM_FORMAT_S24_LE:
  2798. value = 1;
  2799. break;
  2800. case SNDRV_PCM_FORMAT_S24_3LE:
  2801. value = 2;
  2802. break;
  2803. case SNDRV_PCM_FORMAT_S32_LE:
  2804. value = 3;
  2805. break;
  2806. default:
  2807. value = 0;
  2808. break;
  2809. }
  2810. return value;
  2811. }
  2812. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2813. struct snd_ctl_elem_value *ucontrol)
  2814. {
  2815. int idx = mi2s_get_port_idx(kcontrol);
  2816. if (idx < 0)
  2817. return idx;
  2818. mi2s_rx_cfg[idx].sample_rate =
  2819. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2820. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2821. idx, mi2s_rx_cfg[idx].sample_rate,
  2822. ucontrol->value.enumerated.item[0]);
  2823. return 0;
  2824. }
  2825. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2826. struct snd_ctl_elem_value *ucontrol)
  2827. {
  2828. int idx = mi2s_get_port_idx(kcontrol);
  2829. if (idx < 0)
  2830. return idx;
  2831. ucontrol->value.enumerated.item[0] =
  2832. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2833. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2834. idx, mi2s_rx_cfg[idx].sample_rate,
  2835. ucontrol->value.enumerated.item[0]);
  2836. return 0;
  2837. }
  2838. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2839. struct snd_ctl_elem_value *ucontrol)
  2840. {
  2841. int idx = mi2s_get_port_idx(kcontrol);
  2842. if (idx < 0)
  2843. return idx;
  2844. mi2s_tx_cfg[idx].sample_rate =
  2845. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2846. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2847. idx, mi2s_tx_cfg[idx].sample_rate,
  2848. ucontrol->value.enumerated.item[0]);
  2849. return 0;
  2850. }
  2851. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2852. struct snd_ctl_elem_value *ucontrol)
  2853. {
  2854. int idx = mi2s_get_port_idx(kcontrol);
  2855. if (idx < 0)
  2856. return idx;
  2857. ucontrol->value.enumerated.item[0] =
  2858. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2859. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2860. idx, mi2s_tx_cfg[idx].sample_rate,
  2861. ucontrol->value.enumerated.item[0]);
  2862. return 0;
  2863. }
  2864. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2865. struct snd_ctl_elem_value *ucontrol)
  2866. {
  2867. int idx = mi2s_get_port_idx(kcontrol);
  2868. if (idx < 0)
  2869. return idx;
  2870. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2871. idx, mi2s_rx_cfg[idx].channels);
  2872. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2873. return 0;
  2874. }
  2875. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2876. struct snd_ctl_elem_value *ucontrol)
  2877. {
  2878. int idx = mi2s_get_port_idx(kcontrol);
  2879. if (idx < 0)
  2880. return idx;
  2881. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2882. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2883. idx, mi2s_rx_cfg[idx].channels);
  2884. return 1;
  2885. }
  2886. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2887. struct snd_ctl_elem_value *ucontrol)
  2888. {
  2889. int idx = mi2s_get_port_idx(kcontrol);
  2890. if (idx < 0)
  2891. return idx;
  2892. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2893. idx, mi2s_tx_cfg[idx].channels);
  2894. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2895. return 0;
  2896. }
  2897. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2898. struct snd_ctl_elem_value *ucontrol)
  2899. {
  2900. int idx = mi2s_get_port_idx(kcontrol);
  2901. if (idx < 0)
  2902. return idx;
  2903. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2904. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2905. idx, mi2s_tx_cfg[idx].channels);
  2906. return 1;
  2907. }
  2908. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2909. struct snd_ctl_elem_value *ucontrol)
  2910. {
  2911. int idx = mi2s_get_port_idx(kcontrol);
  2912. if (idx < 0)
  2913. return idx;
  2914. ucontrol->value.enumerated.item[0] =
  2915. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2916. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2917. idx, mi2s_rx_cfg[idx].bit_format,
  2918. ucontrol->value.enumerated.item[0]);
  2919. return 0;
  2920. }
  2921. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2922. struct snd_ctl_elem_value *ucontrol)
  2923. {
  2924. int idx = mi2s_get_port_idx(kcontrol);
  2925. if (idx < 0)
  2926. return idx;
  2927. mi2s_rx_cfg[idx].bit_format =
  2928. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2929. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2930. idx, mi2s_rx_cfg[idx].bit_format,
  2931. ucontrol->value.enumerated.item[0]);
  2932. return 0;
  2933. }
  2934. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2935. struct snd_ctl_elem_value *ucontrol)
  2936. {
  2937. int idx = mi2s_get_port_idx(kcontrol);
  2938. if (idx < 0)
  2939. return idx;
  2940. ucontrol->value.enumerated.item[0] =
  2941. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2942. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2943. idx, mi2s_tx_cfg[idx].bit_format,
  2944. ucontrol->value.enumerated.item[0]);
  2945. return 0;
  2946. }
  2947. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2948. struct snd_ctl_elem_value *ucontrol)
  2949. {
  2950. int idx = mi2s_get_port_idx(kcontrol);
  2951. if (idx < 0)
  2952. return idx;
  2953. mi2s_tx_cfg[idx].bit_format =
  2954. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2955. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2956. idx, mi2s_tx_cfg[idx].bit_format,
  2957. ucontrol->value.enumerated.item[0]);
  2958. return 0;
  2959. }
  2960. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2961. struct snd_ctl_elem_value *ucontrol)
  2962. {
  2963. int idx = aux_pcm_get_port_idx(kcontrol);
  2964. if (idx < 0)
  2965. return idx;
  2966. ucontrol->value.enumerated.item[0] =
  2967. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2968. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2969. idx, aux_pcm_rx_cfg[idx].bit_format,
  2970. ucontrol->value.enumerated.item[0]);
  2971. return 0;
  2972. }
  2973. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2974. struct snd_ctl_elem_value *ucontrol)
  2975. {
  2976. int idx = aux_pcm_get_port_idx(kcontrol);
  2977. if (idx < 0)
  2978. return idx;
  2979. aux_pcm_rx_cfg[idx].bit_format =
  2980. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2981. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2982. idx, aux_pcm_rx_cfg[idx].bit_format,
  2983. ucontrol->value.enumerated.item[0]);
  2984. return 0;
  2985. }
  2986. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2987. struct snd_ctl_elem_value *ucontrol)
  2988. {
  2989. int idx = aux_pcm_get_port_idx(kcontrol);
  2990. if (idx < 0)
  2991. return idx;
  2992. ucontrol->value.enumerated.item[0] =
  2993. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2994. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2995. idx, aux_pcm_tx_cfg[idx].bit_format,
  2996. ucontrol->value.enumerated.item[0]);
  2997. return 0;
  2998. }
  2999. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  3000. struct snd_ctl_elem_value *ucontrol)
  3001. {
  3002. int idx = aux_pcm_get_port_idx(kcontrol);
  3003. if (idx < 0)
  3004. return idx;
  3005. aux_pcm_tx_cfg[idx].bit_format =
  3006. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  3007. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  3008. idx, aux_pcm_tx_cfg[idx].bit_format,
  3009. ucontrol->value.enumerated.item[0]);
  3010. return 0;
  3011. }
  3012. static int msm_hifi_ctrl(struct snd_soc_component *component)
  3013. {
  3014. struct snd_soc_dapm_context *dapm =
  3015. snd_soc_component_get_dapm(component);
  3016. struct snd_soc_card *card = component->card;
  3017. struct msm_asoc_mach_data *pdata =
  3018. snd_soc_card_get_drvdata(card);
  3019. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n", __func__,
  3020. msm_hifi_control);
  3021. if (!pdata || !pdata->hph_en1_gpio_p) {
  3022. dev_err(component->dev, "%s: hph_en1_gpio is invalid\n",
  3023. __func__);
  3024. return -EINVAL;
  3025. }
  3026. if (msm_hifi_control == MSM_HIFI_ON) {
  3027. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  3028. /* 5msec delay needed as per HW requirement */
  3029. usleep_range(5000, 5010);
  3030. } else {
  3031. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  3032. }
  3033. snd_soc_dapm_sync(dapm);
  3034. return 0;
  3035. }
  3036. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3037. struct snd_ctl_elem_value *ucontrol)
  3038. {
  3039. pr_debug("%s: msm_hifi_control = %d\n",
  3040. __func__, msm_hifi_control);
  3041. ucontrol->value.integer.value[0] = msm_hifi_control;
  3042. return 0;
  3043. }
  3044. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3045. struct snd_ctl_elem_value *ucontrol)
  3046. {
  3047. struct snd_soc_component *component =
  3048. snd_soc_kcontrol_component(kcontrol);
  3049. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3050. __func__, ucontrol->value.integer.value[0]);
  3051. msm_hifi_control = ucontrol->value.integer.value[0];
  3052. msm_hifi_ctrl(component);
  3053. return 0;
  3054. }
  3055. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3056. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3057. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3058. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3059. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3060. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3061. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3062. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3063. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3064. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3065. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3066. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3067. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3068. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3069. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3070. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3071. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3072. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3073. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3074. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3075. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3076. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3077. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3078. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3079. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3080. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3081. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3082. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3083. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3084. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3085. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3086. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3087. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3088. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3089. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3090. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3091. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3092. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3093. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3094. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3095. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3096. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3097. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3098. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3099. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3100. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3101. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3102. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3103. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3104. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3105. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3106. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3107. wsa_cdc_dma_rx_0_sample_rate,
  3108. cdc_dma_rx_sample_rate_get,
  3109. cdc_dma_rx_sample_rate_put),
  3110. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3111. wsa_cdc_dma_rx_1_sample_rate,
  3112. cdc_dma_rx_sample_rate_get,
  3113. cdc_dma_rx_sample_rate_put),
  3114. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3115. rx_cdc_dma_rx_0_sample_rate,
  3116. cdc_dma_rx_sample_rate_get,
  3117. cdc_dma_rx_sample_rate_put),
  3118. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3119. rx_cdc_dma_rx_1_sample_rate,
  3120. cdc_dma_rx_sample_rate_get,
  3121. cdc_dma_rx_sample_rate_put),
  3122. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3123. rx_cdc_dma_rx_2_sample_rate,
  3124. cdc_dma_rx_sample_rate_get,
  3125. cdc_dma_rx_sample_rate_put),
  3126. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3127. rx_cdc_dma_rx_3_sample_rate,
  3128. cdc_dma_rx_sample_rate_get,
  3129. cdc_dma_rx_sample_rate_put),
  3130. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3131. rx_cdc_dma_rx_5_sample_rate,
  3132. cdc_dma_rx_sample_rate_get,
  3133. cdc_dma_rx_sample_rate_put),
  3134. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3135. wsa_cdc_dma_tx_0_sample_rate,
  3136. cdc_dma_tx_sample_rate_get,
  3137. cdc_dma_tx_sample_rate_put),
  3138. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3139. wsa_cdc_dma_tx_1_sample_rate,
  3140. cdc_dma_tx_sample_rate_get,
  3141. cdc_dma_tx_sample_rate_put),
  3142. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3143. wsa_cdc_dma_tx_2_sample_rate,
  3144. cdc_dma_tx_sample_rate_get,
  3145. cdc_dma_tx_sample_rate_put),
  3146. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3147. tx_cdc_dma_tx_0_sample_rate,
  3148. cdc_dma_tx_sample_rate_get,
  3149. cdc_dma_tx_sample_rate_put),
  3150. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3151. tx_cdc_dma_tx_3_sample_rate,
  3152. cdc_dma_tx_sample_rate_get,
  3153. cdc_dma_tx_sample_rate_put),
  3154. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3155. tx_cdc_dma_tx_4_sample_rate,
  3156. cdc_dma_tx_sample_rate_get,
  3157. cdc_dma_tx_sample_rate_put),
  3158. };
  3159. static const struct snd_kcontrol_new msm_ext_snd_controls[] = {
  3160. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3161. slim_rx_ch_get, slim_rx_ch_put),
  3162. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3163. slim_rx_ch_get, slim_rx_ch_put),
  3164. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3165. slim_tx_ch_get, slim_tx_ch_put),
  3166. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3167. slim_tx_ch_get, slim_tx_ch_put),
  3168. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3169. slim_rx_ch_get, slim_rx_ch_put),
  3170. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3171. slim_rx_ch_get, slim_rx_ch_put),
  3172. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3173. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3174. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3175. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3176. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3177. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3178. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3179. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3180. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3181. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3182. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3183. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3184. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3185. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3186. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3187. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3188. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3189. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3190. };
  3191. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3192. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3193. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3194. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3195. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3196. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3197. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3198. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3199. proxy_rx_ch_get, proxy_rx_ch_put),
  3200. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3201. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3202. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3203. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3204. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3205. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3206. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3207. usb_audio_rx_sample_rate_get,
  3208. usb_audio_rx_sample_rate_put),
  3209. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3210. usb_audio_tx_sample_rate_get,
  3211. usb_audio_tx_sample_rate_put),
  3212. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3213. ext_disp_rx_sample_rate_get,
  3214. ext_disp_rx_sample_rate_put),
  3215. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3216. tdm_rx_sample_rate_get,
  3217. tdm_rx_sample_rate_put),
  3218. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3219. tdm_tx_sample_rate_get,
  3220. tdm_tx_sample_rate_put),
  3221. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3222. tdm_rx_format_get,
  3223. tdm_rx_format_put),
  3224. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3225. tdm_tx_format_get,
  3226. tdm_tx_format_put),
  3227. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3228. tdm_rx_ch_get,
  3229. tdm_rx_ch_put),
  3230. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3231. tdm_tx_ch_get,
  3232. tdm_tx_ch_put),
  3233. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3234. tdm_rx_sample_rate_get,
  3235. tdm_rx_sample_rate_put),
  3236. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3237. tdm_tx_sample_rate_get,
  3238. tdm_tx_sample_rate_put),
  3239. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3240. tdm_rx_format_get,
  3241. tdm_rx_format_put),
  3242. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3243. tdm_tx_format_get,
  3244. tdm_tx_format_put),
  3245. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3246. tdm_rx_ch_get,
  3247. tdm_rx_ch_put),
  3248. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3249. tdm_tx_ch_get,
  3250. tdm_tx_ch_put),
  3251. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3252. tdm_rx_sample_rate_get,
  3253. tdm_rx_sample_rate_put),
  3254. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3255. tdm_tx_sample_rate_get,
  3256. tdm_tx_sample_rate_put),
  3257. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3258. tdm_rx_format_get,
  3259. tdm_rx_format_put),
  3260. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3261. tdm_tx_format_get,
  3262. tdm_tx_format_put),
  3263. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3264. tdm_rx_ch_get,
  3265. tdm_rx_ch_put),
  3266. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3267. tdm_tx_ch_get,
  3268. tdm_tx_ch_put),
  3269. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3270. tdm_rx_sample_rate_get,
  3271. tdm_rx_sample_rate_put),
  3272. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3273. tdm_tx_sample_rate_get,
  3274. tdm_tx_sample_rate_put),
  3275. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3276. tdm_rx_format_get,
  3277. tdm_rx_format_put),
  3278. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3279. tdm_tx_format_get,
  3280. tdm_tx_format_put),
  3281. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3282. tdm_rx_ch_get,
  3283. tdm_rx_ch_put),
  3284. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3285. tdm_tx_ch_get,
  3286. tdm_tx_ch_put),
  3287. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3288. tdm_rx_sample_rate_get,
  3289. tdm_rx_sample_rate_put),
  3290. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3291. tdm_tx_sample_rate_get,
  3292. tdm_tx_sample_rate_put),
  3293. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3294. tdm_rx_format_get,
  3295. tdm_rx_format_put),
  3296. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3297. tdm_tx_format_get,
  3298. tdm_tx_format_put),
  3299. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3300. tdm_rx_ch_get,
  3301. tdm_rx_ch_put),
  3302. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3303. tdm_tx_ch_get,
  3304. tdm_tx_ch_put),
  3305. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3306. aux_pcm_rx_sample_rate_get,
  3307. aux_pcm_rx_sample_rate_put),
  3308. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3309. aux_pcm_rx_sample_rate_get,
  3310. aux_pcm_rx_sample_rate_put),
  3311. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3312. aux_pcm_rx_sample_rate_get,
  3313. aux_pcm_rx_sample_rate_put),
  3314. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3315. aux_pcm_rx_sample_rate_get,
  3316. aux_pcm_rx_sample_rate_put),
  3317. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3318. aux_pcm_rx_sample_rate_get,
  3319. aux_pcm_rx_sample_rate_put),
  3320. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3321. aux_pcm_tx_sample_rate_get,
  3322. aux_pcm_tx_sample_rate_put),
  3323. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3324. aux_pcm_tx_sample_rate_get,
  3325. aux_pcm_tx_sample_rate_put),
  3326. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3327. aux_pcm_tx_sample_rate_get,
  3328. aux_pcm_tx_sample_rate_put),
  3329. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3330. aux_pcm_tx_sample_rate_get,
  3331. aux_pcm_tx_sample_rate_put),
  3332. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3333. aux_pcm_tx_sample_rate_get,
  3334. aux_pcm_tx_sample_rate_put),
  3335. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3336. mi2s_rx_sample_rate_get,
  3337. mi2s_rx_sample_rate_put),
  3338. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3339. mi2s_rx_sample_rate_get,
  3340. mi2s_rx_sample_rate_put),
  3341. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3342. mi2s_rx_sample_rate_get,
  3343. mi2s_rx_sample_rate_put),
  3344. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3345. mi2s_rx_sample_rate_get,
  3346. mi2s_rx_sample_rate_put),
  3347. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3348. mi2s_rx_sample_rate_get,
  3349. mi2s_rx_sample_rate_put),
  3350. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3351. mi2s_tx_sample_rate_get,
  3352. mi2s_tx_sample_rate_put),
  3353. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3354. mi2s_tx_sample_rate_get,
  3355. mi2s_tx_sample_rate_put),
  3356. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3357. mi2s_tx_sample_rate_get,
  3358. mi2s_tx_sample_rate_put),
  3359. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3360. mi2s_tx_sample_rate_get,
  3361. mi2s_tx_sample_rate_put),
  3362. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3363. mi2s_tx_sample_rate_get,
  3364. mi2s_tx_sample_rate_put),
  3365. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3366. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3367. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3368. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3369. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3370. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3371. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3372. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3373. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3374. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3375. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3376. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3377. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3378. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3379. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3380. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3381. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3382. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3383. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3384. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3385. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3386. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3387. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3388. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3389. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3390. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3391. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3392. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3393. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3394. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3395. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3396. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3397. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3398. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3399. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3400. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3401. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3402. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3403. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3404. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3405. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3406. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3407. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3408. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3409. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3410. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3411. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3412. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3413. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3414. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3415. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3416. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3417. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3418. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3419. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3420. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3421. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3422. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3423. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3424. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3425. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3426. msm_hifi_put),
  3427. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3428. msm_bt_sample_rate_get,
  3429. msm_bt_sample_rate_put),
  3430. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3431. msm_bt_sample_rate_rx_get,
  3432. msm_bt_sample_rate_rx_put),
  3433. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3434. msm_bt_sample_rate_tx_get,
  3435. msm_bt_sample_rate_tx_put),
  3436. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3437. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3438. };
  3439. static int msm_snd_enable_codec_ext_clk(struct snd_soc_component *component,
  3440. int enable, bool dapm)
  3441. {
  3442. int ret = 0;
  3443. if (!strcmp(component->name, "tavil_codec")) {
  3444. ret = tavil_cdc_mclk_enable(component, enable);
  3445. } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
  3446. ret = tasha_cdc_mclk_enable(component, enable, dapm);
  3447. } else {
  3448. dev_err(component->dev, "%s: unknown codec to enable ext clk\n",
  3449. __func__);
  3450. ret = -EINVAL;
  3451. }
  3452. return ret;
  3453. }
  3454. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_component *component,
  3455. int enable, bool dapm)
  3456. {
  3457. int ret = 0;
  3458. if (!strcmp(component->name, "tavil_codec")) {
  3459. ret = tavil_cdc_mclk_tx_enable(component, enable);
  3460. } else if (!strcmp(dev_name(component->dev), "tasha_codec")) {
  3461. ret = tasha_cdc_mclk_tx_enable(component, enable, dapm);
  3462. } else {
  3463. dev_err(component->dev, "%s: unknown codec to enable TX ext clk\n",
  3464. __func__);
  3465. ret = -EINVAL;
  3466. }
  3467. return ret;
  3468. }
  3469. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3470. struct snd_kcontrol *kcontrol, int event)
  3471. {
  3472. struct snd_soc_component *component =
  3473. snd_soc_dapm_to_component(w->dapm);
  3474. pr_debug("%s: event = %d\n", __func__, event);
  3475. switch (event) {
  3476. case SND_SOC_DAPM_PRE_PMU:
  3477. return msm_snd_enable_codec_ext_tx_clk(component, 1, true);
  3478. case SND_SOC_DAPM_POST_PMD:
  3479. return msm_snd_enable_codec_ext_tx_clk(component, 0, true);
  3480. }
  3481. return 0;
  3482. }
  3483. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3484. struct snd_kcontrol *kcontrol, int event)
  3485. {
  3486. struct snd_soc_component *component =
  3487. snd_soc_dapm_to_component(w->dapm);
  3488. pr_debug("%s: event = %d\n", __func__, event);
  3489. switch (event) {
  3490. case SND_SOC_DAPM_PRE_PMU:
  3491. return msm_snd_enable_codec_ext_clk(component, 1, true);
  3492. case SND_SOC_DAPM_POST_PMD:
  3493. return msm_snd_enable_codec_ext_clk(component, 0, true);
  3494. }
  3495. return 0;
  3496. }
  3497. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3498. struct snd_kcontrol *k, int event)
  3499. {
  3500. struct snd_soc_component *component =
  3501. snd_soc_dapm_to_component(w->dapm);
  3502. struct snd_soc_card *card = component->card;
  3503. struct msm_asoc_mach_data *pdata =
  3504. snd_soc_card_get_drvdata(card);
  3505. dev_dbg(component->dev, "%s: msm_hifi_control = %d\n",
  3506. __func__, msm_hifi_control);
  3507. if (!pdata || !pdata->hph_en0_gpio_p) {
  3508. dev_err(component->dev, "%s: hph_en0_gpio is invalid\n",
  3509. __func__);
  3510. return -EINVAL;
  3511. }
  3512. if (msm_hifi_control != MSM_HIFI_ON) {
  3513. dev_dbg(component->dev, "%s: HiFi mixer control is not set\n",
  3514. __func__);
  3515. return 0;
  3516. }
  3517. switch (event) {
  3518. case SND_SOC_DAPM_POST_PMU:
  3519. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3520. break;
  3521. case SND_SOC_DAPM_PRE_PMD:
  3522. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3523. break;
  3524. }
  3525. return 0;
  3526. }
  3527. static const struct snd_soc_dapm_widget msm_ext_dapm_widgets[] = {
  3528. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3529. msm_mclk_event,
  3530. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3531. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3532. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3533. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3534. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3535. SND_SOC_DAPM_SPK("Lineout_3 amp", NULL),
  3536. SND_SOC_DAPM_SPK("Lineout_4 amp", NULL),
  3537. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3538. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3539. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3540. SND_SOC_DAPM_MIC("Secondary Mic", NULL),
  3541. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3542. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3543. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3544. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3545. SND_SOC_DAPM_MIC("Analog Mic6", NULL),
  3546. SND_SOC_DAPM_MIC("Analog Mic7", NULL),
  3547. SND_SOC_DAPM_MIC("Analog Mic8", NULL),
  3548. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3549. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3550. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3551. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3552. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3553. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3554. SND_SOC_DAPM_MIC("Digital Mic6", NULL),
  3555. };
  3556. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3557. struct snd_kcontrol *kcontrol, int event)
  3558. {
  3559. struct msm_asoc_mach_data *pdata = NULL;
  3560. struct snd_soc_component *component =
  3561. snd_soc_dapm_to_component(w->dapm);
  3562. int ret = 0;
  3563. u32 dmic_idx;
  3564. int *dmic_gpio_cnt;
  3565. struct device_node *dmic_gpio;
  3566. char *wname;
  3567. wname = strpbrk(w->name, "0123");
  3568. if (!wname) {
  3569. dev_err(component->dev, "%s: widget not found\n", __func__);
  3570. return -EINVAL;
  3571. }
  3572. ret = kstrtouint(wname, 10, &dmic_idx);
  3573. if (ret < 0) {
  3574. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3575. __func__);
  3576. return -EINVAL;
  3577. }
  3578. pdata = snd_soc_card_get_drvdata(component->card);
  3579. switch (dmic_idx) {
  3580. case 0:
  3581. case 1:
  3582. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3583. dmic_gpio = pdata->dmic01_gpio_p;
  3584. break;
  3585. case 2:
  3586. case 3:
  3587. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3588. dmic_gpio = pdata->dmic23_gpio_p;
  3589. break;
  3590. default:
  3591. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3592. __func__);
  3593. return -EINVAL;
  3594. }
  3595. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3596. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3597. switch (event) {
  3598. case SND_SOC_DAPM_PRE_PMU:
  3599. (*dmic_gpio_cnt)++;
  3600. if (*dmic_gpio_cnt == 1) {
  3601. ret = msm_cdc_pinctrl_select_active_state(
  3602. dmic_gpio);
  3603. if (ret < 0) {
  3604. pr_err("%s: gpio set cannot be activated %sd",
  3605. __func__, "dmic_gpio");
  3606. return ret;
  3607. }
  3608. }
  3609. break;
  3610. case SND_SOC_DAPM_POST_PMD:
  3611. (*dmic_gpio_cnt)--;
  3612. if (*dmic_gpio_cnt == 0) {
  3613. ret = msm_cdc_pinctrl_select_sleep_state(
  3614. dmic_gpio);
  3615. if (ret < 0) {
  3616. pr_err("%s: gpio set cannot be de-activated %sd",
  3617. __func__, "dmic_gpio");
  3618. return ret;
  3619. }
  3620. }
  3621. break;
  3622. default:
  3623. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3624. return -EINVAL;
  3625. }
  3626. return 0;
  3627. }
  3628. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3629. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3630. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3631. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3632. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3633. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3634. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3635. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3636. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3637. };
  3638. static inline int param_is_mask(int p)
  3639. {
  3640. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3641. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3642. }
  3643. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3644. int n)
  3645. {
  3646. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3647. }
  3648. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3649. unsigned int bit)
  3650. {
  3651. if (bit >= SNDRV_MASK_MAX)
  3652. return;
  3653. if (param_is_mask(n)) {
  3654. struct snd_mask *m = param_to_mask(p, n);
  3655. m->bits[0] = 0;
  3656. m->bits[1] = 0;
  3657. m->bits[bit >> 5] |= (1 << (bit & 31));
  3658. }
  3659. }
  3660. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3661. {
  3662. int ch_id = 0;
  3663. switch (be_id) {
  3664. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3665. ch_id = SLIM_RX_0;
  3666. break;
  3667. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3668. ch_id = SLIM_RX_1;
  3669. break;
  3670. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3671. ch_id = SLIM_RX_2;
  3672. break;
  3673. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3674. ch_id = SLIM_RX_3;
  3675. break;
  3676. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3677. ch_id = SLIM_RX_4;
  3678. break;
  3679. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3680. ch_id = SLIM_RX_6;
  3681. break;
  3682. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3683. ch_id = SLIM_TX_0;
  3684. break;
  3685. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3686. ch_id = SLIM_TX_3;
  3687. break;
  3688. default:
  3689. ch_id = SLIM_RX_0;
  3690. break;
  3691. }
  3692. return ch_id;
  3693. }
  3694. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3695. {
  3696. int idx = 0;
  3697. switch (be_id) {
  3698. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3699. idx = WSA_CDC_DMA_RX_0;
  3700. break;
  3701. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3702. idx = WSA_CDC_DMA_TX_0;
  3703. break;
  3704. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3705. idx = WSA_CDC_DMA_RX_1;
  3706. break;
  3707. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3708. idx = WSA_CDC_DMA_TX_1;
  3709. break;
  3710. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3711. idx = WSA_CDC_DMA_TX_2;
  3712. break;
  3713. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3714. idx = RX_CDC_DMA_RX_0;
  3715. break;
  3716. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3717. idx = RX_CDC_DMA_RX_1;
  3718. break;
  3719. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3720. idx = RX_CDC_DMA_RX_2;
  3721. break;
  3722. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3723. idx = RX_CDC_DMA_RX_3;
  3724. break;
  3725. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3726. idx = RX_CDC_DMA_RX_5;
  3727. break;
  3728. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3729. idx = TX_CDC_DMA_TX_0;
  3730. break;
  3731. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3732. idx = TX_CDC_DMA_TX_3;
  3733. break;
  3734. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3735. idx = TX_CDC_DMA_TX_4;
  3736. break;
  3737. default:
  3738. idx = RX_CDC_DMA_RX_0;
  3739. break;
  3740. }
  3741. return idx;
  3742. }
  3743. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3744. {
  3745. int idx = -EINVAL;
  3746. switch (be_id) {
  3747. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3748. idx = DP_RX_IDX;
  3749. break;
  3750. default:
  3751. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3752. idx = -EINVAL;
  3753. break;
  3754. }
  3755. return idx;
  3756. }
  3757. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3758. struct snd_pcm_hw_params *params)
  3759. {
  3760. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3761. struct snd_interval *rate = hw_param_interval(params,
  3762. SNDRV_PCM_HW_PARAM_RATE);
  3763. struct snd_interval *channels = hw_param_interval(params,
  3764. SNDRV_PCM_HW_PARAM_CHANNELS);
  3765. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3766. int rc = 0;
  3767. int idx;
  3768. void *config = NULL;
  3769. struct snd_soc_component *component = NULL;
  3770. pr_debug("%s: format = %d, rate = %d\n",
  3771. __func__, params_format(params), params_rate(params));
  3772. switch (dai_link->id) {
  3773. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3774. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3775. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3776. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3777. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3778. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3779. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3780. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3781. slim_rx_cfg[idx].bit_format);
  3782. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3783. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3784. break;
  3785. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3786. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3787. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3788. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3789. slim_tx_cfg[idx].bit_format);
  3790. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3791. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3792. break;
  3793. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3794. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3795. slim_tx_cfg[1].bit_format);
  3796. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3797. channels->min = channels->max = slim_tx_cfg[1].channels;
  3798. break;
  3799. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3800. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3801. SNDRV_PCM_FORMAT_S32_LE);
  3802. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3803. channels->min = channels->max = msm_vi_feed_tx_ch;
  3804. break;
  3805. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3806. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3807. slim_rx_cfg[5].bit_format);
  3808. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3809. channels->min = channels->max = slim_rx_cfg[5].channels;
  3810. break;
  3811. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3812. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  3813. if (!component) {
  3814. pr_err("%s: component is NULL\n", __func__);
  3815. rc = -EINVAL;
  3816. goto done;
  3817. }
  3818. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3819. channels->min = channels->max = 1;
  3820. config = msm_codec_fn.get_afe_config_fn(component,
  3821. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3822. if (config) {
  3823. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3824. config, SLIMBUS_5_TX);
  3825. if (rc)
  3826. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3827. __func__, rc);
  3828. }
  3829. break;
  3830. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3831. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3832. slim_rx_cfg[SLIM_RX_7].bit_format);
  3833. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3834. channels->min = channels->max =
  3835. slim_rx_cfg[SLIM_RX_7].channels;
  3836. break;
  3837. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3838. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3839. channels->min = channels->max =
  3840. slim_tx_cfg[SLIM_TX_7].channels;
  3841. break;
  3842. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3843. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3844. channels->min = channels->max =
  3845. slim_tx_cfg[SLIM_TX_8].channels;
  3846. break;
  3847. case MSM_BACKEND_DAI_USB_RX:
  3848. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3849. usb_rx_cfg.bit_format);
  3850. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3851. channels->min = channels->max = usb_rx_cfg.channels;
  3852. break;
  3853. case MSM_BACKEND_DAI_USB_TX:
  3854. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3855. usb_tx_cfg.bit_format);
  3856. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3857. channels->min = channels->max = usb_tx_cfg.channels;
  3858. break;
  3859. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3860. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3861. if (idx < 0) {
  3862. pr_err("%s: Incorrect ext disp idx %d\n",
  3863. __func__, idx);
  3864. rc = idx;
  3865. goto done;
  3866. }
  3867. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3868. ext_disp_rx_cfg[idx].bit_format);
  3869. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3870. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3871. break;
  3872. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3873. channels->min = channels->max = proxy_rx_cfg.channels;
  3874. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3875. break;
  3876. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3877. channels->min = channels->max =
  3878. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3879. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3880. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3881. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3882. break;
  3883. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3884. channels->min = channels->max =
  3885. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3886. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3887. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3888. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3889. break;
  3890. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3891. channels->min = channels->max =
  3892. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3893. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3894. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3895. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3896. break;
  3897. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3898. channels->min = channels->max =
  3899. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3900. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3901. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3902. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3903. break;
  3904. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3905. channels->min = channels->max =
  3906. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3907. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3908. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3909. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3910. break;
  3911. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3912. channels->min = channels->max =
  3913. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3914. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3915. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3916. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3917. break;
  3918. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3919. channels->min = channels->max =
  3920. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3921. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3922. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3923. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3924. break;
  3925. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3926. channels->min = channels->max =
  3927. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3928. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3929. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3930. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3931. break;
  3932. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3933. channels->min = channels->max =
  3934. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3935. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3936. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3937. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3938. break;
  3939. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3940. channels->min = channels->max =
  3941. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3942. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3943. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3944. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3945. break;
  3946. case MSM_BACKEND_DAI_AUXPCM_RX:
  3947. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3948. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3949. rate->min = rate->max =
  3950. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3951. channels->min = channels->max =
  3952. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3953. break;
  3954. case MSM_BACKEND_DAI_AUXPCM_TX:
  3955. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3956. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3957. rate->min = rate->max =
  3958. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3959. channels->min = channels->max =
  3960. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3961. break;
  3962. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3963. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3964. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3965. rate->min = rate->max =
  3966. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3967. channels->min = channels->max =
  3968. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3969. break;
  3970. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3971. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3972. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3973. rate->min = rate->max =
  3974. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3975. channels->min = channels->max =
  3976. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3977. break;
  3978. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3979. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3980. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3981. rate->min = rate->max =
  3982. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3983. channels->min = channels->max =
  3984. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3985. break;
  3986. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3987. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3988. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3989. rate->min = rate->max =
  3990. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3991. channels->min = channels->max =
  3992. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3993. break;
  3994. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3995. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3996. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3997. rate->min = rate->max =
  3998. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3999. channels->min = channels->max =
  4000. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  4001. break;
  4002. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  4003. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4004. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  4005. rate->min = rate->max =
  4006. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  4007. channels->min = channels->max =
  4008. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  4009. break;
  4010. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  4011. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4012. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  4013. rate->min = rate->max =
  4014. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  4015. channels->min = channels->max =
  4016. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  4017. break;
  4018. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  4019. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4020. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  4021. rate->min = rate->max =
  4022. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  4023. channels->min = channels->max =
  4024. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  4025. break;
  4026. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4027. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4028. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  4029. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  4030. channels->min = channels->max =
  4031. mi2s_rx_cfg[PRIM_MI2S].channels;
  4032. break;
  4033. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4034. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4035. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  4036. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  4037. channels->min = channels->max =
  4038. mi2s_tx_cfg[PRIM_MI2S].channels;
  4039. break;
  4040. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4041. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4042. mi2s_rx_cfg[SEC_MI2S].bit_format);
  4043. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  4044. channels->min = channels->max =
  4045. mi2s_rx_cfg[SEC_MI2S].channels;
  4046. break;
  4047. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4048. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4049. mi2s_tx_cfg[SEC_MI2S].bit_format);
  4050. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  4051. channels->min = channels->max =
  4052. mi2s_tx_cfg[SEC_MI2S].channels;
  4053. break;
  4054. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4055. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4056. mi2s_rx_cfg[TERT_MI2S].bit_format);
  4057. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4058. channels->min = channels->max =
  4059. mi2s_rx_cfg[TERT_MI2S].channels;
  4060. break;
  4061. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4062. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4063. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4064. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4065. channels->min = channels->max =
  4066. mi2s_tx_cfg[TERT_MI2S].channels;
  4067. break;
  4068. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4069. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4070. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4071. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4072. channels->min = channels->max =
  4073. mi2s_rx_cfg[QUAT_MI2S].channels;
  4074. break;
  4075. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4076. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4077. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4078. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4079. channels->min = channels->max =
  4080. mi2s_tx_cfg[QUAT_MI2S].channels;
  4081. break;
  4082. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4083. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4084. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4085. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4086. channels->min = channels->max =
  4087. mi2s_rx_cfg[QUIN_MI2S].channels;
  4088. break;
  4089. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4090. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4091. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4092. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4093. channels->min = channels->max =
  4094. mi2s_tx_cfg[QUIN_MI2S].channels;
  4095. break;
  4096. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4097. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4098. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4099. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4100. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4101. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4102. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4103. cdc_dma_rx_cfg[idx].bit_format);
  4104. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4105. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4106. break;
  4107. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4108. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4109. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4110. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4111. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4112. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4113. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4114. cdc_dma_tx_cfg[idx].bit_format);
  4115. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4116. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4117. break;
  4118. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4119. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4120. SNDRV_PCM_FORMAT_S32_LE);
  4121. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4122. channels->min = channels->max = msm_vi_feed_tx_ch;
  4123. break;
  4124. default:
  4125. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4126. break;
  4127. }
  4128. done:
  4129. return rc;
  4130. }
  4131. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
  4132. bool active)
  4133. {
  4134. struct snd_soc_card *card = component->card;
  4135. struct msm_asoc_mach_data *pdata =
  4136. snd_soc_card_get_drvdata(card);
  4137. if (!pdata->fsa_handle)
  4138. return false;
  4139. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  4140. }
  4141. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  4142. {
  4143. int value = 0;
  4144. bool ret = false;
  4145. struct snd_soc_card *card;
  4146. struct msm_asoc_mach_data *pdata;
  4147. if (!component) {
  4148. pr_err("%s component is NULL\n", __func__);
  4149. return false;
  4150. }
  4151. card = component->card;
  4152. pdata = snd_soc_card_get_drvdata(card);
  4153. if (!pdata)
  4154. return false;
  4155. if (wcd_mbhc_cfg.enable_usbc_analog)
  4156. return msm_usbc_swap_gnd_mic(component, active);
  4157. /* if usbc is not defined, swap using us_euro_gpio_p */
  4158. if (pdata->us_euro_gpio_p) {
  4159. value = msm_cdc_pinctrl_get_state(
  4160. pdata->us_euro_gpio_p);
  4161. if (value)
  4162. msm_cdc_pinctrl_select_sleep_state(
  4163. pdata->us_euro_gpio_p);
  4164. else
  4165. msm_cdc_pinctrl_select_active_state(
  4166. pdata->us_euro_gpio_p);
  4167. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  4168. __func__, value, !value);
  4169. ret = true;
  4170. }
  4171. return ret;
  4172. }
  4173. static int msm_afe_set_config(struct snd_soc_component *component)
  4174. {
  4175. int ret = 0;
  4176. void *config_data = NULL;
  4177. if (!msm_codec_fn.get_afe_config_fn) {
  4178. dev_err(component->dev, "%s: codec get afe config not init'ed\n",
  4179. __func__);
  4180. return -EINVAL;
  4181. }
  4182. config_data = msm_codec_fn.get_afe_config_fn(component,
  4183. AFE_CDC_REGISTERS_CONFIG);
  4184. if (config_data) {
  4185. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4186. if (ret) {
  4187. dev_err(component->dev,
  4188. "%s: Failed to set codec registers config %d\n",
  4189. __func__, ret);
  4190. return ret;
  4191. }
  4192. }
  4193. config_data = msm_codec_fn.get_afe_config_fn(component,
  4194. AFE_CDC_REGISTER_PAGE_CONFIG);
  4195. if (config_data) {
  4196. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4197. 0);
  4198. if (ret)
  4199. dev_err(component->dev,
  4200. "%s: Failed to set cdc register page config\n",
  4201. __func__);
  4202. }
  4203. config_data = msm_codec_fn.get_afe_config_fn(component,
  4204. AFE_SLIMBUS_SLAVE_CONFIG);
  4205. if (config_data) {
  4206. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4207. if (ret) {
  4208. dev_err(component->dev,
  4209. "%s: Failed to set slimbus slave config %d\n",
  4210. __func__, ret);
  4211. return ret;
  4212. }
  4213. }
  4214. return 0;
  4215. }
  4216. static void msm_afe_clear_config(void)
  4217. {
  4218. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4219. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4220. }
  4221. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4222. {
  4223. int ret = 0;
  4224. void *config_data;
  4225. struct snd_soc_component *component = NULL;
  4226. struct snd_soc_dapm_context *dapm;
  4227. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4228. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4229. struct snd_soc_component *aux_comp;
  4230. struct snd_card *card = rtd->card->snd_card;
  4231. struct snd_info_entry *entry;
  4232. struct msm_asoc_mach_data *pdata =
  4233. snd_soc_card_get_drvdata(rtd->card);
  4234. /*
  4235. * Codec SLIMBUS configuration
  4236. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4237. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4238. * TX14, TX15, TX16
  4239. */
  4240. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4241. 150, 151};
  4242. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4243. 134, 135, 136, 137, 138, 139,
  4244. 140, 141, 142, 143};
  4245. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4246. rtd->pmdown_time = 0;
  4247. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  4248. if (!component) {
  4249. pr_err("%s: component is NULL\n", __func__);
  4250. return -EINVAL;
  4251. }
  4252. dapm = snd_soc_component_get_dapm(component);
  4253. ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
  4254. ARRAY_SIZE(msm_ext_snd_controls));
  4255. if (ret < 0) {
  4256. pr_err("%s: add_codec_controls failed, err %d\n",
  4257. __func__, ret);
  4258. return ret;
  4259. }
  4260. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4261. ARRAY_SIZE(msm_common_snd_controls));
  4262. if (ret < 0) {
  4263. pr_err("%s: add_codec_controls failed, err %d\n",
  4264. __func__, ret);
  4265. return ret;
  4266. }
  4267. snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
  4268. ARRAY_SIZE(msm_ext_dapm_widgets));
  4269. snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
  4270. ARRAY_SIZE(wcd_audio_paths));
  4271. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4272. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4273. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4274. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4275. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4276. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4277. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4278. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4279. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4280. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4281. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4282. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4283. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4284. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4285. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4286. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4287. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4288. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4289. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4290. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4291. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4292. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4293. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4294. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4295. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4296. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4297. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4298. snd_soc_dapm_sync(dapm);
  4299. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4300. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4301. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4302. ret = msm_afe_set_config(component);
  4303. if (ret) {
  4304. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4305. goto err;
  4306. }
  4307. pdata->is_afe_config_done = true;
  4308. config_data = msm_codec_fn.get_afe_config_fn(component,
  4309. AFE_AANC_VERSION);
  4310. if (config_data) {
  4311. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4312. if (ret) {
  4313. pr_err("%s: Failed to set aanc version %d\n",
  4314. __func__, ret);
  4315. goto err;
  4316. }
  4317. }
  4318. /*
  4319. * Send speaker configuration only for WSA8810.
  4320. * Default configuration is for WSA8815.
  4321. */
  4322. pr_debug("%s: Number of aux devices: %d\n",
  4323. __func__, rtd->card->num_aux_devs);
  4324. if (rtd->card->num_aux_devs &&
  4325. !list_empty(&rtd->card->aux_comp_list)) {
  4326. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4327. struct snd_soc_component, card_aux_list);
  4328. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4329. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4330. tavil_set_spkr_mode(component, WCD934X_SPKR_MODE_1);
  4331. tavil_set_spkr_gain_offset(component,
  4332. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4333. }
  4334. }
  4335. card = rtd->card->snd_card;
  4336. if (!pdata->codec_root) {
  4337. entry = snd_info_create_subdir(card->module, "codecs",
  4338. card->proc_root);
  4339. if (!entry) {
  4340. pr_debug("%s: Cannot create codecs module entry\n",
  4341. __func__);
  4342. ret = 0;
  4343. goto err;
  4344. }
  4345. pdata->codec_root = entry;
  4346. }
  4347. tavil_codec_info_create_codec_entry(pdata->codec_root, component);
  4348. codec_reg_done = true;
  4349. return 0;
  4350. err:
  4351. return ret;
  4352. }
  4353. static int msm_audrx_tasha_init(struct snd_soc_pcm_runtime *rtd)
  4354. {
  4355. int ret = 0;
  4356. void *config_data;
  4357. struct snd_soc_component *component = NULL;
  4358. struct snd_soc_dapm_context *dapm;
  4359. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4360. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4361. struct snd_soc_component *aux_comp;
  4362. struct snd_card *card;
  4363. struct snd_info_entry *entry;
  4364. struct msm_asoc_mach_data *pdata =
  4365. snd_soc_card_get_drvdata(rtd->card);
  4366. /* Codec SLIMBUS configuration
  4367. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8, RX9, RX10, RX11, RX12, RX13
  4368. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4369. * TX14, TX15, TX16
  4370. */
  4371. unsigned int rx_ch[TASHA_RX_MAX] = {144, 145, 146, 147, 148, 149, 150,
  4372. 151, 152, 153, 154, 155, 156};
  4373. unsigned int tx_ch[TASHA_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4374. 134, 135, 136, 137, 138, 139,
  4375. 140, 141, 142, 143};
  4376. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4377. rtd->pmdown_time = 0;
  4378. component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
  4379. if (!component) {
  4380. pr_err("%s: component is NULL\n", __func__);
  4381. return -EINVAL;
  4382. }
  4383. dapm = snd_soc_component_get_dapm(component);
  4384. ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
  4385. ARRAY_SIZE(msm_ext_snd_controls));
  4386. if (ret < 0) {
  4387. pr_err("%s: add_component_controls failed, err %d\n",
  4388. __func__, ret);
  4389. return ret;
  4390. }
  4391. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4392. ARRAY_SIZE(msm_common_snd_controls));
  4393. if (ret < 0) {
  4394. pr_err("%s: add_component_controls failed, err %d\n",
  4395. __func__, ret);
  4396. return ret;
  4397. }
  4398. snd_soc_dapm_new_controls(dapm, msm_ext_dapm_widgets,
  4399. ARRAY_SIZE(msm_ext_dapm_widgets));
  4400. snd_soc_dapm_add_routes(dapm, wcd_audio_paths,
  4401. ARRAY_SIZE(wcd_audio_paths));
  4402. snd_soc_dapm_enable_pin(dapm, "Lineout_1 amp");
  4403. snd_soc_dapm_enable_pin(dapm, "Lineout_2 amp");
  4404. snd_soc_dapm_enable_pin(dapm, "Lineout_3 amp");
  4405. snd_soc_dapm_enable_pin(dapm, "Lineout_4 amp");
  4406. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4407. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4408. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4409. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4410. snd_soc_dapm_ignore_suspend(dapm, "Secondary Mic");
  4411. snd_soc_dapm_ignore_suspend(dapm, "Lineout_1 amp");
  4412. snd_soc_dapm_ignore_suspend(dapm, "Lineout_2 amp");
  4413. snd_soc_dapm_ignore_suspend(dapm, "Lineout_3 amp");
  4414. snd_soc_dapm_ignore_suspend(dapm, "Lineout_4 amp");
  4415. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4416. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4417. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4418. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4419. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4420. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4421. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4422. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4423. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4424. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic6");
  4425. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic7");
  4426. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic8");
  4427. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4428. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4429. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4430. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  4431. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  4432. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  4433. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  4434. snd_soc_dapm_ignore_suspend(dapm, "AMIC5");
  4435. snd_soc_dapm_ignore_suspend(dapm, "DMIC0");
  4436. snd_soc_dapm_ignore_suspend(dapm, "DMIC1");
  4437. snd_soc_dapm_ignore_suspend(dapm, "DMIC2");
  4438. snd_soc_dapm_ignore_suspend(dapm, "DMIC3");
  4439. snd_soc_dapm_ignore_suspend(dapm, "DMIC4");
  4440. snd_soc_dapm_ignore_suspend(dapm, "DMIC5");
  4441. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4442. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4443. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4444. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4445. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4446. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4447. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4448. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT3");
  4449. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT4");
  4450. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4451. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4452. snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT1");
  4453. snd_soc_dapm_ignore_suspend(dapm, "ANC LINEOUT2");
  4454. snd_soc_dapm_sync(dapm);
  4455. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4456. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4457. msm_codec_fn.get_afe_config_fn = tasha_get_afe_config;
  4458. ret = msm_afe_set_config(component);
  4459. if (ret) {
  4460. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4461. goto err;
  4462. }
  4463. pdata->is_afe_config_done = true;
  4464. config_data = msm_codec_fn.get_afe_config_fn(component,
  4465. AFE_AANC_VERSION);
  4466. if (config_data) {
  4467. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4468. if (ret) {
  4469. pr_err("%s: Failed to set aanc version %d\n",
  4470. __func__, ret);
  4471. goto err;
  4472. }
  4473. }
  4474. /*
  4475. * Send speaker configuration only for WSA8810.
  4476. * Default configuration is for WSA8815.
  4477. */
  4478. pr_debug("%s: Number of aux devices: %d\n",
  4479. __func__, rtd->card->num_aux_devs);
  4480. if (rtd->card->num_aux_devs &&
  4481. !list_empty(&rtd->card->aux_comp_list)) {
  4482. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4483. struct snd_soc_component, card_aux_list);
  4484. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4485. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4486. tasha_set_spkr_mode(component, SPKR_MODE_1);
  4487. tasha_set_spkr_gain_offset(component,
  4488. RX_GAIN_OFFSET_M1P5_DB);
  4489. }
  4490. }
  4491. card = rtd->card->snd_card;
  4492. if (!pdata->codec_root) {
  4493. entry = snd_info_create_subdir(card->module, "codecs",
  4494. card->proc_root);
  4495. if (!entry) {
  4496. pr_debug("%s: Cannot create codecs module entry\n",
  4497. __func__);
  4498. ret = 0;
  4499. goto err;
  4500. }
  4501. pdata->codec_root = entry;
  4502. }
  4503. tasha_codec_info_create_codec_entry(pdata->codec_root, component);
  4504. codec_reg_done = true;
  4505. return 0;
  4506. err:
  4507. return ret;
  4508. }
  4509. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4510. {
  4511. int ret = 0;
  4512. struct snd_soc_component *component;
  4513. struct snd_soc_dapm_context *dapm;
  4514. struct snd_card *card;
  4515. struct snd_info_entry *entry;
  4516. struct snd_soc_component *aux_comp;
  4517. struct msm_asoc_mach_data *pdata =
  4518. snd_soc_card_get_drvdata(rtd->card);
  4519. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4520. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  4521. if (!component) {
  4522. pr_err("%s: component is NULL\n", __func__);
  4523. return -EINVAL;
  4524. }
  4525. dapm = snd_soc_component_get_dapm(component);
  4526. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  4527. ARRAY_SIZE(msm_int_snd_controls));
  4528. if (ret < 0) {
  4529. pr_err("%s: add_component_controls failed: %d\n",
  4530. __func__, ret);
  4531. return ret;
  4532. }
  4533. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  4534. ARRAY_SIZE(msm_common_snd_controls));
  4535. if (ret < 0) {
  4536. pr_err("%s: add common snd controls failed: %d\n",
  4537. __func__, ret);
  4538. return ret;
  4539. }
  4540. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4541. ARRAY_SIZE(msm_int_dapm_widgets));
  4542. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4543. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4544. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4545. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4546. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4547. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4548. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4549. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4550. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4551. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4552. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4553. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4554. snd_soc_dapm_sync(dapm);
  4555. /*
  4556. * Send speaker configuration only for WSA8810.
  4557. * Default configuration is for WSA8815.
  4558. */
  4559. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  4560. __func__, rtd->card->num_aux_devs);
  4561. if (rtd->card->num_aux_devs &&
  4562. !list_empty(&rtd->card->aux_comp_list)) {
  4563. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4564. struct snd_soc_component, card_aux_list);
  4565. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4566. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4567. wsa_macro_set_spkr_mode(component,
  4568. WSA_MACRO_SPKR_MODE_1);
  4569. wsa_macro_set_spkr_gain_offset(component,
  4570. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4571. }
  4572. }
  4573. card = rtd->card->snd_card;
  4574. if (!pdata->codec_root) {
  4575. entry = snd_info_create_subdir(card->module, "codecs",
  4576. card->proc_root);
  4577. if (!entry) {
  4578. pr_debug("%s: Cannot create codecs module entry\n",
  4579. __func__);
  4580. ret = 0;
  4581. goto err;
  4582. }
  4583. pdata->codec_root = entry;
  4584. }
  4585. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4586. /*
  4587. * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
  4588. * from AOSS to APSS. So, it uses SW workaround and listens to
  4589. * interrupt from AFE over IPC.
  4590. * Check for MSM version and MSM ID and register wake irq
  4591. * accordingly to provide compatibility to all chipsets.
  4592. */
  4593. if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
  4594. socinfo_get_version() == SM6150_SOC_VERSION_1_0)
  4595. bolero_register_wake_irq(component, true);
  4596. else
  4597. bolero_register_wake_irq(component, false);
  4598. codec_reg_done = true;
  4599. return 0;
  4600. err:
  4601. return ret;
  4602. }
  4603. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4604. {
  4605. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4606. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4607. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4608. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4609. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4610. }
  4611. static void *def_wcd_mbhc_cal(void)
  4612. {
  4613. void *wcd_mbhc_cal;
  4614. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4615. u16 *btn_high;
  4616. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4617. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4618. if (!wcd_mbhc_cal)
  4619. return NULL;
  4620. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4621. S(v_hs_max, 1600);
  4622. #undef S
  4623. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4624. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4625. #undef S
  4626. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4627. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4628. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4629. btn_high[0] = 75;
  4630. btn_high[1] = 150;
  4631. btn_high[2] = 237;
  4632. btn_high[3] = 500;
  4633. btn_high[4] = 500;
  4634. btn_high[5] = 500;
  4635. btn_high[6] = 500;
  4636. btn_high[7] = 500;
  4637. return wcd_mbhc_cal;
  4638. }
  4639. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4640. struct snd_pcm_hw_params *params)
  4641. {
  4642. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4643. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4644. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4645. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4646. int ret = 0;
  4647. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4648. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4649. u32 user_set_tx_ch = 0;
  4650. u32 rx_ch_count;
  4651. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4652. ret = snd_soc_dai_get_channel_map(codec_dai,
  4653. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4654. if (ret < 0) {
  4655. pr_err("%s: failed to get codec chan map, err:%d\n",
  4656. __func__, ret);
  4657. goto err;
  4658. }
  4659. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4660. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4661. slim_rx_cfg[5].channels);
  4662. rx_ch_count = slim_rx_cfg[5].channels;
  4663. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4664. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4665. slim_rx_cfg[2].channels);
  4666. rx_ch_count = slim_rx_cfg[2].channels;
  4667. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4668. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4669. slim_rx_cfg[6].channels);
  4670. rx_ch_count = slim_rx_cfg[6].channels;
  4671. } else {
  4672. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4673. slim_rx_cfg[0].channels);
  4674. rx_ch_count = slim_rx_cfg[0].channels;
  4675. }
  4676. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4677. rx_ch_count, rx_ch);
  4678. if (ret < 0) {
  4679. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4680. __func__, ret);
  4681. goto err;
  4682. }
  4683. } else {
  4684. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4685. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4686. ret = snd_soc_dai_get_channel_map(codec_dai,
  4687. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4688. if (ret < 0) {
  4689. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4690. __func__, ret);
  4691. goto err;
  4692. }
  4693. /* For <codec>_tx1 case */
  4694. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4695. user_set_tx_ch = slim_tx_cfg[0].channels;
  4696. /* For <codec>_tx3 case */
  4697. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4698. user_set_tx_ch = slim_tx_cfg[1].channels;
  4699. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4700. user_set_tx_ch = msm_vi_feed_tx_ch;
  4701. else
  4702. user_set_tx_ch = tx_ch_cnt;
  4703. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4704. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4705. tx_ch_cnt, dai_link->id);
  4706. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4707. user_set_tx_ch, tx_ch, 0, 0);
  4708. if (ret < 0)
  4709. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4710. __func__, ret);
  4711. }
  4712. err:
  4713. return ret;
  4714. }
  4715. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4716. struct snd_pcm_hw_params *params)
  4717. {
  4718. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4719. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4720. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4721. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4722. int ret = 0;
  4723. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4724. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4725. u32 user_set_tx_ch = 0;
  4726. u32 user_set_rx_ch = 0;
  4727. u32 ch_id;
  4728. ret = snd_soc_dai_get_channel_map(codec_dai,
  4729. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4730. &rx_ch_cdc_dma);
  4731. if (ret < 0) {
  4732. pr_err("%s: failed to get codec chan map, err:%d\n",
  4733. __func__, ret);
  4734. goto err;
  4735. }
  4736. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4737. switch (dai_link->id) {
  4738. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4739. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4740. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4741. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4742. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4743. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4744. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4745. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4746. {
  4747. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4748. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4749. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4750. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4751. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4752. user_set_rx_ch, &rx_ch_cdc_dma);
  4753. if (ret < 0) {
  4754. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4755. __func__, ret);
  4756. goto err;
  4757. }
  4758. }
  4759. break;
  4760. }
  4761. } else {
  4762. switch (dai_link->id) {
  4763. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4764. {
  4765. user_set_tx_ch = msm_vi_feed_tx_ch;
  4766. }
  4767. break;
  4768. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4769. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4770. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4771. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4772. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4773. {
  4774. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4775. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4776. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4777. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4778. }
  4779. break;
  4780. }
  4781. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4782. &tx_ch_cdc_dma, 0, 0);
  4783. if (ret < 0) {
  4784. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4785. __func__, ret);
  4786. goto err;
  4787. }
  4788. }
  4789. err:
  4790. return ret;
  4791. }
  4792. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4793. struct snd_pcm_hw_params *params)
  4794. {
  4795. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4796. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4797. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4798. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4799. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4800. unsigned int num_tx_ch = 0;
  4801. unsigned int num_rx_ch = 0;
  4802. int ret = 0;
  4803. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4804. num_rx_ch = params_channels(params);
  4805. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4806. codec_dai->name, codec_dai->id, num_rx_ch);
  4807. ret = snd_soc_dai_get_channel_map(codec_dai,
  4808. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4809. if (ret < 0) {
  4810. pr_err("%s: failed to get codec chan map, err:%d\n",
  4811. __func__, ret);
  4812. goto err;
  4813. }
  4814. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4815. num_rx_ch, rx_ch);
  4816. if (ret < 0) {
  4817. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4818. __func__, ret);
  4819. goto err;
  4820. }
  4821. } else {
  4822. num_tx_ch = params_channels(params);
  4823. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4824. codec_dai->name, codec_dai->id, num_tx_ch);
  4825. ret = snd_soc_dai_get_channel_map(codec_dai,
  4826. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4827. if (ret < 0) {
  4828. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4829. __func__, ret);
  4830. goto err;
  4831. }
  4832. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4833. num_tx_ch, tx_ch, 0, 0);
  4834. if (ret < 0) {
  4835. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4836. __func__, ret);
  4837. goto err;
  4838. }
  4839. }
  4840. err:
  4841. return ret;
  4842. }
  4843. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4844. struct snd_pcm_hw_params *params)
  4845. {
  4846. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4847. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4848. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4849. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4850. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4851. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4852. int ret;
  4853. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4854. codec_dai->name, codec_dai->id);
  4855. ret = snd_soc_dai_get_channel_map(codec_dai,
  4856. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4857. if (ret) {
  4858. dev_err(rtd->dev,
  4859. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4860. __func__, ret);
  4861. goto err;
  4862. }
  4863. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4864. __func__, tx_ch_cnt, dai_link->id);
  4865. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4866. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4867. if (ret)
  4868. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4869. __func__, ret);
  4870. err:
  4871. return ret;
  4872. }
  4873. int msm_snd_cpe_hw_params(struct snd_pcm_substream *substream,
  4874. struct snd_pcm_hw_params *params)
  4875. {
  4876. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4877. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4878. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4879. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4880. int ret = 0;
  4881. u32 tx_ch[SLIM_MAX_TX_PORTS];
  4882. u32 tx_ch_cnt = 0;
  4883. if (substream->stream != SNDRV_PCM_STREAM_CAPTURE) {
  4884. pr_err("%s: Invalid stream type %d\n",
  4885. __func__, substream->stream);
  4886. ret = -EINVAL;
  4887. goto end;
  4888. }
  4889. pr_debug("%s: %s_tx_dai_id_%d\n", __func__,
  4890. codec_dai->name, codec_dai->id);
  4891. ret = snd_soc_dai_get_channel_map(codec_dai,
  4892. &tx_ch_cnt, tx_ch, NULL, NULL);
  4893. if (ret < 0) {
  4894. pr_err("%s: failed to get codec chan map\n, err:%d\n",
  4895. __func__, ret);
  4896. goto end;
  4897. }
  4898. pr_debug("%s: tx_ch_cnt(%d) id %d\n",
  4899. __func__, tx_ch_cnt, dai_link->id);
  4900. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4901. tx_ch_cnt, tx_ch, 0, 0);
  4902. if (ret < 0) {
  4903. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4904. __func__, ret);
  4905. goto end;
  4906. }
  4907. end:
  4908. return ret;
  4909. }
  4910. static int msm_get_port_id(int be_id)
  4911. {
  4912. int afe_port_id;
  4913. switch (be_id) {
  4914. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4915. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4916. break;
  4917. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4918. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4919. break;
  4920. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4921. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4922. break;
  4923. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4924. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4925. break;
  4926. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4927. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4928. break;
  4929. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4930. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4931. break;
  4932. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4933. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4934. break;
  4935. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4936. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4937. break;
  4938. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4939. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4940. break;
  4941. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4942. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4943. break;
  4944. default:
  4945. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4946. afe_port_id = -EINVAL;
  4947. }
  4948. return afe_port_id;
  4949. }
  4950. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4951. {
  4952. u32 bit_per_sample;
  4953. switch (bit_format) {
  4954. case SNDRV_PCM_FORMAT_S32_LE:
  4955. case SNDRV_PCM_FORMAT_S24_3LE:
  4956. case SNDRV_PCM_FORMAT_S24_LE:
  4957. bit_per_sample = 32;
  4958. break;
  4959. case SNDRV_PCM_FORMAT_S16_LE:
  4960. default:
  4961. bit_per_sample = 16;
  4962. break;
  4963. }
  4964. return bit_per_sample;
  4965. }
  4966. static void update_mi2s_clk_val(int dai_id, int stream)
  4967. {
  4968. u32 bit_per_sample;
  4969. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4970. bit_per_sample =
  4971. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4972. mi2s_clk[dai_id].clk_freq_in_hz =
  4973. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4974. } else {
  4975. bit_per_sample =
  4976. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4977. mi2s_clk[dai_id].clk_freq_in_hz =
  4978. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4979. }
  4980. }
  4981. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4982. {
  4983. int ret = 0;
  4984. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4985. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4986. int port_id = 0;
  4987. int index = cpu_dai->id;
  4988. port_id = msm_get_port_id(rtd->dai_link->id);
  4989. if (port_id < 0) {
  4990. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4991. ret = port_id;
  4992. goto err;
  4993. }
  4994. if (enable) {
  4995. update_mi2s_clk_val(index, substream->stream);
  4996. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4997. mi2s_clk[index].clk_freq_in_hz);
  4998. }
  4999. mi2s_clk[index].enable = enable;
  5000. ret = afe_set_lpass_clock_v2(port_id,
  5001. &mi2s_clk[index]);
  5002. if (ret < 0) {
  5003. dev_err(rtd->card->dev,
  5004. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  5005. __func__, port_id, ret);
  5006. goto err;
  5007. }
  5008. err:
  5009. return ret;
  5010. }
  5011. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  5012. struct snd_pcm_hw_params *params)
  5013. {
  5014. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5015. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5016. int ret = 0;
  5017. int slot_width = 32;
  5018. int channels, slots;
  5019. unsigned int slot_mask, rate, clk_freq;
  5020. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  5021. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  5022. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5023. switch (cpu_dai->id) {
  5024. case AFE_PORT_ID_PRIMARY_TDM_RX:
  5025. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  5026. break;
  5027. case AFE_PORT_ID_SECONDARY_TDM_RX:
  5028. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  5029. break;
  5030. case AFE_PORT_ID_TERTIARY_TDM_RX:
  5031. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  5032. break;
  5033. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  5034. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  5035. break;
  5036. case AFE_PORT_ID_QUINARY_TDM_RX:
  5037. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  5038. break;
  5039. case AFE_PORT_ID_PRIMARY_TDM_TX:
  5040. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  5041. break;
  5042. case AFE_PORT_ID_SECONDARY_TDM_TX:
  5043. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  5044. break;
  5045. case AFE_PORT_ID_TERTIARY_TDM_TX:
  5046. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  5047. break;
  5048. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  5049. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  5050. break;
  5051. case AFE_PORT_ID_QUINARY_TDM_TX:
  5052. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  5053. break;
  5054. default:
  5055. pr_err("%s: dai id 0x%x not supported\n",
  5056. __func__, cpu_dai->id);
  5057. return -EINVAL;
  5058. }
  5059. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  5060. /*2 slot config - bits 0 and 1 set for the first two slots */
  5061. slot_mask = 0x0000FFFF >> (16-slots);
  5062. channels = slots;
  5063. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  5064. __func__, slot_width, slots);
  5065. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  5066. slots, slot_width);
  5067. if (ret < 0) {
  5068. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  5069. __func__, ret);
  5070. goto end;
  5071. }
  5072. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5073. 0, NULL, channels, slot_offset);
  5074. if (ret < 0) {
  5075. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  5076. __func__, ret);
  5077. goto end;
  5078. }
  5079. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  5080. /*2 slot config - bits 0 and 1 set for the first two slots */
  5081. slot_mask = 0x0000FFFF >> (16-slots);
  5082. channels = slots;
  5083. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  5084. __func__, slot_width, slots);
  5085. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  5086. slots, slot_width);
  5087. if (ret < 0) {
  5088. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  5089. __func__, ret);
  5090. goto end;
  5091. }
  5092. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5093. channels, slot_offset, 0, NULL);
  5094. if (ret < 0) {
  5095. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  5096. __func__, ret);
  5097. goto end;
  5098. }
  5099. } else {
  5100. ret = -EINVAL;
  5101. pr_err("%s: invalid use case, err:%d\n",
  5102. __func__, ret);
  5103. goto end;
  5104. }
  5105. rate = params_rate(params);
  5106. clk_freq = rate * slot_width * slots;
  5107. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5108. if (ret < 0)
  5109. pr_err("%s: failed to set tdm clk, err:%d\n",
  5110. __func__, ret);
  5111. end:
  5112. return ret;
  5113. }
  5114. static int msm_get_tdm_mode(u32 port_id)
  5115. {
  5116. int tdm_mode;
  5117. switch (port_id) {
  5118. case AFE_PORT_ID_PRIMARY_TDM_RX:
  5119. case AFE_PORT_ID_PRIMARY_TDM_TX:
  5120. tdm_mode = TDM_PRI;
  5121. break;
  5122. case AFE_PORT_ID_SECONDARY_TDM_RX:
  5123. case AFE_PORT_ID_SECONDARY_TDM_TX:
  5124. tdm_mode = TDM_SEC;
  5125. break;
  5126. case AFE_PORT_ID_TERTIARY_TDM_RX:
  5127. case AFE_PORT_ID_TERTIARY_TDM_TX:
  5128. tdm_mode = TDM_TERT;
  5129. break;
  5130. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  5131. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  5132. tdm_mode = TDM_QUAT;
  5133. break;
  5134. case AFE_PORT_ID_QUINARY_TDM_RX:
  5135. case AFE_PORT_ID_QUINARY_TDM_TX:
  5136. tdm_mode = TDM_QUIN;
  5137. break;
  5138. default:
  5139. pr_err("%s: Invalid port id: %d\n", __func__, port_id);
  5140. tdm_mode = -EINVAL;
  5141. }
  5142. return tdm_mode;
  5143. }
  5144. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5145. {
  5146. int ret = 0;
  5147. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5148. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5149. struct snd_soc_card *card = rtd->card;
  5150. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5151. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  5152. if (tdm_mode < 0) {
  5153. dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
  5154. return tdm_mode;
  5155. }
  5156. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5157. if (pdata->mi2s_gpio_p[tdm_mode])
  5158. ret = msm_cdc_pinctrl_select_active_state(
  5159. pdata->mi2s_gpio_p[tdm_mode]);
  5160. return ret;
  5161. }
  5162. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5163. {
  5164. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5165. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5166. struct snd_soc_card *card = rtd->card;
  5167. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5168. int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
  5169. if (tdm_mode < 0) {
  5170. dev_err(rtd->card->dev, "%s: Invalid tdm_mode\n", __func__);
  5171. return;
  5172. }
  5173. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5174. if (pdata->mi2s_gpio_p[tdm_mode])
  5175. msm_cdc_pinctrl_select_sleep_state(
  5176. pdata->mi2s_gpio_p[tdm_mode]);
  5177. }
  5178. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5179. .hw_params = sm6150_tdm_snd_hw_params,
  5180. .startup = sm6150_tdm_snd_startup,
  5181. .shutdown = sm6150_tdm_snd_shutdown
  5182. };
  5183. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5184. {
  5185. cpumask_t mask;
  5186. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5187. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5188. cpumask_clear(&mask);
  5189. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5190. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5191. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5192. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5193. pm_qos_add_request(&substream->latency_pm_qos_req,
  5194. PM_QOS_CPU_DMA_LATENCY,
  5195. MSM_LL_QOS_VALUE);
  5196. return 0;
  5197. }
  5198. static struct snd_soc_ops msm_fe_qos_ops = {
  5199. .prepare = msm_fe_qos_prepare,
  5200. };
  5201. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5202. {
  5203. int ret = 0;
  5204. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5205. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5206. int index = cpu_dai->id;
  5207. int port_id = msm_get_port_id(rtd->dai_link->id);
  5208. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5209. struct snd_soc_card *card = rtd->card;
  5210. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5211. dev_dbg(rtd->card->dev,
  5212. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5213. __func__, substream->name, substream->stream,
  5214. cpu_dai->name, cpu_dai->id);
  5215. if (port_id < 0) {
  5216. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  5217. ret = port_id;
  5218. goto err;
  5219. }
  5220. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5221. ret = -EINVAL;
  5222. dev_err(rtd->card->dev,
  5223. "%s: CPU DAI id (%d) out of range\n",
  5224. __func__, cpu_dai->id);
  5225. goto err;
  5226. }
  5227. /*
  5228. * Mutex protection in case the same MI2S
  5229. * interface using for both TX and RX so
  5230. * that the same clock won't be enable twice.
  5231. */
  5232. mutex_lock(&mi2s_intf_conf[index].lock);
  5233. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5234. /* Check if msm needs to provide the clock to the interface */
  5235. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5236. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5237. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5238. }
  5239. ret = msm_mi2s_set_sclk(substream, true);
  5240. if (ret < 0) {
  5241. dev_err(rtd->card->dev,
  5242. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5243. __func__, ret);
  5244. goto clean_up;
  5245. }
  5246. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5247. if (ret < 0) {
  5248. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5249. __func__, index, ret);
  5250. goto clk_off;
  5251. }
  5252. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  5253. pr_debug("%s: Enabling mclk, clk_freq_in_hz = %u\n",
  5254. __func__, mi2s_mclk[index].clk_freq_in_hz);
  5255. ret = afe_set_lpass_clock_v2(port_id,
  5256. &mi2s_mclk[index]);
  5257. if (ret < 0) {
  5258. pr_err("%s: afe lpass mclk failed, err:%d\n",
  5259. __func__, ret);
  5260. goto clk_off;
  5261. }
  5262. mi2s_mclk[index].enable = 1;
  5263. }
  5264. if (pdata->mi2s_gpio_p[index])
  5265. msm_cdc_pinctrl_select_active_state(
  5266. pdata->mi2s_gpio_p[index]);
  5267. }
  5268. clk_off:
  5269. if (ret < 0)
  5270. msm_mi2s_set_sclk(substream, false);
  5271. clean_up:
  5272. if (ret < 0)
  5273. mi2s_intf_conf[index].ref_cnt--;
  5274. mutex_unlock(&mi2s_intf_conf[index].lock);
  5275. err:
  5276. return ret;
  5277. }
  5278. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5279. {
  5280. int ret;
  5281. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5282. int index = rtd->cpu_dai->id;
  5283. int port_id = msm_get_port_id(rtd->dai_link->id);
  5284. struct snd_soc_card *card = rtd->card;
  5285. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5286. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5287. substream->name, substream->stream);
  5288. if (port_id < 0) {
  5289. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  5290. return;
  5291. }
  5292. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5293. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5294. return;
  5295. }
  5296. mutex_lock(&mi2s_intf_conf[index].lock);
  5297. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5298. if (pdata->mi2s_gpio_p[index])
  5299. msm_cdc_pinctrl_select_sleep_state(
  5300. pdata->mi2s_gpio_p[index]);
  5301. ret = msm_mi2s_set_sclk(substream, false);
  5302. if (ret < 0)
  5303. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5304. __func__, index, ret);
  5305. if (mi2s_intf_conf[index].msm_is_ext_mclk) {
  5306. pr_debug("%s: Disabling mclk, clk_freq_in_hz = %u\n",
  5307. __func__, mi2s_mclk[index].clk_freq_in_hz);
  5308. ret = afe_set_lpass_clock_v2(port_id,
  5309. &mi2s_mclk[index]);
  5310. if (ret < 0)
  5311. pr_err("%s: mclk disable failed for MCLK (%d); ret=%d\n",
  5312. __func__, index, ret);
  5313. mi2s_mclk[index].enable = 0;
  5314. }
  5315. }
  5316. mutex_unlock(&mi2s_intf_conf[index].lock);
  5317. }
  5318. static struct snd_soc_ops msm_mi2s_be_ops = {
  5319. .startup = msm_mi2s_snd_startup,
  5320. .shutdown = msm_mi2s_snd_shutdown,
  5321. };
  5322. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5323. .hw_params = msm_snd_cdc_dma_hw_params,
  5324. };
  5325. static struct snd_soc_ops msm_be_ops = {
  5326. .hw_params = msm_snd_hw_params,
  5327. };
  5328. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5329. .hw_params = msm_slimbus_2_hw_params,
  5330. };
  5331. static struct snd_soc_ops msm_wcn_ops = {
  5332. .hw_params = msm_wcn_hw_params,
  5333. };
  5334. static struct snd_soc_ops msm_ext_cpe_ops = {
  5335. .hw_params = msm_snd_cpe_hw_params,
  5336. };
  5337. /* Digital audio interface glue - connects codec <---> CPU */
  5338. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5339. /* FrontEnd DAI Links */
  5340. {/* hw:x,0 */
  5341. .name = MSM_DAILINK_NAME(Media1),
  5342. .stream_name = "MultiMedia1",
  5343. .cpu_dai_name = "MultiMedia1",
  5344. .platform_name = "msm-pcm-dsp.0",
  5345. .dynamic = 1,
  5346. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5347. .dpcm_playback = 1,
  5348. .dpcm_capture = 1,
  5349. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5350. SND_SOC_DPCM_TRIGGER_POST},
  5351. .codec_dai_name = "snd-soc-dummy-dai",
  5352. .codec_name = "snd-soc-dummy",
  5353. .ignore_suspend = 1,
  5354. /* this dainlink has playback support */
  5355. .ignore_pmdown_time = 1,
  5356. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5357. },
  5358. {/* hw:x,1 */
  5359. .name = MSM_DAILINK_NAME(Media2),
  5360. .stream_name = "MultiMedia2",
  5361. .cpu_dai_name = "MultiMedia2",
  5362. .platform_name = "msm-pcm-dsp.0",
  5363. .dynamic = 1,
  5364. .dpcm_playback = 1,
  5365. .dpcm_capture = 1,
  5366. .codec_dai_name = "snd-soc-dummy-dai",
  5367. .codec_name = "snd-soc-dummy",
  5368. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5369. SND_SOC_DPCM_TRIGGER_POST},
  5370. .ignore_suspend = 1,
  5371. /* this dainlink has playback support */
  5372. .ignore_pmdown_time = 1,
  5373. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5374. },
  5375. {/* hw:x,2 */
  5376. .name = "VoiceMMode1",
  5377. .stream_name = "VoiceMMode1",
  5378. .cpu_dai_name = "VoiceMMode1",
  5379. .platform_name = "msm-pcm-voice",
  5380. .dynamic = 1,
  5381. .dpcm_playback = 1,
  5382. .dpcm_capture = 1,
  5383. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5384. SND_SOC_DPCM_TRIGGER_POST},
  5385. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5386. .ignore_suspend = 1,
  5387. .ignore_pmdown_time = 1,
  5388. .codec_dai_name = "snd-soc-dummy-dai",
  5389. .codec_name = "snd-soc-dummy",
  5390. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5391. },
  5392. {/* hw:x,3 */
  5393. .name = "MSM VoIP",
  5394. .stream_name = "VoIP",
  5395. .cpu_dai_name = "VoIP",
  5396. .platform_name = "msm-voip-dsp",
  5397. .dynamic = 1,
  5398. .dpcm_playback = 1,
  5399. .dpcm_capture = 1,
  5400. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5401. SND_SOC_DPCM_TRIGGER_POST},
  5402. .codec_dai_name = "snd-soc-dummy-dai",
  5403. .codec_name = "snd-soc-dummy",
  5404. .ignore_suspend = 1,
  5405. /* this dainlink has playback support */
  5406. .ignore_pmdown_time = 1,
  5407. .id = MSM_FRONTEND_DAI_VOIP,
  5408. },
  5409. {/* hw:x,4 */
  5410. .name = MSM_DAILINK_NAME(ULL),
  5411. .stream_name = "MultiMedia3",
  5412. .cpu_dai_name = "MultiMedia3",
  5413. .platform_name = "msm-pcm-dsp.2",
  5414. .dynamic = 1,
  5415. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5416. .dpcm_playback = 1,
  5417. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5418. SND_SOC_DPCM_TRIGGER_POST},
  5419. .codec_dai_name = "snd-soc-dummy-dai",
  5420. .codec_name = "snd-soc-dummy",
  5421. .ignore_suspend = 1,
  5422. /* this dainlink has playback support */
  5423. .ignore_pmdown_time = 1,
  5424. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5425. },
  5426. /* Hostless PCM purpose */
  5427. {/* hw:x,5 */
  5428. .name = "SLIMBUS_0 Hostless",
  5429. .stream_name = "SLIMBUS_0 Hostless",
  5430. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5431. .platform_name = "msm-pcm-hostless",
  5432. .dynamic = 1,
  5433. .dpcm_playback = 1,
  5434. .dpcm_capture = 1,
  5435. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5436. SND_SOC_DPCM_TRIGGER_POST},
  5437. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5438. .ignore_suspend = 1,
  5439. /* this dailink has playback support */
  5440. .ignore_pmdown_time = 1,
  5441. .codec_dai_name = "snd-soc-dummy-dai",
  5442. .codec_name = "snd-soc-dummy",
  5443. },
  5444. {/* hw:x,6 */
  5445. .name = "MSM AFE-PCM RX",
  5446. .stream_name = "AFE-PROXY RX",
  5447. .cpu_dai_name = "msm-dai-q6-dev.241",
  5448. .codec_name = "msm-stub-codec.1",
  5449. .codec_dai_name = "msm-stub-rx",
  5450. .platform_name = "msm-pcm-afe",
  5451. .dpcm_playback = 1,
  5452. .ignore_suspend = 1,
  5453. /* this dainlink has playback support */
  5454. .ignore_pmdown_time = 1,
  5455. },
  5456. {/* hw:x,7 */
  5457. .name = "MSM AFE-PCM TX",
  5458. .stream_name = "AFE-PROXY TX",
  5459. .cpu_dai_name = "msm-dai-q6-dev.240",
  5460. .codec_name = "msm-stub-codec.1",
  5461. .codec_dai_name = "msm-stub-tx",
  5462. .platform_name = "msm-pcm-afe",
  5463. .dpcm_capture = 1,
  5464. .ignore_suspend = 1,
  5465. },
  5466. {/* hw:x,8 */
  5467. .name = MSM_DAILINK_NAME(Compress1),
  5468. .stream_name = "Compress1",
  5469. .cpu_dai_name = "MultiMedia4",
  5470. .platform_name = "msm-compress-dsp",
  5471. .dynamic = 1,
  5472. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5473. .dpcm_playback = 1,
  5474. .dpcm_capture = 1,
  5475. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5476. SND_SOC_DPCM_TRIGGER_POST},
  5477. .codec_dai_name = "snd-soc-dummy-dai",
  5478. .codec_name = "snd-soc-dummy",
  5479. .ignore_suspend = 1,
  5480. .ignore_pmdown_time = 1,
  5481. /* this dainlink has playback support */
  5482. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5483. },
  5484. {/* hw:x,9 */
  5485. .name = "AUXPCM Hostless",
  5486. .stream_name = "AUXPCM Hostless",
  5487. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5488. .platform_name = "msm-pcm-hostless",
  5489. .dynamic = 1,
  5490. .dpcm_playback = 1,
  5491. .dpcm_capture = 1,
  5492. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5493. SND_SOC_DPCM_TRIGGER_POST},
  5494. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5495. .ignore_suspend = 1,
  5496. /* this dainlink has playback support */
  5497. .ignore_pmdown_time = 1,
  5498. .codec_dai_name = "snd-soc-dummy-dai",
  5499. .codec_name = "snd-soc-dummy",
  5500. },
  5501. {/* hw:x,10 */
  5502. .name = "SLIMBUS_1 Hostless",
  5503. .stream_name = "SLIMBUS_1 Hostless",
  5504. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5505. .platform_name = "msm-pcm-hostless",
  5506. .dynamic = 1,
  5507. .dpcm_playback = 1,
  5508. .dpcm_capture = 1,
  5509. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5510. SND_SOC_DPCM_TRIGGER_POST},
  5511. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5512. .ignore_suspend = 1,
  5513. /* this dailink has playback support */
  5514. .ignore_pmdown_time = 1,
  5515. .codec_dai_name = "snd-soc-dummy-dai",
  5516. .codec_name = "snd-soc-dummy",
  5517. },
  5518. {/* hw:x,11 */
  5519. .name = "SLIMBUS_3 Hostless",
  5520. .stream_name = "SLIMBUS_3 Hostless",
  5521. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5522. .platform_name = "msm-pcm-hostless",
  5523. .dynamic = 1,
  5524. .dpcm_playback = 1,
  5525. .dpcm_capture = 1,
  5526. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5527. SND_SOC_DPCM_TRIGGER_POST},
  5528. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5529. .ignore_suspend = 1,
  5530. /* this dailink has playback support */
  5531. .ignore_pmdown_time = 1,
  5532. .codec_dai_name = "snd-soc-dummy-dai",
  5533. .codec_name = "snd-soc-dummy",
  5534. },
  5535. {/* hw:x,12 */
  5536. .name = "SLIMBUS_7 Hostless",
  5537. .stream_name = "SLIMBUS_7 Hostless",
  5538. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5539. .platform_name = "msm-pcm-hostless",
  5540. .dynamic = 1,
  5541. .dpcm_playback = 1,
  5542. .dpcm_capture = 1,
  5543. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5544. SND_SOC_DPCM_TRIGGER_POST},
  5545. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5546. .ignore_suspend = 1,
  5547. /* this dailink has playback support */
  5548. .ignore_pmdown_time = 1,
  5549. .codec_dai_name = "snd-soc-dummy-dai",
  5550. .codec_name = "snd-soc-dummy",
  5551. },
  5552. {/* hw:x,13 */
  5553. .name = MSM_DAILINK_NAME(LowLatency),
  5554. .stream_name = "MultiMedia5",
  5555. .cpu_dai_name = "MultiMedia5",
  5556. .platform_name = "msm-pcm-dsp.1",
  5557. .dynamic = 1,
  5558. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5559. .dpcm_playback = 1,
  5560. .dpcm_capture = 1,
  5561. .codec_dai_name = "snd-soc-dummy-dai",
  5562. .codec_name = "snd-soc-dummy",
  5563. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5564. SND_SOC_DPCM_TRIGGER_POST},
  5565. .ignore_suspend = 1,
  5566. /* this dainlink has playback support */
  5567. .ignore_pmdown_time = 1,
  5568. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5569. .ops = &msm_fe_qos_ops,
  5570. },
  5571. {/* hw:x,14 */
  5572. .name = "Listen 1 Audio Service",
  5573. .stream_name = "Listen 1 Audio Service",
  5574. .cpu_dai_name = "LSM1",
  5575. .platform_name = "msm-lsm-client",
  5576. .dynamic = 1,
  5577. .dpcm_capture = 1,
  5578. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5579. SND_SOC_DPCM_TRIGGER_POST },
  5580. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5581. .ignore_suspend = 1,
  5582. .codec_dai_name = "snd-soc-dummy-dai",
  5583. .codec_name = "snd-soc-dummy",
  5584. .id = MSM_FRONTEND_DAI_LSM1,
  5585. },
  5586. /* Multiple Tunnel instances */
  5587. {/* hw:x,15 */
  5588. .name = MSM_DAILINK_NAME(Compress2),
  5589. .stream_name = "Compress2",
  5590. .cpu_dai_name = "MultiMedia7",
  5591. .platform_name = "msm-compress-dsp",
  5592. .dynamic = 1,
  5593. .dpcm_playback = 1,
  5594. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5595. SND_SOC_DPCM_TRIGGER_POST},
  5596. .codec_dai_name = "snd-soc-dummy-dai",
  5597. .codec_name = "snd-soc-dummy",
  5598. .ignore_suspend = 1,
  5599. .ignore_pmdown_time = 1,
  5600. /* this dainlink has playback support */
  5601. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5602. },
  5603. {/* hw:x,16 */
  5604. .name = MSM_DAILINK_NAME(MultiMedia10),
  5605. .stream_name = "MultiMedia10",
  5606. .cpu_dai_name = "MultiMedia10",
  5607. .platform_name = "msm-pcm-dsp.1",
  5608. .dynamic = 1,
  5609. .dpcm_playback = 1,
  5610. .dpcm_capture = 1,
  5611. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5612. SND_SOC_DPCM_TRIGGER_POST},
  5613. .codec_dai_name = "snd-soc-dummy-dai",
  5614. .codec_name = "snd-soc-dummy",
  5615. .ignore_suspend = 1,
  5616. .ignore_pmdown_time = 1,
  5617. /* this dainlink has playback support */
  5618. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5619. },
  5620. {/* hw:x,17 */
  5621. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5622. .stream_name = "MM_NOIRQ",
  5623. .cpu_dai_name = "MultiMedia8",
  5624. .platform_name = "msm-pcm-dsp-noirq",
  5625. .dynamic = 1,
  5626. .dpcm_playback = 1,
  5627. .dpcm_capture = 1,
  5628. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5629. SND_SOC_DPCM_TRIGGER_POST},
  5630. .codec_dai_name = "snd-soc-dummy-dai",
  5631. .codec_name = "snd-soc-dummy",
  5632. .ignore_suspend = 1,
  5633. .ignore_pmdown_time = 1,
  5634. /* this dainlink has playback support */
  5635. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5636. .ops = &msm_fe_qos_ops,
  5637. },
  5638. /* HDMI Hostless */
  5639. {/* hw:x,18 */
  5640. .name = "HDMI_RX_HOSTLESS",
  5641. .stream_name = "HDMI_RX_HOSTLESS",
  5642. .cpu_dai_name = "HDMI_HOSTLESS",
  5643. .platform_name = "msm-pcm-hostless",
  5644. .dynamic = 1,
  5645. .dpcm_playback = 1,
  5646. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5647. SND_SOC_DPCM_TRIGGER_POST},
  5648. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5649. .ignore_suspend = 1,
  5650. .ignore_pmdown_time = 1,
  5651. .codec_dai_name = "snd-soc-dummy-dai",
  5652. .codec_name = "snd-soc-dummy",
  5653. },
  5654. {/* hw:x,19 */
  5655. .name = "VoiceMMode2",
  5656. .stream_name = "VoiceMMode2",
  5657. .cpu_dai_name = "VoiceMMode2",
  5658. .platform_name = "msm-pcm-voice",
  5659. .dynamic = 1,
  5660. .dpcm_playback = 1,
  5661. .dpcm_capture = 1,
  5662. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5663. SND_SOC_DPCM_TRIGGER_POST},
  5664. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5665. .ignore_suspend = 1,
  5666. .ignore_pmdown_time = 1,
  5667. .codec_dai_name = "snd-soc-dummy-dai",
  5668. .codec_name = "snd-soc-dummy",
  5669. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5670. },
  5671. /* LSM FE */
  5672. {/* hw:x,20 */
  5673. .name = "Listen 2 Audio Service",
  5674. .stream_name = "Listen 2 Audio Service",
  5675. .cpu_dai_name = "LSM2",
  5676. .platform_name = "msm-lsm-client",
  5677. .dynamic = 1,
  5678. .dpcm_capture = 1,
  5679. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5680. SND_SOC_DPCM_TRIGGER_POST },
  5681. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5682. .ignore_suspend = 1,
  5683. .codec_dai_name = "snd-soc-dummy-dai",
  5684. .codec_name = "snd-soc-dummy",
  5685. .id = MSM_FRONTEND_DAI_LSM2,
  5686. },
  5687. {/* hw:x,21 */
  5688. .name = "Listen 3 Audio Service",
  5689. .stream_name = "Listen 3 Audio Service",
  5690. .cpu_dai_name = "LSM3",
  5691. .platform_name = "msm-lsm-client",
  5692. .dynamic = 1,
  5693. .dpcm_capture = 1,
  5694. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5695. SND_SOC_DPCM_TRIGGER_POST },
  5696. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5697. .ignore_suspend = 1,
  5698. .codec_dai_name = "snd-soc-dummy-dai",
  5699. .codec_name = "snd-soc-dummy",
  5700. .id = MSM_FRONTEND_DAI_LSM3,
  5701. },
  5702. {/* hw:x,22 */
  5703. .name = "Listen 4 Audio Service",
  5704. .stream_name = "Listen 4 Audio Service",
  5705. .cpu_dai_name = "LSM4",
  5706. .platform_name = "msm-lsm-client",
  5707. .dynamic = 1,
  5708. .dpcm_capture = 1,
  5709. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5710. SND_SOC_DPCM_TRIGGER_POST },
  5711. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5712. .ignore_suspend = 1,
  5713. .codec_dai_name = "snd-soc-dummy-dai",
  5714. .codec_name = "snd-soc-dummy",
  5715. .id = MSM_FRONTEND_DAI_LSM4,
  5716. },
  5717. {/* hw:x,23 */
  5718. .name = "Listen 5 Audio Service",
  5719. .stream_name = "Listen 5 Audio Service",
  5720. .cpu_dai_name = "LSM5",
  5721. .platform_name = "msm-lsm-client",
  5722. .dynamic = 1,
  5723. .dpcm_capture = 1,
  5724. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5725. SND_SOC_DPCM_TRIGGER_POST },
  5726. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5727. .ignore_suspend = 1,
  5728. .codec_dai_name = "snd-soc-dummy-dai",
  5729. .codec_name = "snd-soc-dummy",
  5730. .id = MSM_FRONTEND_DAI_LSM5,
  5731. },
  5732. {/* hw:x,24 */
  5733. .name = "Listen 6 Audio Service",
  5734. .stream_name = "Listen 6 Audio Service",
  5735. .cpu_dai_name = "LSM6",
  5736. .platform_name = "msm-lsm-client",
  5737. .dynamic = 1,
  5738. .dpcm_capture = 1,
  5739. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5740. SND_SOC_DPCM_TRIGGER_POST },
  5741. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5742. .ignore_suspend = 1,
  5743. .codec_dai_name = "snd-soc-dummy-dai",
  5744. .codec_name = "snd-soc-dummy",
  5745. .id = MSM_FRONTEND_DAI_LSM6,
  5746. },
  5747. {/* hw:x,25 */
  5748. .name = "Listen 7 Audio Service",
  5749. .stream_name = "Listen 7 Audio Service",
  5750. .cpu_dai_name = "LSM7",
  5751. .platform_name = "msm-lsm-client",
  5752. .dynamic = 1,
  5753. .dpcm_capture = 1,
  5754. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5755. SND_SOC_DPCM_TRIGGER_POST },
  5756. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5757. .ignore_suspend = 1,
  5758. .codec_dai_name = "snd-soc-dummy-dai",
  5759. .codec_name = "snd-soc-dummy",
  5760. .id = MSM_FRONTEND_DAI_LSM7,
  5761. },
  5762. {/* hw:x,26 */
  5763. .name = "Listen 8 Audio Service",
  5764. .stream_name = "Listen 8 Audio Service",
  5765. .cpu_dai_name = "LSM8",
  5766. .platform_name = "msm-lsm-client",
  5767. .dynamic = 1,
  5768. .dpcm_capture = 1,
  5769. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5770. SND_SOC_DPCM_TRIGGER_POST },
  5771. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5772. .ignore_suspend = 1,
  5773. .codec_dai_name = "snd-soc-dummy-dai",
  5774. .codec_name = "snd-soc-dummy",
  5775. .id = MSM_FRONTEND_DAI_LSM8,
  5776. },
  5777. {/* hw:x,27 */
  5778. .name = MSM_DAILINK_NAME(Media9),
  5779. .stream_name = "MultiMedia9",
  5780. .cpu_dai_name = "MultiMedia9",
  5781. .platform_name = "msm-pcm-dsp.0",
  5782. .dynamic = 1,
  5783. .dpcm_playback = 1,
  5784. .dpcm_capture = 1,
  5785. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5786. SND_SOC_DPCM_TRIGGER_POST},
  5787. .codec_dai_name = "snd-soc-dummy-dai",
  5788. .codec_name = "snd-soc-dummy",
  5789. .ignore_suspend = 1,
  5790. /* this dainlink has playback support */
  5791. .ignore_pmdown_time = 1,
  5792. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5793. },
  5794. {/* hw:x,28 */
  5795. .name = MSM_DAILINK_NAME(Compress4),
  5796. .stream_name = "Compress4",
  5797. .cpu_dai_name = "MultiMedia11",
  5798. .platform_name = "msm-compress-dsp",
  5799. .dynamic = 1,
  5800. .dpcm_playback = 1,
  5801. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5802. SND_SOC_DPCM_TRIGGER_POST},
  5803. .codec_dai_name = "snd-soc-dummy-dai",
  5804. .codec_name = "snd-soc-dummy",
  5805. .ignore_suspend = 1,
  5806. .ignore_pmdown_time = 1,
  5807. /* this dainlink has playback support */
  5808. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5809. },
  5810. {/* hw:x,29 */
  5811. .name = MSM_DAILINK_NAME(Compress5),
  5812. .stream_name = "Compress5",
  5813. .cpu_dai_name = "MultiMedia12",
  5814. .platform_name = "msm-compress-dsp",
  5815. .dynamic = 1,
  5816. .dpcm_playback = 1,
  5817. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5818. SND_SOC_DPCM_TRIGGER_POST},
  5819. .codec_dai_name = "snd-soc-dummy-dai",
  5820. .codec_name = "snd-soc-dummy",
  5821. .ignore_suspend = 1,
  5822. .ignore_pmdown_time = 1,
  5823. /* this dainlink has playback support */
  5824. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5825. },
  5826. {/* hw:x,30 */
  5827. .name = MSM_DAILINK_NAME(Compress6),
  5828. .stream_name = "Compress6",
  5829. .cpu_dai_name = "MultiMedia13",
  5830. .platform_name = "msm-compress-dsp",
  5831. .dynamic = 1,
  5832. .dpcm_playback = 1,
  5833. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5834. SND_SOC_DPCM_TRIGGER_POST},
  5835. .codec_dai_name = "snd-soc-dummy-dai",
  5836. .codec_name = "snd-soc-dummy",
  5837. .ignore_suspend = 1,
  5838. .ignore_pmdown_time = 1,
  5839. /* this dainlink has playback support */
  5840. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5841. },
  5842. {/* hw:x,31 */
  5843. .name = MSM_DAILINK_NAME(Compress7),
  5844. .stream_name = "Compress7",
  5845. .cpu_dai_name = "MultiMedia14",
  5846. .platform_name = "msm-compress-dsp",
  5847. .dynamic = 1,
  5848. .dpcm_playback = 1,
  5849. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5850. SND_SOC_DPCM_TRIGGER_POST},
  5851. .codec_dai_name = "snd-soc-dummy-dai",
  5852. .codec_name = "snd-soc-dummy",
  5853. .ignore_suspend = 1,
  5854. .ignore_pmdown_time = 1,
  5855. /* this dainlink has playback support */
  5856. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5857. },
  5858. {/* hw:x,32 */
  5859. .name = MSM_DAILINK_NAME(Compress8),
  5860. .stream_name = "Compress8",
  5861. .cpu_dai_name = "MultiMedia15",
  5862. .platform_name = "msm-compress-dsp",
  5863. .dynamic = 1,
  5864. .dpcm_playback = 1,
  5865. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5866. SND_SOC_DPCM_TRIGGER_POST},
  5867. .codec_dai_name = "snd-soc-dummy-dai",
  5868. .codec_name = "snd-soc-dummy",
  5869. .ignore_suspend = 1,
  5870. .ignore_pmdown_time = 1,
  5871. /* this dainlink has playback support */
  5872. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5873. },
  5874. {/* hw:x,33 */
  5875. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5876. .stream_name = "MM_NOIRQ_2",
  5877. .cpu_dai_name = "MultiMedia16",
  5878. .platform_name = "msm-pcm-dsp-noirq",
  5879. .dynamic = 1,
  5880. .dpcm_playback = 1,
  5881. .dpcm_capture = 1,
  5882. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5883. SND_SOC_DPCM_TRIGGER_POST},
  5884. .codec_dai_name = "snd-soc-dummy-dai",
  5885. .codec_name = "snd-soc-dummy",
  5886. .ignore_suspend = 1,
  5887. .ignore_pmdown_time = 1,
  5888. /* this dainlink has playback support */
  5889. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5890. },
  5891. {/* hw:x,34 */
  5892. .name = "SLIMBUS_8 Hostless",
  5893. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5894. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5895. .platform_name = "msm-pcm-hostless",
  5896. .dynamic = 1,
  5897. .dpcm_capture = 1,
  5898. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5899. SND_SOC_DPCM_TRIGGER_POST},
  5900. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5901. .ignore_suspend = 1,
  5902. .codec_dai_name = "snd-soc-dummy-dai",
  5903. .codec_name = "snd-soc-dummy",
  5904. },
  5905. {/* hw:x,35 */
  5906. .name = "CDC_DMA Hostless",
  5907. .stream_name = "CDC_DMA Hostless",
  5908. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5909. .platform_name = "msm-pcm-hostless",
  5910. .dynamic = 1,
  5911. .dpcm_playback = 1,
  5912. .dpcm_capture = 1,
  5913. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5914. SND_SOC_DPCM_TRIGGER_POST},
  5915. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5916. .ignore_suspend = 1,
  5917. /* this dailink has playback support */
  5918. .ignore_pmdown_time = 1,
  5919. .codec_dai_name = "snd-soc-dummy-dai",
  5920. .codec_name = "snd-soc-dummy",
  5921. },
  5922. {/* hw:x,36 */
  5923. .name = "TX3_CDC_DMA Hostless",
  5924. .stream_name = "TX3_CDC_DMA Hostless",
  5925. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5926. .platform_name = "msm-pcm-hostless",
  5927. .dynamic = 1,
  5928. .dpcm_capture = 1,
  5929. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5930. SND_SOC_DPCM_TRIGGER_POST},
  5931. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5932. .ignore_suspend = 1,
  5933. .codec_dai_name = "snd-soc-dummy-dai",
  5934. .codec_name = "snd-soc-dummy",
  5935. },
  5936. };
  5937. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5938. {/* hw:x,37 */
  5939. .name = LPASS_BE_SLIMBUS_4_TX,
  5940. .stream_name = "Slimbus4 Capture",
  5941. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5942. .platform_name = "msm-pcm-hostless",
  5943. .codec_name = "tavil_codec",
  5944. .codec_dai_name = "tavil_vifeedback",
  5945. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5946. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5947. .ops = &msm_be_ops,
  5948. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5949. .ignore_suspend = 1,
  5950. },
  5951. /* Ultrasound RX DAI Link */
  5952. {/* hw:x,38 */
  5953. .name = "SLIMBUS_2 Hostless Playback",
  5954. .stream_name = "SLIMBUS_2 Hostless Playback",
  5955. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5956. .platform_name = "msm-pcm-hostless",
  5957. .codec_name = "tavil_codec",
  5958. .codec_dai_name = "tavil_rx2",
  5959. .ignore_suspend = 1,
  5960. .ignore_pmdown_time = 1,
  5961. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5962. .ops = &msm_slimbus_2_be_ops,
  5963. },
  5964. /* Ultrasound TX DAI Link */
  5965. {/* hw:x,39 */
  5966. .name = "SLIMBUS_2 Hostless Capture",
  5967. .stream_name = "SLIMBUS_2 Hostless Capture",
  5968. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5969. .platform_name = "msm-pcm-hostless",
  5970. .codec_name = "tavil_codec",
  5971. .codec_dai_name = "tavil_tx2",
  5972. .ignore_suspend = 1,
  5973. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5974. .ops = &msm_slimbus_2_be_ops,
  5975. },
  5976. };
  5977. static struct snd_soc_dai_link msm_int_compress_capture_dai[] = {
  5978. {
  5979. .name = "Compress9",
  5980. .stream_name = "Compress9",
  5981. .cpu_dai_name = "MultiMedia17",
  5982. .platform_name = "msm-compress-dsp",
  5983. .dynamic = 1,
  5984. .dpcm_capture = 1,
  5985. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5986. SND_SOC_DPCM_TRIGGER_POST},
  5987. .codec_dai_name = "snd-soc-dummy-dai",
  5988. .codec_name = "snd-soc-dummy",
  5989. .ignore_suspend = 1,
  5990. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  5991. },
  5992. {
  5993. .name = "Compress10",
  5994. .stream_name = "Compress10",
  5995. .cpu_dai_name = "MultiMedia18",
  5996. .platform_name = "msm-compress-dsp",
  5997. .dynamic = 1,
  5998. .dpcm_capture = 1,
  5999. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6000. SND_SOC_DPCM_TRIGGER_POST},
  6001. .codec_dai_name = "snd-soc-dummy-dai",
  6002. .codec_name = "snd-soc-dummy",
  6003. .ignore_suspend = 1,
  6004. .id = MSM_FRONTEND_DAI_MULTIMEDIA18,
  6005. },
  6006. {
  6007. .name = "Compress11",
  6008. .stream_name = "Compress11",
  6009. .cpu_dai_name = "MultiMedia19",
  6010. .platform_name = "msm-compress-dsp",
  6011. .dynamic = 1,
  6012. .dpcm_capture = 1,
  6013. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6014. SND_SOC_DPCM_TRIGGER_POST},
  6015. .codec_dai_name = "snd-soc-dummy-dai",
  6016. .codec_name = "snd-soc-dummy",
  6017. .ignore_suspend = 1,
  6018. .id = MSM_FRONTEND_DAI_MULTIMEDIA19,
  6019. },
  6020. {
  6021. .name = "Compress12",
  6022. .stream_name = "Compress12",
  6023. .cpu_dai_name = "MultiMedia28",
  6024. .platform_name = "msm-compress-dsp",
  6025. .dynamic = 1,
  6026. .dpcm_capture = 1,
  6027. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6028. SND_SOC_DPCM_TRIGGER_POST},
  6029. .codec_dai_name = "snd-soc-dummy-dai",
  6030. .codec_name = "snd-soc-dummy",
  6031. .ignore_suspend = 1,
  6032. .id = MSM_FRONTEND_DAI_MULTIMEDIA28,
  6033. },
  6034. {
  6035. .name = "Compress13",
  6036. .stream_name = "Compress13",
  6037. .cpu_dai_name = "MultiMedia29",
  6038. .platform_name = "msm-compress-dsp",
  6039. .dynamic = 1,
  6040. .dpcm_capture = 1,
  6041. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6042. SND_SOC_DPCM_TRIGGER_POST},
  6043. .codec_dai_name = "snd-soc-dummy-dai",
  6044. .codec_name = "snd-soc-dummy",
  6045. .ignore_suspend = 1,
  6046. .id = MSM_FRONTEND_DAI_MULTIMEDIA29,
  6047. },
  6048. };
  6049. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  6050. {/* hw:x,37 */
  6051. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  6052. .stream_name = "WSA CDC DMA0 Capture",
  6053. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  6054. .platform_name = "msm-pcm-hostless",
  6055. .codec_name = "bolero_codec",
  6056. .codec_dai_name = "wsa_macro_vifeedback",
  6057. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  6058. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6059. .ignore_suspend = 1,
  6060. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6061. .ops = &msm_cdc_dma_be_ops,
  6062. },
  6063. };
  6064. static struct snd_soc_dai_link msm_tasha_fe_dai_links[] = {
  6065. /* tasha_vifeedback for speaker protection */
  6066. {
  6067. .name = LPASS_BE_SLIMBUS_4_TX,
  6068. .stream_name = "Slimbus4 Capture",
  6069. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6070. .platform_name = "msm-pcm-hostless",
  6071. .codec_name = "tasha_codec",
  6072. .codec_dai_name = "tasha_vifeedback",
  6073. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6074. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6075. .ops = &msm_be_ops,
  6076. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6077. .ignore_suspend = 1,
  6078. },
  6079. /* Ultrasound RX DAI Link */
  6080. {
  6081. .name = "SLIMBUS_2 Hostless Playback",
  6082. .stream_name = "SLIMBUS_2 Hostless Playback",
  6083. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6084. .platform_name = "msm-pcm-hostless",
  6085. .codec_name = "tasha_codec",
  6086. .codec_dai_name = "tasha_rx2",
  6087. .ignore_suspend = 1,
  6088. .dpcm_playback = 1,
  6089. .dpcm_capture = 1,
  6090. .ignore_pmdown_time = 1,
  6091. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6092. .ops = &msm_slimbus_2_be_ops,
  6093. },
  6094. /* Ultrasound TX DAI Link */
  6095. {
  6096. .name = "SLIMBUS_2 Hostless Capture",
  6097. .stream_name = "SLIMBUS_2 Hostless Capture",
  6098. .cpu_dai_name = "msm-dai-q6-dev.16389",
  6099. .platform_name = "msm-pcm-hostless",
  6100. .codec_name = "tasha_codec",
  6101. .codec_dai_name = "tasha_tx2",
  6102. .ignore_suspend = 1,
  6103. .dpcm_capture = 1,
  6104. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6105. .ops = &msm_slimbus_2_be_ops,
  6106. },
  6107. /* CPE LSM direct dai-link */
  6108. {
  6109. .name = "CPE Listen service",
  6110. .stream_name = "CPE Listen Audio Service",
  6111. .cpu_dai_name = "msm-dai-slim",
  6112. .platform_name = "msm-cpe-lsm",
  6113. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6114. SND_SOC_DPCM_TRIGGER_POST},
  6115. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6116. .ignore_suspend = 1,
  6117. .dpcm_capture = 1,
  6118. .codec_dai_name = "tasha_mad1",
  6119. .codec_name = "tasha_codec",
  6120. .ops = &msm_ext_cpe_ops,
  6121. },
  6122. {
  6123. .name = "SLIMBUS_6 Hostless Playback",
  6124. .stream_name = "SLIMBUS_6 Hostless",
  6125. .cpu_dai_name = "SLIMBUS6_HOSTLESS",
  6126. .platform_name = "msm-pcm-hostless",
  6127. .dynamic = 1,
  6128. .dpcm_playback = 1,
  6129. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6130. SND_SOC_DPCM_TRIGGER_POST},
  6131. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6132. .ignore_suspend = 1,
  6133. /* this dailink has playback support */
  6134. .ignore_pmdown_time = 1,
  6135. .codec_dai_name = "snd-soc-dummy-dai",
  6136. .codec_name = "snd-soc-dummy",
  6137. },
  6138. /* CPE LSM EC PP direct dai-link */
  6139. {
  6140. .name = "CPE Listen service ECPP",
  6141. .stream_name = "CPE Listen Audio Service ECPP",
  6142. .cpu_dai_name = "CPE_LSM_NOHOST",
  6143. .platform_name = "msm-cpe-lsm.3",
  6144. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6145. SND_SOC_DPCM_TRIGGER_POST},
  6146. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6147. .ignore_suspend = 1,
  6148. .ignore_pmdown_time = 1,
  6149. .codec_dai_name = "tasha_cpe",
  6150. .codec_name = "tasha_codec",
  6151. },
  6152. };
  6153. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  6154. {
  6155. .name = MSM_DAILINK_NAME(ASM Loopback),
  6156. .stream_name = "MultiMedia6",
  6157. .cpu_dai_name = "MultiMedia6",
  6158. .platform_name = "msm-pcm-loopback",
  6159. .dynamic = 1,
  6160. .dpcm_playback = 1,
  6161. .dpcm_capture = 1,
  6162. .codec_dai_name = "snd-soc-dummy-dai",
  6163. .codec_name = "snd-soc-dummy",
  6164. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6165. SND_SOC_DPCM_TRIGGER_POST},
  6166. .ignore_suspend = 1,
  6167. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6168. .ignore_pmdown_time = 1,
  6169. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  6170. },
  6171. {
  6172. .name = "USB Audio Hostless",
  6173. .stream_name = "USB Audio Hostless",
  6174. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  6175. .platform_name = "msm-pcm-hostless",
  6176. .dynamic = 1,
  6177. .dpcm_playback = 1,
  6178. .dpcm_capture = 1,
  6179. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6180. SND_SOC_DPCM_TRIGGER_POST},
  6181. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  6182. .ignore_suspend = 1,
  6183. .ignore_pmdown_time = 1,
  6184. .codec_dai_name = "snd-soc-dummy-dai",
  6185. .codec_name = "snd-soc-dummy",
  6186. },
  6187. };
  6188. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  6189. /* Backend AFE DAI Links */
  6190. {
  6191. .name = LPASS_BE_AFE_PCM_RX,
  6192. .stream_name = "AFE Playback",
  6193. .cpu_dai_name = "msm-dai-q6-dev.224",
  6194. .platform_name = "msm-pcm-routing",
  6195. .codec_name = "msm-stub-codec.1",
  6196. .codec_dai_name = "msm-stub-rx",
  6197. .no_pcm = 1,
  6198. .dpcm_playback = 1,
  6199. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  6200. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6201. /* this dainlink has playback support */
  6202. .ignore_pmdown_time = 1,
  6203. .ignore_suspend = 1,
  6204. },
  6205. {
  6206. .name = LPASS_BE_AFE_PCM_TX,
  6207. .stream_name = "AFE Capture",
  6208. .cpu_dai_name = "msm-dai-q6-dev.225",
  6209. .platform_name = "msm-pcm-routing",
  6210. .codec_name = "msm-stub-codec.1",
  6211. .codec_dai_name = "msm-stub-tx",
  6212. .no_pcm = 1,
  6213. .dpcm_capture = 1,
  6214. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  6215. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6216. .ignore_suspend = 1,
  6217. },
  6218. /* Incall Record Uplink BACK END DAI Link */
  6219. {
  6220. .name = LPASS_BE_INCALL_RECORD_TX,
  6221. .stream_name = "Voice Uplink Capture",
  6222. .cpu_dai_name = "msm-dai-q6-dev.32772",
  6223. .platform_name = "msm-pcm-routing",
  6224. .codec_name = "msm-stub-codec.1",
  6225. .codec_dai_name = "msm-stub-tx",
  6226. .no_pcm = 1,
  6227. .dpcm_capture = 1,
  6228. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  6229. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6230. .ignore_suspend = 1,
  6231. },
  6232. /* Incall Record Downlink BACK END DAI Link */
  6233. {
  6234. .name = LPASS_BE_INCALL_RECORD_RX,
  6235. .stream_name = "Voice Downlink Capture",
  6236. .cpu_dai_name = "msm-dai-q6-dev.32771",
  6237. .platform_name = "msm-pcm-routing",
  6238. .codec_name = "msm-stub-codec.1",
  6239. .codec_dai_name = "msm-stub-tx",
  6240. .no_pcm = 1,
  6241. .dpcm_capture = 1,
  6242. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  6243. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6244. .ignore_suspend = 1,
  6245. },
  6246. /* Incall Music BACK END DAI Link */
  6247. {
  6248. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  6249. .stream_name = "Voice Farend Playback",
  6250. .cpu_dai_name = "msm-dai-q6-dev.32773",
  6251. .platform_name = "msm-pcm-routing",
  6252. .codec_name = "msm-stub-codec.1",
  6253. .codec_dai_name = "msm-stub-rx",
  6254. .no_pcm = 1,
  6255. .dpcm_playback = 1,
  6256. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  6257. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6258. .ignore_suspend = 1,
  6259. .ignore_pmdown_time = 1,
  6260. },
  6261. /* Incall Music 2 BACK END DAI Link */
  6262. {
  6263. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  6264. .stream_name = "Voice2 Farend Playback",
  6265. .cpu_dai_name = "msm-dai-q6-dev.32770",
  6266. .platform_name = "msm-pcm-routing",
  6267. .codec_name = "msm-stub-codec.1",
  6268. .codec_dai_name = "msm-stub-rx",
  6269. .no_pcm = 1,
  6270. .dpcm_playback = 1,
  6271. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  6272. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6273. .ignore_suspend = 1,
  6274. .ignore_pmdown_time = 1,
  6275. },
  6276. {
  6277. .name = LPASS_BE_USB_AUDIO_RX,
  6278. .stream_name = "USB Audio Playback",
  6279. .cpu_dai_name = "msm-dai-q6-dev.28672",
  6280. .platform_name = "msm-pcm-routing",
  6281. .codec_name = "msm-stub-codec.1",
  6282. .codec_dai_name = "msm-stub-rx",
  6283. .no_pcm = 1,
  6284. .dpcm_playback = 1,
  6285. .id = MSM_BACKEND_DAI_USB_RX,
  6286. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6287. .ignore_pmdown_time = 1,
  6288. .ignore_suspend = 1,
  6289. },
  6290. {
  6291. .name = LPASS_BE_USB_AUDIO_TX,
  6292. .stream_name = "USB Audio Capture",
  6293. .cpu_dai_name = "msm-dai-q6-dev.28673",
  6294. .platform_name = "msm-pcm-routing",
  6295. .codec_name = "msm-stub-codec.1",
  6296. .codec_dai_name = "msm-stub-tx",
  6297. .no_pcm = 1,
  6298. .dpcm_capture = 1,
  6299. .id = MSM_BACKEND_DAI_USB_TX,
  6300. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6301. .ignore_suspend = 1,
  6302. },
  6303. {
  6304. .name = LPASS_BE_PRI_TDM_RX_0,
  6305. .stream_name = "Primary TDM0 Playback",
  6306. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  6307. .platform_name = "msm-pcm-routing",
  6308. .codec_name = "msm-stub-codec.1",
  6309. .codec_dai_name = "msm-stub-rx",
  6310. .no_pcm = 1,
  6311. .dpcm_playback = 1,
  6312. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  6313. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6314. .ops = &sm6150_tdm_be_ops,
  6315. .ignore_suspend = 1,
  6316. .ignore_pmdown_time = 1,
  6317. },
  6318. {
  6319. .name = LPASS_BE_PRI_TDM_TX_0,
  6320. .stream_name = "Primary TDM0 Capture",
  6321. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6322. .platform_name = "msm-pcm-routing",
  6323. .codec_name = "msm-stub-codec.1",
  6324. .codec_dai_name = "msm-stub-tx",
  6325. .no_pcm = 1,
  6326. .dpcm_capture = 1,
  6327. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6328. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6329. .ops = &sm6150_tdm_be_ops,
  6330. .ignore_suspend = 1,
  6331. },
  6332. {
  6333. .name = LPASS_BE_SEC_TDM_RX_0,
  6334. .stream_name = "Secondary TDM0 Playback",
  6335. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6336. .platform_name = "msm-pcm-routing",
  6337. .codec_name = "msm-stub-codec.1",
  6338. .codec_dai_name = "msm-stub-rx",
  6339. .no_pcm = 1,
  6340. .dpcm_playback = 1,
  6341. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6342. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6343. .ops = &sm6150_tdm_be_ops,
  6344. .ignore_suspend = 1,
  6345. .ignore_pmdown_time = 1,
  6346. },
  6347. {
  6348. .name = LPASS_BE_SEC_TDM_TX_0,
  6349. .stream_name = "Secondary TDM0 Capture",
  6350. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6351. .platform_name = "msm-pcm-routing",
  6352. .codec_name = "msm-stub-codec.1",
  6353. .codec_dai_name = "msm-stub-tx",
  6354. .no_pcm = 1,
  6355. .dpcm_capture = 1,
  6356. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6357. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6358. .ops = &sm6150_tdm_be_ops,
  6359. .ignore_suspend = 1,
  6360. },
  6361. {
  6362. .name = LPASS_BE_TERT_TDM_RX_0,
  6363. .stream_name = "Tertiary TDM0 Playback",
  6364. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6365. .platform_name = "msm-pcm-routing",
  6366. .codec_name = "msm-stub-codec.1",
  6367. .codec_dai_name = "msm-stub-rx",
  6368. .no_pcm = 1,
  6369. .dpcm_playback = 1,
  6370. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6371. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6372. .ops = &sm6150_tdm_be_ops,
  6373. .ignore_suspend = 1,
  6374. .ignore_pmdown_time = 1,
  6375. },
  6376. {
  6377. .name = LPASS_BE_TERT_TDM_TX_0,
  6378. .stream_name = "Tertiary TDM0 Capture",
  6379. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6380. .platform_name = "msm-pcm-routing",
  6381. .codec_name = "msm-stub-codec.1",
  6382. .codec_dai_name = "msm-stub-tx",
  6383. .no_pcm = 1,
  6384. .dpcm_capture = 1,
  6385. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6386. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6387. .ops = &sm6150_tdm_be_ops,
  6388. .ignore_suspend = 1,
  6389. },
  6390. {
  6391. .name = LPASS_BE_QUAT_TDM_RX_0,
  6392. .stream_name = "Quaternary TDM0 Playback",
  6393. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6394. .platform_name = "msm-pcm-routing",
  6395. .codec_name = "msm-stub-codec.1",
  6396. .codec_dai_name = "msm-stub-rx",
  6397. .no_pcm = 1,
  6398. .dpcm_playback = 1,
  6399. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6400. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6401. .ops = &sm6150_tdm_be_ops,
  6402. .ignore_suspend = 1,
  6403. .ignore_pmdown_time = 1,
  6404. },
  6405. {
  6406. .name = LPASS_BE_QUAT_TDM_TX_0,
  6407. .stream_name = "Quaternary TDM0 Capture",
  6408. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6409. .platform_name = "msm-pcm-routing",
  6410. .codec_name = "msm-stub-codec.1",
  6411. .codec_dai_name = "msm-stub-tx",
  6412. .no_pcm = 1,
  6413. .dpcm_capture = 1,
  6414. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6415. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6416. .ops = &sm6150_tdm_be_ops,
  6417. .ignore_suspend = 1,
  6418. },
  6419. {
  6420. .name = LPASS_BE_QUIN_TDM_RX_0,
  6421. .stream_name = "Quinary TDM0 Playback",
  6422. .cpu_dai_name = "msm-dai-q6-tdm.36928",
  6423. .platform_name = "msm-pcm-routing",
  6424. .codec_name = "msm-stub-codec.1",
  6425. .codec_dai_name = "msm-stub-rx",
  6426. .no_pcm = 1,
  6427. .dpcm_playback = 1,
  6428. .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
  6429. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6430. .ops = &sm6150_tdm_be_ops,
  6431. .ignore_suspend = 1,
  6432. .ignore_pmdown_time = 1,
  6433. },
  6434. {
  6435. .name = LPASS_BE_QUIN_TDM_TX_0,
  6436. .stream_name = "Quinary TDM0 Capture",
  6437. .cpu_dai_name = "msm-dai-q6-tdm.36929",
  6438. .platform_name = "msm-pcm-routing",
  6439. .codec_name = "msm-stub-codec.1",
  6440. .codec_dai_name = "msm-stub-tx",
  6441. .no_pcm = 1,
  6442. .dpcm_capture = 1,
  6443. .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
  6444. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6445. .ops = &sm6150_tdm_be_ops,
  6446. .ignore_suspend = 1,
  6447. },
  6448. };
  6449. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6450. {
  6451. .name = LPASS_BE_SLIMBUS_0_RX,
  6452. .stream_name = "Slimbus Playback",
  6453. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6454. .platform_name = "msm-pcm-routing",
  6455. .codec_name = "tavil_codec",
  6456. .codec_dai_name = "tavil_rx1",
  6457. .no_pcm = 1,
  6458. .dpcm_playback = 1,
  6459. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6460. .init = &msm_audrx_tavil_init,
  6461. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6462. /* this dainlink has playback support */
  6463. .ignore_pmdown_time = 1,
  6464. .ignore_suspend = 1,
  6465. .ops = &msm_be_ops,
  6466. },
  6467. {
  6468. .name = LPASS_BE_SLIMBUS_0_TX,
  6469. .stream_name = "Slimbus Capture",
  6470. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6471. .platform_name = "msm-pcm-routing",
  6472. .codec_name = "tavil_codec",
  6473. .codec_dai_name = "tavil_tx1",
  6474. .no_pcm = 1,
  6475. .dpcm_capture = 1,
  6476. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6477. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6478. .ignore_suspend = 1,
  6479. .ops = &msm_be_ops,
  6480. },
  6481. {
  6482. .name = LPASS_BE_SLIMBUS_1_RX,
  6483. .stream_name = "Slimbus1 Playback",
  6484. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6485. .platform_name = "msm-pcm-routing",
  6486. .codec_name = "tavil_codec",
  6487. .codec_dai_name = "tavil_rx1",
  6488. .no_pcm = 1,
  6489. .dpcm_playback = 1,
  6490. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6491. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6492. .ops = &msm_be_ops,
  6493. /* dai link has playback support */
  6494. .ignore_pmdown_time = 1,
  6495. .ignore_suspend = 1,
  6496. },
  6497. {
  6498. .name = LPASS_BE_SLIMBUS_1_TX,
  6499. .stream_name = "Slimbus1 Capture",
  6500. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6501. .platform_name = "msm-pcm-routing",
  6502. .codec_name = "tavil_codec",
  6503. .codec_dai_name = "tavil_tx3",
  6504. .no_pcm = 1,
  6505. .dpcm_capture = 1,
  6506. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6507. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6508. .ops = &msm_be_ops,
  6509. .ignore_suspend = 1,
  6510. },
  6511. {
  6512. .name = LPASS_BE_SLIMBUS_2_RX,
  6513. .stream_name = "Slimbus2 Playback",
  6514. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6515. .platform_name = "msm-pcm-routing",
  6516. .codec_name = "tavil_codec",
  6517. .codec_dai_name = "tavil_rx2",
  6518. .no_pcm = 1,
  6519. .dpcm_playback = 1,
  6520. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6521. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6522. .ops = &msm_be_ops,
  6523. .ignore_pmdown_time = 1,
  6524. .ignore_suspend = 1,
  6525. },
  6526. {
  6527. .name = LPASS_BE_SLIMBUS_3_RX,
  6528. .stream_name = "Slimbus3 Playback",
  6529. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6530. .platform_name = "msm-pcm-routing",
  6531. .codec_name = "tavil_codec",
  6532. .codec_dai_name = "tavil_rx1",
  6533. .no_pcm = 1,
  6534. .dpcm_playback = 1,
  6535. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6536. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6537. .ops = &msm_be_ops,
  6538. /* dai link has playback support */
  6539. .ignore_pmdown_time = 1,
  6540. .ignore_suspend = 1,
  6541. },
  6542. {
  6543. .name = LPASS_BE_SLIMBUS_3_TX,
  6544. .stream_name = "Slimbus3 Capture",
  6545. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6546. .platform_name = "msm-pcm-routing",
  6547. .codec_name = "tavil_codec",
  6548. .codec_dai_name = "tavil_tx1",
  6549. .no_pcm = 1,
  6550. .dpcm_capture = 1,
  6551. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6552. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6553. .ops = &msm_be_ops,
  6554. .ignore_suspend = 1,
  6555. },
  6556. {
  6557. .name = LPASS_BE_SLIMBUS_4_RX,
  6558. .stream_name = "Slimbus4 Playback",
  6559. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6560. .platform_name = "msm-pcm-routing",
  6561. .codec_name = "tavil_codec",
  6562. .codec_dai_name = "tavil_rx1",
  6563. .no_pcm = 1,
  6564. .dpcm_playback = 1,
  6565. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6566. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6567. .ops = &msm_be_ops,
  6568. /* dai link has playback support */
  6569. .ignore_pmdown_time = 1,
  6570. .ignore_suspend = 1,
  6571. },
  6572. {
  6573. .name = LPASS_BE_SLIMBUS_5_RX,
  6574. .stream_name = "Slimbus5 Playback",
  6575. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6576. .platform_name = "msm-pcm-routing",
  6577. .codec_name = "tavil_codec",
  6578. .codec_dai_name = "tavil_rx3",
  6579. .no_pcm = 1,
  6580. .dpcm_playback = 1,
  6581. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6582. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6583. .ops = &msm_be_ops,
  6584. /* dai link has playback support */
  6585. .ignore_pmdown_time = 1,
  6586. .ignore_suspend = 1,
  6587. },
  6588. /* MAD BE */
  6589. {
  6590. .name = LPASS_BE_SLIMBUS_5_TX,
  6591. .stream_name = "Slimbus5 Capture",
  6592. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6593. .platform_name = "msm-pcm-routing",
  6594. .codec_name = "tavil_codec",
  6595. .codec_dai_name = "tavil_mad1",
  6596. .no_pcm = 1,
  6597. .dpcm_capture = 1,
  6598. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6599. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6600. .ops = &msm_be_ops,
  6601. .ignore_suspend = 1,
  6602. },
  6603. {
  6604. .name = LPASS_BE_SLIMBUS_6_RX,
  6605. .stream_name = "Slimbus6 Playback",
  6606. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6607. .platform_name = "msm-pcm-routing",
  6608. .codec_name = "tavil_codec",
  6609. .codec_dai_name = "tavil_rx4",
  6610. .no_pcm = 1,
  6611. .dpcm_playback = 1,
  6612. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6613. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6614. .ops = &msm_be_ops,
  6615. /* dai link has playback support */
  6616. .ignore_pmdown_time = 1,
  6617. .ignore_suspend = 1,
  6618. },
  6619. /* Slimbus VI Recording */
  6620. {
  6621. .name = LPASS_BE_SLIMBUS_TX_VI,
  6622. .stream_name = "Slimbus4 Capture",
  6623. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6624. .platform_name = "msm-pcm-routing",
  6625. .codec_name = "tavil_codec",
  6626. .codec_dai_name = "tavil_vifeedback",
  6627. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6628. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6629. .ops = &msm_be_ops,
  6630. .ignore_suspend = 1,
  6631. .no_pcm = 1,
  6632. .dpcm_capture = 1,
  6633. },
  6634. };
  6635. static struct snd_soc_dai_link msm_tasha_be_dai_links[] = {
  6636. /* Backend DAI Links */
  6637. {
  6638. .name = LPASS_BE_SLIMBUS_0_RX,
  6639. .stream_name = "Slimbus Playback",
  6640. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6641. .platform_name = "msm-pcm-routing",
  6642. .codec_name = "tasha_codec",
  6643. .codec_dai_name = "tasha_mix_rx1",
  6644. .no_pcm = 1,
  6645. .dpcm_playback = 1,
  6646. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6647. .init = &msm_audrx_tasha_init,
  6648. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6649. /* this dainlink has playback support */
  6650. .ignore_pmdown_time = 1,
  6651. .ignore_suspend = 1,
  6652. .ops = &msm_be_ops,
  6653. },
  6654. {
  6655. .name = LPASS_BE_SLIMBUS_0_TX,
  6656. .stream_name = "Slimbus Capture",
  6657. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6658. .platform_name = "msm-pcm-routing",
  6659. .codec_name = "tasha_codec",
  6660. .codec_dai_name = "tasha_tx1",
  6661. .no_pcm = 1,
  6662. .dpcm_capture = 1,
  6663. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6664. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6665. .ignore_suspend = 1,
  6666. .ops = &msm_be_ops,
  6667. },
  6668. {
  6669. .name = LPASS_BE_SLIMBUS_1_RX,
  6670. .stream_name = "Slimbus1 Playback",
  6671. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6672. .platform_name = "msm-pcm-routing",
  6673. .codec_name = "tasha_codec",
  6674. .codec_dai_name = "tasha_mix_rx1",
  6675. .no_pcm = 1,
  6676. .dpcm_playback = 1,
  6677. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6678. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6679. .ops = &msm_be_ops,
  6680. /* dai link has playback support */
  6681. .ignore_pmdown_time = 1,
  6682. .ignore_suspend = 1,
  6683. },
  6684. {
  6685. .name = LPASS_BE_SLIMBUS_1_TX,
  6686. .stream_name = "Slimbus1 Capture",
  6687. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6688. .platform_name = "msm-pcm-routing",
  6689. .codec_name = "tasha_codec",
  6690. .codec_dai_name = "tasha_tx3",
  6691. .no_pcm = 1,
  6692. .dpcm_capture = 1,
  6693. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6694. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6695. .ops = &msm_be_ops,
  6696. .ignore_suspend = 1,
  6697. },
  6698. {
  6699. .name = LPASS_BE_SLIMBUS_3_RX,
  6700. .stream_name = "Slimbus3 Playback",
  6701. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6702. .platform_name = "msm-pcm-routing",
  6703. .codec_name = "tasha_codec",
  6704. .codec_dai_name = "tasha_mix_rx1",
  6705. .no_pcm = 1,
  6706. .dpcm_playback = 1,
  6707. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6708. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6709. .ops = &msm_be_ops,
  6710. /* dai link has playback support */
  6711. .ignore_pmdown_time = 1,
  6712. .ignore_suspend = 1,
  6713. },
  6714. {
  6715. .name = LPASS_BE_SLIMBUS_3_TX,
  6716. .stream_name = "Slimbus3 Capture",
  6717. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6718. .platform_name = "msm-pcm-routing",
  6719. .codec_name = "tasha_codec",
  6720. .codec_dai_name = "tasha_tx1",
  6721. .no_pcm = 1,
  6722. .dpcm_capture = 1,
  6723. .dpcm_playback = 1,
  6724. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6725. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6726. .ops = &msm_be_ops,
  6727. .ignore_suspend = 1,
  6728. },
  6729. {
  6730. .name = LPASS_BE_SLIMBUS_4_RX,
  6731. .stream_name = "Slimbus4 Playback",
  6732. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6733. .platform_name = "msm-pcm-routing",
  6734. .codec_name = "tasha_codec",
  6735. .codec_dai_name = "tasha_mix_rx1",
  6736. .no_pcm = 1,
  6737. .dpcm_playback = 1,
  6738. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6739. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6740. .ops = &msm_be_ops,
  6741. /* dai link has playback support */
  6742. .ignore_pmdown_time = 1,
  6743. .ignore_suspend = 1,
  6744. },
  6745. {
  6746. .name = LPASS_BE_SLIMBUS_5_RX,
  6747. .stream_name = "Slimbus5 Playback",
  6748. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6749. .platform_name = "msm-pcm-routing",
  6750. .codec_name = "tasha_codec",
  6751. .codec_dai_name = "tasha_rx3",
  6752. .no_pcm = 1,
  6753. .dpcm_playback = 1,
  6754. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6755. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6756. .ops = &msm_be_ops,
  6757. /* dai link has playback support */
  6758. .ignore_pmdown_time = 1,
  6759. .ignore_suspend = 1,
  6760. },
  6761. /* MAD BE */
  6762. {
  6763. .name = LPASS_BE_SLIMBUS_5_TX,
  6764. .stream_name = "Slimbus5 Capture",
  6765. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6766. .platform_name = "msm-pcm-routing",
  6767. .codec_name = "tasha_codec",
  6768. .codec_dai_name = "tasha_mad1",
  6769. .no_pcm = 1,
  6770. .dpcm_capture = 1,
  6771. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6772. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6773. .ops = &msm_be_ops,
  6774. .ignore_suspend = 1,
  6775. },
  6776. {
  6777. .name = LPASS_BE_SLIMBUS_6_RX,
  6778. .stream_name = "Slimbus6 Playback",
  6779. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6780. .platform_name = "msm-pcm-routing",
  6781. .codec_name = "tasha_codec",
  6782. .codec_dai_name = "tasha_rx4",
  6783. .no_pcm = 1,
  6784. .dpcm_playback = 1,
  6785. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6786. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6787. .ops = &msm_be_ops,
  6788. /* dai link has playback support */
  6789. .ignore_pmdown_time = 1,
  6790. .ignore_suspend = 1,
  6791. },
  6792. };
  6793. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6794. {
  6795. .name = LPASS_BE_SLIMBUS_7_RX,
  6796. .stream_name = "Slimbus7 Playback",
  6797. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6798. .platform_name = "msm-pcm-routing",
  6799. .codec_name = "btfmslim_slave",
  6800. /* BT codec driver determines capabilities based on
  6801. * dai name, bt codecdai name should always contains
  6802. * supported usecase information
  6803. */
  6804. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6805. .no_pcm = 1,
  6806. .dpcm_playback = 1,
  6807. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6808. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6809. .ops = &msm_wcn_ops,
  6810. /* dai link has playback support */
  6811. .ignore_pmdown_time = 1,
  6812. .ignore_suspend = 1,
  6813. },
  6814. {
  6815. .name = LPASS_BE_SLIMBUS_7_TX,
  6816. .stream_name = "Slimbus7 Capture",
  6817. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6818. .platform_name = "msm-pcm-routing",
  6819. .codec_name = "btfmslim_slave",
  6820. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6821. .no_pcm = 1,
  6822. .dpcm_capture = 1,
  6823. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6824. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6825. .ops = &msm_wcn_ops,
  6826. .ignore_suspend = 1,
  6827. },
  6828. {
  6829. .name = LPASS_BE_SLIMBUS_8_TX,
  6830. .stream_name = "Slimbus8 Capture",
  6831. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6832. .platform_name = "msm-pcm-routing",
  6833. .codec_name = "btfmslim_slave",
  6834. .codec_dai_name = "btfm_fm_slim_tx",
  6835. .no_pcm = 1,
  6836. .dpcm_capture = 1,
  6837. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6838. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6839. .init = &msm_wcn_init,
  6840. .ops = &msm_wcn_ops,
  6841. .ignore_suspend = 1,
  6842. },
  6843. };
  6844. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6845. /* DISP PORT BACK END DAI Link */
  6846. {
  6847. .name = LPASS_BE_DISPLAY_PORT,
  6848. .stream_name = "Display Port Playback",
  6849. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6850. .platform_name = "msm-pcm-routing",
  6851. .codec_name = "msm-ext-disp-audio-codec-rx",
  6852. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6853. .no_pcm = 1,
  6854. .dpcm_playback = 1,
  6855. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6856. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6857. .ignore_pmdown_time = 1,
  6858. .ignore_suspend = 1,
  6859. },
  6860. };
  6861. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6862. {
  6863. .name = LPASS_BE_PRI_MI2S_RX,
  6864. .stream_name = "Primary MI2S Playback",
  6865. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6866. .platform_name = "msm-pcm-routing",
  6867. .codec_name = "msm-stub-codec.1",
  6868. .codec_dai_name = "msm-stub-rx",
  6869. .no_pcm = 1,
  6870. .dpcm_playback = 1,
  6871. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6872. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6873. .ops = &msm_mi2s_be_ops,
  6874. .ignore_suspend = 1,
  6875. .ignore_pmdown_time = 1,
  6876. },
  6877. {
  6878. .name = LPASS_BE_PRI_MI2S_TX,
  6879. .stream_name = "Primary MI2S Capture",
  6880. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6881. .platform_name = "msm-pcm-routing",
  6882. .codec_name = "msm-stub-codec.1",
  6883. .codec_dai_name = "msm-stub-tx",
  6884. .no_pcm = 1,
  6885. .dpcm_capture = 1,
  6886. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6887. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6888. .ops = &msm_mi2s_be_ops,
  6889. .ignore_suspend = 1,
  6890. },
  6891. {
  6892. .name = LPASS_BE_SEC_MI2S_RX,
  6893. .stream_name = "Secondary MI2S Playback",
  6894. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6895. .platform_name = "msm-pcm-routing",
  6896. .codec_name = "msm-stub-codec.1",
  6897. .codec_dai_name = "msm-stub-rx",
  6898. .no_pcm = 1,
  6899. .dpcm_playback = 1,
  6900. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6901. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6902. .ops = &msm_mi2s_be_ops,
  6903. .ignore_suspend = 1,
  6904. .ignore_pmdown_time = 1,
  6905. },
  6906. {
  6907. .name = LPASS_BE_SEC_MI2S_TX,
  6908. .stream_name = "Secondary MI2S Capture",
  6909. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6910. .platform_name = "msm-pcm-routing",
  6911. .codec_name = "msm-stub-codec.1",
  6912. .codec_dai_name = "msm-stub-tx",
  6913. .no_pcm = 1,
  6914. .dpcm_capture = 1,
  6915. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6916. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6917. .ops = &msm_mi2s_be_ops,
  6918. .ignore_suspend = 1,
  6919. },
  6920. {
  6921. .name = LPASS_BE_TERT_MI2S_RX,
  6922. .stream_name = "Tertiary MI2S Playback",
  6923. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6924. .platform_name = "msm-pcm-routing",
  6925. .codec_name = "msm-stub-codec.1",
  6926. .codec_dai_name = "msm-stub-rx",
  6927. .no_pcm = 1,
  6928. .dpcm_playback = 1,
  6929. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6930. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6931. .ops = &msm_mi2s_be_ops,
  6932. .ignore_suspend = 1,
  6933. .ignore_pmdown_time = 1,
  6934. },
  6935. {
  6936. .name = LPASS_BE_TERT_MI2S_TX,
  6937. .stream_name = "Tertiary MI2S Capture",
  6938. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6939. .platform_name = "msm-pcm-routing",
  6940. .codec_name = "msm-stub-codec.1",
  6941. .codec_dai_name = "msm-stub-tx",
  6942. .no_pcm = 1,
  6943. .dpcm_capture = 1,
  6944. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6945. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6946. .ops = &msm_mi2s_be_ops,
  6947. .ignore_suspend = 1,
  6948. },
  6949. {
  6950. .name = LPASS_BE_QUAT_MI2S_RX,
  6951. .stream_name = "Quaternary MI2S Playback",
  6952. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6953. .platform_name = "msm-pcm-routing",
  6954. .codec_name = "msm-stub-codec.1",
  6955. .codec_dai_name = "msm-stub-rx",
  6956. .no_pcm = 1,
  6957. .dpcm_playback = 1,
  6958. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6959. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6960. .ops = &msm_mi2s_be_ops,
  6961. .ignore_suspend = 1,
  6962. .ignore_pmdown_time = 1,
  6963. },
  6964. {
  6965. .name = LPASS_BE_QUAT_MI2S_TX,
  6966. .stream_name = "Quaternary MI2S Capture",
  6967. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6968. .platform_name = "msm-pcm-routing",
  6969. .codec_name = "msm-stub-codec.1",
  6970. .codec_dai_name = "msm-stub-tx",
  6971. .no_pcm = 1,
  6972. .dpcm_capture = 1,
  6973. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6974. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6975. .ops = &msm_mi2s_be_ops,
  6976. .ignore_suspend = 1,
  6977. },
  6978. {
  6979. .name = LPASS_BE_QUIN_MI2S_RX,
  6980. .stream_name = "Quinary MI2S Playback",
  6981. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6982. .platform_name = "msm-pcm-routing",
  6983. .codec_name = "msm-stub-codec.1",
  6984. .codec_dai_name = "msm-stub-rx",
  6985. .no_pcm = 1,
  6986. .dpcm_playback = 1,
  6987. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6988. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6989. .ops = &msm_mi2s_be_ops,
  6990. .ignore_suspend = 1,
  6991. .ignore_pmdown_time = 1,
  6992. },
  6993. {
  6994. .name = LPASS_BE_QUIN_MI2S_TX,
  6995. .stream_name = "Quinary MI2S Capture",
  6996. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6997. .platform_name = "msm-pcm-routing",
  6998. .codec_name = "msm-stub-codec.1",
  6999. .codec_dai_name = "msm-stub-tx",
  7000. .no_pcm = 1,
  7001. .dpcm_capture = 1,
  7002. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  7003. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7004. .ops = &msm_mi2s_be_ops,
  7005. .ignore_suspend = 1,
  7006. },
  7007. };
  7008. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  7009. /* Primary AUX PCM Backend DAI Links */
  7010. {
  7011. .name = LPASS_BE_AUXPCM_RX,
  7012. .stream_name = "AUX PCM Playback",
  7013. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  7014. .platform_name = "msm-pcm-routing",
  7015. .codec_name = "msm-stub-codec.1",
  7016. .codec_dai_name = "msm-stub-rx",
  7017. .no_pcm = 1,
  7018. .dpcm_playback = 1,
  7019. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  7020. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7021. .ignore_pmdown_time = 1,
  7022. .ignore_suspend = 1,
  7023. },
  7024. {
  7025. .name = LPASS_BE_AUXPCM_TX,
  7026. .stream_name = "AUX PCM Capture",
  7027. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  7028. .platform_name = "msm-pcm-routing",
  7029. .codec_name = "msm-stub-codec.1",
  7030. .codec_dai_name = "msm-stub-tx",
  7031. .no_pcm = 1,
  7032. .dpcm_capture = 1,
  7033. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  7034. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7035. .ignore_suspend = 1,
  7036. },
  7037. /* Secondary AUX PCM Backend DAI Links */
  7038. {
  7039. .name = LPASS_BE_SEC_AUXPCM_RX,
  7040. .stream_name = "Sec AUX PCM Playback",
  7041. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  7042. .platform_name = "msm-pcm-routing",
  7043. .codec_name = "msm-stub-codec.1",
  7044. .codec_dai_name = "msm-stub-rx",
  7045. .no_pcm = 1,
  7046. .dpcm_playback = 1,
  7047. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  7048. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7049. .ignore_pmdown_time = 1,
  7050. .ignore_suspend = 1,
  7051. },
  7052. {
  7053. .name = LPASS_BE_SEC_AUXPCM_TX,
  7054. .stream_name = "Sec AUX PCM Capture",
  7055. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  7056. .platform_name = "msm-pcm-routing",
  7057. .codec_name = "msm-stub-codec.1",
  7058. .codec_dai_name = "msm-stub-tx",
  7059. .no_pcm = 1,
  7060. .dpcm_capture = 1,
  7061. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  7062. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7063. .ignore_suspend = 1,
  7064. },
  7065. /* Tertiary AUX PCM Backend DAI Links */
  7066. {
  7067. .name = LPASS_BE_TERT_AUXPCM_RX,
  7068. .stream_name = "Tert AUX PCM Playback",
  7069. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  7070. .platform_name = "msm-pcm-routing",
  7071. .codec_name = "msm-stub-codec.1",
  7072. .codec_dai_name = "msm-stub-rx",
  7073. .no_pcm = 1,
  7074. .dpcm_playback = 1,
  7075. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  7076. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7077. .ignore_suspend = 1,
  7078. },
  7079. {
  7080. .name = LPASS_BE_TERT_AUXPCM_TX,
  7081. .stream_name = "Tert AUX PCM Capture",
  7082. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  7083. .platform_name = "msm-pcm-routing",
  7084. .codec_name = "msm-stub-codec.1",
  7085. .codec_dai_name = "msm-stub-tx",
  7086. .no_pcm = 1,
  7087. .dpcm_capture = 1,
  7088. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  7089. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7090. .ignore_suspend = 1,
  7091. },
  7092. /* Quaternary AUX PCM Backend DAI Links */
  7093. {
  7094. .name = LPASS_BE_QUAT_AUXPCM_RX,
  7095. .stream_name = "Quat AUX PCM Playback",
  7096. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  7097. .platform_name = "msm-pcm-routing",
  7098. .codec_name = "msm-stub-codec.1",
  7099. .codec_dai_name = "msm-stub-rx",
  7100. .no_pcm = 1,
  7101. .dpcm_playback = 1,
  7102. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  7103. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7104. .ignore_pmdown_time = 1,
  7105. .ignore_suspend = 1,
  7106. },
  7107. {
  7108. .name = LPASS_BE_QUAT_AUXPCM_TX,
  7109. .stream_name = "Quat AUX PCM Capture",
  7110. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  7111. .platform_name = "msm-pcm-routing",
  7112. .codec_name = "msm-stub-codec.1",
  7113. .codec_dai_name = "msm-stub-tx",
  7114. .no_pcm = 1,
  7115. .dpcm_capture = 1,
  7116. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  7117. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7118. .ignore_suspend = 1,
  7119. },
  7120. /* Quinary AUX PCM Backend DAI Links */
  7121. {
  7122. .name = LPASS_BE_QUIN_AUXPCM_RX,
  7123. .stream_name = "Quin AUX PCM Playback",
  7124. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  7125. .platform_name = "msm-pcm-routing",
  7126. .codec_name = "msm-stub-codec.1",
  7127. .codec_dai_name = "msm-stub-rx",
  7128. .no_pcm = 1,
  7129. .dpcm_playback = 1,
  7130. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  7131. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7132. .ignore_pmdown_time = 1,
  7133. .ignore_suspend = 1,
  7134. },
  7135. {
  7136. .name = LPASS_BE_QUIN_AUXPCM_TX,
  7137. .stream_name = "Quin AUX PCM Capture",
  7138. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  7139. .platform_name = "msm-pcm-routing",
  7140. .codec_name = "msm-stub-codec.1",
  7141. .codec_dai_name = "msm-stub-tx",
  7142. .no_pcm = 1,
  7143. .dpcm_capture = 1,
  7144. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  7145. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7146. .ignore_suspend = 1,
  7147. },
  7148. };
  7149. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  7150. /* WSA CDC DMA Backend DAI Links */
  7151. {
  7152. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  7153. .stream_name = "WSA CDC DMA0 Playback",
  7154. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  7155. .platform_name = "msm-pcm-routing",
  7156. .codec_name = "bolero_codec",
  7157. .codec_dai_name = "wsa_macro_rx1",
  7158. .no_pcm = 1,
  7159. .dpcm_playback = 1,
  7160. .init = &msm_int_audrx_init,
  7161. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  7162. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7163. .ignore_pmdown_time = 1,
  7164. .ignore_suspend = 1,
  7165. .ops = &msm_cdc_dma_be_ops,
  7166. },
  7167. {
  7168. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  7169. .stream_name = "WSA CDC DMA1 Playback",
  7170. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  7171. .platform_name = "msm-pcm-routing",
  7172. .codec_name = "bolero_codec",
  7173. .codec_dai_name = "wsa_macro_rx_mix",
  7174. .no_pcm = 1,
  7175. .dpcm_playback = 1,
  7176. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  7177. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7178. .ignore_pmdown_time = 1,
  7179. .ignore_suspend = 1,
  7180. .ops = &msm_cdc_dma_be_ops,
  7181. },
  7182. {
  7183. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  7184. .stream_name = "WSA CDC DMA1 Capture",
  7185. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  7186. .platform_name = "msm-pcm-routing",
  7187. .codec_name = "bolero_codec",
  7188. .codec_dai_name = "wsa_macro_echo",
  7189. .no_pcm = 1,
  7190. .dpcm_capture = 1,
  7191. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  7192. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7193. .ignore_suspend = 1,
  7194. .ops = &msm_cdc_dma_be_ops,
  7195. },
  7196. };
  7197. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  7198. /* RX CDC DMA Backend DAI Links */
  7199. {
  7200. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  7201. .stream_name = "RX CDC DMA0 Playback",
  7202. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  7203. .platform_name = "msm-pcm-routing",
  7204. .codec_name = "bolero_codec",
  7205. .codec_dai_name = "rx_macro_rx1",
  7206. .no_pcm = 1,
  7207. .dpcm_playback = 1,
  7208. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  7209. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7210. .ignore_pmdown_time = 1,
  7211. .ignore_suspend = 1,
  7212. .ops = &msm_cdc_dma_be_ops,
  7213. },
  7214. {
  7215. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  7216. .stream_name = "RX CDC DMA1 Playback",
  7217. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  7218. .platform_name = "msm-pcm-routing",
  7219. .codec_name = "bolero_codec",
  7220. .codec_dai_name = "rx_macro_rx2",
  7221. .no_pcm = 1,
  7222. .dpcm_playback = 1,
  7223. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  7224. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7225. .ignore_pmdown_time = 1,
  7226. .ignore_suspend = 1,
  7227. .ops = &msm_cdc_dma_be_ops,
  7228. },
  7229. {
  7230. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  7231. .stream_name = "RX CDC DMA2 Playback",
  7232. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  7233. .platform_name = "msm-pcm-routing",
  7234. .codec_name = "bolero_codec",
  7235. .codec_dai_name = "rx_macro_rx3",
  7236. .no_pcm = 1,
  7237. .dpcm_playback = 1,
  7238. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  7239. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7240. .ignore_pmdown_time = 1,
  7241. .ignore_suspend = 1,
  7242. .ops = &msm_cdc_dma_be_ops,
  7243. },
  7244. {
  7245. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  7246. .stream_name = "RX CDC DMA3 Playback",
  7247. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  7248. .platform_name = "msm-pcm-routing",
  7249. .codec_name = "bolero_codec",
  7250. .codec_dai_name = "rx_macro_rx4",
  7251. .no_pcm = 1,
  7252. .dpcm_playback = 1,
  7253. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  7254. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7255. .ignore_pmdown_time = 1,
  7256. .ignore_suspend = 1,
  7257. .ops = &msm_cdc_dma_be_ops,
  7258. },
  7259. /* TX CDC DMA Backend DAI Links */
  7260. {
  7261. .name = LPASS_BE_TX_CDC_DMA_TX_0,
  7262. .stream_name = "TX CDC DMA0 Capture",
  7263. .cpu_dai_name = "msm-dai-cdc-dma-dev.45105",
  7264. .platform_name = "msm-pcm-routing",
  7265. .codec_name = "bolero_codec",
  7266. .codec_dai_name = "rx_macro_echo",
  7267. .no_pcm = 1,
  7268. .dpcm_capture = 1,
  7269. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
  7270. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7271. .ignore_suspend = 1,
  7272. .ops = &msm_cdc_dma_be_ops,
  7273. },
  7274. {
  7275. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  7276. .stream_name = "TX CDC DMA3 Capture",
  7277. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  7278. .platform_name = "msm-pcm-routing",
  7279. .codec_name = "bolero_codec",
  7280. .codec_dai_name = "tx_macro_tx1",
  7281. .no_pcm = 1,
  7282. .dpcm_capture = 1,
  7283. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  7284. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7285. .ignore_suspend = 1,
  7286. .ops = &msm_cdc_dma_be_ops,
  7287. },
  7288. {
  7289. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  7290. .stream_name = "TX CDC DMA4 Capture",
  7291. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  7292. .platform_name = "msm-pcm-routing",
  7293. .codec_name = "bolero_codec",
  7294. .codec_dai_name = "tx_macro_tx2",
  7295. .no_pcm = 1,
  7296. .dpcm_capture = 1,
  7297. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  7298. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7299. .ignore_suspend = 1,
  7300. .ops = &msm_cdc_dma_be_ops,
  7301. },
  7302. };
  7303. static struct snd_soc_dai_link msm_sm6150_dai_links[
  7304. ARRAY_SIZE(msm_common_dai_links) +
  7305. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  7306. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  7307. ARRAY_SIZE(msm_tasha_fe_dai_links) +
  7308. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  7309. ARRAY_SIZE(msm_int_compress_capture_dai) +
  7310. ARRAY_SIZE(msm_common_be_dai_links) +
  7311. ARRAY_SIZE(msm_tavil_be_dai_links) +
  7312. ARRAY_SIZE(msm_tasha_be_dai_links) +
  7313. ARRAY_SIZE(msm_wcn_be_dai_links) +
  7314. ARRAY_SIZE(ext_disp_be_dai_link) +
  7315. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  7316. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  7317. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  7318. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  7319. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  7320. {
  7321. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7322. struct snd_soc_pcm_runtime *rtd;
  7323. struct snd_soc_component *component;
  7324. int ret = 0;
  7325. void *mbhc_calibration;
  7326. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7327. if (!rtd) {
  7328. dev_err(card->dev,
  7329. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7330. __func__, be_dl_name);
  7331. ret = -EINVAL;
  7332. goto err_pcm_runtime;
  7333. }
  7334. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  7335. if (!component) {
  7336. pr_err("%s: component is NULL\n", __func__);
  7337. ret = -EINVAL;
  7338. goto err_pcm_runtime;
  7339. }
  7340. mbhc_calibration = def_wcd_mbhc_cal();
  7341. if (!mbhc_calibration) {
  7342. ret = -ENOMEM;
  7343. goto err_mbhc_cal;
  7344. }
  7345. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7346. ret = tavil_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7347. if (ret) {
  7348. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  7349. __func__, ret);
  7350. goto err_hs_detect;
  7351. }
  7352. return 0;
  7353. err_hs_detect:
  7354. kfree(mbhc_calibration);
  7355. err_mbhc_cal:
  7356. err_pcm_runtime:
  7357. return ret;
  7358. }
  7359. static int msm_snd_card_tasha_late_probe(struct snd_soc_card *card)
  7360. {
  7361. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7362. struct snd_soc_pcm_runtime *rtd;
  7363. struct snd_soc_component *component;
  7364. int ret = 0;
  7365. void *mbhc_calibration;
  7366. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7367. if (!rtd) {
  7368. dev_err(card->dev,
  7369. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7370. __func__, be_dl_name);
  7371. ret = -EINVAL;
  7372. goto err_pcm_runtime;
  7373. }
  7374. component = snd_soc_rtdcom_lookup(rtd, "tasha_codec");
  7375. if (!component) {
  7376. pr_err("%s: component is NULL\n", __func__);
  7377. ret = -EINVAL;
  7378. goto err_pcm_runtime;
  7379. }
  7380. mbhc_calibration = def_wcd_mbhc_cal();
  7381. if (!mbhc_calibration) {
  7382. ret = -ENOMEM;
  7383. goto err_mbhc_cal;
  7384. }
  7385. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7386. ret = tasha_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7387. if (ret) {
  7388. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  7389. __func__, ret);
  7390. goto err_hs_detect;
  7391. }
  7392. return 0;
  7393. err_hs_detect:
  7394. kfree(mbhc_calibration);
  7395. err_mbhc_cal:
  7396. err_pcm_runtime:
  7397. return ret;
  7398. }
  7399. static int msm_populate_dai_link_component_of_node(
  7400. struct snd_soc_card *card)
  7401. {
  7402. int i, index, ret = 0;
  7403. struct device *cdev = card->dev;
  7404. struct snd_soc_dai_link *dai_link = card->dai_link;
  7405. struct device_node *np;
  7406. if (!cdev) {
  7407. pr_err("%s: Sound card device memory NULL\n", __func__);
  7408. return -ENODEV;
  7409. }
  7410. for (i = 0; i < card->num_links; i++) {
  7411. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  7412. continue;
  7413. /* populate platform_of_node for snd card dai links */
  7414. if (dai_link[i].platform_name &&
  7415. !dai_link[i].platform_of_node) {
  7416. index = of_property_match_string(cdev->of_node,
  7417. "asoc-platform-names",
  7418. dai_link[i].platform_name);
  7419. if (index < 0) {
  7420. pr_err("%s: No match found for platform name: %s\n",
  7421. __func__, dai_link[i].platform_name);
  7422. ret = index;
  7423. goto err;
  7424. }
  7425. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  7426. index);
  7427. if (!np) {
  7428. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  7429. __func__, dai_link[i].platform_name,
  7430. index);
  7431. ret = -ENODEV;
  7432. goto err;
  7433. }
  7434. dai_link[i].platform_of_node = np;
  7435. dai_link[i].platform_name = NULL;
  7436. }
  7437. /* populate cpu_of_node for snd card dai links */
  7438. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  7439. index = of_property_match_string(cdev->of_node,
  7440. "asoc-cpu-names",
  7441. dai_link[i].cpu_dai_name);
  7442. if (index >= 0) {
  7443. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  7444. index);
  7445. if (!np) {
  7446. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  7447. __func__,
  7448. dai_link[i].cpu_dai_name);
  7449. ret = -ENODEV;
  7450. goto err;
  7451. }
  7452. dai_link[i].cpu_of_node = np;
  7453. dai_link[i].cpu_dai_name = NULL;
  7454. }
  7455. }
  7456. /* populate codec_of_node for snd card dai links */
  7457. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  7458. index = of_property_match_string(cdev->of_node,
  7459. "asoc-codec-names",
  7460. dai_link[i].codec_name);
  7461. if (index < 0)
  7462. continue;
  7463. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  7464. index);
  7465. if (!np) {
  7466. pr_err("%s: retrieving phandle for codec %s failed\n",
  7467. __func__, dai_link[i].codec_name);
  7468. ret = -ENODEV;
  7469. goto err;
  7470. }
  7471. dai_link[i].codec_of_node = np;
  7472. dai_link[i].codec_name = NULL;
  7473. }
  7474. }
  7475. err:
  7476. return ret;
  7477. }
  7478. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  7479. {
  7480. int ret = 0;
  7481. struct snd_soc_component *component =
  7482. snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  7483. ret = snd_soc_add_component_controls(component, msm_ext_snd_controls,
  7484. ARRAY_SIZE(msm_ext_snd_controls));
  7485. if (ret < 0) {
  7486. dev_err(component->dev,
  7487. "%s: add_codec_controls failed, err = %d\n",
  7488. __func__, ret);
  7489. return ret;
  7490. }
  7491. return 0;
  7492. }
  7493. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  7494. struct snd_pcm_hw_params *params)
  7495. {
  7496. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  7497. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  7498. int ret = 0;
  7499. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  7500. 151};
  7501. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  7502. 134, 135, 136, 137, 138, 139,
  7503. 140, 141, 142, 143};
  7504. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  7505. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  7506. slim_rx_cfg[SLIM_RX_0].channels,
  7507. rx_ch);
  7508. if (ret < 0)
  7509. pr_err("%s: RX failed to set cpu chan map error %d\n",
  7510. __func__, ret);
  7511. } else {
  7512. ret = snd_soc_dai_set_channel_map(cpu_dai,
  7513. slim_tx_cfg[SLIM_TX_0].channels,
  7514. tx_ch, 0, 0);
  7515. if (ret < 0)
  7516. pr_err("%s: TX failed to set cpu chan map error %d\n",
  7517. __func__, ret);
  7518. }
  7519. return ret;
  7520. }
  7521. static struct snd_soc_ops msm_stub_be_ops = {
  7522. .hw_params = msm_snd_stub_hw_params,
  7523. };
  7524. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  7525. /* FrontEnd DAI Links */
  7526. {
  7527. .name = "MSMSTUB Media1",
  7528. .stream_name = "MultiMedia1",
  7529. .cpu_dai_name = "MultiMedia1",
  7530. .platform_name = "msm-pcm-dsp.0",
  7531. .dynamic = 1,
  7532. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  7533. .dpcm_playback = 1,
  7534. .dpcm_capture = 1,
  7535. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  7536. SND_SOC_DPCM_TRIGGER_POST},
  7537. .codec_dai_name = "snd-soc-dummy-dai",
  7538. .codec_name = "snd-soc-dummy",
  7539. .ignore_suspend = 1,
  7540. /* this dainlink has playback support */
  7541. .ignore_pmdown_time = 1,
  7542. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  7543. },
  7544. };
  7545. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  7546. /* Backend DAI Links */
  7547. {
  7548. .name = LPASS_BE_SLIMBUS_0_RX,
  7549. .stream_name = "Slimbus Playback",
  7550. .cpu_dai_name = "msm-dai-q6-dev.16384",
  7551. .platform_name = "msm-pcm-routing",
  7552. .codec_name = "msm-stub-codec.1",
  7553. .codec_dai_name = "msm-stub-rx",
  7554. .no_pcm = 1,
  7555. .dpcm_playback = 1,
  7556. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  7557. .init = &msm_audrx_stub_init,
  7558. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7559. .ignore_pmdown_time = 1, /* dai link has playback support */
  7560. .ignore_suspend = 1,
  7561. .ops = &msm_stub_be_ops,
  7562. },
  7563. {
  7564. .name = LPASS_BE_SLIMBUS_0_TX,
  7565. .stream_name = "Slimbus Capture",
  7566. .cpu_dai_name = "msm-dai-q6-dev.16385",
  7567. .platform_name = "msm-pcm-routing",
  7568. .codec_name = "msm-stub-codec.1",
  7569. .codec_dai_name = "msm-stub-tx",
  7570. .no_pcm = 1,
  7571. .dpcm_capture = 1,
  7572. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7573. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7574. .ignore_suspend = 1,
  7575. .ops = &msm_stub_be_ops,
  7576. },
  7577. };
  7578. static struct snd_soc_dai_link msm_stub_dai_links[
  7579. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7580. ARRAY_SIZE(msm_stub_be_dai_links)];
  7581. struct snd_soc_card snd_soc_card_stub_msm = {
  7582. .name = "sm6150-stub-snd-card",
  7583. };
  7584. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7585. { .compatible = "qcom,sm6150-asoc-snd",
  7586. .data = "codec"},
  7587. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7588. .data = "stub_codec"},
  7589. {},
  7590. };
  7591. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7592. {
  7593. struct snd_soc_card *card = NULL;
  7594. struct snd_soc_dai_link *dailink;
  7595. int total_links = 0, rc = 0;
  7596. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7597. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7598. u32 wcn_btfm_intf = 0;
  7599. const struct of_device_id *match;
  7600. u32 tasha_codec = 0;
  7601. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7602. if (!match) {
  7603. dev_err(dev, "%s: No DT match found for sound card\n",
  7604. __func__);
  7605. return NULL;
  7606. }
  7607. if (!strcmp(match->data, "codec")) {
  7608. card = &snd_soc_card_sm6150_msm;
  7609. memcpy(msm_sm6150_dai_links + total_links,
  7610. msm_common_dai_links,
  7611. sizeof(msm_common_dai_links));
  7612. total_links += ARRAY_SIZE(msm_common_dai_links);
  7613. memcpy(msm_sm6150_dai_links + total_links,
  7614. msm_common_misc_fe_dai_links,
  7615. sizeof(msm_common_misc_fe_dai_links));
  7616. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7617. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7618. &tavil_codec);
  7619. if (rc)
  7620. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7621. __func__);
  7622. rc = of_property_read_u32(dev->of_node, "qcom,tasha_codec",
  7623. &tasha_codec);
  7624. if (rc)
  7625. dev_dbg(dev, "%s: No DT match for tasha codec\n",
  7626. __func__);
  7627. if (tavil_codec) {
  7628. card->late_probe =
  7629. msm_snd_card_tavil_late_probe;
  7630. memcpy(msm_sm6150_dai_links + total_links,
  7631. msm_tavil_fe_dai_links,
  7632. sizeof(msm_tavil_fe_dai_links));
  7633. total_links +=
  7634. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7635. } else if (tasha_codec) {
  7636. card->late_probe =
  7637. msm_snd_card_tasha_late_probe;
  7638. memcpy(msm_sm6150_dai_links + total_links,
  7639. msm_tasha_fe_dai_links,
  7640. sizeof(msm_tasha_fe_dai_links));
  7641. total_links +=
  7642. ARRAY_SIZE(msm_tasha_fe_dai_links);
  7643. } else {
  7644. memcpy(msm_sm6150_dai_links + total_links,
  7645. msm_bolero_fe_dai_links,
  7646. sizeof(msm_bolero_fe_dai_links));
  7647. total_links +=
  7648. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7649. }
  7650. memcpy(msm_sm6150_dai_links + total_links,
  7651. msm_int_compress_capture_dai,
  7652. sizeof(msm_int_compress_capture_dai));
  7653. total_links += ARRAY_SIZE(msm_int_compress_capture_dai);
  7654. memcpy(msm_sm6150_dai_links + total_links,
  7655. msm_common_be_dai_links,
  7656. sizeof(msm_common_be_dai_links));
  7657. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7658. if (tavil_codec) {
  7659. memcpy(msm_sm6150_dai_links + total_links,
  7660. msm_tavil_be_dai_links,
  7661. sizeof(msm_tavil_be_dai_links));
  7662. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7663. } else if (tasha_codec) {
  7664. memcpy(msm_sm6150_dai_links + total_links,
  7665. msm_tasha_be_dai_links,
  7666. sizeof(msm_tasha_be_dai_links));
  7667. total_links += ARRAY_SIZE(msm_tasha_be_dai_links);
  7668. } else {
  7669. memcpy(msm_sm6150_dai_links + total_links,
  7670. msm_wsa_cdc_dma_be_dai_links,
  7671. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7672. total_links +=
  7673. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7674. memcpy(msm_sm6150_dai_links + total_links,
  7675. msm_rx_tx_cdc_dma_be_dai_links,
  7676. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7677. total_links +=
  7678. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7679. }
  7680. rc = of_property_read_u32(dev->of_node,
  7681. "qcom,ext-disp-audio-rx",
  7682. &ext_disp_audio_intf);
  7683. if (rc) {
  7684. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7685. __func__);
  7686. } else {
  7687. if (ext_disp_audio_intf) {
  7688. memcpy(msm_sm6150_dai_links + total_links,
  7689. ext_disp_be_dai_link,
  7690. sizeof(ext_disp_be_dai_link));
  7691. total_links +=
  7692. ARRAY_SIZE(ext_disp_be_dai_link);
  7693. }
  7694. }
  7695. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7696. &mi2s_audio_intf);
  7697. if (rc) {
  7698. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7699. __func__);
  7700. } else {
  7701. if (mi2s_audio_intf) {
  7702. memcpy(msm_sm6150_dai_links + total_links,
  7703. msm_mi2s_be_dai_links,
  7704. sizeof(msm_mi2s_be_dai_links));
  7705. total_links +=
  7706. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7707. }
  7708. }
  7709. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7710. &wcn_btfm_intf);
  7711. if (rc) {
  7712. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7713. __func__);
  7714. } else {
  7715. if (wcn_btfm_intf) {
  7716. memcpy(msm_sm6150_dai_links + total_links,
  7717. msm_wcn_be_dai_links,
  7718. sizeof(msm_wcn_be_dai_links));
  7719. total_links +=
  7720. ARRAY_SIZE(msm_wcn_be_dai_links);
  7721. }
  7722. }
  7723. rc = of_property_read_u32(dev->of_node,
  7724. "qcom,auxpcm-audio-intf",
  7725. &auxpcm_audio_intf);
  7726. if (rc) {
  7727. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7728. __func__);
  7729. } else {
  7730. if (auxpcm_audio_intf) {
  7731. memcpy(msm_sm6150_dai_links + total_links,
  7732. msm_auxpcm_be_dai_links,
  7733. sizeof(msm_auxpcm_be_dai_links));
  7734. total_links +=
  7735. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7736. }
  7737. }
  7738. dailink = msm_sm6150_dai_links;
  7739. } else if (!strcmp(match->data, "stub_codec")) {
  7740. card = &snd_soc_card_stub_msm;
  7741. memcpy(msm_stub_dai_links + total_links,
  7742. msm_stub_fe_dai_links,
  7743. sizeof(msm_stub_fe_dai_links));
  7744. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7745. memcpy(msm_stub_dai_links + total_links,
  7746. msm_stub_be_dai_links,
  7747. sizeof(msm_stub_be_dai_links));
  7748. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7749. dailink = msm_stub_dai_links;
  7750. }
  7751. if (card) {
  7752. card->dai_link = dailink;
  7753. card->num_links = total_links;
  7754. }
  7755. return card;
  7756. }
  7757. static int msm_wsa881x_init(struct snd_soc_component *component)
  7758. {
  7759. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7760. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7761. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7762. SPKR_L_BOOST, SPKR_L_VI};
  7763. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7764. SPKR_R_BOOST, SPKR_R_VI};
  7765. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7766. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7767. struct msm_asoc_mach_data *pdata;
  7768. struct snd_soc_dapm_context *dapm;
  7769. struct snd_card *card = component->card->snd_card;
  7770. struct snd_info_entry *entry;
  7771. int ret = 0;
  7772. if (!component) {
  7773. pr_err("%s codec is NULL\n", __func__);
  7774. return -EINVAL;
  7775. }
  7776. dapm = snd_soc_component_get_dapm(component);
  7777. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7778. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  7779. __func__, component->name);
  7780. wsa881x_set_channel_map(component, &spkleft_ports[0],
  7781. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7782. &ch_rate[0], &spkleft_port_types[0]);
  7783. if (dapm->component) {
  7784. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7785. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7786. }
  7787. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7788. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  7789. __func__, component->name);
  7790. wsa881x_set_channel_map(component, &spkright_ports[0],
  7791. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7792. &ch_rate[0], &spkright_port_types[0]);
  7793. if (dapm->component) {
  7794. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7795. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7796. }
  7797. } else {
  7798. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  7799. component->name);
  7800. ret = -EINVAL;
  7801. goto err;
  7802. }
  7803. pdata = snd_soc_card_get_drvdata(component->card);
  7804. if (!pdata->codec_root) {
  7805. entry = snd_info_create_subdir(card->module, "codecs",
  7806. card->proc_root);
  7807. if (!entry) {
  7808. pr_err("%s: Cannot create codecs module entry\n",
  7809. __func__);
  7810. ret = 0;
  7811. goto err;
  7812. }
  7813. pdata->codec_root = entry;
  7814. }
  7815. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7816. component);
  7817. err:
  7818. return ret;
  7819. }
  7820. static int msm_aux_codec_init(struct snd_soc_component *component)
  7821. {
  7822. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  7823. int ret = 0;
  7824. void *mbhc_calibration;
  7825. struct snd_info_entry *entry;
  7826. struct snd_card *card = component->card->snd_card;
  7827. struct msm_asoc_mach_data *pdata;
  7828. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7829. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7830. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7831. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7832. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7833. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7834. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7835. snd_soc_dapm_sync(dapm);
  7836. pdata = snd_soc_card_get_drvdata(component->card);
  7837. if (!pdata->codec_root) {
  7838. entry = snd_info_create_subdir(card->module, "codecs",
  7839. card->proc_root);
  7840. if (!entry) {
  7841. pr_err("%s: Cannot create codecs module entry\n",
  7842. __func__);
  7843. ret = 0;
  7844. goto codec_root_err;
  7845. }
  7846. pdata->codec_root = entry;
  7847. }
  7848. wcd937x_info_create_codec_entry(pdata->codec_root, component);
  7849. codec_root_err:
  7850. mbhc_calibration = def_wcd_mbhc_cal();
  7851. if (!mbhc_calibration) {
  7852. return -ENOMEM;
  7853. }
  7854. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7855. ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  7856. return ret;
  7857. }
  7858. static int msm_init_aux_dev(struct platform_device *pdev,
  7859. struct snd_soc_card *card)
  7860. {
  7861. struct device_node *wsa_of_node;
  7862. struct device_node *aux_codec_of_node;
  7863. u32 wsa_max_devs;
  7864. u32 wsa_dev_cnt;
  7865. u32 codec_max_aux_devs = 0;
  7866. u32 codec_aux_dev_cnt = 0;
  7867. int i;
  7868. struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
  7869. struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
  7870. const char *auxdev_name_prefix[1];
  7871. char *dev_name_str = NULL;
  7872. int found = 0;
  7873. int codecs_found = 0;
  7874. int ret = 0;
  7875. /* Get maximum WSA device count for this platform */
  7876. ret = of_property_read_u32(pdev->dev.of_node,
  7877. "qcom,wsa-max-devs", &wsa_max_devs);
  7878. if (ret) {
  7879. dev_err(&pdev->dev,
  7880. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7881. __func__, pdev->dev.of_node->full_name, ret);
  7882. wsa_max_devs = 0;
  7883. goto codec_aux_dev;
  7884. }
  7885. if (wsa_max_devs == 0) {
  7886. dev_dbg(&pdev->dev,
  7887. "%s: Max WSA devices is 0 for this target?\n",
  7888. __func__);
  7889. goto codec_aux_dev;
  7890. }
  7891. /* Get count of WSA device phandles for this platform */
  7892. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7893. "qcom,wsa-devs", NULL);
  7894. if (wsa_dev_cnt == -ENOENT) {
  7895. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7896. __func__);
  7897. goto err;
  7898. } else if (wsa_dev_cnt <= 0) {
  7899. dev_err(&pdev->dev,
  7900. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7901. __func__, wsa_dev_cnt);
  7902. ret = -EINVAL;
  7903. goto err;
  7904. }
  7905. /*
  7906. * Expect total phandles count to be NOT less than maximum possible
  7907. * WSA count. However, if it is less, then assign same value to
  7908. * max count as well.
  7909. */
  7910. if (wsa_dev_cnt < wsa_max_devs) {
  7911. dev_dbg(&pdev->dev,
  7912. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7913. __func__, wsa_max_devs, wsa_dev_cnt);
  7914. wsa_max_devs = wsa_dev_cnt;
  7915. }
  7916. /* Make sure prefix string passed for each WSA device */
  7917. ret = of_property_count_strings(pdev->dev.of_node,
  7918. "qcom,wsa-aux-dev-prefix");
  7919. if (ret != wsa_dev_cnt) {
  7920. dev_err(&pdev->dev,
  7921. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7922. __func__, wsa_dev_cnt, ret);
  7923. ret = -EINVAL;
  7924. goto err;
  7925. }
  7926. /*
  7927. * Alloc mem to store phandle and index info of WSA device, if already
  7928. * registered with ALSA core
  7929. */
  7930. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7931. sizeof(struct msm_wsa881x_dev_info),
  7932. GFP_KERNEL);
  7933. if (!wsa881x_dev_info) {
  7934. ret = -ENOMEM;
  7935. goto err;
  7936. }
  7937. /*
  7938. * search and check whether all WSA devices are already
  7939. * registered with ALSA core or not. If found a node, store
  7940. * the node and the index in a local array of struct for later
  7941. * use.
  7942. */
  7943. for (i = 0; i < wsa_dev_cnt; i++) {
  7944. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7945. "qcom,wsa-devs", i);
  7946. if (unlikely(!wsa_of_node)) {
  7947. /* we should not be here */
  7948. dev_err(&pdev->dev,
  7949. "%s: wsa dev node is not present\n",
  7950. __func__);
  7951. ret = -EINVAL;
  7952. goto err;
  7953. }
  7954. if (soc_find_component_locked(wsa_of_node, NULL)) {
  7955. /* WSA device registered with ALSA core */
  7956. wsa881x_dev_info[found].of_node = wsa_of_node;
  7957. wsa881x_dev_info[found].index = i;
  7958. found++;
  7959. if (found == wsa_max_devs)
  7960. break;
  7961. }
  7962. }
  7963. if (found < wsa_max_devs) {
  7964. dev_dbg(&pdev->dev,
  7965. "%s: failed to find %d components. Found only %d\n",
  7966. __func__, wsa_max_devs, found);
  7967. return -EPROBE_DEFER;
  7968. }
  7969. dev_info(&pdev->dev,
  7970. "%s: found %d wsa881x devices registered with ALSA core\n",
  7971. __func__, found);
  7972. codec_aux_dev:
  7973. if (!strnstr(card->name, "tavil", strlen(card->name)) &&
  7974. !strnstr(card->name, "tasha", strlen(card->name))) {
  7975. /* Get maximum aux codec device count for this platform */
  7976. ret = of_property_read_u32(pdev->dev.of_node,
  7977. "qcom,codec-max-aux-devs",
  7978. &codec_max_aux_devs);
  7979. if (ret) {
  7980. dev_err(&pdev->dev,
  7981. "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
  7982. __func__, pdev->dev.of_node->full_name, ret);
  7983. codec_max_aux_devs = 0;
  7984. goto aux_dev_register;
  7985. }
  7986. if (codec_max_aux_devs == 0) {
  7987. dev_dbg(&pdev->dev,
  7988. "%s: Max aux codec devices is 0 for this target?\n",
  7989. __func__);
  7990. goto aux_dev_register;
  7991. }
  7992. /* Get count of aux codec device phandles for this platform */
  7993. codec_aux_dev_cnt = of_count_phandle_with_args(
  7994. pdev->dev.of_node,
  7995. "qcom,codec-aux-devs", NULL);
  7996. if (codec_aux_dev_cnt == -ENOENT) {
  7997. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7998. __func__);
  7999. goto err;
  8000. } else if (codec_aux_dev_cnt <= 0) {
  8001. dev_err(&pdev->dev,
  8002. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  8003. __func__, codec_aux_dev_cnt);
  8004. ret = -EINVAL;
  8005. goto err;
  8006. }
  8007. /*
  8008. * Expect total phandles count to be NOT less than maximum possible
  8009. * AUX device count. However, if it is less, then assign same value to
  8010. * max count as well.
  8011. */
  8012. if (codec_aux_dev_cnt < codec_max_aux_devs) {
  8013. dev_dbg(&pdev->dev,
  8014. "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
  8015. __func__, codec_max_aux_devs,
  8016. codec_aux_dev_cnt);
  8017. codec_max_aux_devs = codec_aux_dev_cnt;
  8018. }
  8019. /*
  8020. * Alloc mem to store phandle and index info of aux codec
  8021. * if already registered with ALSA core
  8022. */
  8023. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_max_aux_devs,
  8024. sizeof(struct aux_codec_dev_info),
  8025. GFP_KERNEL);
  8026. if (!aux_cdc_dev_info) {
  8027. ret = -ENOMEM;
  8028. goto err;
  8029. }
  8030. /*
  8031. * search and check whether all aux codecs are already
  8032. * registered with ALSA core or not. If found a node, store
  8033. * the node and the index in a local array of struct for later
  8034. * use.
  8035. */
  8036. for (i = 0; i < codec_aux_dev_cnt; i++) {
  8037. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  8038. "qcom,codec-aux-devs", i);
  8039. if (unlikely(!aux_codec_of_node)) {
  8040. /* we should not be here */
  8041. dev_err(&pdev->dev,
  8042. "%s: aux codec dev node is not present\n",
  8043. __func__);
  8044. ret = -EINVAL;
  8045. goto err;
  8046. }
  8047. if (soc_find_component_locked(aux_codec_of_node, NULL)) {
  8048. /* AUX codec registered with ALSA core */
  8049. aux_cdc_dev_info[codecs_found].of_node =
  8050. aux_codec_of_node;
  8051. aux_cdc_dev_info[codecs_found].index = i;
  8052. codecs_found++;
  8053. }
  8054. }
  8055. if (codecs_found < codec_max_aux_devs) {
  8056. dev_dbg(&pdev->dev,
  8057. "%s: failed to find %d components. Found only %d\n",
  8058. __func__, codec_max_aux_devs, codecs_found);
  8059. return -EPROBE_DEFER;
  8060. }
  8061. dev_info(&pdev->dev,
  8062. "%s: found %d AUX codecs registered with ALSA core\n",
  8063. __func__, codecs_found);
  8064. }
  8065. aux_dev_register:
  8066. card->num_aux_devs = wsa_max_devs + codec_max_aux_devs;
  8067. card->num_configs = wsa_max_devs + codec_max_aux_devs;
  8068. /* Alloc array of AUX devs struct */
  8069. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  8070. sizeof(struct snd_soc_aux_dev),
  8071. GFP_KERNEL);
  8072. if (!msm_aux_dev) {
  8073. ret = -ENOMEM;
  8074. goto err;
  8075. }
  8076. /* Alloc array of codec conf struct */
  8077. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  8078. sizeof(struct snd_soc_codec_conf),
  8079. GFP_KERNEL);
  8080. if (!msm_codec_conf) {
  8081. ret = -ENOMEM;
  8082. goto err;
  8083. }
  8084. for (i = 0; i < wsa_max_devs; i++) {
  8085. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  8086. GFP_KERNEL);
  8087. if (!dev_name_str) {
  8088. ret = -ENOMEM;
  8089. goto err;
  8090. }
  8091. ret = of_property_read_string_index(pdev->dev.of_node,
  8092. "qcom,wsa-aux-dev-prefix",
  8093. wsa881x_dev_info[i].index,
  8094. auxdev_name_prefix);
  8095. if (ret) {
  8096. dev_err(&pdev->dev,
  8097. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  8098. __func__, ret);
  8099. ret = -EINVAL;
  8100. goto err;
  8101. }
  8102. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  8103. msm_aux_dev[i].name = dev_name_str;
  8104. msm_aux_dev[i].codec_name = NULL;
  8105. msm_aux_dev[i].codec_of_node =
  8106. wsa881x_dev_info[i].of_node;
  8107. msm_aux_dev[i].init = msm_wsa881x_init;
  8108. msm_codec_conf[i].dev_name = NULL;
  8109. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  8110. msm_codec_conf[i].of_node =
  8111. wsa881x_dev_info[i].of_node;
  8112. }
  8113. for (i = 0; i < codec_aux_dev_cnt; i++) {
  8114. msm_aux_dev[wsa_max_devs + i].name = "aux_codec";
  8115. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  8116. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  8117. aux_cdc_dev_info[i].of_node;
  8118. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  8119. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  8120. msm_codec_conf[wsa_max_devs + i].name_prefix =
  8121. NULL;
  8122. msm_codec_conf[wsa_max_devs + i].of_node =
  8123. aux_cdc_dev_info[i].of_node;
  8124. }
  8125. card->codec_conf = msm_codec_conf;
  8126. card->aux_dev = msm_aux_dev;
  8127. err:
  8128. return ret;
  8129. }
  8130. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  8131. {
  8132. int count;
  8133. u32 mi2s_master_slave[MI2S_MAX];
  8134. u32 mi2s_ext_mclk[MI2S_MAX];
  8135. int ret;
  8136. for (count = 0; count < MI2S_MAX; count++) {
  8137. mutex_init(&mi2s_intf_conf[count].lock);
  8138. mi2s_intf_conf[count].ref_cnt = 0;
  8139. }
  8140. ret = of_property_read_u32_array(pdev->dev.of_node,
  8141. "qcom,msm-mi2s-master",
  8142. mi2s_master_slave, MI2S_MAX);
  8143. if (ret) {
  8144. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  8145. __func__);
  8146. } else {
  8147. for (count = 0; count < MI2S_MAX; count++) {
  8148. mi2s_intf_conf[count].msm_is_mi2s_master =
  8149. mi2s_master_slave[count];
  8150. }
  8151. }
  8152. ret = of_property_read_u32_array(pdev->dev.of_node,
  8153. "qcom,msm-mi2s-ext-mclk",
  8154. mi2s_ext_mclk, MI2S_MAX);
  8155. if (ret) {
  8156. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-ext-mclk in DT node\n",
  8157. __func__);
  8158. } else {
  8159. for (count = 0; count < MI2S_MAX; count++)
  8160. mi2s_intf_conf[count].msm_is_ext_mclk =
  8161. mi2s_ext_mclk[count];
  8162. }
  8163. }
  8164. static void msm_i2s_auxpcm_deinit(void)
  8165. {
  8166. int count;
  8167. for (count = 0; count < MI2S_MAX; count++) {
  8168. mutex_destroy(&mi2s_intf_conf[count].lock);
  8169. mi2s_intf_conf[count].ref_cnt = 0;
  8170. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  8171. mi2s_intf_conf[count].msm_is_ext_mclk = 0;
  8172. }
  8173. }
  8174. static int sm6150_ssr_enable(struct device *dev, void *data)
  8175. {
  8176. struct platform_device *pdev = to_platform_device(dev);
  8177. struct snd_soc_card *card = platform_get_drvdata(pdev);
  8178. struct msm_asoc_mach_data *pdata = NULL;
  8179. struct snd_soc_component *component = NULL;
  8180. int ret = 0;
  8181. if (!card) {
  8182. dev_err(dev, "%s: card is NULL\n", __func__);
  8183. ret = -EINVAL;
  8184. goto err;
  8185. }
  8186. if (strnstr(card->name, "tavil", strlen(card->name)) ||
  8187. strnstr(card->name, "tasha", strlen(card->name))) {
  8188. pdata = snd_soc_card_get_drvdata(card);
  8189. if (!pdata->is_afe_config_done) {
  8190. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  8191. struct snd_soc_pcm_runtime *rtd;
  8192. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  8193. if (!rtd) {
  8194. dev_err(dev,
  8195. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  8196. __func__, be_dl_name);
  8197. ret = -EINVAL;
  8198. goto err;
  8199. }
  8200. component = snd_soc_rtdcom_lookup(rtd, "tavil_codec");
  8201. if (!component) {
  8202. dev_err(dev, "%s: component is NULL\n",
  8203. __func__);
  8204. ret = -EINVAL;
  8205. goto err;
  8206. }
  8207. ret = msm_afe_set_config(component);
  8208. if (ret)
  8209. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  8210. __func__, ret);
  8211. else
  8212. pdata->is_afe_config_done = true;
  8213. }
  8214. }
  8215. snd_soc_card_change_online_state(card, 1);
  8216. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  8217. err:
  8218. return ret;
  8219. }
  8220. static void sm6150_ssr_disable(struct device *dev, void *data)
  8221. {
  8222. struct platform_device *pdev = to_platform_device(dev);
  8223. struct snd_soc_card *card = platform_get_drvdata(pdev);
  8224. struct msm_asoc_mach_data *pdata;
  8225. if (!card) {
  8226. dev_err(dev, "%s: card is NULL\n", __func__);
  8227. return;
  8228. }
  8229. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  8230. snd_soc_card_change_online_state(card, 0);
  8231. if (strnstr(card->name, "tavil", strlen(card->name)) ||
  8232. strnstr(card->name, "tasha", strlen(card->name))) {
  8233. pdata = snd_soc_card_get_drvdata(card);
  8234. msm_afe_clear_config();
  8235. pdata->is_afe_config_done = false;
  8236. }
  8237. }
  8238. static int msm_ext_prepare_hifi(struct msm_asoc_mach_data *pdata)
  8239. {
  8240. int ret = 0;
  8241. if (gpio_is_valid(pdata->hph_en1_gpio)) {
  8242. pr_debug("%s: hph_en1_gpio request %d\n", __func__,
  8243. pdata->hph_en1_gpio);
  8244. ret = gpio_request(pdata->hph_en1_gpio, "hph_en1_gpio");
  8245. if (ret) {
  8246. pr_err("%s: hph_en1_gpio request failed, ret:%d\n",
  8247. __func__, ret);
  8248. goto err;
  8249. }
  8250. }
  8251. if (gpio_is_valid(pdata->hph_en0_gpio)) {
  8252. pr_debug("%s: hph_en0_gpio request %d\n", __func__,
  8253. pdata->hph_en0_gpio);
  8254. ret = gpio_request(pdata->hph_en0_gpio, "hph_en0_gpio");
  8255. if (ret)
  8256. pr_err("%s: hph_en0_gpio request failed, ret:%d\n",
  8257. __func__, ret);
  8258. }
  8259. err:
  8260. return ret;
  8261. }
  8262. static const struct snd_event_ops sm6150_ssr_ops = {
  8263. .enable = sm6150_ssr_enable,
  8264. .disable = sm6150_ssr_disable,
  8265. };
  8266. static int msm_audio_ssr_compare(struct device *dev, void *data)
  8267. {
  8268. struct device_node *node = data;
  8269. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  8270. __func__, dev->of_node, node);
  8271. return (dev->of_node && dev->of_node == node);
  8272. }
  8273. static int msm_audio_ssr_register(struct device *dev)
  8274. {
  8275. struct device_node *np = dev->of_node;
  8276. struct snd_event_clients *ssr_clients = NULL;
  8277. struct device_node *node;
  8278. int ret;
  8279. int i;
  8280. for (i = 0; ; i++) {
  8281. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  8282. if (!node)
  8283. break;
  8284. snd_event_mstr_add_client(&ssr_clients,
  8285. msm_audio_ssr_compare, node);
  8286. }
  8287. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  8288. ssr_clients, NULL);
  8289. if (!ret)
  8290. snd_event_notify(dev, SND_EVENT_UP);
  8291. return ret;
  8292. }
  8293. static int msm_asoc_machine_probe(struct platform_device *pdev)
  8294. {
  8295. struct snd_soc_card *card;
  8296. struct msm_asoc_mach_data *pdata;
  8297. const char *mbhc_audio_jack_type = NULL;
  8298. int ret;
  8299. if (!pdev->dev.of_node) {
  8300. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  8301. return -EINVAL;
  8302. }
  8303. pdata = devm_kzalloc(&pdev->dev,
  8304. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  8305. if (!pdata)
  8306. return -ENOMEM;
  8307. card = populate_snd_card_dailinks(&pdev->dev);
  8308. if (!card) {
  8309. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  8310. ret = -EINVAL;
  8311. goto err;
  8312. }
  8313. card->dev = &pdev->dev;
  8314. platform_set_drvdata(pdev, card);
  8315. snd_soc_card_set_drvdata(card, pdata);
  8316. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  8317. if (ret) {
  8318. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  8319. ret);
  8320. goto err;
  8321. }
  8322. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  8323. if (ret) {
  8324. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  8325. ret);
  8326. goto err;
  8327. }
  8328. ret = msm_populate_dai_link_component_of_node(card);
  8329. if (ret) {
  8330. ret = -EPROBE_DEFER;
  8331. goto err;
  8332. }
  8333. ret = msm_init_aux_dev(pdev, card);
  8334. if (ret)
  8335. goto err;
  8336. ret = devm_snd_soc_register_card(&pdev->dev, card);
  8337. if (ret == -EPROBE_DEFER) {
  8338. if (codec_reg_done)
  8339. ret = -EINVAL;
  8340. goto err;
  8341. } else if (ret) {
  8342. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  8343. ret);
  8344. goto err;
  8345. }
  8346. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  8347. pdata->hph_en1_gpio = of_get_named_gpio(pdev->dev.of_node,
  8348. "qcom,hph-en1-gpio", 0);
  8349. if (!gpio_is_valid(pdata->hph_en1_gpio))
  8350. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8351. "qcom,hph-en1-gpio", 0);
  8352. if (!gpio_is_valid(pdata->hph_en1_gpio) && (!pdata->hph_en1_gpio_p)) {
  8353. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  8354. "qcom,hph-en1-gpio", pdev->dev.of_node->full_name);
  8355. }
  8356. pdata->hph_en0_gpio = of_get_named_gpio(pdev->dev.of_node,
  8357. "qcom,hph-en0-gpio", 0);
  8358. if (!gpio_is_valid(pdata->hph_en0_gpio))
  8359. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8360. "qcom,hph-en0-gpio", 0);
  8361. if (!gpio_is_valid(pdata->hph_en0_gpio) && (!pdata->hph_en0_gpio_p)) {
  8362. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  8363. "qcom,hph-en0-gpio", pdev->dev.of_node->full_name);
  8364. }
  8365. ret = msm_ext_prepare_hifi(pdata);
  8366. if (ret) {
  8367. dev_dbg(&pdev->dev, "msm_ext_prepare_hifi failed (%d)\n",
  8368. ret);
  8369. ret = 0;
  8370. }
  8371. ret = of_property_read_string(pdev->dev.of_node,
  8372. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  8373. if (ret) {
  8374. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  8375. "qcom,mbhc-audio-jack-type",
  8376. pdev->dev.of_node->full_name);
  8377. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  8378. ret = 0;
  8379. } else {
  8380. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  8381. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  8382. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  8383. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  8384. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  8385. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  8386. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  8387. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  8388. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  8389. } else {
  8390. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  8391. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  8392. }
  8393. }
  8394. pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8395. "qcom,pri-mi2s-gpios", 0);
  8396. pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8397. "qcom,sec-mi2s-gpios", 0);
  8398. pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8399. "qcom,tert-mi2s-gpios", 0);
  8400. pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8401. "qcom,quat-mi2s-gpios", 0);
  8402. pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
  8403. "qcom,quin-mi2s-gpios", 0);
  8404. /*
  8405. * Parse US-Euro gpio info from DT. Report no error if us-euro
  8406. * entry is not found in DT file as some targets do not support
  8407. * US-Euro detection
  8408. */
  8409. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8410. "qcom,us-euro-gpios", 0);
  8411. if (!pdata->us_euro_gpio_p) {
  8412. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  8413. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  8414. } else {
  8415. dev_dbg(&pdev->dev, "%s detected\n",
  8416. "qcom,us-euro-gpios");
  8417. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  8418. }
  8419. if (wcd_mbhc_cfg.enable_usbc_analog) {
  8420. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  8421. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  8422. "fsa4480-i2c-handle", 0);
  8423. if (!pdata->fsa_handle)
  8424. dev_err(&pdev->dev,
  8425. "property %s not detected in node %s\n",
  8426. "fsa4480-i2c-handle",
  8427. pdev->dev.of_node->full_name);
  8428. }
  8429. msm_i2s_auxpcm_init(pdev);
  8430. if (!strnstr(card->name, "tavil", strlen(card->name)) &&
  8431. !strnstr(card->name, "tasha", strlen(card->name))) {
  8432. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8433. "qcom,cdc-dmic01-gpios",
  8434. 0);
  8435. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  8436. "qcom,cdc-dmic23-gpios",
  8437. 0);
  8438. }
  8439. ret = msm_audio_ssr_register(&pdev->dev);
  8440. if (ret)
  8441. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  8442. __func__, ret);
  8443. err:
  8444. return ret;
  8445. }
  8446. static int msm_asoc_machine_remove(struct platform_device *pdev)
  8447. {
  8448. snd_event_master_deregister(&pdev->dev);
  8449. msm_i2s_auxpcm_deinit();
  8450. return 0;
  8451. }
  8452. static struct platform_driver sm6150_asoc_machine_driver = {
  8453. .driver = {
  8454. .name = DRV_NAME,
  8455. .owner = THIS_MODULE,
  8456. .pm = &snd_soc_pm_ops,
  8457. .of_match_table = sm6150_asoc_machine_of_match,
  8458. },
  8459. .probe = msm_asoc_machine_probe,
  8460. .remove = msm_asoc_machine_remove,
  8461. };
  8462. module_platform_driver(sm6150_asoc_machine_driver);
  8463. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  8464. MODULE_LICENSE("GPL v2");
  8465. MODULE_ALIAS("platform:" DRV_NAME);
  8466. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);