kona.c 180 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/delay.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/module.h>
  13. #include <linux/input.h>
  14. #include <linux/of_device.h>
  15. #include <linux/soc/qcom/fsa4480-i2c.h>
  16. #include <sound/core.h>
  17. #include <sound/soc.h>
  18. #include <sound/soc-dapm.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/info.h>
  22. #include <soc/snd_event.h>
  23. #include <dsp/audio_notifier.h>
  24. #include <soc/swr-common.h>
  25. #include <dsp/q6afe-v2.h>
  26. #include <dsp/q6core.h>
  27. #include "device_event.h"
  28. #include "msm-pcm-routing-v2.h"
  29. #include "asoc/msm-cdc-pinctrl.h"
  30. #include "asoc/wcd-mbhc-v2.h"
  31. #include "codecs/wcd938x/wcd938x-mbhc.h"
  32. #include "codecs/wsa881x.h"
  33. #include "codecs/wcd938x/wcd938x.h"
  34. #include "codecs/bolero/bolero-cdc.h"
  35. #include <dt-bindings/sound/audio-codec-port-types.h>
  36. #include "codecs/bolero/wsa-macro.h"
  37. #include "sm8250-port-config.h"
  38. #define DRV_NAME "kona-asoc-snd"
  39. #define __CHIPSET__ "KONA "
  40. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  41. #define SAMPLING_RATE_8KHZ 8000
  42. #define SAMPLING_RATE_11P025KHZ 11025
  43. #define SAMPLING_RATE_16KHZ 16000
  44. #define SAMPLING_RATE_22P05KHZ 22050
  45. #define SAMPLING_RATE_32KHZ 32000
  46. #define SAMPLING_RATE_44P1KHZ 44100
  47. #define SAMPLING_RATE_48KHZ 48000
  48. #define SAMPLING_RATE_88P2KHZ 88200
  49. #define SAMPLING_RATE_96KHZ 96000
  50. #define SAMPLING_RATE_176P4KHZ 176400
  51. #define SAMPLING_RATE_192KHZ 192000
  52. #define SAMPLING_RATE_352P8KHZ 352800
  53. #define SAMPLING_RATE_384KHZ 384000
  54. #define WCD9XXX_MBHC_DEF_RLOADS 5
  55. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  56. #define CODEC_EXT_CLK_RATE 9600000
  57. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  58. #define DEV_NAME_STR_LEN 32
  59. #define WCD_MBHC_HS_V_MAX 1600
  60. #define TDM_CHANNEL_MAX 8
  61. #define DEV_NAME_STR_LEN 32
  62. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define WSA8810_NAME_1 "wsa881x.20170211"
  65. #define WSA8810_NAME_2 "wsa881x.20170212"
  66. #define WCN_CDC_SLIM_RX_CH_MAX 2
  67. #define WCN_CDC_SLIM_TX_CH_MAX 2
  68. enum {
  69. TDM_0 = 0,
  70. TDM_1,
  71. TDM_2,
  72. TDM_3,
  73. TDM_4,
  74. TDM_5,
  75. TDM_6,
  76. TDM_7,
  77. TDM_PORT_MAX,
  78. };
  79. enum {
  80. TDM_PRI = 0,
  81. TDM_SEC,
  82. TDM_TERT,
  83. TDM_INTERFACE_MAX,
  84. };
  85. enum {
  86. PRIM_AUX_PCM = 0,
  87. SEC_AUX_PCM,
  88. TERT_AUX_PCM,
  89. AUX_PCM_MAX,
  90. };
  91. enum {
  92. PRIM_MI2S = 0,
  93. SEC_MI2S,
  94. TERT_MI2S,
  95. MI2S_MAX,
  96. };
  97. enum {
  98. WSA_CDC_DMA_RX_0 = 0,
  99. WSA_CDC_DMA_RX_1,
  100. RX_CDC_DMA_RX_0,
  101. RX_CDC_DMA_RX_1,
  102. RX_CDC_DMA_RX_2,
  103. RX_CDC_DMA_RX_3,
  104. RX_CDC_DMA_RX_5,
  105. CDC_DMA_RX_MAX,
  106. };
  107. enum {
  108. WSA_CDC_DMA_TX_0 = 0,
  109. WSA_CDC_DMA_TX_1,
  110. WSA_CDC_DMA_TX_2,
  111. TX_CDC_DMA_TX_0,
  112. TX_CDC_DMA_TX_3,
  113. TX_CDC_DMA_TX_4,
  114. VA_CDC_DMA_TX_0,
  115. VA_CDC_DMA_TX_1,
  116. VA_CDC_DMA_TX_2,
  117. CDC_DMA_TX_MAX,
  118. };
  119. enum {
  120. SLIM_RX_7 = 0,
  121. SLIM_RX_MAX,
  122. };
  123. enum {
  124. SLIM_TX_7 = 0,
  125. SLIM_TX_MAX,
  126. };
  127. struct msm_asoc_mach_data {
  128. struct snd_info_entry *codec_root;
  129. int usbc_en2_gpio; /* used by gpio driver API */
  130. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  131. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  132. struct device_node *dmic45_gpio_p; /* used by pinctrl API */
  133. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  134. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  135. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  136. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  137. bool is_afe_config_done;
  138. struct device_node *fsa_handle;
  139. };
  140. struct tdm_port {
  141. u32 mode;
  142. u32 channel;
  143. };
  144. enum {
  145. EXT_DISP_RX_IDX_DP = 0,
  146. EXT_DISP_RX_IDX_MAX,
  147. };
  148. struct msm_wsa881x_dev_info {
  149. struct device_node *of_node;
  150. u32 index;
  151. };
  152. struct aux_codec_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct dev_config {
  157. u32 sample_rate;
  158. u32 bit_format;
  159. u32 channels;
  160. };
  161. /* Default configuration of slimbus channels */
  162. static struct dev_config slim_rx_cfg[] = {
  163. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  164. };
  165. static struct dev_config slim_tx_cfg[] = {
  166. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  167. };
  168. /* Default configuration of external display BE */
  169. static struct dev_config ext_disp_rx_cfg[] = {
  170. [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  171. };
  172. static struct dev_config usb_rx_cfg = {
  173. .sample_rate = SAMPLING_RATE_48KHZ,
  174. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  175. .channels = 2,
  176. };
  177. static struct dev_config usb_tx_cfg = {
  178. .sample_rate = SAMPLING_RATE_48KHZ,
  179. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  180. .channels = 1,
  181. };
  182. static struct dev_config proxy_rx_cfg = {
  183. .sample_rate = SAMPLING_RATE_48KHZ,
  184. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  185. .channels = 2,
  186. };
  187. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  188. {
  189. AFE_API_VERSION_I2S_CONFIG,
  190. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  191. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  192. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  193. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  194. 0,
  195. },
  196. {
  197. AFE_API_VERSION_I2S_CONFIG,
  198. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  199. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  200. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  201. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  202. 0,
  203. },
  204. {
  205. AFE_API_VERSION_I2S_CONFIG,
  206. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  207. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  208. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  209. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  210. 0,
  211. },
  212. };
  213. struct mi2s_conf {
  214. struct mutex lock;
  215. u32 ref_cnt;
  216. u32 msm_is_mi2s_master;
  217. };
  218. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  219. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  220. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  221. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  222. };
  223. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  224. /* Default configuration of TDM channels */
  225. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  226. { /* PRI TDM */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  235. },
  236. { /* SEC TDM */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  245. },
  246. { /* TERT TDM */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  255. },
  256. };
  257. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  258. { /* PRI TDM */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  267. },
  268. { /* SEC TDM */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  277. },
  278. { /* TERT TDM */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  287. },
  288. };
  289. /* Default configuration of AUX PCM channels */
  290. static struct dev_config aux_pcm_rx_cfg[] = {
  291. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  292. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  293. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  294. };
  295. static struct dev_config aux_pcm_tx_cfg[] = {
  296. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  297. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  298. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  299. };
  300. /* Default configuration of MI2S channels */
  301. static struct dev_config mi2s_rx_cfg[] = {
  302. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  303. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  304. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  305. };
  306. static struct dev_config mi2s_tx_cfg[] = {
  307. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  308. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  309. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  310. };
  311. /* Default configuration of Codec DMA Interface RX */
  312. static struct dev_config cdc_dma_rx_cfg[] = {
  313. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  314. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  315. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  316. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  317. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  318. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  319. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  320. };
  321. /* Default configuration of Codec DMA Interface TX */
  322. static struct dev_config cdc_dma_tx_cfg[] = {
  323. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  324. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  325. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  326. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  327. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  328. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  329. [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  330. [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  331. [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
  332. };
  333. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  334. "S32_LE"};
  335. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  336. "Six", "Seven", "Eight"};
  337. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  338. "KHZ_16", "KHZ_22P05",
  339. "KHZ_32", "KHZ_44P1", "KHZ_48",
  340. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  341. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  342. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  343. "Five", "Six", "Seven",
  344. "Eight"};
  345. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  346. "KHZ_48", "KHZ_176P4",
  347. "KHZ_352P8"};
  348. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  349. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  350. "Five", "Six", "Seven", "Eight"};
  351. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  352. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  353. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  354. "KHZ_48", "KHZ_96", "KHZ_192"};
  355. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  356. "Five", "Six", "Seven",
  357. "Eight"};
  358. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  359. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  360. "Five", "Six", "Seven",
  361. "Eight"};
  362. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  363. "KHZ_16", "KHZ_22P05",
  364. "KHZ_32", "KHZ_44P1", "KHZ_48",
  365. "KHZ_88P2", "KHZ_96",
  366. "KHZ_176P4", "KHZ_192",
  367. "KHZ_352P8", "KHZ_384"};
  368. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  369. "S24_3LE"};
  370. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  371. "KHZ_192", "KHZ_32", "KHZ_44P1",
  372. "KHZ_88P2", "KHZ_176P4"};
  373. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  374. "KHZ_44P1", "KHZ_48",
  375. "KHZ_88P2", "KHZ_96"};
  376. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  377. "KHZ_44P1", "KHZ_48",
  378. "KHZ_88P2", "KHZ_96"};
  379. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  380. "KHZ_44P1", "KHZ_48",
  381. "KHZ_88P2", "KHZ_96"};
  382. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  383. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  384. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  385. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  386. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  387. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  388. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  389. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  390. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  391. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  392. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  393. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  394. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  395. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  396. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  397. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  398. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  399. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  400. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  401. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  402. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  403. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  404. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  405. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  406. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  407. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  408. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  409. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  410. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  411. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  412. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  413. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  414. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  415. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  416. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  417. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  418. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  419. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  420. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  421. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  422. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  423. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  424. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  425. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  426. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  427. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  428. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  429. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  430. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  431. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  432. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  433. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  434. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  435. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  436. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  437. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  438. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  439. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  440. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  441. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  442. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  443. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  444. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  445. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
  446. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
  447. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
  448. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  449. cdc_dma_sample_rate_text);
  450. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  451. cdc_dma_sample_rate_text);
  452. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  453. cdc_dma_sample_rate_text);
  454. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  455. cdc_dma_sample_rate_text);
  456. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  457. cdc_dma_sample_rate_text);
  458. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  459. cdc_dma_sample_rate_text);
  460. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  461. cdc_dma_sample_rate_text);
  462. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  463. cdc_dma_sample_rate_text);
  464. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  465. cdc_dma_sample_rate_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  467. cdc_dma_sample_rate_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  469. cdc_dma_sample_rate_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  471. cdc_dma_sample_rate_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  473. cdc_dma_sample_rate_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
  475. cdc_dma_sample_rate_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
  477. cdc_dma_sample_rate_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
  479. cdc_dma_sample_rate_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  483. ext_disp_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  487. static bool is_initial_boot;
  488. static bool codec_reg_done;
  489. static struct snd_soc_aux_dev *msm_aux_dev;
  490. static struct snd_soc_codec_conf *msm_codec_conf;
  491. static struct snd_soc_card snd_soc_card_kona_msm;
  492. static int dmic_0_1_gpio_cnt;
  493. static int dmic_2_3_gpio_cnt;
  494. static int dmic_4_5_gpio_cnt;
  495. static int msm_vi_feed_tx_ch = 2;
  496. static void *def_wcd_mbhc_cal(void);
  497. /*
  498. * Need to report LINEIN
  499. * if R/L channel impedance is larger than 5K ohm
  500. */
  501. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  502. .read_fw_bin = false,
  503. .calibration = NULL,
  504. .detect_extn_cable = true,
  505. .mono_stero_detection = false,
  506. .swap_gnd_mic = NULL,
  507. .hs_ext_micbias = true,
  508. .key_code[0] = KEY_MEDIA,
  509. .key_code[1] = KEY_VOICECOMMAND,
  510. .key_code[2] = KEY_VOLUMEUP,
  511. .key_code[3] = KEY_VOLUMEDOWN,
  512. .key_code[4] = 0,
  513. .key_code[5] = 0,
  514. .key_code[6] = 0,
  515. .key_code[7] = 0,
  516. .linein_th = 5000,
  517. .moisture_en = true,
  518. .mbhc_micbias = MIC_BIAS_2,
  519. .anc_micbias = MIC_BIAS_2,
  520. .enable_anc_mic_detect = false,
  521. };
  522. static inline int param_is_mask(int p)
  523. {
  524. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  525. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  526. }
  527. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  528. int n)
  529. {
  530. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  531. }
  532. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  533. unsigned int bit)
  534. {
  535. if (bit >= SNDRV_MASK_MAX)
  536. return;
  537. if (param_is_mask(n)) {
  538. struct snd_mask *m = param_to_mask(p, n);
  539. m->bits[0] = 0;
  540. m->bits[1] = 0;
  541. m->bits[bit >> 5] |= (1 << (bit & 31));
  542. }
  543. }
  544. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  545. struct snd_ctl_elem_value *ucontrol)
  546. {
  547. int sample_rate_val = 0;
  548. switch (usb_rx_cfg.sample_rate) {
  549. case SAMPLING_RATE_384KHZ:
  550. sample_rate_val = 12;
  551. break;
  552. case SAMPLING_RATE_352P8KHZ:
  553. sample_rate_val = 11;
  554. break;
  555. case SAMPLING_RATE_192KHZ:
  556. sample_rate_val = 10;
  557. break;
  558. case SAMPLING_RATE_176P4KHZ:
  559. sample_rate_val = 9;
  560. break;
  561. case SAMPLING_RATE_96KHZ:
  562. sample_rate_val = 8;
  563. break;
  564. case SAMPLING_RATE_88P2KHZ:
  565. sample_rate_val = 7;
  566. break;
  567. case SAMPLING_RATE_48KHZ:
  568. sample_rate_val = 6;
  569. break;
  570. case SAMPLING_RATE_44P1KHZ:
  571. sample_rate_val = 5;
  572. break;
  573. case SAMPLING_RATE_32KHZ:
  574. sample_rate_val = 4;
  575. break;
  576. case SAMPLING_RATE_22P05KHZ:
  577. sample_rate_val = 3;
  578. break;
  579. case SAMPLING_RATE_16KHZ:
  580. sample_rate_val = 2;
  581. break;
  582. case SAMPLING_RATE_11P025KHZ:
  583. sample_rate_val = 1;
  584. break;
  585. case SAMPLING_RATE_8KHZ:
  586. default:
  587. sample_rate_val = 0;
  588. break;
  589. }
  590. ucontrol->value.integer.value[0] = sample_rate_val;
  591. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  592. usb_rx_cfg.sample_rate);
  593. return 0;
  594. }
  595. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  596. struct snd_ctl_elem_value *ucontrol)
  597. {
  598. switch (ucontrol->value.integer.value[0]) {
  599. case 12:
  600. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  601. break;
  602. case 11:
  603. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  604. break;
  605. case 10:
  606. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  607. break;
  608. case 9:
  609. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  610. break;
  611. case 8:
  612. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  613. break;
  614. case 7:
  615. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  616. break;
  617. case 6:
  618. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  619. break;
  620. case 5:
  621. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  622. break;
  623. case 4:
  624. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  625. break;
  626. case 3:
  627. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  628. break;
  629. case 2:
  630. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  631. break;
  632. case 1:
  633. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  634. break;
  635. case 0:
  636. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  637. break;
  638. default:
  639. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  640. break;
  641. }
  642. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  643. __func__, ucontrol->value.integer.value[0],
  644. usb_rx_cfg.sample_rate);
  645. return 0;
  646. }
  647. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  648. struct snd_ctl_elem_value *ucontrol)
  649. {
  650. int sample_rate_val = 0;
  651. switch (usb_tx_cfg.sample_rate) {
  652. case SAMPLING_RATE_384KHZ:
  653. sample_rate_val = 12;
  654. break;
  655. case SAMPLING_RATE_352P8KHZ:
  656. sample_rate_val = 11;
  657. break;
  658. case SAMPLING_RATE_192KHZ:
  659. sample_rate_val = 10;
  660. break;
  661. case SAMPLING_RATE_176P4KHZ:
  662. sample_rate_val = 9;
  663. break;
  664. case SAMPLING_RATE_96KHZ:
  665. sample_rate_val = 8;
  666. break;
  667. case SAMPLING_RATE_88P2KHZ:
  668. sample_rate_val = 7;
  669. break;
  670. case SAMPLING_RATE_48KHZ:
  671. sample_rate_val = 6;
  672. break;
  673. case SAMPLING_RATE_44P1KHZ:
  674. sample_rate_val = 5;
  675. break;
  676. case SAMPLING_RATE_32KHZ:
  677. sample_rate_val = 4;
  678. break;
  679. case SAMPLING_RATE_22P05KHZ:
  680. sample_rate_val = 3;
  681. break;
  682. case SAMPLING_RATE_16KHZ:
  683. sample_rate_val = 2;
  684. break;
  685. case SAMPLING_RATE_11P025KHZ:
  686. sample_rate_val = 1;
  687. break;
  688. case SAMPLING_RATE_8KHZ:
  689. sample_rate_val = 0;
  690. break;
  691. default:
  692. sample_rate_val = 6;
  693. break;
  694. }
  695. ucontrol->value.integer.value[0] = sample_rate_val;
  696. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  697. usb_tx_cfg.sample_rate);
  698. return 0;
  699. }
  700. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  701. struct snd_ctl_elem_value *ucontrol)
  702. {
  703. switch (ucontrol->value.integer.value[0]) {
  704. case 12:
  705. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  706. break;
  707. case 11:
  708. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  709. break;
  710. case 10:
  711. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  712. break;
  713. case 9:
  714. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  715. break;
  716. case 8:
  717. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  718. break;
  719. case 7:
  720. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  721. break;
  722. case 6:
  723. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  724. break;
  725. case 5:
  726. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  727. break;
  728. case 4:
  729. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  730. break;
  731. case 3:
  732. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  733. break;
  734. case 2:
  735. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  736. break;
  737. case 1:
  738. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  739. break;
  740. case 0:
  741. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  742. break;
  743. default:
  744. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  745. break;
  746. }
  747. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  748. __func__, ucontrol->value.integer.value[0],
  749. usb_tx_cfg.sample_rate);
  750. return 0;
  751. }
  752. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  753. struct snd_ctl_elem_value *ucontrol)
  754. {
  755. switch (usb_rx_cfg.bit_format) {
  756. case SNDRV_PCM_FORMAT_S32_LE:
  757. ucontrol->value.integer.value[0] = 3;
  758. break;
  759. case SNDRV_PCM_FORMAT_S24_3LE:
  760. ucontrol->value.integer.value[0] = 2;
  761. break;
  762. case SNDRV_PCM_FORMAT_S24_LE:
  763. ucontrol->value.integer.value[0] = 1;
  764. break;
  765. case SNDRV_PCM_FORMAT_S16_LE:
  766. default:
  767. ucontrol->value.integer.value[0] = 0;
  768. break;
  769. }
  770. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  771. __func__, usb_rx_cfg.bit_format,
  772. ucontrol->value.integer.value[0]);
  773. return 0;
  774. }
  775. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  776. struct snd_ctl_elem_value *ucontrol)
  777. {
  778. int rc = 0;
  779. switch (ucontrol->value.integer.value[0]) {
  780. case 3:
  781. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  782. break;
  783. case 2:
  784. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  785. break;
  786. case 1:
  787. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  788. break;
  789. case 0:
  790. default:
  791. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  792. break;
  793. }
  794. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  795. __func__, usb_rx_cfg.bit_format,
  796. ucontrol->value.integer.value[0]);
  797. return rc;
  798. }
  799. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  800. struct snd_ctl_elem_value *ucontrol)
  801. {
  802. switch (usb_tx_cfg.bit_format) {
  803. case SNDRV_PCM_FORMAT_S32_LE:
  804. ucontrol->value.integer.value[0] = 3;
  805. break;
  806. case SNDRV_PCM_FORMAT_S24_3LE:
  807. ucontrol->value.integer.value[0] = 2;
  808. break;
  809. case SNDRV_PCM_FORMAT_S24_LE:
  810. ucontrol->value.integer.value[0] = 1;
  811. break;
  812. case SNDRV_PCM_FORMAT_S16_LE:
  813. default:
  814. ucontrol->value.integer.value[0] = 0;
  815. break;
  816. }
  817. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  818. __func__, usb_tx_cfg.bit_format,
  819. ucontrol->value.integer.value[0]);
  820. return 0;
  821. }
  822. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  823. struct snd_ctl_elem_value *ucontrol)
  824. {
  825. int rc = 0;
  826. switch (ucontrol->value.integer.value[0]) {
  827. case 3:
  828. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  829. break;
  830. case 2:
  831. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  832. break;
  833. case 1:
  834. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  835. break;
  836. case 0:
  837. default:
  838. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  839. break;
  840. }
  841. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  842. __func__, usb_tx_cfg.bit_format,
  843. ucontrol->value.integer.value[0]);
  844. return rc;
  845. }
  846. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  847. struct snd_ctl_elem_value *ucontrol)
  848. {
  849. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  850. usb_rx_cfg.channels);
  851. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  852. return 0;
  853. }
  854. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  855. struct snd_ctl_elem_value *ucontrol)
  856. {
  857. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  858. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  859. return 1;
  860. }
  861. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  862. struct snd_ctl_elem_value *ucontrol)
  863. {
  864. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  865. usb_tx_cfg.channels);
  866. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  867. return 0;
  868. }
  869. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  870. struct snd_ctl_elem_value *ucontrol)
  871. {
  872. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  873. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  874. return 1;
  875. }
  876. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  877. {
  878. int idx = 0;
  879. if (strnstr(kcontrol->id.name, "Display Port RX",
  880. sizeof("Display Port RX"))) {
  881. idx = EXT_DISP_RX_IDX_DP;
  882. } else {
  883. pr_err("%s: unsupported BE: %s\n",
  884. __func__, kcontrol->id.name);
  885. idx = -EINVAL;
  886. }
  887. return idx;
  888. }
  889. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  890. struct snd_ctl_elem_value *ucontrol)
  891. {
  892. int idx = ext_disp_get_port_idx(kcontrol);
  893. if (idx < 0)
  894. return idx;
  895. switch (ext_disp_rx_cfg[idx].bit_format) {
  896. case SNDRV_PCM_FORMAT_S24_3LE:
  897. ucontrol->value.integer.value[0] = 2;
  898. break;
  899. case SNDRV_PCM_FORMAT_S24_LE:
  900. ucontrol->value.integer.value[0] = 1;
  901. break;
  902. case SNDRV_PCM_FORMAT_S16_LE:
  903. default:
  904. ucontrol->value.integer.value[0] = 0;
  905. break;
  906. }
  907. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  908. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  909. ucontrol->value.integer.value[0]);
  910. return 0;
  911. }
  912. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  913. struct snd_ctl_elem_value *ucontrol)
  914. {
  915. int idx = ext_disp_get_port_idx(kcontrol);
  916. if (idx < 0)
  917. return idx;
  918. switch (ucontrol->value.integer.value[0]) {
  919. case 2:
  920. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  921. break;
  922. case 1:
  923. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  924. break;
  925. case 0:
  926. default:
  927. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  928. break;
  929. }
  930. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  931. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  932. ucontrol->value.integer.value[0]);
  933. return 0;
  934. }
  935. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  936. struct snd_ctl_elem_value *ucontrol)
  937. {
  938. int idx = ext_disp_get_port_idx(kcontrol);
  939. if (idx < 0)
  940. return idx;
  941. ucontrol->value.integer.value[0] =
  942. ext_disp_rx_cfg[idx].channels - 2;
  943. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  944. idx, ext_disp_rx_cfg[idx].channels);
  945. return 0;
  946. }
  947. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  948. struct snd_ctl_elem_value *ucontrol)
  949. {
  950. int idx = ext_disp_get_port_idx(kcontrol);
  951. if (idx < 0)
  952. return idx;
  953. ext_disp_rx_cfg[idx].channels =
  954. ucontrol->value.integer.value[0] + 2;
  955. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  956. idx, ext_disp_rx_cfg[idx].channels);
  957. return 1;
  958. }
  959. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. int sample_rate_val;
  963. int idx = ext_disp_get_port_idx(kcontrol);
  964. if (idx < 0)
  965. return idx;
  966. switch (ext_disp_rx_cfg[idx].sample_rate) {
  967. case SAMPLING_RATE_176P4KHZ:
  968. sample_rate_val = 6;
  969. break;
  970. case SAMPLING_RATE_88P2KHZ:
  971. sample_rate_val = 5;
  972. break;
  973. case SAMPLING_RATE_44P1KHZ:
  974. sample_rate_val = 4;
  975. break;
  976. case SAMPLING_RATE_32KHZ:
  977. sample_rate_val = 3;
  978. break;
  979. case SAMPLING_RATE_192KHZ:
  980. sample_rate_val = 2;
  981. break;
  982. case SAMPLING_RATE_96KHZ:
  983. sample_rate_val = 1;
  984. break;
  985. case SAMPLING_RATE_48KHZ:
  986. default:
  987. sample_rate_val = 0;
  988. break;
  989. }
  990. ucontrol->value.integer.value[0] = sample_rate_val;
  991. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  992. idx, ext_disp_rx_cfg[idx].sample_rate);
  993. return 0;
  994. }
  995. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  996. struct snd_ctl_elem_value *ucontrol)
  997. {
  998. int idx = ext_disp_get_port_idx(kcontrol);
  999. if (idx < 0)
  1000. return idx;
  1001. switch (ucontrol->value.integer.value[0]) {
  1002. case 6:
  1003. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1004. break;
  1005. case 5:
  1006. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1007. break;
  1008. case 4:
  1009. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1010. break;
  1011. case 3:
  1012. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1013. break;
  1014. case 2:
  1015. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1016. break;
  1017. case 1:
  1018. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1019. break;
  1020. case 0:
  1021. default:
  1022. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  1023. break;
  1024. }
  1025. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  1026. __func__, ucontrol->value.integer.value[0], idx,
  1027. ext_disp_rx_cfg[idx].sample_rate);
  1028. return 0;
  1029. }
  1030. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  1031. struct snd_ctl_elem_value *ucontrol)
  1032. {
  1033. pr_debug("%s: proxy_rx channels = %d\n",
  1034. __func__, proxy_rx_cfg.channels);
  1035. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  1036. return 0;
  1037. }
  1038. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  1039. struct snd_ctl_elem_value *ucontrol)
  1040. {
  1041. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  1042. pr_debug("%s: proxy_rx channels = %d\n",
  1043. __func__, proxy_rx_cfg.channels);
  1044. return 1;
  1045. }
  1046. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  1047. struct tdm_port *port)
  1048. {
  1049. if (port) {
  1050. if (strnstr(kcontrol->id.name, "PRI",
  1051. sizeof(kcontrol->id.name))) {
  1052. port->mode = TDM_PRI;
  1053. } else if (strnstr(kcontrol->id.name, "SEC",
  1054. sizeof(kcontrol->id.name))) {
  1055. port->mode = TDM_SEC;
  1056. } else if (strnstr(kcontrol->id.name, "TERT",
  1057. sizeof(kcontrol->id.name))) {
  1058. port->mode = TDM_TERT;
  1059. } else {
  1060. pr_err("%s: unsupported mode in: %s\n",
  1061. __func__, kcontrol->id.name);
  1062. return -EINVAL;
  1063. }
  1064. if (strnstr(kcontrol->id.name, "RX_0",
  1065. sizeof(kcontrol->id.name)) ||
  1066. strnstr(kcontrol->id.name, "TX_0",
  1067. sizeof(kcontrol->id.name))) {
  1068. port->channel = TDM_0;
  1069. } else if (strnstr(kcontrol->id.name, "RX_1",
  1070. sizeof(kcontrol->id.name)) ||
  1071. strnstr(kcontrol->id.name, "TX_1",
  1072. sizeof(kcontrol->id.name))) {
  1073. port->channel = TDM_1;
  1074. } else if (strnstr(kcontrol->id.name, "RX_2",
  1075. sizeof(kcontrol->id.name)) ||
  1076. strnstr(kcontrol->id.name, "TX_2",
  1077. sizeof(kcontrol->id.name))) {
  1078. port->channel = TDM_2;
  1079. } else if (strnstr(kcontrol->id.name, "RX_3",
  1080. sizeof(kcontrol->id.name)) ||
  1081. strnstr(kcontrol->id.name, "TX_3",
  1082. sizeof(kcontrol->id.name))) {
  1083. port->channel = TDM_3;
  1084. } else if (strnstr(kcontrol->id.name, "RX_4",
  1085. sizeof(kcontrol->id.name)) ||
  1086. strnstr(kcontrol->id.name, "TX_4",
  1087. sizeof(kcontrol->id.name))) {
  1088. port->channel = TDM_4;
  1089. } else if (strnstr(kcontrol->id.name, "RX_5",
  1090. sizeof(kcontrol->id.name)) ||
  1091. strnstr(kcontrol->id.name, "TX_5",
  1092. sizeof(kcontrol->id.name))) {
  1093. port->channel = TDM_5;
  1094. } else if (strnstr(kcontrol->id.name, "RX_6",
  1095. sizeof(kcontrol->id.name)) ||
  1096. strnstr(kcontrol->id.name, "TX_6",
  1097. sizeof(kcontrol->id.name))) {
  1098. port->channel = TDM_6;
  1099. } else if (strnstr(kcontrol->id.name, "RX_7",
  1100. sizeof(kcontrol->id.name)) ||
  1101. strnstr(kcontrol->id.name, "TX_7",
  1102. sizeof(kcontrol->id.name))) {
  1103. port->channel = TDM_7;
  1104. } else {
  1105. pr_err("%s: unsupported channel in: %s\n",
  1106. __func__, kcontrol->id.name);
  1107. return -EINVAL;
  1108. }
  1109. } else {
  1110. return -EINVAL;
  1111. }
  1112. return 0;
  1113. }
  1114. static int tdm_get_sample_rate(int value)
  1115. {
  1116. int sample_rate = 0;
  1117. switch (value) {
  1118. case 0:
  1119. sample_rate = SAMPLING_RATE_8KHZ;
  1120. break;
  1121. case 1:
  1122. sample_rate = SAMPLING_RATE_16KHZ;
  1123. break;
  1124. case 2:
  1125. sample_rate = SAMPLING_RATE_32KHZ;
  1126. break;
  1127. case 3:
  1128. sample_rate = SAMPLING_RATE_48KHZ;
  1129. break;
  1130. case 4:
  1131. sample_rate = SAMPLING_RATE_176P4KHZ;
  1132. break;
  1133. case 5:
  1134. sample_rate = SAMPLING_RATE_352P8KHZ;
  1135. break;
  1136. default:
  1137. sample_rate = SAMPLING_RATE_48KHZ;
  1138. break;
  1139. }
  1140. return sample_rate;
  1141. }
  1142. static int tdm_get_sample_rate_val(int sample_rate)
  1143. {
  1144. int sample_rate_val = 0;
  1145. switch (sample_rate) {
  1146. case SAMPLING_RATE_8KHZ:
  1147. sample_rate_val = 0;
  1148. break;
  1149. case SAMPLING_RATE_16KHZ:
  1150. sample_rate_val = 1;
  1151. break;
  1152. case SAMPLING_RATE_32KHZ:
  1153. sample_rate_val = 2;
  1154. break;
  1155. case SAMPLING_RATE_48KHZ:
  1156. sample_rate_val = 3;
  1157. break;
  1158. case SAMPLING_RATE_176P4KHZ:
  1159. sample_rate_val = 4;
  1160. break;
  1161. case SAMPLING_RATE_352P8KHZ:
  1162. sample_rate_val = 5;
  1163. break;
  1164. default:
  1165. sample_rate_val = 3;
  1166. break;
  1167. }
  1168. return sample_rate_val;
  1169. }
  1170. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1171. struct snd_ctl_elem_value *ucontrol)
  1172. {
  1173. struct tdm_port port;
  1174. int ret = tdm_get_port_idx(kcontrol, &port);
  1175. if (ret) {
  1176. pr_err("%s: unsupported control: %s\n",
  1177. __func__, kcontrol->id.name);
  1178. } else {
  1179. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1180. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  1181. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1182. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1183. ucontrol->value.enumerated.item[0]);
  1184. }
  1185. return ret;
  1186. }
  1187. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1188. struct snd_ctl_elem_value *ucontrol)
  1189. {
  1190. struct tdm_port port;
  1191. int ret = tdm_get_port_idx(kcontrol, &port);
  1192. if (ret) {
  1193. pr_err("%s: unsupported control: %s\n",
  1194. __func__, kcontrol->id.name);
  1195. } else {
  1196. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  1197. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1198. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  1199. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  1200. ucontrol->value.enumerated.item[0]);
  1201. }
  1202. return ret;
  1203. }
  1204. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1205. struct snd_ctl_elem_value *ucontrol)
  1206. {
  1207. struct tdm_port port;
  1208. int ret = tdm_get_port_idx(kcontrol, &port);
  1209. if (ret) {
  1210. pr_err("%s: unsupported control: %s\n",
  1211. __func__, kcontrol->id.name);
  1212. } else {
  1213. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  1214. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  1215. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1216. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1217. ucontrol->value.enumerated.item[0]);
  1218. }
  1219. return ret;
  1220. }
  1221. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1222. struct snd_ctl_elem_value *ucontrol)
  1223. {
  1224. struct tdm_port port;
  1225. int ret = tdm_get_port_idx(kcontrol, &port);
  1226. if (ret) {
  1227. pr_err("%s: unsupported control: %s\n",
  1228. __func__, kcontrol->id.name);
  1229. } else {
  1230. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  1231. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1232. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  1233. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  1234. ucontrol->value.enumerated.item[0]);
  1235. }
  1236. return ret;
  1237. }
  1238. static int tdm_get_format(int value)
  1239. {
  1240. int format = 0;
  1241. switch (value) {
  1242. case 0:
  1243. format = SNDRV_PCM_FORMAT_S16_LE;
  1244. break;
  1245. case 1:
  1246. format = SNDRV_PCM_FORMAT_S24_LE;
  1247. break;
  1248. case 2:
  1249. format = SNDRV_PCM_FORMAT_S32_LE;
  1250. break;
  1251. default:
  1252. format = SNDRV_PCM_FORMAT_S16_LE;
  1253. break;
  1254. }
  1255. return format;
  1256. }
  1257. static int tdm_get_format_val(int format)
  1258. {
  1259. int value = 0;
  1260. switch (format) {
  1261. case SNDRV_PCM_FORMAT_S16_LE:
  1262. value = 0;
  1263. break;
  1264. case SNDRV_PCM_FORMAT_S24_LE:
  1265. value = 1;
  1266. break;
  1267. case SNDRV_PCM_FORMAT_S32_LE:
  1268. value = 2;
  1269. break;
  1270. default:
  1271. value = 0;
  1272. break;
  1273. }
  1274. return value;
  1275. }
  1276. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  1277. struct snd_ctl_elem_value *ucontrol)
  1278. {
  1279. struct tdm_port port;
  1280. int ret = tdm_get_port_idx(kcontrol, &port);
  1281. if (ret) {
  1282. pr_err("%s: unsupported control: %s\n",
  1283. __func__, kcontrol->id.name);
  1284. } else {
  1285. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1286. tdm_rx_cfg[port.mode][port.channel].bit_format);
  1287. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1288. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1289. ucontrol->value.enumerated.item[0]);
  1290. }
  1291. return ret;
  1292. }
  1293. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  1294. struct snd_ctl_elem_value *ucontrol)
  1295. {
  1296. struct tdm_port port;
  1297. int ret = tdm_get_port_idx(kcontrol, &port);
  1298. if (ret) {
  1299. pr_err("%s: unsupported control: %s\n",
  1300. __func__, kcontrol->id.name);
  1301. } else {
  1302. tdm_rx_cfg[port.mode][port.channel].bit_format =
  1303. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1304. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  1305. tdm_rx_cfg[port.mode][port.channel].bit_format,
  1306. ucontrol->value.enumerated.item[0]);
  1307. }
  1308. return ret;
  1309. }
  1310. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  1311. struct snd_ctl_elem_value *ucontrol)
  1312. {
  1313. struct tdm_port port;
  1314. int ret = tdm_get_port_idx(kcontrol, &port);
  1315. if (ret) {
  1316. pr_err("%s: unsupported control: %s\n",
  1317. __func__, kcontrol->id.name);
  1318. } else {
  1319. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  1320. tdm_tx_cfg[port.mode][port.channel].bit_format);
  1321. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1322. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1323. ucontrol->value.enumerated.item[0]);
  1324. }
  1325. return ret;
  1326. }
  1327. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  1328. struct snd_ctl_elem_value *ucontrol)
  1329. {
  1330. struct tdm_port port;
  1331. int ret = tdm_get_port_idx(kcontrol, &port);
  1332. if (ret) {
  1333. pr_err("%s: unsupported control: %s\n",
  1334. __func__, kcontrol->id.name);
  1335. } else {
  1336. tdm_tx_cfg[port.mode][port.channel].bit_format =
  1337. tdm_get_format(ucontrol->value.enumerated.item[0]);
  1338. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  1339. tdm_tx_cfg[port.mode][port.channel].bit_format,
  1340. ucontrol->value.enumerated.item[0]);
  1341. }
  1342. return ret;
  1343. }
  1344. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  1345. struct snd_ctl_elem_value *ucontrol)
  1346. {
  1347. struct tdm_port port;
  1348. int ret = tdm_get_port_idx(kcontrol, &port);
  1349. if (ret) {
  1350. pr_err("%s: unsupported control: %s\n",
  1351. __func__, kcontrol->id.name);
  1352. } else {
  1353. ucontrol->value.enumerated.item[0] =
  1354. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  1355. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1356. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  1357. ucontrol->value.enumerated.item[0]);
  1358. }
  1359. return ret;
  1360. }
  1361. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  1362. struct snd_ctl_elem_value *ucontrol)
  1363. {
  1364. struct tdm_port port;
  1365. int ret = tdm_get_port_idx(kcontrol, &port);
  1366. if (ret) {
  1367. pr_err("%s: unsupported control: %s\n",
  1368. __func__, kcontrol->id.name);
  1369. } else {
  1370. tdm_rx_cfg[port.mode][port.channel].channels =
  1371. ucontrol->value.enumerated.item[0] + 1;
  1372. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  1373. tdm_rx_cfg[port.mode][port.channel].channels,
  1374. ucontrol->value.enumerated.item[0] + 1);
  1375. }
  1376. return ret;
  1377. }
  1378. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  1379. struct snd_ctl_elem_value *ucontrol)
  1380. {
  1381. struct tdm_port port;
  1382. int ret = tdm_get_port_idx(kcontrol, &port);
  1383. if (ret) {
  1384. pr_err("%s: unsupported control: %s\n",
  1385. __func__, kcontrol->id.name);
  1386. } else {
  1387. ucontrol->value.enumerated.item[0] =
  1388. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  1389. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1390. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  1391. ucontrol->value.enumerated.item[0]);
  1392. }
  1393. return ret;
  1394. }
  1395. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  1396. struct snd_ctl_elem_value *ucontrol)
  1397. {
  1398. struct tdm_port port;
  1399. int ret = tdm_get_port_idx(kcontrol, &port);
  1400. if (ret) {
  1401. pr_err("%s: unsupported control: %s\n",
  1402. __func__, kcontrol->id.name);
  1403. } else {
  1404. tdm_tx_cfg[port.mode][port.channel].channels =
  1405. ucontrol->value.enumerated.item[0] + 1;
  1406. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  1407. tdm_tx_cfg[port.mode][port.channel].channels,
  1408. ucontrol->value.enumerated.item[0] + 1);
  1409. }
  1410. return ret;
  1411. }
  1412. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  1413. {
  1414. int idx = 0;
  1415. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  1416. sizeof("PRIM_AUX_PCM"))) {
  1417. idx = PRIM_AUX_PCM;
  1418. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  1419. sizeof("SEC_AUX_PCM"))) {
  1420. idx = SEC_AUX_PCM;
  1421. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  1422. sizeof("TERT_AUX_PCM"))) {
  1423. idx = TERT_AUX_PCM;
  1424. } else {
  1425. pr_err("%s: unsupported port: %s\n",
  1426. __func__, kcontrol->id.name);
  1427. idx = -EINVAL;
  1428. }
  1429. return idx;
  1430. }
  1431. static int aux_pcm_get_sample_rate(int value)
  1432. {
  1433. int sample_rate = 0;
  1434. switch (value) {
  1435. case 1:
  1436. sample_rate = SAMPLING_RATE_16KHZ;
  1437. break;
  1438. case 0:
  1439. default:
  1440. sample_rate = SAMPLING_RATE_8KHZ;
  1441. break;
  1442. }
  1443. return sample_rate;
  1444. }
  1445. static int aux_pcm_get_sample_rate_val(int sample_rate)
  1446. {
  1447. int sample_rate_val = 0;
  1448. switch (sample_rate) {
  1449. case SAMPLING_RATE_16KHZ:
  1450. sample_rate_val = 1;
  1451. break;
  1452. case SAMPLING_RATE_8KHZ:
  1453. default:
  1454. sample_rate_val = 0;
  1455. break;
  1456. }
  1457. return sample_rate_val;
  1458. }
  1459. static int mi2s_auxpcm_get_format(int value)
  1460. {
  1461. int format = 0;
  1462. switch (value) {
  1463. case 0:
  1464. format = SNDRV_PCM_FORMAT_S16_LE;
  1465. break;
  1466. case 1:
  1467. format = SNDRV_PCM_FORMAT_S24_LE;
  1468. break;
  1469. case 2:
  1470. format = SNDRV_PCM_FORMAT_S24_3LE;
  1471. break;
  1472. case 3:
  1473. format = SNDRV_PCM_FORMAT_S32_LE;
  1474. break;
  1475. default:
  1476. format = SNDRV_PCM_FORMAT_S16_LE;
  1477. break;
  1478. }
  1479. return format;
  1480. }
  1481. static int mi2s_auxpcm_get_format_value(int format)
  1482. {
  1483. int value = 0;
  1484. switch (format) {
  1485. case SNDRV_PCM_FORMAT_S16_LE:
  1486. value = 0;
  1487. break;
  1488. case SNDRV_PCM_FORMAT_S24_LE:
  1489. value = 1;
  1490. break;
  1491. case SNDRV_PCM_FORMAT_S24_3LE:
  1492. value = 2;
  1493. break;
  1494. case SNDRV_PCM_FORMAT_S32_LE:
  1495. value = 3;
  1496. break;
  1497. default:
  1498. value = 0;
  1499. break;
  1500. }
  1501. return value;
  1502. }
  1503. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1504. struct snd_ctl_elem_value *ucontrol)
  1505. {
  1506. int idx = aux_pcm_get_port_idx(kcontrol);
  1507. if (idx < 0)
  1508. return idx;
  1509. ucontrol->value.enumerated.item[0] =
  1510. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  1511. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1512. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1513. ucontrol->value.enumerated.item[0]);
  1514. return 0;
  1515. }
  1516. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1517. struct snd_ctl_elem_value *ucontrol)
  1518. {
  1519. int idx = aux_pcm_get_port_idx(kcontrol);
  1520. if (idx < 0)
  1521. return idx;
  1522. aux_pcm_rx_cfg[idx].sample_rate =
  1523. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1524. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1525. idx, aux_pcm_rx_cfg[idx].sample_rate,
  1526. ucontrol->value.enumerated.item[0]);
  1527. return 0;
  1528. }
  1529. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1530. struct snd_ctl_elem_value *ucontrol)
  1531. {
  1532. int idx = aux_pcm_get_port_idx(kcontrol);
  1533. if (idx < 0)
  1534. return idx;
  1535. ucontrol->value.enumerated.item[0] =
  1536. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  1537. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1538. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1539. ucontrol->value.enumerated.item[0]);
  1540. return 0;
  1541. }
  1542. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1543. struct snd_ctl_elem_value *ucontrol)
  1544. {
  1545. int idx = aux_pcm_get_port_idx(kcontrol);
  1546. if (idx < 0)
  1547. return idx;
  1548. aux_pcm_tx_cfg[idx].sample_rate =
  1549. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1550. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1551. idx, aux_pcm_tx_cfg[idx].sample_rate,
  1552. ucontrol->value.enumerated.item[0]);
  1553. return 0;
  1554. }
  1555. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  1556. struct snd_ctl_elem_value *ucontrol)
  1557. {
  1558. int idx = aux_pcm_get_port_idx(kcontrol);
  1559. if (idx < 0)
  1560. return idx;
  1561. ucontrol->value.enumerated.item[0] =
  1562. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  1563. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1564. idx, aux_pcm_rx_cfg[idx].bit_format,
  1565. ucontrol->value.enumerated.item[0]);
  1566. return 0;
  1567. }
  1568. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  1569. struct snd_ctl_elem_value *ucontrol)
  1570. {
  1571. int idx = aux_pcm_get_port_idx(kcontrol);
  1572. if (idx < 0)
  1573. return idx;
  1574. aux_pcm_rx_cfg[idx].bit_format =
  1575. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1576. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1577. idx, aux_pcm_rx_cfg[idx].bit_format,
  1578. ucontrol->value.enumerated.item[0]);
  1579. return 0;
  1580. }
  1581. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  1582. struct snd_ctl_elem_value *ucontrol)
  1583. {
  1584. int idx = aux_pcm_get_port_idx(kcontrol);
  1585. if (idx < 0)
  1586. return idx;
  1587. ucontrol->value.enumerated.item[0] =
  1588. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  1589. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1590. idx, aux_pcm_tx_cfg[idx].bit_format,
  1591. ucontrol->value.enumerated.item[0]);
  1592. return 0;
  1593. }
  1594. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  1595. struct snd_ctl_elem_value *ucontrol)
  1596. {
  1597. int idx = aux_pcm_get_port_idx(kcontrol);
  1598. if (idx < 0)
  1599. return idx;
  1600. aux_pcm_tx_cfg[idx].bit_format =
  1601. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1602. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1603. idx, aux_pcm_tx_cfg[idx].bit_format,
  1604. ucontrol->value.enumerated.item[0]);
  1605. return 0;
  1606. }
  1607. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  1608. {
  1609. int idx = 0;
  1610. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  1611. sizeof("PRIM_MI2S_RX"))) {
  1612. idx = PRIM_MI2S;
  1613. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  1614. sizeof("SEC_MI2S_RX"))) {
  1615. idx = SEC_MI2S;
  1616. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  1617. sizeof("TERT_MI2S_RX"))) {
  1618. idx = TERT_MI2S;
  1619. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  1620. sizeof("PRIM_MI2S_TX"))) {
  1621. idx = PRIM_MI2S;
  1622. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  1623. sizeof("SEC_MI2S_TX"))) {
  1624. idx = SEC_MI2S;
  1625. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  1626. sizeof("TERT_MI2S_TX"))) {
  1627. idx = TERT_MI2S;
  1628. } else {
  1629. pr_err("%s: unsupported channel: %s\n",
  1630. __func__, kcontrol->id.name);
  1631. idx = -EINVAL;
  1632. }
  1633. return idx;
  1634. }
  1635. static int mi2s_get_sample_rate(int value)
  1636. {
  1637. int sample_rate = 0;
  1638. switch (value) {
  1639. case 0:
  1640. sample_rate = SAMPLING_RATE_8KHZ;
  1641. break;
  1642. case 1:
  1643. sample_rate = SAMPLING_RATE_11P025KHZ;
  1644. break;
  1645. case 2:
  1646. sample_rate = SAMPLING_RATE_16KHZ;
  1647. break;
  1648. case 3:
  1649. sample_rate = SAMPLING_RATE_22P05KHZ;
  1650. break;
  1651. case 4:
  1652. sample_rate = SAMPLING_RATE_32KHZ;
  1653. break;
  1654. case 5:
  1655. sample_rate = SAMPLING_RATE_44P1KHZ;
  1656. break;
  1657. case 6:
  1658. sample_rate = SAMPLING_RATE_48KHZ;
  1659. break;
  1660. case 7:
  1661. sample_rate = SAMPLING_RATE_96KHZ;
  1662. break;
  1663. case 8:
  1664. sample_rate = SAMPLING_RATE_192KHZ;
  1665. break;
  1666. default:
  1667. sample_rate = SAMPLING_RATE_48KHZ;
  1668. break;
  1669. }
  1670. return sample_rate;
  1671. }
  1672. static int mi2s_get_sample_rate_val(int sample_rate)
  1673. {
  1674. int sample_rate_val = 0;
  1675. switch (sample_rate) {
  1676. case SAMPLING_RATE_8KHZ:
  1677. sample_rate_val = 0;
  1678. break;
  1679. case SAMPLING_RATE_11P025KHZ:
  1680. sample_rate_val = 1;
  1681. break;
  1682. case SAMPLING_RATE_16KHZ:
  1683. sample_rate_val = 2;
  1684. break;
  1685. case SAMPLING_RATE_22P05KHZ:
  1686. sample_rate_val = 3;
  1687. break;
  1688. case SAMPLING_RATE_32KHZ:
  1689. sample_rate_val = 4;
  1690. break;
  1691. case SAMPLING_RATE_44P1KHZ:
  1692. sample_rate_val = 5;
  1693. break;
  1694. case SAMPLING_RATE_48KHZ:
  1695. sample_rate_val = 6;
  1696. break;
  1697. case SAMPLING_RATE_96KHZ:
  1698. sample_rate_val = 7;
  1699. break;
  1700. case SAMPLING_RATE_192KHZ:
  1701. sample_rate_val = 8;
  1702. break;
  1703. default:
  1704. sample_rate_val = 6;
  1705. break;
  1706. }
  1707. return sample_rate_val;
  1708. }
  1709. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1710. struct snd_ctl_elem_value *ucontrol)
  1711. {
  1712. int idx = mi2s_get_port_idx(kcontrol);
  1713. if (idx < 0)
  1714. return idx;
  1715. ucontrol->value.enumerated.item[0] =
  1716. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  1717. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1718. idx, mi2s_rx_cfg[idx].sample_rate,
  1719. ucontrol->value.enumerated.item[0]);
  1720. return 0;
  1721. }
  1722. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1723. struct snd_ctl_elem_value *ucontrol)
  1724. {
  1725. int idx = mi2s_get_port_idx(kcontrol);
  1726. if (idx < 0)
  1727. return idx;
  1728. mi2s_rx_cfg[idx].sample_rate =
  1729. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1730. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  1731. idx, mi2s_rx_cfg[idx].sample_rate,
  1732. ucontrol->value.enumerated.item[0]);
  1733. return 0;
  1734. }
  1735. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1736. struct snd_ctl_elem_value *ucontrol)
  1737. {
  1738. int idx = mi2s_get_port_idx(kcontrol);
  1739. if (idx < 0)
  1740. return idx;
  1741. ucontrol->value.enumerated.item[0] =
  1742. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  1743. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1744. idx, mi2s_tx_cfg[idx].sample_rate,
  1745. ucontrol->value.enumerated.item[0]);
  1746. return 0;
  1747. }
  1748. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1749. struct snd_ctl_elem_value *ucontrol)
  1750. {
  1751. int idx = mi2s_get_port_idx(kcontrol);
  1752. if (idx < 0)
  1753. return idx;
  1754. mi2s_tx_cfg[idx].sample_rate =
  1755. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1756. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  1757. idx, mi2s_tx_cfg[idx].sample_rate,
  1758. ucontrol->value.enumerated.item[0]);
  1759. return 0;
  1760. }
  1761. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  1762. struct snd_ctl_elem_value *ucontrol)
  1763. {
  1764. int idx = mi2s_get_port_idx(kcontrol);
  1765. if (idx < 0)
  1766. return idx;
  1767. ucontrol->value.enumerated.item[0] =
  1768. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  1769. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1770. idx, mi2s_rx_cfg[idx].bit_format,
  1771. ucontrol->value.enumerated.item[0]);
  1772. return 0;
  1773. }
  1774. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  1775. struct snd_ctl_elem_value *ucontrol)
  1776. {
  1777. int idx = mi2s_get_port_idx(kcontrol);
  1778. if (idx < 0)
  1779. return idx;
  1780. mi2s_rx_cfg[idx].bit_format =
  1781. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1782. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  1783. idx, mi2s_rx_cfg[idx].bit_format,
  1784. ucontrol->value.enumerated.item[0]);
  1785. return 0;
  1786. }
  1787. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  1788. struct snd_ctl_elem_value *ucontrol)
  1789. {
  1790. int idx = mi2s_get_port_idx(kcontrol);
  1791. if (idx < 0)
  1792. return idx;
  1793. ucontrol->value.enumerated.item[0] =
  1794. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  1795. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1796. idx, mi2s_tx_cfg[idx].bit_format,
  1797. ucontrol->value.enumerated.item[0]);
  1798. return 0;
  1799. }
  1800. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  1801. struct snd_ctl_elem_value *ucontrol)
  1802. {
  1803. int idx = mi2s_get_port_idx(kcontrol);
  1804. if (idx < 0)
  1805. return idx;
  1806. mi2s_tx_cfg[idx].bit_format =
  1807. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  1808. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  1809. idx, mi2s_tx_cfg[idx].bit_format,
  1810. ucontrol->value.enumerated.item[0]);
  1811. return 0;
  1812. }
  1813. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  1814. struct snd_ctl_elem_value *ucontrol)
  1815. {
  1816. int idx = mi2s_get_port_idx(kcontrol);
  1817. if (idx < 0)
  1818. return idx;
  1819. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1820. idx, mi2s_rx_cfg[idx].channels);
  1821. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  1822. return 0;
  1823. }
  1824. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  1825. struct snd_ctl_elem_value *ucontrol)
  1826. {
  1827. int idx = mi2s_get_port_idx(kcontrol);
  1828. if (idx < 0)
  1829. return idx;
  1830. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1831. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  1832. idx, mi2s_rx_cfg[idx].channels);
  1833. return 1;
  1834. }
  1835. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  1836. struct snd_ctl_elem_value *ucontrol)
  1837. {
  1838. int idx = mi2s_get_port_idx(kcontrol);
  1839. if (idx < 0)
  1840. return idx;
  1841. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1842. idx, mi2s_tx_cfg[idx].channels);
  1843. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  1844. return 0;
  1845. }
  1846. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  1847. struct snd_ctl_elem_value *ucontrol)
  1848. {
  1849. int idx = mi2s_get_port_idx(kcontrol);
  1850. if (idx < 0)
  1851. return idx;
  1852. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  1853. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  1854. idx, mi2s_tx_cfg[idx].channels);
  1855. return 1;
  1856. }
  1857. static int msm_get_port_id(int be_id)
  1858. {
  1859. int afe_port_id = 0;
  1860. switch (be_id) {
  1861. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  1862. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  1863. break;
  1864. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  1865. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  1866. break;
  1867. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  1868. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  1869. break;
  1870. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  1871. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  1872. break;
  1873. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  1874. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  1875. break;
  1876. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  1877. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  1878. break;
  1879. default:
  1880. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  1881. afe_port_id = -EINVAL;
  1882. }
  1883. return afe_port_id;
  1884. }
  1885. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  1886. {
  1887. u32 bit_per_sample = 0;
  1888. switch (bit_format) {
  1889. case SNDRV_PCM_FORMAT_S32_LE:
  1890. case SNDRV_PCM_FORMAT_S24_3LE:
  1891. case SNDRV_PCM_FORMAT_S24_LE:
  1892. bit_per_sample = 32;
  1893. break;
  1894. case SNDRV_PCM_FORMAT_S16_LE:
  1895. default:
  1896. bit_per_sample = 16;
  1897. break;
  1898. }
  1899. return bit_per_sample;
  1900. }
  1901. static void update_mi2s_clk_val(int dai_id, int stream)
  1902. {
  1903. u32 bit_per_sample = 0;
  1904. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  1905. bit_per_sample =
  1906. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  1907. mi2s_clk[dai_id].clk_freq_in_hz =
  1908. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1909. } else {
  1910. bit_per_sample =
  1911. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  1912. mi2s_clk[dai_id].clk_freq_in_hz =
  1913. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  1914. }
  1915. }
  1916. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  1917. {
  1918. int ret = 0;
  1919. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  1920. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  1921. int port_id = 0;
  1922. int index = cpu_dai->id;
  1923. port_id = msm_get_port_id(rtd->dai_link->id);
  1924. if (port_id < 0) {
  1925. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  1926. ret = port_id;
  1927. goto err;
  1928. }
  1929. if (enable) {
  1930. update_mi2s_clk_val(index, substream->stream);
  1931. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  1932. mi2s_clk[index].clk_freq_in_hz);
  1933. }
  1934. mi2s_clk[index].enable = enable;
  1935. ret = afe_set_lpass_clock_v2(port_id,
  1936. &mi2s_clk[index]);
  1937. if (ret < 0) {
  1938. dev_err(rtd->card->dev,
  1939. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  1940. __func__, port_id, ret);
  1941. goto err;
  1942. }
  1943. err:
  1944. return ret;
  1945. }
  1946. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1947. {
  1948. int idx = 0;
  1949. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1950. sizeof("WSA_CDC_DMA_RX_0")))
  1951. idx = WSA_CDC_DMA_RX_0;
  1952. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1953. sizeof("WSA_CDC_DMA_RX_0")))
  1954. idx = WSA_CDC_DMA_RX_1;
  1955. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1956. sizeof("RX_CDC_DMA_RX_0")))
  1957. idx = RX_CDC_DMA_RX_0;
  1958. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1959. sizeof("RX_CDC_DMA_RX_1")))
  1960. idx = RX_CDC_DMA_RX_1;
  1961. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1962. sizeof("RX_CDC_DMA_RX_2")))
  1963. idx = RX_CDC_DMA_RX_2;
  1964. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1965. sizeof("RX_CDC_DMA_RX_3")))
  1966. idx = RX_CDC_DMA_RX_3;
  1967. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1968. sizeof("RX_CDC_DMA_RX_5")))
  1969. idx = RX_CDC_DMA_RX_5;
  1970. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1971. sizeof("WSA_CDC_DMA_TX_0")))
  1972. idx = WSA_CDC_DMA_TX_0;
  1973. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1974. sizeof("WSA_CDC_DMA_TX_1")))
  1975. idx = WSA_CDC_DMA_TX_1;
  1976. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1977. sizeof("WSA_CDC_DMA_TX_2")))
  1978. idx = WSA_CDC_DMA_TX_2;
  1979. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1980. sizeof("TX_CDC_DMA_TX_0")))
  1981. idx = TX_CDC_DMA_TX_0;
  1982. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1983. sizeof("TX_CDC_DMA_TX_3")))
  1984. idx = TX_CDC_DMA_TX_3;
  1985. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1986. sizeof("TX_CDC_DMA_TX_4")))
  1987. idx = TX_CDC_DMA_TX_4;
  1988. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
  1989. sizeof("VA_CDC_DMA_TX_0")))
  1990. idx = VA_CDC_DMA_TX_0;
  1991. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
  1992. sizeof("VA_CDC_DMA_TX_1")))
  1993. idx = VA_CDC_DMA_TX_1;
  1994. else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
  1995. sizeof("VA_CDC_DMA_TX_2")))
  1996. idx = VA_CDC_DMA_TX_2;
  1997. else {
  1998. pr_err("%s: unsupported channel: %s\n",
  1999. __func__, kcontrol->id.name);
  2000. return -EINVAL;
  2001. }
  2002. return idx;
  2003. }
  2004. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  2005. struct snd_ctl_elem_value *ucontrol)
  2006. {
  2007. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2008. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2009. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2010. return ch_num;
  2011. }
  2012. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2013. cdc_dma_rx_cfg[ch_num].channels - 1);
  2014. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  2015. return 0;
  2016. }
  2017. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  2018. struct snd_ctl_elem_value *ucontrol)
  2019. {
  2020. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2021. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2022. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2023. return ch_num;
  2024. }
  2025. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2026. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  2027. cdc_dma_rx_cfg[ch_num].channels);
  2028. return 1;
  2029. }
  2030. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  2031. struct snd_ctl_elem_value *ucontrol)
  2032. {
  2033. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2034. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2035. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2036. return ch_num;
  2037. }
  2038. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  2039. case SNDRV_PCM_FORMAT_S32_LE:
  2040. ucontrol->value.integer.value[0] = 3;
  2041. break;
  2042. case SNDRV_PCM_FORMAT_S24_3LE:
  2043. ucontrol->value.integer.value[0] = 2;
  2044. break;
  2045. case SNDRV_PCM_FORMAT_S24_LE:
  2046. ucontrol->value.integer.value[0] = 1;
  2047. break;
  2048. case SNDRV_PCM_FORMAT_S16_LE:
  2049. default:
  2050. ucontrol->value.integer.value[0] = 0;
  2051. break;
  2052. }
  2053. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2054. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2055. ucontrol->value.integer.value[0]);
  2056. return 0;
  2057. }
  2058. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  2059. struct snd_ctl_elem_value *ucontrol)
  2060. {
  2061. int rc = 0;
  2062. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2063. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2064. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2065. return ch_num;
  2066. }
  2067. switch (ucontrol->value.integer.value[0]) {
  2068. case 3:
  2069. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2070. break;
  2071. case 2:
  2072. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2073. break;
  2074. case 1:
  2075. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2076. break;
  2077. case 0:
  2078. default:
  2079. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2080. break;
  2081. }
  2082. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  2083. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  2084. ucontrol->value.integer.value[0]);
  2085. return rc;
  2086. }
  2087. static int cdc_dma_get_sample_rate_val(int sample_rate)
  2088. {
  2089. int sample_rate_val = 0;
  2090. switch (sample_rate) {
  2091. case SAMPLING_RATE_8KHZ:
  2092. sample_rate_val = 0;
  2093. break;
  2094. case SAMPLING_RATE_11P025KHZ:
  2095. sample_rate_val = 1;
  2096. break;
  2097. case SAMPLING_RATE_16KHZ:
  2098. sample_rate_val = 2;
  2099. break;
  2100. case SAMPLING_RATE_22P05KHZ:
  2101. sample_rate_val = 3;
  2102. break;
  2103. case SAMPLING_RATE_32KHZ:
  2104. sample_rate_val = 4;
  2105. break;
  2106. case SAMPLING_RATE_44P1KHZ:
  2107. sample_rate_val = 5;
  2108. break;
  2109. case SAMPLING_RATE_48KHZ:
  2110. sample_rate_val = 6;
  2111. break;
  2112. case SAMPLING_RATE_88P2KHZ:
  2113. sample_rate_val = 7;
  2114. break;
  2115. case SAMPLING_RATE_96KHZ:
  2116. sample_rate_val = 8;
  2117. break;
  2118. case SAMPLING_RATE_176P4KHZ:
  2119. sample_rate_val = 9;
  2120. break;
  2121. case SAMPLING_RATE_192KHZ:
  2122. sample_rate_val = 10;
  2123. break;
  2124. case SAMPLING_RATE_352P8KHZ:
  2125. sample_rate_val = 11;
  2126. break;
  2127. case SAMPLING_RATE_384KHZ:
  2128. sample_rate_val = 12;
  2129. break;
  2130. default:
  2131. sample_rate_val = 6;
  2132. break;
  2133. }
  2134. return sample_rate_val;
  2135. }
  2136. static int cdc_dma_get_sample_rate(int value)
  2137. {
  2138. int sample_rate = 0;
  2139. switch (value) {
  2140. case 0:
  2141. sample_rate = SAMPLING_RATE_8KHZ;
  2142. break;
  2143. case 1:
  2144. sample_rate = SAMPLING_RATE_11P025KHZ;
  2145. break;
  2146. case 2:
  2147. sample_rate = SAMPLING_RATE_16KHZ;
  2148. break;
  2149. case 3:
  2150. sample_rate = SAMPLING_RATE_22P05KHZ;
  2151. break;
  2152. case 4:
  2153. sample_rate = SAMPLING_RATE_32KHZ;
  2154. break;
  2155. case 5:
  2156. sample_rate = SAMPLING_RATE_44P1KHZ;
  2157. break;
  2158. case 6:
  2159. sample_rate = SAMPLING_RATE_48KHZ;
  2160. break;
  2161. case 7:
  2162. sample_rate = SAMPLING_RATE_88P2KHZ;
  2163. break;
  2164. case 8:
  2165. sample_rate = SAMPLING_RATE_96KHZ;
  2166. break;
  2167. case 9:
  2168. sample_rate = SAMPLING_RATE_176P4KHZ;
  2169. break;
  2170. case 10:
  2171. sample_rate = SAMPLING_RATE_192KHZ;
  2172. break;
  2173. case 11:
  2174. sample_rate = SAMPLING_RATE_352P8KHZ;
  2175. break;
  2176. case 12:
  2177. sample_rate = SAMPLING_RATE_384KHZ;
  2178. break;
  2179. default:
  2180. sample_rate = SAMPLING_RATE_48KHZ;
  2181. break;
  2182. }
  2183. return sample_rate;
  2184. }
  2185. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2186. struct snd_ctl_elem_value *ucontrol)
  2187. {
  2188. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2189. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2190. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2191. return ch_num;
  2192. }
  2193. ucontrol->value.enumerated.item[0] =
  2194. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  2195. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  2196. cdc_dma_rx_cfg[ch_num].sample_rate);
  2197. return 0;
  2198. }
  2199. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2200. struct snd_ctl_elem_value *ucontrol)
  2201. {
  2202. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2203. if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
  2204. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2205. return ch_num;
  2206. }
  2207. cdc_dma_rx_cfg[ch_num].sample_rate =
  2208. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2209. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  2210. __func__, ucontrol->value.enumerated.item[0],
  2211. cdc_dma_rx_cfg[ch_num].sample_rate);
  2212. return 0;
  2213. }
  2214. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  2215. struct snd_ctl_elem_value *ucontrol)
  2216. {
  2217. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2218. if (ch_num < 0) {
  2219. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2220. return ch_num;
  2221. }
  2222. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2223. cdc_dma_tx_cfg[ch_num].channels);
  2224. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  2225. return 0;
  2226. }
  2227. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  2228. struct snd_ctl_elem_value *ucontrol)
  2229. {
  2230. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2231. if (ch_num < 0) {
  2232. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2233. return ch_num;
  2234. }
  2235. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  2236. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  2237. cdc_dma_tx_cfg[ch_num].channels);
  2238. return 1;
  2239. }
  2240. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2241. struct snd_ctl_elem_value *ucontrol)
  2242. {
  2243. int sample_rate_val;
  2244. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2245. if (ch_num < 0) {
  2246. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2247. return ch_num;
  2248. }
  2249. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  2250. case SAMPLING_RATE_384KHZ:
  2251. sample_rate_val = 12;
  2252. break;
  2253. case SAMPLING_RATE_352P8KHZ:
  2254. sample_rate_val = 11;
  2255. break;
  2256. case SAMPLING_RATE_192KHZ:
  2257. sample_rate_val = 10;
  2258. break;
  2259. case SAMPLING_RATE_176P4KHZ:
  2260. sample_rate_val = 9;
  2261. break;
  2262. case SAMPLING_RATE_96KHZ:
  2263. sample_rate_val = 8;
  2264. break;
  2265. case SAMPLING_RATE_88P2KHZ:
  2266. sample_rate_val = 7;
  2267. break;
  2268. case SAMPLING_RATE_48KHZ:
  2269. sample_rate_val = 6;
  2270. break;
  2271. case SAMPLING_RATE_44P1KHZ:
  2272. sample_rate_val = 5;
  2273. break;
  2274. case SAMPLING_RATE_32KHZ:
  2275. sample_rate_val = 4;
  2276. break;
  2277. case SAMPLING_RATE_22P05KHZ:
  2278. sample_rate_val = 3;
  2279. break;
  2280. case SAMPLING_RATE_16KHZ:
  2281. sample_rate_val = 2;
  2282. break;
  2283. case SAMPLING_RATE_11P025KHZ:
  2284. sample_rate_val = 1;
  2285. break;
  2286. case SAMPLING_RATE_8KHZ:
  2287. sample_rate_val = 0;
  2288. break;
  2289. default:
  2290. sample_rate_val = 6;
  2291. break;
  2292. }
  2293. ucontrol->value.integer.value[0] = sample_rate_val;
  2294. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  2295. cdc_dma_tx_cfg[ch_num].sample_rate);
  2296. return 0;
  2297. }
  2298. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2299. struct snd_ctl_elem_value *ucontrol)
  2300. {
  2301. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2302. if (ch_num < 0) {
  2303. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2304. return ch_num;
  2305. }
  2306. switch (ucontrol->value.integer.value[0]) {
  2307. case 12:
  2308. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  2309. break;
  2310. case 11:
  2311. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  2312. break;
  2313. case 10:
  2314. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  2315. break;
  2316. case 9:
  2317. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  2318. break;
  2319. case 8:
  2320. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  2321. break;
  2322. case 7:
  2323. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  2324. break;
  2325. case 6:
  2326. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2327. break;
  2328. case 5:
  2329. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  2330. break;
  2331. case 4:
  2332. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  2333. break;
  2334. case 3:
  2335. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  2336. break;
  2337. case 2:
  2338. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  2339. break;
  2340. case 1:
  2341. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  2342. break;
  2343. case 0:
  2344. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  2345. break;
  2346. default:
  2347. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  2348. break;
  2349. }
  2350. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  2351. __func__, ucontrol->value.integer.value[0],
  2352. cdc_dma_tx_cfg[ch_num].sample_rate);
  2353. return 0;
  2354. }
  2355. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  2356. struct snd_ctl_elem_value *ucontrol)
  2357. {
  2358. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2359. if (ch_num < 0) {
  2360. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2361. return ch_num;
  2362. }
  2363. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  2364. case SNDRV_PCM_FORMAT_S32_LE:
  2365. ucontrol->value.integer.value[0] = 3;
  2366. break;
  2367. case SNDRV_PCM_FORMAT_S24_3LE:
  2368. ucontrol->value.integer.value[0] = 2;
  2369. break;
  2370. case SNDRV_PCM_FORMAT_S24_LE:
  2371. ucontrol->value.integer.value[0] = 1;
  2372. break;
  2373. case SNDRV_PCM_FORMAT_S16_LE:
  2374. default:
  2375. ucontrol->value.integer.value[0] = 0;
  2376. break;
  2377. }
  2378. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2379. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2380. ucontrol->value.integer.value[0]);
  2381. return 0;
  2382. }
  2383. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  2384. struct snd_ctl_elem_value *ucontrol)
  2385. {
  2386. int rc = 0;
  2387. int ch_num = cdc_dma_get_port_idx(kcontrol);
  2388. if (ch_num < 0) {
  2389. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  2390. return ch_num;
  2391. }
  2392. switch (ucontrol->value.integer.value[0]) {
  2393. case 3:
  2394. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  2395. break;
  2396. case 2:
  2397. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2398. break;
  2399. case 1:
  2400. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2401. break;
  2402. case 0:
  2403. default:
  2404. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2405. break;
  2406. }
  2407. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  2408. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  2409. ucontrol->value.integer.value[0]);
  2410. return rc;
  2411. }
  2412. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  2413. {
  2414. int idx = 0;
  2415. switch (be_id) {
  2416. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  2417. idx = WSA_CDC_DMA_RX_0;
  2418. break;
  2419. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  2420. idx = WSA_CDC_DMA_TX_0;
  2421. break;
  2422. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  2423. idx = WSA_CDC_DMA_RX_1;
  2424. break;
  2425. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  2426. idx = WSA_CDC_DMA_TX_1;
  2427. break;
  2428. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  2429. idx = WSA_CDC_DMA_TX_2;
  2430. break;
  2431. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  2432. idx = RX_CDC_DMA_RX_0;
  2433. break;
  2434. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  2435. idx = RX_CDC_DMA_RX_1;
  2436. break;
  2437. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  2438. idx = RX_CDC_DMA_RX_2;
  2439. break;
  2440. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  2441. idx = RX_CDC_DMA_RX_3;
  2442. break;
  2443. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  2444. idx = RX_CDC_DMA_RX_5;
  2445. break;
  2446. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  2447. idx = TX_CDC_DMA_TX_0;
  2448. break;
  2449. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  2450. idx = TX_CDC_DMA_TX_3;
  2451. break;
  2452. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  2453. idx = TX_CDC_DMA_TX_4;
  2454. break;
  2455. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  2456. idx = VA_CDC_DMA_TX_0;
  2457. break;
  2458. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  2459. idx = VA_CDC_DMA_TX_1;
  2460. break;
  2461. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  2462. idx = VA_CDC_DMA_TX_2;
  2463. break;
  2464. default:
  2465. idx = RX_CDC_DMA_RX_0;
  2466. break;
  2467. }
  2468. return idx;
  2469. }
  2470. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  2471. struct snd_ctl_elem_value *ucontrol)
  2472. {
  2473. /*
  2474. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  2475. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  2476. * value.
  2477. */
  2478. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2479. case SAMPLING_RATE_96KHZ:
  2480. ucontrol->value.integer.value[0] = 5;
  2481. break;
  2482. case SAMPLING_RATE_88P2KHZ:
  2483. ucontrol->value.integer.value[0] = 4;
  2484. break;
  2485. case SAMPLING_RATE_48KHZ:
  2486. ucontrol->value.integer.value[0] = 3;
  2487. break;
  2488. case SAMPLING_RATE_44P1KHZ:
  2489. ucontrol->value.integer.value[0] = 2;
  2490. break;
  2491. case SAMPLING_RATE_16KHZ:
  2492. ucontrol->value.integer.value[0] = 1;
  2493. break;
  2494. case SAMPLING_RATE_8KHZ:
  2495. default:
  2496. ucontrol->value.integer.value[0] = 0;
  2497. break;
  2498. }
  2499. pr_debug("%s: sample rate = %d\n", __func__,
  2500. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2501. return 0;
  2502. }
  2503. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  2504. struct snd_ctl_elem_value *ucontrol)
  2505. {
  2506. switch (ucontrol->value.integer.value[0]) {
  2507. case 1:
  2508. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2509. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2510. break;
  2511. case 2:
  2512. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2513. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2514. break;
  2515. case 3:
  2516. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2517. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2518. break;
  2519. case 4:
  2520. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2521. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2522. break;
  2523. case 5:
  2524. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2525. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2526. break;
  2527. case 0:
  2528. default:
  2529. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2530. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2531. break;
  2532. }
  2533. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  2534. __func__,
  2535. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2536. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2537. ucontrol->value.enumerated.item[0]);
  2538. return 0;
  2539. }
  2540. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  2541. struct snd_ctl_elem_value *ucontrol)
  2542. {
  2543. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  2544. case SAMPLING_RATE_96KHZ:
  2545. ucontrol->value.integer.value[0] = 5;
  2546. break;
  2547. case SAMPLING_RATE_88P2KHZ:
  2548. ucontrol->value.integer.value[0] = 4;
  2549. break;
  2550. case SAMPLING_RATE_48KHZ:
  2551. ucontrol->value.integer.value[0] = 3;
  2552. break;
  2553. case SAMPLING_RATE_44P1KHZ:
  2554. ucontrol->value.integer.value[0] = 2;
  2555. break;
  2556. case SAMPLING_RATE_16KHZ:
  2557. ucontrol->value.integer.value[0] = 1;
  2558. break;
  2559. case SAMPLING_RATE_8KHZ:
  2560. default:
  2561. ucontrol->value.integer.value[0] = 0;
  2562. break;
  2563. }
  2564. pr_debug("%s: sample rate rx = %d\n", __func__,
  2565. slim_rx_cfg[SLIM_RX_7].sample_rate);
  2566. return 0;
  2567. }
  2568. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  2569. struct snd_ctl_elem_value *ucontrol)
  2570. {
  2571. switch (ucontrol->value.integer.value[0]) {
  2572. case 1:
  2573. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2574. break;
  2575. case 2:
  2576. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2577. break;
  2578. case 3:
  2579. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2580. break;
  2581. case 4:
  2582. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2583. break;
  2584. case 5:
  2585. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2586. break;
  2587. case 0:
  2588. default:
  2589. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2590. break;
  2591. }
  2592. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  2593. __func__,
  2594. slim_rx_cfg[SLIM_RX_7].sample_rate,
  2595. ucontrol->value.enumerated.item[0]);
  2596. return 0;
  2597. }
  2598. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  2599. struct snd_ctl_elem_value *ucontrol)
  2600. {
  2601. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  2602. case SAMPLING_RATE_96KHZ:
  2603. ucontrol->value.integer.value[0] = 5;
  2604. break;
  2605. case SAMPLING_RATE_88P2KHZ:
  2606. ucontrol->value.integer.value[0] = 4;
  2607. break;
  2608. case SAMPLING_RATE_48KHZ:
  2609. ucontrol->value.integer.value[0] = 3;
  2610. break;
  2611. case SAMPLING_RATE_44P1KHZ:
  2612. ucontrol->value.integer.value[0] = 2;
  2613. break;
  2614. case SAMPLING_RATE_16KHZ:
  2615. ucontrol->value.integer.value[0] = 1;
  2616. break;
  2617. case SAMPLING_RATE_8KHZ:
  2618. default:
  2619. ucontrol->value.integer.value[0] = 0;
  2620. break;
  2621. }
  2622. pr_debug("%s: sample rate tx = %d\n", __func__,
  2623. slim_tx_cfg[SLIM_TX_7].sample_rate);
  2624. return 0;
  2625. }
  2626. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  2627. struct snd_ctl_elem_value *ucontrol)
  2628. {
  2629. switch (ucontrol->value.integer.value[0]) {
  2630. case 1:
  2631. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  2632. break;
  2633. case 2:
  2634. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  2635. break;
  2636. case 3:
  2637. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  2638. break;
  2639. case 4:
  2640. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  2641. break;
  2642. case 5:
  2643. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  2644. break;
  2645. case 0:
  2646. default:
  2647. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  2648. break;
  2649. }
  2650. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  2651. __func__,
  2652. slim_tx_cfg[SLIM_TX_7].sample_rate,
  2653. ucontrol->value.enumerated.item[0]);
  2654. return 0;
  2655. }
  2656. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2657. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2658. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2659. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2660. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2661. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2662. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2663. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2664. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2665. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2666. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2667. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2668. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2669. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2670. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2671. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2672. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2673. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2674. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2675. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2676. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2677. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2678. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2679. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2680. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2681. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2682. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2683. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
  2684. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2685. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
  2686. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2687. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
  2688. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2689. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2690. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2691. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2692. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2693. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2694. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2695. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2696. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2697. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2698. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2699. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2700. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2701. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2702. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2703. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2704. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2705. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2706. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2707. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2708. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2709. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2710. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2711. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2712. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2713. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
  2714. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2715. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
  2716. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2717. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
  2718. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2719. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2720. wsa_cdc_dma_rx_0_sample_rate,
  2721. cdc_dma_rx_sample_rate_get,
  2722. cdc_dma_rx_sample_rate_put),
  2723. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2724. wsa_cdc_dma_rx_1_sample_rate,
  2725. cdc_dma_rx_sample_rate_get,
  2726. cdc_dma_rx_sample_rate_put),
  2727. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2728. rx_cdc_dma_rx_0_sample_rate,
  2729. cdc_dma_rx_sample_rate_get,
  2730. cdc_dma_rx_sample_rate_put),
  2731. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2732. rx_cdc_dma_rx_1_sample_rate,
  2733. cdc_dma_rx_sample_rate_get,
  2734. cdc_dma_rx_sample_rate_put),
  2735. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2736. rx_cdc_dma_rx_2_sample_rate,
  2737. cdc_dma_rx_sample_rate_get,
  2738. cdc_dma_rx_sample_rate_put),
  2739. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2740. rx_cdc_dma_rx_3_sample_rate,
  2741. cdc_dma_rx_sample_rate_get,
  2742. cdc_dma_rx_sample_rate_put),
  2743. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2744. rx_cdc_dma_rx_5_sample_rate,
  2745. cdc_dma_rx_sample_rate_get,
  2746. cdc_dma_rx_sample_rate_put),
  2747. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2748. wsa_cdc_dma_tx_0_sample_rate,
  2749. cdc_dma_tx_sample_rate_get,
  2750. cdc_dma_tx_sample_rate_put),
  2751. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2752. wsa_cdc_dma_tx_1_sample_rate,
  2753. cdc_dma_tx_sample_rate_get,
  2754. cdc_dma_tx_sample_rate_put),
  2755. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2756. wsa_cdc_dma_tx_2_sample_rate,
  2757. cdc_dma_tx_sample_rate_get,
  2758. cdc_dma_tx_sample_rate_put),
  2759. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2760. tx_cdc_dma_tx_0_sample_rate,
  2761. cdc_dma_tx_sample_rate_get,
  2762. cdc_dma_tx_sample_rate_put),
  2763. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2764. tx_cdc_dma_tx_3_sample_rate,
  2765. cdc_dma_tx_sample_rate_get,
  2766. cdc_dma_tx_sample_rate_put),
  2767. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  2768. tx_cdc_dma_tx_4_sample_rate,
  2769. cdc_dma_tx_sample_rate_get,
  2770. cdc_dma_tx_sample_rate_put),
  2771. SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
  2772. va_cdc_dma_tx_0_sample_rate,
  2773. cdc_dma_tx_sample_rate_get,
  2774. cdc_dma_tx_sample_rate_put),
  2775. SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
  2776. va_cdc_dma_tx_1_sample_rate,
  2777. cdc_dma_tx_sample_rate_get,
  2778. cdc_dma_tx_sample_rate_put),
  2779. SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
  2780. va_cdc_dma_tx_2_sample_rate,
  2781. cdc_dma_tx_sample_rate_get,
  2782. cdc_dma_tx_sample_rate_put),
  2783. };
  2784. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  2785. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  2786. usb_audio_rx_sample_rate_get,
  2787. usb_audio_rx_sample_rate_put),
  2788. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  2789. usb_audio_tx_sample_rate_get,
  2790. usb_audio_tx_sample_rate_put),
  2791. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2792. tdm_rx_sample_rate_get,
  2793. tdm_rx_sample_rate_put),
  2794. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2795. tdm_rx_sample_rate_get,
  2796. tdm_rx_sample_rate_put),
  2797. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  2798. tdm_rx_sample_rate_get,
  2799. tdm_rx_sample_rate_put),
  2800. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2801. tdm_tx_sample_rate_get,
  2802. tdm_tx_sample_rate_put),
  2803. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2804. tdm_tx_sample_rate_get,
  2805. tdm_tx_sample_rate_put),
  2806. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  2807. tdm_tx_sample_rate_get,
  2808. tdm_tx_sample_rate_put),
  2809. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2810. aux_pcm_rx_sample_rate_get,
  2811. aux_pcm_rx_sample_rate_put),
  2812. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  2813. aux_pcm_rx_sample_rate_get,
  2814. aux_pcm_rx_sample_rate_put),
  2815. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  2816. aux_pcm_rx_sample_rate_get,
  2817. aux_pcm_rx_sample_rate_put),
  2818. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2819. aux_pcm_tx_sample_rate_get,
  2820. aux_pcm_tx_sample_rate_put),
  2821. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  2822. aux_pcm_tx_sample_rate_get,
  2823. aux_pcm_tx_sample_rate_put),
  2824. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  2825. aux_pcm_tx_sample_rate_get,
  2826. aux_pcm_tx_sample_rate_put),
  2827. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  2828. mi2s_rx_sample_rate_get,
  2829. mi2s_rx_sample_rate_put),
  2830. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  2831. mi2s_rx_sample_rate_get,
  2832. mi2s_rx_sample_rate_put),
  2833. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  2834. mi2s_rx_sample_rate_get,
  2835. mi2s_rx_sample_rate_put),
  2836. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  2837. mi2s_tx_sample_rate_get,
  2838. mi2s_tx_sample_rate_put),
  2839. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  2840. mi2s_tx_sample_rate_get,
  2841. mi2s_tx_sample_rate_put),
  2842. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  2843. mi2s_tx_sample_rate_get,
  2844. mi2s_tx_sample_rate_put),
  2845. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  2846. usb_audio_rx_format_get, usb_audio_rx_format_put),
  2847. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  2848. usb_audio_tx_format_get, usb_audio_tx_format_put),
  2849. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  2850. tdm_rx_format_get,
  2851. tdm_rx_format_put),
  2852. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  2853. tdm_rx_format_get,
  2854. tdm_rx_format_put),
  2855. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  2856. tdm_rx_format_get,
  2857. tdm_rx_format_put),
  2858. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  2859. tdm_tx_format_get,
  2860. tdm_tx_format_put),
  2861. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  2862. tdm_tx_format_get,
  2863. tdm_tx_format_put),
  2864. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  2865. tdm_tx_format_get,
  2866. tdm_tx_format_put),
  2867. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2868. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2869. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  2870. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2871. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  2872. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2873. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2874. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2875. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  2876. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2877. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  2878. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2879. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  2880. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2881. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  2882. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2883. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  2884. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  2885. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  2886. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2887. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  2888. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2889. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  2890. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  2891. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  2892. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  2893. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  2894. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  2895. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  2896. proxy_rx_ch_get, proxy_rx_ch_put),
  2897. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  2898. tdm_rx_ch_get,
  2899. tdm_rx_ch_put),
  2900. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  2901. tdm_rx_ch_get,
  2902. tdm_rx_ch_put),
  2903. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  2904. tdm_rx_ch_get,
  2905. tdm_rx_ch_put),
  2906. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  2907. tdm_tx_ch_get,
  2908. tdm_tx_ch_put),
  2909. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  2910. tdm_tx_ch_get,
  2911. tdm_tx_ch_put),
  2912. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  2913. tdm_tx_ch_get,
  2914. tdm_tx_ch_put),
  2915. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  2916. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2917. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  2918. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2919. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  2920. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  2921. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  2922. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2923. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  2924. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2925. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  2926. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  2927. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  2928. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  2929. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  2930. ext_disp_rx_format_get, ext_disp_rx_format_put),
  2931. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  2932. ext_disp_rx_sample_rate_get,
  2933. ext_disp_rx_sample_rate_put),
  2934. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  2935. msm_bt_sample_rate_get,
  2936. msm_bt_sample_rate_put),
  2937. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  2938. msm_bt_sample_rate_rx_get,
  2939. msm_bt_sample_rate_rx_put),
  2940. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  2941. msm_bt_sample_rate_tx_get,
  2942. msm_bt_sample_rate_tx_put),
  2943. };
  2944. static const struct snd_kcontrol_new msm_snd_controls[] = {
  2945. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  2946. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  2947. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  2948. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  2949. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  2950. aux_pcm_rx_sample_rate_get,
  2951. aux_pcm_rx_sample_rate_put),
  2952. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  2953. aux_pcm_tx_sample_rate_get,
  2954. aux_pcm_tx_sample_rate_put),
  2955. };
  2956. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  2957. {
  2958. int idx;
  2959. switch (be_id) {
  2960. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  2961. idx = EXT_DISP_RX_IDX_DP;
  2962. break;
  2963. default:
  2964. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  2965. idx = -EINVAL;
  2966. break;
  2967. }
  2968. return idx;
  2969. }
  2970. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  2971. struct snd_pcm_hw_params *params)
  2972. {
  2973. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  2974. struct snd_interval *rate = hw_param_interval(params,
  2975. SNDRV_PCM_HW_PARAM_RATE);
  2976. struct snd_interval *channels = hw_param_interval(params,
  2977. SNDRV_PCM_HW_PARAM_CHANNELS);
  2978. int idx, rc = 0;
  2979. pr_debug("%s: format = %d, rate = %d\n",
  2980. __func__, params_format(params), params_rate(params));
  2981. switch (dai_link->id) {
  2982. case MSM_BACKEND_DAI_USB_RX:
  2983. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2984. usb_rx_cfg.bit_format);
  2985. rate->min = rate->max = usb_rx_cfg.sample_rate;
  2986. channels->min = channels->max = usb_rx_cfg.channels;
  2987. break;
  2988. case MSM_BACKEND_DAI_USB_TX:
  2989. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  2990. usb_tx_cfg.bit_format);
  2991. rate->min = rate->max = usb_tx_cfg.sample_rate;
  2992. channels->min = channels->max = usb_tx_cfg.channels;
  2993. break;
  2994. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  2995. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  2996. if (idx < 0) {
  2997. pr_err("%s: Incorrect ext disp idx %d\n",
  2998. __func__, idx);
  2999. rc = idx;
  3000. goto done;
  3001. }
  3002. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3003. ext_disp_rx_cfg[idx].bit_format);
  3004. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3005. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3006. break;
  3007. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3008. channels->min = channels->max = proxy_rx_cfg.channels;
  3009. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3010. break;
  3011. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3012. channels->min = channels->max =
  3013. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3014. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3015. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3016. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3017. break;
  3018. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3019. channels->min = channels->max =
  3020. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3021. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3022. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3023. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3024. break;
  3025. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3026. channels->min = channels->max =
  3027. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3028. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3029. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3030. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3031. break;
  3032. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3033. channels->min = channels->max =
  3034. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3035. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3036. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3037. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3038. break;
  3039. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3040. channels->min = channels->max =
  3041. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3042. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3043. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3044. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3045. break;
  3046. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3047. channels->min = channels->max =
  3048. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3049. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3050. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3051. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3052. break;
  3053. case MSM_BACKEND_DAI_AUXPCM_RX:
  3054. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3055. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3056. rate->min = rate->max =
  3057. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3058. channels->min = channels->max =
  3059. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3060. break;
  3061. case MSM_BACKEND_DAI_AUXPCM_TX:
  3062. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3063. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3064. rate->min = rate->max =
  3065. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3066. channels->min = channels->max =
  3067. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3068. break;
  3069. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3070. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3071. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3072. rate->min = rate->max =
  3073. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3074. channels->min = channels->max =
  3075. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3076. break;
  3077. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3078. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3079. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3080. rate->min = rate->max =
  3081. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3082. channels->min = channels->max =
  3083. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3084. break;
  3085. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3086. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3087. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3088. rate->min = rate->max =
  3089. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3090. channels->min = channels->max =
  3091. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3092. break;
  3093. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3094. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3095. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3096. rate->min = rate->max =
  3097. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3098. channels->min = channels->max =
  3099. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3100. break;
  3101. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3102. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3103. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3104. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3105. channels->min = channels->max =
  3106. mi2s_rx_cfg[PRIM_MI2S].channels;
  3107. break;
  3108. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3109. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3110. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3111. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3112. channels->min = channels->max =
  3113. mi2s_tx_cfg[PRIM_MI2S].channels;
  3114. break;
  3115. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3116. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3117. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3118. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3119. channels->min = channels->max =
  3120. mi2s_rx_cfg[SEC_MI2S].channels;
  3121. break;
  3122. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3123. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3124. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3125. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3126. channels->min = channels->max =
  3127. mi2s_tx_cfg[SEC_MI2S].channels;
  3128. break;
  3129. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3130. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3131. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3132. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3133. channels->min = channels->max =
  3134. mi2s_rx_cfg[TERT_MI2S].channels;
  3135. break;
  3136. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3137. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3138. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3139. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3140. channels->min = channels->max =
  3141. mi2s_tx_cfg[TERT_MI2S].channels;
  3142. break;
  3143. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3144. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3145. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3146. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3147. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3148. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3149. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3150. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3151. cdc_dma_rx_cfg[idx].bit_format);
  3152. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3153. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3154. break;
  3155. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3156. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3157. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3158. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3159. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3160. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3161. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3162. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3163. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3164. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3165. cdc_dma_tx_cfg[idx].bit_format);
  3166. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3167. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3168. break;
  3169. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3170. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3171. SNDRV_PCM_FORMAT_S32_LE);
  3172. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3173. channels->min = channels->max = msm_vi_feed_tx_ch;
  3174. break;
  3175. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3176. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3177. slim_rx_cfg[SLIM_RX_7].bit_format);
  3178. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3179. channels->min = channels->max =
  3180. slim_rx_cfg[SLIM_RX_7].channels;
  3181. break;
  3182. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3183. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3184. channels->min = channels->max =
  3185. slim_tx_cfg[SLIM_TX_7].channels;
  3186. break;
  3187. default:
  3188. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3189. break;
  3190. }
  3191. done:
  3192. return rc;
  3193. }
  3194. static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3195. {
  3196. struct snd_soc_card *card = component->card;
  3197. struct msm_asoc_mach_data *pdata =
  3198. snd_soc_card_get_drvdata(card);
  3199. if (!pdata->fsa_handle)
  3200. return false;
  3201. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  3202. }
  3203. static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
  3204. {
  3205. int value = 0;
  3206. bool ret = false;
  3207. struct snd_soc_card *card;
  3208. struct msm_asoc_mach_data *pdata;
  3209. if (!component) {
  3210. pr_err("%s component is NULL\n", __func__);
  3211. return false;
  3212. }
  3213. card = component->card;
  3214. pdata = snd_soc_card_get_drvdata(card);
  3215. if (!pdata)
  3216. return false;
  3217. if (wcd_mbhc_cfg.enable_usbc_analog)
  3218. return msm_usbc_swap_gnd_mic(component, active);
  3219. /* if usbc is not defined, swap using us_euro_gpio_p */
  3220. if (pdata->us_euro_gpio_p) {
  3221. value = msm_cdc_pinctrl_get_state(
  3222. pdata->us_euro_gpio_p);
  3223. if (value)
  3224. msm_cdc_pinctrl_select_sleep_state(
  3225. pdata->us_euro_gpio_p);
  3226. else
  3227. msm_cdc_pinctrl_select_active_state(
  3228. pdata->us_euro_gpio_p);
  3229. dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
  3230. __func__, value, !value);
  3231. ret = true;
  3232. }
  3233. return ret;
  3234. }
  3235. static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  3236. struct snd_pcm_hw_params *params)
  3237. {
  3238. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3239. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3240. int ret = 0;
  3241. int slot_width = 32;
  3242. int channels, slots;
  3243. unsigned int slot_mask, rate, clk_freq;
  3244. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  3245. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  3246. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  3247. switch (cpu_dai->id) {
  3248. case AFE_PORT_ID_PRIMARY_TDM_RX:
  3249. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3250. break;
  3251. case AFE_PORT_ID_SECONDARY_TDM_RX:
  3252. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3253. break;
  3254. case AFE_PORT_ID_TERTIARY_TDM_RX:
  3255. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3256. break;
  3257. case AFE_PORT_ID_PRIMARY_TDM_TX:
  3258. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3259. break;
  3260. case AFE_PORT_ID_SECONDARY_TDM_TX:
  3261. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3262. break;
  3263. case AFE_PORT_ID_TERTIARY_TDM_TX:
  3264. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3265. break;
  3266. default:
  3267. pr_err("%s: dai id 0x%x not supported\n",
  3268. __func__, cpu_dai->id);
  3269. return -EINVAL;
  3270. }
  3271. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3272. /*2 slot config - bits 0 and 1 set for the first two slots */
  3273. slot_mask = 0x0000FFFF >> (16 - slots);
  3274. channels = slots;
  3275. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  3276. __func__, slot_width, slots);
  3277. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  3278. slots, slot_width);
  3279. if (ret < 0) {
  3280. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  3281. __func__, ret);
  3282. goto end;
  3283. }
  3284. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3285. 0, NULL, channels, slot_offset);
  3286. if (ret < 0) {
  3287. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  3288. __func__, ret);
  3289. goto end;
  3290. }
  3291. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  3292. /*2 slot config - bits 0 and 1 set for the first two slots */
  3293. slot_mask = 0x0000FFFF >> (16 - slots);
  3294. channels = slots;
  3295. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  3296. __func__, slot_width, slots);
  3297. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  3298. slots, slot_width);
  3299. if (ret < 0) {
  3300. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  3301. __func__, ret);
  3302. goto end;
  3303. }
  3304. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3305. channels, slot_offset, 0, NULL);
  3306. if (ret < 0) {
  3307. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  3308. __func__, ret);
  3309. goto end;
  3310. }
  3311. } else {
  3312. ret = -EINVAL;
  3313. pr_err("%s: invalid use case, err:%d\n",
  3314. __func__, ret);
  3315. goto end;
  3316. }
  3317. rate = params_rate(params);
  3318. clk_freq = rate * slot_width * slots;
  3319. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  3320. if (ret < 0)
  3321. pr_err("%s: failed to set tdm clk, err:%d\n",
  3322. __func__, ret);
  3323. end:
  3324. return ret;
  3325. }
  3326. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  3327. struct snd_pcm_hw_params *params)
  3328. {
  3329. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3330. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3331. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3332. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3333. int ret = 0;
  3334. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  3335. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3336. u32 user_set_tx_ch = 0;
  3337. u32 user_set_rx_ch = 0;
  3338. u32 ch_id;
  3339. ret = snd_soc_dai_get_channel_map(codec_dai,
  3340. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  3341. &rx_ch_cdc_dma);
  3342. if (ret < 0) {
  3343. pr_err("%s: failed to get codec chan map, err:%d\n",
  3344. __func__, ret);
  3345. goto err;
  3346. }
  3347. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  3348. switch (dai_link->id) {
  3349. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3350. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3351. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3352. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3353. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3354. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3355. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  3356. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3357. {
  3358. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3359. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  3360. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  3361. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  3362. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  3363. user_set_rx_ch, &rx_ch_cdc_dma);
  3364. if (ret < 0) {
  3365. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3366. __func__, ret);
  3367. goto err;
  3368. }
  3369. }
  3370. break;
  3371. }
  3372. } else {
  3373. switch (dai_link->id) {
  3374. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3375. {
  3376. user_set_tx_ch = msm_vi_feed_tx_ch;
  3377. }
  3378. break;
  3379. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3380. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3381. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3382. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3383. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3384. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
  3385. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
  3386. case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
  3387. {
  3388. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3389. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  3390. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  3391. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  3392. }
  3393. break;
  3394. }
  3395. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  3396. &tx_ch_cdc_dma, 0, 0);
  3397. if (ret < 0) {
  3398. pr_err("%s: failed to set cpu chan map, err:%d\n",
  3399. __func__, ret);
  3400. goto err;
  3401. }
  3402. }
  3403. err:
  3404. return ret;
  3405. }
  3406. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  3407. {
  3408. cpumask_t mask;
  3409. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  3410. pm_qos_remove_request(&substream->latency_pm_qos_req);
  3411. cpumask_clear(&mask);
  3412. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  3413. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  3414. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  3415. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  3416. pm_qos_add_request(&substream->latency_pm_qos_req,
  3417. PM_QOS_CPU_DMA_LATENCY,
  3418. MSM_LL_QOS_VALUE);
  3419. return 0;
  3420. }
  3421. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  3422. {
  3423. int ret = 0;
  3424. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3425. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3426. int index = cpu_dai->id;
  3427. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  3428. dev_dbg(rtd->card->dev,
  3429. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  3430. __func__, substream->name, substream->stream,
  3431. cpu_dai->name, cpu_dai->id);
  3432. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3433. ret = -EINVAL;
  3434. dev_err(rtd->card->dev,
  3435. "%s: CPU DAI id (%d) out of range\n",
  3436. __func__, cpu_dai->id);
  3437. goto err;
  3438. }
  3439. /*
  3440. * Mutex protection in case the same MI2S
  3441. * interface using for both TX and RX so
  3442. * that the same clock won't be enable twice.
  3443. */
  3444. mutex_lock(&mi2s_intf_conf[index].lock);
  3445. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  3446. /* Check if msm needs to provide the clock to the interface */
  3447. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  3448. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  3449. fmt = SND_SOC_DAIFMT_CBM_CFM;
  3450. }
  3451. ret = msm_mi2s_set_sclk(substream, true);
  3452. if (ret < 0) {
  3453. dev_err(rtd->card->dev,
  3454. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  3455. __func__, ret);
  3456. goto clean_up;
  3457. }
  3458. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  3459. if (ret < 0) {
  3460. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  3461. __func__, index, ret);
  3462. goto clk_off;
  3463. }
  3464. }
  3465. clk_off:
  3466. if (ret < 0)
  3467. msm_mi2s_set_sclk(substream, false);
  3468. clean_up:
  3469. if (ret < 0)
  3470. mi2s_intf_conf[index].ref_cnt--;
  3471. mutex_unlock(&mi2s_intf_conf[index].lock);
  3472. err:
  3473. return ret;
  3474. }
  3475. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  3476. {
  3477. int ret = 0;
  3478. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3479. int index = rtd->cpu_dai->id;
  3480. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  3481. substream->name, substream->stream);
  3482. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  3483. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  3484. return;
  3485. }
  3486. mutex_lock(&mi2s_intf_conf[index].lock);
  3487. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  3488. ret = msm_mi2s_set_sclk(substream, false);
  3489. if (ret < 0)
  3490. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  3491. __func__, index, ret);
  3492. }
  3493. mutex_unlock(&mi2s_intf_conf[index].lock);
  3494. }
  3495. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  3496. struct snd_pcm_hw_params *params)
  3497. {
  3498. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  3499. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3500. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  3501. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3502. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  3503. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  3504. int ret = 0;
  3505. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  3506. codec_dai->name, codec_dai->id);
  3507. ret = snd_soc_dai_get_channel_map(codec_dai,
  3508. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  3509. if (ret) {
  3510. dev_err(rtd->dev,
  3511. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  3512. __func__, ret);
  3513. goto err;
  3514. }
  3515. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  3516. __func__, tx_ch_cnt, dai_link->id);
  3517. ret = snd_soc_dai_set_channel_map(cpu_dai,
  3518. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  3519. if (ret)
  3520. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  3521. __func__, ret);
  3522. err:
  3523. return ret;
  3524. }
  3525. static struct snd_soc_ops kona_tdm_be_ops = {
  3526. .hw_params = kona_tdm_snd_hw_params,
  3527. };
  3528. static struct snd_soc_ops msm_mi2s_be_ops = {
  3529. .startup = msm_mi2s_snd_startup,
  3530. .shutdown = msm_mi2s_snd_shutdown,
  3531. };
  3532. static struct snd_soc_ops msm_fe_qos_ops = {
  3533. .prepare = msm_fe_qos_prepare,
  3534. };
  3535. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  3536. .hw_params = msm_snd_cdc_dma_hw_params,
  3537. };
  3538. static struct snd_soc_ops msm_wcn_ops = {
  3539. .hw_params = msm_wcn_hw_params,
  3540. };
  3541. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3542. struct snd_kcontrol *kcontrol, int event)
  3543. {
  3544. struct msm_asoc_mach_data *pdata = NULL;
  3545. struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
  3546. int ret = 0;
  3547. u32 dmic_idx;
  3548. int *dmic_gpio_cnt;
  3549. struct device_node *dmic_gpio;
  3550. char *wname;
  3551. wname = strpbrk(w->name, "012345");
  3552. if (!wname) {
  3553. dev_err(component->dev, "%s: widget not found\n", __func__);
  3554. return -EINVAL;
  3555. }
  3556. ret = kstrtouint(wname, 10, &dmic_idx);
  3557. if (ret < 0) {
  3558. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  3559. __func__);
  3560. return -EINVAL;
  3561. }
  3562. pdata = snd_soc_card_get_drvdata(component->card);
  3563. switch (dmic_idx) {
  3564. case 0:
  3565. case 1:
  3566. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3567. dmic_gpio = pdata->dmic01_gpio_p;
  3568. break;
  3569. case 2:
  3570. case 3:
  3571. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3572. dmic_gpio = pdata->dmic23_gpio_p;
  3573. break;
  3574. case 4:
  3575. case 5:
  3576. dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
  3577. dmic_gpio = pdata->dmic45_gpio_p;
  3578. break;
  3579. default:
  3580. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  3581. __func__);
  3582. return -EINVAL;
  3583. }
  3584. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3585. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3586. switch (event) {
  3587. case SND_SOC_DAPM_PRE_PMU:
  3588. (*dmic_gpio_cnt)++;
  3589. if (*dmic_gpio_cnt == 1) {
  3590. ret = msm_cdc_pinctrl_select_active_state(
  3591. dmic_gpio);
  3592. if (ret < 0) {
  3593. pr_err("%s: gpio set cannot be activated %sd",
  3594. __func__, "dmic_gpio");
  3595. return ret;
  3596. }
  3597. }
  3598. break;
  3599. case SND_SOC_DAPM_POST_PMD:
  3600. (*dmic_gpio_cnt)--;
  3601. if (*dmic_gpio_cnt == 0) {
  3602. ret = msm_cdc_pinctrl_select_sleep_state(
  3603. dmic_gpio);
  3604. if (ret < 0) {
  3605. pr_err("%s: gpio set cannot be de-activated %sd",
  3606. __func__, "dmic_gpio");
  3607. return ret;
  3608. }
  3609. }
  3610. break;
  3611. default:
  3612. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3613. return -EINVAL;
  3614. }
  3615. return 0;
  3616. }
  3617. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3618. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3619. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3620. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3621. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3622. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3623. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3624. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3625. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3626. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3627. SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
  3628. SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
  3629. };
  3630. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  3631. {
  3632. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  3633. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
  3634. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  3635. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  3636. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  3637. }
  3638. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  3639. {
  3640. int ret = -EINVAL;
  3641. struct snd_soc_component *component;
  3642. struct snd_soc_dapm_context *dapm;
  3643. struct snd_card *card;
  3644. struct snd_info_entry *entry;
  3645. struct snd_soc_component *aux_comp;
  3646. struct msm_asoc_mach_data *pdata =
  3647. snd_soc_card_get_drvdata(rtd->card);
  3648. component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
  3649. if (!component) {
  3650. pr_err("%s: could not find component for bolero_codec\n",
  3651. __func__);
  3652. return ret;
  3653. }
  3654. dapm = snd_soc_component_get_dapm(component);
  3655. ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
  3656. ARRAY_SIZE(msm_int_snd_controls));
  3657. if (ret < 0) {
  3658. pr_err("%s: add_component_controls failed: %d\n",
  3659. __func__, ret);
  3660. return ret;
  3661. }
  3662. ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
  3663. ARRAY_SIZE(msm_common_snd_controls));
  3664. if (ret < 0) {
  3665. pr_err("%s: add common snd controls failed: %d\n",
  3666. __func__, ret);
  3667. return ret;
  3668. }
  3669. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  3670. ARRAY_SIZE(msm_int_dapm_widgets));
  3671. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  3672. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  3673. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  3674. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  3675. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  3676. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  3677. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  3678. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  3679. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  3680. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  3681. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  3682. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  3683. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  3684. snd_soc_dapm_sync(dapm);
  3685. /*
  3686. * Send speaker configuration only for WSA8810.
  3687. * Default configuration is for WSA8815.
  3688. */
  3689. dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
  3690. __func__, rtd->card->num_aux_devs);
  3691. if (rtd->card->num_aux_devs &&
  3692. !list_empty(&rtd->card->component_dev_list)) {
  3693. aux_comp = list_first_entry(
  3694. &rtd->card->component_dev_list,
  3695. struct snd_soc_component,
  3696. card_aux_list);
  3697. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  3698. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  3699. wsa_macro_set_spkr_mode(component,
  3700. WSA_MACRO_SPKR_MODE_1);
  3701. wsa_macro_set_spkr_gain_offset(component,
  3702. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  3703. }
  3704. bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
  3705. sm_port_map);
  3706. }
  3707. card = rtd->card->snd_card;
  3708. if (!pdata->codec_root) {
  3709. entry = snd_info_create_subdir(card->module, "codecs",
  3710. card->proc_root);
  3711. if (!entry) {
  3712. pr_debug("%s: Cannot create codecs module entry\n",
  3713. __func__);
  3714. ret = 0;
  3715. goto err;
  3716. }
  3717. pdata->codec_root = entry;
  3718. }
  3719. bolero_info_create_codec_entry(pdata->codec_root, component);
  3720. bolero_register_wake_irq(component, false);
  3721. codec_reg_done = true;
  3722. return 0;
  3723. err:
  3724. return ret;
  3725. }
  3726. static void *def_wcd_mbhc_cal(void)
  3727. {
  3728. void *wcd_mbhc_cal;
  3729. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  3730. u16 *btn_high;
  3731. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  3732. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  3733. if (!wcd_mbhc_cal)
  3734. return NULL;
  3735. WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
  3736. WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
  3737. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  3738. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  3739. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  3740. btn_high[0] = 75;
  3741. btn_high[1] = 150;
  3742. btn_high[2] = 237;
  3743. btn_high[3] = 500;
  3744. btn_high[4] = 500;
  3745. btn_high[5] = 500;
  3746. btn_high[6] = 500;
  3747. btn_high[7] = 500;
  3748. return wcd_mbhc_cal;
  3749. }
  3750. /* Digital audio interface glue - connects codec <---> CPU */
  3751. static struct snd_soc_dai_link msm_common_dai_links[] = {
  3752. /* FrontEnd DAI Links */
  3753. {/* hw:x,0 */
  3754. .name = MSM_DAILINK_NAME(Media1),
  3755. .stream_name = "MultiMedia1",
  3756. .cpu_dai_name = "MultiMedia1",
  3757. .platform_name = "msm-pcm-dsp.0",
  3758. .dynamic = 1,
  3759. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3760. .dpcm_playback = 1,
  3761. .dpcm_capture = 1,
  3762. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3763. SND_SOC_DPCM_TRIGGER_POST},
  3764. .codec_dai_name = "snd-soc-dummy-dai",
  3765. .codec_name = "snd-soc-dummy",
  3766. .ignore_suspend = 1,
  3767. /* this dainlink has playback support */
  3768. .ignore_pmdown_time = 1,
  3769. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  3770. },
  3771. {/* hw:x,1 */
  3772. .name = MSM_DAILINK_NAME(Media2),
  3773. .stream_name = "MultiMedia2",
  3774. .cpu_dai_name = "MultiMedia2",
  3775. .platform_name = "msm-pcm-dsp.0",
  3776. .dynamic = 1,
  3777. .dpcm_playback = 1,
  3778. .dpcm_capture = 1,
  3779. .codec_dai_name = "snd-soc-dummy-dai",
  3780. .codec_name = "snd-soc-dummy",
  3781. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3782. SND_SOC_DPCM_TRIGGER_POST},
  3783. .ignore_suspend = 1,
  3784. /* this dainlink has playback support */
  3785. .ignore_pmdown_time = 1,
  3786. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  3787. },
  3788. {/* hw:x,2 */
  3789. .name = "VoiceMMode1",
  3790. .stream_name = "VoiceMMode1",
  3791. .cpu_dai_name = "VoiceMMode1",
  3792. .platform_name = "msm-pcm-voice",
  3793. .dynamic = 1,
  3794. .dpcm_playback = 1,
  3795. .dpcm_capture = 1,
  3796. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3797. SND_SOC_DPCM_TRIGGER_POST},
  3798. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3799. .ignore_suspend = 1,
  3800. .ignore_pmdown_time = 1,
  3801. .codec_dai_name = "snd-soc-dummy-dai",
  3802. .codec_name = "snd-soc-dummy",
  3803. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  3804. },
  3805. {/* hw:x,3 */
  3806. .name = "MSM VoIP",
  3807. .stream_name = "VoIP",
  3808. .cpu_dai_name = "VoIP",
  3809. .platform_name = "msm-voip-dsp",
  3810. .dynamic = 1,
  3811. .dpcm_playback = 1,
  3812. .dpcm_capture = 1,
  3813. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3814. SND_SOC_DPCM_TRIGGER_POST},
  3815. .codec_dai_name = "snd-soc-dummy-dai",
  3816. .codec_name = "snd-soc-dummy",
  3817. .ignore_suspend = 1,
  3818. /* this dainlink has playback support */
  3819. .ignore_pmdown_time = 1,
  3820. .id = MSM_FRONTEND_DAI_VOIP,
  3821. },
  3822. {/* hw:x,4 */
  3823. .name = MSM_DAILINK_NAME(ULL),
  3824. .stream_name = "MultiMedia3",
  3825. .cpu_dai_name = "MultiMedia3",
  3826. .platform_name = "msm-pcm-dsp.2",
  3827. .dynamic = 1,
  3828. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3829. .dpcm_playback = 1,
  3830. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3831. SND_SOC_DPCM_TRIGGER_POST},
  3832. .codec_dai_name = "snd-soc-dummy-dai",
  3833. .codec_name = "snd-soc-dummy",
  3834. .ignore_suspend = 1,
  3835. /* this dainlink has playback support */
  3836. .ignore_pmdown_time = 1,
  3837. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  3838. },
  3839. {/* hw:x,5 */
  3840. .name = "MSM AFE-PCM RX",
  3841. .stream_name = "AFE-PROXY RX",
  3842. .cpu_dai_name = "msm-dai-q6-dev.241",
  3843. .codec_name = "msm-stub-codec.1",
  3844. .codec_dai_name = "msm-stub-rx",
  3845. .platform_name = "msm-pcm-afe",
  3846. .dpcm_playback = 1,
  3847. .ignore_suspend = 1,
  3848. /* this dainlink has playback support */
  3849. .ignore_pmdown_time = 1,
  3850. },
  3851. {/* hw:x,6 */
  3852. .name = "MSM AFE-PCM TX",
  3853. .stream_name = "AFE-PROXY TX",
  3854. .cpu_dai_name = "msm-dai-q6-dev.240",
  3855. .codec_name = "msm-stub-codec.1",
  3856. .codec_dai_name = "msm-stub-tx",
  3857. .platform_name = "msm-pcm-afe",
  3858. .dpcm_capture = 1,
  3859. .ignore_suspend = 1,
  3860. },
  3861. {/* hw:x,7 */
  3862. .name = MSM_DAILINK_NAME(Compress1),
  3863. .stream_name = "Compress1",
  3864. .cpu_dai_name = "MultiMedia4",
  3865. .platform_name = "msm-compress-dsp",
  3866. .dynamic = 1,
  3867. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  3868. .dpcm_playback = 1,
  3869. .dpcm_capture = 1,
  3870. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3871. SND_SOC_DPCM_TRIGGER_POST},
  3872. .codec_dai_name = "snd-soc-dummy-dai",
  3873. .codec_name = "snd-soc-dummy",
  3874. .ignore_suspend = 1,
  3875. .ignore_pmdown_time = 1,
  3876. /* this dainlink has playback support */
  3877. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  3878. },
  3879. /* Hostless PCM purpose */
  3880. {/* hw:x,8 */
  3881. .name = "AUXPCM Hostless",
  3882. .stream_name = "AUXPCM Hostless",
  3883. .cpu_dai_name = "AUXPCM_HOSTLESS",
  3884. .platform_name = "msm-pcm-hostless",
  3885. .dynamic = 1,
  3886. .dpcm_playback = 1,
  3887. .dpcm_capture = 1,
  3888. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3889. SND_SOC_DPCM_TRIGGER_POST},
  3890. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3891. .ignore_suspend = 1,
  3892. /* this dainlink has playback support */
  3893. .ignore_pmdown_time = 1,
  3894. .codec_dai_name = "snd-soc-dummy-dai",
  3895. .codec_name = "snd-soc-dummy",
  3896. },
  3897. {/* hw:x,9 */
  3898. .name = MSM_DAILINK_NAME(LowLatency),
  3899. .stream_name = "MultiMedia5",
  3900. .cpu_dai_name = "MultiMedia5",
  3901. .platform_name = "msm-pcm-dsp.1",
  3902. .dynamic = 1,
  3903. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  3904. .dpcm_playback = 1,
  3905. .dpcm_capture = 1,
  3906. .codec_dai_name = "snd-soc-dummy-dai",
  3907. .codec_name = "snd-soc-dummy",
  3908. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3909. SND_SOC_DPCM_TRIGGER_POST},
  3910. .ignore_suspend = 1,
  3911. /* this dainlink has playback support */
  3912. .ignore_pmdown_time = 1,
  3913. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  3914. .ops = &msm_fe_qos_ops,
  3915. },
  3916. {/* hw:x,10 */
  3917. .name = "Listen 1 Audio Service",
  3918. .stream_name = "Listen 1 Audio Service",
  3919. .cpu_dai_name = "LSM1",
  3920. .platform_name = "msm-lsm-client",
  3921. .dynamic = 1,
  3922. .dpcm_capture = 1,
  3923. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  3924. SND_SOC_DPCM_TRIGGER_POST },
  3925. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3926. .ignore_suspend = 1,
  3927. .codec_dai_name = "snd-soc-dummy-dai",
  3928. .codec_name = "snd-soc-dummy",
  3929. .id = MSM_FRONTEND_DAI_LSM1,
  3930. },
  3931. /* Multiple Tunnel instances */
  3932. {/* hw:x,11 */
  3933. .name = MSM_DAILINK_NAME(Compress2),
  3934. .stream_name = "Compress2",
  3935. .cpu_dai_name = "MultiMedia7",
  3936. .platform_name = "msm-compress-dsp",
  3937. .dynamic = 1,
  3938. .dpcm_playback = 1,
  3939. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3940. SND_SOC_DPCM_TRIGGER_POST},
  3941. .codec_dai_name = "snd-soc-dummy-dai",
  3942. .codec_name = "snd-soc-dummy",
  3943. .ignore_suspend = 1,
  3944. .ignore_pmdown_time = 1,
  3945. /* this dainlink has playback support */
  3946. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  3947. },
  3948. {/* hw:x,12 */
  3949. .name = MSM_DAILINK_NAME(MultiMedia10),
  3950. .stream_name = "MultiMedia10",
  3951. .cpu_dai_name = "MultiMedia10",
  3952. .platform_name = "msm-pcm-dsp.1",
  3953. .dynamic = 1,
  3954. .dpcm_playback = 1,
  3955. .dpcm_capture = 1,
  3956. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3957. SND_SOC_DPCM_TRIGGER_POST},
  3958. .codec_dai_name = "snd-soc-dummy-dai",
  3959. .codec_name = "snd-soc-dummy",
  3960. .ignore_suspend = 1,
  3961. .ignore_pmdown_time = 1,
  3962. /* this dainlink has playback support */
  3963. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  3964. },
  3965. {/* hw:x,13 */
  3966. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  3967. .stream_name = "MM_NOIRQ",
  3968. .cpu_dai_name = "MultiMedia8",
  3969. .platform_name = "msm-pcm-dsp-noirq",
  3970. .dynamic = 1,
  3971. .dpcm_playback = 1,
  3972. .dpcm_capture = 1,
  3973. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3974. SND_SOC_DPCM_TRIGGER_POST},
  3975. .codec_dai_name = "snd-soc-dummy-dai",
  3976. .codec_name = "snd-soc-dummy",
  3977. .ignore_suspend = 1,
  3978. .ignore_pmdown_time = 1,
  3979. /* this dainlink has playback support */
  3980. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  3981. .ops = &msm_fe_qos_ops,
  3982. },
  3983. /* HDMI Hostless */
  3984. {/* hw:x,14 */
  3985. .name = "HDMI_RX_HOSTLESS",
  3986. .stream_name = "HDMI_RX_HOSTLESS",
  3987. .cpu_dai_name = "HDMI_HOSTLESS",
  3988. .platform_name = "msm-pcm-hostless",
  3989. .dynamic = 1,
  3990. .dpcm_playback = 1,
  3991. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  3992. SND_SOC_DPCM_TRIGGER_POST},
  3993. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  3994. .ignore_suspend = 1,
  3995. .ignore_pmdown_time = 1,
  3996. .codec_dai_name = "snd-soc-dummy-dai",
  3997. .codec_name = "snd-soc-dummy",
  3998. },
  3999. {/* hw:x,15 */
  4000. .name = "VoiceMMode2",
  4001. .stream_name = "VoiceMMode2",
  4002. .cpu_dai_name = "VoiceMMode2",
  4003. .platform_name = "msm-pcm-voice",
  4004. .dynamic = 1,
  4005. .dpcm_playback = 1,
  4006. .dpcm_capture = 1,
  4007. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4008. SND_SOC_DPCM_TRIGGER_POST},
  4009. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4010. .ignore_suspend = 1,
  4011. .ignore_pmdown_time = 1,
  4012. .codec_dai_name = "snd-soc-dummy-dai",
  4013. .codec_name = "snd-soc-dummy",
  4014. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  4015. },
  4016. /* LSM FE */
  4017. {/* hw:x,16 */
  4018. .name = "Listen 2 Audio Service",
  4019. .stream_name = "Listen 2 Audio Service",
  4020. .cpu_dai_name = "LSM2",
  4021. .platform_name = "msm-lsm-client",
  4022. .dynamic = 1,
  4023. .dpcm_capture = 1,
  4024. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4025. SND_SOC_DPCM_TRIGGER_POST },
  4026. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4027. .ignore_suspend = 1,
  4028. .codec_dai_name = "snd-soc-dummy-dai",
  4029. .codec_name = "snd-soc-dummy",
  4030. .id = MSM_FRONTEND_DAI_LSM2,
  4031. },
  4032. {/* hw:x,17 */
  4033. .name = "Listen 3 Audio Service",
  4034. .stream_name = "Listen 3 Audio Service",
  4035. .cpu_dai_name = "LSM3",
  4036. .platform_name = "msm-lsm-client",
  4037. .dynamic = 1,
  4038. .dpcm_capture = 1,
  4039. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4040. SND_SOC_DPCM_TRIGGER_POST },
  4041. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4042. .ignore_suspend = 1,
  4043. .codec_dai_name = "snd-soc-dummy-dai",
  4044. .codec_name = "snd-soc-dummy",
  4045. .id = MSM_FRONTEND_DAI_LSM3,
  4046. },
  4047. {/* hw:x,18 */
  4048. .name = "Listen 4 Audio Service",
  4049. .stream_name = "Listen 4 Audio Service",
  4050. .cpu_dai_name = "LSM4",
  4051. .platform_name = "msm-lsm-client",
  4052. .dynamic = 1,
  4053. .dpcm_capture = 1,
  4054. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4055. SND_SOC_DPCM_TRIGGER_POST },
  4056. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4057. .ignore_suspend = 1,
  4058. .codec_dai_name = "snd-soc-dummy-dai",
  4059. .codec_name = "snd-soc-dummy",
  4060. .id = MSM_FRONTEND_DAI_LSM4,
  4061. },
  4062. {/* hw:x,19 */
  4063. .name = "Listen 5 Audio Service",
  4064. .stream_name = "Listen 5 Audio Service",
  4065. .cpu_dai_name = "LSM5",
  4066. .platform_name = "msm-lsm-client",
  4067. .dynamic = 1,
  4068. .dpcm_capture = 1,
  4069. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4070. SND_SOC_DPCM_TRIGGER_POST },
  4071. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4072. .ignore_suspend = 1,
  4073. .codec_dai_name = "snd-soc-dummy-dai",
  4074. .codec_name = "snd-soc-dummy",
  4075. .id = MSM_FRONTEND_DAI_LSM5,
  4076. },
  4077. {/* hw:x,20 */
  4078. .name = "Listen 6 Audio Service",
  4079. .stream_name = "Listen 6 Audio Service",
  4080. .cpu_dai_name = "LSM6",
  4081. .platform_name = "msm-lsm-client",
  4082. .dynamic = 1,
  4083. .dpcm_capture = 1,
  4084. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4085. SND_SOC_DPCM_TRIGGER_POST },
  4086. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4087. .ignore_suspend = 1,
  4088. .codec_dai_name = "snd-soc-dummy-dai",
  4089. .codec_name = "snd-soc-dummy",
  4090. .id = MSM_FRONTEND_DAI_LSM6,
  4091. },
  4092. {/* hw:x,21 */
  4093. .name = "Listen 7 Audio Service",
  4094. .stream_name = "Listen 7 Audio Service",
  4095. .cpu_dai_name = "LSM7",
  4096. .platform_name = "msm-lsm-client",
  4097. .dynamic = 1,
  4098. .dpcm_capture = 1,
  4099. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4100. SND_SOC_DPCM_TRIGGER_POST },
  4101. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4102. .ignore_suspend = 1,
  4103. .codec_dai_name = "snd-soc-dummy-dai",
  4104. .codec_name = "snd-soc-dummy",
  4105. .id = MSM_FRONTEND_DAI_LSM7,
  4106. },
  4107. {/* hw:x,22 */
  4108. .name = "Listen 8 Audio Service",
  4109. .stream_name = "Listen 8 Audio Service",
  4110. .cpu_dai_name = "LSM8",
  4111. .platform_name = "msm-lsm-client",
  4112. .dynamic = 1,
  4113. .dpcm_capture = 1,
  4114. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  4115. SND_SOC_DPCM_TRIGGER_POST },
  4116. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4117. .ignore_suspend = 1,
  4118. .codec_dai_name = "snd-soc-dummy-dai",
  4119. .codec_name = "snd-soc-dummy",
  4120. .id = MSM_FRONTEND_DAI_LSM8,
  4121. },
  4122. {/* hw:x,23 */
  4123. .name = MSM_DAILINK_NAME(Media9),
  4124. .stream_name = "MultiMedia9",
  4125. .cpu_dai_name = "MultiMedia9",
  4126. .platform_name = "msm-pcm-dsp.0",
  4127. .dynamic = 1,
  4128. .dpcm_playback = 1,
  4129. .dpcm_capture = 1,
  4130. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4131. SND_SOC_DPCM_TRIGGER_POST},
  4132. .codec_dai_name = "snd-soc-dummy-dai",
  4133. .codec_name = "snd-soc-dummy",
  4134. .ignore_suspend = 1,
  4135. /* this dainlink has playback support */
  4136. .ignore_pmdown_time = 1,
  4137. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  4138. },
  4139. {/* hw:x,24 */
  4140. .name = MSM_DAILINK_NAME(Compress4),
  4141. .stream_name = "Compress4",
  4142. .cpu_dai_name = "MultiMedia11",
  4143. .platform_name = "msm-compress-dsp",
  4144. .dynamic = 1,
  4145. .dpcm_playback = 1,
  4146. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4147. SND_SOC_DPCM_TRIGGER_POST},
  4148. .codec_dai_name = "snd-soc-dummy-dai",
  4149. .codec_name = "snd-soc-dummy",
  4150. .ignore_suspend = 1,
  4151. .ignore_pmdown_time = 1,
  4152. /* this dainlink has playback support */
  4153. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  4154. },
  4155. {/* hw:x,25 */
  4156. .name = MSM_DAILINK_NAME(Compress5),
  4157. .stream_name = "Compress5",
  4158. .cpu_dai_name = "MultiMedia12",
  4159. .platform_name = "msm-compress-dsp",
  4160. .dynamic = 1,
  4161. .dpcm_playback = 1,
  4162. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4163. SND_SOC_DPCM_TRIGGER_POST},
  4164. .codec_dai_name = "snd-soc-dummy-dai",
  4165. .codec_name = "snd-soc-dummy",
  4166. .ignore_suspend = 1,
  4167. .ignore_pmdown_time = 1,
  4168. /* this dainlink has playback support */
  4169. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  4170. },
  4171. {/* hw:x,26 */
  4172. .name = MSM_DAILINK_NAME(Compress6),
  4173. .stream_name = "Compress6",
  4174. .cpu_dai_name = "MultiMedia13",
  4175. .platform_name = "msm-compress-dsp",
  4176. .dynamic = 1,
  4177. .dpcm_playback = 1,
  4178. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4179. SND_SOC_DPCM_TRIGGER_POST},
  4180. .codec_dai_name = "snd-soc-dummy-dai",
  4181. .codec_name = "snd-soc-dummy",
  4182. .ignore_suspend = 1,
  4183. .ignore_pmdown_time = 1,
  4184. /* this dainlink has playback support */
  4185. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  4186. },
  4187. {/* hw:x,27 */
  4188. .name = MSM_DAILINK_NAME(Compress7),
  4189. .stream_name = "Compress7",
  4190. .cpu_dai_name = "MultiMedia14",
  4191. .platform_name = "msm-compress-dsp",
  4192. .dynamic = 1,
  4193. .dpcm_playback = 1,
  4194. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4195. SND_SOC_DPCM_TRIGGER_POST},
  4196. .codec_dai_name = "snd-soc-dummy-dai",
  4197. .codec_name = "snd-soc-dummy",
  4198. .ignore_suspend = 1,
  4199. .ignore_pmdown_time = 1,
  4200. /* this dainlink has playback support */
  4201. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  4202. },
  4203. {/* hw:x,28 */
  4204. .name = MSM_DAILINK_NAME(Compress8),
  4205. .stream_name = "Compress8",
  4206. .cpu_dai_name = "MultiMedia15",
  4207. .platform_name = "msm-compress-dsp",
  4208. .dynamic = 1,
  4209. .dpcm_playback = 1,
  4210. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4211. SND_SOC_DPCM_TRIGGER_POST},
  4212. .codec_dai_name = "snd-soc-dummy-dai",
  4213. .codec_name = "snd-soc-dummy",
  4214. .ignore_suspend = 1,
  4215. .ignore_pmdown_time = 1,
  4216. /* this dainlink has playback support */
  4217. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  4218. },
  4219. {/* hw:x,29 */
  4220. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  4221. .stream_name = "MM_NOIRQ_2",
  4222. .cpu_dai_name = "MultiMedia16",
  4223. .platform_name = "msm-pcm-dsp-noirq",
  4224. .dynamic = 1,
  4225. .dpcm_playback = 1,
  4226. .dpcm_capture = 1,
  4227. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4228. SND_SOC_DPCM_TRIGGER_POST},
  4229. .codec_dai_name = "snd-soc-dummy-dai",
  4230. .codec_name = "snd-soc-dummy",
  4231. .ignore_suspend = 1,
  4232. .ignore_pmdown_time = 1,
  4233. /* this dainlink has playback support */
  4234. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  4235. },
  4236. {/* hw:x,30 */
  4237. .name = "CDC_DMA Hostless",
  4238. .stream_name = "CDC_DMA Hostless",
  4239. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  4240. .platform_name = "msm-pcm-hostless",
  4241. .dynamic = 1,
  4242. .dpcm_playback = 1,
  4243. .dpcm_capture = 1,
  4244. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4245. SND_SOC_DPCM_TRIGGER_POST},
  4246. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4247. .ignore_suspend = 1,
  4248. /* this dailink has playback support */
  4249. .ignore_pmdown_time = 1,
  4250. .codec_dai_name = "snd-soc-dummy-dai",
  4251. .codec_name = "snd-soc-dummy",
  4252. },
  4253. {/* hw:x,31 */
  4254. .name = "TX3_CDC_DMA Hostless",
  4255. .stream_name = "TX3_CDC_DMA Hostless",
  4256. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  4257. .platform_name = "msm-pcm-hostless",
  4258. .dynamic = 1,
  4259. .dpcm_capture = 1,
  4260. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4261. SND_SOC_DPCM_TRIGGER_POST},
  4262. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4263. .ignore_suspend = 1,
  4264. .codec_dai_name = "snd-soc-dummy-dai",
  4265. .codec_name = "snd-soc-dummy",
  4266. },
  4267. {/* hw:x,32 */
  4268. .name = "Tertiary MI2S TX_Hostless",
  4269. .stream_name = "Tertiary MI2S_TX Hostless Capture",
  4270. .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
  4271. .platform_name = "msm-pcm-hostless",
  4272. .dynamic = 1,
  4273. .dpcm_capture = 1,
  4274. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4275. SND_SOC_DPCM_TRIGGER_POST},
  4276. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4277. .ignore_suspend = 1,
  4278. .ignore_pmdown_time = 1,
  4279. .codec_dai_name = "snd-soc-dummy-dai",
  4280. .codec_name = "snd-soc-dummy",
  4281. },
  4282. };
  4283. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  4284. {/* hw:x,33 */
  4285. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  4286. .stream_name = "WSA CDC DMA0 Capture",
  4287. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  4288. .platform_name = "msm-pcm-hostless",
  4289. .codec_name = "bolero_codec",
  4290. .codec_dai_name = "wsa_macro_vifeedback",
  4291. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  4292. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4293. .ignore_suspend = 1,
  4294. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4295. .ops = &msm_cdc_dma_be_ops,
  4296. },
  4297. };
  4298. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  4299. {/* hw:x,34 */
  4300. .name = MSM_DAILINK_NAME(ASM Loopback),
  4301. .stream_name = "MultiMedia6",
  4302. .cpu_dai_name = "MultiMedia6",
  4303. .platform_name = "msm-pcm-loopback",
  4304. .dynamic = 1,
  4305. .dpcm_playback = 1,
  4306. .dpcm_capture = 1,
  4307. .codec_dai_name = "snd-soc-dummy-dai",
  4308. .codec_name = "snd-soc-dummy",
  4309. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4310. SND_SOC_DPCM_TRIGGER_POST},
  4311. .ignore_suspend = 1,
  4312. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4313. .ignore_pmdown_time = 1,
  4314. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  4315. },
  4316. {/* hw:x,35 */
  4317. .name = "USB Audio Hostless",
  4318. .stream_name = "USB Audio Hostless",
  4319. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  4320. .platform_name = "msm-pcm-hostless",
  4321. .dynamic = 1,
  4322. .dpcm_playback = 1,
  4323. .dpcm_capture = 1,
  4324. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4325. SND_SOC_DPCM_TRIGGER_POST},
  4326. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4327. .ignore_suspend = 1,
  4328. .ignore_pmdown_time = 1,
  4329. .codec_dai_name = "snd-soc-dummy-dai",
  4330. .codec_name = "snd-soc-dummy",
  4331. },
  4332. {/* hw:x,36 */
  4333. .name = "SLIMBUS_7 Hostless",
  4334. .stream_name = "SLIMBUS_7 Hostless",
  4335. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  4336. .platform_name = "msm-pcm-hostless",
  4337. .dynamic = 1,
  4338. .dpcm_capture = 1,
  4339. .dpcm_playback = 1,
  4340. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4341. SND_SOC_DPCM_TRIGGER_POST},
  4342. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  4343. .ignore_suspend = 1,
  4344. .ignore_pmdown_time = 1,
  4345. .codec_dai_name = "snd-soc-dummy-dai",
  4346. .codec_name = "snd-soc-dummy",
  4347. },
  4348. {/* hw:x,37 */
  4349. .name = "Compress Capture",
  4350. .stream_name = "Compress9",
  4351. .cpu_dai_name = "MultiMedia17",
  4352. .platform_name = "msm-compress-dsp",
  4353. .dynamic = 1,
  4354. .dpcm_capture = 1,
  4355. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  4356. SND_SOC_DPCM_TRIGGER_POST},
  4357. .codec_dai_name = "snd-soc-dummy-dai",
  4358. .codec_name = "snd-soc-dummy",
  4359. .ignore_suspend = 1,
  4360. .ignore_pmdown_time = 1,
  4361. .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
  4362. },
  4363. };
  4364. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  4365. /* Backend AFE DAI Links */
  4366. {
  4367. .name = LPASS_BE_AFE_PCM_RX,
  4368. .stream_name = "AFE Playback",
  4369. .cpu_dai_name = "msm-dai-q6-dev.224",
  4370. .platform_name = "msm-pcm-routing",
  4371. .codec_name = "msm-stub-codec.1",
  4372. .codec_dai_name = "msm-stub-rx",
  4373. .no_pcm = 1,
  4374. .dpcm_playback = 1,
  4375. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  4376. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4377. /* this dainlink has playback support */
  4378. .ignore_pmdown_time = 1,
  4379. .ignore_suspend = 1,
  4380. },
  4381. {
  4382. .name = LPASS_BE_AFE_PCM_TX,
  4383. .stream_name = "AFE Capture",
  4384. .cpu_dai_name = "msm-dai-q6-dev.225",
  4385. .platform_name = "msm-pcm-routing",
  4386. .codec_name = "msm-stub-codec.1",
  4387. .codec_dai_name = "msm-stub-tx",
  4388. .no_pcm = 1,
  4389. .dpcm_capture = 1,
  4390. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  4391. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4392. .ignore_suspend = 1,
  4393. },
  4394. /* Incall Record Uplink BACK END DAI Link */
  4395. {
  4396. .name = LPASS_BE_INCALL_RECORD_TX,
  4397. .stream_name = "Voice Uplink Capture",
  4398. .cpu_dai_name = "msm-dai-q6-dev.32772",
  4399. .platform_name = "msm-pcm-routing",
  4400. .codec_name = "msm-stub-codec.1",
  4401. .codec_dai_name = "msm-stub-tx",
  4402. .no_pcm = 1,
  4403. .dpcm_capture = 1,
  4404. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  4405. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4406. .ignore_suspend = 1,
  4407. },
  4408. /* Incall Record Downlink BACK END DAI Link */
  4409. {
  4410. .name = LPASS_BE_INCALL_RECORD_RX,
  4411. .stream_name = "Voice Downlink Capture",
  4412. .cpu_dai_name = "msm-dai-q6-dev.32771",
  4413. .platform_name = "msm-pcm-routing",
  4414. .codec_name = "msm-stub-codec.1",
  4415. .codec_dai_name = "msm-stub-tx",
  4416. .no_pcm = 1,
  4417. .dpcm_capture = 1,
  4418. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  4419. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4420. .ignore_suspend = 1,
  4421. },
  4422. /* Incall Music BACK END DAI Link */
  4423. {
  4424. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  4425. .stream_name = "Voice Farend Playback",
  4426. .cpu_dai_name = "msm-dai-q6-dev.32773",
  4427. .platform_name = "msm-pcm-routing",
  4428. .codec_name = "msm-stub-codec.1",
  4429. .codec_dai_name = "msm-stub-rx",
  4430. .no_pcm = 1,
  4431. .dpcm_playback = 1,
  4432. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  4433. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4434. .ignore_suspend = 1,
  4435. .ignore_pmdown_time = 1,
  4436. },
  4437. /* Incall Music 2 BACK END DAI Link */
  4438. {
  4439. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  4440. .stream_name = "Voice2 Farend Playback",
  4441. .cpu_dai_name = "msm-dai-q6-dev.32770",
  4442. .platform_name = "msm-pcm-routing",
  4443. .codec_name = "msm-stub-codec.1",
  4444. .codec_dai_name = "msm-stub-rx",
  4445. .no_pcm = 1,
  4446. .dpcm_playback = 1,
  4447. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  4448. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4449. .ignore_suspend = 1,
  4450. .ignore_pmdown_time = 1,
  4451. },
  4452. {
  4453. .name = LPASS_BE_USB_AUDIO_RX,
  4454. .stream_name = "USB Audio Playback",
  4455. .cpu_dai_name = "msm-dai-q6-dev.28672",
  4456. .platform_name = "msm-pcm-routing",
  4457. .codec_name = "msm-stub-codec.1",
  4458. .codec_dai_name = "msm-stub-rx",
  4459. .no_pcm = 1,
  4460. .dpcm_playback = 1,
  4461. .id = MSM_BACKEND_DAI_USB_RX,
  4462. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4463. .ignore_pmdown_time = 1,
  4464. .ignore_suspend = 1,
  4465. },
  4466. {
  4467. .name = LPASS_BE_USB_AUDIO_TX,
  4468. .stream_name = "USB Audio Capture",
  4469. .cpu_dai_name = "msm-dai-q6-dev.28673",
  4470. .platform_name = "msm-pcm-routing",
  4471. .codec_name = "msm-stub-codec.1",
  4472. .codec_dai_name = "msm-stub-tx",
  4473. .no_pcm = 1,
  4474. .dpcm_capture = 1,
  4475. .id = MSM_BACKEND_DAI_USB_TX,
  4476. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4477. .ignore_suspend = 1,
  4478. },
  4479. {
  4480. .name = LPASS_BE_PRI_TDM_RX_0,
  4481. .stream_name = "Primary TDM0 Playback",
  4482. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  4483. .platform_name = "msm-pcm-routing",
  4484. .codec_name = "msm-stub-codec.1",
  4485. .codec_dai_name = "msm-stub-rx",
  4486. .no_pcm = 1,
  4487. .dpcm_playback = 1,
  4488. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  4489. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4490. .ops = &kona_tdm_be_ops,
  4491. .ignore_suspend = 1,
  4492. .ignore_pmdown_time = 1,
  4493. },
  4494. {
  4495. .name = LPASS_BE_PRI_TDM_TX_0,
  4496. .stream_name = "Primary TDM0 Capture",
  4497. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  4498. .platform_name = "msm-pcm-routing",
  4499. .codec_name = "msm-stub-codec.1",
  4500. .codec_dai_name = "msm-stub-tx",
  4501. .no_pcm = 1,
  4502. .dpcm_capture = 1,
  4503. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  4504. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4505. .ops = &kona_tdm_be_ops,
  4506. .ignore_suspend = 1,
  4507. },
  4508. {
  4509. .name = LPASS_BE_SEC_TDM_RX_0,
  4510. .stream_name = "Secondary TDM0 Playback",
  4511. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  4512. .platform_name = "msm-pcm-routing",
  4513. .codec_name = "msm-stub-codec.1",
  4514. .codec_dai_name = "msm-stub-rx",
  4515. .no_pcm = 1,
  4516. .dpcm_playback = 1,
  4517. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  4518. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4519. .ops = &kona_tdm_be_ops,
  4520. .ignore_suspend = 1,
  4521. .ignore_pmdown_time = 1,
  4522. },
  4523. {
  4524. .name = LPASS_BE_SEC_TDM_TX_0,
  4525. .stream_name = "Secondary TDM0 Capture",
  4526. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  4527. .platform_name = "msm-pcm-routing",
  4528. .codec_name = "msm-stub-codec.1",
  4529. .codec_dai_name = "msm-stub-tx",
  4530. .no_pcm = 1,
  4531. .dpcm_capture = 1,
  4532. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  4533. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4534. .ops = &kona_tdm_be_ops,
  4535. .ignore_suspend = 1,
  4536. },
  4537. {
  4538. .name = LPASS_BE_TERT_TDM_RX_0,
  4539. .stream_name = "Tertiary TDM0 Playback",
  4540. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  4541. .platform_name = "msm-pcm-routing",
  4542. .codec_name = "msm-stub-codec.1",
  4543. .codec_dai_name = "msm-stub-rx",
  4544. .no_pcm = 1,
  4545. .dpcm_playback = 1,
  4546. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  4547. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4548. .ops = &kona_tdm_be_ops,
  4549. .ignore_suspend = 1,
  4550. .ignore_pmdown_time = 1,
  4551. },
  4552. {
  4553. .name = LPASS_BE_TERT_TDM_TX_0,
  4554. .stream_name = "Tertiary TDM0 Capture",
  4555. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  4556. .platform_name = "msm-pcm-routing",
  4557. .codec_name = "msm-stub-codec.1",
  4558. .codec_dai_name = "msm-stub-tx",
  4559. .no_pcm = 1,
  4560. .dpcm_capture = 1,
  4561. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  4562. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4563. .ops = &kona_tdm_be_ops,
  4564. .ignore_suspend = 1,
  4565. },
  4566. };
  4567. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  4568. {
  4569. .name = LPASS_BE_SLIMBUS_7_RX,
  4570. .stream_name = "Slimbus7 Playback",
  4571. .cpu_dai_name = "msm-dai-q6-dev.16398",
  4572. .platform_name = "msm-pcm-routing",
  4573. .codec_name = "btfmslim_slave",
  4574. /* BT codec driver determines capabilities based on
  4575. * dai name, bt codecdai name should always contains
  4576. * supported usecase information
  4577. */
  4578. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  4579. .no_pcm = 1,
  4580. .dpcm_playback = 1,
  4581. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  4582. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4583. .init = &msm_wcn_init,
  4584. .ops = &msm_wcn_ops,
  4585. /* dai link has playback support */
  4586. .ignore_pmdown_time = 1,
  4587. .ignore_suspend = 1,
  4588. },
  4589. {
  4590. .name = LPASS_BE_SLIMBUS_7_TX,
  4591. .stream_name = "Slimbus7 Capture",
  4592. .cpu_dai_name = "msm-dai-q6-dev.16399",
  4593. .platform_name = "msm-pcm-routing",
  4594. .codec_name = "btfmslim_slave",
  4595. .codec_dai_name = "btfm_bt_sco_slim_tx",
  4596. .no_pcm = 1,
  4597. .dpcm_capture = 1,
  4598. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  4599. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4600. .ops = &msm_wcn_ops,
  4601. .ignore_suspend = 1,
  4602. },
  4603. };
  4604. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  4605. /* DISP PORT BACK END DAI Link */
  4606. {
  4607. .name = LPASS_BE_DISPLAY_PORT,
  4608. .stream_name = "Display Port Playback",
  4609. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4610. .platform_name = "msm-pcm-routing",
  4611. .codec_name = "msm-ext-disp-audio-codec-rx",
  4612. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  4613. .no_pcm = 1,
  4614. .dpcm_playback = 1,
  4615. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  4616. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4617. .ignore_pmdown_time = 1,
  4618. .ignore_suspend = 1,
  4619. },
  4620. /* DISP PORT 1 BACK END DAI Link */
  4621. {
  4622. .name = LPASS_BE_DISPLAY_PORT1,
  4623. .stream_name = "Display Port1 Playback",
  4624. .cpu_dai_name = "msm-dai-q6-dp.24608",
  4625. .platform_name = "msm-pcm-routing",
  4626. .codec_name = "msm-ext-disp-audio-codec-rx",
  4627. .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
  4628. .no_pcm = 1,
  4629. .dpcm_playback = 1,
  4630. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
  4631. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4632. .ignore_pmdown_time = 1,
  4633. .ignore_suspend = 1,
  4634. },
  4635. };
  4636. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  4637. {
  4638. .name = LPASS_BE_PRI_MI2S_RX,
  4639. .stream_name = "Primary MI2S Playback",
  4640. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4641. .platform_name = "msm-pcm-routing",
  4642. .codec_name = "msm-stub-codec.1",
  4643. .codec_dai_name = "msm-stub-rx",
  4644. .no_pcm = 1,
  4645. .dpcm_playback = 1,
  4646. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  4647. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4648. .ops = &msm_mi2s_be_ops,
  4649. .ignore_suspend = 1,
  4650. .ignore_pmdown_time = 1,
  4651. },
  4652. {
  4653. .name = LPASS_BE_PRI_MI2S_TX,
  4654. .stream_name = "Primary MI2S Capture",
  4655. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  4656. .platform_name = "msm-pcm-routing",
  4657. .codec_name = "msm-stub-codec.1",
  4658. .codec_dai_name = "msm-stub-tx",
  4659. .no_pcm = 1,
  4660. .dpcm_capture = 1,
  4661. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  4662. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4663. .ops = &msm_mi2s_be_ops,
  4664. .ignore_suspend = 1,
  4665. },
  4666. {
  4667. .name = LPASS_BE_SEC_MI2S_RX,
  4668. .stream_name = "Secondary MI2S Playback",
  4669. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4670. .platform_name = "msm-pcm-routing",
  4671. .codec_name = "msm-stub-codec.1",
  4672. .codec_dai_name = "msm-stub-rx",
  4673. .no_pcm = 1,
  4674. .dpcm_playback = 1,
  4675. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  4676. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4677. .ops = &msm_mi2s_be_ops,
  4678. .ignore_suspend = 1,
  4679. .ignore_pmdown_time = 1,
  4680. },
  4681. {
  4682. .name = LPASS_BE_SEC_MI2S_TX,
  4683. .stream_name = "Secondary MI2S Capture",
  4684. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  4685. .platform_name = "msm-pcm-routing",
  4686. .codec_name = "msm-stub-codec.1",
  4687. .codec_dai_name = "msm-stub-tx",
  4688. .no_pcm = 1,
  4689. .dpcm_capture = 1,
  4690. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  4691. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4692. .ops = &msm_mi2s_be_ops,
  4693. .ignore_suspend = 1,
  4694. },
  4695. {
  4696. .name = LPASS_BE_TERT_MI2S_RX,
  4697. .stream_name = "Tertiary MI2S Playback",
  4698. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4699. .platform_name = "msm-pcm-routing",
  4700. .codec_name = "msm-stub-codec.1",
  4701. .codec_dai_name = "msm-stub-rx",
  4702. .no_pcm = 1,
  4703. .dpcm_playback = 1,
  4704. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  4705. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4706. .ops = &msm_mi2s_be_ops,
  4707. .ignore_suspend = 1,
  4708. .ignore_pmdown_time = 1,
  4709. },
  4710. {
  4711. .name = LPASS_BE_TERT_MI2S_TX,
  4712. .stream_name = "Tertiary MI2S Capture",
  4713. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  4714. .platform_name = "msm-pcm-routing",
  4715. .codec_name = "msm-stub-codec.1",
  4716. .codec_dai_name = "msm-stub-tx",
  4717. .no_pcm = 1,
  4718. .dpcm_capture = 1,
  4719. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  4720. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4721. .ops = &msm_mi2s_be_ops,
  4722. .ignore_suspend = 1,
  4723. },
  4724. };
  4725. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  4726. /* Primary AUX PCM Backend DAI Links */
  4727. {
  4728. .name = LPASS_BE_AUXPCM_RX,
  4729. .stream_name = "AUX PCM Playback",
  4730. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4731. .platform_name = "msm-pcm-routing",
  4732. .codec_name = "msm-stub-codec.1",
  4733. .codec_dai_name = "msm-stub-rx",
  4734. .no_pcm = 1,
  4735. .dpcm_playback = 1,
  4736. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  4737. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4738. .ignore_pmdown_time = 1,
  4739. .ignore_suspend = 1,
  4740. },
  4741. {
  4742. .name = LPASS_BE_AUXPCM_TX,
  4743. .stream_name = "AUX PCM Capture",
  4744. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  4745. .platform_name = "msm-pcm-routing",
  4746. .codec_name = "msm-stub-codec.1",
  4747. .codec_dai_name = "msm-stub-tx",
  4748. .no_pcm = 1,
  4749. .dpcm_capture = 1,
  4750. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  4751. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4752. .ignore_suspend = 1,
  4753. },
  4754. /* Secondary AUX PCM Backend DAI Links */
  4755. {
  4756. .name = LPASS_BE_SEC_AUXPCM_RX,
  4757. .stream_name = "Sec AUX PCM Playback",
  4758. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4759. .platform_name = "msm-pcm-routing",
  4760. .codec_name = "msm-stub-codec.1",
  4761. .codec_dai_name = "msm-stub-rx",
  4762. .no_pcm = 1,
  4763. .dpcm_playback = 1,
  4764. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  4765. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4766. .ignore_pmdown_time = 1,
  4767. .ignore_suspend = 1,
  4768. },
  4769. {
  4770. .name = LPASS_BE_SEC_AUXPCM_TX,
  4771. .stream_name = "Sec AUX PCM Capture",
  4772. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  4773. .platform_name = "msm-pcm-routing",
  4774. .codec_name = "msm-stub-codec.1",
  4775. .codec_dai_name = "msm-stub-tx",
  4776. .no_pcm = 1,
  4777. .dpcm_capture = 1,
  4778. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  4779. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4780. .ignore_suspend = 1,
  4781. },
  4782. /* Tertiary AUX PCM Backend DAI Links */
  4783. {
  4784. .name = LPASS_BE_TERT_AUXPCM_RX,
  4785. .stream_name = "Tert AUX PCM Playback",
  4786. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4787. .platform_name = "msm-pcm-routing",
  4788. .codec_name = "msm-stub-codec.1",
  4789. .codec_dai_name = "msm-stub-rx",
  4790. .no_pcm = 1,
  4791. .dpcm_playback = 1,
  4792. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  4793. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4794. .ignore_suspend = 1,
  4795. },
  4796. {
  4797. .name = LPASS_BE_TERT_AUXPCM_TX,
  4798. .stream_name = "Tert AUX PCM Capture",
  4799. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  4800. .platform_name = "msm-pcm-routing",
  4801. .codec_name = "msm-stub-codec.1",
  4802. .codec_dai_name = "msm-stub-tx",
  4803. .no_pcm = 1,
  4804. .dpcm_capture = 1,
  4805. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  4806. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4807. .ignore_suspend = 1,
  4808. },
  4809. };
  4810. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  4811. /* WSA CDC DMA Backend DAI Links */
  4812. {
  4813. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  4814. .stream_name = "WSA CDC DMA0 Playback",
  4815. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  4816. .platform_name = "msm-pcm-routing",
  4817. .codec_name = "bolero_codec",
  4818. .codec_dai_name = "wsa_macro_rx1",
  4819. .no_pcm = 1,
  4820. .dpcm_playback = 1,
  4821. .init = &msm_int_audrx_init,
  4822. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  4823. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4824. .ignore_pmdown_time = 1,
  4825. .ignore_suspend = 1,
  4826. .ops = &msm_cdc_dma_be_ops,
  4827. },
  4828. {
  4829. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  4830. .stream_name = "WSA CDC DMA1 Playback",
  4831. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  4832. .platform_name = "msm-pcm-routing",
  4833. .codec_name = "bolero_codec",
  4834. .codec_dai_name = "wsa_macro_rx_mix",
  4835. .no_pcm = 1,
  4836. .dpcm_playback = 1,
  4837. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  4838. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4839. .ignore_pmdown_time = 1,
  4840. .ignore_suspend = 1,
  4841. .ops = &msm_cdc_dma_be_ops,
  4842. },
  4843. {
  4844. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  4845. .stream_name = "WSA CDC DMA1 Capture",
  4846. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  4847. .platform_name = "msm-pcm-routing",
  4848. .codec_name = "bolero_codec",
  4849. .codec_dai_name = "wsa_macro_echo",
  4850. .no_pcm = 1,
  4851. .dpcm_capture = 1,
  4852. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  4853. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4854. .ignore_suspend = 1,
  4855. .ops = &msm_cdc_dma_be_ops,
  4856. },
  4857. };
  4858. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  4859. /* RX CDC DMA Backend DAI Links */
  4860. {
  4861. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  4862. .stream_name = "RX CDC DMA0 Playback",
  4863. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  4864. .platform_name = "msm-pcm-routing",
  4865. .codec_name = "bolero_codec",
  4866. .codec_dai_name = "rx_macro_rx1",
  4867. .no_pcm = 1,
  4868. .dpcm_playback = 1,
  4869. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  4870. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4871. .ignore_pmdown_time = 1,
  4872. .ignore_suspend = 1,
  4873. .ops = &msm_cdc_dma_be_ops,
  4874. },
  4875. {
  4876. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  4877. .stream_name = "RX CDC DMA1 Playback",
  4878. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  4879. .platform_name = "msm-pcm-routing",
  4880. .codec_name = "bolero_codec",
  4881. .codec_dai_name = "rx_macro_rx2",
  4882. .no_pcm = 1,
  4883. .dpcm_playback = 1,
  4884. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  4885. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4886. .ignore_pmdown_time = 1,
  4887. .ignore_suspend = 1,
  4888. .ops = &msm_cdc_dma_be_ops,
  4889. },
  4890. {
  4891. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  4892. .stream_name = "RX CDC DMA2 Playback",
  4893. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  4894. .platform_name = "msm-pcm-routing",
  4895. .codec_name = "bolero_codec",
  4896. .codec_dai_name = "rx_macro_rx3",
  4897. .no_pcm = 1,
  4898. .dpcm_playback = 1,
  4899. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  4900. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4901. .ignore_pmdown_time = 1,
  4902. .ignore_suspend = 1,
  4903. .ops = &msm_cdc_dma_be_ops,
  4904. },
  4905. {
  4906. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  4907. .stream_name = "RX CDC DMA3 Playback",
  4908. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  4909. .platform_name = "msm-pcm-routing",
  4910. .codec_name = "bolero_codec",
  4911. .codec_dai_name = "rx_macro_rx4",
  4912. .no_pcm = 1,
  4913. .dpcm_playback = 1,
  4914. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  4915. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4916. .ignore_pmdown_time = 1,
  4917. .ignore_suspend = 1,
  4918. .ops = &msm_cdc_dma_be_ops,
  4919. },
  4920. /* TX CDC DMA Backend DAI Links */
  4921. {
  4922. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  4923. .stream_name = "TX CDC DMA3 Capture",
  4924. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  4925. .platform_name = "msm-pcm-routing",
  4926. .codec_name = "bolero_codec",
  4927. .codec_dai_name = "tx_macro_tx1",
  4928. .no_pcm = 1,
  4929. .dpcm_capture = 1,
  4930. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  4931. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4932. .ignore_suspend = 1,
  4933. .ops = &msm_cdc_dma_be_ops,
  4934. },
  4935. {
  4936. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  4937. .stream_name = "TX CDC DMA4 Capture",
  4938. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  4939. .platform_name = "msm-pcm-routing",
  4940. .codec_name = "bolero_codec",
  4941. .codec_dai_name = "tx_macro_tx2",
  4942. .no_pcm = 1,
  4943. .dpcm_capture = 1,
  4944. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  4945. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4946. .ignore_suspend = 1,
  4947. .ops = &msm_cdc_dma_be_ops,
  4948. },
  4949. };
  4950. static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
  4951. {
  4952. .name = LPASS_BE_VA_CDC_DMA_TX_0,
  4953. .stream_name = "VA CDC DMA0 Capture",
  4954. .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
  4955. .platform_name = "msm-pcm-routing",
  4956. .codec_name = "bolero_codec",
  4957. .codec_dai_name = "va_macro_tx1",
  4958. .no_pcm = 1,
  4959. .dpcm_capture = 1,
  4960. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
  4961. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4962. .ignore_suspend = 1,
  4963. .ops = &msm_cdc_dma_be_ops,
  4964. },
  4965. {
  4966. .name = LPASS_BE_VA_CDC_DMA_TX_1,
  4967. .stream_name = "VA CDC DMA1 Capture",
  4968. .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
  4969. .platform_name = "msm-pcm-routing",
  4970. .codec_name = "bolero_codec",
  4971. .codec_dai_name = "va_macro_tx2",
  4972. .no_pcm = 1,
  4973. .dpcm_capture = 1,
  4974. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
  4975. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4976. .ignore_suspend = 1,
  4977. .ops = &msm_cdc_dma_be_ops,
  4978. },
  4979. {
  4980. .name = LPASS_BE_VA_CDC_DMA_TX_2,
  4981. .stream_name = "VA CDC DMA2 Capture",
  4982. .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
  4983. .platform_name = "msm-pcm-routing",
  4984. .codec_name = "bolero_codec",
  4985. .codec_dai_name = "va_macro_tx3",
  4986. .no_pcm = 1,
  4987. .dpcm_capture = 1,
  4988. .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
  4989. .be_hw_params_fixup = msm_be_hw_params_fixup,
  4990. .ignore_suspend = 1,
  4991. .ops = &msm_cdc_dma_be_ops,
  4992. },
  4993. };
  4994. static struct snd_soc_dai_link msm_kona_dai_links[
  4995. ARRAY_SIZE(msm_common_dai_links) +
  4996. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  4997. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  4998. ARRAY_SIZE(msm_common_be_dai_links) +
  4999. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  5000. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  5001. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  5002. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
  5003. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
  5004. ARRAY_SIZE(ext_disp_be_dai_link) +
  5005. ARRAY_SIZE(msm_wcn_be_dai_links)];
  5006. static int msm_populate_dai_link_component_of_node(
  5007. struct snd_soc_card *card)
  5008. {
  5009. int i, index, ret = 0;
  5010. struct device *cdev = card->dev;
  5011. struct snd_soc_dai_link *dai_link = card->dai_link;
  5012. struct device_node *np;
  5013. if (!cdev) {
  5014. dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
  5015. return -ENODEV;
  5016. }
  5017. for (i = 0; i < card->num_links; i++) {
  5018. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  5019. continue;
  5020. /* populate platform_of_node for snd card dai links */
  5021. if (dai_link[i].platform_name &&
  5022. !dai_link[i].platform_of_node) {
  5023. index = of_property_match_string(cdev->of_node,
  5024. "asoc-platform-names",
  5025. dai_link[i].platform_name);
  5026. if (index < 0) {
  5027. dev_err(cdev, "%s: No match found for platform name: %s\n",
  5028. __func__, dai_link[i].platform_name);
  5029. ret = index;
  5030. goto err;
  5031. }
  5032. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  5033. index);
  5034. if (!np) {
  5035. dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
  5036. __func__, dai_link[i].platform_name,
  5037. index);
  5038. ret = -ENODEV;
  5039. goto err;
  5040. }
  5041. dai_link[i].platform_of_node = np;
  5042. dai_link[i].platform_name = NULL;
  5043. }
  5044. /* populate cpu_of_node for snd card dai links */
  5045. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  5046. index = of_property_match_string(cdev->of_node,
  5047. "asoc-cpu-names",
  5048. dai_link[i].cpu_dai_name);
  5049. if (index >= 0) {
  5050. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  5051. index);
  5052. if (!np) {
  5053. dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
  5054. __func__,
  5055. dai_link[i].cpu_dai_name);
  5056. ret = -ENODEV;
  5057. goto err;
  5058. }
  5059. dai_link[i].cpu_of_node = np;
  5060. dai_link[i].cpu_dai_name = NULL;
  5061. }
  5062. }
  5063. /* populate codec_of_node for snd card dai links */
  5064. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  5065. index = of_property_match_string(cdev->of_node,
  5066. "asoc-codec-names",
  5067. dai_link[i].codec_name);
  5068. if (index < 0)
  5069. continue;
  5070. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  5071. index);
  5072. if (!np) {
  5073. dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
  5074. __func__, dai_link[i].codec_name);
  5075. ret = -ENODEV;
  5076. goto err;
  5077. }
  5078. dai_link[i].codec_of_node = np;
  5079. dai_link[i].codec_name = NULL;
  5080. }
  5081. }
  5082. err:
  5083. return ret;
  5084. }
  5085. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  5086. {
  5087. int ret = -EINVAL;
  5088. struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
  5089. if (!component) {
  5090. pr_err("* %s: No match for msm-stub-codec component\n", __func__);
  5091. return ret;
  5092. }
  5093. ret = snd_soc_add_component_controls(component, msm_snd_controls,
  5094. ARRAY_SIZE(msm_snd_controls));
  5095. if (ret < 0) {
  5096. dev_err(component->dev,
  5097. "%s: add_codec_controls failed, err = %d\n",
  5098. __func__, ret);
  5099. return ret;
  5100. }
  5101. return ret;
  5102. }
  5103. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  5104. struct snd_pcm_hw_params *params)
  5105. {
  5106. return 0;
  5107. }
  5108. static struct snd_soc_ops msm_stub_be_ops = {
  5109. .hw_params = msm_snd_stub_hw_params,
  5110. };
  5111. struct snd_soc_card snd_soc_card_stub_msm = {
  5112. .name = "kona-stub-snd-card",
  5113. };
  5114. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  5115. /* FrontEnd DAI Links */
  5116. {
  5117. .name = "MSMSTUB Media1",
  5118. .stream_name = "MultiMedia1",
  5119. .cpu_dai_name = "MultiMedia1",
  5120. .platform_name = "msm-pcm-dsp.0",
  5121. .dynamic = 1,
  5122. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5123. .dpcm_playback = 1,
  5124. .dpcm_capture = 1,
  5125. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5126. SND_SOC_DPCM_TRIGGER_POST},
  5127. .codec_dai_name = "snd-soc-dummy-dai",
  5128. .codec_name = "snd-soc-dummy",
  5129. .ignore_suspend = 1,
  5130. /* this dainlink has playback support */
  5131. .ignore_pmdown_time = 1,
  5132. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5133. },
  5134. };
  5135. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  5136. /* Backend DAI Links */
  5137. {
  5138. .name = LPASS_BE_AUXPCM_RX,
  5139. .stream_name = "AUX PCM Playback",
  5140. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5141. .platform_name = "msm-pcm-routing",
  5142. .codec_name = "msm-stub-codec.1",
  5143. .codec_dai_name = "msm-stub-rx",
  5144. .no_pcm = 1,
  5145. .dpcm_playback = 1,
  5146. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  5147. .init = &msm_audrx_stub_init,
  5148. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5149. .ignore_pmdown_time = 1,
  5150. .ignore_suspend = 1,
  5151. .ops = &msm_stub_be_ops,
  5152. },
  5153. {
  5154. .name = LPASS_BE_AUXPCM_TX,
  5155. .stream_name = "AUX PCM Capture",
  5156. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  5157. .platform_name = "msm-pcm-routing",
  5158. .codec_name = "msm-stub-codec.1",
  5159. .codec_dai_name = "msm-stub-tx",
  5160. .no_pcm = 1,
  5161. .dpcm_capture = 1,
  5162. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  5163. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5164. .ignore_suspend = 1,
  5165. .ops = &msm_stub_be_ops,
  5166. },
  5167. };
  5168. static struct snd_soc_dai_link msm_stub_dai_links[
  5169. ARRAY_SIZE(msm_stub_fe_dai_links) +
  5170. ARRAY_SIZE(msm_stub_be_dai_links)];
  5171. static const struct of_device_id kona_asoc_machine_of_match[] = {
  5172. { .compatible = "qcom,kona-asoc-snd",
  5173. .data = "codec"},
  5174. { .compatible = "qcom,kona-asoc-snd-stub",
  5175. .data = "stub_codec"},
  5176. {},
  5177. };
  5178. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  5179. {
  5180. struct snd_soc_card *card = NULL;
  5181. struct snd_soc_dai_link *dailink = NULL;
  5182. int len_1 = 0;
  5183. int len_2 = 0;
  5184. int total_links = 0;
  5185. int rc = 0;
  5186. u32 mi2s_audio_intf = 0;
  5187. u32 auxpcm_audio_intf = 0;
  5188. u32 val = 0;
  5189. const struct of_device_id *match;
  5190. match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
  5191. if (!match) {
  5192. dev_err(dev, "%s: No DT match found for sound card\n",
  5193. __func__);
  5194. return NULL;
  5195. }
  5196. if (!strcmp(match->data, "codec")) {
  5197. card = &snd_soc_card_kona_msm;
  5198. memcpy(msm_kona_dai_links + total_links,
  5199. msm_common_dai_links,
  5200. sizeof(msm_common_dai_links));
  5201. total_links += ARRAY_SIZE(msm_common_dai_links);
  5202. memcpy(msm_kona_dai_links + total_links,
  5203. msm_bolero_fe_dai_links,
  5204. sizeof(msm_bolero_fe_dai_links));
  5205. total_links +=
  5206. ARRAY_SIZE(msm_bolero_fe_dai_links);
  5207. memcpy(msm_kona_dai_links + total_links,
  5208. msm_common_misc_fe_dai_links,
  5209. sizeof(msm_common_misc_fe_dai_links));
  5210. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  5211. memcpy(msm_kona_dai_links + total_links,
  5212. msm_common_be_dai_links,
  5213. sizeof(msm_common_be_dai_links));
  5214. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  5215. memcpy(msm_kona_dai_links + total_links,
  5216. msm_wsa_cdc_dma_be_dai_links,
  5217. sizeof(msm_wsa_cdc_dma_be_dai_links));
  5218. total_links +=
  5219. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  5220. memcpy(msm_kona_dai_links + total_links,
  5221. msm_rx_tx_cdc_dma_be_dai_links,
  5222. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  5223. total_links +=
  5224. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  5225. memcpy(msm_kona_dai_links + total_links,
  5226. msm_va_cdc_dma_be_dai_links,
  5227. sizeof(msm_va_cdc_dma_be_dai_links));
  5228. total_links +=
  5229. ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
  5230. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  5231. &mi2s_audio_intf);
  5232. if (rc) {
  5233. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  5234. __func__);
  5235. } else {
  5236. if (mi2s_audio_intf) {
  5237. memcpy(msm_kona_dai_links + total_links,
  5238. msm_mi2s_be_dai_links,
  5239. sizeof(msm_mi2s_be_dai_links));
  5240. total_links +=
  5241. ARRAY_SIZE(msm_mi2s_be_dai_links);
  5242. }
  5243. }
  5244. rc = of_property_read_u32(dev->of_node,
  5245. "qcom,auxpcm-audio-intf",
  5246. &auxpcm_audio_intf);
  5247. if (rc) {
  5248. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  5249. __func__);
  5250. } else {
  5251. if (auxpcm_audio_intf) {
  5252. memcpy(msm_kona_dai_links + total_links,
  5253. msm_auxpcm_be_dai_links,
  5254. sizeof(msm_auxpcm_be_dai_links));
  5255. total_links +=
  5256. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  5257. }
  5258. }
  5259. rc = of_property_read_u32(dev->of_node,
  5260. "qcom,ext-disp-audio-rx", &val);
  5261. if (!rc && val) {
  5262. dev_dbg(dev, "%s(): ext disp audio support present\n",
  5263. __func__);
  5264. memcpy(msm_kona_dai_links + total_links,
  5265. ext_disp_be_dai_link,
  5266. sizeof(ext_disp_be_dai_link));
  5267. total_links += ARRAY_SIZE(ext_disp_be_dai_link);
  5268. }
  5269. rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
  5270. if (!rc && val) {
  5271. dev_dbg(dev, "%s(): WCN BT support present\n",
  5272. __func__);
  5273. memcpy(msm_kona_dai_links + total_links,
  5274. msm_wcn_be_dai_links,
  5275. sizeof(msm_wcn_be_dai_links));
  5276. total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
  5277. }
  5278. dailink = msm_kona_dai_links;
  5279. } else if(!strcmp(match->data, "stub_codec")) {
  5280. card = &snd_soc_card_stub_msm;
  5281. len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
  5282. len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
  5283. memcpy(msm_stub_dai_links,
  5284. msm_stub_fe_dai_links,
  5285. sizeof(msm_stub_fe_dai_links));
  5286. memcpy(msm_stub_dai_links + len_1,
  5287. msm_stub_be_dai_links,
  5288. sizeof(msm_stub_be_dai_links));
  5289. dailink = msm_stub_dai_links;
  5290. total_links = len_2;
  5291. }
  5292. if (card) {
  5293. card->dai_link = dailink;
  5294. card->num_links = total_links;
  5295. }
  5296. return card;
  5297. }
  5298. static int msm_wsa881x_init(struct snd_soc_component *component)
  5299. {
  5300. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5301. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  5302. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  5303. SPKR_L_BOOST, SPKR_L_VI};
  5304. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  5305. SPKR_R_BOOST, SPKR_R_VI};
  5306. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  5307. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  5308. struct msm_asoc_mach_data *pdata;
  5309. struct snd_soc_dapm_context *dapm;
  5310. struct snd_card *card;
  5311. struct snd_info_entry *entry;
  5312. int ret = 0;
  5313. if (!component) {
  5314. pr_err("%s component is NULL\n", __func__);
  5315. return -EINVAL;
  5316. }
  5317. card = component->card->snd_card;
  5318. dapm = snd_soc_component_get_dapm(component);
  5319. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  5320. dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
  5321. __func__, component->name);
  5322. wsa881x_set_channel_map(component, &spkleft_ports[0],
  5323. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5324. &ch_rate[0], &spkleft_port_types[0]);
  5325. if (dapm->component) {
  5326. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  5327. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  5328. }
  5329. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  5330. dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
  5331. __func__, component->name);
  5332. wsa881x_set_channel_map(component, &spkright_ports[0],
  5333. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  5334. &ch_rate[0], &spkright_port_types[0]);
  5335. if (dapm->component) {
  5336. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  5337. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  5338. }
  5339. } else {
  5340. dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
  5341. component->name);
  5342. ret = -EINVAL;
  5343. goto err;
  5344. }
  5345. pdata = snd_soc_card_get_drvdata(component->card);
  5346. if (!pdata->codec_root) {
  5347. entry = snd_info_create_subdir(card->module, "codecs",
  5348. card->proc_root);
  5349. if (!entry) {
  5350. pr_err("%s: Cannot create codecs module entry\n",
  5351. __func__);
  5352. ret = 0;
  5353. goto err;
  5354. }
  5355. pdata->codec_root = entry;
  5356. }
  5357. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  5358. component);
  5359. err:
  5360. return ret;
  5361. }
  5362. static int msm_aux_codec_init(struct snd_soc_component *component)
  5363. {
  5364. struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
  5365. int ret = 0;
  5366. void *mbhc_calibration;
  5367. struct snd_info_entry *entry;
  5368. struct snd_card *card = component->card->snd_card;
  5369. struct msm_asoc_mach_data *pdata;
  5370. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  5371. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  5372. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  5373. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  5374. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  5375. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  5376. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  5377. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  5378. snd_soc_dapm_sync(dapm);
  5379. pdata = snd_soc_card_get_drvdata(component->card);
  5380. if (!pdata->codec_root) {
  5381. entry = snd_info_create_subdir(card->module, "codecs",
  5382. card->proc_root);
  5383. if (!entry) {
  5384. dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
  5385. __func__);
  5386. ret = 0;
  5387. goto mbhc_cfg_cal;
  5388. }
  5389. pdata->codec_root = entry;
  5390. }
  5391. wcd938x_info_create_codec_entry(pdata->codec_root, component);
  5392. mbhc_cfg_cal:
  5393. mbhc_calibration = def_wcd_mbhc_cal();
  5394. if (!mbhc_calibration)
  5395. return -ENOMEM;
  5396. wcd_mbhc_cfg.calibration = mbhc_calibration;
  5397. ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
  5398. if (ret) {
  5399. dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
  5400. __func__, ret);
  5401. goto err_hs_detect;
  5402. }
  5403. return 0;
  5404. err_hs_detect:
  5405. kfree(mbhc_calibration);
  5406. return ret;
  5407. }
  5408. static int msm_init_aux_dev(struct platform_device *pdev,
  5409. struct snd_soc_card *card)
  5410. {
  5411. struct device_node *wsa_of_node;
  5412. struct device_node *aux_codec_of_node;
  5413. u32 wsa_max_devs;
  5414. u32 wsa_dev_cnt;
  5415. u32 codec_aux_dev_cnt = 0;
  5416. int i;
  5417. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  5418. struct aux_codec_dev_info *aux_cdc_dev_info;
  5419. const char *auxdev_name_prefix[1];
  5420. char *dev_name_str = NULL;
  5421. int found = 0;
  5422. int codecs_found = 0;
  5423. int ret = 0;
  5424. /* Get maximum WSA device count for this platform */
  5425. ret = of_property_read_u32(pdev->dev.of_node,
  5426. "qcom,wsa-max-devs", &wsa_max_devs);
  5427. if (ret) {
  5428. dev_info(&pdev->dev,
  5429. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  5430. __func__, pdev->dev.of_node->full_name, ret);
  5431. wsa_max_devs = 0;
  5432. goto codec_aux_dev;
  5433. }
  5434. if (wsa_max_devs == 0) {
  5435. dev_warn(&pdev->dev,
  5436. "%s: Max WSA devices is 0 for this target?\n",
  5437. __func__);
  5438. goto codec_aux_dev;
  5439. }
  5440. /* Get count of WSA device phandles for this platform */
  5441. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  5442. "qcom,wsa-devs", NULL);
  5443. if (wsa_dev_cnt == -ENOENT) {
  5444. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  5445. __func__);
  5446. goto err;
  5447. } else if (wsa_dev_cnt <= 0) {
  5448. dev_err(&pdev->dev,
  5449. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  5450. __func__, wsa_dev_cnt);
  5451. ret = -EINVAL;
  5452. goto err;
  5453. }
  5454. /*
  5455. * Expect total phandles count to be NOT less than maximum possible
  5456. * WSA count. However, if it is less, then assign same value to
  5457. * max count as well.
  5458. */
  5459. if (wsa_dev_cnt < wsa_max_devs) {
  5460. dev_dbg(&pdev->dev,
  5461. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  5462. __func__, wsa_max_devs, wsa_dev_cnt);
  5463. wsa_max_devs = wsa_dev_cnt;
  5464. }
  5465. /* Make sure prefix string passed for each WSA device */
  5466. ret = of_property_count_strings(pdev->dev.of_node,
  5467. "qcom,wsa-aux-dev-prefix");
  5468. if (ret != wsa_dev_cnt) {
  5469. dev_err(&pdev->dev,
  5470. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  5471. __func__, wsa_dev_cnt, ret);
  5472. ret = -EINVAL;
  5473. goto err;
  5474. }
  5475. /*
  5476. * Alloc mem to store phandle and index info of WSA device, if already
  5477. * registered with ALSA core
  5478. */
  5479. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  5480. sizeof(struct msm_wsa881x_dev_info),
  5481. GFP_KERNEL);
  5482. if (!wsa881x_dev_info) {
  5483. ret = -ENOMEM;
  5484. goto err;
  5485. }
  5486. /*
  5487. * search and check whether all WSA devices are already
  5488. * registered with ALSA core or not. If found a node, store
  5489. * the node and the index in a local array of struct for later
  5490. * use.
  5491. */
  5492. for (i = 0; i < wsa_dev_cnt; i++) {
  5493. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  5494. "qcom,wsa-devs", i);
  5495. if (unlikely(!wsa_of_node)) {
  5496. /* we should not be here */
  5497. dev_err(&pdev->dev,
  5498. "%s: wsa dev node is not present\n",
  5499. __func__);
  5500. ret = -EINVAL;
  5501. goto err;
  5502. }
  5503. if (soc_find_component(wsa_of_node, NULL)) {
  5504. /* WSA device registered with ALSA core */
  5505. wsa881x_dev_info[found].of_node = wsa_of_node;
  5506. wsa881x_dev_info[found].index = i;
  5507. found++;
  5508. if (found == wsa_max_devs)
  5509. break;
  5510. }
  5511. }
  5512. if (found < wsa_max_devs) {
  5513. dev_dbg(&pdev->dev,
  5514. "%s: failed to find %d components. Found only %d\n",
  5515. __func__, wsa_max_devs, found);
  5516. return -EPROBE_DEFER;
  5517. }
  5518. dev_info(&pdev->dev,
  5519. "%s: found %d wsa881x devices registered with ALSA core\n",
  5520. __func__, found);
  5521. codec_aux_dev:
  5522. /* Get count of aux codec device phandles for this platform */
  5523. codec_aux_dev_cnt = of_count_phandle_with_args(
  5524. pdev->dev.of_node,
  5525. "qcom,codec-aux-devs", NULL);
  5526. if (codec_aux_dev_cnt == -ENOENT) {
  5527. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  5528. __func__);
  5529. goto err;
  5530. } else if (codec_aux_dev_cnt <= 0) {
  5531. dev_err(&pdev->dev,
  5532. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  5533. __func__, codec_aux_dev_cnt);
  5534. ret = -EINVAL;
  5535. goto err;
  5536. }
  5537. /*
  5538. * Alloc mem to store phandle and index info of aux codec
  5539. * if already registered with ALSA core
  5540. */
  5541. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  5542. sizeof(struct aux_codec_dev_info),
  5543. GFP_KERNEL);
  5544. if (!aux_cdc_dev_info) {
  5545. ret = -ENOMEM;
  5546. goto err;
  5547. }
  5548. /*
  5549. * search and check whether all aux codecs are already
  5550. * registered with ALSA core or not. If found a node, store
  5551. * the node and the index in a local array of struct for later
  5552. * use.
  5553. */
  5554. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5555. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  5556. "qcom,codec-aux-devs", i);
  5557. if (unlikely(!aux_codec_of_node)) {
  5558. /* we should not be here */
  5559. dev_err(&pdev->dev,
  5560. "%s: aux codec dev node is not present\n",
  5561. __func__);
  5562. ret = -EINVAL;
  5563. goto err;
  5564. }
  5565. if (soc_find_component(aux_codec_of_node, NULL)) {
  5566. /* AUX codec registered with ALSA core */
  5567. aux_cdc_dev_info[codecs_found].of_node =
  5568. aux_codec_of_node;
  5569. aux_cdc_dev_info[codecs_found].index = i;
  5570. codecs_found++;
  5571. }
  5572. }
  5573. if (codecs_found < codec_aux_dev_cnt) {
  5574. dev_dbg(&pdev->dev,
  5575. "%s: failed to find %d components. Found only %d\n",
  5576. __func__, codec_aux_dev_cnt, codecs_found);
  5577. return -EPROBE_DEFER;
  5578. }
  5579. dev_info(&pdev->dev,
  5580. "%s: found %d AUX codecs registered with ALSA core\n",
  5581. __func__, codecs_found);
  5582. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  5583. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  5584. /* Alloc array of AUX devs struct */
  5585. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  5586. sizeof(struct snd_soc_aux_dev),
  5587. GFP_KERNEL);
  5588. if (!msm_aux_dev) {
  5589. ret = -ENOMEM;
  5590. goto err;
  5591. }
  5592. /* Alloc array of codec conf struct */
  5593. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  5594. sizeof(struct snd_soc_codec_conf),
  5595. GFP_KERNEL);
  5596. if (!msm_codec_conf) {
  5597. ret = -ENOMEM;
  5598. goto err;
  5599. }
  5600. for (i = 0; i < wsa_max_devs; i++) {
  5601. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  5602. GFP_KERNEL);
  5603. if (!dev_name_str) {
  5604. ret = -ENOMEM;
  5605. goto err;
  5606. }
  5607. ret = of_property_read_string_index(pdev->dev.of_node,
  5608. "qcom,wsa-aux-dev-prefix",
  5609. wsa881x_dev_info[i].index,
  5610. auxdev_name_prefix);
  5611. if (ret) {
  5612. dev_err(&pdev->dev,
  5613. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  5614. __func__, ret);
  5615. ret = -EINVAL;
  5616. goto err;
  5617. }
  5618. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  5619. msm_aux_dev[i].name = dev_name_str;
  5620. msm_aux_dev[i].codec_name = NULL;
  5621. msm_aux_dev[i].codec_of_node =
  5622. wsa881x_dev_info[i].of_node;
  5623. msm_aux_dev[i].init = msm_wsa881x_init;
  5624. msm_codec_conf[i].dev_name = NULL;
  5625. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  5626. msm_codec_conf[i].of_node =
  5627. wsa881x_dev_info[i].of_node;
  5628. }
  5629. for (i = 0; i < codec_aux_dev_cnt; i++) {
  5630. msm_aux_dev[wsa_max_devs + i].name = NULL;
  5631. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  5632. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  5633. aux_cdc_dev_info[i].of_node;
  5634. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  5635. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  5636. msm_codec_conf[wsa_max_devs + i].name_prefix =
  5637. NULL;
  5638. msm_codec_conf[wsa_max_devs + i].of_node =
  5639. aux_cdc_dev_info[i].of_node;
  5640. }
  5641. card->codec_conf = msm_codec_conf;
  5642. card->aux_dev = msm_aux_dev;
  5643. err:
  5644. return ret;
  5645. }
  5646. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  5647. {
  5648. int count = 0;
  5649. u32 mi2s_master_slave[MI2S_MAX];
  5650. int ret = 0;
  5651. for (count = 0; count < MI2S_MAX; count++) {
  5652. mutex_init(&mi2s_intf_conf[count].lock);
  5653. mi2s_intf_conf[count].ref_cnt = 0;
  5654. }
  5655. ret = of_property_read_u32_array(pdev->dev.of_node,
  5656. "qcom,msm-mi2s-master",
  5657. mi2s_master_slave, MI2S_MAX);
  5658. if (ret) {
  5659. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  5660. __func__);
  5661. } else {
  5662. for (count = 0; count < MI2S_MAX; count++) {
  5663. mi2s_intf_conf[count].msm_is_mi2s_master =
  5664. mi2s_master_slave[count];
  5665. }
  5666. }
  5667. }
  5668. static void msm_i2s_auxpcm_deinit(void)
  5669. {
  5670. int count = 0;
  5671. for (count = 0; count < MI2S_MAX; count++) {
  5672. mutex_destroy(&mi2s_intf_conf[count].lock);
  5673. mi2s_intf_conf[count].ref_cnt = 0;
  5674. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  5675. }
  5676. }
  5677. static int kona_ssr_enable(struct device *dev, void *data)
  5678. {
  5679. struct platform_device *pdev = to_platform_device(dev);
  5680. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5681. int ret = 0;
  5682. if (!card) {
  5683. dev_err(dev, "%s: card is NULL\n", __func__);
  5684. ret = -EINVAL;
  5685. goto err;
  5686. }
  5687. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5688. /* TODO */
  5689. dev_dbg(dev, "%s: TODO \n", __func__);
  5690. }
  5691. snd_soc_card_change_online_state(card, 1);
  5692. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  5693. err:
  5694. return ret;
  5695. }
  5696. static void kona_ssr_disable(struct device *dev, void *data)
  5697. {
  5698. struct platform_device *pdev = to_platform_device(dev);
  5699. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5700. if (!card) {
  5701. dev_err(dev, "%s: card is NULL\n", __func__);
  5702. return;
  5703. }
  5704. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  5705. snd_soc_card_change_online_state(card, 0);
  5706. if (!strcmp(card->name, "kona-stub-snd-card")) {
  5707. /* TODO */
  5708. dev_dbg(dev, "%s: TODO \n", __func__);
  5709. }
  5710. }
  5711. static const struct snd_event_ops kona_ssr_ops = {
  5712. .enable = kona_ssr_enable,
  5713. .disable = kona_ssr_disable,
  5714. };
  5715. static int msm_audio_ssr_compare(struct device *dev, void *data)
  5716. {
  5717. struct device_node *node = data;
  5718. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  5719. __func__, dev->of_node, node);
  5720. return (dev->of_node && dev->of_node == node);
  5721. }
  5722. static int msm_audio_ssr_register(struct device *dev)
  5723. {
  5724. struct device_node *np = dev->of_node;
  5725. struct snd_event_clients *ssr_clients = NULL;
  5726. struct device_node *node = NULL;
  5727. int ret = 0;
  5728. int i = 0;
  5729. for (i = 0; ; i++) {
  5730. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  5731. if (!node)
  5732. break;
  5733. snd_event_mstr_add_client(&ssr_clients,
  5734. msm_audio_ssr_compare, node);
  5735. }
  5736. ret = snd_event_master_register(dev, &kona_ssr_ops,
  5737. ssr_clients, NULL);
  5738. if (!ret)
  5739. snd_event_notify(dev, SND_EVENT_UP);
  5740. return ret;
  5741. }
  5742. static int msm_asoc_machine_probe(struct platform_device *pdev)
  5743. {
  5744. struct snd_soc_card *card = NULL;
  5745. struct msm_asoc_mach_data *pdata = NULL;
  5746. const char *mbhc_audio_jack_type = NULL;
  5747. int ret = 0;
  5748. if (!pdev->dev.of_node) {
  5749. dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
  5750. return -EINVAL;
  5751. }
  5752. pdata = devm_kzalloc(&pdev->dev,
  5753. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  5754. if (!pdata)
  5755. return -ENOMEM;
  5756. card = populate_snd_card_dailinks(&pdev->dev);
  5757. if (!card) {
  5758. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  5759. ret = -EINVAL;
  5760. goto err;
  5761. }
  5762. card->dev = &pdev->dev;
  5763. platform_set_drvdata(pdev, card);
  5764. snd_soc_card_set_drvdata(card, pdata);
  5765. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  5766. if (ret) {
  5767. dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
  5768. __func__, ret);
  5769. goto err;
  5770. }
  5771. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  5772. if (ret) {
  5773. dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
  5774. __func__, ret);
  5775. goto err;
  5776. }
  5777. ret = msm_populate_dai_link_component_of_node(card);
  5778. if (ret) {
  5779. ret = -EPROBE_DEFER;
  5780. goto err;
  5781. }
  5782. ret = msm_init_aux_dev(pdev, card);
  5783. if (ret)
  5784. goto err;
  5785. ret = devm_snd_soc_register_card(&pdev->dev, card);
  5786. if (ret == -EPROBE_DEFER) {
  5787. if (codec_reg_done)
  5788. ret = -EINVAL;
  5789. goto err;
  5790. } else if (ret) {
  5791. dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
  5792. __func__, ret);
  5793. goto err;
  5794. }
  5795. dev_info(&pdev->dev, "%s: Sound card %s registered\n",
  5796. __func__, card->name);
  5797. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5798. "qcom,hph-en1-gpio", 0);
  5799. if (!pdata->hph_en1_gpio_p) {
  5800. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5801. __func__, "qcom,hph-en1-gpio",
  5802. pdev->dev.of_node->full_name);
  5803. }
  5804. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5805. "qcom,hph-en0-gpio", 0);
  5806. if (!pdata->hph_en0_gpio_p) {
  5807. dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
  5808. __func__, "qcom,hph-en0-gpio",
  5809. pdev->dev.of_node->full_name);
  5810. }
  5811. ret = of_property_read_string(pdev->dev.of_node,
  5812. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  5813. if (ret) {
  5814. dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
  5815. __func__, "qcom,mbhc-audio-jack-type",
  5816. pdev->dev.of_node->full_name);
  5817. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  5818. } else {
  5819. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  5820. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5821. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  5822. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  5823. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5824. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  5825. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  5826. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  5827. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  5828. } else {
  5829. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  5830. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  5831. }
  5832. }
  5833. /*
  5834. * Parse US-Euro gpio info from DT. Report no error if us-euro
  5835. * entry is not found in DT file as some targets do not support
  5836. * US-Euro detection
  5837. */
  5838. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5839. "qcom,us-euro-gpios", 0);
  5840. if (!pdata->us_euro_gpio_p) {
  5841. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  5842. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  5843. } else {
  5844. dev_dbg(&pdev->dev, "%s detected\n",
  5845. "qcom,us-euro-gpios");
  5846. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  5847. }
  5848. if (wcd_mbhc_cfg.enable_usbc_analog)
  5849. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  5850. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  5851. "fsa4480-i2c-handle", 0);
  5852. if (!pdata->fsa_handle)
  5853. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  5854. "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
  5855. msm_i2s_auxpcm_init(pdev);
  5856. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5857. "qcom,cdc-dmic01-gpios",
  5858. 0);
  5859. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5860. "qcom,cdc-dmic23-gpios",
  5861. 0);
  5862. pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
  5863. "qcom,cdc-dmic45-gpios",
  5864. 0);
  5865. ret = msm_audio_ssr_register(&pdev->dev);
  5866. if (ret)
  5867. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  5868. __func__, ret);
  5869. is_initial_boot = true;
  5870. return 0;
  5871. err:
  5872. devm_kfree(&pdev->dev, pdata);
  5873. return ret;
  5874. }
  5875. static int msm_asoc_machine_remove(struct platform_device *pdev)
  5876. {
  5877. struct snd_soc_card *card = platform_get_drvdata(pdev);
  5878. snd_event_master_deregister(&pdev->dev);
  5879. snd_soc_unregister_card(card);
  5880. msm_i2s_auxpcm_deinit();
  5881. return 0;
  5882. }
  5883. static struct platform_driver kona_asoc_machine_driver = {
  5884. .driver = {
  5885. .name = DRV_NAME,
  5886. .owner = THIS_MODULE,
  5887. .pm = &snd_soc_pm_ops,
  5888. .of_match_table = kona_asoc_machine_of_match,
  5889. },
  5890. .probe = msm_asoc_machine_probe,
  5891. .remove = msm_asoc_machine_remove,
  5892. };
  5893. module_platform_driver(kona_asoc_machine_driver);
  5894. MODULE_DESCRIPTION("ALSA SoC msm");
  5895. MODULE_LICENSE("GPL v2");
  5896. MODULE_ALIAS("platform:" DRV_NAME);
  5897. MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);