main.c 119 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <linux/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. #define ICNSS_RECOVERY_TIMEOUT 60000
  78. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  79. #define ICNSS_CAL_TIMEOUT 40000
  80. static struct icnss_priv *penv;
  81. static struct work_struct wpss_loader;
  82. static struct work_struct wpss_ssr_work;
  83. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  84. #define ICNSS_EVENT_PENDING 2989
  85. #define ICNSS_EVENT_SYNC BIT(0)
  86. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  87. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  88. ICNSS_EVENT_SYNC)
  89. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  90. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  91. #define SMP2P_GET_MAX_RETRY 4
  92. #define SMP2P_GET_RETRY_DELAY_MS 500
  93. #define RAMDUMP_NUM_DEVICES 256
  94. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  95. #define WLAN_EN_TEMP_THRESHOLD 5000
  96. #define WLAN_EN_DELAY 500
  97. #define ICNSS_RPROC_LEN 10
  98. static DEFINE_IDA(rd_minor_id);
  99. enum icnss_pdr_cause_index {
  100. ICNSS_FW_CRASH,
  101. ICNSS_ROOT_PD_CRASH,
  102. ICNSS_ROOT_PD_SHUTDOWN,
  103. ICNSS_HOST_ERROR,
  104. };
  105. static const char * const icnss_pdr_cause[] = {
  106. [ICNSS_FW_CRASH] = "FW crash",
  107. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  108. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  109. [ICNSS_HOST_ERROR] = "Host error",
  110. };
  111. static void icnss_set_plat_priv(struct icnss_priv *priv)
  112. {
  113. penv = priv;
  114. }
  115. static struct icnss_priv *icnss_get_plat_priv(void)
  116. {
  117. return penv;
  118. }
  119. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  120. {
  121. if (priv && priv->rproc) {
  122. rproc_shutdown(priv->rproc);
  123. rproc_put(priv->rproc);
  124. priv->rproc = NULL;
  125. }
  126. }
  127. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  128. struct kobj_attribute *attr,
  129. const char *buf, size_t count)
  130. {
  131. struct icnss_priv *priv = icnss_get_plat_priv();
  132. icnss_pr_dbg("Received shutdown indication");
  133. atomic_set(&priv->is_shutdown, true);
  134. if (priv->wpss_supported && priv->device_id == ADRASTEA_DEVICE_ID)
  135. icnss_wpss_unload(priv);
  136. return count;
  137. }
  138. static struct kobj_attribute icnss_sysfs_attribute =
  139. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  140. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  141. {
  142. if (atomic_inc_return(&priv->pm_count) != 1)
  143. return;
  144. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  145. atomic_read(&priv->pm_count));
  146. pm_stay_awake(&priv->pdev->dev);
  147. priv->stats.pm_stay_awake++;
  148. }
  149. static void icnss_pm_relax(struct icnss_priv *priv)
  150. {
  151. int r = atomic_dec_return(&priv->pm_count);
  152. WARN_ON(r < 0);
  153. if (r != 0)
  154. return;
  155. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  156. atomic_read(&priv->pm_count));
  157. pm_relax(&priv->pdev->dev);
  158. priv->stats.pm_relax++;
  159. }
  160. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  161. {
  162. switch (type) {
  163. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  164. return "SERVER_ARRIVE";
  165. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  166. return "SERVER_EXIT";
  167. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  168. return "FW_READY";
  169. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  170. return "REGISTER_DRIVER";
  171. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  172. return "UNREGISTER_DRIVER";
  173. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  174. return "PD_SERVICE_DOWN";
  175. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  176. return "FW_EARLY_CRASH_IND";
  177. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  178. return "IDLE_SHUTDOWN";
  179. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  180. return "IDLE_RESTART";
  181. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  182. return "FW_INIT_DONE";
  183. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  184. return "QDSS_TRACE_REQ_MEM";
  185. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  186. return "QDSS_TRACE_SAVE";
  187. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  188. return "QDSS_TRACE_FREE";
  189. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  190. return "M3_DUMP_UPLOAD";
  191. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  192. return "QDSS_TRACE_REQ_DATA";
  193. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  194. return "SUBSYS_RESTART_LEVEL";
  195. case ICNSS_DRIVER_EVENT_MAX:
  196. return "EVENT_MAX";
  197. }
  198. return "UNKNOWN";
  199. };
  200. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  201. {
  202. switch (type) {
  203. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  204. return "SOC_WAKE_REQUEST";
  205. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  206. return "SOC_WAKE_RELEASE";
  207. case ICNSS_SOC_WAKE_EVENT_MAX:
  208. return "SOC_EVENT_MAX";
  209. }
  210. return "UNKNOWN";
  211. };
  212. int icnss_driver_event_post(struct icnss_priv *priv,
  213. enum icnss_driver_event_type type,
  214. u32 flags, void *data)
  215. {
  216. struct icnss_driver_event *event;
  217. unsigned long irq_flags;
  218. int gfp = GFP_KERNEL;
  219. int ret = 0;
  220. if (!priv)
  221. return -ENODEV;
  222. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  223. icnss_driver_event_to_str(type), type, current->comm,
  224. flags, priv->state);
  225. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  226. icnss_pr_err("Invalid Event type: %d, can't post", type);
  227. return -EINVAL;
  228. }
  229. if (in_interrupt() || irqs_disabled())
  230. gfp = GFP_ATOMIC;
  231. event = kzalloc(sizeof(*event), gfp);
  232. if (event == NULL)
  233. return -ENOMEM;
  234. icnss_pm_stay_awake(priv);
  235. event->type = type;
  236. event->data = data;
  237. init_completion(&event->complete);
  238. event->ret = ICNSS_EVENT_PENDING;
  239. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  240. spin_lock_irqsave(&priv->event_lock, irq_flags);
  241. list_add_tail(&event->list, &priv->event_list);
  242. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  243. priv->stats.events[type].posted++;
  244. queue_work(priv->event_wq, &priv->event_work);
  245. if (!(flags & ICNSS_EVENT_SYNC))
  246. goto out;
  247. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  248. wait_for_completion(&event->complete);
  249. else
  250. ret = wait_for_completion_interruptible(&event->complete);
  251. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  252. icnss_driver_event_to_str(type), type, priv->state, ret,
  253. event->ret);
  254. spin_lock_irqsave(&priv->event_lock, irq_flags);
  255. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  256. event->sync = false;
  257. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  258. ret = -EINTR;
  259. goto out;
  260. }
  261. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  262. ret = event->ret;
  263. kfree(event);
  264. out:
  265. icnss_pm_relax(priv);
  266. return ret;
  267. }
  268. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  269. enum icnss_soc_wake_event_type type,
  270. u32 flags, void *data)
  271. {
  272. struct icnss_soc_wake_event *event;
  273. unsigned long irq_flags;
  274. int gfp = GFP_KERNEL;
  275. int ret = 0;
  276. if (!priv)
  277. return -ENODEV;
  278. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  279. icnss_soc_wake_event_to_str(type),
  280. type, current->comm, flags, priv->state);
  281. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  282. icnss_pr_err("Invalid Event type: %d, can't post", type);
  283. return -EINVAL;
  284. }
  285. if (in_interrupt() || irqs_disabled())
  286. gfp = GFP_ATOMIC;
  287. event = kzalloc(sizeof(*event), gfp);
  288. if (!event)
  289. return -ENOMEM;
  290. icnss_pm_stay_awake(priv);
  291. event->type = type;
  292. event->data = data;
  293. init_completion(&event->complete);
  294. event->ret = ICNSS_EVENT_PENDING;
  295. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  296. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  297. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  298. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  299. priv->stats.soc_wake_events[type].posted++;
  300. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  301. if (!(flags & ICNSS_EVENT_SYNC))
  302. goto out;
  303. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  304. wait_for_completion(&event->complete);
  305. else
  306. ret = wait_for_completion_interruptible(&event->complete);
  307. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  308. icnss_soc_wake_event_to_str(type),
  309. type, priv->state, ret, event->ret);
  310. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  311. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  312. event->sync = false;
  313. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  314. ret = -EINTR;
  315. goto out;
  316. }
  317. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  318. ret = event->ret;
  319. kfree(event);
  320. out:
  321. icnss_pm_relax(priv);
  322. return ret;
  323. }
  324. bool icnss_is_fw_ready(void)
  325. {
  326. if (!penv)
  327. return false;
  328. else
  329. return test_bit(ICNSS_FW_READY, &penv->state);
  330. }
  331. EXPORT_SYMBOL(icnss_is_fw_ready);
  332. void icnss_block_shutdown(bool status)
  333. {
  334. if (!penv)
  335. return;
  336. if (status) {
  337. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  338. reinit_completion(&penv->unblock_shutdown);
  339. } else {
  340. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  341. complete(&penv->unblock_shutdown);
  342. }
  343. }
  344. EXPORT_SYMBOL(icnss_block_shutdown);
  345. bool icnss_is_fw_down(void)
  346. {
  347. struct icnss_priv *priv = icnss_get_plat_priv();
  348. if (!priv)
  349. return false;
  350. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  351. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  352. test_bit(ICNSS_REJUVENATE, &priv->state);
  353. }
  354. EXPORT_SYMBOL(icnss_is_fw_down);
  355. unsigned long icnss_get_device_config(void)
  356. {
  357. struct icnss_priv *priv = icnss_get_plat_priv();
  358. if (!priv)
  359. return 0;
  360. return priv->device_config;
  361. }
  362. EXPORT_SYMBOL(icnss_get_device_config);
  363. bool icnss_is_rejuvenate(void)
  364. {
  365. if (!penv)
  366. return false;
  367. else
  368. return test_bit(ICNSS_REJUVENATE, &penv->state);
  369. }
  370. EXPORT_SYMBOL(icnss_is_rejuvenate);
  371. bool icnss_is_pdr(void)
  372. {
  373. if (!penv)
  374. return false;
  375. else
  376. return test_bit(ICNSS_PDR, &penv->state);
  377. }
  378. EXPORT_SYMBOL(icnss_is_pdr);
  379. static int icnss_send_smp2p(struct icnss_priv *priv,
  380. enum icnss_smp2p_msg_id msg_id,
  381. enum smp2p_out_entry smp2p_entry)
  382. {
  383. unsigned int value = 0;
  384. int ret;
  385. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  386. return -EINVAL;
  387. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  388. if (msg_id == ICNSS_RESET_MSG) {
  389. priv->smp2p_info[smp2p_entry].seq = 0;
  390. ret = qcom_smem_state_update_bits(
  391. priv->smp2p_info[smp2p_entry].smem_state,
  392. ICNSS_SMEM_VALUE_MASK,
  393. 0);
  394. if (ret)
  395. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  396. ret, icnss_smp2p_str[smp2p_entry]);
  397. return ret;
  398. }
  399. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  400. return -ENODEV;
  401. value |= priv->smp2p_info[smp2p_entry].seq++;
  402. value <<= ICNSS_SMEM_SEQ_NO_POS;
  403. value |= msg_id;
  404. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  405. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  406. reinit_completion(&penv->smp2p_soc_wake_wait);
  407. ret = qcom_smem_state_update_bits(
  408. priv->smp2p_info[smp2p_entry].smem_state,
  409. ICNSS_SMEM_VALUE_MASK,
  410. value);
  411. if (ret) {
  412. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  413. icnss_smp2p_str[smp2p_entry]);
  414. } else {
  415. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  416. msg_id == ICNSS_SOC_WAKE_REL) {
  417. if (!wait_for_completion_timeout(
  418. &priv->smp2p_soc_wake_wait,
  419. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  420. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  421. icnss_smp2p_str[smp2p_entry]);
  422. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  423. ICNSS_ASSERT(0);
  424. }
  425. }
  426. }
  427. return ret;
  428. }
  429. bool icnss_is_low_power(void)
  430. {
  431. if (!penv)
  432. return false;
  433. else
  434. return test_bit(ICNSS_LOW_POWER, &penv->state);
  435. }
  436. EXPORT_SYMBOL(icnss_is_low_power);
  437. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  438. {
  439. struct icnss_priv *priv = ctx;
  440. if (priv)
  441. priv->force_err_fatal = true;
  442. icnss_pr_err("Received force error fatal request from FW\n");
  443. return IRQ_HANDLED;
  444. }
  445. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  446. {
  447. struct icnss_priv *priv = ctx;
  448. struct icnss_uevent_fw_down_data fw_down_data = {0};
  449. icnss_pr_err("Received early crash indication from FW\n");
  450. if (priv->wpss_self_recovery_enabled)
  451. mod_timer(&priv->wpss_ssr_timer,
  452. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  453. if (priv) {
  454. set_bit(ICNSS_FW_DOWN, &priv->state);
  455. icnss_ignore_fw_timeout(true);
  456. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  457. clear_bit(ICNSS_FW_READY, &priv->state);
  458. fw_down_data.crashed = true;
  459. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  460. &fw_down_data);
  461. }
  462. }
  463. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  464. 0, NULL);
  465. return IRQ_HANDLED;
  466. }
  467. static void register_fw_error_notifications(struct device *dev)
  468. {
  469. struct icnss_priv *priv = dev_get_drvdata(dev);
  470. struct device_node *dev_node;
  471. int irq = 0, ret = 0;
  472. if (!priv)
  473. return;
  474. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  475. if (!dev_node) {
  476. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  477. return;
  478. }
  479. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  480. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  481. ret = irq = of_irq_get_byname(dev_node,
  482. "qcom,smp2p-force-fatal-error");
  483. if (ret < 0) {
  484. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  485. irq);
  486. return;
  487. }
  488. }
  489. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  490. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  491. "wlanfw-err", priv);
  492. if (ret < 0) {
  493. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  494. irq, ret);
  495. return;
  496. }
  497. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  498. priv->fw_error_fatal_irq = irq;
  499. }
  500. static void register_early_crash_notifications(struct device *dev)
  501. {
  502. struct icnss_priv *priv = dev_get_drvdata(dev);
  503. struct device_node *dev_node;
  504. int irq = 0, ret = 0;
  505. if (!priv)
  506. return;
  507. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  508. if (!dev_node) {
  509. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  510. return;
  511. }
  512. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  513. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  514. ret = irq = of_irq_get_byname(dev_node,
  515. "qcom,smp2p-early-crash-ind");
  516. if (ret < 0) {
  517. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  518. irq);
  519. return;
  520. }
  521. }
  522. ret = devm_request_threaded_irq(dev, irq, NULL,
  523. fw_crash_indication_handler,
  524. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  525. "wlanfw-early-crash-ind", priv);
  526. if (ret < 0) {
  527. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  528. irq, ret);
  529. return;
  530. }
  531. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  532. priv->fw_early_crash_irq = irq;
  533. }
  534. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  535. {
  536. struct thermal_zone_device *thermal_dev;
  537. const char *tsens;
  538. int ret;
  539. ret = of_property_read_string(priv->pdev->dev.of_node,
  540. "tsens",
  541. &tsens);
  542. if (ret)
  543. return ret;
  544. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  545. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  546. if (IS_ERR(thermal_dev)) {
  547. icnss_pr_err("Fail to get thermal zone. ret: %d",
  548. PTR_ERR(thermal_dev));
  549. return PTR_ERR(thermal_dev);
  550. }
  551. ret = thermal_zone_get_temp(thermal_dev, temp);
  552. if (ret)
  553. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  554. return ret;
  555. }
  556. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  557. {
  558. struct icnss_priv *priv = ctx;
  559. if (priv)
  560. complete(&priv->smp2p_soc_wake_wait);
  561. return IRQ_HANDLED;
  562. }
  563. static void register_soc_wake_notif(struct device *dev)
  564. {
  565. struct icnss_priv *priv = dev_get_drvdata(dev);
  566. struct device_node *dev_node;
  567. int irq = 0, ret = 0;
  568. if (!priv)
  569. return;
  570. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  571. if (!dev_node) {
  572. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  573. return;
  574. }
  575. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  576. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  577. ret = irq = of_irq_get_byname(dev_node,
  578. "qcom,smp2p-soc-wake-ack");
  579. if (ret < 0) {
  580. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  581. irq);
  582. return;
  583. }
  584. }
  585. ret = devm_request_threaded_irq(dev, irq, NULL,
  586. fw_soc_wake_ack_handler,
  587. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  588. IRQF_TRIGGER_FALLING,
  589. "wlanfw-soc-wake-ack", priv);
  590. if (ret < 0) {
  591. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  592. irq, ret);
  593. return;
  594. }
  595. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  596. priv->fw_soc_wake_ack_irq = irq;
  597. }
  598. int icnss_call_driver_uevent(struct icnss_priv *priv,
  599. enum icnss_uevent uevent, void *data)
  600. {
  601. struct icnss_uevent_data uevent_data;
  602. if (!priv->ops || !priv->ops->uevent)
  603. return 0;
  604. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  605. priv->state, uevent);
  606. uevent_data.uevent = uevent;
  607. uevent_data.data = data;
  608. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  609. }
  610. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  611. {
  612. int i;
  613. int ret = 0;
  614. ret = icnss_qmi_get_dms_mac(priv);
  615. if (ret == 0 && priv->dms.mac_valid)
  616. goto qmi_send;
  617. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  618. * Thus assert on failure to get MAC from DMS even after retries
  619. */
  620. if (priv->use_nv_mac) {
  621. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  622. if (priv->dms.mac_valid)
  623. break;
  624. ret = icnss_qmi_get_dms_mac(priv);
  625. if (ret != -EAGAIN)
  626. break;
  627. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  628. }
  629. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  630. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  631. ICNSS_ASSERT(0);
  632. return -EINVAL;
  633. }
  634. }
  635. qmi_send:
  636. if (priv->dms.mac_valid)
  637. ret =
  638. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  639. ARRAY_SIZE(priv->dms.mac));
  640. return ret;
  641. }
  642. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  643. enum smp2p_out_entry smp2p_entry)
  644. {
  645. int retry = 0;
  646. int error;
  647. if (priv->smp2p_info[smp2p_entry].smem_state)
  648. return;
  649. retry:
  650. priv->smp2p_info[smp2p_entry].smem_state =
  651. qcom_smem_state_get(&priv->pdev->dev,
  652. icnss_smp2p_str[smp2p_entry],
  653. &priv->smp2p_info[smp2p_entry].smem_bit);
  654. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  655. if (retry++ < SMP2P_GET_MAX_RETRY) {
  656. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  657. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  658. error, icnss_smp2p_str[smp2p_entry]);
  659. msleep(SMP2P_GET_RETRY_DELAY_MS);
  660. goto retry;
  661. }
  662. ICNSS_ASSERT(0);
  663. return;
  664. }
  665. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  666. }
  667. static inline
  668. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  669. {
  670. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  671. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  672. } else {
  673. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  674. }
  675. }
  676. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  677. {
  678. switch (val) {
  679. case WLAN_RF_SLATE:
  680. return WLFW_WLAN_RF_SLATE_V01;
  681. case WLAN_RF_APACHE:
  682. return WLFW_WLAN_RF_APACHE_V01;
  683. default:
  684. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  685. }
  686. }
  687. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  688. void *data)
  689. {
  690. int ret = 0;
  691. int temp = 0;
  692. bool ignore_assert = false;
  693. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  694. if (!priv)
  695. return -ENODEV;
  696. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  697. clear_bit(ICNSS_FW_DOWN, &priv->state);
  698. clear_bit(ICNSS_FW_READY, &priv->state);
  699. icnss_ignore_fw_timeout(false);
  700. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  701. icnss_pr_err("QMI Server already in Connected State\n");
  702. ICNSS_ASSERT(0);
  703. }
  704. ret = icnss_connect_to_fw_server(priv, data);
  705. if (ret)
  706. goto fail;
  707. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  708. if (priv->is_slate_rfa) {
  709. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  710. reinit_completion(&priv->slate_boot_complete);
  711. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  712. priv->state);
  713. wait_for_completion(&priv->slate_boot_complete);
  714. }
  715. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  716. icnss_pr_info("sent wlan boot init command\n");
  717. }
  718. ret = wlfw_ind_register_send_sync_msg(priv);
  719. if (ret < 0) {
  720. if (ret == -EALREADY) {
  721. ret = 0;
  722. goto qmi_registered;
  723. }
  724. ignore_assert = true;
  725. goto fail;
  726. }
  727. if (priv->is_rf_subtype_valid) {
  728. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  729. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  730. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  731. if (ret < 0)
  732. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  733. ret);
  734. } else {
  735. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  736. priv->rf_subtype);
  737. }
  738. }
  739. if (priv->device_id == WCN6750_DEVICE_ID) {
  740. if (!icnss_get_temperature(priv, &temp)) {
  741. icnss_pr_dbg("Temperature: %d\n", temp);
  742. if (temp < WLAN_EN_TEMP_THRESHOLD)
  743. icnss_set_wlan_en_delay(priv);
  744. }
  745. ret = wlfw_host_cap_send_sync(priv);
  746. if (ret < 0)
  747. goto fail;
  748. }
  749. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  750. if (!priv->msa_va) {
  751. icnss_pr_err("Invalid MSA address\n");
  752. ret = -EINVAL;
  753. goto fail;
  754. }
  755. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  756. if (ret < 0) {
  757. ignore_assert = true;
  758. goto fail;
  759. }
  760. ret = wlfw_msa_ready_send_sync_msg(priv);
  761. if (ret < 0) {
  762. ignore_assert = true;
  763. goto fail;
  764. }
  765. }
  766. ret = wlfw_cap_send_sync_msg(priv);
  767. if (ret < 0) {
  768. ignore_assert = true;
  769. goto fail;
  770. }
  771. ret = icnss_hw_power_on(priv);
  772. if (ret)
  773. goto fail;
  774. if (priv->device_id == WCN6750_DEVICE_ID) {
  775. ret = wlfw_device_info_send_msg(priv);
  776. if (ret < 0) {
  777. ignore_assert = true;
  778. goto device_info_failure;
  779. }
  780. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  781. priv->mem_base_pa,
  782. priv->mem_base_size);
  783. if (!priv->mem_base_va) {
  784. icnss_pr_err("Ioremap failed for bar address\n");
  785. goto device_info_failure;
  786. }
  787. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  788. &priv->mem_base_pa,
  789. priv->mem_base_va);
  790. if (priv->mhi_state_info_pa)
  791. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  792. priv->mhi_state_info_pa,
  793. PAGE_SIZE);
  794. if (!priv->mhi_state_info_va)
  795. icnss_pr_err("Ioremap failed for MHI info address\n");
  796. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  797. &priv->mhi_state_info_pa,
  798. priv->mhi_state_info_va);
  799. }
  800. if (priv->bdf_download_support) {
  801. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  802. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  803. priv->ctrl_params.bdf_type);
  804. if (ret < 0)
  805. goto device_info_failure;
  806. }
  807. if (priv->device_id == WCN6750_DEVICE_ID) {
  808. if (!priv->fw_soc_wake_ack_irq)
  809. register_soc_wake_notif(&priv->pdev->dev);
  810. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  811. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  812. }
  813. if (priv->wpss_supported)
  814. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  815. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  816. if (priv->bdf_download_support) {
  817. ret = wlfw_cal_report_req(priv);
  818. if (ret < 0)
  819. goto device_info_failure;
  820. }
  821. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  822. dynamic_feature_mask);
  823. }
  824. if (!priv->fw_error_fatal_irq)
  825. register_fw_error_notifications(&priv->pdev->dev);
  826. if (!priv->fw_early_crash_irq)
  827. register_early_crash_notifications(&priv->pdev->dev);
  828. if (priv->psf_supported)
  829. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  830. return ret;
  831. device_info_failure:
  832. icnss_hw_power_off(priv);
  833. fail:
  834. ICNSS_ASSERT(ignore_assert);
  835. qmi_registered:
  836. return ret;
  837. }
  838. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  839. {
  840. if (!priv)
  841. return -ENODEV;
  842. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  843. icnss_clear_server(priv);
  844. if (priv->psf_supported)
  845. priv->last_updated_voltage = 0;
  846. return 0;
  847. }
  848. static int icnss_call_driver_probe(struct icnss_priv *priv)
  849. {
  850. int ret = 0;
  851. int probe_cnt = 0;
  852. if (!priv->ops || !priv->ops->probe)
  853. return 0;
  854. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  855. return -EINVAL;
  856. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  857. icnss_hw_power_on(priv);
  858. icnss_block_shutdown(true);
  859. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  860. ret = priv->ops->probe(&priv->pdev->dev);
  861. probe_cnt++;
  862. if (ret != -EPROBE_DEFER)
  863. break;
  864. }
  865. if (ret < 0) {
  866. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  867. ret, priv->state, probe_cnt);
  868. icnss_block_shutdown(false);
  869. goto out;
  870. }
  871. icnss_block_shutdown(false);
  872. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  873. return 0;
  874. out:
  875. icnss_hw_power_off(priv);
  876. return ret;
  877. }
  878. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  879. {
  880. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  881. goto out;
  882. if (!priv->ops || !priv->ops->shutdown)
  883. goto out;
  884. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  885. goto out;
  886. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  887. priv->ops->shutdown(&priv->pdev->dev);
  888. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  889. out:
  890. return 0;
  891. }
  892. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  893. {
  894. int ret = 0;
  895. icnss_pm_relax(priv);
  896. icnss_call_driver_shutdown(priv);
  897. clear_bit(ICNSS_PDR, &priv->state);
  898. clear_bit(ICNSS_REJUVENATE, &priv->state);
  899. clear_bit(ICNSS_PD_RESTART, &priv->state);
  900. clear_bit(ICNSS_LOW_POWER, &priv->state);
  901. priv->early_crash_ind = false;
  902. priv->is_ssr = false;
  903. if (!priv->ops || !priv->ops->reinit)
  904. goto out;
  905. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  906. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  907. priv->state);
  908. goto out;
  909. }
  910. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  911. goto call_probe;
  912. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  913. icnss_hw_power_on(priv);
  914. icnss_block_shutdown(true);
  915. ret = priv->ops->reinit(&priv->pdev->dev);
  916. if (ret < 0) {
  917. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  918. ret, priv->state);
  919. if (!priv->allow_recursive_recovery)
  920. ICNSS_ASSERT(false);
  921. icnss_block_shutdown(false);
  922. goto out_power_off;
  923. }
  924. icnss_block_shutdown(false);
  925. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  926. return 0;
  927. call_probe:
  928. return icnss_call_driver_probe(priv);
  929. out_power_off:
  930. icnss_hw_power_off(priv);
  931. out:
  932. return ret;
  933. }
  934. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  935. {
  936. int ret = 0;
  937. if (!priv)
  938. return -ENODEV;
  939. del_timer(&priv->recovery_timer);
  940. set_bit(ICNSS_FW_READY, &priv->state);
  941. clear_bit(ICNSS_MODE_ON, &priv->state);
  942. atomic_set(&priv->soc_wake_ref_count, 0);
  943. if (priv->device_id == WCN6750_DEVICE_ID)
  944. icnss_free_qdss_mem(priv);
  945. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  946. icnss_hw_power_off(priv);
  947. if (!priv->pdev) {
  948. icnss_pr_err("Device is not ready\n");
  949. ret = -ENODEV;
  950. goto out;
  951. }
  952. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  953. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  954. icnss_pr_info("sent wlan boot complete command\n");
  955. }
  956. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  957. ret = icnss_pd_restart_complete(priv);
  958. } else {
  959. if (priv->wpss_supported)
  960. icnss_setup_dms_mac(priv);
  961. ret = icnss_call_driver_probe(priv);
  962. }
  963. icnss_vreg_unvote(priv);
  964. out:
  965. return ret;
  966. }
  967. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  968. {
  969. int ret = 0;
  970. if (!priv)
  971. return -ENODEV;
  972. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  973. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  974. icnss_pr_info("Failed to download qdss configuration file");
  975. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  976. mod_timer(&priv->recovery_timer,
  977. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  978. ret = wlfw_wlan_mode_send_sync_msg(priv,
  979. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  980. } else {
  981. icnss_driver_event_fw_ready_ind(priv, NULL);
  982. }
  983. return ret;
  984. }
  985. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  986. {
  987. struct platform_device *pdev = priv->pdev;
  988. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  989. int i, j;
  990. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  991. if (!qdss_mem[i].va && qdss_mem[i].size) {
  992. qdss_mem[i].va =
  993. dma_alloc_coherent(&pdev->dev,
  994. qdss_mem[i].size,
  995. &qdss_mem[i].pa,
  996. GFP_KERNEL);
  997. if (!qdss_mem[i].va) {
  998. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  999. qdss_mem[i].size,
  1000. qdss_mem[i].type, i);
  1001. break;
  1002. }
  1003. }
  1004. }
  1005. /* Best-effort allocation for QDSS trace */
  1006. if (i < priv->qdss_mem_seg_len) {
  1007. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1008. qdss_mem[j].type = 0;
  1009. qdss_mem[j].size = 0;
  1010. }
  1011. priv->qdss_mem_seg_len = i;
  1012. }
  1013. return 0;
  1014. }
  1015. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1016. {
  1017. struct platform_device *pdev = priv->pdev;
  1018. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1019. int i;
  1020. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1021. if (qdss_mem[i].va && qdss_mem[i].size) {
  1022. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1023. &qdss_mem[i].pa, qdss_mem[i].size,
  1024. qdss_mem[i].type);
  1025. dma_free_coherent(&pdev->dev,
  1026. qdss_mem[i].size, qdss_mem[i].va,
  1027. qdss_mem[i].pa);
  1028. qdss_mem[i].va = NULL;
  1029. qdss_mem[i].pa = 0;
  1030. qdss_mem[i].size = 0;
  1031. qdss_mem[i].type = 0;
  1032. }
  1033. }
  1034. priv->qdss_mem_seg_len = 0;
  1035. }
  1036. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1037. {
  1038. int ret = 0;
  1039. ret = icnss_alloc_qdss_mem(priv);
  1040. if (ret < 0)
  1041. return ret;
  1042. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1043. }
  1044. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1045. u64 pa, u32 size, int *seg_id)
  1046. {
  1047. int i = 0;
  1048. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1049. u64 offset = 0;
  1050. void *va = NULL;
  1051. u64 local_pa;
  1052. u32 local_size;
  1053. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1054. local_pa = (u64)qdss_mem[i].pa;
  1055. local_size = (u32)qdss_mem[i].size;
  1056. if (pa == local_pa && size <= local_size) {
  1057. va = qdss_mem[i].va;
  1058. break;
  1059. }
  1060. if (pa > local_pa &&
  1061. pa < local_pa + local_size &&
  1062. pa + size <= local_pa + local_size) {
  1063. offset = pa - local_pa;
  1064. va = qdss_mem[i].va + offset;
  1065. break;
  1066. }
  1067. }
  1068. *seg_id = i;
  1069. return va;
  1070. }
  1071. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1072. void *data)
  1073. {
  1074. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1075. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1076. int ret = 0;
  1077. int i;
  1078. void *va = NULL;
  1079. u64 pa;
  1080. u32 size;
  1081. int seg_id = 0;
  1082. if (!priv->qdss_mem_seg_len) {
  1083. icnss_pr_err("Memory for QDSS trace is not available\n");
  1084. return -ENOMEM;
  1085. }
  1086. if (event_data->mem_seg_len == 0) {
  1087. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1088. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1089. ICNSS_GENL_MSG_TYPE_QDSS,
  1090. event_data->file_name,
  1091. qdss_mem[i].size);
  1092. if (ret < 0) {
  1093. icnss_pr_err("Fail to save QDSS data: %d\n",
  1094. ret);
  1095. break;
  1096. }
  1097. }
  1098. } else {
  1099. for (i = 0; i < event_data->mem_seg_len; i++) {
  1100. pa = event_data->mem_seg[i].addr;
  1101. size = event_data->mem_seg[i].size;
  1102. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1103. size, &seg_id);
  1104. if (!va) {
  1105. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1106. &pa);
  1107. ret = -EINVAL;
  1108. break;
  1109. }
  1110. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1111. event_data->file_name, size);
  1112. if (ret < 0) {
  1113. icnss_pr_err("Fail to save QDSS data: %d\n",
  1114. ret);
  1115. break;
  1116. }
  1117. }
  1118. }
  1119. kfree(data);
  1120. return ret;
  1121. }
  1122. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1123. {
  1124. int dec, c = atomic_read(v);
  1125. do {
  1126. dec = c - 1;
  1127. if (unlikely(dec < 1))
  1128. break;
  1129. } while (!atomic_try_cmpxchg(v, &c, dec));
  1130. return dec;
  1131. }
  1132. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1133. void *data)
  1134. {
  1135. int ret = 0;
  1136. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1137. if (!priv)
  1138. return -ENODEV;
  1139. if (!data)
  1140. return -EINVAL;
  1141. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1142. event_data->total_size);
  1143. kfree(data);
  1144. return ret;
  1145. }
  1146. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1147. {
  1148. int ret = 0;
  1149. if (!priv)
  1150. return -ENODEV;
  1151. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1152. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1153. atomic_read(&priv->soc_wake_ref_count));
  1154. return 0;
  1155. }
  1156. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1157. ICNSS_SMP2P_OUT_SOC_WAKE);
  1158. if (!ret)
  1159. atomic_inc(&priv->soc_wake_ref_count);
  1160. return ret;
  1161. }
  1162. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1163. {
  1164. int ret = 0;
  1165. if (!priv)
  1166. return -ENODEV;
  1167. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1168. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1169. priv->soc_wake_ref_count);
  1170. return 0;
  1171. }
  1172. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1173. ICNSS_SMP2P_OUT_SOC_WAKE);
  1174. return ret;
  1175. }
  1176. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1177. void *data)
  1178. {
  1179. int ret = 0;
  1180. int probe_cnt = 0;
  1181. if (priv->ops)
  1182. return -EEXIST;
  1183. priv->ops = data;
  1184. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1185. set_bit(ICNSS_FW_READY, &priv->state);
  1186. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1187. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1188. priv->state);
  1189. return -ENODEV;
  1190. }
  1191. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1192. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1193. priv->state);
  1194. goto out;
  1195. }
  1196. ret = icnss_hw_power_on(priv);
  1197. if (ret)
  1198. goto out;
  1199. icnss_block_shutdown(true);
  1200. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1201. ret = priv->ops->probe(&priv->pdev->dev);
  1202. probe_cnt++;
  1203. if (ret != -EPROBE_DEFER)
  1204. break;
  1205. }
  1206. if (ret) {
  1207. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1208. ret, priv->state, probe_cnt);
  1209. icnss_block_shutdown(false);
  1210. goto power_off;
  1211. }
  1212. icnss_block_shutdown(false);
  1213. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1214. return 0;
  1215. power_off:
  1216. icnss_hw_power_off(priv);
  1217. out:
  1218. return ret;
  1219. }
  1220. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1221. void *data)
  1222. {
  1223. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1224. priv->ops = NULL;
  1225. goto out;
  1226. }
  1227. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1228. icnss_block_shutdown(true);
  1229. if (priv->ops)
  1230. priv->ops->remove(&priv->pdev->dev);
  1231. icnss_block_shutdown(false);
  1232. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1233. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1234. priv->ops = NULL;
  1235. icnss_hw_power_off(priv);
  1236. out:
  1237. return 0;
  1238. }
  1239. static int icnss_fw_crashed(struct icnss_priv *priv,
  1240. struct icnss_event_pd_service_down_data *event_data)
  1241. {
  1242. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1243. set_bit(ICNSS_PD_RESTART, &priv->state);
  1244. clear_bit(ICNSS_FW_READY, &priv->state);
  1245. icnss_pm_stay_awake(priv);
  1246. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1247. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1248. if (event_data && event_data->fw_rejuvenate)
  1249. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1250. return 0;
  1251. }
  1252. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1253. struct icnss_uevent_hang_data *hang_data)
  1254. {
  1255. if (!priv->hang_event_data_va)
  1256. return -EINVAL;
  1257. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1258. priv->hang_event_data_len,
  1259. GFP_ATOMIC);
  1260. if (!priv->hang_event_data)
  1261. return -ENOMEM;
  1262. // Update the hang event params
  1263. hang_data->hang_event_data = priv->hang_event_data;
  1264. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1265. return 0;
  1266. }
  1267. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1268. {
  1269. struct icnss_uevent_hang_data hang_data = {0};
  1270. int ret = 0xFF;
  1271. if (priv->early_crash_ind) {
  1272. ret = icnss_update_hang_event_data(priv, &hang_data);
  1273. if (ret)
  1274. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1275. }
  1276. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1277. &hang_data);
  1278. if (!ret) {
  1279. kfree(priv->hang_event_data);
  1280. priv->hang_event_data = NULL;
  1281. }
  1282. return 0;
  1283. }
  1284. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1285. void *data)
  1286. {
  1287. struct icnss_event_pd_service_down_data *event_data = data;
  1288. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1289. icnss_ignore_fw_timeout(false);
  1290. goto out;
  1291. }
  1292. if (priv->force_err_fatal)
  1293. ICNSS_ASSERT(0);
  1294. if (priv->device_id == WCN6750_DEVICE_ID) {
  1295. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1296. ICNSS_SMP2P_OUT_SOC_WAKE);
  1297. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1298. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1299. }
  1300. if (priv->wpss_supported)
  1301. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1302. ICNSS_SMP2P_OUT_POWER_SAVE);
  1303. icnss_send_hang_event_data(priv);
  1304. if (priv->early_crash_ind) {
  1305. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1306. event_data->crashed, priv->state);
  1307. goto out;
  1308. }
  1309. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1310. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1311. event_data->crashed, priv->state);
  1312. if (!priv->allow_recursive_recovery)
  1313. ICNSS_ASSERT(0);
  1314. goto out;
  1315. }
  1316. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1317. icnss_fw_crashed(priv, event_data);
  1318. out:
  1319. kfree(data);
  1320. return 0;
  1321. }
  1322. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1323. void *data)
  1324. {
  1325. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1326. icnss_ignore_fw_timeout(false);
  1327. goto out;
  1328. }
  1329. priv->early_crash_ind = true;
  1330. icnss_fw_crashed(priv, NULL);
  1331. out:
  1332. kfree(data);
  1333. return 0;
  1334. }
  1335. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1336. void *data)
  1337. {
  1338. int ret = 0;
  1339. if (!priv->ops || !priv->ops->idle_shutdown)
  1340. return 0;
  1341. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1342. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1343. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1344. ret = -EBUSY;
  1345. } else {
  1346. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1347. priv->state);
  1348. icnss_block_shutdown(true);
  1349. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1350. icnss_block_shutdown(false);
  1351. }
  1352. return ret;
  1353. }
  1354. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1355. void *data)
  1356. {
  1357. int ret = 0;
  1358. if (!priv->ops || !priv->ops->idle_restart)
  1359. return 0;
  1360. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1361. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1362. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1363. ret = -EBUSY;
  1364. } else {
  1365. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1366. priv->state);
  1367. icnss_block_shutdown(true);
  1368. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1369. icnss_block_shutdown(false);
  1370. }
  1371. return ret;
  1372. }
  1373. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1374. {
  1375. icnss_free_qdss_mem(priv);
  1376. return 0;
  1377. }
  1378. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1379. void *data)
  1380. {
  1381. struct icnss_m3_upload_segments_req_data *event_data = data;
  1382. struct qcom_dump_segment segment;
  1383. int i, status = 0, ret = 0;
  1384. struct list_head head;
  1385. if (!dump_enabled()) {
  1386. icnss_pr_info("Dump collection is not enabled\n");
  1387. return ret;
  1388. }
  1389. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1390. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1391. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1392. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1393. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1394. return ret;
  1395. INIT_LIST_HEAD(&head);
  1396. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1397. memset(&segment, 0, sizeof(segment));
  1398. segment.va = devm_ioremap(&priv->pdev->dev,
  1399. event_data->m3_segment[i].addr,
  1400. event_data->m3_segment[i].size);
  1401. if (!segment.va) {
  1402. icnss_pr_err("Failed to ioremap M3 Dump region");
  1403. ret = -ENOMEM;
  1404. goto send_resp;
  1405. }
  1406. segment.size = event_data->m3_segment[i].size;
  1407. list_add(&segment.node, &head);
  1408. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1409. event_data->m3_segment[i].name);
  1410. switch (event_data->m3_segment[i].type) {
  1411. case QMI_M3_SEGMENT_PHYAREG_V01:
  1412. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1413. break;
  1414. case QMI_M3_SEGMENT_PHYDBG_V01:
  1415. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1416. break;
  1417. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1418. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1419. break;
  1420. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1421. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1422. break;
  1423. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1424. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1425. break;
  1426. default:
  1427. icnss_pr_err("Invalid Segment type: %d",
  1428. event_data->m3_segment[i].type);
  1429. }
  1430. if (ret) {
  1431. status = ret;
  1432. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1433. event_data->m3_segment[i].name, ret);
  1434. }
  1435. list_del(&segment.node);
  1436. }
  1437. send_resp:
  1438. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1439. status);
  1440. return ret;
  1441. }
  1442. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1443. {
  1444. int ret = 0;
  1445. struct icnss_subsys_restart_level_data *event_data = data;
  1446. if (!priv)
  1447. return -ENODEV;
  1448. if (!data)
  1449. return -EINVAL;
  1450. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1451. kfree(data);
  1452. return ret;
  1453. }
  1454. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1455. {
  1456. int ret;
  1457. struct icnss_priv *priv = icnss_get_plat_priv();
  1458. rproc_shutdown(priv->rproc);
  1459. ret = rproc_boot(priv->rproc);
  1460. if (ret) {
  1461. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1462. rproc_put(priv->rproc);
  1463. }
  1464. }
  1465. static void icnss_driver_event_work(struct work_struct *work)
  1466. {
  1467. struct icnss_priv *priv =
  1468. container_of(work, struct icnss_priv, event_work);
  1469. struct icnss_driver_event *event;
  1470. unsigned long flags;
  1471. int ret;
  1472. icnss_pm_stay_awake(priv);
  1473. spin_lock_irqsave(&priv->event_lock, flags);
  1474. while (!list_empty(&priv->event_list)) {
  1475. event = list_first_entry(&priv->event_list,
  1476. struct icnss_driver_event, list);
  1477. list_del(&event->list);
  1478. spin_unlock_irqrestore(&priv->event_lock, flags);
  1479. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1480. icnss_driver_event_to_str(event->type),
  1481. event->sync ? "-sync" : "", event->type,
  1482. priv->state);
  1483. switch (event->type) {
  1484. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1485. ret = icnss_driver_event_server_arrive(priv,
  1486. event->data);
  1487. break;
  1488. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1489. ret = icnss_driver_event_server_exit(priv);
  1490. break;
  1491. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1492. ret = icnss_driver_event_fw_ready_ind(priv,
  1493. event->data);
  1494. break;
  1495. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1496. ret = icnss_driver_event_register_driver(priv,
  1497. event->data);
  1498. break;
  1499. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1500. ret = icnss_driver_event_unregister_driver(priv,
  1501. event->data);
  1502. break;
  1503. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1504. ret = icnss_driver_event_pd_service_down(priv,
  1505. event->data);
  1506. break;
  1507. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1508. ret = icnss_driver_event_early_crash_ind(priv,
  1509. event->data);
  1510. break;
  1511. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1512. ret = icnss_driver_event_idle_shutdown(priv,
  1513. event->data);
  1514. break;
  1515. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1516. ret = icnss_driver_event_idle_restart(priv,
  1517. event->data);
  1518. break;
  1519. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1520. ret = icnss_driver_event_fw_init_done(priv,
  1521. event->data);
  1522. break;
  1523. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1524. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1525. break;
  1526. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1527. ret = icnss_qdss_trace_save_hdlr(priv,
  1528. event->data);
  1529. break;
  1530. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1531. ret = icnss_qdss_trace_free_hdlr(priv);
  1532. break;
  1533. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1534. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1535. break;
  1536. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1537. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1538. event->data);
  1539. break;
  1540. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1541. ret = icnss_subsys_restart_level(priv, event->data);
  1542. break;
  1543. default:
  1544. icnss_pr_err("Invalid Event type: %d", event->type);
  1545. kfree(event);
  1546. continue;
  1547. }
  1548. priv->stats.events[event->type].processed++;
  1549. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1550. icnss_driver_event_to_str(event->type),
  1551. event->sync ? "-sync" : "", event->type, ret,
  1552. priv->state);
  1553. spin_lock_irqsave(&priv->event_lock, flags);
  1554. if (event->sync) {
  1555. event->ret = ret;
  1556. complete(&event->complete);
  1557. continue;
  1558. }
  1559. spin_unlock_irqrestore(&priv->event_lock, flags);
  1560. kfree(event);
  1561. spin_lock_irqsave(&priv->event_lock, flags);
  1562. }
  1563. spin_unlock_irqrestore(&priv->event_lock, flags);
  1564. icnss_pm_relax(priv);
  1565. }
  1566. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1567. {
  1568. struct icnss_priv *priv =
  1569. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1570. struct icnss_soc_wake_event *event;
  1571. unsigned long flags;
  1572. int ret;
  1573. icnss_pm_stay_awake(priv);
  1574. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1575. while (!list_empty(&priv->soc_wake_msg_list)) {
  1576. event = list_first_entry(&priv->soc_wake_msg_list,
  1577. struct icnss_soc_wake_event, list);
  1578. list_del(&event->list);
  1579. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1580. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1581. icnss_soc_wake_event_to_str(event->type),
  1582. event->sync ? "-sync" : "", event->type,
  1583. priv->state);
  1584. switch (event->type) {
  1585. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1586. ret = icnss_event_soc_wake_request(priv,
  1587. event->data);
  1588. break;
  1589. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1590. ret = icnss_event_soc_wake_release(priv,
  1591. event->data);
  1592. break;
  1593. default:
  1594. icnss_pr_err("Invalid Event type: %d", event->type);
  1595. kfree(event);
  1596. continue;
  1597. }
  1598. priv->stats.soc_wake_events[event->type].processed++;
  1599. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1600. icnss_soc_wake_event_to_str(event->type),
  1601. event->sync ? "-sync" : "", event->type, ret,
  1602. priv->state);
  1603. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1604. if (event->sync) {
  1605. event->ret = ret;
  1606. complete(&event->complete);
  1607. continue;
  1608. }
  1609. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1610. kfree(event);
  1611. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1612. }
  1613. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1614. icnss_pm_relax(priv);
  1615. }
  1616. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1617. {
  1618. int ret = 0;
  1619. struct qcom_dump_segment segment;
  1620. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1621. struct list_head head;
  1622. if (!dump_enabled()) {
  1623. icnss_pr_info("Dump collection is not enabled\n");
  1624. return ret;
  1625. }
  1626. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1627. return ret;
  1628. INIT_LIST_HEAD(&head);
  1629. memset(&segment, 0, sizeof(segment));
  1630. segment.va = priv->msa_va;
  1631. segment.size = priv->msa_mem_size;
  1632. list_add(&segment.node, &head);
  1633. if (!msa0_dump_dev->dev) {
  1634. icnss_pr_err("Created Dump Device not found\n");
  1635. return 0;
  1636. }
  1637. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1638. if (ret) {
  1639. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1640. return ret;
  1641. }
  1642. list_del(&segment.node);
  1643. return ret;
  1644. }
  1645. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1646. void *data)
  1647. {
  1648. struct qcom_ssr_notify_data *notif = data;
  1649. int ret = 0;
  1650. if (!notif->crashed) {
  1651. if (atomic_read(&priv->is_shutdown)) {
  1652. atomic_set(&priv->is_shutdown, false);
  1653. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1654. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1655. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1656. clear_bit(ICNSS_FW_READY, &priv->state);
  1657. icnss_driver_event_post(priv,
  1658. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1659. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1660. NULL);
  1661. }
  1662. }
  1663. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1664. if (!wait_for_completion_timeout(
  1665. &priv->unblock_shutdown,
  1666. msecs_to_jiffies(PROBE_TIMEOUT)))
  1667. icnss_pr_err("modem block shutdown timeout\n");
  1668. }
  1669. ret = wlfw_send_modem_shutdown_msg(priv);
  1670. if (ret < 0)
  1671. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1672. ret);
  1673. }
  1674. }
  1675. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1676. {
  1677. switch (code) {
  1678. case QCOM_SSR_BEFORE_POWERUP:
  1679. return "BEFORE_POWERUP";
  1680. case QCOM_SSR_AFTER_POWERUP:
  1681. return "AFTER_POWERUP";
  1682. case QCOM_SSR_BEFORE_SHUTDOWN:
  1683. return "BEFORE_SHUTDOWN";
  1684. case QCOM_SSR_AFTER_SHUTDOWN:
  1685. return "AFTER_SHUTDOWN";
  1686. default:
  1687. return "UNKNOWN";
  1688. }
  1689. };
  1690. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1691. unsigned long code,
  1692. void *data)
  1693. {
  1694. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1695. wpss_early_ssr_nb);
  1696. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1697. icnss_qcom_ssr_notify_state_to_str(code), code);
  1698. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1699. set_bit(ICNSS_FW_DOWN, &priv->state);
  1700. icnss_ignore_fw_timeout(true);
  1701. }
  1702. return NOTIFY_DONE;
  1703. }
  1704. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1705. unsigned long code,
  1706. void *data)
  1707. {
  1708. struct icnss_event_pd_service_down_data *event_data;
  1709. struct qcom_ssr_notify_data *notif = data;
  1710. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1711. wpss_ssr_nb);
  1712. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1713. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1714. icnss_qcom_ssr_notify_state_to_str(code), code);
  1715. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1716. icnss_pr_info("Collecting msa0 segment dump\n");
  1717. icnss_msa0_ramdump(priv);
  1718. goto out;
  1719. }
  1720. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1721. goto out;
  1722. if (priv->wpss_self_recovery_enabled)
  1723. del_timer(&priv->wpss_ssr_timer);
  1724. priv->is_ssr = true;
  1725. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1726. priv->state, notif->crashed);
  1727. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1728. icnss_update_state_send_modem_shutdown(priv, data);
  1729. set_bit(ICNSS_FW_DOWN, &priv->state);
  1730. icnss_ignore_fw_timeout(true);
  1731. if (notif->crashed)
  1732. priv->stats.recovery.root_pd_crash++;
  1733. else
  1734. priv->stats.recovery.root_pd_shutdown++;
  1735. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1736. if (event_data == NULL)
  1737. return notifier_from_errno(-ENOMEM);
  1738. event_data->crashed = notif->crashed;
  1739. fw_down_data.crashed = !!notif->crashed;
  1740. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1741. clear_bit(ICNSS_FW_READY, &priv->state);
  1742. fw_down_data.crashed = !!notif->crashed;
  1743. icnss_call_driver_uevent(priv,
  1744. ICNSS_UEVENT_FW_DOWN,
  1745. &fw_down_data);
  1746. }
  1747. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1748. ICNSS_EVENT_SYNC, event_data);
  1749. if (notif->crashed)
  1750. mod_timer(&priv->recovery_timer,
  1751. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1752. out:
  1753. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1754. return NOTIFY_OK;
  1755. }
  1756. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1757. unsigned long code,
  1758. void *data)
  1759. {
  1760. struct icnss_event_pd_service_down_data *event_data;
  1761. struct qcom_ssr_notify_data *notif = data;
  1762. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1763. modem_ssr_nb);
  1764. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1765. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1766. icnss_qcom_ssr_notify_state_to_str(code), code);
  1767. switch (code) {
  1768. case QCOM_SSR_BEFORE_SHUTDOWN:
  1769. if (!notif->crashed &&
  1770. priv->low_power_support) { /* Hibernate */
  1771. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1772. icnss_driver_event_post(
  1773. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1774. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1775. set_bit(ICNSS_LOW_POWER, &priv->state);
  1776. }
  1777. break;
  1778. case QCOM_SSR_AFTER_SHUTDOWN:
  1779. /* Collect ramdump only when there was a crash. */
  1780. if (notif->crashed) {
  1781. icnss_pr_info("Collecting msa0 segment dump\n");
  1782. icnss_msa0_ramdump(priv);
  1783. }
  1784. goto out;
  1785. default:
  1786. goto out;
  1787. }
  1788. priv->is_ssr = true;
  1789. if (notif->crashed) {
  1790. priv->stats.recovery.root_pd_crash++;
  1791. priv->root_pd_shutdown = false;
  1792. } else {
  1793. priv->stats.recovery.root_pd_shutdown++;
  1794. priv->root_pd_shutdown = true;
  1795. }
  1796. icnss_update_state_send_modem_shutdown(priv, data);
  1797. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1798. set_bit(ICNSS_FW_DOWN, &priv->state);
  1799. icnss_ignore_fw_timeout(true);
  1800. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1801. clear_bit(ICNSS_FW_READY, &priv->state);
  1802. fw_down_data.crashed = !!notif->crashed;
  1803. icnss_call_driver_uevent(priv,
  1804. ICNSS_UEVENT_FW_DOWN,
  1805. &fw_down_data);
  1806. }
  1807. goto out;
  1808. }
  1809. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1810. priv->state, notif->crashed);
  1811. set_bit(ICNSS_FW_DOWN, &priv->state);
  1812. icnss_ignore_fw_timeout(true);
  1813. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1814. if (event_data == NULL)
  1815. return notifier_from_errno(-ENOMEM);
  1816. event_data->crashed = notif->crashed;
  1817. fw_down_data.crashed = !!notif->crashed;
  1818. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1819. clear_bit(ICNSS_FW_READY, &priv->state);
  1820. fw_down_data.crashed = !!notif->crashed;
  1821. icnss_call_driver_uevent(priv,
  1822. ICNSS_UEVENT_FW_DOWN,
  1823. &fw_down_data);
  1824. }
  1825. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1826. ICNSS_EVENT_SYNC, event_data);
  1827. if (notif->crashed)
  1828. mod_timer(&priv->recovery_timer,
  1829. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1830. out:
  1831. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1832. return NOTIFY_OK;
  1833. }
  1834. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1835. {
  1836. int ret = 0;
  1837. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1838. priv->wpss_early_notify_handler =
  1839. qcom_register_early_ssr_notifier("wpss",
  1840. &priv->wpss_early_ssr_nb);
  1841. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1842. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1843. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1844. }
  1845. return ret;
  1846. }
  1847. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1848. {
  1849. int ret = 0;
  1850. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1851. /*
  1852. * Assign priority of icnss wpss notifier callback over IPA
  1853. * modem notifier callback which is 0
  1854. */
  1855. priv->wpss_ssr_nb.priority = 1;
  1856. priv->wpss_notify_handler =
  1857. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1858. if (IS_ERR(priv->wpss_notify_handler)) {
  1859. ret = PTR_ERR(priv->wpss_notify_handler);
  1860. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1861. }
  1862. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1863. return ret;
  1864. }
  1865. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1866. unsigned long code,
  1867. void *data)
  1868. {
  1869. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1870. slate_ssr_nb);
  1871. int ret = 0;
  1872. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1873. if (code == QCOM_SSR_AFTER_POWERUP) {
  1874. set_bit(ICNSS_SLATE_UP, &priv->state);
  1875. complete(&priv->slate_boot_complete);
  1876. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1877. priv->state);
  1878. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1879. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1880. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1881. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1882. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1883. priv->state);
  1884. goto skip_pdr;
  1885. }
  1886. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1887. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1888. if (ret < 0) {
  1889. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1890. ret, priv->state);
  1891. goto skip_pdr;
  1892. }
  1893. }
  1894. skip_pdr:
  1895. return NOTIFY_OK;
  1896. }
  1897. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1898. {
  1899. int ret = 0;
  1900. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1901. priv->slate_notify_handler =
  1902. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1903. if (IS_ERR(priv->slate_notify_handler)) {
  1904. ret = PTR_ERR(priv->slate_notify_handler);
  1905. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1906. }
  1907. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1908. return ret;
  1909. }
  1910. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1911. {
  1912. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1913. return 0;
  1914. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1915. &priv->slate_ssr_nb);
  1916. priv->slate_notify_handler = NULL;
  1917. return 0;
  1918. }
  1919. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1920. {
  1921. int ret = 0;
  1922. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1923. /*
  1924. * Assign priority of icnss modem notifier callback over IPA
  1925. * modem notifier callback which is 0
  1926. */
  1927. priv->modem_ssr_nb.priority = 1;
  1928. priv->modem_notify_handler =
  1929. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1930. if (IS_ERR(priv->modem_notify_handler)) {
  1931. ret = PTR_ERR(priv->modem_notify_handler);
  1932. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1933. }
  1934. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1935. return ret;
  1936. }
  1937. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1938. {
  1939. if (IS_ERR(priv->wpss_early_notify_handler))
  1940. return;
  1941. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1942. &priv->wpss_early_ssr_nb);
  1943. priv->wpss_early_notify_handler = NULL;
  1944. }
  1945. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1946. {
  1947. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1948. return 0;
  1949. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1950. &priv->wpss_ssr_nb);
  1951. priv->wpss_notify_handler = NULL;
  1952. return 0;
  1953. }
  1954. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1955. {
  1956. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1957. return 0;
  1958. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1959. &priv->modem_ssr_nb);
  1960. priv->modem_notify_handler = NULL;
  1961. return 0;
  1962. }
  1963. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1964. {
  1965. struct icnss_priv *priv = priv_cb;
  1966. struct icnss_event_pd_service_down_data *event_data;
  1967. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1968. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1969. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1970. state, priv->state);
  1971. switch (state) {
  1972. case SERVREG_SERVICE_STATE_DOWN:
  1973. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1974. if (!event_data)
  1975. return;
  1976. event_data->crashed = true;
  1977. if (!priv->is_ssr) {
  1978. set_bit(ICNSS_PDR, &penv->state);
  1979. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1980. cause = ICNSS_HOST_ERROR;
  1981. priv->stats.recovery.pdr_host_error++;
  1982. } else {
  1983. cause = ICNSS_FW_CRASH;
  1984. priv->stats.recovery.pdr_fw_crash++;
  1985. }
  1986. } else if (priv->root_pd_shutdown) {
  1987. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1988. event_data->crashed = false;
  1989. }
  1990. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1991. priv->state, icnss_pdr_cause[cause]);
  1992. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1993. set_bit(ICNSS_FW_DOWN, &priv->state);
  1994. icnss_ignore_fw_timeout(true);
  1995. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1996. clear_bit(ICNSS_FW_READY, &priv->state);
  1997. fw_down_data.crashed = event_data->crashed;
  1998. icnss_call_driver_uevent(priv,
  1999. ICNSS_UEVENT_FW_DOWN,
  2000. &fw_down_data);
  2001. }
  2002. }
  2003. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2004. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2005. ICNSS_EVENT_SYNC, event_data);
  2006. if (event_data->crashed)
  2007. mod_timer(&priv->recovery_timer,
  2008. jiffies +
  2009. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2010. break;
  2011. case SERVREG_SERVICE_STATE_UP:
  2012. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2013. break;
  2014. default:
  2015. break;
  2016. }
  2017. return;
  2018. }
  2019. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2020. {
  2021. struct pdr_handle *handle = NULL;
  2022. struct pdr_service *service = NULL;
  2023. int err = 0;
  2024. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2025. if (IS_ERR_OR_NULL(handle)) {
  2026. err = PTR_ERR(handle);
  2027. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2028. goto out;
  2029. }
  2030. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2031. if (IS_ERR_OR_NULL(service)) {
  2032. err = PTR_ERR(service);
  2033. icnss_pr_err("Failed to add lookup, err %d", err);
  2034. goto out;
  2035. }
  2036. priv->pdr_handle = handle;
  2037. priv->pdr_service = service;
  2038. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2039. icnss_pr_info("PDR registration happened");
  2040. out:
  2041. return err;
  2042. }
  2043. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2044. {
  2045. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2046. return;
  2047. pdr_handle_release(priv->pdr_handle);
  2048. }
  2049. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2050. {
  2051. int ret = 0;
  2052. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2053. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2054. ret = PTR_ERR(priv->icnss_ramdump_class);
  2055. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2056. return ret;
  2057. }
  2058. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2059. ICNSS_RAMDUMP_NAME);
  2060. if (ret < 0) {
  2061. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2062. goto fail_alloc_major;
  2063. }
  2064. return 0;
  2065. fail_alloc_major:
  2066. class_destroy(priv->icnss_ramdump_class);
  2067. return ret;
  2068. }
  2069. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2070. {
  2071. int ret = 0;
  2072. struct icnss_ramdump_info *ramdump_info;
  2073. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2074. if (!ramdump_info)
  2075. return ERR_PTR(-ENOMEM);
  2076. if (!dev_name) {
  2077. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2078. return NULL;
  2079. }
  2080. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2081. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2082. if (ramdump_info->minor < 0) {
  2083. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2084. ramdump_info->minor);
  2085. ret = -ENODEV;
  2086. goto fail_out_of_minors;
  2087. }
  2088. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2089. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2090. ramdump_info->minor),
  2091. ramdump_info, ramdump_info->name);
  2092. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2093. ret = PTR_ERR(ramdump_info->dev);
  2094. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2095. ramdump_info->name, ret);
  2096. goto fail_device_create;
  2097. }
  2098. return (void *)ramdump_info;
  2099. fail_device_create:
  2100. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2101. fail_out_of_minors:
  2102. kfree(ramdump_info);
  2103. return ERR_PTR(ret);
  2104. }
  2105. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2106. {
  2107. int ret = 0;
  2108. if (!priv || !priv->pdev) {
  2109. icnss_pr_err("Platform priv or pdev is NULL\n");
  2110. return -EINVAL;
  2111. }
  2112. ret = icnss_ramdump_devnode_init(priv);
  2113. if (ret)
  2114. return ret;
  2115. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2116. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2117. icnss_pr_err("Failed to create msa0 dump device!");
  2118. return -ENOMEM;
  2119. }
  2120. if (priv->device_id == WCN6750_DEVICE_ID) {
  2121. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2122. ICNSS_M3_SEGMENT(
  2123. ICNSS_M3_SEGMENT_PHYAREG));
  2124. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2125. !priv->m3_dump_phyareg->dev) {
  2126. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2127. return -ENOMEM;
  2128. }
  2129. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2130. ICNSS_M3_SEGMENT(
  2131. ICNSS_M3_SEGMENT_PHYA));
  2132. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2133. !priv->m3_dump_phydbg->dev) {
  2134. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2135. return -ENOMEM;
  2136. }
  2137. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2138. ICNSS_M3_SEGMENT(
  2139. ICNSS_M3_SEGMENT_WMACREG));
  2140. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2141. !priv->m3_dump_wmac0reg->dev) {
  2142. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2143. return -ENOMEM;
  2144. }
  2145. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2146. ICNSS_M3_SEGMENT(
  2147. ICNSS_M3_SEGMENT_WCSSDBG));
  2148. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2149. !priv->m3_dump_wcssdbg->dev) {
  2150. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2151. return -ENOMEM;
  2152. }
  2153. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2154. ICNSS_M3_SEGMENT(
  2155. ICNSS_M3_SEGMENT_PHYAM3));
  2156. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2157. !priv->m3_dump_phyapdmem->dev) {
  2158. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2159. return -ENOMEM;
  2160. }
  2161. }
  2162. return 0;
  2163. }
  2164. static int icnss_enable_recovery(struct icnss_priv *priv)
  2165. {
  2166. int ret;
  2167. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2168. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2169. return 0;
  2170. }
  2171. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2172. icnss_pr_dbg("SSR disabled through module parameter\n");
  2173. goto enable_pdr;
  2174. }
  2175. ret = icnss_register_ramdump_devices(priv);
  2176. if (ret)
  2177. return ret;
  2178. if (priv->wpss_supported) {
  2179. icnss_wpss_early_ssr_register_notifier(priv);
  2180. icnss_wpss_ssr_register_notifier(priv);
  2181. return 0;
  2182. }
  2183. icnss_modem_ssr_register_notifier(priv);
  2184. if (priv->is_slate_rfa)
  2185. icnss_slate_ssr_register_notifier(priv);
  2186. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2187. icnss_pr_dbg("PDR disabled through module parameter\n");
  2188. return 0;
  2189. }
  2190. enable_pdr:
  2191. ret = icnss_pd_restart_enable(priv);
  2192. if (ret)
  2193. return ret;
  2194. return 0;
  2195. }
  2196. static int icnss_dev_id_match(struct icnss_priv *priv,
  2197. struct device_info *dev_info)
  2198. {
  2199. while (dev_info->device_id) {
  2200. if (priv->device_id == dev_info->device_id)
  2201. return 1;
  2202. dev_info++;
  2203. }
  2204. return 0;
  2205. }
  2206. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2207. unsigned long *thermal_state)
  2208. {
  2209. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2210. *thermal_state = icnss_tcdev->max_thermal_state;
  2211. return 0;
  2212. }
  2213. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2214. unsigned long *thermal_state)
  2215. {
  2216. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2217. *thermal_state = icnss_tcdev->curr_thermal_state;
  2218. return 0;
  2219. }
  2220. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2221. unsigned long thermal_state)
  2222. {
  2223. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2224. struct device *dev = &penv->pdev->dev;
  2225. int ret = 0;
  2226. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2227. return 0;
  2228. if (thermal_state > icnss_tcdev->max_thermal_state)
  2229. return -EINVAL;
  2230. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2231. thermal_state, icnss_tcdev->tcdev_id);
  2232. mutex_lock(&penv->tcdev_lock);
  2233. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2234. icnss_tcdev->tcdev_id);
  2235. if (!ret)
  2236. icnss_tcdev->curr_thermal_state = thermal_state;
  2237. mutex_unlock(&penv->tcdev_lock);
  2238. if (ret) {
  2239. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2240. ret, icnss_tcdev->tcdev_id);
  2241. return ret;
  2242. }
  2243. return 0;
  2244. }
  2245. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2246. .get_max_state = icnss_tcdev_get_max_state,
  2247. .get_cur_state = icnss_tcdev_get_cur_state,
  2248. .set_cur_state = icnss_tcdev_set_cur_state,
  2249. };
  2250. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2251. int tcdev_id)
  2252. {
  2253. struct icnss_priv *priv = dev_get_drvdata(dev);
  2254. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2255. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2256. struct device_node *dev_node;
  2257. int ret = 0;
  2258. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2259. if (!icnss_tcdev)
  2260. return -ENOMEM;
  2261. icnss_tcdev->tcdev_id = tcdev_id;
  2262. icnss_tcdev->max_thermal_state = max_state;
  2263. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2264. "qcom,icnss_cdev%d", tcdev_id);
  2265. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2266. if (!dev_node) {
  2267. icnss_pr_err("Failed to get cooling device node\n");
  2268. return -EINVAL;
  2269. }
  2270. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2271. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2272. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2273. dev_node,
  2274. cdev_node_name, icnss_tcdev,
  2275. &icnss_cooling_ops);
  2276. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2277. ret = PTR_ERR(icnss_tcdev->tcdev);
  2278. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2279. ret, icnss_tcdev->tcdev_id);
  2280. } else {
  2281. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2282. icnss_tcdev->tcdev_id);
  2283. list_add(&icnss_tcdev->tcdev_list,
  2284. &priv->icnss_tcdev_list);
  2285. }
  2286. } else {
  2287. icnss_pr_dbg("Cooling device registration not supported");
  2288. ret = -EOPNOTSUPP;
  2289. }
  2290. return ret;
  2291. }
  2292. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2293. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2294. {
  2295. struct icnss_priv *priv = dev_get_drvdata(dev);
  2296. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2297. while (!list_empty(&priv->icnss_tcdev_list)) {
  2298. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2299. struct icnss_thermal_cdev,
  2300. tcdev_list);
  2301. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2302. list_del(&icnss_tcdev->tcdev_list);
  2303. kfree(icnss_tcdev);
  2304. }
  2305. }
  2306. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2307. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2308. unsigned long *thermal_state,
  2309. int tcdev_id)
  2310. {
  2311. struct icnss_priv *priv = dev_get_drvdata(dev);
  2312. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2313. mutex_lock(&priv->tcdev_lock);
  2314. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2315. if (icnss_tcdev->tcdev_id != tcdev_id)
  2316. continue;
  2317. *thermal_state = icnss_tcdev->curr_thermal_state;
  2318. mutex_unlock(&priv->tcdev_lock);
  2319. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2320. icnss_tcdev->curr_thermal_state, tcdev_id);
  2321. return 0;
  2322. }
  2323. mutex_unlock(&priv->tcdev_lock);
  2324. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2325. return -EINVAL;
  2326. }
  2327. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2328. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2329. int cmd_len, void *cb_ctx,
  2330. int (*cb)(void *ctx, void *event, int event_len))
  2331. {
  2332. struct icnss_priv *priv = icnss_get_plat_priv();
  2333. int ret;
  2334. if (!priv)
  2335. return -ENODEV;
  2336. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2337. return -EINVAL;
  2338. priv->get_info_cb = cb;
  2339. priv->get_info_cb_ctx = cb_ctx;
  2340. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2341. if (ret) {
  2342. priv->get_info_cb = NULL;
  2343. priv->get_info_cb_ctx = NULL;
  2344. }
  2345. return ret;
  2346. }
  2347. EXPORT_SYMBOL(icnss_qmi_send);
  2348. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2349. struct module *owner, const char *mod_name)
  2350. {
  2351. int ret = 0;
  2352. struct icnss_priv *priv = icnss_get_plat_priv();
  2353. if (!priv || !priv->pdev) {
  2354. ret = -ENODEV;
  2355. goto out;
  2356. }
  2357. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2358. if (priv->ops) {
  2359. icnss_pr_err("Driver already registered\n");
  2360. ret = -EEXIST;
  2361. goto out;
  2362. }
  2363. if (!ops->dev_info) {
  2364. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2365. return -EINVAL;
  2366. }
  2367. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2368. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2369. ops->dev_info->name);
  2370. return -ENODEV;
  2371. }
  2372. if (!ops->probe || !ops->remove) {
  2373. ret = -EINVAL;
  2374. goto out;
  2375. }
  2376. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2377. 0, ops);
  2378. if (ret == -EINTR)
  2379. ret = 0;
  2380. out:
  2381. return ret;
  2382. }
  2383. EXPORT_SYMBOL(__icnss_register_driver);
  2384. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2385. {
  2386. int ret;
  2387. struct icnss_priv *priv = icnss_get_plat_priv();
  2388. if (!priv || !priv->pdev) {
  2389. ret = -ENODEV;
  2390. goto out;
  2391. }
  2392. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2393. if (!priv->ops) {
  2394. icnss_pr_err("Driver not registered\n");
  2395. ret = -ENOENT;
  2396. goto out;
  2397. }
  2398. ret = icnss_driver_event_post(priv,
  2399. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2400. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2401. out:
  2402. return ret;
  2403. }
  2404. EXPORT_SYMBOL(icnss_unregister_driver);
  2405. static struct icnss_msi_config msi_config = {
  2406. .total_vectors = 28,
  2407. .total_users = 2,
  2408. .users = (struct icnss_msi_user[]) {
  2409. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2410. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2411. },
  2412. };
  2413. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2414. {
  2415. priv->msi_config = &msi_config;
  2416. return 0;
  2417. }
  2418. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2419. int *num_vectors, u32 *user_base_data,
  2420. u32 *base_vector)
  2421. {
  2422. struct icnss_priv *priv = dev_get_drvdata(dev);
  2423. struct icnss_msi_config *msi_config;
  2424. int idx;
  2425. if (!priv)
  2426. return -ENODEV;
  2427. msi_config = priv->msi_config;
  2428. if (!msi_config) {
  2429. icnss_pr_err("MSI is not supported.\n");
  2430. return -EINVAL;
  2431. }
  2432. for (idx = 0; idx < msi_config->total_users; idx++) {
  2433. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2434. *num_vectors = msi_config->users[idx].num_vectors;
  2435. *user_base_data = msi_config->users[idx].base_vector
  2436. + priv->msi_base_data;
  2437. *base_vector = msi_config->users[idx].base_vector;
  2438. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2439. user_name, *num_vectors, *user_base_data,
  2440. *base_vector);
  2441. return 0;
  2442. }
  2443. }
  2444. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2445. return -EINVAL;
  2446. }
  2447. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2448. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2449. {
  2450. struct icnss_priv *priv = dev_get_drvdata(dev);
  2451. int irq_num;
  2452. irq_num = priv->srng_irqs[vector];
  2453. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2454. irq_num, vector);
  2455. return irq_num;
  2456. }
  2457. EXPORT_SYMBOL(icnss_get_msi_irq);
  2458. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2459. u32 *msi_addr_high)
  2460. {
  2461. struct icnss_priv *priv = dev_get_drvdata(dev);
  2462. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2463. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2464. }
  2465. EXPORT_SYMBOL(icnss_get_msi_address);
  2466. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2467. irqreturn_t (*handler)(int, void *),
  2468. unsigned long flags, const char *name, void *ctx)
  2469. {
  2470. int ret = 0;
  2471. unsigned int irq;
  2472. struct ce_irq_list *irq_entry;
  2473. struct icnss_priv *priv = dev_get_drvdata(dev);
  2474. if (!priv || !priv->pdev) {
  2475. ret = -ENODEV;
  2476. goto out;
  2477. }
  2478. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2479. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2480. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2481. ret = -EINVAL;
  2482. goto out;
  2483. }
  2484. irq = priv->ce_irqs[ce_id];
  2485. irq_entry = &priv->ce_irq_list[ce_id];
  2486. if (irq_entry->handler || irq_entry->irq) {
  2487. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2488. irq, ce_id);
  2489. ret = -EEXIST;
  2490. goto out;
  2491. }
  2492. ret = request_irq(irq, handler, flags, name, ctx);
  2493. if (ret) {
  2494. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2495. irq, ce_id, ret);
  2496. goto out;
  2497. }
  2498. irq_entry->irq = irq;
  2499. irq_entry->handler = handler;
  2500. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2501. penv->stats.ce_irqs[ce_id].request++;
  2502. out:
  2503. return ret;
  2504. }
  2505. EXPORT_SYMBOL(icnss_ce_request_irq);
  2506. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2507. {
  2508. int ret = 0;
  2509. unsigned int irq;
  2510. struct ce_irq_list *irq_entry;
  2511. if (!penv || !penv->pdev || !dev) {
  2512. ret = -ENODEV;
  2513. goto out;
  2514. }
  2515. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2516. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2517. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2518. ret = -EINVAL;
  2519. goto out;
  2520. }
  2521. irq = penv->ce_irqs[ce_id];
  2522. irq_entry = &penv->ce_irq_list[ce_id];
  2523. if (!irq_entry->handler || !irq_entry->irq) {
  2524. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2525. ret = -EEXIST;
  2526. goto out;
  2527. }
  2528. free_irq(irq, ctx);
  2529. irq_entry->irq = 0;
  2530. irq_entry->handler = NULL;
  2531. penv->stats.ce_irqs[ce_id].free++;
  2532. out:
  2533. return ret;
  2534. }
  2535. EXPORT_SYMBOL(icnss_ce_free_irq);
  2536. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2537. {
  2538. unsigned int irq;
  2539. if (!penv || !penv->pdev || !dev) {
  2540. icnss_pr_err("Platform driver not initialized\n");
  2541. return;
  2542. }
  2543. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2544. penv->state);
  2545. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2546. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2547. return;
  2548. }
  2549. penv->stats.ce_irqs[ce_id].enable++;
  2550. irq = penv->ce_irqs[ce_id];
  2551. enable_irq(irq);
  2552. }
  2553. EXPORT_SYMBOL(icnss_enable_irq);
  2554. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2555. {
  2556. unsigned int irq;
  2557. if (!penv || !penv->pdev || !dev) {
  2558. icnss_pr_err("Platform driver not initialized\n");
  2559. return;
  2560. }
  2561. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2562. penv->state);
  2563. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2564. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2565. ce_id);
  2566. return;
  2567. }
  2568. irq = penv->ce_irqs[ce_id];
  2569. disable_irq(irq);
  2570. penv->stats.ce_irqs[ce_id].disable++;
  2571. }
  2572. EXPORT_SYMBOL(icnss_disable_irq);
  2573. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2574. {
  2575. char *fw_build_timestamp = NULL;
  2576. struct icnss_priv *priv = dev_get_drvdata(dev);
  2577. if (!priv) {
  2578. icnss_pr_err("Platform driver not initialized\n");
  2579. return -EINVAL;
  2580. }
  2581. info->v_addr = priv->mem_base_va;
  2582. info->p_addr = priv->mem_base_pa;
  2583. info->chip_id = priv->chip_info.chip_id;
  2584. info->chip_family = priv->chip_info.chip_family;
  2585. info->board_id = priv->board_id;
  2586. info->soc_id = priv->soc_id;
  2587. info->fw_version = priv->fw_version_info.fw_version;
  2588. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2589. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2590. strlcpy(info->fw_build_timestamp,
  2591. priv->fw_version_info.fw_build_timestamp,
  2592. WLFW_MAX_TIMESTAMP_LEN + 1);
  2593. strlcpy(info->fw_build_id, priv->fw_build_id,
  2594. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2595. return 0;
  2596. }
  2597. EXPORT_SYMBOL(icnss_get_soc_info);
  2598. int icnss_get_mhi_state(struct device *dev)
  2599. {
  2600. struct icnss_priv *priv = dev_get_drvdata(dev);
  2601. if (!priv) {
  2602. icnss_pr_err("Platform driver not initialized\n");
  2603. return -EINVAL;
  2604. }
  2605. if (!priv->mhi_state_info_va)
  2606. return -ENOMEM;
  2607. return ioread32(priv->mhi_state_info_va);
  2608. }
  2609. EXPORT_SYMBOL(icnss_get_mhi_state);
  2610. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2611. {
  2612. int ret;
  2613. struct icnss_priv *priv;
  2614. if (!dev)
  2615. return -ENODEV;
  2616. priv = dev_get_drvdata(dev);
  2617. if (!priv) {
  2618. icnss_pr_err("Platform driver not initialized\n");
  2619. return -EINVAL;
  2620. }
  2621. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2622. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2623. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2624. priv->state);
  2625. return -EINVAL;
  2626. }
  2627. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2628. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2629. if (ret)
  2630. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2631. ret, fw_log_mode);
  2632. return ret;
  2633. }
  2634. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2635. int icnss_force_wake_request(struct device *dev)
  2636. {
  2637. struct icnss_priv *priv;
  2638. if (!dev)
  2639. return -ENODEV;
  2640. priv = dev_get_drvdata(dev);
  2641. if (!priv) {
  2642. icnss_pr_err("Platform driver not initialized\n");
  2643. return -EINVAL;
  2644. }
  2645. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2646. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2647. atomic_read(&priv->soc_wake_ref_count));
  2648. return 0;
  2649. }
  2650. icnss_pr_soc_wake("Calling SOC Wake request");
  2651. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2652. 0, NULL);
  2653. return 0;
  2654. }
  2655. EXPORT_SYMBOL(icnss_force_wake_request);
  2656. int icnss_force_wake_release(struct device *dev)
  2657. {
  2658. struct icnss_priv *priv;
  2659. if (!dev)
  2660. return -ENODEV;
  2661. priv = dev_get_drvdata(dev);
  2662. if (!priv) {
  2663. icnss_pr_err("Platform driver not initialized\n");
  2664. return -EINVAL;
  2665. }
  2666. icnss_pr_soc_wake("Calling SOC Wake response");
  2667. if (atomic_read(&priv->soc_wake_ref_count) &&
  2668. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2669. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2670. atomic_read(&priv->soc_wake_ref_count));
  2671. return 0;
  2672. }
  2673. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2674. 0, NULL);
  2675. return 0;
  2676. }
  2677. EXPORT_SYMBOL(icnss_force_wake_release);
  2678. int icnss_is_device_awake(struct device *dev)
  2679. {
  2680. struct icnss_priv *priv = dev_get_drvdata(dev);
  2681. if (!priv) {
  2682. icnss_pr_err("Platform driver not initialized\n");
  2683. return -EINVAL;
  2684. }
  2685. return atomic_read(&priv->soc_wake_ref_count);
  2686. }
  2687. EXPORT_SYMBOL(icnss_is_device_awake);
  2688. int icnss_is_pci_ep_awake(struct device *dev)
  2689. {
  2690. struct icnss_priv *priv = dev_get_drvdata(dev);
  2691. if (!priv) {
  2692. icnss_pr_err("Platform driver not initialized\n");
  2693. return -EINVAL;
  2694. }
  2695. if (!priv->mhi_state_info_va)
  2696. return -ENOMEM;
  2697. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2698. }
  2699. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2700. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2701. uint32_t mem_type, uint32_t data_len,
  2702. uint8_t *output)
  2703. {
  2704. int ret = 0;
  2705. struct icnss_priv *priv = dev_get_drvdata(dev);
  2706. if (priv->magic != ICNSS_MAGIC) {
  2707. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2708. dev, priv, priv->magic);
  2709. return -EINVAL;
  2710. }
  2711. if (!output || data_len == 0
  2712. || data_len > WLFW_MAX_DATA_SIZE) {
  2713. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2714. output, data_len);
  2715. ret = -EINVAL;
  2716. goto out;
  2717. }
  2718. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2719. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2720. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2721. priv->state);
  2722. ret = -EINVAL;
  2723. goto out;
  2724. }
  2725. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2726. data_len, output);
  2727. out:
  2728. return ret;
  2729. }
  2730. EXPORT_SYMBOL(icnss_athdiag_read);
  2731. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2732. uint32_t mem_type, uint32_t data_len,
  2733. uint8_t *input)
  2734. {
  2735. int ret = 0;
  2736. struct icnss_priv *priv = dev_get_drvdata(dev);
  2737. if (priv->magic != ICNSS_MAGIC) {
  2738. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2739. dev, priv, priv->magic);
  2740. return -EINVAL;
  2741. }
  2742. if (!input || data_len == 0
  2743. || data_len > WLFW_MAX_DATA_SIZE) {
  2744. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2745. input, data_len);
  2746. ret = -EINVAL;
  2747. goto out;
  2748. }
  2749. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2750. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2751. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2752. priv->state);
  2753. ret = -EINVAL;
  2754. goto out;
  2755. }
  2756. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2757. data_len, input);
  2758. out:
  2759. return ret;
  2760. }
  2761. EXPORT_SYMBOL(icnss_athdiag_write);
  2762. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2763. enum icnss_driver_mode mode,
  2764. const char *host_version)
  2765. {
  2766. struct icnss_priv *priv = dev_get_drvdata(dev);
  2767. int temp = 0;
  2768. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2769. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2770. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2771. priv->state);
  2772. return -EINVAL;
  2773. }
  2774. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2775. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2776. priv->state);
  2777. return -EINVAL;
  2778. }
  2779. if (priv->wpss_supported &&
  2780. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2781. icnss_setup_dms_mac(priv);
  2782. if (priv->device_id == WCN6750_DEVICE_ID) {
  2783. if (!icnss_get_temperature(priv, &temp)) {
  2784. icnss_pr_dbg("Temperature: %d\n", temp);
  2785. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2786. icnss_set_wlan_en_delay(priv);
  2787. }
  2788. }
  2789. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2790. }
  2791. EXPORT_SYMBOL(icnss_wlan_enable);
  2792. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2793. {
  2794. struct icnss_priv *priv = dev_get_drvdata(dev);
  2795. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2796. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2797. priv->state);
  2798. return 0;
  2799. }
  2800. return icnss_send_wlan_disable_to_fw(priv);
  2801. }
  2802. EXPORT_SYMBOL(icnss_wlan_disable);
  2803. bool icnss_is_qmi_disable(struct device *dev)
  2804. {
  2805. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2806. }
  2807. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2808. int icnss_get_ce_id(struct device *dev, int irq)
  2809. {
  2810. int i;
  2811. if (!penv || !penv->pdev || !dev)
  2812. return -ENODEV;
  2813. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2814. if (penv->ce_irqs[i] == irq)
  2815. return i;
  2816. }
  2817. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2818. return -EINVAL;
  2819. }
  2820. EXPORT_SYMBOL(icnss_get_ce_id);
  2821. int icnss_get_irq(struct device *dev, int ce_id)
  2822. {
  2823. int irq;
  2824. if (!penv || !penv->pdev || !dev)
  2825. return -ENODEV;
  2826. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2827. return -EINVAL;
  2828. irq = penv->ce_irqs[ce_id];
  2829. return irq;
  2830. }
  2831. EXPORT_SYMBOL(icnss_get_irq);
  2832. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2833. {
  2834. struct icnss_priv *priv = dev_get_drvdata(dev);
  2835. if (!priv) {
  2836. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2837. return NULL;
  2838. }
  2839. return priv->iommu_domain;
  2840. }
  2841. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2842. int icnss_smmu_map(struct device *dev,
  2843. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2844. {
  2845. struct icnss_priv *priv = dev_get_drvdata(dev);
  2846. int flag = IOMMU_READ | IOMMU_WRITE;
  2847. bool dma_coherent = false;
  2848. unsigned long iova;
  2849. int prop_len = 0;
  2850. size_t len;
  2851. int ret = 0;
  2852. if (!priv) {
  2853. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2854. dev, priv);
  2855. return -EINVAL;
  2856. }
  2857. if (!iova_addr) {
  2858. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2859. &paddr, size);
  2860. return -EINVAL;
  2861. }
  2862. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2863. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2864. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2865. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2866. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2867. iova,
  2868. &priv->smmu_iova_ipa_start,
  2869. priv->smmu_iova_ipa_len);
  2870. return -ENOMEM;
  2871. }
  2872. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2873. icnss_pr_dbg("dma-coherent is %s\n",
  2874. dma_coherent ? "enabled" : "disabled");
  2875. if (dma_coherent)
  2876. flag |= IOMMU_CACHE;
  2877. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2878. ret = iommu_map(priv->iommu_domain, iova,
  2879. rounddown(paddr, PAGE_SIZE), len,
  2880. flag);
  2881. if (ret) {
  2882. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2883. return ret;
  2884. }
  2885. priv->smmu_iova_ipa_current = iova + len;
  2886. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2887. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2888. return 0;
  2889. }
  2890. EXPORT_SYMBOL(icnss_smmu_map);
  2891. int icnss_smmu_unmap(struct device *dev,
  2892. uint32_t iova_addr, size_t size)
  2893. {
  2894. struct icnss_priv *priv = dev_get_drvdata(dev);
  2895. unsigned long iova;
  2896. size_t len, unmapped_len;
  2897. if (!priv) {
  2898. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2899. dev, priv);
  2900. return -EINVAL;
  2901. }
  2902. if (!iova_addr) {
  2903. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2904. size);
  2905. return -EINVAL;
  2906. }
  2907. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2908. PAGE_SIZE);
  2909. iova = rounddown(iova_addr, PAGE_SIZE);
  2910. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2911. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2912. iova,
  2913. &priv->smmu_iova_ipa_start,
  2914. priv->smmu_iova_ipa_len);
  2915. return -ENOMEM;
  2916. }
  2917. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2918. iova, len);
  2919. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2920. if (unmapped_len != len) {
  2921. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2922. return -EINVAL;
  2923. }
  2924. priv->smmu_iova_ipa_current = iova;
  2925. return 0;
  2926. }
  2927. EXPORT_SYMBOL(icnss_smmu_unmap);
  2928. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2929. {
  2930. return socinfo_get_serial_number();
  2931. }
  2932. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2933. int icnss_trigger_recovery(struct device *dev)
  2934. {
  2935. int ret = 0;
  2936. struct icnss_priv *priv = dev_get_drvdata(dev);
  2937. if (priv->magic != ICNSS_MAGIC) {
  2938. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2939. ret = -EINVAL;
  2940. goto out;
  2941. }
  2942. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2943. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2944. priv->state);
  2945. ret = -EPERM;
  2946. goto out;
  2947. }
  2948. if (priv->wpss_supported) {
  2949. icnss_pr_vdbg("Initiate Root PD restart");
  2950. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2951. ICNSS_SMP2P_OUT_POWER_SAVE);
  2952. if (!ret)
  2953. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2954. return ret;
  2955. }
  2956. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2957. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2958. priv->state);
  2959. ret = -EOPNOTSUPP;
  2960. goto out;
  2961. }
  2962. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2963. priv->state);
  2964. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2965. if (!ret)
  2966. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2967. out:
  2968. return ret;
  2969. }
  2970. EXPORT_SYMBOL(icnss_trigger_recovery);
  2971. int icnss_idle_shutdown(struct device *dev)
  2972. {
  2973. struct icnss_priv *priv = dev_get_drvdata(dev);
  2974. if (!priv) {
  2975. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2976. return -EINVAL;
  2977. }
  2978. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2979. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2980. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2981. return -EBUSY;
  2982. }
  2983. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2984. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2985. }
  2986. EXPORT_SYMBOL(icnss_idle_shutdown);
  2987. int icnss_idle_restart(struct device *dev)
  2988. {
  2989. struct icnss_priv *priv = dev_get_drvdata(dev);
  2990. if (!priv) {
  2991. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2992. return -EINVAL;
  2993. }
  2994. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2995. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2996. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2997. return -EBUSY;
  2998. }
  2999. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3000. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3001. }
  3002. EXPORT_SYMBOL(icnss_idle_restart);
  3003. int icnss_exit_power_save(struct device *dev)
  3004. {
  3005. struct icnss_priv *priv = dev_get_drvdata(dev);
  3006. icnss_pr_vdbg("Calling Exit Power Save\n");
  3007. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3008. !test_bit(ICNSS_MODE_ON, &priv->state))
  3009. return 0;
  3010. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3011. ICNSS_SMP2P_OUT_POWER_SAVE);
  3012. }
  3013. EXPORT_SYMBOL(icnss_exit_power_save);
  3014. int icnss_prevent_l1(struct device *dev)
  3015. {
  3016. struct icnss_priv *priv = dev_get_drvdata(dev);
  3017. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3018. !test_bit(ICNSS_MODE_ON, &priv->state))
  3019. return 0;
  3020. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3021. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3022. }
  3023. EXPORT_SYMBOL(icnss_prevent_l1);
  3024. void icnss_allow_l1(struct device *dev)
  3025. {
  3026. struct icnss_priv *priv = dev_get_drvdata(dev);
  3027. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3028. !test_bit(ICNSS_MODE_ON, &priv->state))
  3029. return;
  3030. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3031. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3032. }
  3033. EXPORT_SYMBOL(icnss_allow_l1);
  3034. void icnss_allow_recursive_recovery(struct device *dev)
  3035. {
  3036. struct icnss_priv *priv = dev_get_drvdata(dev);
  3037. priv->allow_recursive_recovery = true;
  3038. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3039. }
  3040. void icnss_disallow_recursive_recovery(struct device *dev)
  3041. {
  3042. struct icnss_priv *priv = dev_get_drvdata(dev);
  3043. priv->allow_recursive_recovery = false;
  3044. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3045. }
  3046. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3047. {
  3048. struct kobject *icnss_kobject;
  3049. int ret = 0;
  3050. atomic_set(&priv->is_shutdown, false);
  3051. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3052. if (!icnss_kobject) {
  3053. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3054. return -EINVAL;
  3055. }
  3056. priv->icnss_kobject = icnss_kobject;
  3057. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3058. if (ret) {
  3059. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3060. return ret;
  3061. }
  3062. return ret;
  3063. }
  3064. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3065. {
  3066. struct kobject *icnss_kobject;
  3067. icnss_kobject = priv->icnss_kobject;
  3068. if (icnss_kobject)
  3069. kobject_put(icnss_kobject);
  3070. }
  3071. static ssize_t qdss_tr_start_store(struct device *dev,
  3072. struct device_attribute *attr,
  3073. const char *buf, size_t count)
  3074. {
  3075. struct icnss_priv *priv = dev_get_drvdata(dev);
  3076. wlfw_qdss_trace_start(priv);
  3077. icnss_pr_dbg("Received QDSS start command\n");
  3078. return count;
  3079. }
  3080. static ssize_t qdss_tr_stop_store(struct device *dev,
  3081. struct device_attribute *attr,
  3082. const char *user_buf, size_t count)
  3083. {
  3084. struct icnss_priv *priv = dev_get_drvdata(dev);
  3085. u32 option = 0;
  3086. if (sscanf(user_buf, "%du", &option) != 1)
  3087. return -EINVAL;
  3088. wlfw_qdss_trace_stop(priv, option);
  3089. icnss_pr_dbg("Received QDSS stop command\n");
  3090. return count;
  3091. }
  3092. static ssize_t qdss_conf_download_store(struct device *dev,
  3093. struct device_attribute *attr,
  3094. const char *buf, size_t count)
  3095. {
  3096. struct icnss_priv *priv = dev_get_drvdata(dev);
  3097. icnss_wlfw_qdss_dnld_send_sync(priv);
  3098. icnss_pr_dbg("Received QDSS download config command\n");
  3099. return count;
  3100. }
  3101. static ssize_t hw_trc_override_store(struct device *dev,
  3102. struct device_attribute *attr,
  3103. const char *buf, size_t count)
  3104. {
  3105. struct icnss_priv *priv = dev_get_drvdata(dev);
  3106. int tmp = 0;
  3107. if (sscanf(buf, "%du", &tmp) != 1)
  3108. return -EINVAL;
  3109. priv->hw_trc_override = tmp;
  3110. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3111. return count;
  3112. }
  3113. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3114. {
  3115. struct icnss_priv *priv = icnss_get_plat_priv();
  3116. phandle rproc_phandle;
  3117. int ret;
  3118. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3119. &rproc_phandle)) {
  3120. icnss_pr_err("error reading rproc phandle\n");
  3121. return;
  3122. }
  3123. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3124. if (IS_ERR_OR_NULL(priv->rproc)) {
  3125. icnss_pr_err("rproc not found");
  3126. return;
  3127. }
  3128. ret = rproc_boot(priv->rproc);
  3129. if (ret) {
  3130. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3131. rproc_put(priv->rproc);
  3132. }
  3133. }
  3134. static ssize_t wpss_boot_store(struct device *dev,
  3135. struct device_attribute *attr,
  3136. const char *buf, size_t count)
  3137. {
  3138. struct icnss_priv *priv = dev_get_drvdata(dev);
  3139. int wpss_rproc = 0;
  3140. if (!priv->wpss_supported)
  3141. return count;
  3142. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3143. icnss_pr_err("Failed to read wpss rproc info");
  3144. return -EINVAL;
  3145. }
  3146. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3147. if (wpss_rproc == 1)
  3148. schedule_work(&wpss_loader);
  3149. else if (wpss_rproc == 0)
  3150. icnss_wpss_unload(priv);
  3151. return count;
  3152. }
  3153. static ssize_t wlan_en_delay_store(struct device *dev,
  3154. struct device_attribute *attr,
  3155. const char *buf, size_t count)
  3156. {
  3157. struct icnss_priv *priv = dev_get_drvdata(dev);
  3158. uint32_t wlan_en_delay = 0;
  3159. if (priv->device_id != WCN6750_DEVICE_ID)
  3160. return count;
  3161. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3162. icnss_pr_err("Failed to read wlan_en_delay");
  3163. return -EINVAL;
  3164. }
  3165. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3166. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3167. return count;
  3168. }
  3169. static DEVICE_ATTR_WO(qdss_tr_start);
  3170. static DEVICE_ATTR_WO(qdss_tr_stop);
  3171. static DEVICE_ATTR_WO(qdss_conf_download);
  3172. static DEVICE_ATTR_WO(hw_trc_override);
  3173. static DEVICE_ATTR_WO(wpss_boot);
  3174. static DEVICE_ATTR_WO(wlan_en_delay);
  3175. static struct attribute *icnss_attrs[] = {
  3176. &dev_attr_qdss_tr_start.attr,
  3177. &dev_attr_qdss_tr_stop.attr,
  3178. &dev_attr_qdss_conf_download.attr,
  3179. &dev_attr_hw_trc_override.attr,
  3180. &dev_attr_wpss_boot.attr,
  3181. &dev_attr_wlan_en_delay.attr,
  3182. NULL,
  3183. };
  3184. static struct attribute_group icnss_attr_group = {
  3185. .attrs = icnss_attrs,
  3186. };
  3187. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3188. {
  3189. struct device *dev = &priv->pdev->dev;
  3190. int ret;
  3191. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3192. if (ret) {
  3193. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3194. ret);
  3195. goto out;
  3196. }
  3197. return 0;
  3198. out:
  3199. return ret;
  3200. }
  3201. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3202. {
  3203. sysfs_remove_link(kernel_kobj, "icnss");
  3204. }
  3205. static int icnss_sysfs_create(struct icnss_priv *priv)
  3206. {
  3207. int ret = 0;
  3208. ret = devm_device_add_group(&priv->pdev->dev,
  3209. &icnss_attr_group);
  3210. if (ret) {
  3211. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3212. ret);
  3213. goto out;
  3214. }
  3215. icnss_create_sysfs_link(priv);
  3216. ret = icnss_create_shutdown_sysfs(priv);
  3217. if (ret)
  3218. goto remove_icnss_group;
  3219. return 0;
  3220. remove_icnss_group:
  3221. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3222. out:
  3223. return ret;
  3224. }
  3225. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3226. {
  3227. icnss_destroy_shutdown_sysfs(priv);
  3228. icnss_remove_sysfs_link(priv);
  3229. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3230. }
  3231. static int icnss_resource_parse(struct icnss_priv *priv)
  3232. {
  3233. int ret = 0, i = 0;
  3234. struct platform_device *pdev = priv->pdev;
  3235. struct device *dev = &pdev->dev;
  3236. struct resource *res;
  3237. u32 int_prop;
  3238. ret = icnss_get_vreg(priv);
  3239. if (ret) {
  3240. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3241. goto out;
  3242. }
  3243. ret = icnss_get_clk(priv);
  3244. if (ret) {
  3245. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3246. goto put_vreg;
  3247. }
  3248. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3249. ret = icnss_get_psf_info(priv);
  3250. if (ret < 0)
  3251. goto out;
  3252. priv->psf_supported = true;
  3253. }
  3254. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3255. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3256. "membase");
  3257. if (!res) {
  3258. icnss_pr_err("Memory base not found in DT\n");
  3259. ret = -EINVAL;
  3260. goto put_clk;
  3261. }
  3262. priv->mem_base_pa = res->start;
  3263. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3264. resource_size(res));
  3265. if (!priv->mem_base_va) {
  3266. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3267. &priv->mem_base_pa);
  3268. ret = -EINVAL;
  3269. goto put_clk;
  3270. }
  3271. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3272. &priv->mem_base_pa,
  3273. priv->mem_base_va);
  3274. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3275. res = platform_get_resource(priv->pdev,
  3276. IORESOURCE_IRQ, i);
  3277. if (!res) {
  3278. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3279. ret = -ENODEV;
  3280. goto put_clk;
  3281. } else {
  3282. priv->ce_irqs[i] = res->start;
  3283. }
  3284. }
  3285. if (of_property_read_bool(pdev->dev.of_node,
  3286. "qcom,is_low_power")) {
  3287. priv->low_power_support = true;
  3288. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3289. }
  3290. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3291. &priv->rf_subtype) == 0) {
  3292. priv->is_rf_subtype_valid = true;
  3293. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3294. }
  3295. if (of_property_read_bool(pdev->dev.of_node,
  3296. "qcom,is_slate_rfa")) {
  3297. priv->is_slate_rfa = true;
  3298. icnss_pr_err("SLATE rfa is enabled\n");
  3299. }
  3300. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3301. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3302. "msi_addr");
  3303. if (!res) {
  3304. icnss_pr_err("MSI address not found in DT\n");
  3305. ret = -EINVAL;
  3306. goto put_clk;
  3307. }
  3308. priv->msi_addr_pa = res->start;
  3309. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3310. PAGE_SIZE,
  3311. DMA_FROM_DEVICE, 0);
  3312. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3313. icnss_pr_err("MSI: failed to map msi address\n");
  3314. priv->msi_addr_iova = 0;
  3315. ret = -ENOMEM;
  3316. goto put_clk;
  3317. }
  3318. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3319. &priv->msi_addr_pa,
  3320. priv->msi_addr_iova);
  3321. ret = of_property_read_u32_index(dev->of_node,
  3322. "interrupts",
  3323. 1,
  3324. &int_prop);
  3325. if (ret) {
  3326. icnss_pr_dbg("Read interrupt prop failed");
  3327. goto put_clk;
  3328. }
  3329. priv->msi_base_data = int_prop + 32;
  3330. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3331. priv->msi_base_data, int_prop);
  3332. icnss_get_msi_assignment(priv);
  3333. for (i = 0; i < msi_config.total_vectors; i++) {
  3334. res = platform_get_resource(priv->pdev,
  3335. IORESOURCE_IRQ, i);
  3336. if (!res) {
  3337. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3338. ret = -ENODEV;
  3339. goto put_clk;
  3340. } else {
  3341. priv->srng_irqs[i] = res->start;
  3342. }
  3343. }
  3344. }
  3345. return 0;
  3346. put_clk:
  3347. icnss_put_clk(priv);
  3348. put_vreg:
  3349. icnss_put_vreg(priv);
  3350. out:
  3351. return ret;
  3352. }
  3353. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3354. {
  3355. int ret = 0;
  3356. struct platform_device *pdev = priv->pdev;
  3357. struct device *dev = &pdev->dev;
  3358. struct device_node *np = NULL;
  3359. u64 prop_size = 0;
  3360. const __be32 *addrp = NULL;
  3361. np = of_parse_phandle(dev->of_node,
  3362. "qcom,wlan-msa-fixed-region", 0);
  3363. if (np) {
  3364. addrp = of_get_address(np, 0, &prop_size, NULL);
  3365. if (!addrp) {
  3366. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3367. ret = -EINVAL;
  3368. of_node_put(np);
  3369. goto out;
  3370. }
  3371. priv->msa_pa = of_translate_address(np, addrp);
  3372. if (priv->msa_pa == OF_BAD_ADDR) {
  3373. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3374. ret = -EINVAL;
  3375. of_node_put(np);
  3376. goto out;
  3377. }
  3378. of_node_put(np);
  3379. priv->msa_va = memremap(priv->msa_pa,
  3380. (unsigned long)prop_size, MEMREMAP_WT);
  3381. if (!priv->msa_va) {
  3382. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3383. &priv->msa_pa);
  3384. ret = -EINVAL;
  3385. goto out;
  3386. }
  3387. priv->msa_mem_size = prop_size;
  3388. } else {
  3389. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3390. &priv->msa_mem_size);
  3391. if (ret || priv->msa_mem_size == 0) {
  3392. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3393. priv->msa_mem_size, ret);
  3394. goto out;
  3395. }
  3396. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3397. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3398. if (!priv->msa_va) {
  3399. icnss_pr_err("DMA alloc failed for MSA\n");
  3400. ret = -ENOMEM;
  3401. goto out;
  3402. }
  3403. }
  3404. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3405. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3406. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3407. "qcom,fw-prefix");
  3408. return 0;
  3409. out:
  3410. return ret;
  3411. }
  3412. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3413. struct device *dev, unsigned long iova,
  3414. int flags, void *handler_token)
  3415. {
  3416. struct icnss_priv *priv = handler_token;
  3417. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3418. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3419. if (!priv) {
  3420. icnss_pr_err("priv is NULL\n");
  3421. return -ENODEV;
  3422. }
  3423. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3424. fw_down_data.crashed = true;
  3425. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3426. &fw_down_data);
  3427. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3428. &fw_down_data);
  3429. }
  3430. icnss_trigger_recovery(&priv->pdev->dev);
  3431. /* IOMMU driver requires non-zero return value to print debug info. */
  3432. return -EINVAL;
  3433. }
  3434. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3435. {
  3436. int ret = 0;
  3437. struct platform_device *pdev = priv->pdev;
  3438. struct device *dev = &pdev->dev;
  3439. const char *iommu_dma_type;
  3440. struct resource *res;
  3441. u32 addr_win[2];
  3442. ret = of_property_read_u32_array(dev->of_node,
  3443. "qcom,iommu-dma-addr-pool",
  3444. addr_win,
  3445. ARRAY_SIZE(addr_win));
  3446. if (ret) {
  3447. icnss_pr_err("SMMU IOVA base not found\n");
  3448. } else {
  3449. priv->smmu_iova_start = addr_win[0];
  3450. priv->smmu_iova_len = addr_win[1];
  3451. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3452. &priv->smmu_iova_start,
  3453. priv->smmu_iova_len);
  3454. priv->iommu_domain =
  3455. iommu_get_domain_for_dev(&pdev->dev);
  3456. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3457. &iommu_dma_type);
  3458. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3459. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3460. priv->smmu_s1_enable = true;
  3461. if (priv->device_id == WCN6750_DEVICE_ID)
  3462. iommu_set_fault_handler(priv->iommu_domain,
  3463. icnss_smmu_fault_handler,
  3464. priv);
  3465. }
  3466. res = platform_get_resource_byname(pdev,
  3467. IORESOURCE_MEM,
  3468. "smmu_iova_ipa");
  3469. if (!res) {
  3470. icnss_pr_err("SMMU IOVA IPA not found\n");
  3471. } else {
  3472. priv->smmu_iova_ipa_start = res->start;
  3473. priv->smmu_iova_ipa_current = res->start;
  3474. priv->smmu_iova_ipa_len = resource_size(res);
  3475. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3476. &priv->smmu_iova_ipa_start,
  3477. priv->smmu_iova_ipa_len);
  3478. }
  3479. }
  3480. return 0;
  3481. }
  3482. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3483. {
  3484. if (!priv)
  3485. return -ENODEV;
  3486. if (!priv->smmu_iova_len)
  3487. return -EINVAL;
  3488. *addr = priv->smmu_iova_start;
  3489. *size = priv->smmu_iova_len;
  3490. return 0;
  3491. }
  3492. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3493. {
  3494. if (!priv)
  3495. return -ENODEV;
  3496. if (!priv->smmu_iova_ipa_len)
  3497. return -EINVAL;
  3498. *addr = priv->smmu_iova_ipa_start;
  3499. *size = priv->smmu_iova_ipa_len;
  3500. return 0;
  3501. }
  3502. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3503. char *name)
  3504. {
  3505. if (!priv)
  3506. return;
  3507. if (!priv->use_prefix_path) {
  3508. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3509. return;
  3510. }
  3511. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3512. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3513. ADRASTEA_PATH_PREFIX "%s", name);
  3514. else
  3515. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3516. QCA6750_PATH_PREFIX "%s", name);
  3517. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3518. }
  3519. static const struct platform_device_id icnss_platform_id_table[] = {
  3520. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3521. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3522. { },
  3523. };
  3524. static const struct of_device_id icnss_dt_match[] = {
  3525. {
  3526. .compatible = "qcom,wcn6750",
  3527. .data = (void *)&icnss_platform_id_table[0]},
  3528. {
  3529. .compatible = "qcom,icnss",
  3530. .data = (void *)&icnss_platform_id_table[1]},
  3531. { },
  3532. };
  3533. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3534. static void icnss_init_control_params(struct icnss_priv *priv)
  3535. {
  3536. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3537. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3538. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3539. if (priv->device_id == WCN6750_DEVICE_ID ||
  3540. of_property_read_bool(priv->pdev->dev.of_node,
  3541. "wpss-support-enable"))
  3542. priv->wpss_supported = true;
  3543. if (of_property_read_bool(priv->pdev->dev.of_node,
  3544. "bdf-download-support"))
  3545. priv->bdf_download_support = true;
  3546. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3547. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3548. }
  3549. static void icnss_read_device_configs(struct icnss_priv *priv)
  3550. {
  3551. if (of_property_read_bool(priv->pdev->dev.of_node,
  3552. "wlan-ipa-disabled")) {
  3553. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3554. }
  3555. if (of_property_read_bool(priv->pdev->dev.of_node,
  3556. "qcom,wpss-self-recovery"))
  3557. priv->wpss_self_recovery_enabled = true;
  3558. }
  3559. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3560. {
  3561. pm_runtime_get_sync(&priv->pdev->dev);
  3562. pm_runtime_forbid(&priv->pdev->dev);
  3563. pm_runtime_set_active(&priv->pdev->dev);
  3564. pm_runtime_enable(&priv->pdev->dev);
  3565. }
  3566. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3567. {
  3568. pm_runtime_disable(&priv->pdev->dev);
  3569. pm_runtime_allow(&priv->pdev->dev);
  3570. pm_runtime_put_sync(&priv->pdev->dev);
  3571. }
  3572. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3573. {
  3574. return of_property_read_bool(priv->pdev->dev.of_node,
  3575. "use-nv-mac");
  3576. }
  3577. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3578. {
  3579. struct icnss_subsys_restart_level_data *restart_level_data;
  3580. icnss_pr_info("rproc name: %s recovery disable: %d",
  3581. rproc->name, rproc->recovery_disabled);
  3582. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3583. if (!restart_level_data)
  3584. return;
  3585. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3586. if (rproc->recovery_disabled)
  3587. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3588. else
  3589. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3590. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3591. 0, restart_level_data);
  3592. }
  3593. }
  3594. static int icnss_probe(struct platform_device *pdev)
  3595. {
  3596. int ret = 0;
  3597. struct device *dev = &pdev->dev;
  3598. struct icnss_priv *priv;
  3599. const struct of_device_id *of_id;
  3600. const struct platform_device_id *device_id;
  3601. if (dev_get_drvdata(dev)) {
  3602. icnss_pr_err("Driver is already initialized\n");
  3603. return -EEXIST;
  3604. }
  3605. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3606. if (!of_id || !of_id->data) {
  3607. icnss_pr_err("Failed to find of match device!\n");
  3608. ret = -ENODEV;
  3609. goto out_reset_drvdata;
  3610. }
  3611. device_id = of_id->data;
  3612. icnss_pr_dbg("Platform driver probe\n");
  3613. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3614. if (!priv)
  3615. return -ENOMEM;
  3616. priv->magic = ICNSS_MAGIC;
  3617. dev_set_drvdata(dev, priv);
  3618. priv->pdev = pdev;
  3619. priv->device_id = device_id->driver_data;
  3620. priv->is_chain1_supported = true;
  3621. INIT_LIST_HEAD(&priv->vreg_list);
  3622. INIT_LIST_HEAD(&priv->clk_list);
  3623. icnss_allow_recursive_recovery(dev);
  3624. icnss_init_control_params(priv);
  3625. icnss_read_device_configs(priv);
  3626. ret = icnss_resource_parse(priv);
  3627. if (ret)
  3628. goto out_reset_drvdata;
  3629. ret = icnss_msa_dt_parse(priv);
  3630. if (ret)
  3631. goto out_free_resources;
  3632. ret = icnss_smmu_dt_parse(priv);
  3633. if (ret)
  3634. goto out_free_resources;
  3635. spin_lock_init(&priv->event_lock);
  3636. spin_lock_init(&priv->on_off_lock);
  3637. spin_lock_init(&priv->soc_wake_msg_lock);
  3638. mutex_init(&priv->dev_lock);
  3639. mutex_init(&priv->tcdev_lock);
  3640. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3641. if (!priv->event_wq) {
  3642. icnss_pr_err("Workqueue creation failed\n");
  3643. ret = -EFAULT;
  3644. goto smmu_cleanup;
  3645. }
  3646. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3647. INIT_LIST_HEAD(&priv->event_list);
  3648. ret = icnss_register_fw_service(priv);
  3649. if (ret < 0) {
  3650. icnss_pr_err("fw service registration failed: %d\n", ret);
  3651. goto out_destroy_wq;
  3652. }
  3653. icnss_enable_recovery(priv);
  3654. icnss_debugfs_create(priv);
  3655. icnss_sysfs_create(priv);
  3656. ret = device_init_wakeup(&priv->pdev->dev, true);
  3657. if (ret)
  3658. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3659. ret);
  3660. icnss_set_plat_priv(priv);
  3661. init_completion(&priv->unblock_shutdown);
  3662. if (priv->is_slate_rfa)
  3663. init_completion(&priv->slate_boot_complete);
  3664. if (priv->device_id == WCN6750_DEVICE_ID) {
  3665. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3666. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3667. if (!priv->soc_wake_wq) {
  3668. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3669. ret = -EFAULT;
  3670. goto out_unregister_fw_service;
  3671. }
  3672. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3673. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3674. ret = icnss_genl_init();
  3675. if (ret < 0)
  3676. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3677. init_completion(&priv->smp2p_soc_wake_wait);
  3678. icnss_runtime_pm_init(priv);
  3679. icnss_aop_mbox_init(priv);
  3680. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3681. priv->bdf_download_support = true;
  3682. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3683. }
  3684. if (priv->wpss_supported) {
  3685. ret = icnss_dms_init(priv);
  3686. if (ret)
  3687. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3688. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3689. icnss_pr_dbg("NV MAC feature is %s\n",
  3690. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3691. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3692. }
  3693. timer_setup(&priv->recovery_timer,
  3694. icnss_recovery_timeout_hdlr, 0);
  3695. if (priv->wpss_self_recovery_enabled) {
  3696. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3697. timer_setup(&priv->wpss_ssr_timer,
  3698. icnss_wpss_ssr_timeout_hdlr, 0);
  3699. }
  3700. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3701. icnss_pr_info("Platform driver probed successfully\n");
  3702. return 0;
  3703. out_unregister_fw_service:
  3704. icnss_unregister_fw_service(priv);
  3705. out_destroy_wq:
  3706. destroy_workqueue(priv->event_wq);
  3707. smmu_cleanup:
  3708. priv->iommu_domain = NULL;
  3709. out_free_resources:
  3710. icnss_put_resources(priv);
  3711. out_reset_drvdata:
  3712. dev_set_drvdata(dev, NULL);
  3713. return ret;
  3714. }
  3715. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3716. {
  3717. if (IS_ERR_OR_NULL(ramdump_info))
  3718. return;
  3719. device_unregister(ramdump_info->dev);
  3720. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3721. kfree(ramdump_info);
  3722. }
  3723. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3724. {
  3725. if (priv->batt_psy)
  3726. power_supply_put(penv->batt_psy);
  3727. if (priv->psf_supported) {
  3728. flush_workqueue(priv->soc_update_wq);
  3729. destroy_workqueue(priv->soc_update_wq);
  3730. power_supply_unreg_notifier(&priv->psf_nb);
  3731. }
  3732. }
  3733. static int icnss_remove(struct platform_device *pdev)
  3734. {
  3735. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3736. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3737. del_timer(&priv->recovery_timer);
  3738. if (priv->wpss_self_recovery_enabled)
  3739. del_timer(&priv->wpss_ssr_timer);
  3740. device_init_wakeup(&priv->pdev->dev, false);
  3741. icnss_debugfs_destroy(priv);
  3742. icnss_unregister_power_supply_notifier(penv);
  3743. icnss_sysfs_destroy(priv);
  3744. complete_all(&priv->unblock_shutdown);
  3745. if (priv->is_slate_rfa)
  3746. icnss_slate_ssr_unregister_notifier(priv);
  3747. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3748. if (priv->wpss_supported) {
  3749. icnss_dms_deinit(priv);
  3750. icnss_wpss_early_ssr_unregister_notifier(priv);
  3751. icnss_wpss_ssr_unregister_notifier(priv);
  3752. } else {
  3753. icnss_modem_ssr_unregister_notifier(priv);
  3754. icnss_pdr_unregister_notifier(priv);
  3755. }
  3756. if (priv->device_id == WCN6750_DEVICE_ID) {
  3757. icnss_genl_exit();
  3758. icnss_runtime_pm_deinit(priv);
  3759. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3760. mbox_free_channel(priv->mbox_chan);
  3761. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3762. complete_all(&priv->smp2p_soc_wake_wait);
  3763. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3764. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3765. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3766. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3767. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3768. if (priv->soc_wake_wq)
  3769. destroy_workqueue(priv->soc_wake_wq);
  3770. }
  3771. class_destroy(priv->icnss_ramdump_class);
  3772. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3773. icnss_unregister_fw_service(priv);
  3774. if (priv->event_wq)
  3775. destroy_workqueue(priv->event_wq);
  3776. priv->iommu_domain = NULL;
  3777. icnss_hw_power_off(priv);
  3778. icnss_put_resources(priv);
  3779. dev_set_drvdata(&pdev->dev, NULL);
  3780. return 0;
  3781. }
  3782. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  3783. {
  3784. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  3785. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  3786. ICNSS_ASSERT(0);
  3787. }
  3788. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  3789. {
  3790. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  3791. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  3792. priv->state);
  3793. schedule_work(&wpss_ssr_work);
  3794. }
  3795. #ifdef CONFIG_PM_SLEEP
  3796. static int icnss_pm_suspend(struct device *dev)
  3797. {
  3798. struct icnss_priv *priv = dev_get_drvdata(dev);
  3799. int ret = 0;
  3800. if (priv->magic != ICNSS_MAGIC) {
  3801. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3802. dev, priv, priv->magic);
  3803. return -EINVAL;
  3804. }
  3805. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3806. if (!priv->ops || !priv->ops->pm_suspend ||
  3807. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3808. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3809. return 0;
  3810. ret = priv->ops->pm_suspend(dev);
  3811. if (ret == 0) {
  3812. if (priv->device_id == WCN6750_DEVICE_ID) {
  3813. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3814. !test_bit(ICNSS_MODE_ON, &priv->state))
  3815. return 0;
  3816. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3817. ICNSS_SMP2P_OUT_POWER_SAVE);
  3818. }
  3819. priv->stats.pm_suspend++;
  3820. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3821. } else {
  3822. priv->stats.pm_suspend_err++;
  3823. }
  3824. return ret;
  3825. }
  3826. static int icnss_pm_resume(struct device *dev)
  3827. {
  3828. struct icnss_priv *priv = dev_get_drvdata(dev);
  3829. int ret = 0;
  3830. if (priv->magic != ICNSS_MAGIC) {
  3831. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3832. dev, priv, priv->magic);
  3833. return -EINVAL;
  3834. }
  3835. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3836. if (!priv->ops || !priv->ops->pm_resume ||
  3837. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3838. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3839. goto out;
  3840. ret = priv->ops->pm_resume(dev);
  3841. out:
  3842. if (ret == 0) {
  3843. priv->stats.pm_resume++;
  3844. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3845. } else {
  3846. priv->stats.pm_resume_err++;
  3847. }
  3848. return ret;
  3849. }
  3850. static int icnss_pm_suspend_noirq(struct device *dev)
  3851. {
  3852. struct icnss_priv *priv = dev_get_drvdata(dev);
  3853. int ret = 0;
  3854. if (priv->magic != ICNSS_MAGIC) {
  3855. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3856. dev, priv, priv->magic);
  3857. return -EINVAL;
  3858. }
  3859. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3860. if (!priv->ops || !priv->ops->suspend_noirq ||
  3861. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3862. goto out;
  3863. ret = priv->ops->suspend_noirq(dev);
  3864. out:
  3865. if (ret == 0) {
  3866. priv->stats.pm_suspend_noirq++;
  3867. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3868. } else {
  3869. priv->stats.pm_suspend_noirq_err++;
  3870. }
  3871. return ret;
  3872. }
  3873. static int icnss_pm_resume_noirq(struct device *dev)
  3874. {
  3875. struct icnss_priv *priv = dev_get_drvdata(dev);
  3876. int ret = 0;
  3877. if (priv->magic != ICNSS_MAGIC) {
  3878. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3879. dev, priv, priv->magic);
  3880. return -EINVAL;
  3881. }
  3882. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3883. if (!priv->ops || !priv->ops->resume_noirq ||
  3884. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3885. goto out;
  3886. ret = priv->ops->resume_noirq(dev);
  3887. out:
  3888. if (ret == 0) {
  3889. priv->stats.pm_resume_noirq++;
  3890. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3891. } else {
  3892. priv->stats.pm_resume_noirq_err++;
  3893. }
  3894. return ret;
  3895. }
  3896. static int icnss_pm_runtime_suspend(struct device *dev)
  3897. {
  3898. struct icnss_priv *priv = dev_get_drvdata(dev);
  3899. int ret = 0;
  3900. if (priv->device_id != WCN6750_DEVICE_ID) {
  3901. icnss_pr_err("Ignore runtime suspend:\n");
  3902. goto out;
  3903. }
  3904. if (priv->magic != ICNSS_MAGIC) {
  3905. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3906. dev, priv, priv->magic);
  3907. return -EINVAL;
  3908. }
  3909. if (!priv->ops || !priv->ops->runtime_suspend ||
  3910. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3911. goto out;
  3912. icnss_pr_vdbg("Runtime suspend\n");
  3913. ret = priv->ops->runtime_suspend(dev);
  3914. if (!ret) {
  3915. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3916. !test_bit(ICNSS_MODE_ON, &priv->state))
  3917. return 0;
  3918. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3919. ICNSS_SMP2P_OUT_POWER_SAVE);
  3920. }
  3921. out:
  3922. return ret;
  3923. }
  3924. static int icnss_pm_runtime_resume(struct device *dev)
  3925. {
  3926. struct icnss_priv *priv = dev_get_drvdata(dev);
  3927. int ret = 0;
  3928. if (priv->device_id != WCN6750_DEVICE_ID) {
  3929. icnss_pr_err("Ignore runtime resume:\n");
  3930. goto out;
  3931. }
  3932. if (priv->magic != ICNSS_MAGIC) {
  3933. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3934. dev, priv, priv->magic);
  3935. return -EINVAL;
  3936. }
  3937. if (!priv->ops || !priv->ops->runtime_resume ||
  3938. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3939. goto out;
  3940. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3941. ret = priv->ops->runtime_resume(dev);
  3942. out:
  3943. return ret;
  3944. }
  3945. static int icnss_pm_runtime_idle(struct device *dev)
  3946. {
  3947. struct icnss_priv *priv = dev_get_drvdata(dev);
  3948. if (priv->device_id != WCN6750_DEVICE_ID) {
  3949. icnss_pr_err("Ignore runtime idle:\n");
  3950. goto out;
  3951. }
  3952. icnss_pr_vdbg("Runtime idle\n");
  3953. pm_request_autosuspend(dev);
  3954. out:
  3955. return -EBUSY;
  3956. }
  3957. #endif
  3958. static const struct dev_pm_ops icnss_pm_ops = {
  3959. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3960. icnss_pm_resume)
  3961. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3962. icnss_pm_resume_noirq)
  3963. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3964. icnss_pm_runtime_idle)
  3965. };
  3966. static struct platform_driver icnss_driver = {
  3967. .probe = icnss_probe,
  3968. .remove = icnss_remove,
  3969. .driver = {
  3970. .name = "icnss2",
  3971. .pm = &icnss_pm_ops,
  3972. .of_match_table = icnss_dt_match,
  3973. },
  3974. };
  3975. static int __init icnss_initialize(void)
  3976. {
  3977. icnss_debug_init();
  3978. return platform_driver_register(&icnss_driver);
  3979. }
  3980. static void __exit icnss_exit(void)
  3981. {
  3982. platform_driver_unregister(&icnss_driver);
  3983. icnss_debug_deinit();
  3984. }
  3985. module_init(icnss_initialize);
  3986. module_exit(icnss_exit);
  3987. MODULE_LICENSE("GPL v2");
  3988. MODULE_DESCRIPTION("iWCN CORE platform driver");