dsi_panel.c 120 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. #define RSCC_MODE_THRESHOLD_TIME_US 40
  34. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  35. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  36. {
  37. char *bp;
  38. bp = buf;
  39. /* First 7 bytes are cmd header */
  40. *bp++ = 0x0A;
  41. *bp++ = 1;
  42. *bp++ = 0;
  43. *bp++ = 0;
  44. *bp++ = pps_delay_ms;
  45. *bp++ = 0;
  46. *bp++ = 128;
  47. }
  48. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  49. char *buf, int pps_id, u32 size)
  50. {
  51. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  52. buf += DSI_CMD_PPS_HDR_SIZE;
  53. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  54. size);
  55. }
  56. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  57. char *buf, int pps_id, u32 size)
  58. {
  59. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  60. buf += DSI_CMD_PPS_HDR_SIZE;
  61. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  62. size);
  63. }
  64. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  65. {
  66. int rc = 0;
  67. int i;
  68. struct regulator *vreg = NULL;
  69. for (i = 0; i < panel->power_info.count; i++) {
  70. vreg = devm_regulator_get(panel->parent,
  71. panel->power_info.vregs[i].vreg_name);
  72. rc = PTR_ERR_OR_ZERO(vreg);
  73. if (rc) {
  74. DSI_ERR("failed to get %s regulator\n",
  75. panel->power_info.vregs[i].vreg_name);
  76. goto error_put;
  77. }
  78. panel->power_info.vregs[i].vreg = vreg;
  79. }
  80. return rc;
  81. error_put:
  82. for (i = i - 1; i >= 0; i--) {
  83. devm_regulator_put(panel->power_info.vregs[i].vreg);
  84. panel->power_info.vregs[i].vreg = NULL;
  85. }
  86. return rc;
  87. }
  88. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  89. {
  90. int rc = 0;
  91. int i;
  92. for (i = panel->power_info.count - 1; i >= 0; i--)
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. return rc;
  95. }
  96. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  97. {
  98. int rc = 0;
  99. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  100. if (gpio_is_valid(r_config->reset_gpio)) {
  101. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  102. if (rc) {
  103. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  104. goto error;
  105. }
  106. }
  107. if (gpio_is_valid(r_config->disp_en_gpio)) {
  108. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  109. if (rc) {
  110. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  111. goto error_release_reset;
  112. }
  113. }
  114. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  115. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  116. if (rc) {
  117. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  118. goto error_release_disp_en;
  119. }
  120. }
  121. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  122. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  123. if (rc) {
  124. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  125. goto error_release_mode_sel;
  126. }
  127. }
  128. if (gpio_is_valid(panel->panel_test_gpio)) {
  129. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  130. if (rc) {
  131. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  132. rc);
  133. panel->panel_test_gpio = -1;
  134. rc = 0;
  135. }
  136. }
  137. goto error;
  138. error_release_mode_sel:
  139. if (gpio_is_valid(panel->bl_config.en_gpio))
  140. gpio_free(panel->bl_config.en_gpio);
  141. error_release_disp_en:
  142. if (gpio_is_valid(r_config->disp_en_gpio))
  143. gpio_free(r_config->disp_en_gpio);
  144. error_release_reset:
  145. if (gpio_is_valid(r_config->reset_gpio))
  146. gpio_free(r_config->reset_gpio);
  147. error:
  148. return rc;
  149. }
  150. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  151. {
  152. int rc = 0;
  153. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  154. if (gpio_is_valid(r_config->reset_gpio))
  155. gpio_free(r_config->reset_gpio);
  156. if (gpio_is_valid(r_config->disp_en_gpio))
  157. gpio_free(r_config->disp_en_gpio);
  158. if (gpio_is_valid(panel->bl_config.en_gpio))
  159. gpio_free(panel->bl_config.en_gpio);
  160. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  161. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  162. if (gpio_is_valid(panel->panel_test_gpio))
  163. gpio_free(panel->panel_test_gpio);
  164. return rc;
  165. }
  166. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  167. {
  168. if (!gpio_is_valid(reset_gpio)) {
  169. DSI_INFO("failed to pull down the reset gpio\n");
  170. return -EINVAL;
  171. }
  172. gpio_set_value(reset_gpio, 0);
  173. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  174. DSI_INFO("GPIO pulled low to simulate ESD\n");
  175. return 0;
  176. }
  177. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  178. {
  179. struct dsi_parser_utils *utils = &panel->utils;
  180. int reset_gpio;
  181. int rc = 0;
  182. reset_gpio = utils->get_named_gpio(utils->data,
  183. "qcom,platform-reset-gpio", 0);
  184. if (!gpio_is_valid(reset_gpio)) {
  185. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  186. return -EINVAL;
  187. }
  188. rc = gpio_request(reset_gpio, "reset_gpio");
  189. if (rc) {
  190. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  191. return rc;
  192. }
  193. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  194. gpio_free(reset_gpio);
  195. return rc;
  196. }
  197. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  198. {
  199. struct dsi_panel_reset_config *r_config;
  200. if (!panel) {
  201. DSI_ERR("Invalid panel param\n");
  202. return -EINVAL;
  203. }
  204. r_config = &panel->reset_config;
  205. if (!r_config) {
  206. DSI_ERR("Invalid panel reset configuration\n");
  207. return -EINVAL;
  208. }
  209. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  210. }
  211. static int dsi_panel_reset(struct dsi_panel *panel)
  212. {
  213. int rc = 0;
  214. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  215. int i;
  216. if (!gpio_is_valid(r_config->reset_gpio))
  217. goto skip_reset_gpio;
  218. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  219. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  220. if (rc) {
  221. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  222. goto exit;
  223. }
  224. }
  225. if (r_config->count) {
  226. rc = gpio_direction_output(r_config->reset_gpio,
  227. r_config->sequence[0].level);
  228. if (rc) {
  229. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  230. goto exit;
  231. }
  232. }
  233. for (i = 0; i < r_config->count; i++) {
  234. gpio_set_value(r_config->reset_gpio,
  235. r_config->sequence[i].level);
  236. if (r_config->sequence[i].sleep_ms)
  237. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  238. (r_config->sequence[i].sleep_ms * 1000) + 100);
  239. }
  240. skip_reset_gpio:
  241. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  242. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  243. if (rc)
  244. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  245. }
  246. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  247. bool out = true;
  248. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  249. || (panel->reset_config.mode_sel_state
  250. == MODE_GPIO_LOW))
  251. out = false;
  252. else if ((panel->reset_config.mode_sel_state
  253. == MODE_SEL_SINGLE_PORT) ||
  254. (panel->reset_config.mode_sel_state
  255. == MODE_GPIO_HIGH))
  256. out = true;
  257. rc = gpio_direction_output(
  258. panel->reset_config.lcd_mode_sel_gpio, out);
  259. if (rc)
  260. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  261. }
  262. if (gpio_is_valid(panel->panel_test_gpio)) {
  263. rc = gpio_direction_input(panel->panel_test_gpio);
  264. if (rc)
  265. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  266. rc);
  267. }
  268. exit:
  269. return rc;
  270. }
  271. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  272. {
  273. int rc = 0;
  274. struct pinctrl_state *state;
  275. if (panel->host_config.ext_bridge_mode)
  276. return 0;
  277. if (!panel->pinctrl.pinctrl)
  278. return 0;
  279. if (enable)
  280. state = panel->pinctrl.active;
  281. else
  282. state = panel->pinctrl.suspend;
  283. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  284. if (rc)
  285. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  286. panel->name, rc);
  287. return rc;
  288. }
  289. static int dsi_panel_power_on(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  293. if (rc) {
  294. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  295. panel->name, rc);
  296. goto exit;
  297. }
  298. rc = dsi_panel_set_pinctrl_state(panel, true);
  299. if (rc) {
  300. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  301. goto error_disable_vregs;
  302. }
  303. rc = dsi_panel_reset(panel);
  304. if (rc) {
  305. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  306. goto error_disable_gpio;
  307. }
  308. goto exit;
  309. error_disable_gpio:
  310. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  311. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  312. if (gpio_is_valid(panel->bl_config.en_gpio))
  313. gpio_set_value(panel->bl_config.en_gpio, 0);
  314. (void)dsi_panel_set_pinctrl_state(panel, false);
  315. error_disable_vregs:
  316. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  317. exit:
  318. return rc;
  319. }
  320. static int dsi_panel_power_off(struct dsi_panel *panel)
  321. {
  322. int rc = 0;
  323. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  324. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  325. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  326. !panel->reset_gpio_always_on)
  327. gpio_set_value(panel->reset_config.reset_gpio, 0);
  328. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  329. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  330. if (gpio_is_valid(panel->panel_test_gpio)) {
  331. rc = gpio_direction_input(panel->panel_test_gpio);
  332. if (rc)
  333. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  334. rc);
  335. }
  336. rc = dsi_panel_set_pinctrl_state(panel, false);
  337. if (rc) {
  338. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  339. rc);
  340. }
  341. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  342. if (rc)
  343. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  344. panel->name, rc);
  345. return rc;
  346. }
  347. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  348. enum dsi_cmd_set_type type)
  349. {
  350. int rc = 0, i = 0;
  351. ssize_t len;
  352. struct dsi_cmd_desc *cmds;
  353. u32 count;
  354. enum dsi_cmd_set_state state;
  355. struct dsi_display_mode *mode;
  356. if (!panel || !panel->cur_mode)
  357. return -EINVAL;
  358. mode = panel->cur_mode;
  359. cmds = mode->priv_info->cmd_sets[type].cmds;
  360. count = mode->priv_info->cmd_sets[type].count;
  361. state = mode->priv_info->cmd_sets[type].state;
  362. SDE_EVT32(type, state, count);
  363. if (count == 0) {
  364. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  365. panel->name, type);
  366. goto error;
  367. }
  368. for (i = 0; i < count; i++) {
  369. cmds->ctrl_flags = 0;
  370. if (state == DSI_CMD_SET_STATE_LP)
  371. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  372. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  373. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  374. len = dsi_host_transfer_sub(panel->host, cmds);
  375. if (len < 0) {
  376. rc = len;
  377. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  378. goto error;
  379. }
  380. if (cmds->post_wait_ms)
  381. usleep_range(cmds->post_wait_ms*1000,
  382. ((cmds->post_wait_ms*1000)+10));
  383. cmds++;
  384. }
  385. error:
  386. return rc;
  387. }
  388. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  389. {
  390. int rc = 0;
  391. if (panel->host_config.ext_bridge_mode)
  392. return 0;
  393. devm_pinctrl_put(panel->pinctrl.pinctrl);
  394. return rc;
  395. }
  396. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  397. {
  398. int rc = 0;
  399. if (panel->host_config.ext_bridge_mode)
  400. return 0;
  401. /* TODO: pinctrl is defined in dsi dt node */
  402. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  403. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  404. rc = PTR_ERR(panel->pinctrl.pinctrl);
  405. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  406. goto error;
  407. }
  408. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  409. "panel_active");
  410. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  411. rc = PTR_ERR(panel->pinctrl.active);
  412. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  413. goto error;
  414. }
  415. panel->pinctrl.suspend =
  416. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  417. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  418. rc = PTR_ERR(panel->pinctrl.suspend);
  419. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  420. goto error;
  421. }
  422. panel->pinctrl.pwm_pin =
  423. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  424. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  425. panel->pinctrl.pwm_pin = NULL;
  426. DSI_DEBUG("failed to get pinctrl pwm_pin");
  427. }
  428. error:
  429. return rc;
  430. }
  431. static int dsi_panel_wled_register(struct dsi_panel *panel,
  432. struct dsi_backlight_config *bl)
  433. {
  434. struct backlight_device *bd;
  435. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  436. if (!bd) {
  437. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  438. panel->name, -EPROBE_DEFER);
  439. return -EPROBE_DEFER;
  440. }
  441. bl->raw_bd = bd;
  442. return 0;
  443. }
  444. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  445. u32 bl_lvl)
  446. {
  447. int rc = 0;
  448. unsigned long mode_flags = 0;
  449. struct mipi_dsi_device *dsi = NULL;
  450. if (!panel || (bl_lvl > 0xffff)) {
  451. DSI_ERR("invalid params\n");
  452. return -EINVAL;
  453. }
  454. dsi = &panel->mipi_device;
  455. if (unlikely(panel->bl_config.lp_mode)) {
  456. mode_flags = dsi->mode_flags;
  457. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  458. }
  459. if (panel->bl_config.bl_inverted_dbv)
  460. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  461. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  462. if (rc < 0)
  463. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  464. if (unlikely(panel->bl_config.lp_mode))
  465. dsi->mode_flags = mode_flags;
  466. return rc;
  467. }
  468. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  469. u32 bl_lvl)
  470. {
  471. int rc = 0;
  472. u32 duty = 0;
  473. u32 period_ns = 0;
  474. struct dsi_backlight_config *bl;
  475. if (!panel) {
  476. DSI_ERR("Invalid Params\n");
  477. return -EINVAL;
  478. }
  479. bl = &panel->bl_config;
  480. if (!bl->pwm_bl) {
  481. DSI_ERR("pwm device not found\n");
  482. return -EINVAL;
  483. }
  484. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  485. duty = bl_lvl * period_ns;
  486. duty /= bl->bl_max_level;
  487. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  488. if (rc) {
  489. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  490. rc);
  491. goto error;
  492. }
  493. if (bl_lvl == 0 && bl->pwm_enabled) {
  494. pwm_disable(bl->pwm_bl);
  495. bl->pwm_enabled = false;
  496. return 0;
  497. }
  498. if (bl_lvl != 0 && !bl->pwm_enabled) {
  499. rc = pwm_enable(bl->pwm_bl);
  500. if (rc) {
  501. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  502. rc);
  503. goto error;
  504. }
  505. bl->pwm_enabled = true;
  506. }
  507. error:
  508. return rc;
  509. }
  510. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  511. {
  512. int rc = 0;
  513. struct dsi_backlight_config *bl = &panel->bl_config;
  514. if (panel->host_config.ext_bridge_mode)
  515. return 0;
  516. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  517. switch (bl->type) {
  518. case DSI_BACKLIGHT_WLED:
  519. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  520. break;
  521. case DSI_BACKLIGHT_DCS:
  522. rc = dsi_panel_update_backlight(panel, bl_lvl);
  523. break;
  524. case DSI_BACKLIGHT_EXTERNAL:
  525. break;
  526. case DSI_BACKLIGHT_PWM:
  527. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  528. break;
  529. default:
  530. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  531. rc = -ENOTSUPP;
  532. }
  533. return rc;
  534. }
  535. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  536. {
  537. u32 cur_bl_level;
  538. struct backlight_device *bd = bl->raw_bd;
  539. /* default the brightness level to 50% */
  540. cur_bl_level = bl->bl_max_level >> 1;
  541. switch (bl->type) {
  542. case DSI_BACKLIGHT_WLED:
  543. /* Try to query the backlight level from the backlight device */
  544. if (bd->ops && bd->ops->get_brightness)
  545. cur_bl_level = bd->ops->get_brightness(bd);
  546. break;
  547. case DSI_BACKLIGHT_DCS:
  548. case DSI_BACKLIGHT_EXTERNAL:
  549. case DSI_BACKLIGHT_PWM:
  550. default:
  551. /*
  552. * Ideally, we should read the backlight level from the
  553. * panel. For now, just set it default value.
  554. */
  555. break;
  556. }
  557. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  558. return cur_bl_level;
  559. }
  560. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  561. {
  562. struct dsi_backlight_config *bl = &panel->bl_config;
  563. bl->bl_level = dsi_panel_get_brightness(bl);
  564. }
  565. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  566. {
  567. int rc = 0;
  568. struct dsi_backlight_config *bl = &panel->bl_config;
  569. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  570. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  571. rc = PTR_ERR(bl->pwm_bl);
  572. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  573. rc);
  574. return rc;
  575. }
  576. if (panel->pinctrl.pwm_pin) {
  577. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  578. panel->pinctrl.pwm_pin);
  579. if (rc)
  580. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  581. panel->name, rc);
  582. }
  583. return 0;
  584. }
  585. static int dsi_panel_bl_register(struct dsi_panel *panel)
  586. {
  587. int rc = 0;
  588. struct dsi_backlight_config *bl = &panel->bl_config;
  589. if (panel->host_config.ext_bridge_mode)
  590. return 0;
  591. switch (bl->type) {
  592. case DSI_BACKLIGHT_WLED:
  593. rc = dsi_panel_wled_register(panel, bl);
  594. break;
  595. case DSI_BACKLIGHT_DCS:
  596. break;
  597. case DSI_BACKLIGHT_EXTERNAL:
  598. break;
  599. case DSI_BACKLIGHT_PWM:
  600. rc = dsi_panel_pwm_register(panel);
  601. break;
  602. default:
  603. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  604. rc = -ENOTSUPP;
  605. goto error;
  606. }
  607. error:
  608. return rc;
  609. }
  610. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  611. {
  612. int rc = 0;
  613. struct dsi_backlight_config *bl = &panel->bl_config;
  614. if (panel->host_config.ext_bridge_mode)
  615. return 0;
  616. switch (bl->type) {
  617. case DSI_BACKLIGHT_WLED:
  618. break;
  619. case DSI_BACKLIGHT_DCS:
  620. break;
  621. case DSI_BACKLIGHT_EXTERNAL:
  622. break;
  623. case DSI_BACKLIGHT_PWM:
  624. break;
  625. default:
  626. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  627. rc = -ENOTSUPP;
  628. goto error;
  629. }
  630. error:
  631. return rc;
  632. }
  633. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  634. struct dsi_parser_utils *utils)
  635. {
  636. int rc = 0;
  637. u64 tmp64 = 0;
  638. struct dsi_display_mode *display_mode;
  639. struct dsi_display_mode_priv_info *priv_info;
  640. display_mode = container_of(mode, struct dsi_display_mode, timing);
  641. priv_info = display_mode->priv_info;
  642. rc = utils->read_u64(utils->data,
  643. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  644. if (rc == -EOVERFLOW) {
  645. tmp64 = 0;
  646. rc = utils->read_u32(utils->data,
  647. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  648. }
  649. mode->clk_rate_hz = !rc ? tmp64 : 0;
  650. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  651. mode->pclk_scale.numer = 1;
  652. mode->pclk_scale.denom = 1;
  653. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  654. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  655. &mode->mdp_transfer_time_us);
  656. if (!rc)
  657. display_mode->priv_info->mdp_transfer_time_us =
  658. mode->mdp_transfer_time_us;
  659. else
  660. display_mode->priv_info->mdp_transfer_time_us = 0;
  661. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  662. rc = utils->read_u32(utils->data,
  663. "qcom,mdss-dsi-panel-framerate",
  664. &mode->refresh_rate);
  665. if (rc) {
  666. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  667. rc);
  668. goto error;
  669. }
  670. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  671. &mode->h_active);
  672. if (rc) {
  673. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  674. rc);
  675. goto error;
  676. }
  677. rc = utils->read_u32(utils->data,
  678. "qcom,mdss-dsi-h-front-porch",
  679. &mode->h_front_porch);
  680. if (rc) {
  681. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  682. rc);
  683. goto error;
  684. }
  685. rc = utils->read_u32(utils->data,
  686. "qcom,mdss-dsi-h-back-porch",
  687. &mode->h_back_porch);
  688. if (rc) {
  689. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  690. rc);
  691. goto error;
  692. }
  693. rc = utils->read_u32(utils->data,
  694. "qcom,mdss-dsi-h-pulse-width",
  695. &mode->h_sync_width);
  696. if (rc) {
  697. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  698. rc);
  699. goto error;
  700. }
  701. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  702. &mode->h_skew);
  703. if (rc)
  704. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  705. rc);
  706. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  707. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  708. mode->h_sync_width);
  709. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  710. &mode->v_active);
  711. if (rc) {
  712. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  713. rc);
  714. goto error;
  715. }
  716. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  717. &mode->v_back_porch);
  718. if (rc) {
  719. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  720. rc);
  721. goto error;
  722. }
  723. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  724. &mode->v_front_porch);
  725. if (rc) {
  726. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  727. rc);
  728. goto error;
  729. }
  730. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  731. &mode->v_sync_width);
  732. if (rc) {
  733. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  734. rc);
  735. goto error;
  736. }
  737. rc = utils->read_u32(utils->data, "qcom,qsync-mode-min-refresh-rate", &mode->qsync_min_fps);
  738. if (rc) {
  739. DSI_DEBUG("qsync min fps not defined in timing node\n");
  740. rc = 0;
  741. }
  742. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  743. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  744. mode->v_sync_width);
  745. error:
  746. return rc;
  747. }
  748. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  749. struct dsi_parser_utils *utils,
  750. const char *name)
  751. {
  752. int rc = 0;
  753. u32 bpp = 0;
  754. enum dsi_pixel_format fmt;
  755. const char *packing;
  756. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  757. if (rc) {
  758. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  759. name, rc);
  760. return rc;
  761. }
  762. host->bpp = bpp;
  763. switch (bpp) {
  764. case 3:
  765. fmt = DSI_PIXEL_FORMAT_RGB111;
  766. break;
  767. case 8:
  768. fmt = DSI_PIXEL_FORMAT_RGB332;
  769. break;
  770. case 12:
  771. fmt = DSI_PIXEL_FORMAT_RGB444;
  772. break;
  773. case 16:
  774. fmt = DSI_PIXEL_FORMAT_RGB565;
  775. break;
  776. case 18:
  777. fmt = DSI_PIXEL_FORMAT_RGB666;
  778. break;
  779. case 24:
  780. default:
  781. fmt = DSI_PIXEL_FORMAT_RGB888;
  782. break;
  783. }
  784. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  785. packing = utils->get_property(utils->data,
  786. "qcom,mdss-dsi-pixel-packing",
  787. NULL);
  788. if (packing && !strcmp(packing, "loose"))
  789. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  790. }
  791. host->dst_format = fmt;
  792. return rc;
  793. }
  794. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  795. struct dsi_parser_utils *utils,
  796. const char *name)
  797. {
  798. int rc = 0;
  799. bool lane_enabled;
  800. u32 num_of_lanes = 0;
  801. lane_enabled = utils->read_bool(utils->data,
  802. "qcom,mdss-dsi-lane-0-state");
  803. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  804. lane_enabled = utils->read_bool(utils->data,
  805. "qcom,mdss-dsi-lane-1-state");
  806. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  807. lane_enabled = utils->read_bool(utils->data,
  808. "qcom,mdss-dsi-lane-2-state");
  809. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  810. lane_enabled = utils->read_bool(utils->data,
  811. "qcom,mdss-dsi-lane-3-state");
  812. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  813. if (host->data_lanes & DSI_DATA_LANE_0)
  814. num_of_lanes++;
  815. if (host->data_lanes & DSI_DATA_LANE_1)
  816. num_of_lanes++;
  817. if (host->data_lanes & DSI_DATA_LANE_2)
  818. num_of_lanes++;
  819. if (host->data_lanes & DSI_DATA_LANE_3)
  820. num_of_lanes++;
  821. host->num_data_lanes = num_of_lanes;
  822. if (host->data_lanes == 0) {
  823. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  824. rc = -EINVAL;
  825. }
  826. return rc;
  827. }
  828. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  829. struct dsi_parser_utils *utils,
  830. const char *name)
  831. {
  832. int rc = 0;
  833. const char *swap_mode;
  834. swap_mode = utils->get_property(utils->data,
  835. "qcom,mdss-dsi-color-order", NULL);
  836. if (swap_mode) {
  837. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  838. host->swap_mode = DSI_COLOR_SWAP_RGB;
  839. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  840. host->swap_mode = DSI_COLOR_SWAP_RBG;
  841. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  842. host->swap_mode = DSI_COLOR_SWAP_BRG;
  843. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  844. host->swap_mode = DSI_COLOR_SWAP_GRB;
  845. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  846. host->swap_mode = DSI_COLOR_SWAP_GBR;
  847. } else {
  848. DSI_ERR("[%s] Unrecognized color order-%s\n",
  849. name, swap_mode);
  850. rc = -EINVAL;
  851. }
  852. } else {
  853. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  854. host->swap_mode = DSI_COLOR_SWAP_RGB;
  855. }
  856. /* bit swap on color channel is not defined in dt */
  857. host->bit_swap_red = false;
  858. host->bit_swap_green = false;
  859. host->bit_swap_blue = false;
  860. return rc;
  861. }
  862. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  863. struct dsi_parser_utils *utils,
  864. const char *name)
  865. {
  866. const char *trig;
  867. int rc = 0;
  868. trig = utils->get_property(utils->data,
  869. "qcom,mdss-dsi-mdp-trigger", NULL);
  870. if (trig) {
  871. if (!strcmp(trig, "none")) {
  872. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  873. } else if (!strcmp(trig, "trigger_te")) {
  874. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  875. } else if (!strcmp(trig, "trigger_sw")) {
  876. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  877. } else if (!strcmp(trig, "trigger_sw_te")) {
  878. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  879. } else {
  880. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  881. name, trig);
  882. rc = -EINVAL;
  883. }
  884. } else {
  885. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  886. name);
  887. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  888. }
  889. trig = utils->get_property(utils->data,
  890. "qcom,mdss-dsi-dma-trigger", NULL);
  891. if (trig) {
  892. if (!strcmp(trig, "none")) {
  893. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  894. } else if (!strcmp(trig, "trigger_te")) {
  895. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  896. } else if (!strcmp(trig, "trigger_sw")) {
  897. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  898. } else if (!strcmp(trig, "trigger_sw_seof")) {
  899. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  900. } else if (!strcmp(trig, "trigger_sw_te")) {
  901. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  902. } else {
  903. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  904. name, trig);
  905. rc = -EINVAL;
  906. }
  907. } else {
  908. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  909. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  910. }
  911. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  912. &host->te_mode);
  913. if (rc) {
  914. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  915. host->te_mode = 1;
  916. rc = 0;
  917. }
  918. return rc;
  919. }
  920. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  921. struct dsi_parser_utils *utils,
  922. const char *name)
  923. {
  924. u32 val = 0, line_no = 0, window = 0;
  925. int rc = 0;
  926. bool panel_cphy_mode = false;
  927. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  928. if (!rc) {
  929. host->t_clk_post = val;
  930. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  931. }
  932. val = 0;
  933. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  934. if (!rc) {
  935. host->t_clk_pre = val;
  936. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  937. }
  938. host->ignore_rx_eot = utils->read_bool(utils->data,
  939. "qcom,mdss-dsi-rx-eot-ignore");
  940. host->append_tx_eot = utils->read_bool(utils->data,
  941. "qcom,mdss-dsi-tx-eot-append");
  942. host->ext_bridge_mode = utils->read_bool(utils->data,
  943. "qcom,mdss-dsi-ext-bridge-mode");
  944. host->force_hs_clk_lane = utils->read_bool(utils->data,
  945. "qcom,mdss-dsi-force-clock-lane-hs");
  946. panel_cphy_mode = utils->read_bool(utils->data,
  947. "qcom,panel-cphy-mode");
  948. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  949. : DSI_PHY_TYPE_DPHY;
  950. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  951. &line_no);
  952. if (rc)
  953. host->dma_sched_line = 0;
  954. else
  955. host->dma_sched_line = line_no;
  956. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  957. &window);
  958. if (rc)
  959. host->dma_sched_window = 0;
  960. else
  961. host->dma_sched_window = window;
  962. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  963. host->dma_sched_line, host->dma_sched_window);
  964. return 0;
  965. }
  966. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  967. struct dsi_parser_utils *utils,
  968. const char *name)
  969. {
  970. int rc = 0;
  971. u32 val = 0;
  972. bool supported = false;
  973. struct dsi_split_link_config *split_link = &host->split_link;
  974. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  975. if (!supported) {
  976. DSI_DEBUG("[%s] Split link is not supported\n", name);
  977. split_link->enabled = false;
  978. return;
  979. }
  980. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  981. if (rc || val < 1) {
  982. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  983. split_link->num_sublinks = 2;
  984. } else {
  985. split_link->num_sublinks = val;
  986. }
  987. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  988. if (rc || val < 1) {
  989. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  990. split_link->lanes_per_sublink = 2;
  991. } else {
  992. split_link->lanes_per_sublink = val;
  993. }
  994. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  995. if (!supported)
  996. split_link->sublink_swap = false;
  997. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  998. split_link->num_sublinks, split_link->lanes_per_sublink);
  999. split_link->enabled = true;
  1000. }
  1001. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1002. {
  1003. int rc = 0;
  1004. struct dsi_parser_utils *utils = &panel->utils;
  1005. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1006. panel->name);
  1007. if (rc) {
  1008. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1009. panel->name, rc);
  1010. goto error;
  1011. }
  1012. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1013. panel->name);
  1014. if (rc) {
  1015. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1016. panel->name, rc);
  1017. goto error;
  1018. }
  1019. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1020. panel->name);
  1021. if (rc) {
  1022. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1023. panel->name, rc);
  1024. goto error;
  1025. }
  1026. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1027. panel->name);
  1028. if (rc) {
  1029. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1030. panel->name, rc);
  1031. goto error;
  1032. }
  1033. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1034. panel->name);
  1035. if (rc) {
  1036. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1037. panel->name, rc);
  1038. goto error;
  1039. }
  1040. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1041. panel->name);
  1042. error:
  1043. return rc;
  1044. }
  1045. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1046. struct device_node *of_node)
  1047. {
  1048. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1049. struct dsi_parser_utils *utils = &panel->utils;
  1050. int val, rc = 0;
  1051. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1052. if (val <= 0) {
  1053. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1054. return rc;
  1055. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1056. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1057. val, panel->dfps_caps.dfps_list_len);
  1058. return -EINVAL;
  1059. }
  1060. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1061. if (!avr_caps->avr_step_fps_list)
  1062. return -ENOMEM;
  1063. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1064. avr_caps->avr_step_fps_list, val);
  1065. if (rc) {
  1066. kfree(avr_caps->avr_step_fps_list);
  1067. return rc;
  1068. }
  1069. avr_caps->avr_step_fps_list_len = val;
  1070. return rc;
  1071. }
  1072. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1073. struct device_node *of_node)
  1074. {
  1075. int rc = 0;
  1076. u32 val = 0, i;
  1077. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1078. struct dsi_parser_utils *utils = &panel->utils;
  1079. const char *name = panel->name;
  1080. qsync_caps->qsync_support = utils->read_bool(utils->data, "qcom,qsync-enable");
  1081. if (!qsync_caps->qsync_support) {
  1082. DSI_DEBUG("qsync feature not enabled\n");
  1083. goto error;
  1084. }
  1085. /**
  1086. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1087. * video mode when there is only one qsync min fps present.
  1088. */
  1089. rc = of_property_read_u32(of_node,
  1090. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1091. &val);
  1092. if (rc)
  1093. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1094. panel->name, rc);
  1095. qsync_caps->qsync_min_fps = val;
  1096. /**
  1097. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1098. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1099. * is defined.
  1100. */
  1101. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1102. "qcom,dsi-supported-qsync-min-fps-list");
  1103. if (qsync_caps->qsync_min_fps_list_len < 1)
  1104. goto qsync_support;
  1105. /**
  1106. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1107. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1108. */
  1109. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1110. qsync_caps->qsync_min_fps) {
  1111. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1112. name);
  1113. rc = -EINVAL;
  1114. goto error;
  1115. }
  1116. if (panel->dfps_caps.dfps_list_len !=
  1117. qsync_caps->qsync_min_fps_list_len) {
  1118. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1119. rc = -EINVAL;
  1120. goto error;
  1121. }
  1122. qsync_caps->qsync_min_fps_list =
  1123. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1124. GFP_KERNEL);
  1125. if (!qsync_caps->qsync_min_fps_list) {
  1126. rc = -ENOMEM;
  1127. goto error;
  1128. }
  1129. rc = utils->read_u32_array(utils->data,
  1130. "qcom,dsi-supported-qsync-min-fps-list",
  1131. qsync_caps->qsync_min_fps_list,
  1132. qsync_caps->qsync_min_fps_list_len);
  1133. if (rc) {
  1134. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1135. rc = -EINVAL;
  1136. goto error;
  1137. }
  1138. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1139. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1140. if (qsync_caps->qsync_min_fps_list[i] <
  1141. qsync_caps->qsync_min_fps)
  1142. qsync_caps->qsync_min_fps =
  1143. qsync_caps->qsync_min_fps_list[i];
  1144. }
  1145. qsync_support:
  1146. /* allow qsync support only if DFPS is with VFP approach */
  1147. if ((panel->dfps_caps.dfps_support) &&
  1148. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP)) {
  1149. qsync_caps->qsync_support = false;
  1150. qsync_caps->qsync_min_fps = 0;
  1151. }
  1152. error:
  1153. if (rc < 0) {
  1154. qsync_caps->qsync_min_fps = 0;
  1155. qsync_caps->qsync_min_fps_list_len = 0;
  1156. }
  1157. return rc;
  1158. }
  1159. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1160. struct dsi_parser_utils *utils)
  1161. {
  1162. int i, rc = 0;
  1163. struct msm_dyn_clk_list *bit_clk_list;
  1164. if (!mode || !mode->priv_info) {
  1165. DSI_ERR("invalid arguments\n");
  1166. return -EINVAL;
  1167. }
  1168. bit_clk_list = &mode->priv_info->bit_clk_list;
  1169. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1170. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1171. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1172. return -EINVAL;
  1173. }
  1174. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1175. if (!bit_clk_list->rates) {
  1176. DSI_ERR("failed to allocate space for bit clock list\n");
  1177. rc = -ENOMEM;
  1178. goto error;
  1179. }
  1180. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1181. if (!bit_clk_list->front_porches) {
  1182. DSI_ERR("failed to allocate space for front porch list\n");
  1183. rc = -ENOMEM;
  1184. goto error;
  1185. }
  1186. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1187. if (!bit_clk_list->pixel_clks_khz) {
  1188. DSI_ERR("failed to allocate space for pclk list\n");
  1189. rc = -ENOMEM;
  1190. goto error;
  1191. }
  1192. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1193. bit_clk_list->rates, bit_clk_list->count);
  1194. if (rc) {
  1195. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1196. goto error;
  1197. }
  1198. for (i = 0; i < bit_clk_list->count; i++)
  1199. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1200. return 0;
  1201. error:
  1202. bit_clk_list->count = 0;
  1203. kfree(bit_clk_list->rates);
  1204. kfree(bit_clk_list->front_porches);
  1205. kfree(bit_clk_list->pixel_clks_khz);
  1206. return rc;
  1207. }
  1208. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1209. {
  1210. int rc = 0;
  1211. bool supported = false;
  1212. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1213. struct dsi_parser_utils *utils = &panel->utils;
  1214. const char *type;
  1215. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1216. if (!supported) {
  1217. dyn_clk_caps->dyn_clk_support = false;
  1218. return rc;
  1219. }
  1220. dyn_clk_caps->dyn_clk_support = true;
  1221. type = utils->get_property(utils->data,
  1222. "qcom,dsi-dyn-clk-type", NULL);
  1223. if (!type) {
  1224. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1225. dyn_clk_caps->maintain_const_fps = false;
  1226. return 0;
  1227. }
  1228. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1229. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1230. dyn_clk_caps->maintain_const_fps = true;
  1231. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1232. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1233. dyn_clk_caps->maintain_const_fps = true;
  1234. } else {
  1235. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1236. dyn_clk_caps->maintain_const_fps = false;
  1237. }
  1238. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1239. return 0;
  1240. }
  1241. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1242. {
  1243. int rc = 0;
  1244. bool supported = false;
  1245. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1246. struct dsi_parser_utils *utils = &panel->utils;
  1247. const char *name = panel->name;
  1248. const char *type;
  1249. u32 i;
  1250. supported = utils->read_bool(utils->data,
  1251. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1252. if (!supported) {
  1253. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1254. dfps_caps->dfps_support = false;
  1255. return rc;
  1256. }
  1257. type = utils->get_property(utils->data,
  1258. "qcom,mdss-dsi-pan-fps-update", NULL);
  1259. if (!type) {
  1260. DSI_ERR("[%s] dfps type not defined\n", name);
  1261. rc = -EINVAL;
  1262. goto error;
  1263. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1264. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1265. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1266. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1267. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1268. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1269. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1270. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1271. } else {
  1272. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1273. rc = -EINVAL;
  1274. goto error;
  1275. }
  1276. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1277. "qcom,dsi-supported-dfps-list");
  1278. if (dfps_caps->dfps_list_len < 1) {
  1279. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1280. rc = -EINVAL;
  1281. goto error;
  1282. }
  1283. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1284. GFP_KERNEL);
  1285. if (!dfps_caps->dfps_list) {
  1286. rc = -ENOMEM;
  1287. goto error;
  1288. }
  1289. rc = utils->read_u32_array(utils->data,
  1290. "qcom,dsi-supported-dfps-list",
  1291. dfps_caps->dfps_list,
  1292. dfps_caps->dfps_list_len);
  1293. if (rc) {
  1294. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1295. rc = -EINVAL;
  1296. goto error;
  1297. }
  1298. dfps_caps->dfps_support = true;
  1299. /* calculate max and min fps */
  1300. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1301. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1302. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1303. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1304. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1305. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1306. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1307. }
  1308. error:
  1309. return rc;
  1310. }
  1311. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1312. struct dsi_parser_utils *utils,
  1313. const char *name)
  1314. {
  1315. int rc = 0;
  1316. const char *traffic_mode;
  1317. u32 vc_id = 0;
  1318. u32 val = 0;
  1319. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1320. if (rc) {
  1321. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1322. cfg->pulse_mode_hsa_he = false;
  1323. } else if (val == 1) {
  1324. cfg->pulse_mode_hsa_he = true;
  1325. } else if (val == 0) {
  1326. cfg->pulse_mode_hsa_he = false;
  1327. } else {
  1328. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1329. name);
  1330. rc = -EINVAL;
  1331. goto error;
  1332. }
  1333. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1334. "qcom,mdss-dsi-hfp-power-mode");
  1335. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1336. "qcom,mdss-dsi-hbp-power-mode");
  1337. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1338. "qcom,mdss-dsi-hsa-power-mode");
  1339. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1340. "qcom,mdss-dsi-last-line-interleave");
  1341. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1342. "qcom,mdss-dsi-bllp-eof-power-mode");
  1343. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1344. "qcom,mdss-dsi-bllp-power-mode");
  1345. traffic_mode = utils->get_property(utils->data,
  1346. "qcom,mdss-dsi-traffic-mode",
  1347. NULL);
  1348. if (!traffic_mode) {
  1349. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1350. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1351. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1352. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1353. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1354. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1355. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1356. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1357. } else {
  1358. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1359. traffic_mode);
  1360. rc = -EINVAL;
  1361. goto error;
  1362. }
  1363. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1364. &vc_id);
  1365. if (rc) {
  1366. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1367. cfg->vc_id = 0;
  1368. } else {
  1369. cfg->vc_id = vc_id;
  1370. }
  1371. error:
  1372. return rc;
  1373. }
  1374. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1375. struct dsi_parser_utils *utils,
  1376. const char *name)
  1377. {
  1378. u32 val = 0;
  1379. int rc = 0;
  1380. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1381. if (rc) {
  1382. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1383. cfg->wr_mem_start = 0x2C;
  1384. } else {
  1385. cfg->wr_mem_start = val;
  1386. }
  1387. val = 0;
  1388. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1389. &val);
  1390. if (rc) {
  1391. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1392. cfg->wr_mem_continue = 0x3C;
  1393. } else {
  1394. cfg->wr_mem_continue = val;
  1395. }
  1396. /* TODO: fix following */
  1397. cfg->max_cmd_packets_interleave = 0;
  1398. val = 0;
  1399. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1400. &val);
  1401. if (rc) {
  1402. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1403. cfg->insert_dcs_command = true;
  1404. } else if (val == 1) {
  1405. cfg->insert_dcs_command = true;
  1406. } else if (val == 0) {
  1407. cfg->insert_dcs_command = false;
  1408. } else {
  1409. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1410. name);
  1411. rc = -EINVAL;
  1412. goto error;
  1413. }
  1414. cfg->mdp_idle_ctrl_en =
  1415. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1416. if (cfg->mdp_idle_ctrl_en) {
  1417. val = 0;
  1418. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1419. if (rc) {
  1420. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1421. cfg->mdp_idle_ctrl_len = 0;
  1422. cfg->mdp_idle_ctrl_en = false;
  1423. rc = 0;
  1424. } else {
  1425. cfg->mdp_idle_ctrl_len = val;
  1426. }
  1427. }
  1428. error:
  1429. return rc;
  1430. }
  1431. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1432. {
  1433. int rc = 0;
  1434. struct dsi_parser_utils *utils = &panel->utils;
  1435. bool panel_mode_switch_enabled;
  1436. enum dsi_op_mode panel_mode;
  1437. const char *mode;
  1438. mode = utils->get_property(utils->data,
  1439. "qcom,mdss-dsi-panel-type", NULL);
  1440. if (!mode) {
  1441. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1442. panel_mode = DSI_OP_VIDEO_MODE;
  1443. } else if (!strcmp(mode, "dsi_video_mode")) {
  1444. panel_mode = DSI_OP_VIDEO_MODE;
  1445. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1446. panel_mode = DSI_OP_CMD_MODE;
  1447. } else {
  1448. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1449. rc = -EINVAL;
  1450. goto error;
  1451. }
  1452. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1453. "qcom,mdss-dsi-panel-mode-switch");
  1454. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1455. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1456. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1457. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1458. utils,
  1459. panel->name);
  1460. if (rc) {
  1461. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1462. panel->name, rc);
  1463. goto error;
  1464. }
  1465. }
  1466. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1467. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1468. utils,
  1469. panel->name);
  1470. if (rc) {
  1471. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1472. panel->name, rc);
  1473. goto error;
  1474. }
  1475. }
  1476. panel->poms_align_vsync = utils->read_bool(utils->data,
  1477. "qcom,poms-align-panel-vsync");
  1478. panel->panel_mode = panel_mode;
  1479. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1480. error:
  1481. return rc;
  1482. }
  1483. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1484. {
  1485. int rc = 0;
  1486. u32 val = 0;
  1487. const char *str;
  1488. struct dsi_panel_phy_props *props = &panel->phy_props;
  1489. struct dsi_parser_utils *utils = &panel->utils;
  1490. const char *name = panel->name;
  1491. rc = utils->read_u32(utils->data,
  1492. "qcom,mdss-pan-physical-width-dimension", &val);
  1493. if (rc) {
  1494. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1495. props->panel_width_mm = 0;
  1496. rc = 0;
  1497. } else {
  1498. props->panel_width_mm = val;
  1499. }
  1500. rc = utils->read_u32(utils->data,
  1501. "qcom,mdss-pan-physical-height-dimension",
  1502. &val);
  1503. if (rc) {
  1504. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1505. props->panel_height_mm = 0;
  1506. rc = 0;
  1507. } else {
  1508. props->panel_height_mm = val;
  1509. }
  1510. str = utils->get_property(utils->data,
  1511. "qcom,mdss-dsi-panel-orientation", NULL);
  1512. if (!str) {
  1513. props->rotation = DSI_PANEL_ROTATE_NONE;
  1514. } else if (!strcmp(str, "180")) {
  1515. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1516. } else if (!strcmp(str, "hflip")) {
  1517. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1518. } else if (!strcmp(str, "vflip")) {
  1519. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1520. } else {
  1521. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1522. rc = -EINVAL;
  1523. goto error;
  1524. }
  1525. error:
  1526. return rc;
  1527. }
  1528. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1529. "qcom,mdss-dsi-pre-on-command",
  1530. "qcom,mdss-dsi-on-command",
  1531. "qcom,vid-on-commands",
  1532. "qcom,cmd-on-commands",
  1533. "qcom,mdss-dsi-post-panel-on-command",
  1534. "qcom,mdss-dsi-pre-off-command",
  1535. "qcom,mdss-dsi-off-command",
  1536. "qcom,mdss-dsi-post-off-command",
  1537. "qcom,mdss-dsi-pre-res-switch",
  1538. "qcom,mdss-dsi-res-switch",
  1539. "qcom,mdss-dsi-post-res-switch",
  1540. "qcom,video-mode-switch-in-commands",
  1541. "qcom,video-mode-switch-out-commands",
  1542. "qcom,cmd-mode-switch-in-commands",
  1543. "qcom,cmd-mode-switch-out-commands",
  1544. "qcom,mdss-dsi-panel-status-command",
  1545. "qcom,mdss-dsi-lp1-command",
  1546. "qcom,mdss-dsi-lp2-command",
  1547. "qcom,mdss-dsi-nolp-command",
  1548. "PPS not parsed from DTSI, generated dynamically",
  1549. "ROI not parsed from DTSI, generated dynamically",
  1550. "qcom,mdss-dsi-timing-switch-command",
  1551. "qcom,mdss-dsi-post-mode-switch-on-command",
  1552. "qcom,mdss-dsi-qsync-on-commands",
  1553. "qcom,mdss-dsi-qsync-off-commands",
  1554. };
  1555. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1556. "qcom,mdss-dsi-pre-on-command-state",
  1557. "qcom,mdss-dsi-on-command-state",
  1558. "qcom,vid-on-commands-state",
  1559. "qcom,cmd-on-commands-state",
  1560. "qcom,mdss-dsi-post-on-command-state",
  1561. "qcom,mdss-dsi-pre-off-command-state",
  1562. "qcom,mdss-dsi-off-command-state",
  1563. "qcom,mdss-dsi-post-off-command-state",
  1564. "qcom,mdss-dsi-pre-res-switch-state",
  1565. "qcom,mdss-dsi-res-switch-state",
  1566. "qcom,mdss-dsi-post-res-switch-state",
  1567. "qcom,video-mode-switch-in-commands-state",
  1568. "qcom,video-mode-switch-out-commands-state",
  1569. "qcom,cmd-mode-switch-in-commands-state",
  1570. "qcom,cmd-mode-switch-out-commands-state",
  1571. "qcom,mdss-dsi-panel-status-command-state",
  1572. "qcom,mdss-dsi-lp1-command-state",
  1573. "qcom,mdss-dsi-lp2-command-state",
  1574. "qcom,mdss-dsi-nolp-command-state",
  1575. "PPS not parsed from DTSI, generated dynamically",
  1576. "ROI not parsed from DTSI, generated dynamically",
  1577. "qcom,mdss-dsi-timing-switch-command-state",
  1578. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1579. "qcom,mdss-dsi-qsync-on-commands-state",
  1580. "qcom,mdss-dsi-qsync-off-commands-state",
  1581. };
  1582. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1583. {
  1584. const u32 cmd_set_min_size = 7;
  1585. u32 count = 0;
  1586. u32 packet_length;
  1587. u32 tmp;
  1588. while (length >= cmd_set_min_size) {
  1589. packet_length = cmd_set_min_size;
  1590. tmp = ((data[5] << 8) | (data[6]));
  1591. packet_length += tmp;
  1592. if (packet_length > length) {
  1593. DSI_ERR("format error\n");
  1594. return -EINVAL;
  1595. }
  1596. length -= packet_length;
  1597. data += packet_length;
  1598. count++;
  1599. }
  1600. *cnt = count;
  1601. return 0;
  1602. }
  1603. int dsi_panel_create_cmd_packets(const char *data,
  1604. u32 length,
  1605. u32 count,
  1606. struct dsi_cmd_desc *cmd)
  1607. {
  1608. int rc = 0;
  1609. int i, j;
  1610. u8 *payload;
  1611. for (i = 0; i < count; i++) {
  1612. u32 size;
  1613. cmd[i].msg.type = data[0];
  1614. cmd[i].msg.channel = data[2];
  1615. cmd[i].msg.flags |= data[3];
  1616. cmd[i].ctrl = 0;
  1617. cmd[i].post_wait_ms = data[4];
  1618. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1619. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1620. cmd[i].last_command = false;
  1621. else
  1622. cmd[i].last_command = true;
  1623. size = cmd[i].msg.tx_len * sizeof(u8);
  1624. payload = kzalloc(size, GFP_KERNEL);
  1625. if (!payload) {
  1626. rc = -ENOMEM;
  1627. goto error_free_payloads;
  1628. }
  1629. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1630. payload[j] = data[7 + j];
  1631. cmd[i].msg.tx_buf = payload;
  1632. data += (7 + cmd[i].msg.tx_len);
  1633. }
  1634. return rc;
  1635. error_free_payloads:
  1636. for (i = i - 1; i >= 0; i--) {
  1637. cmd--;
  1638. kfree(cmd->msg.tx_buf);
  1639. }
  1640. return rc;
  1641. }
  1642. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1643. {
  1644. u32 i = 0;
  1645. struct dsi_cmd_desc *cmd;
  1646. for (i = 0; i < set->count; i++) {
  1647. cmd = &set->cmds[i];
  1648. kfree(cmd->msg.tx_buf);
  1649. }
  1650. }
  1651. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1652. {
  1653. kfree(set->cmds);
  1654. }
  1655. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1656. u32 packet_count)
  1657. {
  1658. u32 size;
  1659. size = packet_count * sizeof(*cmd->cmds);
  1660. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1661. if (!cmd->cmds)
  1662. return -ENOMEM;
  1663. cmd->count = packet_count;
  1664. return 0;
  1665. }
  1666. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1667. enum dsi_cmd_set_type type,
  1668. struct dsi_parser_utils *utils)
  1669. {
  1670. int rc = 0;
  1671. u32 length = 0;
  1672. const char *data;
  1673. const char *state;
  1674. u32 packet_count = 0;
  1675. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1676. &length);
  1677. if (!data) {
  1678. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1679. rc = -ENOTSUPP;
  1680. goto error;
  1681. }
  1682. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1683. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1684. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1685. if (rc) {
  1686. DSI_ERR("commands failed, rc=%d\n", rc);
  1687. goto error;
  1688. }
  1689. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1690. packet_count, length);
  1691. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1692. if (rc) {
  1693. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1694. goto error;
  1695. }
  1696. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1697. cmd->cmds);
  1698. if (rc) {
  1699. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1700. goto error_free_mem;
  1701. }
  1702. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1703. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1704. cmd->state = DSI_CMD_SET_STATE_LP;
  1705. } else if (!strcmp(state, "dsi_hs_mode")) {
  1706. cmd->state = DSI_CMD_SET_STATE_HS;
  1707. } else {
  1708. DSI_ERR("[%s] command state unrecognized-%s\n",
  1709. cmd_set_state_map[type], state);
  1710. goto error_free_mem;
  1711. }
  1712. return rc;
  1713. error_free_mem:
  1714. kfree(cmd->cmds);
  1715. cmd->cmds = NULL;
  1716. error:
  1717. return rc;
  1718. }
  1719. static int dsi_panel_parse_cmd_sets(
  1720. struct dsi_display_mode_priv_info *priv_info,
  1721. struct dsi_parser_utils *utils)
  1722. {
  1723. int rc = 0;
  1724. struct dsi_panel_cmd_set *set;
  1725. u32 i;
  1726. if (!priv_info) {
  1727. DSI_ERR("invalid mode priv info\n");
  1728. return -EINVAL;
  1729. }
  1730. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1731. set = &priv_info->cmd_sets[i];
  1732. set->type = i;
  1733. set->count = 0;
  1734. if (i == DSI_CMD_SET_PPS) {
  1735. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1736. if (rc)
  1737. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1738. i, rc);
  1739. set->state = DSI_CMD_SET_STATE_LP;
  1740. } else {
  1741. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1742. if (rc)
  1743. DSI_DEBUG("failed to parse set %d\n", i);
  1744. }
  1745. }
  1746. rc = 0;
  1747. return rc;
  1748. }
  1749. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1750. {
  1751. int rc = 0;
  1752. int i;
  1753. u32 length = 0;
  1754. u32 count = 0;
  1755. u32 size = 0;
  1756. u32 *arr_32 = NULL;
  1757. const u32 *arr;
  1758. struct dsi_parser_utils *utils = &panel->utils;
  1759. struct dsi_reset_seq *seq;
  1760. if (panel->host_config.ext_bridge_mode)
  1761. return 0;
  1762. arr = utils->get_property(utils->data,
  1763. "qcom,mdss-dsi-reset-sequence", &length);
  1764. if (!arr) {
  1765. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1766. rc = -EINVAL;
  1767. goto error;
  1768. }
  1769. if (length & 0x1) {
  1770. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1771. panel->name);
  1772. rc = -EINVAL;
  1773. goto error;
  1774. }
  1775. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1776. length = length / sizeof(u32);
  1777. size = length * sizeof(u32);
  1778. arr_32 = kzalloc(size, GFP_KERNEL);
  1779. if (!arr_32) {
  1780. rc = -ENOMEM;
  1781. goto error;
  1782. }
  1783. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1784. arr_32, length);
  1785. if (rc) {
  1786. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1787. goto error_free_arr_32;
  1788. }
  1789. count = length / 2;
  1790. size = count * sizeof(*seq);
  1791. seq = kzalloc(size, GFP_KERNEL);
  1792. if (!seq) {
  1793. rc = -ENOMEM;
  1794. goto error_free_arr_32;
  1795. }
  1796. panel->reset_config.sequence = seq;
  1797. panel->reset_config.count = count;
  1798. for (i = 0; i < length; i += 2) {
  1799. seq->level = arr_32[i];
  1800. seq->sleep_ms = arr_32[i + 1];
  1801. seq++;
  1802. }
  1803. error_free_arr_32:
  1804. kfree(arr_32);
  1805. error:
  1806. return rc;
  1807. }
  1808. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1809. {
  1810. struct dsi_parser_utils *utils = &panel->utils;
  1811. const char *string;
  1812. int i, rc = 0;
  1813. panel->ulps_feature_enabled =
  1814. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1815. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1816. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1817. panel->ulps_suspend_enabled =
  1818. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1819. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1820. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1821. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1822. "qcom,mdss-dsi-te-using-wd");
  1823. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1824. "qcom,cmd-sync-wait-broadcast");
  1825. panel->lp11_init = utils->read_bool(utils->data,
  1826. "qcom,mdss-dsi-lp11-init");
  1827. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1828. "qcom,platform-reset-gpio-always-on");
  1829. panel->spr_info.enable = false;
  1830. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1831. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1832. if (!rc) {
  1833. // find match for pack-type string
  1834. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1835. if (msm_spr_pack_type_str[i] &&
  1836. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1837. panel->spr_info.enable = true;
  1838. panel->spr_info.pack_type = i;
  1839. break;
  1840. }
  1841. }
  1842. }
  1843. pr_debug("%s source side spr packing, pack-type %s\n",
  1844. panel->spr_info.enable ? "enable" : "disable",
  1845. panel->spr_info.enable ?
  1846. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1847. return 0;
  1848. }
  1849. static int dsi_panel_parse_jitter_config(
  1850. struct dsi_display_mode *mode,
  1851. struct dsi_parser_utils *utils)
  1852. {
  1853. int rc;
  1854. struct dsi_display_mode_priv_info *priv_info;
  1855. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1856. u64 jitter_val = 0;
  1857. priv_info = mode->priv_info;
  1858. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1859. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1860. if (rc) {
  1861. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1862. } else {
  1863. jitter_val = jitter[0];
  1864. jitter_val = div_u64(jitter_val, jitter[1]);
  1865. }
  1866. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1867. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1868. priv_info->panel_jitter_denom =
  1869. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1870. } else {
  1871. priv_info->panel_jitter_numer = jitter[0];
  1872. priv_info->panel_jitter_denom = jitter[1];
  1873. }
  1874. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1875. &priv_info->panel_prefill_lines);
  1876. if (rc) {
  1877. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1878. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1879. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1880. } else if (priv_info->panel_prefill_lines >=
  1881. DSI_V_TOTAL(&mode->timing)) {
  1882. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1883. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1884. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1885. }
  1886. return 0;
  1887. }
  1888. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1889. {
  1890. int rc = 0;
  1891. char *supply_name;
  1892. if (panel->host_config.ext_bridge_mode)
  1893. return 0;
  1894. if (!strcmp(panel->type, "primary"))
  1895. supply_name = "qcom,panel-supply-entries";
  1896. else
  1897. supply_name = "qcom,panel-sec-supply-entries";
  1898. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1899. &panel->power_info, supply_name);
  1900. if (rc) {
  1901. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1902. goto error;
  1903. }
  1904. error:
  1905. return rc;
  1906. }
  1907. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1908. struct msm_io_res *io_res)
  1909. {
  1910. struct dsi_parser_utils *utils = &panel->utils;
  1911. struct list_head *mem_list = &io_res->mem;
  1912. int reset_gpio;
  1913. int rc = 0;
  1914. reset_gpio = utils->get_named_gpio(utils->data,
  1915. "qcom,platform-reset-gpio", 0);
  1916. if (gpio_is_valid(reset_gpio)) {
  1917. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1918. if (rc) {
  1919. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1920. goto end;
  1921. }
  1922. }
  1923. end:
  1924. return rc;
  1925. }
  1926. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1927. {
  1928. int rc = 0;
  1929. const char *data;
  1930. struct dsi_parser_utils *utils = &panel->utils;
  1931. char *reset_gpio_name, *mode_set_gpio_name;
  1932. if (!strcmp(panel->type, "primary")) {
  1933. reset_gpio_name = "qcom,platform-reset-gpio";
  1934. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1935. } else {
  1936. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1937. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1938. }
  1939. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1940. reset_gpio_name, 0);
  1941. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1942. !panel->host_config.ext_bridge_mode) {
  1943. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1944. panel->reset_config.reset_gpio);
  1945. }
  1946. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1947. "qcom,5v-boost-gpio",
  1948. 0);
  1949. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1950. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1951. panel->name, rc);
  1952. panel->reset_config.disp_en_gpio =
  1953. utils->get_named_gpio(utils->data,
  1954. "qcom,platform-en-gpio", 0);
  1955. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1956. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1957. panel->name, rc);
  1958. }
  1959. }
  1960. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1961. utils->data, mode_set_gpio_name, 0);
  1962. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1963. DSI_DEBUG("mode gpio not specified\n");
  1964. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1965. data = utils->get_property(utils->data,
  1966. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1967. if (data) {
  1968. if (!strcmp(data, "single_port"))
  1969. panel->reset_config.mode_sel_state =
  1970. MODE_SEL_SINGLE_PORT;
  1971. else if (!strcmp(data, "dual_port"))
  1972. panel->reset_config.mode_sel_state =
  1973. MODE_SEL_DUAL_PORT;
  1974. else if (!strcmp(data, "high"))
  1975. panel->reset_config.mode_sel_state =
  1976. MODE_GPIO_HIGH;
  1977. else if (!strcmp(data, "low"))
  1978. panel->reset_config.mode_sel_state =
  1979. MODE_GPIO_LOW;
  1980. } else {
  1981. /* Set default mode as SPLIT mode */
  1982. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1983. }
  1984. /* TODO: release memory */
  1985. rc = dsi_panel_parse_reset_sequence(panel);
  1986. if (rc) {
  1987. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1988. panel->name, rc);
  1989. goto error;
  1990. }
  1991. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1992. "qcom,mdss-dsi-panel-test-pin",
  1993. 0);
  1994. if (!gpio_is_valid(panel->panel_test_gpio))
  1995. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1996. __LINE__);
  1997. error:
  1998. return rc;
  1999. }
  2000. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  2001. {
  2002. int rc = 0;
  2003. u32 val;
  2004. struct dsi_backlight_config *config = &panel->bl_config;
  2005. struct dsi_parser_utils *utils = &panel->utils;
  2006. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2007. &val);
  2008. if (rc) {
  2009. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2010. goto error;
  2011. }
  2012. config->pwm_period_usecs = val;
  2013. error:
  2014. return rc;
  2015. }
  2016. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2017. {
  2018. int rc = 0;
  2019. u32 val = 0;
  2020. const char *bl_type = NULL;
  2021. const char *data = NULL;
  2022. const char *state = NULL;
  2023. struct dsi_parser_utils *utils = &panel->utils;
  2024. char *bl_name = NULL;
  2025. if (!strcmp(panel->type, "primary"))
  2026. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2027. else
  2028. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2029. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2030. if (!bl_type) {
  2031. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2032. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2033. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2034. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2035. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2036. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2037. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2038. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2039. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2040. } else {
  2041. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2042. panel->name, bl_type);
  2043. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2044. }
  2045. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2046. if (!data) {
  2047. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2048. } else if (!strcmp(data, "delay_until_first_frame")) {
  2049. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2050. } else {
  2051. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2052. panel->name, data);
  2053. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2054. }
  2055. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2056. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2057. panel->bl_config.dimming_min_bl = 0;
  2058. panel->bl_config.dimming_status = DIMMING_ENABLE;
  2059. panel->bl_config.user_disable_notification = false;
  2060. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2061. if (rc) {
  2062. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2063. panel->name);
  2064. panel->bl_config.bl_min_level = 0;
  2065. } else {
  2066. panel->bl_config.bl_min_level = val;
  2067. }
  2068. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2069. if (rc) {
  2070. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2071. panel->name);
  2072. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2073. } else {
  2074. panel->bl_config.bl_max_level = val;
  2075. }
  2076. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2077. &val);
  2078. if (rc) {
  2079. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2080. panel->name);
  2081. panel->bl_config.brightness_max_level = 255;
  2082. rc = 0;
  2083. } else {
  2084. panel->bl_config.brightness_max_level = val;
  2085. }
  2086. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2087. "qcom,mdss-dsi-bl-inverted-dbv");
  2088. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2089. if (!state || !strcmp(state, "dsi_hs_mode"))
  2090. panel->bl_config.lp_mode = false;
  2091. else if (!strcmp(state, "dsi_lp_mode"))
  2092. panel->bl_config.lp_mode = true;
  2093. else
  2094. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2095. state);
  2096. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2097. rc = dsi_panel_parse_bl_pwm_config(panel);
  2098. if (rc) {
  2099. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2100. panel->name, rc);
  2101. goto error;
  2102. }
  2103. }
  2104. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2105. "qcom,platform-bklight-en-gpio",
  2106. 0);
  2107. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2108. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2109. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2110. panel->name, rc);
  2111. rc = -EPROBE_DEFER;
  2112. goto error;
  2113. } else {
  2114. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2115. panel->name, rc);
  2116. rc = 0;
  2117. goto error;
  2118. }
  2119. }
  2120. error:
  2121. return rc;
  2122. }
  2123. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2124. struct dsi_parser_utils *utils)
  2125. {
  2126. const char *data;
  2127. u32 len, i;
  2128. int rc = 0;
  2129. struct dsi_display_mode_priv_info *priv_info;
  2130. u64 pixel_clk_khz;
  2131. if (!mode || !mode->priv_info)
  2132. return -EINVAL;
  2133. priv_info = mode->priv_info;
  2134. data = utils->get_property(utils->data,
  2135. "qcom,mdss-dsi-panel-phy-timings", &len);
  2136. if (!data) {
  2137. DSI_DEBUG("Unable to read Phy timing settings\n");
  2138. } else {
  2139. priv_info->phy_timing_val =
  2140. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2141. if (!priv_info->phy_timing_val)
  2142. return -EINVAL;
  2143. for (i = 0; i < len; i++)
  2144. priv_info->phy_timing_val[i] = data[i];
  2145. priv_info->phy_timing_len = len;
  2146. }
  2147. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2148. /*
  2149. * For command mode we update the pclk as part of
  2150. * function dsi_panel_calc_dsi_transfer_time( )
  2151. * as we set it based on dsi clock or mdp transfer time.
  2152. */
  2153. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2154. DSI_V_TOTAL(&mode->timing) *
  2155. mode->timing.refresh_rate);
  2156. do_div(pixel_clk_khz, 1000);
  2157. mode->pixel_clk_khz = pixel_clk_khz;
  2158. }
  2159. return rc;
  2160. }
  2161. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2162. struct dsi_parser_utils *utils)
  2163. {
  2164. u32 data;
  2165. int rc = -EINVAL;
  2166. int intf_width;
  2167. const char *compression;
  2168. struct dsi_display_mode_priv_info *priv_info;
  2169. if (!mode || !mode->priv_info)
  2170. return -EINVAL;
  2171. priv_info = mode->priv_info;
  2172. priv_info->dsc_enabled = false;
  2173. compression = utils->get_property(utils->data,
  2174. "qcom,compression-mode", NULL);
  2175. if (compression && !strcmp(compression, "dsc"))
  2176. priv_info->dsc_enabled = true;
  2177. if (!priv_info->dsc_enabled) {
  2178. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2179. return 0;
  2180. }
  2181. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2182. if (rc) {
  2183. priv_info->dsc.config.dsc_version_major = 0x1;
  2184. priv_info->dsc.config.dsc_version_minor = 0x1;
  2185. rc = 0;
  2186. } else {
  2187. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2188. * major version information
  2189. */
  2190. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2191. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2192. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2193. ((priv_info->dsc.config.dsc_version_minor
  2194. != 0x1) &&
  2195. (priv_info->dsc.config.dsc_version_minor
  2196. != 0x2))) {
  2197. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2198. __func__,
  2199. priv_info->dsc.config.dsc_version_major,
  2200. priv_info->dsc.config.dsc_version_minor
  2201. );
  2202. rc = -EINVAL;
  2203. goto error;
  2204. }
  2205. }
  2206. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2207. if (rc) {
  2208. priv_info->dsc.scr_rev = 0x0;
  2209. rc = 0;
  2210. } else {
  2211. priv_info->dsc.scr_rev = data & 0xff;
  2212. /* only one scr rev supported */
  2213. if (priv_info->dsc.scr_rev > 0x1) {
  2214. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2215. __func__, priv_info->dsc.scr_rev);
  2216. rc = -EINVAL;
  2217. goto error;
  2218. }
  2219. }
  2220. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2221. if (rc) {
  2222. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2223. goto error;
  2224. }
  2225. priv_info->dsc.config.slice_height = data;
  2226. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2227. if (rc) {
  2228. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2229. goto error;
  2230. }
  2231. priv_info->dsc.config.slice_width = data;
  2232. intf_width = mode->timing.h_active;
  2233. if (intf_width % priv_info->dsc.config.slice_width) {
  2234. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2235. intf_width, priv_info->dsc.config.slice_width);
  2236. rc = -EINVAL;
  2237. goto error;
  2238. }
  2239. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2240. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2241. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2242. if (rc) {
  2243. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2244. goto error;
  2245. } else if (!data || (data > 2)) {
  2246. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2247. goto error;
  2248. }
  2249. priv_info->dsc.slice_per_pkt = data;
  2250. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2251. &data);
  2252. if (rc) {
  2253. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2254. goto error;
  2255. }
  2256. priv_info->dsc.config.bits_per_component = data;
  2257. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2258. if (rc) {
  2259. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2260. data = 0;
  2261. }
  2262. priv_info->dsc.pps_delay_ms = data;
  2263. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2264. &data);
  2265. if (rc) {
  2266. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2267. goto error;
  2268. }
  2269. priv_info->dsc.config.bits_per_pixel = data << 4;
  2270. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2271. &data);
  2272. if (rc) {
  2273. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2274. rc = 0;
  2275. data = MSM_CHROMA_444;
  2276. } else if (data == MSM_CHROMA_422) {
  2277. priv_info->dsc.config.native_422 = 1;
  2278. } else if (data == MSM_CHROMA_420) {
  2279. priv_info->dsc.config.native_420 = 1;
  2280. }
  2281. priv_info->dsc.chroma_format = data;
  2282. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2283. &data);
  2284. if (rc) {
  2285. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2286. rc = 0;
  2287. data = MSM_RGB;
  2288. }
  2289. priv_info->dsc.source_color_space = data;
  2290. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2291. "qcom,mdss-dsc-block-prediction-enable");
  2292. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2293. priv_info->dsc.config.slice_width);
  2294. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2295. priv_info->dsc.scr_rev);
  2296. if (rc) {
  2297. DSI_DEBUG("failed populating dsc params\n");
  2298. rc = -EINVAL;
  2299. goto error;
  2300. }
  2301. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2302. if (rc) {
  2303. DSI_DEBUG("failed populating other dsc params\n");
  2304. rc = -EINVAL;
  2305. goto error;
  2306. }
  2307. priv_info->pclk_scale.numer =
  2308. priv_info->dsc.config.bits_per_pixel >> 4;
  2309. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2310. priv_info->dsc.chroma_format,
  2311. priv_info->dsc.config.bits_per_component);
  2312. mode->timing.dsc_enabled = true;
  2313. mode->timing.dsc = &priv_info->dsc;
  2314. mode->timing.pclk_scale = priv_info->pclk_scale;
  2315. error:
  2316. return rc;
  2317. }
  2318. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2319. struct dsi_parser_utils *utils, int traffic_mode)
  2320. {
  2321. u32 data;
  2322. int rc = -EINVAL;
  2323. const char *compression;
  2324. struct dsi_display_mode_priv_info *priv_info;
  2325. int intf_width;
  2326. if (!mode || !mode->priv_info)
  2327. return -EINVAL;
  2328. priv_info = mode->priv_info;
  2329. priv_info->vdc_enabled = false;
  2330. compression = utils->get_property(utils->data,
  2331. "qcom,compression-mode", NULL);
  2332. if (compression && !strcmp(compression, "vdc"))
  2333. priv_info->vdc_enabled = true;
  2334. if (!priv_info->vdc_enabled) {
  2335. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2336. return 0;
  2337. }
  2338. priv_info->vdc.traffic_mode = traffic_mode;
  2339. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2340. if (rc) {
  2341. priv_info->vdc.version_major = 0x1;
  2342. priv_info->vdc.version_minor = 0x2;
  2343. priv_info->vdc.version_release = 0x0;
  2344. rc = 0;
  2345. } else {
  2346. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2347. * major version information
  2348. */
  2349. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2350. priv_info->vdc.version_minor = data & 0x0F;
  2351. if ((priv_info->vdc.version_major != 0x1) &&
  2352. ((priv_info->vdc.version_minor
  2353. != 0x2))) {
  2354. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2355. __func__,
  2356. priv_info->vdc.version_major,
  2357. priv_info->vdc.version_minor
  2358. );
  2359. rc = -EINVAL;
  2360. goto error;
  2361. }
  2362. }
  2363. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2364. if (rc) {
  2365. priv_info->vdc.version_release = 0x0;
  2366. rc = 0;
  2367. } else {
  2368. priv_info->vdc.version_release = data & 0xff;
  2369. /* only one release version is supported */
  2370. if (priv_info->vdc.version_release != 0x0) {
  2371. DSI_ERR("unsupported vdc release version %d\n",
  2372. priv_info->vdc.version_release);
  2373. rc = -EINVAL;
  2374. goto error;
  2375. }
  2376. }
  2377. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2378. priv_info->vdc.version_major,
  2379. priv_info->vdc.version_minor,
  2380. priv_info->vdc.version_release);
  2381. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2382. if (rc) {
  2383. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2384. goto error;
  2385. }
  2386. priv_info->vdc.slice_height = data;
  2387. /* slice height should be atleast 16 lines */
  2388. if (priv_info->vdc.slice_height < 16) {
  2389. DSI_ERR("invalid slice height %d\n",
  2390. priv_info->vdc.slice_height);
  2391. rc = -EINVAL;
  2392. goto error;
  2393. }
  2394. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2395. if (rc) {
  2396. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2397. goto error;
  2398. }
  2399. priv_info->vdc.slice_width = data;
  2400. /*
  2401. * slide-width should be multiple of 8
  2402. * slice-width should be atlease 64 pixels
  2403. */
  2404. if ((priv_info->vdc.slice_width & 7) ||
  2405. (priv_info->vdc.slice_width < 64)) {
  2406. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2407. rc = -EINVAL;
  2408. goto error;
  2409. }
  2410. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2411. if (rc) {
  2412. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2413. goto error;
  2414. } else if (!data || (data > 2)) {
  2415. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2416. rc = -EINVAL;
  2417. goto error;
  2418. }
  2419. intf_width = mode->timing.h_active;
  2420. priv_info->vdc.slice_per_pkt = data;
  2421. priv_info->vdc.frame_width = mode->timing.h_active;
  2422. priv_info->vdc.frame_height = mode->timing.v_active;
  2423. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2424. &data);
  2425. if (rc) {
  2426. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2427. goto error;
  2428. }
  2429. priv_info->vdc.bits_per_component = data;
  2430. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2431. if (rc) {
  2432. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2433. data = 0;
  2434. }
  2435. priv_info->vdc.pps_delay_ms = data;
  2436. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2437. &data);
  2438. if (rc) {
  2439. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2440. goto error;
  2441. }
  2442. priv_info->vdc.bits_per_pixel = data << 4;
  2443. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2444. &data);
  2445. if (rc) {
  2446. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2447. rc = 0;
  2448. data = MSM_CHROMA_444;
  2449. }
  2450. priv_info->vdc.chroma_format = data;
  2451. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2452. &data);
  2453. if (rc) {
  2454. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2455. rc = 0;
  2456. data = MSM_RGB;
  2457. }
  2458. priv_info->vdc.source_color_space = data;
  2459. rc = sde_vdc_populate_config(&priv_info->vdc,
  2460. intf_width, traffic_mode);
  2461. if (rc) {
  2462. DSI_DEBUG("failed populating vdc config\n");
  2463. rc = -EINVAL;
  2464. goto error;
  2465. }
  2466. priv_info->pclk_scale.numer =
  2467. priv_info->vdc.bits_per_pixel >> 4;
  2468. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2469. priv_info->vdc.chroma_format,
  2470. priv_info->vdc.bits_per_component);
  2471. mode->timing.vdc_enabled = true;
  2472. mode->timing.vdc = &priv_info->vdc;
  2473. mode->timing.pclk_scale = priv_info->pclk_scale;
  2474. error:
  2475. return rc;
  2476. }
  2477. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2478. {
  2479. int rc = 0;
  2480. struct drm_panel_hdr_properties *hdr_prop;
  2481. struct dsi_parser_utils *utils = &panel->utils;
  2482. hdr_prop = &panel->hdr_props;
  2483. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2484. "qcom,mdss-dsi-panel-hdr-enabled");
  2485. if (hdr_prop->hdr_enabled) {
  2486. rc = utils->read_u32_array(utils->data,
  2487. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2488. hdr_prop->display_primaries,
  2489. DISPLAY_PRIMARIES_MAX);
  2490. if (rc) {
  2491. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2492. __func__, __LINE__, rc);
  2493. hdr_prop->hdr_enabled = false;
  2494. return rc;
  2495. }
  2496. rc = utils->read_u32(utils->data,
  2497. "qcom,mdss-dsi-panel-peak-brightness",
  2498. &(hdr_prop->peak_brightness));
  2499. if (rc) {
  2500. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2501. __func__, __LINE__, rc);
  2502. hdr_prop->hdr_enabled = false;
  2503. return rc;
  2504. }
  2505. rc = utils->read_u32(utils->data,
  2506. "qcom,mdss-dsi-panel-blackness-level",
  2507. &(hdr_prop->blackness_level));
  2508. if (rc) {
  2509. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2510. __func__, __LINE__, rc);
  2511. hdr_prop->hdr_enabled = false;
  2512. return rc;
  2513. }
  2514. }
  2515. return 0;
  2516. }
  2517. static int dsi_panel_parse_topology(
  2518. struct dsi_display_mode_priv_info *priv_info,
  2519. struct dsi_parser_utils *utils,
  2520. int topology_override)
  2521. {
  2522. struct msm_display_topology *topology;
  2523. u32 top_count, top_sel, *array = NULL;
  2524. int i, len = 0;
  2525. int rc = -EINVAL;
  2526. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2527. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2528. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2529. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2530. return rc;
  2531. }
  2532. top_count = len / TOPOLOGY_SET_LEN;
  2533. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2534. if (!array)
  2535. return -ENOMEM;
  2536. rc = utils->read_u32_array(utils->data,
  2537. "qcom,display-topology", array, len);
  2538. if (rc) {
  2539. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2540. goto read_fail;
  2541. }
  2542. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2543. if (!topology) {
  2544. rc = -ENOMEM;
  2545. goto read_fail;
  2546. }
  2547. for (i = 0; i < top_count; i++) {
  2548. struct msm_display_topology *top = &topology[i];
  2549. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2550. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2551. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2552. }
  2553. if (topology_override >= 0 && topology_override < top_count) {
  2554. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2555. topology_override,
  2556. topology[topology_override].num_lm,
  2557. topology[topology_override].num_enc,
  2558. topology[topology_override].num_intf);
  2559. top_sel = topology_override;
  2560. goto parse_done;
  2561. }
  2562. rc = utils->read_u32(utils->data,
  2563. "qcom,default-topology-index", &top_sel);
  2564. if (rc) {
  2565. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2566. goto parse_fail;
  2567. }
  2568. if (top_sel >= top_count) {
  2569. rc = -EINVAL;
  2570. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2571. rc);
  2572. goto parse_fail;
  2573. }
  2574. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2575. !topology[top_sel].num_enc) {
  2576. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2577. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2578. topology[top_sel].num_enc);
  2579. goto parse_fail;
  2580. }
  2581. if (priv_info->dsc_enabled)
  2582. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2583. else if (priv_info->vdc_enabled)
  2584. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2585. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2586. topology[top_sel].num_lm,
  2587. topology[top_sel].num_enc,
  2588. topology[top_sel].num_intf);
  2589. parse_done:
  2590. memcpy(&priv_info->topology, &topology[top_sel],
  2591. sizeof(struct msm_display_topology));
  2592. parse_fail:
  2593. kfree(topology);
  2594. read_fail:
  2595. kfree(array);
  2596. return rc;
  2597. }
  2598. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2599. struct msm_roi_alignment *align)
  2600. {
  2601. int len = 0, rc = 0;
  2602. u32 value[6];
  2603. struct property *data;
  2604. if (!align)
  2605. return -EINVAL;
  2606. memset(align, 0, sizeof(*align));
  2607. data = utils->find_property(utils->data,
  2608. "qcom,panel-roi-alignment", &len);
  2609. len /= sizeof(u32);
  2610. if (!data) {
  2611. DSI_ERR("panel roi alignment not found\n");
  2612. rc = -EINVAL;
  2613. } else if (len != 6) {
  2614. DSI_ERR("incorrect roi alignment len %d\n", len);
  2615. rc = -EINVAL;
  2616. } else {
  2617. rc = utils->read_u32_array(utils->data,
  2618. "qcom,panel-roi-alignment", value, len);
  2619. if (rc)
  2620. DSI_DEBUG("error reading panel roi alignment values\n");
  2621. else {
  2622. align->xstart_pix_align = value[0];
  2623. align->ystart_pix_align = value[1];
  2624. align->width_pix_align = value[2];
  2625. align->height_pix_align = value[3];
  2626. align->min_width = value[4];
  2627. align->min_height = value[5];
  2628. }
  2629. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2630. align->xstart_pix_align,
  2631. align->width_pix_align,
  2632. align->ystart_pix_align,
  2633. align->height_pix_align,
  2634. align->min_width,
  2635. align->min_height);
  2636. }
  2637. return rc;
  2638. }
  2639. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2640. struct dsi_parser_utils *utils)
  2641. {
  2642. struct msm_roi_caps *roi_caps = NULL;
  2643. const char *data;
  2644. int rc = 0;
  2645. if (!mode || !mode->priv_info) {
  2646. DSI_ERR("invalid arguments\n");
  2647. return -EINVAL;
  2648. }
  2649. roi_caps = &mode->priv_info->roi_caps;
  2650. memset(roi_caps, 0, sizeof(*roi_caps));
  2651. data = utils->get_property(utils->data,
  2652. "qcom,partial-update-enabled", NULL);
  2653. if (data) {
  2654. if (!strcmp(data, "dual_roi"))
  2655. roi_caps->num_roi = 2;
  2656. else if (!strcmp(data, "single_roi"))
  2657. roi_caps->num_roi = 1;
  2658. else {
  2659. DSI_INFO(
  2660. "invalid value for qcom,partial-update-enabled: %s\n",
  2661. data);
  2662. return 0;
  2663. }
  2664. } else {
  2665. DSI_DEBUG("partial update disabled as the property is not set\n");
  2666. return 0;
  2667. }
  2668. roi_caps->merge_rois = utils->read_bool(utils->data,
  2669. "qcom,partial-update-roi-merge");
  2670. roi_caps->enabled = roi_caps->num_roi > 0;
  2671. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2672. roi_caps->enabled);
  2673. if (roi_caps->enabled)
  2674. rc = dsi_panel_parse_roi_alignment(utils,
  2675. &roi_caps->align);
  2676. if (rc)
  2677. memset(roi_caps, 0, sizeof(*roi_caps));
  2678. return rc;
  2679. }
  2680. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2681. struct dsi_parser_utils *utils)
  2682. {
  2683. if (!mode || !mode->priv_info) {
  2684. DSI_ERR("invalid arguments\n");
  2685. return false;
  2686. }
  2687. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2688. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2689. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2690. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2691. if (!mode->panel_mode_caps)
  2692. return false;
  2693. return true;
  2694. };
  2695. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2696. {
  2697. int dms_enabled;
  2698. const char *data;
  2699. struct dsi_parser_utils *utils = &panel->utils;
  2700. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2701. dms_enabled = utils->read_bool(utils->data,
  2702. "qcom,dynamic-mode-switch-enabled");
  2703. if (!dms_enabled)
  2704. return 0;
  2705. data = utils->get_property(utils->data,
  2706. "qcom,dynamic-mode-switch-type", NULL);
  2707. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2708. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2709. } else {
  2710. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2711. panel->name, data);
  2712. return -EINVAL;
  2713. }
  2714. return 0;
  2715. };
  2716. /*
  2717. * The length of all the valid values to be checked should not be greater
  2718. * than the length of returned data from read command.
  2719. */
  2720. static bool
  2721. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2722. {
  2723. int i;
  2724. struct drm_panel_esd_config *config = &panel->esd_config;
  2725. for (i = 0; i < count; ++i) {
  2726. if (config->status_valid_params[i] >
  2727. config->status_cmds_rlen[i]) {
  2728. DSI_DEBUG("ignore valid params\n");
  2729. return false;
  2730. }
  2731. }
  2732. return true;
  2733. }
  2734. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2735. char *prop_key, u32 **target, u32 cmd_cnt)
  2736. {
  2737. int tmp;
  2738. if (!utils->find_property(utils->data, prop_key, &tmp))
  2739. return false;
  2740. tmp /= sizeof(u32);
  2741. if (tmp != cmd_cnt) {
  2742. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2743. tmp, cmd_cnt);
  2744. return false;
  2745. }
  2746. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2747. if (IS_ERR_OR_NULL(*target)) {
  2748. DSI_ERR("Error allocating memory for property\n");
  2749. return false;
  2750. }
  2751. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2752. DSI_ERR("cannot get values from dts\n");
  2753. kfree(*target);
  2754. *target = NULL;
  2755. return false;
  2756. }
  2757. return true;
  2758. }
  2759. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2760. {
  2761. kfree(esd_config->status_buf);
  2762. kfree(esd_config->return_buf);
  2763. kfree(esd_config->status_value);
  2764. kfree(esd_config->status_valid_params);
  2765. kfree(esd_config->status_cmds_rlen);
  2766. kfree(esd_config->status_cmd.cmds);
  2767. }
  2768. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2769. {
  2770. struct drm_panel_esd_config *esd_config;
  2771. int rc = 0;
  2772. u32 tmp;
  2773. u32 i, status_len, *lenp;
  2774. struct property *data;
  2775. struct dsi_parser_utils *utils = &panel->utils;
  2776. if (!panel) {
  2777. DSI_ERR("Invalid Params\n");
  2778. return -EINVAL;
  2779. }
  2780. esd_config = &panel->esd_config;
  2781. if (!esd_config)
  2782. return -EINVAL;
  2783. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2784. DSI_CMD_SET_PANEL_STATUS, utils);
  2785. if (!esd_config->status_cmd.count) {
  2786. DSI_ERR("panel status command parsing failed\n");
  2787. rc = -EINVAL;
  2788. goto error;
  2789. }
  2790. if (!dsi_panel_parse_esd_status_len(utils,
  2791. "qcom,mdss-dsi-panel-status-read-length",
  2792. &panel->esd_config.status_cmds_rlen,
  2793. esd_config->status_cmd.count)) {
  2794. DSI_ERR("Invalid status read length\n");
  2795. rc = -EINVAL;
  2796. goto error1;
  2797. }
  2798. if (dsi_panel_parse_esd_status_len(utils,
  2799. "qcom,mdss-dsi-panel-status-valid-params",
  2800. &panel->esd_config.status_valid_params,
  2801. esd_config->status_cmd.count)) {
  2802. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2803. esd_config->status_cmd.count)) {
  2804. rc = -EINVAL;
  2805. goto error2;
  2806. }
  2807. }
  2808. status_len = 0;
  2809. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2810. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2811. status_len += lenp[i];
  2812. if (!status_len) {
  2813. rc = -EINVAL;
  2814. goto error2;
  2815. }
  2816. /*
  2817. * Some panel may need multiple read commands to properly
  2818. * check panel status. Do a sanity check for proper status
  2819. * value which will be compared with the value read by dsi
  2820. * controller during ESD check. Also check if multiple read
  2821. * commands are there then, there should be corresponding
  2822. * status check values for each read command.
  2823. */
  2824. data = utils->find_property(utils->data,
  2825. "qcom,mdss-dsi-panel-status-value", &tmp);
  2826. tmp /= sizeof(u32);
  2827. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2828. esd_config->groups = tmp / status_len;
  2829. } else {
  2830. DSI_ERR("error parse panel-status-value\n");
  2831. rc = -EINVAL;
  2832. goto error2;
  2833. }
  2834. esd_config->status_value =
  2835. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2836. GFP_KERNEL);
  2837. if (!esd_config->status_value) {
  2838. rc = -ENOMEM;
  2839. goto error2;
  2840. }
  2841. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2842. sizeof(unsigned char), GFP_KERNEL);
  2843. if (!esd_config->return_buf) {
  2844. rc = -ENOMEM;
  2845. goto error3;
  2846. }
  2847. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2848. if (!esd_config->status_buf) {
  2849. rc = -ENOMEM;
  2850. goto error4;
  2851. }
  2852. rc = utils->read_u32_array(utils->data,
  2853. "qcom,mdss-dsi-panel-status-value",
  2854. esd_config->status_value, esd_config->groups * status_len);
  2855. if (rc) {
  2856. DSI_DEBUG("error reading panel status values\n");
  2857. memset(esd_config->status_value, 0,
  2858. esd_config->groups * status_len);
  2859. }
  2860. return 0;
  2861. error4:
  2862. kfree(esd_config->return_buf);
  2863. error3:
  2864. kfree(esd_config->status_value);
  2865. error2:
  2866. kfree(esd_config->status_valid_params);
  2867. kfree(esd_config->status_cmds_rlen);
  2868. error1:
  2869. kfree(esd_config->status_cmd.cmds);
  2870. error:
  2871. return rc;
  2872. }
  2873. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2874. {
  2875. int rc = 0;
  2876. const char *string;
  2877. struct drm_panel_esd_config *esd_config;
  2878. struct dsi_parser_utils *utils = &panel->utils;
  2879. u8 *esd_mode = NULL;
  2880. esd_config = &panel->esd_config;
  2881. esd_config->status_mode = ESD_MODE_MAX;
  2882. esd_config->esd_enabled = utils->read_bool(utils->data,
  2883. "qcom,esd-check-enabled");
  2884. if (!esd_config->esd_enabled)
  2885. return 0;
  2886. rc = utils->read_string(utils->data,
  2887. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2888. if (!rc) {
  2889. if (!strcmp(string, "bta_check")) {
  2890. esd_config->status_mode = ESD_MODE_SW_BTA;
  2891. } else if (!strcmp(string, "reg_read")) {
  2892. esd_config->status_mode = ESD_MODE_REG_READ;
  2893. } else if (!strcmp(string, "te_signal_check")) {
  2894. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2895. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2896. } else {
  2897. DSI_ERR("TE-ESD not valid for video mode\n");
  2898. rc = -EINVAL;
  2899. goto error;
  2900. }
  2901. } else {
  2902. DSI_ERR("No valid panel-status-check-mode string\n");
  2903. rc = -EINVAL;
  2904. goto error;
  2905. }
  2906. } else {
  2907. DSI_DEBUG("status check method not defined!\n");
  2908. rc = -EINVAL;
  2909. goto error;
  2910. }
  2911. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2912. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2913. if (rc) {
  2914. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2915. rc);
  2916. goto error;
  2917. }
  2918. esd_mode = "register_read";
  2919. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2920. esd_mode = "bta_trigger";
  2921. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2922. esd_mode = "te_check";
  2923. }
  2924. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2925. return 0;
  2926. error:
  2927. panel->esd_config.esd_enabled = false;
  2928. return rc;
  2929. }
  2930. static void dsi_panel_update_util(struct dsi_panel *panel,
  2931. struct device_node *parser_node)
  2932. {
  2933. struct dsi_parser_utils *utils = &panel->utils;
  2934. if (parser_node) {
  2935. *utils = *dsi_parser_get_parser_utils();
  2936. utils->data = parser_node;
  2937. DSI_DEBUG("switching to parser APIs\n");
  2938. goto end;
  2939. }
  2940. *utils = *dsi_parser_get_of_utils();
  2941. utils->data = panel->panel_of_node;
  2942. end:
  2943. utils->node = panel->panel_of_node;
  2944. }
  2945. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2946. {
  2947. return 0;
  2948. }
  2949. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2950. {
  2951. if (trusted_vm_env) {
  2952. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2953. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2954. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2955. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2956. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2957. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2958. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2959. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2960. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  2961. } else {
  2962. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2963. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2964. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2965. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2966. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2967. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2968. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2969. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2970. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  2971. }
  2972. }
  2973. struct dsi_panel *dsi_panel_get(struct device *parent,
  2974. struct device_node *of_node,
  2975. struct device_node *parser_node,
  2976. const char *type,
  2977. int topology_override,
  2978. bool trusted_vm_env)
  2979. {
  2980. struct dsi_panel *panel;
  2981. struct dsi_parser_utils *utils;
  2982. const char *panel_physical_type;
  2983. int rc = 0;
  2984. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2985. if (!panel)
  2986. return ERR_PTR(-ENOMEM);
  2987. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2988. panel->panel_of_node = of_node;
  2989. panel->parent = parent;
  2990. panel->type = type;
  2991. dsi_panel_update_util(panel, parser_node);
  2992. utils = &panel->utils;
  2993. panel->name = utils->get_property(utils->data,
  2994. "qcom,mdss-dsi-panel-name", NULL);
  2995. if (!panel->name)
  2996. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2997. /*
  2998. * Set panel type to LCD as default.
  2999. */
  3000. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  3001. panel_physical_type = utils->get_property(utils->data,
  3002. "qcom,mdss-dsi-panel-physical-type", NULL);
  3003. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  3004. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  3005. rc = dsi_panel_parse_host_config(panel);
  3006. if (rc) {
  3007. DSI_ERR("failed to parse host configuration, rc=%d\n",
  3008. rc);
  3009. goto error;
  3010. }
  3011. rc = dsi_panel_parse_panel_mode(panel);
  3012. if (rc) {
  3013. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3014. rc);
  3015. goto error;
  3016. }
  3017. rc = dsi_panel_parse_dfps_caps(panel);
  3018. if (rc)
  3019. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3020. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3021. if (rc)
  3022. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3023. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3024. if (rc)
  3025. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3026. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3027. if (rc)
  3028. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3029. rc = dsi_panel_parse_phy_props(panel);
  3030. if (rc) {
  3031. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3032. rc);
  3033. goto error;
  3034. }
  3035. rc = panel->panel_ops.parse_gpios(panel);
  3036. if (rc) {
  3037. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3038. goto error;
  3039. }
  3040. rc = panel->panel_ops.parse_power_cfg(panel);
  3041. if (rc)
  3042. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3043. rc = dsi_panel_parse_bl_config(panel);
  3044. if (rc) {
  3045. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3046. if (rc == -EPROBE_DEFER)
  3047. goto error;
  3048. }
  3049. rc = dsi_panel_parse_misc_features(panel);
  3050. if (rc)
  3051. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3052. rc = dsi_panel_parse_hdr_config(panel);
  3053. if (rc)
  3054. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3055. rc = dsi_panel_get_mode_count(panel);
  3056. if (rc) {
  3057. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3058. goto error;
  3059. }
  3060. rc = dsi_panel_parse_dms_info(panel);
  3061. if (rc)
  3062. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3063. rc = dsi_panel_parse_esd_config(panel);
  3064. if (rc)
  3065. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3066. rc = dsi_panel_vreg_get(panel);
  3067. if (rc) {
  3068. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3069. panel->name, rc);
  3070. goto error;
  3071. }
  3072. panel->power_mode = SDE_MODE_DPMS_OFF;
  3073. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3074. NULL, DRM_MODE_CONNECTOR_DSI);
  3075. panel->mipi_device.dev.of_node = of_node;
  3076. drm_panel_add(&panel->drm_panel);
  3077. mutex_init(&panel->panel_lock);
  3078. return panel;
  3079. error:
  3080. kfree(panel);
  3081. return ERR_PTR(rc);
  3082. }
  3083. void dsi_panel_put(struct dsi_panel *panel)
  3084. {
  3085. drm_panel_remove(&panel->drm_panel);
  3086. /* free resources allocated for ESD check */
  3087. dsi_panel_esd_config_deinit(&panel->esd_config);
  3088. kfree(panel->avr_caps.avr_step_fps_list);
  3089. kfree(panel);
  3090. }
  3091. int dsi_panel_drv_init(struct dsi_panel *panel,
  3092. struct mipi_dsi_host *host)
  3093. {
  3094. int rc = 0;
  3095. struct mipi_dsi_device *dev;
  3096. if (!panel || !host) {
  3097. DSI_ERR("invalid params\n");
  3098. return -EINVAL;
  3099. }
  3100. mutex_lock(&panel->panel_lock);
  3101. dev = &panel->mipi_device;
  3102. dev->host = host;
  3103. /*
  3104. * We dont have device structure since panel is not a device node.
  3105. * When using drm panel framework, the device is probed when the host is
  3106. * create.
  3107. */
  3108. dev->channel = 0;
  3109. dev->lanes = 4;
  3110. panel->host = host;
  3111. rc = panel->panel_ops.pinctrl_init(panel);
  3112. if (rc) {
  3113. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3114. panel->name, rc);
  3115. goto exit;
  3116. }
  3117. rc = panel->panel_ops.gpio_request(panel);
  3118. if (rc) {
  3119. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3120. rc);
  3121. goto error_pinctrl_deinit;
  3122. }
  3123. rc = panel->panel_ops.bl_register(panel);
  3124. if (rc) {
  3125. if (rc != -EPROBE_DEFER)
  3126. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3127. panel->name, rc);
  3128. goto error_gpio_release;
  3129. }
  3130. goto exit;
  3131. error_gpio_release:
  3132. (void)dsi_panel_gpio_release(panel);
  3133. error_pinctrl_deinit:
  3134. (void)dsi_panel_pinctrl_deinit(panel);
  3135. exit:
  3136. mutex_unlock(&panel->panel_lock);
  3137. return rc;
  3138. }
  3139. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3140. {
  3141. int rc = 0;
  3142. if (!panel) {
  3143. DSI_ERR("invalid params\n");
  3144. return -EINVAL;
  3145. }
  3146. mutex_lock(&panel->panel_lock);
  3147. rc = panel->panel_ops.bl_unregister(panel);
  3148. if (rc)
  3149. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3150. panel->name, rc);
  3151. rc = panel->panel_ops.gpio_release(panel);
  3152. if (rc)
  3153. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3154. rc);
  3155. rc = panel->panel_ops.pinctrl_deinit(panel);
  3156. if (rc)
  3157. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3158. rc);
  3159. rc = dsi_panel_vreg_put(panel);
  3160. if (rc)
  3161. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3162. panel->host = NULL;
  3163. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3164. mutex_unlock(&panel->panel_lock);
  3165. return rc;
  3166. }
  3167. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3168. struct dsi_display_mode *mode)
  3169. {
  3170. return 0;
  3171. }
  3172. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3173. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3174. {
  3175. const char *compression;
  3176. u32 *array = NULL, top_count, len, i;
  3177. int rc = -EINVAL;
  3178. bool dsc_enable = false;
  3179. *dsc_count = 0;
  3180. *lm_count = 0;
  3181. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3182. if (compression && !strcmp(compression, "dsc"))
  3183. dsc_enable = true;
  3184. len = utils->count_u32_elems(node, "qcom,display-topology");
  3185. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3186. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3187. return rc;
  3188. top_count = len / TOPOLOGY_SET_LEN;
  3189. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3190. if (!array)
  3191. return -ENOMEM;
  3192. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3193. if (rc) {
  3194. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3195. goto read_fail;
  3196. }
  3197. for (i = 0; i < top_count; i++) {
  3198. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3199. if (dsc_enable)
  3200. *dsc_count = max(*dsc_count,
  3201. array[i * TOPOLOGY_SET_LEN + 1]);
  3202. }
  3203. read_fail:
  3204. kfree(array);
  3205. return 0;
  3206. }
  3207. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3208. {
  3209. const u32 SINGLE_MODE_SUPPORT = 1;
  3210. struct dsi_parser_utils *utils;
  3211. struct device_node *timings_np, *child_np;
  3212. int num_dfps_rates;
  3213. int num_video_modes = 0, num_cmd_modes = 0;
  3214. int count, rc = 0;
  3215. u32 dsc_count = 0, lm_count = 0;
  3216. if (!panel) {
  3217. DSI_ERR("invalid params\n");
  3218. return -EINVAL;
  3219. }
  3220. utils = &panel->utils;
  3221. panel->num_timing_nodes = 0;
  3222. timings_np = utils->get_child_by_name(utils->data,
  3223. "qcom,mdss-dsi-display-timings");
  3224. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3225. DSI_ERR("no display timing nodes defined\n");
  3226. rc = -EINVAL;
  3227. goto error;
  3228. }
  3229. count = utils->get_child_count(timings_np);
  3230. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3231. count > DSI_MODE_MAX) {
  3232. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3233. rc = -EINVAL;
  3234. goto error;
  3235. }
  3236. /* No multiresolution support is available for video mode panels.
  3237. * Multi-mode is supported for video mode during POMS is enabled.
  3238. */
  3239. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3240. !panel->host_config.ext_bridge_mode &&
  3241. !panel->panel_mode_switch_enabled)
  3242. count = SINGLE_MODE_SUPPORT;
  3243. panel->num_timing_nodes = count;
  3244. dsi_for_each_child_node(timings_np, child_np) {
  3245. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3246. num_video_modes++;
  3247. else if (utils->read_bool(child_np,
  3248. "qcom,mdss-dsi-cmd-mode"))
  3249. num_cmd_modes++;
  3250. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3251. num_video_modes++;
  3252. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3253. num_cmd_modes++;
  3254. dsi_panel_get_max_res_count(utils, child_np,
  3255. &dsc_count, &lm_count);
  3256. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3257. panel->lm_count = max(lm_count, panel->lm_count);
  3258. }
  3259. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3260. panel->dfps_caps.dfps_list_len;
  3261. /*
  3262. * Inflate num_of_modes by fps in dfps.
  3263. * Single command mode for video mode panels supporting
  3264. * panel operating mode switch.
  3265. */
  3266. num_video_modes = num_video_modes * num_dfps_rates;
  3267. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3268. (panel->panel_mode_switch_enabled))
  3269. num_cmd_modes = 1;
  3270. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3271. error:
  3272. return rc;
  3273. }
  3274. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3275. struct dsi_panel_phy_props *phy_props)
  3276. {
  3277. int rc = 0;
  3278. if (!panel || !phy_props) {
  3279. DSI_ERR("invalid params\n");
  3280. return -EINVAL;
  3281. }
  3282. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3283. return rc;
  3284. }
  3285. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3286. struct dsi_dfps_capabilities *dfps_caps)
  3287. {
  3288. int rc = 0;
  3289. if (!panel || !dfps_caps) {
  3290. DSI_ERR("invalid params\n");
  3291. return -EINVAL;
  3292. }
  3293. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3294. return rc;
  3295. }
  3296. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3297. {
  3298. int i;
  3299. if (!mode->priv_info)
  3300. return;
  3301. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3302. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3303. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3304. }
  3305. kfree(mode->priv_info);
  3306. }
  3307. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3308. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3309. {
  3310. u32 frame_time_us, nslices;
  3311. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3312. dsi_transfer_time_us, pixel_clk_khz;
  3313. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3314. struct dsi_mode_info *timing = &mode->timing;
  3315. struct dsi_display_mode *display_mode;
  3316. u32 jitter_numer, jitter_denom, prefill_lines;
  3317. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3318. u16 bpp;
  3319. /* Packet overhead in bits,
  3320. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3321. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3322. * 1 byte dcs data command.
  3323. */
  3324. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3325. packet_overhead = 120;
  3326. else
  3327. packet_overhead = 56;
  3328. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3329. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3330. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3331. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3332. if (timing->refresh_rate >= 120)
  3333. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3334. if (timing->dsc_enabled) {
  3335. nslices = (timing->h_active)/(dsc->config.slice_width);
  3336. /* (slice width x bit-per-pixel + packet overhead) x
  3337. * number of slices x height x fps / lane
  3338. */
  3339. bpp = DSC_BPP(dsc->config);
  3340. bits_per_line = ((dsc->config.slice_width * bpp) +
  3341. packet_overhead) * nslices;
  3342. bits_per_line = bits_per_line / (config->num_data_lanes);
  3343. min_bitclk_hz = (bits_per_line * timing->v_active *
  3344. timing->refresh_rate);
  3345. } else {
  3346. total_active_pixels = ((dsi_h_active_dce(timing)
  3347. * timing->v_active));
  3348. /* calculate the actual bitclk needed to transfer the frame */
  3349. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3350. (config->bpp));
  3351. do_div(min_bitclk_hz, config->num_data_lanes);
  3352. }
  3353. timing->min_dsi_clk_hz = min_bitclk_hz;
  3354. /*
  3355. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3356. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3357. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3358. * threshold time are configured to 40us.
  3359. */
  3360. if (mode->priv_info->disable_rsc_solver) {
  3361. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3362. } else {
  3363. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3364. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3365. }
  3366. /*
  3367. * Increase the prefill_lines proportionately as recommended
  3368. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3369. */
  3370. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3371. timing->refresh_rate, 60);
  3372. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3373. (timing->v_active));
  3374. min_threshold_us = min_threshold_us + prefill_time_us;
  3375. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3376. if (timing->clk_rate_hz) {
  3377. /* adjust the transfer time proportionately for bit clk*/
  3378. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3379. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3380. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3381. } else if (mode->priv_info->mdp_transfer_time_us) {
  3382. max_transfer_us = frame_time_us - min_threshold_us;
  3383. mode->priv_info->mdp_transfer_time_us = min(
  3384. mode->priv_info->mdp_transfer_time_us,
  3385. max_transfer_us);
  3386. timing->dsi_transfer_time_us =
  3387. mode->priv_info->mdp_transfer_time_us;
  3388. } else {
  3389. if ((min_threshold_us > frame_threshold_us) ||
  3390. (mode->priv_info->disable_rsc_solver))
  3391. frame_threshold_us = min_threshold_us;
  3392. timing->dsi_transfer_time_us = frame_time_us -
  3393. frame_threshold_us;
  3394. }
  3395. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3396. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3397. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3398. timing->mdp_transfer_time_us =
  3399. mode->priv_info->mdp_transfer_time_us;
  3400. }
  3401. /* Calculate pclk_khz to update modeinfo */
  3402. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3403. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3404. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3405. do_div(pixel_clk_khz, config->bpp);
  3406. display_mode->pixel_clk_khz = pixel_clk_khz;
  3407. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3408. }
  3409. int dsi_panel_get_mode(struct dsi_panel *panel,
  3410. u32 index, struct dsi_display_mode *mode,
  3411. int topology_override)
  3412. {
  3413. struct device_node *timings_np, *child_np;
  3414. struct dsi_parser_utils *utils;
  3415. struct dsi_display_mode_priv_info *prv_info;
  3416. u32 child_idx = 0;
  3417. int rc = 0, num_timings;
  3418. int traffic_mode;
  3419. void *utils_data = NULL;
  3420. if (!panel || !mode) {
  3421. DSI_ERR("invalid params\n");
  3422. return -EINVAL;
  3423. }
  3424. mutex_lock(&panel->panel_lock);
  3425. utils = &panel->utils;
  3426. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3427. if (!mode->priv_info) {
  3428. rc = -ENOMEM;
  3429. goto done;
  3430. }
  3431. prv_info = mode->priv_info;
  3432. timings_np = utils->get_child_by_name(utils->data,
  3433. "qcom,mdss-dsi-display-timings");
  3434. if (!timings_np) {
  3435. DSI_ERR("no display timing nodes defined\n");
  3436. rc = -EINVAL;
  3437. goto parse_fail;
  3438. }
  3439. num_timings = utils->get_child_count(timings_np);
  3440. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3441. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3442. rc = -EINVAL;
  3443. goto parse_fail;
  3444. }
  3445. utils_data = utils->data;
  3446. traffic_mode = panel->video_config.traffic_mode;
  3447. dsi_for_each_child_node(timings_np, child_np) {
  3448. if (index != child_idx++)
  3449. continue;
  3450. utils->data = child_np;
  3451. if (panel->panel_mode_switch_enabled) {
  3452. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3453. mode->panel_mode_caps = panel->panel_mode;
  3454. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3455. child_idx);
  3456. }
  3457. } else {
  3458. mode->panel_mode_caps = panel->panel_mode;
  3459. }
  3460. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3461. if (rc)
  3462. mode->mode_idx = index;
  3463. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3464. if (rc) {
  3465. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3466. goto parse_fail;
  3467. }
  3468. if (panel->dyn_clk_caps.dyn_clk_support) {
  3469. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3470. if (rc)
  3471. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3472. }
  3473. rc = dsi_panel_parse_dsc_params(mode, utils);
  3474. if (rc) {
  3475. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3476. goto parse_fail;
  3477. }
  3478. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3479. if (rc) {
  3480. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3481. goto parse_fail;
  3482. }
  3483. rc = dsi_panel_parse_topology(prv_info, utils,
  3484. topology_override);
  3485. if (rc) {
  3486. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3487. goto parse_fail;
  3488. }
  3489. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3490. if (rc) {
  3491. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3492. goto parse_fail;
  3493. }
  3494. rc = dsi_panel_parse_jitter_config(mode, utils);
  3495. if (rc)
  3496. DSI_ERR(
  3497. "failed to parse panel jitter config, rc=%d\n", rc);
  3498. rc = dsi_panel_parse_phy_timing(mode, utils);
  3499. if (rc) {
  3500. DSI_ERR(
  3501. "failed to parse panel phy timings, rc=%d\n", rc);
  3502. goto parse_fail;
  3503. }
  3504. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3505. if (rc)
  3506. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3507. }
  3508. goto done;
  3509. parse_fail:
  3510. kfree(mode->priv_info);
  3511. mode->priv_info = NULL;
  3512. done:
  3513. utils->data = utils_data;
  3514. mutex_unlock(&panel->panel_lock);
  3515. return rc;
  3516. }
  3517. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3518. struct dsi_display_mode *mode,
  3519. struct dsi_host_config *config)
  3520. {
  3521. int rc = 0;
  3522. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3523. if (!panel || !mode || !config) {
  3524. DSI_ERR("invalid params\n");
  3525. return -EINVAL;
  3526. }
  3527. mutex_lock(&panel->panel_lock);
  3528. config->panel_mode = panel->panel_mode;
  3529. memcpy(&config->common_config, &panel->host_config,
  3530. sizeof(config->common_config));
  3531. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3532. memcpy(&config->u.video_engine, &panel->video_config,
  3533. sizeof(config->u.video_engine));
  3534. } else {
  3535. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3536. sizeof(config->u.cmd_engine));
  3537. }
  3538. memcpy(&config->video_timing, &mode->timing,
  3539. sizeof(config->video_timing));
  3540. config->video_timing.mdp_transfer_time_us =
  3541. mode->priv_info->mdp_transfer_time_us;
  3542. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3543. config->video_timing.dsc = &mode->priv_info->dsc;
  3544. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3545. config->video_timing.vdc = &mode->priv_info->vdc;
  3546. if (dyn_clk_caps->dyn_clk_support)
  3547. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3548. else
  3549. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3550. config->esc_clk_rate_hz = 19200000;
  3551. mutex_unlock(&panel->panel_lock);
  3552. return rc;
  3553. }
  3554. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3555. {
  3556. int rc = 0;
  3557. if (!panel) {
  3558. DSI_ERR("invalid params\n");
  3559. return -EINVAL;
  3560. }
  3561. mutex_lock(&panel->panel_lock);
  3562. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3563. if (panel->lp11_init)
  3564. goto error;
  3565. rc = dsi_panel_power_on(panel);
  3566. if (rc) {
  3567. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3568. goto error;
  3569. }
  3570. error:
  3571. mutex_unlock(&panel->panel_lock);
  3572. return rc;
  3573. }
  3574. int dsi_panel_update_pps(struct dsi_panel *panel)
  3575. {
  3576. int rc = 0;
  3577. struct dsi_panel_cmd_set *set = NULL;
  3578. struct dsi_display_mode_priv_info *priv_info = NULL;
  3579. if (!panel || !panel->cur_mode) {
  3580. DSI_ERR("invalid params\n");
  3581. return -EINVAL;
  3582. }
  3583. mutex_lock(&panel->panel_lock);
  3584. priv_info = panel->cur_mode->priv_info;
  3585. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3586. if (priv_info->dsc_enabled)
  3587. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3588. panel->dce_pps_cmd, 0,
  3589. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3590. else if (priv_info->vdc_enabled)
  3591. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3592. panel->dce_pps_cmd, 0,
  3593. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3594. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3595. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3596. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3597. if (rc) {
  3598. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3599. goto error;
  3600. }
  3601. }
  3602. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3603. if (rc) {
  3604. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3605. panel->name, rc);
  3606. }
  3607. dsi_panel_destroy_cmd_packets(set);
  3608. error:
  3609. mutex_unlock(&panel->panel_lock);
  3610. return rc;
  3611. }
  3612. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3613. {
  3614. int rc = 0;
  3615. if (!panel) {
  3616. DSI_ERR("invalid params\n");
  3617. return -EINVAL;
  3618. }
  3619. mutex_lock(&panel->panel_lock);
  3620. if (!panel->panel_initialized)
  3621. goto exit;
  3622. /*
  3623. * Consider LP1->LP2->LP1.
  3624. * If the panel is already in LP mode, do not need to
  3625. * set the regulator.
  3626. * IBB and AB power mode would be set at the same time
  3627. * in PMIC driver, so we only call ibb setting that is enough.
  3628. */
  3629. if (dsi_panel_is_type_oled(panel) &&
  3630. panel->power_mode != SDE_MODE_DPMS_LP2)
  3631. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3632. "ibb", REGULATOR_MODE_IDLE);
  3633. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3634. if (rc)
  3635. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3636. panel->name, rc);
  3637. exit:
  3638. mutex_unlock(&panel->panel_lock);
  3639. return rc;
  3640. }
  3641. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3642. {
  3643. int rc = 0;
  3644. if (!panel) {
  3645. DSI_ERR("invalid params\n");
  3646. return -EINVAL;
  3647. }
  3648. mutex_lock(&panel->panel_lock);
  3649. if (!panel->panel_initialized)
  3650. goto exit;
  3651. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3652. if (rc)
  3653. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3654. panel->name, rc);
  3655. exit:
  3656. mutex_unlock(&panel->panel_lock);
  3657. return rc;
  3658. }
  3659. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3660. {
  3661. int rc = 0;
  3662. if (!panel) {
  3663. DSI_ERR("invalid params\n");
  3664. return -EINVAL;
  3665. }
  3666. mutex_lock(&panel->panel_lock);
  3667. if (!panel->panel_initialized)
  3668. goto exit;
  3669. /*
  3670. * Consider about LP1->LP2->NOLP.
  3671. */
  3672. if (dsi_panel_is_type_oled(panel) &&
  3673. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3674. panel->power_mode == SDE_MODE_DPMS_LP2))
  3675. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3676. "ibb", REGULATOR_MODE_NORMAL);
  3677. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3678. if (rc)
  3679. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3680. panel->name, rc);
  3681. exit:
  3682. mutex_unlock(&panel->panel_lock);
  3683. return rc;
  3684. }
  3685. int dsi_panel_prepare(struct dsi_panel *panel)
  3686. {
  3687. int rc = 0;
  3688. if (!panel) {
  3689. DSI_ERR("invalid params\n");
  3690. return -EINVAL;
  3691. }
  3692. mutex_lock(&panel->panel_lock);
  3693. if (panel->lp11_init) {
  3694. rc = dsi_panel_power_on(panel);
  3695. if (rc) {
  3696. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3697. panel->name, rc);
  3698. goto error;
  3699. }
  3700. }
  3701. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3702. if (rc) {
  3703. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3704. panel->name, rc);
  3705. goto error;
  3706. }
  3707. error:
  3708. mutex_unlock(&panel->panel_lock);
  3709. return rc;
  3710. }
  3711. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3712. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3713. {
  3714. static const int ROI_CMD_LEN = 5;
  3715. int rc = 0;
  3716. /* DTYPE_DCS_LWRITE */
  3717. char *caset, *paset;
  3718. set->cmds = NULL;
  3719. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3720. if (!caset) {
  3721. rc = -ENOMEM;
  3722. goto exit;
  3723. }
  3724. caset[0] = 0x2a;
  3725. caset[1] = (roi->x & 0xFF00) >> 8;
  3726. caset[2] = roi->x & 0xFF;
  3727. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3728. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3729. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3730. if (!paset) {
  3731. rc = -ENOMEM;
  3732. goto error_free_mem;
  3733. }
  3734. paset[0] = 0x2b;
  3735. paset[1] = (roi->y & 0xFF00) >> 8;
  3736. paset[2] = roi->y & 0xFF;
  3737. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3738. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3739. set->type = DSI_CMD_SET_ROI;
  3740. set->state = DSI_CMD_SET_STATE_LP;
  3741. set->count = 2; /* send caset + paset together */
  3742. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3743. if (!set->cmds) {
  3744. rc = -ENOMEM;
  3745. goto error_free_mem;
  3746. }
  3747. set->cmds[0].msg.channel = 0;
  3748. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3749. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3750. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3751. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3752. set->cmds[0].msg.tx_buf = caset;
  3753. set->cmds[0].msg.rx_len = 0;
  3754. set->cmds[0].msg.rx_buf = 0;
  3755. set->cmds[0].last_command = 0;
  3756. set->cmds[0].post_wait_ms = 0;
  3757. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3758. set->cmds[1].msg.channel = 0;
  3759. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3760. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3761. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3762. set->cmds[1].msg.tx_buf = paset;
  3763. set->cmds[1].msg.rx_len = 0;
  3764. set->cmds[1].msg.rx_buf = 0;
  3765. set->cmds[1].last_command = 1;
  3766. set->cmds[1].post_wait_ms = 0;
  3767. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3768. goto exit;
  3769. error_free_mem:
  3770. kfree(caset);
  3771. kfree(paset);
  3772. kfree(set->cmds);
  3773. exit:
  3774. return rc;
  3775. }
  3776. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3777. int ctrl_idx)
  3778. {
  3779. int rc = 0;
  3780. if (!panel) {
  3781. DSI_ERR("invalid params\n");
  3782. return -EINVAL;
  3783. }
  3784. mutex_lock(&panel->panel_lock);
  3785. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3786. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3787. if (rc)
  3788. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3789. panel->name, rc);
  3790. mutex_unlock(&panel->panel_lock);
  3791. return rc;
  3792. }
  3793. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3794. int ctrl_idx)
  3795. {
  3796. int rc = 0;
  3797. if (!panel) {
  3798. DSI_ERR("invalid params\n");
  3799. return -EINVAL;
  3800. }
  3801. mutex_lock(&panel->panel_lock);
  3802. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3803. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3804. if (rc)
  3805. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3806. panel->name, rc);
  3807. mutex_unlock(&panel->panel_lock);
  3808. return rc;
  3809. }
  3810. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3811. struct dsi_rect *roi)
  3812. {
  3813. int rc = 0;
  3814. struct dsi_panel_cmd_set *set;
  3815. struct dsi_display_mode_priv_info *priv_info;
  3816. if (!panel || !panel->cur_mode) {
  3817. DSI_ERR("Invalid params\n");
  3818. return -EINVAL;
  3819. }
  3820. priv_info = panel->cur_mode->priv_info;
  3821. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3822. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3823. if (rc) {
  3824. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3825. panel->name, rc);
  3826. return rc;
  3827. }
  3828. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3829. roi->x, roi->y, roi->w, roi->h);
  3830. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3831. mutex_lock(&panel->panel_lock);
  3832. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3833. if (rc)
  3834. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3835. panel->name, rc);
  3836. mutex_unlock(&panel->panel_lock);
  3837. dsi_panel_destroy_cmd_packets(set);
  3838. dsi_panel_dealloc_cmd_packets(set);
  3839. return rc;
  3840. }
  3841. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3842. {
  3843. int rc = 0;
  3844. if (!panel) {
  3845. DSI_ERR("Invalid params\n");
  3846. return -EINVAL;
  3847. }
  3848. mutex_lock(&panel->panel_lock);
  3849. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3850. if (rc)
  3851. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3852. panel->name, rc);
  3853. mutex_unlock(&panel->panel_lock);
  3854. return rc;
  3855. }
  3856. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3857. {
  3858. int rc = 0;
  3859. if (!panel) {
  3860. DSI_ERR("Invalid params\n");
  3861. return -EINVAL;
  3862. }
  3863. mutex_lock(&panel->panel_lock);
  3864. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3865. if (rc)
  3866. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3867. panel->name, rc);
  3868. mutex_unlock(&panel->panel_lock);
  3869. return rc;
  3870. }
  3871. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3872. {
  3873. int rc = 0;
  3874. if (!panel) {
  3875. DSI_ERR("Invalid params\n");
  3876. return -EINVAL;
  3877. }
  3878. mutex_lock(&panel->panel_lock);
  3879. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3880. if (rc)
  3881. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3882. panel->name, rc);
  3883. mutex_unlock(&panel->panel_lock);
  3884. return rc;
  3885. }
  3886. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3887. {
  3888. int rc = 0;
  3889. if (!panel) {
  3890. DSI_ERR("Invalid params\n");
  3891. return -EINVAL;
  3892. }
  3893. mutex_lock(&panel->panel_lock);
  3894. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3895. if (rc)
  3896. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3897. panel->name, rc);
  3898. mutex_unlock(&panel->panel_lock);
  3899. return rc;
  3900. }
  3901. int dsi_panel_switch(struct dsi_panel *panel)
  3902. {
  3903. int rc = 0;
  3904. if (!panel) {
  3905. DSI_ERR("Invalid params\n");
  3906. return -EINVAL;
  3907. }
  3908. mutex_lock(&panel->panel_lock);
  3909. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3910. if (rc)
  3911. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3912. panel->name, rc);
  3913. mutex_unlock(&panel->panel_lock);
  3914. return rc;
  3915. }
  3916. int dsi_panel_post_switch(struct dsi_panel *panel)
  3917. {
  3918. int rc = 0;
  3919. if (!panel) {
  3920. DSI_ERR("Invalid params\n");
  3921. return -EINVAL;
  3922. }
  3923. mutex_lock(&panel->panel_lock);
  3924. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3925. if (rc)
  3926. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3927. panel->name, rc);
  3928. mutex_unlock(&panel->panel_lock);
  3929. return rc;
  3930. }
  3931. int dsi_panel_enable(struct dsi_panel *panel)
  3932. {
  3933. int rc = 0;
  3934. if (!panel) {
  3935. DSI_ERR("Invalid params\n");
  3936. return -EINVAL;
  3937. }
  3938. mutex_lock(&panel->panel_lock);
  3939. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3940. if (rc) {
  3941. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3942. panel->name, rc);
  3943. goto error;
  3944. }
  3945. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3946. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3947. if (rc) {
  3948. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3949. panel->name, rc);
  3950. goto error;
  3951. }
  3952. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3953. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3954. if (rc) {
  3955. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3956. panel->name, rc);
  3957. goto error;
  3958. }
  3959. }
  3960. panel->panel_initialized = true;
  3961. error:
  3962. mutex_unlock(&panel->panel_lock);
  3963. return rc;
  3964. }
  3965. int dsi_panel_post_enable(struct dsi_panel *panel)
  3966. {
  3967. int rc = 0;
  3968. if (!panel) {
  3969. DSI_ERR("invalid params\n");
  3970. return -EINVAL;
  3971. }
  3972. mutex_lock(&panel->panel_lock);
  3973. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3974. if (rc) {
  3975. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3976. panel->name, rc);
  3977. goto error;
  3978. }
  3979. error:
  3980. mutex_unlock(&panel->panel_lock);
  3981. return rc;
  3982. }
  3983. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3984. {
  3985. int rc = 0;
  3986. if (!panel) {
  3987. DSI_ERR("invalid params\n");
  3988. return -EINVAL;
  3989. }
  3990. mutex_lock(&panel->panel_lock);
  3991. if (gpio_is_valid(panel->bl_config.en_gpio))
  3992. gpio_set_value(panel->bl_config.en_gpio, 0);
  3993. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3994. if (rc) {
  3995. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3996. panel->name, rc);
  3997. goto error;
  3998. }
  3999. error:
  4000. mutex_unlock(&panel->panel_lock);
  4001. return rc;
  4002. }
  4003. int dsi_panel_disable(struct dsi_panel *panel)
  4004. {
  4005. int rc = 0;
  4006. if (!panel) {
  4007. DSI_ERR("invalid params\n");
  4008. return -EINVAL;
  4009. }
  4010. mutex_lock(&panel->panel_lock);
  4011. /* Avoid sending panel off commands when ESD recovery is underway */
  4012. if (!atomic_read(&panel->esd_recovery_pending)) {
  4013. /*
  4014. * Need to set IBB/AB regulator mode to STANDBY,
  4015. * if panel is going off from AOD mode.
  4016. */
  4017. if (dsi_panel_is_type_oled(panel) &&
  4018. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4019. panel->power_mode == SDE_MODE_DPMS_LP2))
  4020. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4021. "ibb", REGULATOR_MODE_STANDBY);
  4022. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4023. if (rc) {
  4024. /*
  4025. * Sending panel off commands may fail when DSI
  4026. * controller is in a bad state. These failures can be
  4027. * ignored since controller will go for full reset on
  4028. * subsequent display enable anyway.
  4029. */
  4030. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4031. panel->name, rc);
  4032. rc = 0;
  4033. }
  4034. }
  4035. panel->panel_initialized = false;
  4036. panel->power_mode = SDE_MODE_DPMS_OFF;
  4037. mutex_unlock(&panel->panel_lock);
  4038. return rc;
  4039. }
  4040. int dsi_panel_unprepare(struct dsi_panel *panel)
  4041. {
  4042. int rc = 0;
  4043. if (!panel) {
  4044. DSI_ERR("invalid params\n");
  4045. return -EINVAL;
  4046. }
  4047. mutex_lock(&panel->panel_lock);
  4048. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4049. if (rc) {
  4050. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4051. panel->name, rc);
  4052. goto error;
  4053. }
  4054. error:
  4055. mutex_unlock(&panel->panel_lock);
  4056. return rc;
  4057. }
  4058. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4059. {
  4060. int rc = 0;
  4061. if (!panel) {
  4062. DSI_ERR("invalid params\n");
  4063. return -EINVAL;
  4064. }
  4065. mutex_lock(&panel->panel_lock);
  4066. rc = dsi_panel_power_off(panel);
  4067. if (rc) {
  4068. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4069. panel->name, rc);
  4070. goto error;
  4071. }
  4072. error:
  4073. mutex_unlock(&panel->panel_lock);
  4074. return rc;
  4075. }