dp_power.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
  4. * Copyright (c) 2012-2021, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/pm_runtime.h>
  8. #include "dp_power.h"
  9. #include "dp_catalog.h"
  10. #include "dp_debug.h"
  11. #include "dp_pll.h"
  12. #define DP_CLIENT_NAME_SIZE 20
  13. #define XO_CLK_KHZ 19200
  14. struct dp_power_private {
  15. struct dp_parser *parser;
  16. struct dp_pll *pll;
  17. struct platform_device *pdev;
  18. struct clk *pixel_clk_rcg;
  19. struct clk *pixel_parent;
  20. struct clk *pixel1_clk_rcg;
  21. struct clk *xo_clk;
  22. struct dp_power dp_power;
  23. bool core_clks_on;
  24. bool link_clks_on;
  25. bool strm0_clks_on;
  26. bool strm1_clks_on;
  27. bool strm0_clks_parked;
  28. bool strm1_clks_parked;
  29. };
  30. static int dp_power_regulator_init(struct dp_power_private *power)
  31. {
  32. int rc = 0, i = 0, j = 0;
  33. struct platform_device *pdev;
  34. struct dp_parser *parser;
  35. parser = power->parser;
  36. pdev = power->pdev;
  37. for (i = DP_CORE_PM; !rc && (i < DP_MAX_PM); i++) {
  38. rc = msm_dss_get_vreg(&pdev->dev,
  39. parser->mp[i].vreg_config,
  40. parser->mp[i].num_vreg, 1);
  41. if (rc) {
  42. DP_ERR("failed to init vregs for %s\n",
  43. dp_parser_pm_name(i));
  44. for (j = i - 1; j >= DP_CORE_PM; j--) {
  45. msm_dss_get_vreg(&pdev->dev,
  46. parser->mp[j].vreg_config,
  47. parser->mp[j].num_vreg, 0);
  48. }
  49. goto error;
  50. }
  51. }
  52. error:
  53. return rc;
  54. }
  55. static void dp_power_regulator_deinit(struct dp_power_private *power)
  56. {
  57. int rc = 0, i = 0;
  58. struct platform_device *pdev;
  59. struct dp_parser *parser;
  60. parser = power->parser;
  61. pdev = power->pdev;
  62. for (i = DP_CORE_PM; (i < DP_MAX_PM); i++) {
  63. rc = msm_dss_get_vreg(&pdev->dev,
  64. parser->mp[i].vreg_config,
  65. parser->mp[i].num_vreg, 0);
  66. if (rc)
  67. DP_ERR("failed to deinit vregs for %s\n",
  68. dp_parser_pm_name(i));
  69. }
  70. }
  71. static int dp_power_regulator_ctrl(struct dp_power_private *power, bool enable)
  72. {
  73. int rc = 0, i = 0, j = 0;
  74. struct dp_parser *parser;
  75. parser = power->parser;
  76. for (i = DP_CORE_PM; i < DP_MAX_PM; i++) {
  77. /*
  78. * The DP_PLL_PM regulator is controlled by dp_display based
  79. * on the link configuration.
  80. */
  81. if (i == DP_PLL_PM) {
  82. DP_DEBUG("skipping: '%s' vregs for %s\n",
  83. enable ? "enable" : "disable",
  84. dp_parser_pm_name(i));
  85. continue;
  86. }
  87. rc = msm_dss_enable_vreg(
  88. parser->mp[i].vreg_config,
  89. parser->mp[i].num_vreg, enable);
  90. if (rc) {
  91. DP_ERR("failed to '%s' vregs for %s\n",
  92. enable ? "enable" : "disable",
  93. dp_parser_pm_name(i));
  94. if (enable) {
  95. for (j = i-1; j >= DP_CORE_PM; j--) {
  96. msm_dss_enable_vreg(
  97. parser->mp[j].vreg_config,
  98. parser->mp[j].num_vreg, 0);
  99. }
  100. }
  101. goto error;
  102. }
  103. }
  104. error:
  105. return rc;
  106. }
  107. static int dp_power_pinctrl_set(struct dp_power_private *power, bool active)
  108. {
  109. int rc = -EFAULT;
  110. struct pinctrl_state *pin_state;
  111. struct dp_parser *parser;
  112. parser = power->parser;
  113. if (IS_ERR_OR_NULL(parser->pinctrl.pin))
  114. return 0;
  115. pin_state = active ? parser->pinctrl.state_active
  116. : parser->pinctrl.state_suspend;
  117. if (!IS_ERR_OR_NULL(pin_state)) {
  118. rc = pinctrl_select_state(parser->pinctrl.pin,
  119. pin_state);
  120. if (rc)
  121. DP_ERR("can not set %s pins\n",
  122. active ? "dp_active"
  123. : "dp_sleep");
  124. } else {
  125. DP_ERR("invalid '%s' pinstate\n",
  126. active ? "dp_active"
  127. : "dp_sleep");
  128. }
  129. return rc;
  130. }
  131. static void dp_power_clk_put(struct dp_power_private *power)
  132. {
  133. enum dp_pm_type module;
  134. for (module = DP_CORE_PM; module < DP_MAX_PM; module++) {
  135. struct dss_module_power *pm = &power->parser->mp[module];
  136. if (!pm->num_clk)
  137. continue;
  138. msm_dss_mmrm_deregister(&power->pdev->dev, pm);
  139. msm_dss_put_clk(pm->clk_config, pm->num_clk);
  140. }
  141. }
  142. static int dp_power_clk_init(struct dp_power_private *power, bool enable)
  143. {
  144. int rc = 0;
  145. struct device *dev;
  146. enum dp_pm_type module;
  147. dev = &power->pdev->dev;
  148. if (enable) {
  149. for (module = DP_CORE_PM; module < DP_MAX_PM; module++) {
  150. struct dss_module_power *pm =
  151. &power->parser->mp[module];
  152. if (!pm->num_clk)
  153. continue;
  154. rc = msm_dss_get_clk(dev, pm->clk_config, pm->num_clk);
  155. if (rc) {
  156. DP_ERR("failed to get %s clk. err=%d\n",
  157. dp_parser_pm_name(module), rc);
  158. goto exit;
  159. }
  160. }
  161. power->pixel_clk_rcg = clk_get(dev, "pixel_clk_rcg");
  162. if (IS_ERR(power->pixel_clk_rcg)) {
  163. DP_ERR("Unable to get DP pixel clk RCG: %ld\n",
  164. PTR_ERR(power->pixel_clk_rcg));
  165. rc = PTR_ERR(power->pixel_clk_rcg);
  166. power->pixel_clk_rcg = NULL;
  167. goto err_pixel_clk_rcg;
  168. }
  169. power->pixel_parent = clk_get(dev, "pixel_parent");
  170. if (IS_ERR(power->pixel_parent)) {
  171. DP_ERR("Unable to get DP pixel RCG parent: %d\n",
  172. PTR_ERR(power->pixel_parent));
  173. rc = PTR_ERR(power->pixel_parent);
  174. power->pixel_parent = NULL;
  175. goto err_pixel_parent;
  176. }
  177. power->xo_clk = clk_get(dev, "rpmh_cxo_clk");
  178. if (IS_ERR(power->xo_clk)) {
  179. DP_ERR("Unable to get XO clk: %d\n", PTR_ERR(power->xo_clk));
  180. rc = PTR_ERR(power->xo_clk);
  181. power->xo_clk = NULL;
  182. goto err_xo_clk;
  183. }
  184. if (power->parser->has_mst) {
  185. power->pixel1_clk_rcg = clk_get(dev, "pixel1_clk_rcg");
  186. if (IS_ERR(power->pixel1_clk_rcg)) {
  187. DP_ERR("Unable to get DP pixel1 clk RCG: %d\n",
  188. PTR_ERR(power->pixel1_clk_rcg));
  189. rc = PTR_ERR(power->pixel1_clk_rcg);
  190. power->pixel1_clk_rcg = NULL;
  191. goto err_pixel1_clk_rcg;
  192. }
  193. }
  194. } else {
  195. if (power->pixel1_clk_rcg)
  196. clk_put(power->pixel1_clk_rcg);
  197. if (power->pixel_parent)
  198. clk_put(power->pixel_parent);
  199. if (power->pixel_clk_rcg)
  200. clk_put(power->pixel_clk_rcg);
  201. dp_power_clk_put(power);
  202. }
  203. return rc;
  204. err_pixel1_clk_rcg:
  205. clk_put(power->xo_clk);
  206. err_xo_clk:
  207. clk_put(power->pixel_parent);
  208. err_pixel_parent:
  209. clk_put(power->pixel_clk_rcg);
  210. err_pixel_clk_rcg:
  211. dp_power_clk_put(power);
  212. exit:
  213. return rc;
  214. }
  215. static int dp_power_park_module(struct dp_power_private *power, enum dp_pm_type module)
  216. {
  217. struct dss_module_power *mp;
  218. struct clk *clk = NULL;
  219. int rc = 0;
  220. bool *parked;
  221. mp = &power->parser->mp[module];
  222. if (module == DP_STREAM0_PM) {
  223. clk = power->pixel_clk_rcg;
  224. parked = &power->strm0_clks_parked;
  225. } else if (module == DP_STREAM1_PM) {
  226. clk = power->pixel1_clk_rcg;
  227. parked = &power->strm1_clks_parked;
  228. } else {
  229. goto exit;
  230. }
  231. if (!clk) {
  232. DP_WARN("clk type %d not supported\n", module);
  233. rc = -EINVAL;
  234. goto exit;
  235. }
  236. if (!power->xo_clk) {
  237. rc = -EINVAL;
  238. goto exit;
  239. }
  240. if (*parked)
  241. goto exit;
  242. rc = clk_set_parent(clk, power->xo_clk);
  243. if (rc) {
  244. DP_ERR("unable to set xo parent on clk %d\n", module);
  245. goto exit;
  246. }
  247. mp->clk_config->rate = XO_CLK_KHZ;
  248. rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk);
  249. if (rc) {
  250. DP_ERR("failed to set clk rate.\n");
  251. goto exit;
  252. }
  253. *parked = true;
  254. exit:
  255. return rc;
  256. }
  257. static int dp_power_clk_set_rate(struct dp_power_private *power,
  258. enum dp_pm_type module, bool enable)
  259. {
  260. int rc = 0;
  261. struct dss_module_power *mp;
  262. if (!power) {
  263. DP_ERR("invalid power data\n");
  264. rc = -EINVAL;
  265. goto exit;
  266. }
  267. mp = &power->parser->mp[module];
  268. if (enable) {
  269. rc = msm_dss_clk_set_rate(mp->clk_config, mp->num_clk);
  270. if (rc) {
  271. DP_ERR("failed to set clks rate.\n");
  272. goto exit;
  273. }
  274. rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, 1);
  275. if (rc) {
  276. DP_ERR("failed to enable clks\n");
  277. goto exit;
  278. }
  279. } else {
  280. rc = msm_dss_enable_clk(mp->clk_config, mp->num_clk, 0);
  281. if (rc) {
  282. DP_ERR("failed to disable clks\n");
  283. goto exit;
  284. }
  285. dp_power_park_module(power, module);
  286. }
  287. exit:
  288. return rc;
  289. }
  290. static int dp_power_clk_enable(struct dp_power *dp_power,
  291. enum dp_pm_type pm_type, bool enable)
  292. {
  293. int rc = 0;
  294. struct dss_module_power *mp;
  295. struct dp_power_private *power;
  296. if (!dp_power) {
  297. DP_ERR("invalid power data\n");
  298. rc = -EINVAL;
  299. goto error;
  300. }
  301. power = container_of(dp_power, struct dp_power_private, dp_power);
  302. mp = &power->parser->mp[pm_type];
  303. if (pm_type >= DP_MAX_PM) {
  304. DP_ERR("unsupported power module: %s\n",
  305. dp_parser_pm_name(pm_type));
  306. return -EINVAL;
  307. }
  308. if (enable) {
  309. if (pm_type == DP_CORE_PM && power->core_clks_on) {
  310. DP_DEBUG("core clks already enabled\n");
  311. return 0;
  312. }
  313. if ((pm_type == DP_STREAM0_PM) && (power->strm0_clks_on)) {
  314. DP_DEBUG("strm0 clks already enabled\n");
  315. return 0;
  316. }
  317. if ((pm_type == DP_STREAM1_PM) && (power->strm1_clks_on)) {
  318. DP_DEBUG("strm1 clks already enabled\n");
  319. return 0;
  320. }
  321. if ((pm_type == DP_CTRL_PM) && (!power->core_clks_on)) {
  322. DP_DEBUG("Need to enable core clks before link clks\n");
  323. rc = dp_power_clk_set_rate(power, pm_type, enable);
  324. if (rc) {
  325. DP_ERR("failed to enable clks: %s. err=%d\n",
  326. dp_parser_pm_name(DP_CORE_PM), rc);
  327. goto error;
  328. } else {
  329. power->core_clks_on = true;
  330. }
  331. }
  332. if (pm_type == DP_LINK_PM && power->link_clks_on) {
  333. DP_DEBUG("links clks already enabled\n");
  334. return 0;
  335. }
  336. }
  337. rc = dp_power_clk_set_rate(power, pm_type, enable);
  338. if (rc) {
  339. DP_ERR("failed to '%s' clks for: %s. err=%d\n",
  340. enable ? "enable" : "disable",
  341. dp_parser_pm_name(pm_type), rc);
  342. goto error;
  343. }
  344. if (pm_type == DP_CORE_PM)
  345. power->core_clks_on = enable;
  346. else if (pm_type == DP_STREAM0_PM)
  347. power->strm0_clks_on = enable;
  348. else if (pm_type == DP_STREAM1_PM)
  349. power->strm1_clks_on = enable;
  350. else if (pm_type == DP_LINK_PM)
  351. power->link_clks_on = enable;
  352. if (pm_type == DP_STREAM0_PM)
  353. power->strm0_clks_parked = false;
  354. if (pm_type == DP_STREAM1_PM)
  355. power->strm1_clks_parked = false;
  356. /*
  357. * This log is printed only when user connects or disconnects
  358. * a DP cable. As this is a user-action and not a frequent
  359. * usecase, it is not going to flood the kernel logs. Also,
  360. * helpful in debugging the NOC issues.
  361. */
  362. DP_INFO("core:%s link:%s strm0:%s strm1:%s\n",
  363. power->core_clks_on ? "on" : "off",
  364. power->link_clks_on ? "on" : "off",
  365. power->strm0_clks_on ? "on" : "off",
  366. power->strm1_clks_on ? "on" : "off");
  367. error:
  368. return rc;
  369. }
  370. static bool dp_power_clk_status(struct dp_power *dp_power, enum dp_pm_type pm_type)
  371. {
  372. struct dp_power_private *power;
  373. if (!dp_power) {
  374. DP_ERR("invalid power data\n");
  375. return false;
  376. }
  377. power = container_of(dp_power, struct dp_power_private, dp_power);
  378. if (pm_type == DP_LINK_PM)
  379. return power->link_clks_on;
  380. else if (pm_type == DP_CORE_PM)
  381. return power->core_clks_on;
  382. else if (pm_type == DP_STREAM0_PM)
  383. return power->strm0_clks_on;
  384. else if (pm_type == DP_STREAM1_PM)
  385. return power->strm1_clks_on;
  386. else
  387. return false;
  388. }
  389. static int dp_power_request_gpios(struct dp_power_private *power)
  390. {
  391. int rc = 0, i;
  392. struct device *dev;
  393. struct dss_module_power *mp;
  394. static const char * const gpio_names[] = {
  395. "aux_enable", "aux_sel", "usbplug_cc",
  396. };
  397. if (!power) {
  398. DP_ERR("invalid power data\n");
  399. return -EINVAL;
  400. }
  401. dev = &power->pdev->dev;
  402. mp = &power->parser->mp[DP_CORE_PM];
  403. for (i = 0; i < ARRAY_SIZE(gpio_names); i++) {
  404. unsigned int gpio = mp->gpio_config[i].gpio;
  405. if (gpio_is_valid(gpio)) {
  406. rc = gpio_request(gpio, gpio_names[i]);
  407. if (rc) {
  408. DP_ERR("request %s gpio failed, rc=%d\n",
  409. gpio_names[i], rc);
  410. goto error;
  411. }
  412. }
  413. }
  414. return 0;
  415. error:
  416. for (i = 0; i < ARRAY_SIZE(gpio_names); i++) {
  417. unsigned int gpio = mp->gpio_config[i].gpio;
  418. if (gpio_is_valid(gpio))
  419. gpio_free(gpio);
  420. }
  421. return rc;
  422. }
  423. static bool dp_power_find_gpio(const char *gpio1, const char *gpio2)
  424. {
  425. return !!strnstr(gpio1, gpio2, strlen(gpio1));
  426. }
  427. static void dp_power_set_gpio(struct dp_power_private *power, bool flip)
  428. {
  429. int i;
  430. struct dss_module_power *mp = &power->parser->mp[DP_CORE_PM];
  431. struct dss_gpio *config = mp->gpio_config;
  432. for (i = 0; i < mp->num_gpio; i++) {
  433. if (dp_power_find_gpio(config->gpio_name, "aux-sel"))
  434. config->value = flip;
  435. if (gpio_is_valid(config->gpio)) {
  436. DP_DEBUG("gpio %s, value %d\n", config->gpio_name,
  437. config->value);
  438. if (dp_power_find_gpio(config->gpio_name, "aux-en") ||
  439. dp_power_find_gpio(config->gpio_name, "aux-sel"))
  440. gpio_direction_output(config->gpio,
  441. config->value);
  442. else
  443. gpio_set_value(config->gpio, config->value);
  444. }
  445. config++;
  446. }
  447. }
  448. static int dp_power_config_gpios(struct dp_power_private *power, bool flip,
  449. bool enable)
  450. {
  451. int rc = 0, i;
  452. struct dss_module_power *mp;
  453. struct dss_gpio *config;
  454. mp = &power->parser->mp[DP_CORE_PM];
  455. config = mp->gpio_config;
  456. if (enable) {
  457. rc = dp_power_request_gpios(power);
  458. if (rc) {
  459. DP_ERR("gpio request failed\n");
  460. return rc;
  461. }
  462. dp_power_set_gpio(power, flip);
  463. } else {
  464. for (i = 0; i < mp->num_gpio; i++) {
  465. if (gpio_is_valid(config[i].gpio)) {
  466. gpio_set_value(config[i].gpio, 0);
  467. gpio_free(config[i].gpio);
  468. }
  469. }
  470. }
  471. return 0;
  472. }
  473. static int dp_power_mmrm_init(struct dp_power *dp_power, struct sde_power_handle *phandle, void *dp,
  474. int (*dp_display_mmrm_callback)(struct mmrm_client_notifier_data *notifier_data))
  475. {
  476. int rc = 0;
  477. enum dp_pm_type module;
  478. struct dp_power_private *power = container_of(dp_power, struct dp_power_private, dp_power);
  479. struct device *dev = &power->pdev->dev;
  480. for (module = DP_CORE_PM; module < DP_MAX_PM; module++) {
  481. struct dss_module_power *pm = &power->parser->mp[module];
  482. if (!pm->num_clk)
  483. continue;
  484. rc = msm_dss_mmrm_register(dev, pm, dp_display_mmrm_callback,
  485. dp, &phandle->mmrm_enable);
  486. if (rc)
  487. DP_ERR("mmrm register failed rc=%d\n", rc);
  488. }
  489. return rc;
  490. }
  491. static int dp_power_client_init(struct dp_power *dp_power,
  492. struct sde_power_handle *phandle, struct drm_device *drm_dev)
  493. {
  494. int rc = 0;
  495. struct dp_power_private *power;
  496. if (!drm_dev) {
  497. DP_ERR("invalid drm_dev\n");
  498. return -EINVAL;
  499. }
  500. power = container_of(dp_power, struct dp_power_private, dp_power);
  501. rc = dp_power_regulator_init(power);
  502. if (rc) {
  503. DP_ERR("failed to init regulators\n");
  504. goto error_power;
  505. }
  506. rc = dp_power_clk_init(power, true);
  507. if (rc) {
  508. DP_ERR("failed to init clocks\n");
  509. goto error_clk;
  510. }
  511. dp_power->phandle = phandle;
  512. dp_power->drm_dev = drm_dev;
  513. return 0;
  514. error_clk:
  515. dp_power_regulator_deinit(power);
  516. error_power:
  517. return rc;
  518. }
  519. static void dp_power_client_deinit(struct dp_power *dp_power)
  520. {
  521. struct dp_power_private *power;
  522. if (!dp_power) {
  523. DP_ERR("invalid power data\n");
  524. return;
  525. }
  526. power = container_of(dp_power, struct dp_power_private, dp_power);
  527. dp_power_clk_init(power, false);
  528. dp_power_regulator_deinit(power);
  529. }
  530. static int dp_power_park_clocks(struct dp_power *dp_power)
  531. {
  532. int rc = 0;
  533. struct dp_power_private *power;
  534. if (!dp_power) {
  535. DP_ERR("invalid power data\n");
  536. return -EINVAL;
  537. }
  538. power = container_of(dp_power, struct dp_power_private, dp_power);
  539. rc = dp_power_park_module(power, DP_STREAM0_PM);
  540. if (rc) {
  541. DP_ERR("failed to park stream 0. err=%d\n", rc);
  542. goto error;
  543. }
  544. rc = dp_power_park_module(power, DP_STREAM1_PM);
  545. if (rc) {
  546. DP_ERR("failed to park stream 1. err=%d\n", rc);
  547. goto error;
  548. }
  549. error:
  550. return rc;
  551. }
  552. static int dp_power_set_pixel_clk_parent(struct dp_power *dp_power, u32 strm_id)
  553. {
  554. int rc = 0;
  555. struct dp_power_private *power;
  556. if (!dp_power || strm_id >= DP_STREAM_MAX) {
  557. DP_ERR("invalid power data. stream %d\n", strm_id);
  558. rc = -EINVAL;
  559. goto exit;
  560. }
  561. power = container_of(dp_power, struct dp_power_private, dp_power);
  562. if (strm_id == DP_STREAM_0) {
  563. if (power->pixel_clk_rcg && power->pixel_parent)
  564. rc = clk_set_parent(power->pixel_clk_rcg,
  565. power->pixel_parent);
  566. else
  567. DP_WARN("skipped for strm_id=%d\n", strm_id);
  568. } else if (strm_id == DP_STREAM_1) {
  569. if (power->pixel1_clk_rcg && power->pixel_parent)
  570. rc = clk_set_parent(power->pixel1_clk_rcg,
  571. power->pixel_parent);
  572. else
  573. DP_WARN("skipped for strm_id=%d\n", strm_id);
  574. }
  575. if (rc)
  576. DP_ERR("failed. strm_id=%d, rc=%d\n", strm_id, rc);
  577. exit:
  578. return rc;
  579. }
  580. static u64 dp_power_clk_get_rate(struct dp_power *dp_power, char *clk_name)
  581. {
  582. size_t i;
  583. enum dp_pm_type j;
  584. struct dss_module_power *mp;
  585. struct dp_power_private *power;
  586. bool clk_found = false;
  587. u64 rate = 0;
  588. if (!clk_name) {
  589. DP_ERR("invalid pointer for clk_name\n");
  590. return 0;
  591. }
  592. power = container_of(dp_power, struct dp_power_private, dp_power);
  593. mp = &dp_power->phandle->mp;
  594. for (i = 0; i < mp->num_clk; i++) {
  595. if (!strcmp(mp->clk_config[i].clk_name, clk_name)) {
  596. rate = clk_get_rate(mp->clk_config[i].clk);
  597. clk_found = true;
  598. break;
  599. }
  600. }
  601. for (j = DP_CORE_PM; j < DP_MAX_PM && !clk_found; j++) {
  602. mp = &power->parser->mp[j];
  603. for (i = 0; i < mp->num_clk; i++) {
  604. if (!strcmp(mp->clk_config[i].clk_name, clk_name)) {
  605. rate = clk_get_rate(mp->clk_config[i].clk);
  606. clk_found = true;
  607. break;
  608. }
  609. }
  610. }
  611. return rate;
  612. }
  613. static int dp_power_init(struct dp_power *dp_power, bool flip)
  614. {
  615. int rc = 0;
  616. struct dp_power_private *power;
  617. if (!dp_power) {
  618. DP_ERR("invalid power data\n");
  619. rc = -EINVAL;
  620. goto exit;
  621. }
  622. power = container_of(dp_power, struct dp_power_private, dp_power);
  623. rc = dp_power_regulator_ctrl(power, true);
  624. if (rc) {
  625. DP_ERR("failed to enable regulators\n");
  626. goto exit;
  627. }
  628. rc = dp_power_pinctrl_set(power, true);
  629. if (rc) {
  630. DP_ERR("failed to set pinctrl state\n");
  631. goto err_pinctrl;
  632. }
  633. rc = dp_power_config_gpios(power, flip, true);
  634. if (rc) {
  635. DP_ERR("failed to enable gpios\n");
  636. goto err_gpio;
  637. }
  638. rc = pm_runtime_resume_and_get(dp_power->drm_dev->dev);
  639. if (rc < 0) {
  640. DP_ERR("failed to enable power resource %d\n", rc);
  641. goto err_sde_power;
  642. }
  643. rc = dp_power_clk_enable(dp_power, DP_CORE_PM, true);
  644. if (rc) {
  645. DP_ERR("failed to enable DP core clocks\n");
  646. goto err_clk;
  647. }
  648. return 0;
  649. err_clk:
  650. pm_runtime_put_sync(dp_power->drm_dev->dev);
  651. err_sde_power:
  652. dp_power_config_gpios(power, flip, false);
  653. err_gpio:
  654. dp_power_pinctrl_set(power, false);
  655. err_pinctrl:
  656. dp_power_regulator_ctrl(power, false);
  657. exit:
  658. return rc;
  659. }
  660. static int dp_power_deinit(struct dp_power *dp_power)
  661. {
  662. int rc = 0;
  663. struct dp_power_private *power;
  664. if (!dp_power) {
  665. DP_ERR("invalid power data\n");
  666. rc = -EINVAL;
  667. goto exit;
  668. }
  669. power = container_of(dp_power, struct dp_power_private, dp_power);
  670. if (power->link_clks_on)
  671. dp_power_clk_enable(dp_power, DP_LINK_PM, false);
  672. dp_power_clk_enable(dp_power, DP_CORE_PM, false);
  673. pm_runtime_put_sync(dp_power->drm_dev->dev);
  674. dp_power_config_gpios(power, false, false);
  675. dp_power_pinctrl_set(power, false);
  676. dp_power_regulator_ctrl(power, false);
  677. exit:
  678. return rc;
  679. }
  680. struct dp_power *dp_power_get(struct dp_parser *parser, struct dp_pll *pll)
  681. {
  682. int rc = 0;
  683. struct dp_power_private *power;
  684. struct dp_power *dp_power;
  685. if (!parser || !pll) {
  686. DP_ERR("invalid input\n");
  687. rc = -EINVAL;
  688. goto error;
  689. }
  690. power = kzalloc(sizeof(*power), GFP_KERNEL);
  691. if (!power) {
  692. rc = -ENOMEM;
  693. goto error;
  694. }
  695. power->parser = parser;
  696. power->pll = pll;
  697. power->pdev = parser->pdev;
  698. dp_power = &power->dp_power;
  699. dp_power->init = dp_power_init;
  700. dp_power->deinit = dp_power_deinit;
  701. dp_power->clk_enable = dp_power_clk_enable;
  702. dp_power->clk_status = dp_power_clk_status;
  703. dp_power->set_pixel_clk_parent = dp_power_set_pixel_clk_parent;
  704. dp_power->park_clocks = dp_power_park_clocks;
  705. dp_power->clk_get_rate = dp_power_clk_get_rate;
  706. dp_power->power_client_init = dp_power_client_init;
  707. dp_power->power_client_deinit = dp_power_client_deinit;
  708. dp_power->power_mmrm_init = dp_power_mmrm_init;
  709. return dp_power;
  710. error:
  711. return ERR_PTR(rc);
  712. }
  713. void dp_power_put(struct dp_power *dp_power)
  714. {
  715. struct dp_power_private *power = NULL;
  716. if (!dp_power)
  717. return;
  718. power = container_of(dp_power, struct dp_power_private, dp_power);
  719. kfree(power);
  720. }