dp_rx.c 84 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #include "dp_hist.h"
  35. #ifdef ATH_RX_PRI_SAVE
  36. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  37. (qdf_nbuf_set_priority(_nbuf, _tid))
  38. #else
  39. #define DP_RX_TID_SAVE(_nbuf, _tid)
  40. #endif
  41. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  42. static inline
  43. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  44. {
  45. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  46. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  47. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  48. return false;
  49. }
  50. return true;
  51. }
  52. #else
  53. static inline
  54. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  55. {
  56. return true;
  57. }
  58. #endif
  59. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  60. {
  61. return vdev->ap_bridge_enabled;
  62. }
  63. #ifdef DUP_RX_DESC_WAR
  64. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  65. hal_ring_handle_t hal_ring,
  66. hal_ring_desc_t ring_desc,
  67. struct dp_rx_desc *rx_desc)
  68. {
  69. void *hal_soc = soc->hal_soc;
  70. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  71. dp_rx_desc_dump(rx_desc);
  72. }
  73. #else
  74. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  75. hal_ring_handle_t hal_ring_hdl,
  76. hal_ring_desc_t ring_desc,
  77. struct dp_rx_desc *rx_desc)
  78. {
  79. hal_soc_handle_t hal_soc = soc->hal_soc;
  80. dp_rx_desc_dump(rx_desc);
  81. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  82. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  83. qdf_assert_always(0);
  84. }
  85. #endif
  86. #ifdef RX_DESC_SANITY_WAR
  87. static inline
  88. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  89. hal_ring_handle_t hal_ring_hdl,
  90. hal_ring_desc_t ring_desc,
  91. struct dp_rx_desc *rx_desc)
  92. {
  93. uint8_t return_buffer_manager;
  94. if (qdf_unlikely(!rx_desc)) {
  95. /*
  96. * This is an unlikely case where the cookie obtained
  97. * from the ring_desc is invalid and hence we are not
  98. * able to find the corresponding rx_desc
  99. */
  100. goto fail;
  101. }
  102. return_buffer_manager = hal_rx_ret_buf_manager_get(ring_desc);
  103. if (qdf_unlikely(!(return_buffer_manager == HAL_RX_BUF_RBM_SW1_BM ||
  104. return_buffer_manager == HAL_RX_BUF_RBM_SW3_BM))) {
  105. goto fail;
  106. }
  107. return QDF_STATUS_SUCCESS;
  108. fail:
  109. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  110. dp_err("Ring Desc:");
  111. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  112. ring_desc);
  113. return QDF_STATUS_E_NULL_VALUE;
  114. }
  115. #else
  116. static inline
  117. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  118. hal_ring_handle_t hal_ring_hdl,
  119. hal_ring_desc_t ring_desc,
  120. struct dp_rx_desc *rx_desc)
  121. {
  122. return QDF_STATUS_SUCCESS;
  123. }
  124. #endif
  125. /*
  126. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  127. * called during dp rx initialization
  128. * and at the end of dp_rx_process.
  129. *
  130. * @soc: core txrx main context
  131. * @mac_id: mac_id which is one of 3 mac_ids
  132. * @dp_rxdma_srng: dp rxdma circular ring
  133. * @rx_desc_pool: Pointer to free Rx descriptor pool
  134. * @num_req_buffers: number of buffer to be replenished
  135. * @desc_list: list of descs if called from dp_rx_process
  136. * or NULL during dp rx initialization or out of buffer
  137. * interrupt.
  138. * @tail: tail of descs list
  139. * @func_name: name of the caller function
  140. * Return: return success or failure
  141. */
  142. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  143. struct dp_srng *dp_rxdma_srng,
  144. struct rx_desc_pool *rx_desc_pool,
  145. uint32_t num_req_buffers,
  146. union dp_rx_desc_list_elem_t **desc_list,
  147. union dp_rx_desc_list_elem_t **tail,
  148. const char *func_name)
  149. {
  150. uint32_t num_alloc_desc;
  151. uint16_t num_desc_to_free = 0;
  152. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  153. uint32_t num_entries_avail;
  154. uint32_t count;
  155. int sync_hw_ptr = 1;
  156. qdf_dma_addr_t paddr;
  157. qdf_nbuf_t rx_netbuf;
  158. void *rxdma_ring_entry;
  159. union dp_rx_desc_list_elem_t *next;
  160. QDF_STATUS ret;
  161. uint16_t buf_size = rx_desc_pool->buf_size;
  162. uint8_t buf_alignment = rx_desc_pool->buf_alignment;
  163. void *rxdma_srng;
  164. rxdma_srng = dp_rxdma_srng->hal_srng;
  165. if (!rxdma_srng) {
  166. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  167. "rxdma srng not initialized");
  168. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  169. return QDF_STATUS_E_FAILURE;
  170. }
  171. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  172. "requested %d buffers for replenish", num_req_buffers);
  173. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  174. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  175. rxdma_srng,
  176. sync_hw_ptr);
  177. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  178. "no of available entries in rxdma ring: %d",
  179. num_entries_avail);
  180. if (!(*desc_list) && (num_entries_avail >
  181. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  182. num_req_buffers = num_entries_avail;
  183. } else if (num_entries_avail < num_req_buffers) {
  184. num_desc_to_free = num_req_buffers - num_entries_avail;
  185. num_req_buffers = num_entries_avail;
  186. }
  187. if (qdf_unlikely(!num_req_buffers)) {
  188. num_desc_to_free = num_req_buffers;
  189. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  190. goto free_descs;
  191. }
  192. /*
  193. * if desc_list is NULL, allocate the descs from freelist
  194. */
  195. if (!(*desc_list)) {
  196. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  197. rx_desc_pool,
  198. num_req_buffers,
  199. desc_list,
  200. tail);
  201. if (!num_alloc_desc) {
  202. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  203. "no free rx_descs in freelist");
  204. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  205. num_req_buffers);
  206. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  207. return QDF_STATUS_E_NOMEM;
  208. }
  209. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  210. "%d rx desc allocated", num_alloc_desc);
  211. num_req_buffers = num_alloc_desc;
  212. }
  213. count = 0;
  214. while (count < num_req_buffers) {
  215. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  216. buf_size,
  217. RX_BUFFER_RESERVATION,
  218. buf_alignment,
  219. FALSE);
  220. if (qdf_unlikely(!rx_netbuf)) {
  221. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  222. break;
  223. }
  224. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev, rx_netbuf,
  225. QDF_DMA_FROM_DEVICE, buf_size);
  226. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  227. qdf_nbuf_free(rx_netbuf);
  228. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  229. continue;
  230. }
  231. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  232. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf,
  233. buf_size, true);
  234. /*
  235. * check if the physical address of nbuf->data is
  236. * less then 0x50000000 then free the nbuf and try
  237. * allocating new nbuf. We can try for 100 times.
  238. * this is a temp WAR till we fix it properly.
  239. */
  240. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, rx_desc_pool);
  241. if (ret == QDF_STATUS_E_FAILURE) {
  242. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  243. break;
  244. }
  245. count++;
  246. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  247. rxdma_srng);
  248. qdf_assert_always(rxdma_ring_entry);
  249. next = (*desc_list)->next;
  250. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  251. /* rx_desc.in_use should be zero at this time*/
  252. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  253. (*desc_list)->rx_desc.in_use = 1;
  254. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  255. func_name, RX_DESC_REPLENISHED);
  256. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  257. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  258. (unsigned long long)paddr,
  259. (*desc_list)->rx_desc.cookie);
  260. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  261. (*desc_list)->rx_desc.cookie,
  262. rx_desc_pool->owner);
  263. *desc_list = next;
  264. }
  265. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  266. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  267. count, num_desc_to_free);
  268. /* No need to count the number of bytes received during replenish.
  269. * Therefore set replenish.pkts.bytes as 0.
  270. */
  271. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  272. free_descs:
  273. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  274. /*
  275. * add any available free desc back to the free list
  276. */
  277. if (*desc_list)
  278. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  279. mac_id, rx_desc_pool);
  280. return QDF_STATUS_SUCCESS;
  281. }
  282. /*
  283. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  284. * pkts to RAW mode simulation to
  285. * decapsulate the pkt.
  286. *
  287. * @vdev: vdev on which RAW mode is enabled
  288. * @nbuf_list: list of RAW pkts to process
  289. * @peer: peer object from which the pkt is rx
  290. *
  291. * Return: void
  292. */
  293. void
  294. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  295. struct dp_peer *peer)
  296. {
  297. qdf_nbuf_t deliver_list_head = NULL;
  298. qdf_nbuf_t deliver_list_tail = NULL;
  299. qdf_nbuf_t nbuf;
  300. nbuf = nbuf_list;
  301. while (nbuf) {
  302. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  303. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  304. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  305. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  306. /*
  307. * reset the chfrag_start and chfrag_end bits in nbuf cb
  308. * as this is a non-amsdu pkt and RAW mode simulation expects
  309. * these bit s to be 0 for non-amsdu pkt.
  310. */
  311. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  312. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  313. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  314. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  315. }
  316. nbuf = next;
  317. }
  318. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  319. &deliver_list_tail, peer->mac_addr.raw);
  320. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  321. }
  322. #ifdef DP_LFR
  323. /*
  324. * In case of LFR, data of a new peer might be sent up
  325. * even before peer is added.
  326. */
  327. static inline struct dp_vdev *
  328. dp_get_vdev_from_peer(struct dp_soc *soc,
  329. uint16_t peer_id,
  330. struct dp_peer *peer,
  331. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  332. {
  333. struct dp_vdev *vdev;
  334. uint8_t vdev_id;
  335. if (unlikely(!peer)) {
  336. if (peer_id != HTT_INVALID_PEER) {
  337. vdev_id = DP_PEER_METADATA_VDEV_ID_GET(
  338. mpdu_desc_info.peer_meta_data);
  339. QDF_TRACE(QDF_MODULE_ID_DP,
  340. QDF_TRACE_LEVEL_DEBUG,
  341. FL("PeerID %d not found use vdevID %d"),
  342. peer_id, vdev_id);
  343. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  344. vdev_id);
  345. } else {
  346. QDF_TRACE(QDF_MODULE_ID_DP,
  347. QDF_TRACE_LEVEL_DEBUG,
  348. FL("Invalid PeerID %d"),
  349. peer_id);
  350. return NULL;
  351. }
  352. } else {
  353. vdev = peer->vdev;
  354. }
  355. return vdev;
  356. }
  357. #else
  358. static inline struct dp_vdev *
  359. dp_get_vdev_from_peer(struct dp_soc *soc,
  360. uint16_t peer_id,
  361. struct dp_peer *peer,
  362. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  363. {
  364. if (unlikely(!peer)) {
  365. QDF_TRACE(QDF_MODULE_ID_DP,
  366. QDF_TRACE_LEVEL_DEBUG,
  367. FL("Peer not found for peerID %d"),
  368. peer_id);
  369. return NULL;
  370. } else {
  371. return peer->vdev;
  372. }
  373. }
  374. #endif
  375. #ifndef FEATURE_WDS
  376. static void
  377. dp_rx_da_learn(struct dp_soc *soc,
  378. uint8_t *rx_tlv_hdr,
  379. struct dp_peer *ta_peer,
  380. qdf_nbuf_t nbuf)
  381. {
  382. }
  383. #endif
  384. /*
  385. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  386. *
  387. * @soc: core txrx main context
  388. * @ta_peer : source peer entry
  389. * @rx_tlv_hdr : start address of rx tlvs
  390. * @nbuf : nbuf that has to be intrabss forwarded
  391. *
  392. * Return: bool: true if it is forwarded else false
  393. */
  394. static bool
  395. dp_rx_intrabss_fwd(struct dp_soc *soc,
  396. struct dp_peer *ta_peer,
  397. uint8_t *rx_tlv_hdr,
  398. qdf_nbuf_t nbuf,
  399. struct hal_rx_msdu_metadata msdu_metadata)
  400. {
  401. uint16_t len;
  402. uint8_t is_frag;
  403. struct dp_peer *da_peer;
  404. struct dp_ast_entry *ast_entry;
  405. qdf_nbuf_t nbuf_copy;
  406. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  407. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  408. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  409. tid_stats.tid_rx_stats[ring_id][tid];
  410. /* check if the destination peer is available in peer table
  411. * and also check if the source peer and destination peer
  412. * belong to the same vap and destination peer is not bss peer.
  413. */
  414. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  415. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  416. if (!ast_entry)
  417. return false;
  418. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  419. ast_entry->is_active = TRUE;
  420. return false;
  421. }
  422. da_peer = ast_entry->peer;
  423. if (!da_peer)
  424. return false;
  425. /* TA peer cannot be same as peer(DA) on which AST is present
  426. * this indicates a change in topology and that AST entries
  427. * are yet to be updated.
  428. */
  429. if (da_peer == ta_peer)
  430. return false;
  431. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  432. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  433. is_frag = qdf_nbuf_is_frag(nbuf);
  434. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  435. /* If the source or destination peer in the isolation
  436. * list then dont forward instead push to bridge stack.
  437. */
  438. if (dp_get_peer_isolation(ta_peer) ||
  439. dp_get_peer_isolation(da_peer))
  440. return false;
  441. /* linearize the nbuf just before we send to
  442. * dp_tx_send()
  443. */
  444. if (qdf_unlikely(is_frag)) {
  445. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  446. return false;
  447. nbuf = qdf_nbuf_unshare(nbuf);
  448. if (!nbuf) {
  449. DP_STATS_INC_PKT(ta_peer,
  450. rx.intra_bss.fail,
  451. 1,
  452. len);
  453. /* return true even though the pkt is
  454. * not forwarded. Basically skb_unshare
  455. * failed and we want to continue with
  456. * next nbuf.
  457. */
  458. tid_stats->fail_cnt[INTRABSS_DROP]++;
  459. return true;
  460. }
  461. }
  462. if (!dp_tx_send((struct cdp_soc_t *)soc,
  463. ta_peer->vdev->vdev_id, nbuf)) {
  464. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  465. len);
  466. return true;
  467. } else {
  468. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  469. len);
  470. tid_stats->fail_cnt[INTRABSS_DROP]++;
  471. return false;
  472. }
  473. }
  474. }
  475. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  476. * source, then clone the pkt and send the cloned pkt for
  477. * intra BSS forwarding and original pkt up the network stack
  478. * Note: how do we handle multicast pkts. do we forward
  479. * all multicast pkts as is or let a higher layer module
  480. * like igmpsnoop decide whether to forward or not with
  481. * Mcast enhancement.
  482. */
  483. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  484. !ta_peer->bss_peer))) {
  485. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  486. goto end;
  487. /* If the source peer in the isolation list
  488. * then dont forward instead push to bridge stack
  489. */
  490. if (dp_get_peer_isolation(ta_peer))
  491. goto end;
  492. nbuf_copy = qdf_nbuf_copy(nbuf);
  493. if (!nbuf_copy)
  494. goto end;
  495. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  496. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  497. /* Set cb->ftype to intrabss FWD */
  498. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  499. if (dp_tx_send((struct cdp_soc_t *)soc,
  500. ta_peer->vdev->vdev_id, nbuf_copy)) {
  501. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  502. tid_stats->fail_cnt[INTRABSS_DROP]++;
  503. qdf_nbuf_free(nbuf_copy);
  504. } else {
  505. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  506. tid_stats->intrabss_cnt++;
  507. }
  508. }
  509. end:
  510. /* return false as we have to still send the original pkt
  511. * up the stack
  512. */
  513. return false;
  514. }
  515. #ifdef MESH_MODE_SUPPORT
  516. /**
  517. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  518. *
  519. * @vdev: DP Virtual device handle
  520. * @nbuf: Buffer pointer
  521. * @rx_tlv_hdr: start of rx tlv header
  522. * @peer: pointer to peer
  523. *
  524. * This function allocated memory for mesh receive stats and fill the
  525. * required stats. Stores the memory address in skb cb.
  526. *
  527. * Return: void
  528. */
  529. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  530. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  531. {
  532. struct mesh_recv_hdr_s *rx_info = NULL;
  533. uint32_t pkt_type;
  534. uint32_t nss;
  535. uint32_t rate_mcs;
  536. uint32_t bw;
  537. uint8_t primary_chan_num;
  538. uint32_t center_chan_freq;
  539. struct dp_soc *soc;
  540. /* fill recv mesh stats */
  541. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  542. /* upper layers are resposible to free this memory */
  543. if (!rx_info) {
  544. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  545. "Memory allocation failed for mesh rx stats");
  546. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  547. return;
  548. }
  549. rx_info->rs_flags = MESH_RXHDR_VER1;
  550. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  551. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  552. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  553. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  554. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  555. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  556. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  557. if (vdev->osif_get_key)
  558. vdev->osif_get_key(vdev->osif_vdev,
  559. &rx_info->rs_decryptkey[0],
  560. &peer->mac_addr.raw[0],
  561. rx_info->rs_keyix);
  562. }
  563. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  564. soc = vdev->pdev->soc;
  565. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  566. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  567. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  568. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  569. soc->ctrl_psoc,
  570. vdev->pdev->pdev_id,
  571. center_chan_freq);
  572. }
  573. rx_info->rs_channel = primary_chan_num;
  574. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  575. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  576. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  577. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  578. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  579. (bw << 24);
  580. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  581. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  582. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  583. rx_info->rs_flags,
  584. rx_info->rs_rssi,
  585. rx_info->rs_channel,
  586. rx_info->rs_ratephy1,
  587. rx_info->rs_keyix);
  588. }
  589. /**
  590. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  591. *
  592. * @vdev: DP Virtual device handle
  593. * @nbuf: Buffer pointer
  594. * @rx_tlv_hdr: start of rx tlv header
  595. *
  596. * This checks if the received packet is matching any filter out
  597. * catogery and and drop the packet if it matches.
  598. *
  599. * Return: status(0 indicates drop, 1 indicate to no drop)
  600. */
  601. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  602. uint8_t *rx_tlv_hdr)
  603. {
  604. union dp_align_mac_addr mac_addr;
  605. struct dp_soc *soc = vdev->pdev->soc;
  606. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  607. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  608. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  609. rx_tlv_hdr))
  610. return QDF_STATUS_SUCCESS;
  611. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  612. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  613. rx_tlv_hdr))
  614. return QDF_STATUS_SUCCESS;
  615. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  616. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  617. rx_tlv_hdr) &&
  618. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  619. rx_tlv_hdr))
  620. return QDF_STATUS_SUCCESS;
  621. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  622. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  623. rx_tlv_hdr,
  624. &mac_addr.raw[0]))
  625. return QDF_STATUS_E_FAILURE;
  626. if (!qdf_mem_cmp(&mac_addr.raw[0],
  627. &vdev->mac_addr.raw[0],
  628. QDF_MAC_ADDR_SIZE))
  629. return QDF_STATUS_SUCCESS;
  630. }
  631. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  632. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  633. rx_tlv_hdr,
  634. &mac_addr.raw[0]))
  635. return QDF_STATUS_E_FAILURE;
  636. if (!qdf_mem_cmp(&mac_addr.raw[0],
  637. &vdev->mac_addr.raw[0],
  638. QDF_MAC_ADDR_SIZE))
  639. return QDF_STATUS_SUCCESS;
  640. }
  641. }
  642. return QDF_STATUS_E_FAILURE;
  643. }
  644. #else
  645. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  646. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  647. {
  648. }
  649. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  650. uint8_t *rx_tlv_hdr)
  651. {
  652. return QDF_STATUS_E_FAILURE;
  653. }
  654. #endif
  655. #ifdef FEATURE_NAC_RSSI
  656. /**
  657. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  658. * clients
  659. * @pdev: DP pdev handle
  660. * @rx_pkt_hdr: Rx packet Header
  661. *
  662. * return: dp_vdev*
  663. */
  664. static
  665. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  666. uint8_t *rx_pkt_hdr)
  667. {
  668. struct ieee80211_frame *wh;
  669. struct dp_neighbour_peer *peer = NULL;
  670. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  671. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  672. return NULL;
  673. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  674. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  675. neighbour_peer_list_elem) {
  676. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  677. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  678. QDF_TRACE(
  679. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  680. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  681. peer->neighbour_peers_macaddr.raw[0],
  682. peer->neighbour_peers_macaddr.raw[1],
  683. peer->neighbour_peers_macaddr.raw[2],
  684. peer->neighbour_peers_macaddr.raw[3],
  685. peer->neighbour_peers_macaddr.raw[4],
  686. peer->neighbour_peers_macaddr.raw[5]);
  687. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  688. return pdev->monitor_vdev;
  689. }
  690. }
  691. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  692. return NULL;
  693. }
  694. /**
  695. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  696. * @soc: DP SOC handle
  697. * @mpdu: mpdu for which peer is invalid
  698. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  699. * pool_id has same mapping)
  700. *
  701. * return: integer type
  702. */
  703. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  704. uint8_t mac_id)
  705. {
  706. struct dp_invalid_peer_msg msg;
  707. struct dp_vdev *vdev = NULL;
  708. struct dp_pdev *pdev = NULL;
  709. struct ieee80211_frame *wh;
  710. qdf_nbuf_t curr_nbuf, next_nbuf;
  711. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  712. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  713. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  714. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  715. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  716. "Drop decapped frames");
  717. goto free;
  718. }
  719. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  720. if (!DP_FRAME_IS_DATA(wh)) {
  721. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  722. "NAWDS valid only for data frames");
  723. goto free;
  724. }
  725. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  726. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  727. "Invalid nbuf length");
  728. goto free;
  729. }
  730. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  731. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  732. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  733. "PDEV %s", !pdev ? "not found" : "down");
  734. goto free;
  735. }
  736. if (pdev->filter_neighbour_peers) {
  737. /* Next Hop scenario not yet handle */
  738. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  739. if (vdev) {
  740. dp_rx_mon_deliver(soc, pdev->pdev_id,
  741. pdev->invalid_peer_head_msdu,
  742. pdev->invalid_peer_tail_msdu);
  743. pdev->invalid_peer_head_msdu = NULL;
  744. pdev->invalid_peer_tail_msdu = NULL;
  745. return 0;
  746. }
  747. }
  748. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  749. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  750. QDF_MAC_ADDR_SIZE) == 0) {
  751. goto out;
  752. }
  753. }
  754. if (!vdev) {
  755. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  756. "VDEV not found");
  757. goto free;
  758. }
  759. out:
  760. msg.wh = wh;
  761. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  762. msg.nbuf = mpdu;
  763. msg.vdev_id = vdev->vdev_id;
  764. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  765. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  766. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  767. pdev->pdev_id, &msg);
  768. free:
  769. /* Drop and free packet */
  770. curr_nbuf = mpdu;
  771. while (curr_nbuf) {
  772. next_nbuf = qdf_nbuf_next(curr_nbuf);
  773. qdf_nbuf_free(curr_nbuf);
  774. curr_nbuf = next_nbuf;
  775. }
  776. return 0;
  777. }
  778. /**
  779. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  780. * @soc: DP SOC handle
  781. * @mpdu: mpdu for which peer is invalid
  782. * @mpdu_done: if an mpdu is completed
  783. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  784. * pool_id has same mapping)
  785. *
  786. * return: integer type
  787. */
  788. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  789. qdf_nbuf_t mpdu, bool mpdu_done,
  790. uint8_t mac_id)
  791. {
  792. /* Only trigger the process when mpdu is completed */
  793. if (mpdu_done)
  794. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  795. }
  796. #else
  797. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  798. uint8_t mac_id)
  799. {
  800. qdf_nbuf_t curr_nbuf, next_nbuf;
  801. struct dp_pdev *pdev;
  802. struct dp_vdev *vdev = NULL;
  803. struct ieee80211_frame *wh;
  804. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  805. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  806. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  807. if (!DP_FRAME_IS_DATA(wh)) {
  808. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  809. "only for data frames");
  810. goto free;
  811. }
  812. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  814. "Invalid nbuf length");
  815. goto free;
  816. }
  817. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  818. if (!pdev) {
  819. QDF_TRACE(QDF_MODULE_ID_DP,
  820. QDF_TRACE_LEVEL_ERROR,
  821. "PDEV not found");
  822. goto free;
  823. }
  824. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  825. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  826. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  827. QDF_MAC_ADDR_SIZE) == 0) {
  828. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  829. goto out;
  830. }
  831. }
  832. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  833. if (!vdev) {
  834. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  835. "VDEV not found");
  836. goto free;
  837. }
  838. out:
  839. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  840. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  841. free:
  842. /* reset the head and tail pointers */
  843. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  844. if (pdev) {
  845. pdev->invalid_peer_head_msdu = NULL;
  846. pdev->invalid_peer_tail_msdu = NULL;
  847. }
  848. /* Drop and free packet */
  849. curr_nbuf = mpdu;
  850. while (curr_nbuf) {
  851. next_nbuf = qdf_nbuf_next(curr_nbuf);
  852. qdf_nbuf_free(curr_nbuf);
  853. curr_nbuf = next_nbuf;
  854. }
  855. /* Reset the head and tail pointers */
  856. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  857. if (pdev) {
  858. pdev->invalid_peer_head_msdu = NULL;
  859. pdev->invalid_peer_tail_msdu = NULL;
  860. }
  861. return 0;
  862. }
  863. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  864. qdf_nbuf_t mpdu, bool mpdu_done,
  865. uint8_t mac_id)
  866. {
  867. /* Process the nbuf */
  868. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  869. }
  870. #endif
  871. #ifdef RECEIVE_OFFLOAD
  872. /**
  873. * dp_rx_print_offload_info() - Print offload info from RX TLV
  874. * @soc: dp soc handle
  875. * @rx_tlv: RX TLV for which offload information is to be printed
  876. *
  877. * Return: None
  878. */
  879. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  880. {
  881. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  882. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  883. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  884. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  885. rx_tlv));
  886. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  887. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  888. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  889. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  890. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  891. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  892. dp_verbose_debug("---------------------------------------------------------");
  893. }
  894. /**
  895. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  896. * @soc: DP SOC handle
  897. * @rx_tlv: RX TLV received for the msdu
  898. * @msdu: msdu for which GRO info needs to be filled
  899. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  900. *
  901. * Return: None
  902. */
  903. static
  904. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  905. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  906. {
  907. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  908. return;
  909. /* Filling up RX offload info only for TCP packets */
  910. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  911. return;
  912. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  913. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  914. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  915. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  916. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  917. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  918. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  919. rx_tlv);
  920. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  921. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  922. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  923. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  924. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  925. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  926. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  927. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  928. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  929. HAL_RX_TLV_GET_IPV6(rx_tlv);
  930. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  931. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  932. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  933. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  934. dp_rx_print_offload_info(soc, rx_tlv);
  935. }
  936. #else
  937. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  938. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  939. {
  940. }
  941. #endif /* RECEIVE_OFFLOAD */
  942. /**
  943. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  944. *
  945. * @nbuf: pointer to msdu.
  946. * @mpdu_len: mpdu length
  947. *
  948. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  949. */
  950. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  951. {
  952. bool last_nbuf;
  953. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  954. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  955. last_nbuf = false;
  956. } else {
  957. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  958. last_nbuf = true;
  959. }
  960. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  961. return last_nbuf;
  962. }
  963. /**
  964. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  965. * multiple nbufs.
  966. * @nbuf: pointer to the first msdu of an amsdu.
  967. *
  968. * This function implements the creation of RX frag_list for cases
  969. * where an MSDU is spread across multiple nbufs.
  970. *
  971. * Return: returns the head nbuf which contains complete frag_list.
  972. */
  973. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf)
  974. {
  975. qdf_nbuf_t parent, frag_list, next = NULL;
  976. uint16_t frag_list_len = 0;
  977. uint16_t mpdu_len;
  978. bool last_nbuf;
  979. /*
  980. * Use msdu len got from REO entry descriptor instead since
  981. * there is case the RX PKT TLV is corrupted while msdu_len
  982. * from REO descriptor is right for non-raw RX scatter msdu.
  983. */
  984. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  985. /*
  986. * this is a case where the complete msdu fits in one single nbuf.
  987. * in this case HW sets both start and end bit and we only need to
  988. * reset these bits for RAW mode simulator to decap the pkt
  989. */
  990. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  991. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  992. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  993. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  994. return nbuf;
  995. }
  996. /*
  997. * This is a case where we have multiple msdus (A-MSDU) spread across
  998. * multiple nbufs. here we create a fraglist out of these nbufs.
  999. *
  1000. * the moment we encounter a nbuf with continuation bit set we
  1001. * know for sure we have an MSDU which is spread across multiple
  1002. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1003. */
  1004. parent = nbuf;
  1005. frag_list = nbuf->next;
  1006. nbuf = nbuf->next;
  1007. /*
  1008. * set the start bit in the first nbuf we encounter with continuation
  1009. * bit set. This has the proper mpdu length set as it is the first
  1010. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1011. * nbufs will form the frag_list of the parent nbuf.
  1012. */
  1013. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1014. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  1015. /*
  1016. * this is where we set the length of the fragments which are
  1017. * associated to the parent nbuf. We iterate through the frag_list
  1018. * till we hit the last_nbuf of the list.
  1019. */
  1020. do {
  1021. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  1022. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1023. frag_list_len += qdf_nbuf_len(nbuf);
  1024. if (last_nbuf) {
  1025. next = nbuf->next;
  1026. nbuf->next = NULL;
  1027. break;
  1028. }
  1029. nbuf = nbuf->next;
  1030. } while (!last_nbuf);
  1031. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1032. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1033. parent->next = next;
  1034. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1035. return parent;
  1036. }
  1037. #ifdef QCA_PEER_EXT_STATS
  1038. /*
  1039. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1040. * @peer: DP soc context
  1041. * @nbuf: NBuffer
  1042. *
  1043. * Return: Void
  1044. */
  1045. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1046. qdf_nbuf_t nbuf)
  1047. {
  1048. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1049. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1050. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1051. }
  1052. #endif /* QCA_PEER_EXT_STATS */
  1053. /**
  1054. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1055. * to pass in correct fields
  1056. *
  1057. * @vdev: pdev handle
  1058. * @tx_desc: tx descriptor
  1059. * @tid: tid value
  1060. * Return: none
  1061. */
  1062. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1063. {
  1064. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1065. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1066. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1067. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1068. uint32_t interframe_delay =
  1069. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1070. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1071. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1072. /*
  1073. * Update interframe delay stats calculated at deliver_data_ol point.
  1074. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1075. * interframe delay will not be calculate correctly for 1st frame.
  1076. * On the other side, this will help in avoiding extra per packet check
  1077. * of vdev->prev_rx_deliver_tstamp.
  1078. */
  1079. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1080. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1081. vdev->prev_rx_deliver_tstamp = current_ts;
  1082. }
  1083. /**
  1084. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1085. * @pdev: dp pdev reference
  1086. * @buf_list: buffer list to be dropepd
  1087. *
  1088. * Return: int (number of bufs dropped)
  1089. */
  1090. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1091. qdf_nbuf_t buf_list)
  1092. {
  1093. struct cdp_tid_rx_stats *stats = NULL;
  1094. uint8_t tid = 0, ring_id = 0;
  1095. int num_dropped = 0;
  1096. qdf_nbuf_t buf, next_buf;
  1097. buf = buf_list;
  1098. while (buf) {
  1099. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1100. next_buf = qdf_nbuf_queue_next(buf);
  1101. tid = qdf_nbuf_get_tid_val(buf);
  1102. if (qdf_likely(pdev)) {
  1103. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1104. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1105. stats->delivered_to_stack--;
  1106. }
  1107. qdf_nbuf_free(buf);
  1108. buf = next_buf;
  1109. num_dropped++;
  1110. }
  1111. return num_dropped;
  1112. }
  1113. #ifdef PEER_CACHE_RX_PKTS
  1114. /**
  1115. * dp_rx_flush_rx_cached() - flush cached rx frames
  1116. * @peer: peer
  1117. * @drop: flag to drop frames or forward to net stack
  1118. *
  1119. * Return: None
  1120. */
  1121. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1122. {
  1123. struct dp_peer_cached_bufq *bufqi;
  1124. struct dp_rx_cached_buf *cache_buf = NULL;
  1125. ol_txrx_rx_fp data_rx = NULL;
  1126. int num_buff_elem;
  1127. QDF_STATUS status;
  1128. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1129. qdf_atomic_dec(&peer->flush_in_progress);
  1130. return;
  1131. }
  1132. qdf_spin_lock_bh(&peer->peer_info_lock);
  1133. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1134. data_rx = peer->vdev->osif_rx;
  1135. else
  1136. drop = true;
  1137. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1138. bufqi = &peer->bufq_info;
  1139. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1140. qdf_list_remove_front(&bufqi->cached_bufq,
  1141. (qdf_list_node_t **)&cache_buf);
  1142. while (cache_buf) {
  1143. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1144. cache_buf->buf);
  1145. bufqi->entries -= num_buff_elem;
  1146. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1147. if (drop) {
  1148. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1149. cache_buf->buf);
  1150. } else {
  1151. /* Flush the cached frames to OSIF DEV */
  1152. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1153. if (status != QDF_STATUS_SUCCESS)
  1154. bufqi->dropped = dp_rx_drop_nbuf_list(
  1155. peer->vdev->pdev,
  1156. cache_buf->buf);
  1157. }
  1158. qdf_mem_free(cache_buf);
  1159. cache_buf = NULL;
  1160. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1161. qdf_list_remove_front(&bufqi->cached_bufq,
  1162. (qdf_list_node_t **)&cache_buf);
  1163. }
  1164. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1165. qdf_atomic_dec(&peer->flush_in_progress);
  1166. }
  1167. /**
  1168. * dp_rx_enqueue_rx() - cache rx frames
  1169. * @peer: peer
  1170. * @rx_buf_list: cache buffer list
  1171. *
  1172. * Return: None
  1173. */
  1174. static QDF_STATUS
  1175. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1176. {
  1177. struct dp_rx_cached_buf *cache_buf;
  1178. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1179. int num_buff_elem;
  1180. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1181. bufqi->dropped);
  1182. if (!peer->valid) {
  1183. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1184. rx_buf_list);
  1185. return QDF_STATUS_E_INVAL;
  1186. }
  1187. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1188. if (bufqi->entries >= bufqi->thresh) {
  1189. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1190. rx_buf_list);
  1191. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1192. return QDF_STATUS_E_RESOURCES;
  1193. }
  1194. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1195. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1196. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1197. if (!cache_buf) {
  1198. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1199. "Failed to allocate buf to cache rx frames");
  1200. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1201. rx_buf_list);
  1202. return QDF_STATUS_E_NOMEM;
  1203. }
  1204. cache_buf->buf = rx_buf_list;
  1205. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1206. qdf_list_insert_back(&bufqi->cached_bufq,
  1207. &cache_buf->node);
  1208. bufqi->entries += num_buff_elem;
  1209. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1210. return QDF_STATUS_SUCCESS;
  1211. }
  1212. static inline
  1213. bool dp_rx_is_peer_cache_bufq_supported(void)
  1214. {
  1215. return true;
  1216. }
  1217. #else
  1218. static inline
  1219. bool dp_rx_is_peer_cache_bufq_supported(void)
  1220. {
  1221. return false;
  1222. }
  1223. static inline QDF_STATUS
  1224. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1225. {
  1226. return QDF_STATUS_SUCCESS;
  1227. }
  1228. #endif
  1229. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1230. /**
  1231. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1232. * using the appropriate call back functions.
  1233. * @soc: soc
  1234. * @vdev: vdev
  1235. * @peer: peer
  1236. * @nbuf_head: skb list head
  1237. * @nbuf_tail: skb list tail
  1238. *
  1239. * Return: None
  1240. */
  1241. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1242. struct dp_vdev *vdev,
  1243. struct dp_peer *peer,
  1244. qdf_nbuf_t nbuf_head)
  1245. {
  1246. /* Function pointer initialized only when FISA is enabled */
  1247. if (vdev->osif_fisa_rx)
  1248. /* on failure send it via regular path */
  1249. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1250. else
  1251. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1252. }
  1253. #else
  1254. /**
  1255. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1256. * using the appropriate call back functions.
  1257. * @soc: soc
  1258. * @vdev: vdev
  1259. * @peer: peer
  1260. * @nbuf_head: skb list head
  1261. * @nbuf_tail: skb list tail
  1262. *
  1263. * Check the return status of the call back function and drop
  1264. * the packets if the return status indicates a failure.
  1265. *
  1266. * Return: None
  1267. */
  1268. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1269. struct dp_vdev *vdev,
  1270. struct dp_peer *peer,
  1271. qdf_nbuf_t nbuf_head)
  1272. {
  1273. int num_nbuf = 0;
  1274. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1275. /* Function pointer initialized only when FISA is enabled */
  1276. if (vdev->osif_fisa_rx)
  1277. /* on failure send it via regular path */
  1278. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1279. else if (vdev->osif_rx)
  1280. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1281. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1282. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1283. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1284. if (peer)
  1285. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1286. }
  1287. }
  1288. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1289. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1290. struct dp_vdev *vdev,
  1291. struct dp_peer *peer,
  1292. qdf_nbuf_t nbuf_head,
  1293. qdf_nbuf_t nbuf_tail)
  1294. {
  1295. int num_nbuf = 0;
  1296. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1297. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1298. /*
  1299. * This is a special case where vdev is invalid,
  1300. * so we cannot know the pdev to which this packet
  1301. * belonged. Hence we update the soc rx error stats.
  1302. */
  1303. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1304. return;
  1305. }
  1306. /*
  1307. * highly unlikely to have a vdev without a registered rx
  1308. * callback function. if so let us free the nbuf_list.
  1309. */
  1310. if (qdf_unlikely(!vdev->osif_rx)) {
  1311. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1312. dp_rx_enqueue_rx(peer, nbuf_head);
  1313. } else {
  1314. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1315. nbuf_head);
  1316. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1317. }
  1318. return;
  1319. }
  1320. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1321. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1322. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1323. &nbuf_tail, peer->mac_addr.raw);
  1324. }
  1325. dp_rx_check_delivery_to_stack(soc, vdev, peer, nbuf_head);
  1326. }
  1327. /**
  1328. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1329. * @nbuf: pointer to the first msdu of an amsdu.
  1330. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1331. *
  1332. * The ipsumed field of the skb is set based on whether HW validated the
  1333. * IP/TCP/UDP checksum.
  1334. *
  1335. * Return: void
  1336. */
  1337. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1338. qdf_nbuf_t nbuf,
  1339. uint8_t *rx_tlv_hdr)
  1340. {
  1341. qdf_nbuf_rx_cksum_t cksum = {0};
  1342. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1343. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1344. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1345. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1346. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1347. } else {
  1348. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1349. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1350. }
  1351. }
  1352. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1353. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1354. { \
  1355. qdf_nbuf_t nbuf_local; \
  1356. struct dp_peer *peer_local; \
  1357. struct dp_vdev *vdev_local = vdev_hdl; \
  1358. do { \
  1359. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1360. break; \
  1361. nbuf_local = nbuf; \
  1362. peer_local = peer; \
  1363. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1364. break; \
  1365. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1366. break; \
  1367. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1368. (nbuf_local), \
  1369. (peer_local), 0, 1); \
  1370. } while (0); \
  1371. }
  1372. #else
  1373. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1374. #endif
  1375. /**
  1376. * dp_rx_msdu_stats_update() - update per msdu stats.
  1377. * @soc: core txrx main context
  1378. * @nbuf: pointer to the first msdu of an amsdu.
  1379. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1380. * @peer: pointer to the peer object.
  1381. * @ring_id: reo dest ring number on which pkt is reaped.
  1382. * @tid_stats: per tid rx stats.
  1383. *
  1384. * update all the per msdu stats for that nbuf.
  1385. * Return: void
  1386. */
  1387. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1388. qdf_nbuf_t nbuf,
  1389. uint8_t *rx_tlv_hdr,
  1390. struct dp_peer *peer,
  1391. uint8_t ring_id,
  1392. struct cdp_tid_rx_stats *tid_stats)
  1393. {
  1394. bool is_ampdu, is_not_amsdu;
  1395. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1396. struct dp_vdev *vdev = peer->vdev;
  1397. qdf_ether_header_t *eh;
  1398. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1399. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1400. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1401. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1402. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1403. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1404. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1405. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1406. tid_stats->msdu_cnt++;
  1407. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1408. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1409. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1410. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1411. tid_stats->mcast_msdu_cnt++;
  1412. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1413. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1414. tid_stats->bcast_msdu_cnt++;
  1415. }
  1416. }
  1417. /*
  1418. * currently we can return from here as we have similar stats
  1419. * updated at per ppdu level instead of msdu level
  1420. */
  1421. if (!soc->process_rx_status)
  1422. return;
  1423. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1424. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1425. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1426. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1427. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1428. tid = qdf_nbuf_get_tid_val(nbuf);
  1429. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1430. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1431. rx_tlv_hdr);
  1432. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1433. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1434. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1435. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1436. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1437. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1438. DP_STATS_INC(peer, rx.bw[bw], 1);
  1439. /*
  1440. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1441. * then increase index [nss - 1] in array counter.
  1442. */
  1443. if (nss > 0 && (pkt_type == DOT11_N ||
  1444. pkt_type == DOT11_AC ||
  1445. pkt_type == DOT11_AX))
  1446. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1447. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1448. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1449. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1450. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1451. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1452. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1453. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1454. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1455. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1456. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1457. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1458. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1459. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1460. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1461. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1462. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1463. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1464. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1465. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1466. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1467. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1468. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1469. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1470. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1471. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1472. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1473. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1474. if ((soc->process_rx_status) &&
  1475. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1476. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1477. if (!vdev->pdev)
  1478. return;
  1479. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1480. &peer->stats, peer->peer_id,
  1481. UPDATE_PEER_STATS,
  1482. vdev->pdev->pdev_id);
  1483. #endif
  1484. }
  1485. }
  1486. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1487. uint8_t *rx_tlv_hdr,
  1488. qdf_nbuf_t nbuf,
  1489. struct hal_rx_msdu_metadata msdu_info)
  1490. {
  1491. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1492. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1493. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1494. qdf_nbuf_is_da_valid(nbuf) &&
  1495. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1496. return false;
  1497. return true;
  1498. }
  1499. #ifndef WDS_VENDOR_EXTENSION
  1500. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1501. struct dp_vdev *vdev,
  1502. struct dp_peer *peer)
  1503. {
  1504. return 1;
  1505. }
  1506. #endif
  1507. #ifdef RX_DESC_DEBUG_CHECK
  1508. /**
  1509. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1510. * corruption
  1511. *
  1512. * @ring_desc: REO ring descriptor
  1513. * @rx_desc: Rx descriptor
  1514. *
  1515. * Return: NONE
  1516. */
  1517. static inline
  1518. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1519. struct dp_rx_desc *rx_desc)
  1520. {
  1521. struct hal_buf_info hbi;
  1522. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1523. /* Sanity check for possible buffer paddr corruption */
  1524. qdf_assert_always((&hbi)->paddr ==
  1525. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1526. }
  1527. #else
  1528. static inline
  1529. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1530. struct dp_rx_desc *rx_desc)
  1531. {
  1532. }
  1533. #endif
  1534. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1535. static inline
  1536. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1537. {
  1538. bool limit_hit = false;
  1539. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1540. limit_hit =
  1541. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1542. if (limit_hit)
  1543. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1544. return limit_hit;
  1545. }
  1546. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1547. {
  1548. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1549. }
  1550. #else
  1551. static inline
  1552. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1553. {
  1554. return false;
  1555. }
  1556. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1557. {
  1558. return false;
  1559. }
  1560. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1561. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1562. /**
  1563. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1564. * no corresbonding peer found
  1565. * @soc: core txrx main context
  1566. * @nbuf: pkt skb pointer
  1567. *
  1568. * This function will try to deliver some RX special frames to stack
  1569. * even there is no peer matched found. for instance, LFR case, some
  1570. * eapol data will be sent to host before peer_map done.
  1571. *
  1572. * Return: None
  1573. */
  1574. static
  1575. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1576. {
  1577. uint16_t peer_id;
  1578. uint8_t vdev_id;
  1579. struct dp_vdev *vdev;
  1580. uint32_t l2_hdr_offset = 0;
  1581. uint16_t msdu_len = 0;
  1582. uint32_t pkt_len = 0;
  1583. uint8_t *rx_tlv_hdr;
  1584. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1585. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1586. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1587. if (peer_id > soc->max_peers)
  1588. goto deliver_fail;
  1589. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1590. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1591. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1592. goto deliver_fail;
  1593. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1594. goto deliver_fail;
  1595. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1596. l2_hdr_offset =
  1597. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1598. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1599. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1600. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1601. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1602. qdf_nbuf_pull_head(nbuf,
  1603. RX_PKT_TLVS_LEN +
  1604. l2_hdr_offset);
  1605. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1606. qdf_nbuf_set_exc_frame(nbuf, 1);
  1607. if (QDF_STATUS_SUCCESS !=
  1608. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1609. goto deliver_fail;
  1610. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1611. return;
  1612. }
  1613. deliver_fail:
  1614. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1615. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1616. qdf_nbuf_free(nbuf);
  1617. }
  1618. #else
  1619. static inline
  1620. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1621. {
  1622. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1623. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1624. qdf_nbuf_free(nbuf);
  1625. }
  1626. #endif
  1627. /**
  1628. * dp_rx_srng_get_num_pending() - get number of pending entries
  1629. * @hal_soc: hal soc opaque pointer
  1630. * @hal_ring: opaque pointer to the HAL Rx Ring
  1631. * @num_entries: number of entries in the hal_ring.
  1632. * @near_full: pointer to a boolean. This is set if ring is near full.
  1633. *
  1634. * The function returns the number of entries in a destination ring which are
  1635. * yet to be reaped. The function also checks if the ring is near full.
  1636. * If more than half of the ring needs to be reaped, the ring is considered
  1637. * approaching full.
  1638. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1639. * entries. It should not be called within a SRNG lock. HW pointer value is
  1640. * synced into cached_hp.
  1641. *
  1642. * Return: Number of pending entries if any
  1643. */
  1644. static
  1645. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1646. hal_ring_handle_t hal_ring_hdl,
  1647. uint32_t num_entries,
  1648. bool *near_full)
  1649. {
  1650. uint32_t num_pending = 0;
  1651. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1652. hal_ring_hdl,
  1653. true);
  1654. if (num_entries && (num_pending >= num_entries >> 1))
  1655. *near_full = true;
  1656. else
  1657. *near_full = false;
  1658. return num_pending;
  1659. }
  1660. #ifdef WLAN_SUPPORT_RX_FISA
  1661. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1662. {
  1663. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1664. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1665. }
  1666. /**
  1667. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1668. * @nbuf: pkt skb pointer
  1669. * @l3_padding: l3 padding
  1670. *
  1671. * Return: None
  1672. */
  1673. static inline
  1674. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1675. {
  1676. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1677. }
  1678. #else
  1679. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1680. {
  1681. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1682. }
  1683. static inline
  1684. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1685. {
  1686. }
  1687. #endif
  1688. #ifdef DP_RX_DROP_RAW_FRM
  1689. /**
  1690. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  1691. * @nbuf: pkt skb pointer
  1692. *
  1693. * Return: true - raw frame, dropped
  1694. * false - not raw frame, do nothing
  1695. */
  1696. static inline
  1697. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1698. {
  1699. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1700. qdf_nbuf_free(nbuf);
  1701. return true;
  1702. }
  1703. return false;
  1704. }
  1705. #else
  1706. static inline
  1707. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1708. {
  1709. return false;
  1710. }
  1711. #endif
  1712. /**
  1713. * dp_rx_process() - Brain of the Rx processing functionality
  1714. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1715. * @int_ctx: per interrupt context
  1716. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1717. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1718. * @quota: No. of units (packets) that can be serviced in one shot.
  1719. *
  1720. * This function implements the core of Rx functionality. This is
  1721. * expected to handle only non-error frames.
  1722. *
  1723. * Return: uint32_t: No. of elements processed
  1724. */
  1725. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1726. uint8_t reo_ring_num, uint32_t quota)
  1727. {
  1728. hal_ring_desc_t ring_desc;
  1729. hal_soc_handle_t hal_soc;
  1730. struct dp_rx_desc *rx_desc = NULL;
  1731. qdf_nbuf_t nbuf, next;
  1732. bool near_full;
  1733. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1734. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1735. uint32_t num_pending;
  1736. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1737. uint16_t msdu_len = 0;
  1738. uint16_t peer_id;
  1739. uint8_t vdev_id;
  1740. struct dp_peer *peer;
  1741. struct dp_vdev *vdev;
  1742. uint32_t pkt_len = 0;
  1743. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1744. struct hal_rx_msdu_desc_info msdu_desc_info;
  1745. enum hal_reo_error_status error;
  1746. uint32_t peer_mdata;
  1747. uint8_t *rx_tlv_hdr;
  1748. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1749. uint8_t mac_id = 0;
  1750. struct dp_pdev *rx_pdev;
  1751. struct dp_srng *dp_rxdma_srng;
  1752. struct rx_desc_pool *rx_desc_pool;
  1753. struct dp_soc *soc = int_ctx->soc;
  1754. uint8_t ring_id = 0;
  1755. uint8_t core_id = 0;
  1756. struct cdp_tid_rx_stats *tid_stats;
  1757. qdf_nbuf_t nbuf_head;
  1758. qdf_nbuf_t nbuf_tail;
  1759. qdf_nbuf_t deliver_list_head;
  1760. qdf_nbuf_t deliver_list_tail;
  1761. uint32_t num_rx_bufs_reaped = 0;
  1762. uint32_t intr_id;
  1763. struct hif_opaque_softc *scn;
  1764. int32_t tid = 0;
  1765. bool is_prev_msdu_last = true;
  1766. uint32_t num_entries_avail = 0;
  1767. uint32_t rx_ol_pkt_cnt = 0;
  1768. uint32_t num_entries = 0;
  1769. struct hal_rx_msdu_metadata msdu_metadata;
  1770. QDF_STATUS status;
  1771. DP_HIST_INIT();
  1772. qdf_assert_always(soc && hal_ring_hdl);
  1773. hal_soc = soc->hal_soc;
  1774. qdf_assert_always(hal_soc);
  1775. scn = soc->hif_handle;
  1776. hif_pm_runtime_mark_dp_rx_busy(scn);
  1777. intr_id = int_ctx->dp_intr_id;
  1778. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1779. more_data:
  1780. /* reset local variables here to be re-used in the function */
  1781. nbuf_head = NULL;
  1782. nbuf_tail = NULL;
  1783. deliver_list_head = NULL;
  1784. deliver_list_tail = NULL;
  1785. peer = NULL;
  1786. vdev = NULL;
  1787. num_rx_bufs_reaped = 0;
  1788. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1789. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1790. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1791. qdf_mem_zero(head, sizeof(head));
  1792. qdf_mem_zero(tail, sizeof(tail));
  1793. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1794. /*
  1795. * Need API to convert from hal_ring pointer to
  1796. * Ring Type / Ring Id combo
  1797. */
  1798. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1799. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1800. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1801. goto done;
  1802. }
  1803. /*
  1804. * start reaping the buffers from reo ring and queue
  1805. * them in per vdev queue.
  1806. * Process the received pkts in a different per vdev loop.
  1807. */
  1808. while (qdf_likely(quota &&
  1809. (ring_desc = hal_srng_dst_peek(hal_soc,
  1810. hal_ring_hdl)))) {
  1811. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1812. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1813. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1814. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1815. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1816. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1817. /* Don't know how to deal with this -- assert */
  1818. qdf_assert(0);
  1819. }
  1820. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1821. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  1822. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1823. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  1824. break;
  1825. }
  1826. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1827. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  1828. ring_desc, rx_desc);
  1829. if (QDF_IS_STATUS_ERROR(status)) {
  1830. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  1831. qdf_assert_always(rx_desc->unmapped);
  1832. dp_ipa_handle_rx_buf_smmu_mapping(
  1833. soc,
  1834. rx_desc->nbuf,
  1835. RX_DATA_BUFFER_SIZE,
  1836. false);
  1837. qdf_nbuf_unmap_nbytes_single(
  1838. soc->osdev,
  1839. rx_desc->nbuf,
  1840. QDF_DMA_FROM_DEVICE,
  1841. RX_DATA_BUFFER_SIZE);
  1842. rx_desc->unmapped = 1;
  1843. qdf_nbuf_free(rx_desc->nbuf);
  1844. dp_rx_add_to_free_desc_list(
  1845. &head[rx_desc->pool_id],
  1846. &tail[rx_desc->pool_id],
  1847. rx_desc);
  1848. }
  1849. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1850. continue;
  1851. }
  1852. /*
  1853. * this is a unlikely scenario where the host is reaping
  1854. * a descriptor which it already reaped just a while ago
  1855. * but is yet to replenish it back to HW.
  1856. * In this case host will dump the last 128 descriptors
  1857. * including the software descriptor rx_desc and assert.
  1858. */
  1859. if (qdf_unlikely(!rx_desc->in_use)) {
  1860. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1861. dp_info_rl("Reaping rx_desc not in use!");
  1862. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1863. ring_desc, rx_desc);
  1864. /* ignore duplicate RX desc and continue to process */
  1865. /* Pop out the descriptor */
  1866. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1867. continue;
  1868. }
  1869. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1870. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1871. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1872. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1873. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1874. ring_desc, rx_desc);
  1875. }
  1876. /* Get MPDU DESC info */
  1877. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1878. /* Get MSDU DESC info */
  1879. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1880. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  1881. HAL_MSDU_F_MSDU_CONTINUATION)) {
  1882. /* previous msdu has end bit set, so current one is
  1883. * the new MPDU
  1884. */
  1885. if (is_prev_msdu_last) {
  1886. /* Get number of entries available in HW ring */
  1887. num_entries_avail =
  1888. hal_srng_dst_num_valid(hal_soc,
  1889. hal_ring_hdl, 1);
  1890. /* For new MPDU check if we can read complete
  1891. * MPDU by comparing the number of buffers
  1892. * available and number of buffers needed to
  1893. * reap this MPDU
  1894. */
  1895. if (((msdu_desc_info.msdu_len /
  1896. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  1897. 1)) > num_entries_avail) {
  1898. DP_STATS_INC(
  1899. soc,
  1900. rx.msdu_scatter_wait_break,
  1901. 1);
  1902. break;
  1903. }
  1904. is_prev_msdu_last = false;
  1905. }
  1906. }
  1907. core_id = smp_processor_id();
  1908. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1909. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  1910. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  1911. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1912. HAL_MPDU_F_RAW_AMPDU))
  1913. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1914. if (!is_prev_msdu_last &&
  1915. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1916. is_prev_msdu_last = true;
  1917. /* Pop out the descriptor*/
  1918. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1919. rx_bufs_reaped[rx_desc->pool_id]++;
  1920. peer_mdata = mpdu_desc_info.peer_meta_data;
  1921. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1922. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1923. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  1924. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  1925. /*
  1926. * save msdu flags first, last and continuation msdu in
  1927. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1928. * length to nbuf->cb. This ensures the info required for
  1929. * per pkt processing is always in the same cache line.
  1930. * This helps in improving throughput for smaller pkt
  1931. * sizes.
  1932. */
  1933. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1934. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1935. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1936. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1937. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1938. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1939. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1940. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1941. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1942. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1943. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1944. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1945. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1946. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1947. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1948. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1949. /*
  1950. * move unmap after scattered msdu waiting break logic
  1951. * in case double skb unmap happened.
  1952. */
  1953. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1954. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  1955. rx_desc_pool->buf_size,
  1956. false);
  1957. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  1958. QDF_DMA_FROM_DEVICE,
  1959. rx_desc_pool->buf_size);
  1960. rx_desc->unmapped = 1;
  1961. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1962. /*
  1963. * if continuation bit is set then we have MSDU spread
  1964. * across multiple buffers, let us not decrement quota
  1965. * till we reap all buffers of that MSDU.
  1966. */
  1967. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1968. quota -= 1;
  1969. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1970. &tail[rx_desc->pool_id],
  1971. rx_desc);
  1972. num_rx_bufs_reaped++;
  1973. /*
  1974. * only if complete msdu is received for scatter case,
  1975. * then allow break.
  1976. */
  1977. if (is_prev_msdu_last &&
  1978. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1979. break;
  1980. }
  1981. done:
  1982. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1983. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1984. /*
  1985. * continue with next mac_id if no pkts were reaped
  1986. * from that pool
  1987. */
  1988. if (!rx_bufs_reaped[mac_id])
  1989. continue;
  1990. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  1991. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1992. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1993. rx_desc_pool, rx_bufs_reaped[mac_id],
  1994. &head[mac_id], &tail[mac_id]);
  1995. }
  1996. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1997. /* Peer can be NULL is case of LFR */
  1998. if (qdf_likely(peer))
  1999. vdev = NULL;
  2000. /*
  2001. * BIG loop where each nbuf is dequeued from global queue,
  2002. * processed and queued back on a per vdev basis. These nbufs
  2003. * are sent to stack as and when we run out of nbufs
  2004. * or a new nbuf dequeued from global queue has a different
  2005. * vdev when compared to previous nbuf.
  2006. */
  2007. nbuf = nbuf_head;
  2008. while (nbuf) {
  2009. next = nbuf->next;
  2010. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  2011. nbuf = next;
  2012. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  2013. continue;
  2014. }
  2015. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2016. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2017. if (deliver_list_head && vdev && (vdev->vdev_id != vdev_id)) {
  2018. dp_rx_deliver_to_stack(soc, vdev, peer,
  2019. deliver_list_head,
  2020. deliver_list_tail);
  2021. deliver_list_head = NULL;
  2022. deliver_list_tail = NULL;
  2023. }
  2024. /* Get TID from struct cb->tid_val, save to tid */
  2025. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  2026. tid = qdf_nbuf_get_tid_val(nbuf);
  2027. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2028. if (qdf_unlikely(!peer)) {
  2029. peer = dp_peer_find_by_id(soc, peer_id);
  2030. } else if (peer && peer->peer_id != peer_id) {
  2031. dp_peer_unref_del_find_by_id(peer);
  2032. peer = dp_peer_find_by_id(soc, peer_id);
  2033. }
  2034. if (peer) {
  2035. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  2036. qdf_dp_trace_set_track(nbuf, QDF_RX);
  2037. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  2038. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  2039. QDF_NBUF_RX_PKT_DATA_TRACK;
  2040. }
  2041. rx_bufs_used++;
  2042. if (qdf_likely(peer)) {
  2043. vdev = peer->vdev;
  2044. } else {
  2045. nbuf->next = NULL;
  2046. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2047. nbuf = next;
  2048. continue;
  2049. }
  2050. if (qdf_unlikely(!vdev)) {
  2051. qdf_nbuf_free(nbuf);
  2052. nbuf = next;
  2053. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2054. continue;
  2055. }
  2056. rx_pdev = vdev->pdev;
  2057. DP_RX_TID_SAVE(nbuf, tid);
  2058. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  2059. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  2060. soc->wlan_cfg_ctx)))
  2061. qdf_nbuf_set_timestamp(nbuf);
  2062. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  2063. tid_stats =
  2064. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  2065. /*
  2066. * Check if DMA completed -- msdu_done is the last bit
  2067. * to be written
  2068. */
  2069. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  2070. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  2071. dp_err("MSDU DONE failure");
  2072. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  2073. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  2074. QDF_TRACE_LEVEL_INFO);
  2075. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  2076. qdf_nbuf_free(nbuf);
  2077. qdf_assert(0);
  2078. nbuf = next;
  2079. continue;
  2080. }
  2081. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  2082. /*
  2083. * First IF condition:
  2084. * 802.11 Fragmented pkts are reinjected to REO
  2085. * HW block as SG pkts and for these pkts we only
  2086. * need to pull the RX TLVS header length.
  2087. * Second IF condition:
  2088. * The below condition happens when an MSDU is spread
  2089. * across multiple buffers. This can happen in two cases
  2090. * 1. The nbuf size is smaller then the received msdu.
  2091. * ex: we have set the nbuf size to 2048 during
  2092. * nbuf_alloc. but we received an msdu which is
  2093. * 2304 bytes in size then this msdu is spread
  2094. * across 2 nbufs.
  2095. *
  2096. * 2. AMSDUs when RAW mode is enabled.
  2097. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  2098. * across 1st nbuf and 2nd nbuf and last MSDU is
  2099. * spread across 2nd nbuf and 3rd nbuf.
  2100. *
  2101. * for these scenarios let us create a skb frag_list and
  2102. * append these buffers till the last MSDU of the AMSDU
  2103. * Third condition:
  2104. * This is the most likely case, we receive 802.3 pkts
  2105. * decapsulated by HW, here we need to set the pkt length.
  2106. */
  2107. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  2108. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2109. bool is_mcbc, is_sa_vld, is_da_vld;
  2110. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  2111. rx_tlv_hdr);
  2112. is_sa_vld =
  2113. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  2114. rx_tlv_hdr);
  2115. is_da_vld =
  2116. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  2117. rx_tlv_hdr);
  2118. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  2119. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  2120. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  2121. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  2122. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2123. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2124. nbuf = dp_rx_sg_create(nbuf);
  2125. next = nbuf->next;
  2126. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2127. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  2128. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  2129. } else {
  2130. qdf_nbuf_free(nbuf);
  2131. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  2132. dp_info_rl("scatter msdu len %d, dropped",
  2133. msdu_len);
  2134. nbuf = next;
  2135. continue;
  2136. }
  2137. } else {
  2138. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2139. pkt_len = msdu_len +
  2140. msdu_metadata.l3_hdr_pad +
  2141. RX_PKT_TLVS_LEN;
  2142. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2143. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  2144. }
  2145. /*
  2146. * process frame for mulitpass phrase processing
  2147. */
  2148. if (qdf_unlikely(vdev->multipass_en)) {
  2149. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  2150. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  2151. qdf_nbuf_free(nbuf);
  2152. nbuf = next;
  2153. continue;
  2154. }
  2155. }
  2156. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  2157. QDF_TRACE(QDF_MODULE_ID_DP,
  2158. QDF_TRACE_LEVEL_ERROR,
  2159. FL("Policy Check Drop pkt"));
  2160. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  2161. /* Drop & free packet */
  2162. qdf_nbuf_free(nbuf);
  2163. /* Statistics */
  2164. nbuf = next;
  2165. continue;
  2166. }
  2167. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  2168. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  2169. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  2170. rx_tlv_hdr) ==
  2171. false))) {
  2172. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  2173. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  2174. qdf_nbuf_free(nbuf);
  2175. nbuf = next;
  2176. continue;
  2177. }
  2178. if (soc->process_rx_status)
  2179. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  2180. /* Update the protocol tag in SKB based on CCE metadata */
  2181. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2182. reo_ring_num, false, true);
  2183. /* Update the flow tag in SKB based on FSE metadata */
  2184. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  2185. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  2186. ring_id, tid_stats);
  2187. if (qdf_unlikely(vdev->mesh_vdev)) {
  2188. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  2189. == QDF_STATUS_SUCCESS) {
  2190. QDF_TRACE(QDF_MODULE_ID_DP,
  2191. QDF_TRACE_LEVEL_INFO_MED,
  2192. FL("mesh pkt filtered"));
  2193. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  2194. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  2195. 1);
  2196. qdf_nbuf_free(nbuf);
  2197. nbuf = next;
  2198. continue;
  2199. }
  2200. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2201. }
  2202. if (qdf_likely(vdev->rx_decap_type ==
  2203. htt_cmn_pkt_type_ethernet) &&
  2204. qdf_likely(!vdev->mesh_vdev)) {
  2205. /* WDS Destination Address Learning */
  2206. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2207. /* Due to HW issue, sometimes we see that the sa_idx
  2208. * and da_idx are invalid with sa_valid and da_valid
  2209. * bits set
  2210. *
  2211. * in this case we also see that value of
  2212. * sa_sw_peer_id is set as 0
  2213. *
  2214. * Drop the packet if sa_idx and da_idx OOB or
  2215. * sa_sw_peerid is 0
  2216. */
  2217. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2218. msdu_metadata)) {
  2219. qdf_nbuf_free(nbuf);
  2220. nbuf = next;
  2221. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2222. continue;
  2223. }
  2224. /* WDS Source Port Learning */
  2225. if (qdf_likely(vdev->wds_enabled))
  2226. dp_rx_wds_srcport_learn(soc,
  2227. rx_tlv_hdr,
  2228. peer,
  2229. nbuf,
  2230. msdu_metadata);
  2231. /* Intrabss-fwd */
  2232. if (dp_rx_check_ap_bridge(vdev))
  2233. if (dp_rx_intrabss_fwd(soc,
  2234. peer,
  2235. rx_tlv_hdr,
  2236. nbuf,
  2237. msdu_metadata)) {
  2238. nbuf = next;
  2239. tid_stats->intrabss_cnt++;
  2240. continue; /* Get next desc */
  2241. }
  2242. }
  2243. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2244. DP_RX_LIST_APPEND(deliver_list_head,
  2245. deliver_list_tail,
  2246. nbuf);
  2247. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2248. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2249. tid_stats->delivered_to_stack++;
  2250. nbuf = next;
  2251. }
  2252. if (qdf_likely(deliver_list_head)) {
  2253. if (qdf_likely(peer))
  2254. dp_rx_deliver_to_stack(soc, vdev, peer,
  2255. deliver_list_head,
  2256. deliver_list_tail);
  2257. else {
  2258. nbuf = deliver_list_head;
  2259. while (nbuf) {
  2260. next = nbuf->next;
  2261. nbuf->next = NULL;
  2262. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2263. nbuf = next;
  2264. }
  2265. }
  2266. }
  2267. if (qdf_likely(peer))
  2268. dp_peer_unref_del_find_by_id(peer);
  2269. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2270. if (quota) {
  2271. num_pending =
  2272. dp_rx_srng_get_num_pending(hal_soc,
  2273. hal_ring_hdl,
  2274. num_entries,
  2275. &near_full);
  2276. if (num_pending) {
  2277. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2278. if (!hif_exec_should_yield(scn, intr_id))
  2279. goto more_data;
  2280. if (qdf_unlikely(near_full)) {
  2281. DP_STATS_INC(soc, rx.near_full, 1);
  2282. goto more_data;
  2283. }
  2284. }
  2285. }
  2286. if (vdev && vdev->osif_fisa_flush)
  2287. vdev->osif_fisa_flush(soc, reo_ring_num);
  2288. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2289. vdev->osif_gro_flush(vdev->osif_vdev,
  2290. reo_ring_num);
  2291. }
  2292. }
  2293. /* Update histogram statistics by looping through pdev's */
  2294. DP_RX_HIST_STATS_PER_PDEV();
  2295. return rx_bufs_used; /* Assume no scale factor for now */
  2296. }
  2297. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2298. {
  2299. QDF_STATUS ret;
  2300. if (vdev->osif_rx_flush) {
  2301. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2302. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2303. dp_err("Failed to flush rx pkts for vdev %d\n",
  2304. vdev->vdev_id);
  2305. return ret;
  2306. }
  2307. }
  2308. return QDF_STATUS_SUCCESS;
  2309. }
  2310. static QDF_STATUS
  2311. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  2312. struct dp_pdev *dp_pdev,
  2313. struct rx_desc_pool *rx_desc_pool)
  2314. {
  2315. qdf_dma_addr_t paddr;
  2316. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2317. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2318. RX_BUFFER_RESERVATION,
  2319. rx_desc_pool->buf_alignment, FALSE);
  2320. if (!(*nbuf)) {
  2321. dp_err("nbuf alloc failed");
  2322. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2323. return ret;
  2324. }
  2325. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev, *nbuf,
  2326. QDF_DMA_FROM_DEVICE,
  2327. rx_desc_pool->buf_size);
  2328. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2329. qdf_nbuf_free(*nbuf);
  2330. dp_err("nbuf map failed");
  2331. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2332. return ret;
  2333. }
  2334. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  2335. ret = check_x86_paddr(dp_soc, nbuf, &paddr, rx_desc_pool);
  2336. if (ret == QDF_STATUS_E_FAILURE) {
  2337. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, *nbuf,
  2338. QDF_DMA_FROM_DEVICE,
  2339. rx_desc_pool->buf_size);
  2340. qdf_nbuf_free(*nbuf);
  2341. dp_err("nbuf check x86 failed");
  2342. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2343. return ret;
  2344. }
  2345. return QDF_STATUS_SUCCESS;
  2346. }
  2347. QDF_STATUS
  2348. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2349. struct dp_srng *dp_rxdma_srng,
  2350. struct rx_desc_pool *rx_desc_pool,
  2351. uint32_t num_req_buffers)
  2352. {
  2353. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2354. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2355. union dp_rx_desc_list_elem_t *next;
  2356. void *rxdma_ring_entry;
  2357. qdf_dma_addr_t paddr;
  2358. qdf_nbuf_t *rx_nbuf_arr;
  2359. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2360. uint32_t buffer_index, nbuf_ptrs_per_page;
  2361. qdf_nbuf_t nbuf;
  2362. QDF_STATUS ret;
  2363. int page_idx, total_pages;
  2364. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2365. union dp_rx_desc_list_elem_t *tail = NULL;
  2366. int sync_hw_ptr = 1;
  2367. uint32_t num_entries_avail;
  2368. if (qdf_unlikely(!rxdma_srng)) {
  2369. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2370. return QDF_STATUS_E_FAILURE;
  2371. }
  2372. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2373. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2374. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2375. rxdma_srng,
  2376. sync_hw_ptr);
  2377. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2378. if (!num_entries_avail) {
  2379. dp_err("Num of available entries is zero, nothing to do");
  2380. return QDF_STATUS_E_NOMEM;
  2381. }
  2382. if (num_entries_avail < num_req_buffers)
  2383. num_req_buffers = num_entries_avail;
  2384. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2385. num_req_buffers, &desc_list, &tail);
  2386. if (!nr_descs) {
  2387. dp_err("no free rx_descs in freelist");
  2388. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2389. return QDF_STATUS_E_NOMEM;
  2390. }
  2391. dp_debug("got %u RX descs for driver attach", nr_descs);
  2392. /*
  2393. * Try to allocate pointers to the nbuf one page at a time.
  2394. * Take pointers that can fit in one page of memory and
  2395. * iterate through the total descriptors that need to be
  2396. * allocated in order of pages. Reuse the pointers that
  2397. * have been allocated to fit in one page across each
  2398. * iteration to index into the nbuf.
  2399. */
  2400. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  2401. /*
  2402. * Add an extra page to store the remainder if any
  2403. */
  2404. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  2405. total_pages++;
  2406. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  2407. if (!rx_nbuf_arr) {
  2408. dp_err("failed to allocate nbuf array");
  2409. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2410. QDF_BUG(0);
  2411. return QDF_STATUS_E_NOMEM;
  2412. }
  2413. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  2414. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2415. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  2416. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2417. /*
  2418. * The last page of buffer pointers may not be required
  2419. * completely based on the number of descriptors. Below
  2420. * check will ensure we are allocating only the
  2421. * required number of descriptors.
  2422. */
  2423. if (nr_nbuf_total >= nr_descs)
  2424. break;
  2425. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2426. &rx_nbuf_arr[nr_nbuf],
  2427. dp_pdev, rx_desc_pool);
  2428. if (QDF_IS_STATUS_ERROR(ret))
  2429. break;
  2430. nr_nbuf_total++;
  2431. }
  2432. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2433. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2434. rxdma_ring_entry =
  2435. hal_srng_src_get_next(dp_soc->hal_soc,
  2436. rxdma_srng);
  2437. qdf_assert_always(rxdma_ring_entry);
  2438. next = desc_list->next;
  2439. nbuf = rx_nbuf_arr[buffer_index];
  2440. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2441. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2442. desc_list->rx_desc.in_use = 1;
  2443. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2444. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2445. __func__,
  2446. RX_DESC_REPLENISHED);
  2447. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2448. desc_list->rx_desc.cookie,
  2449. rx_desc_pool->owner);
  2450. dp_ipa_handle_rx_buf_smmu_mapping(
  2451. dp_soc, nbuf,
  2452. rx_desc_pool->buf_size,
  2453. true);
  2454. desc_list = next;
  2455. }
  2456. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2457. }
  2458. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2459. qdf_mem_free(rx_nbuf_arr);
  2460. if (!nr_nbuf_total) {
  2461. dp_err("No nbuf's allocated");
  2462. QDF_BUG(0);
  2463. return QDF_STATUS_E_RESOURCES;
  2464. }
  2465. /* No need to count the number of bytes received during replenish.
  2466. * Therefore set replenish.pkts.bytes as 0.
  2467. */
  2468. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2469. return QDF_STATUS_SUCCESS;
  2470. }
  2471. /*
  2472. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2473. * pool
  2474. *
  2475. * @pdev: core txrx pdev context
  2476. *
  2477. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2478. * QDF_STATUS_E_NOMEM
  2479. */
  2480. QDF_STATUS
  2481. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2482. {
  2483. struct dp_soc *soc = pdev->soc;
  2484. uint32_t rxdma_entries;
  2485. uint32_t rx_sw_desc_weight;
  2486. struct dp_srng *dp_rxdma_srng;
  2487. struct rx_desc_pool *rx_desc_pool;
  2488. uint32_t status = QDF_STATUS_SUCCESS;
  2489. int mac_for_pdev;
  2490. mac_for_pdev = pdev->lmac_id;
  2491. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2492. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2493. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2494. return status;
  2495. }
  2496. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2497. rxdma_entries = dp_rxdma_srng->num_entries;
  2498. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2499. rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2500. status = dp_rx_desc_pool_alloc(soc,
  2501. rx_sw_desc_weight * rxdma_entries,
  2502. rx_desc_pool);
  2503. if (status != QDF_STATUS_SUCCESS)
  2504. return status;
  2505. return status;
  2506. }
  2507. /*
  2508. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2509. *
  2510. * @pdev: core txrx pdev context
  2511. */
  2512. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2513. {
  2514. int mac_for_pdev = pdev->lmac_id;
  2515. struct dp_soc *soc = pdev->soc;
  2516. struct rx_desc_pool *rx_desc_pool;
  2517. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2518. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2519. }
  2520. /*
  2521. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2522. *
  2523. * @pdev: core txrx pdev context
  2524. *
  2525. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2526. * QDF_STATUS_E_NOMEM
  2527. */
  2528. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2529. {
  2530. int mac_for_pdev = pdev->lmac_id;
  2531. struct dp_soc *soc = pdev->soc;
  2532. uint32_t rxdma_entries;
  2533. uint32_t rx_sw_desc_weight;
  2534. struct dp_srng *dp_rxdma_srng;
  2535. struct rx_desc_pool *rx_desc_pool;
  2536. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2537. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2538. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2539. return QDF_STATUS_SUCCESS;
  2540. }
  2541. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2542. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2543. return QDF_STATUS_E_NOMEM;
  2544. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2545. rxdma_entries = dp_rxdma_srng->num_entries;
  2546. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2547. rx_sw_desc_weight =
  2548. wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2549. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2550. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2551. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2552. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2553. rx_sw_desc_weight * rxdma_entries,
  2554. rx_desc_pool);
  2555. return QDF_STATUS_SUCCESS;
  2556. }
  2557. /*
  2558. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2559. * @pdev: core txrx pdev context
  2560. *
  2561. * This function resets the freelist of rx descriptors and destroys locks
  2562. * associated with this list of descriptors.
  2563. */
  2564. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2565. {
  2566. int mac_for_pdev = pdev->lmac_id;
  2567. struct dp_soc *soc = pdev->soc;
  2568. struct rx_desc_pool *rx_desc_pool;
  2569. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2570. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  2571. }
  2572. /*
  2573. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2574. *
  2575. * @pdev: core txrx pdev context
  2576. *
  2577. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2578. * QDF_STATUS_E_NOMEM
  2579. */
  2580. QDF_STATUS
  2581. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2582. {
  2583. int mac_for_pdev = pdev->lmac_id;
  2584. struct dp_soc *soc = pdev->soc;
  2585. struct dp_srng *dp_rxdma_srng;
  2586. struct rx_desc_pool *rx_desc_pool;
  2587. uint32_t rxdma_entries;
  2588. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2589. rxdma_entries = dp_rxdma_srng->num_entries;
  2590. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2591. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2592. rx_desc_pool, rxdma_entries - 1);
  2593. }
  2594. /*
  2595. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2596. *
  2597. * @pdev: core txrx pdev context
  2598. */
  2599. void
  2600. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2601. {
  2602. int mac_for_pdev = pdev->lmac_id;
  2603. struct dp_soc *soc = pdev->soc;
  2604. struct rx_desc_pool *rx_desc_pool;
  2605. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2606. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2607. }
  2608. /*
  2609. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2610. * @soc: core txrx main context
  2611. * @pdev: core txrx pdev context
  2612. *
  2613. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2614. * until retry times reaches max threshold or succeeded.
  2615. *
  2616. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2617. */
  2618. qdf_nbuf_t
  2619. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2620. {
  2621. uint8_t *buf;
  2622. int32_t nbuf_retry_count;
  2623. QDF_STATUS ret;
  2624. qdf_nbuf_t nbuf = NULL;
  2625. for (nbuf_retry_count = 0; nbuf_retry_count <
  2626. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2627. nbuf_retry_count++) {
  2628. /* Allocate a new skb */
  2629. nbuf = qdf_nbuf_alloc(soc->osdev,
  2630. RX_DATA_BUFFER_SIZE,
  2631. RX_BUFFER_RESERVATION,
  2632. RX_DATA_BUFFER_ALIGNMENT,
  2633. FALSE);
  2634. if (!nbuf) {
  2635. DP_STATS_INC(pdev,
  2636. replenish.nbuf_alloc_fail, 1);
  2637. continue;
  2638. }
  2639. buf = qdf_nbuf_data(nbuf);
  2640. memset(buf, 0, RX_DATA_BUFFER_SIZE);
  2641. ret = qdf_nbuf_map_nbytes_single(soc->osdev, nbuf,
  2642. QDF_DMA_FROM_DEVICE,
  2643. RX_DATA_BUFFER_SIZE);
  2644. /* nbuf map failed */
  2645. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2646. qdf_nbuf_free(nbuf);
  2647. DP_STATS_INC(pdev, replenish.map_err, 1);
  2648. continue;
  2649. }
  2650. /* qdf_nbuf alloc and map succeeded */
  2651. break;
  2652. }
  2653. /* qdf_nbuf still alloc or map failed */
  2654. if (qdf_unlikely(nbuf_retry_count >=
  2655. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2656. return NULL;
  2657. return nbuf;
  2658. }
  2659. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2660. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2661. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2662. uint8_t *rx_tlv_hdr)
  2663. {
  2664. uint32_t l2_hdr_offset = 0;
  2665. uint16_t msdu_len = 0;
  2666. uint32_t skip_len;
  2667. l2_hdr_offset =
  2668. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2669. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2670. skip_len = l2_hdr_offset;
  2671. } else {
  2672. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2673. skip_len = l2_hdr_offset + RX_PKT_TLVS_LEN;
  2674. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2675. }
  2676. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2677. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2678. qdf_nbuf_pull_head(nbuf, skip_len);
  2679. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2680. qdf_nbuf_set_exc_frame(nbuf, 1);
  2681. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2682. nbuf, NULL);
  2683. return true;
  2684. }
  2685. return false;
  2686. }
  2687. #endif