rouleur.c 68 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #define DRV_NAME "rouleur_codec"
  29. #define NUM_SWRS_DT_PARAMS 5
  30. #define ROULEUR_VERSION_1_0 1
  31. #define ROULEUR_VERSION_ENTRY_SIZE 32
  32. #define NUM_ATTEMPTS 5
  33. enum {
  34. CODEC_TX = 0,
  35. CODEC_RX,
  36. };
  37. enum {
  38. ALLOW_VPOS_DISABLE,
  39. HPH_COMP_DELAY,
  40. HPH_PA_DELAY,
  41. AMIC2_BCS_ENABLE,
  42. };
  43. /* TODO: Check on the step values */
  44. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  45. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  46. static int rouleur_handle_post_irq(void *data);
  47. static int rouleur_reset(struct device *dev, int val);
  48. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  49. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  50. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  51. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  52. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  53. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  66. };
  67. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  68. .name = "rouleur",
  69. .irqs = ROULEUR_IRQs,
  70. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  71. .num_regs = 3,
  72. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  73. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  74. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  75. .use_ack = 1,
  76. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  77. .runtime_pm = false,
  78. .handle_post_irq = rouleur_handle_post_irq,
  79. .irq_drv_data = NULL,
  80. };
  81. static int rouleur_handle_post_irq(void *data)
  82. {
  83. struct rouleur_priv *rouleur = data;
  84. u32 status1 = 0, status2 = 0, status3 = 0;
  85. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  86. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  87. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  88. rouleur->tx_swr_dev->slave_irq_pending =
  89. ((status1 || status2 || status3) ? true : false);
  90. return IRQ_HANDLED;
  91. }
  92. static int rouleur_init_reg(struct snd_soc_component *component)
  93. {
  94. /* Enable surge protection */
  95. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  96. 0xC0, 0xC0);
  97. /* Disable mic bias pull down */
  98. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  99. 0x01, 0x00);
  100. return 0;
  101. }
  102. static int rouleur_set_port_params(struct snd_soc_component *component,
  103. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  104. u8 *ch_mask, u32 *ch_rate,
  105. u8 *port_type, u8 path)
  106. {
  107. int i, j;
  108. u8 num_ports = 0;
  109. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  110. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  111. switch (path) {
  112. case CODEC_RX:
  113. map = &rouleur->rx_port_mapping;
  114. num_ports = rouleur->num_rx_ports;
  115. break;
  116. case CODEC_TX:
  117. map = &rouleur->tx_port_mapping;
  118. num_ports = rouleur->num_tx_ports;
  119. break;
  120. default:
  121. dev_err(component->dev, "%s Invalid path: %d\n",
  122. __func__, path);
  123. return -EINVAL;
  124. }
  125. for (i = 0; i <= num_ports; i++) {
  126. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  127. if ((*map)[i][j].slave_port_type == slv_prt_type)
  128. goto found;
  129. }
  130. }
  131. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  132. __func__, slv_prt_type);
  133. return -EINVAL;
  134. found:
  135. *port_id = i;
  136. *num_ch = (*map)[i][j].num_ch;
  137. *ch_mask = (*map)[i][j].ch_mask;
  138. *ch_rate = (*map)[i][j].ch_rate;
  139. *port_type = (*map)[i][j].master_port_type;
  140. return 0;
  141. }
  142. static int rouleur_parse_port_mapping(struct device *dev,
  143. char *prop, u8 path)
  144. {
  145. u32 *dt_array, map_size, map_length;
  146. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  147. u32 slave_port_type, master_port_type;
  148. u32 i, ch_iter = 0;
  149. int ret = 0;
  150. u8 *num_ports = NULL;
  151. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  152. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  153. switch (path) {
  154. case CODEC_RX:
  155. map = &rouleur->rx_port_mapping;
  156. num_ports = &rouleur->num_rx_ports;
  157. break;
  158. case CODEC_TX:
  159. map = &rouleur->tx_port_mapping;
  160. num_ports = &rouleur->num_tx_ports;
  161. break;
  162. default:
  163. dev_err(dev, "%s Invalid path: %d\n",
  164. __func__, path);
  165. return -EINVAL;
  166. }
  167. if (!of_find_property(dev->of_node, prop,
  168. &map_size)) {
  169. dev_err(dev, "missing port mapping prop %s\n", prop);
  170. ret = -EINVAL;
  171. goto err;
  172. }
  173. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  174. dt_array = kzalloc(map_size, GFP_KERNEL);
  175. if (!dt_array) {
  176. ret = -ENOMEM;
  177. goto err;
  178. }
  179. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  180. NUM_SWRS_DT_PARAMS * map_length);
  181. if (ret) {
  182. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  183. __func__, prop);
  184. ret = -EINVAL;
  185. goto err_pdata_fail;
  186. }
  187. for (i = 0; i < map_length; i++) {
  188. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  189. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  190. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  191. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  192. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  193. if (port_num != old_port_num)
  194. ch_iter = 0;
  195. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  196. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  197. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  198. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  199. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  200. old_port_num = port_num;
  201. }
  202. *num_ports = port_num;
  203. err_pdata_fail:
  204. kfree(dt_array);
  205. err:
  206. return ret;
  207. }
  208. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  209. u8 slv_port_type, u8 enable)
  210. {
  211. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  212. u8 port_id;
  213. u8 num_ch;
  214. u8 ch_mask;
  215. u32 ch_rate;
  216. u8 port_type;
  217. u8 num_port = 1;
  218. int ret = 0;
  219. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  220. &num_ch, &ch_mask, &ch_rate,
  221. &port_type, CODEC_TX);
  222. if (ret) {
  223. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  224. __func__, ret);
  225. return ret;
  226. }
  227. if (enable)
  228. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  229. num_port, &ch_mask, &ch_rate,
  230. &num_ch, &port_type);
  231. else
  232. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  233. num_port, &ch_mask, &port_type);
  234. return ret;
  235. }
  236. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  237. u8 slv_port_type, u8 enable)
  238. {
  239. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  240. u8 port_id;
  241. u8 num_ch;
  242. u8 ch_mask;
  243. u32 ch_rate;
  244. u8 port_type;
  245. u8 num_port = 1;
  246. int ret = 0;
  247. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  248. &num_ch, &ch_mask, &ch_rate,
  249. &port_type, CODEC_RX);
  250. if (ret) {
  251. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  252. __func__, ret);
  253. return ret;
  254. }
  255. if (enable)
  256. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  257. num_port, &ch_mask, &ch_rate,
  258. &num_ch, &port_type);
  259. else
  260. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  261. num_port, &ch_mask, &port_type);
  262. return ret;
  263. }
  264. static int rouleur_global_mbias_enable(struct snd_soc_component *component)
  265. {
  266. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  267. mutex_lock(&rouleur->main_bias_lock);
  268. if (rouleur->mbias_cnt == 0) {
  269. snd_soc_component_update_bits(component,
  270. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  271. snd_soc_component_update_bits(component,
  272. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  273. usleep_range(1000, 1100);
  274. }
  275. rouleur->mbias_cnt++;
  276. mutex_unlock(&rouleur->main_bias_lock);
  277. return 0;
  278. }
  279. static int rouleur_global_mbias_disable(struct snd_soc_component *component)
  280. {
  281. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  282. mutex_lock(&rouleur->main_bias_lock);
  283. if (rouleur->mbias_cnt == 0) {
  284. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  285. mutex_unlock(&rouleur->main_bias_lock);
  286. return 0;
  287. }
  288. rouleur->mbias_cnt--;
  289. if (rouleur->mbias_cnt == 0) {
  290. snd_soc_component_update_bits(component,
  291. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  292. snd_soc_component_update_bits(component,
  293. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  294. }
  295. mutex_unlock(&rouleur->main_bias_lock);
  296. return 0;
  297. }
  298. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  299. {
  300. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  301. mutex_lock(&rouleur->rx_clk_lock);
  302. if (rouleur->rx_clk_cnt == 0) {
  303. snd_soc_component_update_bits(component,
  304. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  305. snd_soc_component_update_bits(component,
  306. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  307. usleep_range(5000, 5100);
  308. rouleur_global_mbias_enable(component);
  309. snd_soc_component_update_bits(component,
  310. ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x11);
  311. snd_soc_component_update_bits(component,
  312. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  313. snd_soc_component_update_bits(component,
  314. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  315. usleep_range(500, 510);
  316. }
  317. rouleur->rx_clk_cnt++;
  318. mutex_unlock(&rouleur->rx_clk_lock);
  319. return 0;
  320. }
  321. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  322. {
  323. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  324. mutex_lock(&rouleur->rx_clk_lock);
  325. if (rouleur->rx_clk_cnt == 0) {
  326. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  327. mutex_unlock(&rouleur->rx_clk_lock);
  328. return 0;
  329. }
  330. rouleur->rx_clk_cnt--;
  331. if (rouleur->rx_clk_cnt == 0) {
  332. snd_soc_component_update_bits(component,
  333. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  334. snd_soc_component_update_bits(component,
  335. ROULEUR_ANA_HPHPA_FSM_CLK, 0x11, 0x00);
  336. snd_soc_component_update_bits(component,
  337. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  338. rouleur_global_mbias_disable(component);
  339. snd_soc_component_update_bits(component,
  340. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  341. snd_soc_component_update_bits(component,
  342. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  343. }
  344. mutex_unlock(&rouleur->rx_clk_lock);
  345. return 0;
  346. }
  347. /*
  348. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  349. * @component: handle to snd_soc_component *
  350. *
  351. * return rouleur_mbhc handle or error code in case of failure
  352. */
  353. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  354. {
  355. struct rouleur_priv *rouleur;
  356. if (!component) {
  357. pr_err("%s: Invalid params, NULL component\n", __func__);
  358. return NULL;
  359. }
  360. rouleur = snd_soc_component_get_drvdata(component);
  361. if (!rouleur) {
  362. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  363. return NULL;
  364. }
  365. return rouleur->mbhc;
  366. }
  367. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  368. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  369. struct snd_kcontrol *kcontrol,
  370. int event)
  371. {
  372. struct snd_soc_component *component =
  373. snd_soc_dapm_to_component(w->dapm);
  374. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  375. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  376. w->name, event);
  377. switch (event) {
  378. case SND_SOC_DAPM_PRE_PMU:
  379. rouleur_rx_clk_enable(component);
  380. snd_soc_component_update_bits(component,
  381. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  382. 0x02, 0x02);
  383. snd_soc_component_update_bits(component,
  384. ROULEUR_SWR_HPHPA_HD2,
  385. 0x38, 0x38);
  386. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  387. break;
  388. case SND_SOC_DAPM_POST_PMU:
  389. if (rouleur->comp1_enable) {
  390. snd_soc_component_update_bits(component,
  391. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  392. 0x02, 0x02);
  393. if (rouleur->comp2_enable)
  394. snd_soc_component_update_bits(component,
  395. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  396. 0x01, 0x01);
  397. /*
  398. * 5ms sleep is required after COMP is enabled as per
  399. * HW requirement
  400. */
  401. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  402. usleep_range(5000, 5100);
  403. clear_bit(HPH_COMP_DELAY,
  404. &rouleur->status_mask);
  405. }
  406. } else {
  407. snd_soc_component_update_bits(component,
  408. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  409. 0x02, 0x00);
  410. }
  411. snd_soc_component_update_bits(component,
  412. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  413. 0x7C, 0x7C);
  414. snd_soc_component_update_bits(component,
  415. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  416. 0x04, 0x04);
  417. snd_soc_component_update_bits(component,
  418. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  419. snd_soc_component_update_bits(component,
  420. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  421. 0x03, 0x03);
  422. break;
  423. case SND_SOC_DAPM_POST_PMD:
  424. snd_soc_component_update_bits(component,
  425. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  426. 0x03, 0x00);
  427. snd_soc_component_update_bits(component,
  428. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  429. 0x01, 0x00);
  430. break;
  431. }
  432. return 0;
  433. }
  434. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  435. struct snd_kcontrol *kcontrol,
  436. int event)
  437. {
  438. struct snd_soc_component *component =
  439. snd_soc_dapm_to_component(w->dapm);
  440. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  441. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  442. w->name, event);
  443. switch (event) {
  444. case SND_SOC_DAPM_PRE_PMU:
  445. rouleur_rx_clk_enable(component);
  446. snd_soc_component_update_bits(component,
  447. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  448. 0x02, 0x02);
  449. snd_soc_component_update_bits(component,
  450. ROULEUR_SWR_HPHPA_HD2,
  451. 0x07, 0x07);
  452. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  453. break;
  454. case SND_SOC_DAPM_POST_PMU:
  455. if (rouleur->comp2_enable) {
  456. snd_soc_component_update_bits(component,
  457. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  458. 0x01, 0x01);
  459. if (rouleur->comp1_enable)
  460. snd_soc_component_update_bits(component,
  461. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  462. 0x02, 0x02);
  463. /*
  464. * 5ms sleep is required after COMP is enabled as per
  465. * HW requirement
  466. */
  467. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  468. usleep_range(5000, 5100);
  469. clear_bit(HPH_COMP_DELAY,
  470. &rouleur->status_mask);
  471. }
  472. } else {
  473. snd_soc_component_update_bits(component,
  474. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  475. 0x01, 0x00);
  476. }
  477. snd_soc_component_update_bits(component,
  478. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  479. 0x7C, 0x7C);
  480. snd_soc_component_update_bits(component,
  481. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  482. 0x08, 0x08);
  483. snd_soc_component_update_bits(component,
  484. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  485. snd_soc_component_update_bits(component,
  486. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  487. 0x03, 0x03);
  488. break;
  489. case SND_SOC_DAPM_POST_PMD:
  490. snd_soc_component_update_bits(component,
  491. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  492. 0x03, 0x00);
  493. snd_soc_component_update_bits(component,
  494. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  495. break;
  496. }
  497. return 0;
  498. }
  499. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  500. struct snd_kcontrol *kcontrol,
  501. int event)
  502. {
  503. struct snd_soc_component *component =
  504. snd_soc_dapm_to_component(w->dapm);
  505. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  506. w->name, event);
  507. switch (event) {
  508. case SND_SOC_DAPM_PRE_PMU:
  509. rouleur_rx_clk_enable(component);
  510. snd_soc_component_update_bits(component,
  511. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  512. 0x7C, 0x7C);
  513. snd_soc_component_update_bits(component,
  514. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  515. 0x01, 0x01);
  516. snd_soc_component_update_bits(component,
  517. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  518. 0x03, 0x03);
  519. snd_soc_component_update_bits(component,
  520. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  521. 0x04, 0x04);
  522. break;
  523. case SND_SOC_DAPM_POST_PMD:
  524. snd_soc_component_update_bits(component,
  525. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  526. 0x03, 0x00);
  527. snd_soc_component_update_bits(component,
  528. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  529. 0x01, 0x00);
  530. break;
  531. };
  532. return 0;
  533. }
  534. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  535. struct snd_kcontrol *kcontrol,
  536. int event)
  537. {
  538. struct snd_soc_component *component =
  539. snd_soc_dapm_to_component(w->dapm);
  540. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  541. int ret = 0;
  542. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  543. w->name, event);
  544. switch (event) {
  545. case SND_SOC_DAPM_PRE_PMU:
  546. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  547. rouleur->rx_swr_dev->dev_num,
  548. true);
  549. snd_soc_component_update_bits(component,
  550. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  551. 0x40, 0x40);
  552. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  553. /* TODO: WHY SECOND TIME */
  554. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  555. rouleur->rx_swr_dev->dev_num,
  556. true);
  557. break;
  558. case SND_SOC_DAPM_POST_PMU:
  559. /*
  560. * 5ms sleep is required after PA is enabled as per
  561. * HW requirement.
  562. */
  563. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  564. usleep_range(5000, 5100);
  565. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  566. }
  567. if (rouleur->update_wcd_event)
  568. rouleur->update_wcd_event(rouleur->handle,
  569. WCD_BOLERO_EVT_RX_MUTE,
  570. (WCD_RX2 << 0x10));
  571. wcd_enable_irq(&rouleur->irq_info,
  572. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  573. break;
  574. case SND_SOC_DAPM_PRE_PMD:
  575. wcd_disable_irq(&rouleur->irq_info,
  576. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  577. if (rouleur->update_wcd_event)
  578. rouleur->update_wcd_event(rouleur->handle,
  579. WCD_BOLERO_EVT_RX_MUTE,
  580. (WCD_RX2 << 0x10 | 0x1));
  581. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  582. WCD_EVENT_PRE_HPHR_PA_OFF,
  583. &rouleur->mbhc->wcd_mbhc);
  584. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  585. break;
  586. case SND_SOC_DAPM_POST_PMD:
  587. /*
  588. * 7ms sleep is required after PA is disabled as per
  589. * HW requirement. If compander is disabled, then
  590. * 20ms delay is required.
  591. */
  592. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  593. usleep_range(5000, 5100);
  594. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  595. }
  596. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  597. WCD_EVENT_POST_HPHR_PA_OFF,
  598. &rouleur->mbhc->wcd_mbhc);
  599. snd_soc_component_update_bits(component,
  600. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  601. 0x40, 0x00);
  602. break;
  603. };
  604. return ret;
  605. }
  606. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  607. struct snd_kcontrol *kcontrol,
  608. int event)
  609. {
  610. struct snd_soc_component *component =
  611. snd_soc_dapm_to_component(w->dapm);
  612. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  613. int ret = 0;
  614. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  615. w->name, event);
  616. switch (event) {
  617. case SND_SOC_DAPM_PRE_PMU:
  618. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  619. rouleur->rx_swr_dev->dev_num,
  620. true);
  621. snd_soc_component_update_bits(component,
  622. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  623. 0x80, 0x80);
  624. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  625. break;
  626. case SND_SOC_DAPM_POST_PMU:
  627. /*
  628. * 5ms sleep is required after PA is enabled as per
  629. * HW requirement.
  630. */
  631. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  632. usleep_range(5000, 5100);
  633. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  634. }
  635. if (rouleur->update_wcd_event)
  636. rouleur->update_wcd_event(rouleur->handle,
  637. WCD_BOLERO_EVT_RX_MUTE,
  638. (WCD_RX1 << 0x10));
  639. wcd_enable_irq(&rouleur->irq_info,
  640. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  641. break;
  642. case SND_SOC_DAPM_PRE_PMD:
  643. wcd_disable_irq(&rouleur->irq_info,
  644. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  645. if (rouleur->update_wcd_event)
  646. rouleur->update_wcd_event(rouleur->handle,
  647. WCD_BOLERO_EVT_RX_MUTE,
  648. (WCD_RX1 << 0x10 | 0x1));
  649. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  650. WCD_EVENT_PRE_HPHL_PA_OFF,
  651. &rouleur->mbhc->wcd_mbhc);
  652. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  653. break;
  654. case SND_SOC_DAPM_POST_PMD:
  655. /*
  656. * 5ms sleep is required after PA is disabled as per
  657. * HW requirement.
  658. */
  659. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  660. usleep_range(5000, 5100);
  661. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  662. }
  663. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  664. WCD_EVENT_POST_HPHL_PA_OFF,
  665. &rouleur->mbhc->wcd_mbhc);
  666. snd_soc_component_update_bits(component,
  667. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  668. 0x80, 0x00);
  669. break;
  670. };
  671. return ret;
  672. }
  673. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  674. struct snd_kcontrol *kcontrol,
  675. int event)
  676. {
  677. struct snd_soc_component *component =
  678. snd_soc_dapm_to_component(w->dapm);
  679. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  680. int ret = 0;
  681. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  682. w->name, event);
  683. switch (event) {
  684. case SND_SOC_DAPM_PRE_PMU:
  685. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  686. rouleur->rx_swr_dev->dev_num,
  687. true);
  688. snd_soc_component_update_bits(component,
  689. ROULEUR_ANA_COMBOPA_CTL,
  690. 0x80, 0x80);
  691. usleep_range(5000, 5100);
  692. break;
  693. case SND_SOC_DAPM_POST_PMU:
  694. if (rouleur->update_wcd_event)
  695. rouleur->update_wcd_event(rouleur->handle,
  696. WCD_BOLERO_EVT_RX_MUTE,
  697. (WCD_RX1 << 0x10));
  698. wcd_enable_irq(&rouleur->irq_info,
  699. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  700. break;
  701. case SND_SOC_DAPM_PRE_PMD:
  702. wcd_disable_irq(&rouleur->irq_info,
  703. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  704. if (rouleur->update_wcd_event)
  705. rouleur->update_wcd_event(rouleur->handle,
  706. WCD_BOLERO_EVT_RX_MUTE,
  707. (WCD_RX1 << 0x10 | 0x1));
  708. break;
  709. case SND_SOC_DAPM_POST_PMD:
  710. snd_soc_component_update_bits(component,
  711. ROULEUR_ANA_COMBOPA_CTL,
  712. 0x80, 0x00);
  713. usleep_range(5000, 5100);
  714. };
  715. return ret;
  716. }
  717. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  718. struct snd_kcontrol *kcontrol,
  719. int event)
  720. {
  721. struct snd_soc_component *component =
  722. snd_soc_dapm_to_component(w->dapm);
  723. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  724. int ret = 0;
  725. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  726. w->name, event);
  727. switch (event) {
  728. case SND_SOC_DAPM_PRE_PMU:
  729. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  730. rouleur->rx_swr_dev->dev_num,
  731. true);
  732. snd_soc_component_update_bits(component,
  733. ROULEUR_ANA_COMBOPA_CTL,
  734. 0x40, 0x40);
  735. snd_soc_component_update_bits(component,
  736. ROULEUR_ANA_COMBOPA_CTL,
  737. 0x80, 0x80);
  738. usleep_range(5000, 5100);
  739. break;
  740. case SND_SOC_DAPM_POST_PMU:
  741. if (rouleur->update_wcd_event)
  742. rouleur->update_wcd_event(rouleur->handle,
  743. WCD_BOLERO_EVT_RX_MUTE,
  744. (WCD_RX1 << 0x10));
  745. wcd_enable_irq(&rouleur->irq_info,
  746. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  747. break;
  748. case SND_SOC_DAPM_PRE_PMD:
  749. wcd_disable_irq(&rouleur->irq_info,
  750. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  751. if (rouleur->update_wcd_event)
  752. rouleur->update_wcd_event(rouleur->handle,
  753. WCD_BOLERO_EVT_RX_MUTE,
  754. (WCD_RX1 << 0x10 | 0x1));
  755. break;
  756. case SND_SOC_DAPM_POST_PMD:
  757. snd_soc_component_update_bits(component,
  758. ROULEUR_ANA_COMBOPA_CTL,
  759. 0x80, 0x00);
  760. snd_soc_component_update_bits(component,
  761. ROULEUR_ANA_COMBOPA_CTL,
  762. 0x40, 0x00);
  763. usleep_range(5000, 5100);
  764. };
  765. return ret;
  766. }
  767. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  768. struct snd_kcontrol *kcontrol,
  769. int event)
  770. {
  771. struct snd_soc_component *component =
  772. snd_soc_dapm_to_component(w->dapm);
  773. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  774. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  775. w->name, event);
  776. switch (event) {
  777. case SND_SOC_DAPM_PRE_PMU:
  778. rouleur_rx_connect_port(component, HPH_L, true);
  779. if (rouleur->comp1_enable)
  780. rouleur_rx_connect_port(component, COMP_L, true);
  781. break;
  782. case SND_SOC_DAPM_POST_PMD:
  783. rouleur_rx_connect_port(component, HPH_L, false);
  784. if (rouleur->comp1_enable)
  785. rouleur_rx_connect_port(component, COMP_L, false);
  786. rouleur_rx_clk_disable(component);
  787. break;
  788. };
  789. return 0;
  790. }
  791. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  792. struct snd_kcontrol *kcontrol, int event)
  793. {
  794. struct snd_soc_component *component =
  795. snd_soc_dapm_to_component(w->dapm);
  796. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  797. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  798. w->name, event);
  799. switch (event) {
  800. case SND_SOC_DAPM_PRE_PMU:
  801. rouleur_rx_connect_port(component, HPH_R, true);
  802. if (rouleur->comp2_enable)
  803. rouleur_rx_connect_port(component, COMP_R, true);
  804. break;
  805. case SND_SOC_DAPM_POST_PMD:
  806. rouleur_rx_connect_port(component, HPH_R, false);
  807. if (rouleur->comp2_enable)
  808. rouleur_rx_connect_port(component, COMP_R, false);
  809. rouleur_rx_clk_disable(component);
  810. break;
  811. };
  812. return 0;
  813. }
  814. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  815. struct snd_kcontrol *kcontrol,
  816. int event)
  817. {
  818. struct snd_soc_component *component =
  819. snd_soc_dapm_to_component(w->dapm);
  820. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  821. u16 dmic_clk_reg;
  822. s32 *dmic_clk_cnt;
  823. unsigned int dmic;
  824. char *wname;
  825. int ret = 0;
  826. wname = strpbrk(w->name, "01");
  827. if (!wname) {
  828. dev_err(component->dev, "%s: widget not found\n", __func__);
  829. return -EINVAL;
  830. }
  831. ret = kstrtouint(wname, 10, &dmic);
  832. if (ret < 0) {
  833. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  834. __func__);
  835. return -EINVAL;
  836. }
  837. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  838. w->name, event);
  839. switch (dmic) {
  840. case 0:
  841. case 1:
  842. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  843. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  844. break;
  845. default:
  846. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  847. __func__);
  848. return -EINVAL;
  849. };
  850. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  851. __func__, event, dmic, *dmic_clk_cnt);
  852. switch (event) {
  853. case SND_SOC_DAPM_PRE_PMU:
  854. snd_soc_component_update_bits(component,
  855. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  856. snd_soc_component_update_bits(component,
  857. dmic_clk_reg, 0x08, 0x08);
  858. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  859. break;
  860. case SND_SOC_DAPM_POST_PMD:
  861. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  862. snd_soc_component_update_bits(component,
  863. dmic_clk_reg, 0x08, 0x00);
  864. snd_soc_component_update_bits(component,
  865. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  866. break;
  867. };
  868. return 0;
  869. }
  870. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  871. struct snd_kcontrol *kcontrol,
  872. int event)
  873. {
  874. struct snd_soc_component *component =
  875. snd_soc_dapm_to_component(w->dapm);
  876. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  877. int ret = 0;
  878. switch (event) {
  879. case SND_SOC_DAPM_PRE_PMU:
  880. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  881. rouleur->tx_swr_dev->dev_num,
  882. true);
  883. break;
  884. case SND_SOC_DAPM_POST_PMD:
  885. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  886. rouleur->tx_swr_dev->dev_num,
  887. false);
  888. break;
  889. };
  890. return ret;
  891. }
  892. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  893. struct snd_kcontrol *kcontrol,
  894. int event)
  895. {
  896. struct snd_soc_component *component =
  897. snd_soc_dapm_to_component(w->dapm);
  898. struct rouleur_priv *rouleur =
  899. snd_soc_component_get_drvdata(component);
  900. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  901. w->name, event);
  902. switch (event) {
  903. case SND_SOC_DAPM_PRE_PMU:
  904. /* Enable BCS for Headset mic */
  905. if (w->shift == 1 && !(snd_soc_component_read32(component,
  906. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  907. rouleur_tx_connect_port(component, MBHC, true);
  908. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  909. }
  910. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  911. rouleur_global_mbias_enable(component);
  912. if (w->shift)
  913. snd_soc_component_update_bits(component,
  914. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  915. 0x30, 0x30);
  916. else
  917. snd_soc_component_update_bits(component,
  918. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  919. 0x03, 0x03);
  920. break;
  921. case SND_SOC_DAPM_POST_PMD:
  922. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  923. if (w->shift == 1 &&
  924. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  925. rouleur_tx_connect_port(component, MBHC, false);
  926. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  927. }
  928. if (w->shift)
  929. snd_soc_component_update_bits(component,
  930. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  931. 0x30, 0x00);
  932. else
  933. snd_soc_component_update_bits(component,
  934. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  935. 0x03, 0x00);
  936. rouleur_global_mbias_disable(component);
  937. break;
  938. };
  939. return 0;
  940. }
  941. /*
  942. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  943. * @micb_mv: micbias in mv
  944. *
  945. * return register value converted
  946. */
  947. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  948. {
  949. /* min micbias voltage is 1.6V and maximum is 2.85V */
  950. if (micb_mv < 1600 || micb_mv > 2850) {
  951. pr_err("%s: unsupported micbias voltage\n", __func__);
  952. return -EINVAL;
  953. }
  954. return (micb_mv - 1600) / 50;
  955. }
  956. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  957. /*
  958. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  959. * @component: handle to snd_soc_component *
  960. * @req_volt: micbias voltage to be set
  961. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  962. *
  963. * return 0 if adjustment is success or error code in case of failure
  964. */
  965. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  966. int req_volt, int micb_num)
  967. {
  968. struct rouleur_priv *rouleur =
  969. snd_soc_component_get_drvdata(component);
  970. int cur_vout_ctl, req_vout_ctl;
  971. int micb_reg, micb_val, micb_en;
  972. int ret = 0;
  973. int pullup_mask;
  974. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  975. switch (micb_num) {
  976. case MIC_BIAS_1:
  977. micb_val = snd_soc_component_read32(component, micb_reg);
  978. micb_en = (micb_val & 0x40) >> 6;
  979. pullup_mask = 0x20;
  980. break;
  981. case MIC_BIAS_2:
  982. micb_val = snd_soc_component_read32(component, micb_reg);
  983. micb_en = (micb_val & 0x04) >> 2;
  984. pullup_mask = 0x02;
  985. break;
  986. case MIC_BIAS_3:
  987. default:
  988. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  989. __func__, micb_num);
  990. return -EINVAL;
  991. }
  992. mutex_lock(&rouleur->micb_lock);
  993. /*
  994. * If requested micbias voltage is same as current micbias
  995. * voltage, then just return. Otherwise, adjust voltage as
  996. * per requested value. If micbias is already enabled, then
  997. * to avoid slow micbias ramp-up or down enable pull-up
  998. * momentarily, change the micbias value and then re-enable
  999. * micbias.
  1000. */
  1001. cur_vout_ctl = (snd_soc_component_read32(component,
  1002. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1003. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1004. if (req_vout_ctl < 0) {
  1005. ret = -EINVAL;
  1006. goto exit;
  1007. }
  1008. if (cur_vout_ctl == req_vout_ctl) {
  1009. ret = 0;
  1010. goto exit;
  1011. }
  1012. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1013. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1014. req_volt, micb_en);
  1015. if (micb_en == 0x1)
  1016. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1017. pullup_mask);
  1018. snd_soc_component_update_bits(component,
  1019. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl);
  1020. if (micb_en == 0x1) {
  1021. snd_soc_component_update_bits(component, micb_reg,
  1022. pullup_mask, 0x00);
  1023. /*
  1024. * Add 2ms delay as per HW requirement after enabling
  1025. * micbias
  1026. */
  1027. usleep_range(2000, 2100);
  1028. }
  1029. exit:
  1030. mutex_unlock(&rouleur->micb_lock);
  1031. return ret;
  1032. }
  1033. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1034. int rouleur_micbias_control(struct snd_soc_component *component,
  1035. int micb_num, int req, bool is_dapm)
  1036. {
  1037. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1038. int micb_index = micb_num - 1;
  1039. u16 micb_reg;
  1040. int pre_off_event = 0, post_off_event = 0;
  1041. int post_on_event = 0, post_dapm_off = 0;
  1042. int post_dapm_on = 0;
  1043. u8 pullup_mask = 0, enable_mask = 0;
  1044. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1045. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1046. __func__, micb_index);
  1047. return -EINVAL;
  1048. }
  1049. switch (micb_num) {
  1050. case MIC_BIAS_1:
  1051. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1052. pullup_mask = 0x20;
  1053. enable_mask = 0x40;
  1054. break;
  1055. case MIC_BIAS_2:
  1056. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1057. pullup_mask = 0x02;
  1058. enable_mask = 0x04;
  1059. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1060. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1061. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1062. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1063. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1064. break;
  1065. case MIC_BIAS_3:
  1066. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1067. pullup_mask = 0x02;
  1068. break;
  1069. default:
  1070. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1071. __func__, micb_num);
  1072. return -EINVAL;
  1073. };
  1074. mutex_lock(&rouleur->micb_lock);
  1075. switch (req) {
  1076. case MICB_PULLUP_ENABLE:
  1077. rouleur->pullup_ref[micb_index]++;
  1078. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1079. (rouleur->micb_ref[micb_index] == 0))
  1080. snd_soc_component_update_bits(component, micb_reg,
  1081. pullup_mask, pullup_mask);
  1082. break;
  1083. case MICB_PULLUP_DISABLE:
  1084. if (rouleur->pullup_ref[micb_index] > 0)
  1085. rouleur->pullup_ref[micb_index]--;
  1086. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1087. (rouleur->micb_ref[micb_index] == 0))
  1088. snd_soc_component_update_bits(component, micb_reg,
  1089. pullup_mask, 0x00);
  1090. break;
  1091. case MICB_ENABLE:
  1092. rouleur->micb_ref[micb_index]++;
  1093. if (rouleur->micb_ref[micb_index] == 1) {
  1094. rouleur_global_mbias_enable(component);
  1095. snd_soc_component_update_bits(component, micb_reg,
  1096. 0x80, 0x80);
  1097. snd_soc_component_update_bits(component,
  1098. micb_reg, enable_mask, enable_mask);
  1099. if (post_on_event)
  1100. blocking_notifier_call_chain(
  1101. &rouleur->mbhc->notifier, post_on_event,
  1102. &rouleur->mbhc->wcd_mbhc);
  1103. }
  1104. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1105. blocking_notifier_call_chain(
  1106. &rouleur->mbhc->notifier, post_dapm_on,
  1107. &rouleur->mbhc->wcd_mbhc);
  1108. break;
  1109. case MICB_DISABLE:
  1110. if (rouleur->micb_ref[micb_index] > 0)
  1111. rouleur->micb_ref[micb_index]--;
  1112. if ((rouleur->micb_ref[micb_index] == 0) &&
  1113. (rouleur->pullup_ref[micb_index] == 0)) {
  1114. if (pre_off_event && rouleur->mbhc)
  1115. blocking_notifier_call_chain(
  1116. &rouleur->mbhc->notifier, pre_off_event,
  1117. &rouleur->mbhc->wcd_mbhc);
  1118. snd_soc_component_update_bits(component, micb_reg,
  1119. enable_mask, 0x00);
  1120. snd_soc_component_update_bits(component, micb_reg,
  1121. 0x80, 0x00);
  1122. rouleur_global_mbias_disable(component);
  1123. if (post_off_event && rouleur->mbhc)
  1124. blocking_notifier_call_chain(
  1125. &rouleur->mbhc->notifier,
  1126. post_off_event,
  1127. &rouleur->mbhc->wcd_mbhc);
  1128. }
  1129. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1130. blocking_notifier_call_chain(
  1131. &rouleur->mbhc->notifier, post_dapm_off,
  1132. &rouleur->mbhc->wcd_mbhc);
  1133. break;
  1134. };
  1135. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1136. __func__, micb_num, rouleur->micb_ref[micb_index],
  1137. rouleur->pullup_ref[micb_index]);
  1138. mutex_unlock(&rouleur->micb_lock);
  1139. return 0;
  1140. }
  1141. EXPORT_SYMBOL(rouleur_micbias_control);
  1142. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1143. bool bcs_disable)
  1144. {
  1145. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1146. if (rouleur->update_wcd_event) {
  1147. if (bcs_disable)
  1148. rouleur->update_wcd_event(rouleur->handle,
  1149. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1150. else
  1151. rouleur->update_wcd_event(rouleur->handle,
  1152. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1153. }
  1154. }
  1155. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1156. {
  1157. int ret = 0;
  1158. uint8_t devnum = 0;
  1159. int num_retry = NUM_ATTEMPTS;
  1160. do {
  1161. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1162. if (ret) {
  1163. dev_err(&swr_dev->dev,
  1164. "%s get devnum %d for dev addr %lx failed\n",
  1165. __func__, devnum, swr_dev->addr);
  1166. /* retry after 1ms */
  1167. usleep_range(1000, 1010);
  1168. }
  1169. } while (ret && --num_retry);
  1170. swr_dev->dev_num = devnum;
  1171. return 0;
  1172. }
  1173. static int rouleur_event_notify(struct notifier_block *block,
  1174. unsigned long val,
  1175. void *data)
  1176. {
  1177. u16 event = (val & 0xffff);
  1178. int ret = 0;
  1179. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1180. struct snd_soc_component *component = rouleur->component;
  1181. struct wcd_mbhc *mbhc;
  1182. switch (event) {
  1183. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1184. snd_soc_component_update_bits(component,
  1185. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1186. 0xC0, 0x00);
  1187. snd_soc_component_update_bits(component,
  1188. ROULEUR_ANA_COMBOPA_CTL,
  1189. 0x40, 0x00);
  1190. snd_soc_component_update_bits(component,
  1191. ROULEUR_ANA_COMBOPA_CTL,
  1192. 0x80, 0x00);
  1193. snd_soc_component_update_bits(component,
  1194. ROULEUR_ANA_COMBOPA_CTL,
  1195. 0x40, 0x40);
  1196. snd_soc_component_update_bits(component,
  1197. ROULEUR_ANA_COMBOPA_CTL,
  1198. 0x80, 0x00);
  1199. break;
  1200. case BOLERO_WCD_EVT_SSR_DOWN:
  1201. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1202. mbhc = &rouleur->mbhc->wcd_mbhc;
  1203. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1204. rouleur_reset(rouleur->dev, 0x01);
  1205. break;
  1206. case BOLERO_WCD_EVT_SSR_UP:
  1207. rouleur_reset(rouleur->dev, 0x00);
  1208. /* allow reset to take effect */
  1209. usleep_range(10000, 10010);
  1210. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1211. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1212. rouleur_init_reg(component);
  1213. regcache_mark_dirty(rouleur->regmap);
  1214. regcache_sync(rouleur->regmap);
  1215. /* Initialize MBHC module */
  1216. mbhc = &rouleur->mbhc->wcd_mbhc;
  1217. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1218. if (ret) {
  1219. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1220. __func__);
  1221. } else {
  1222. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1223. }
  1224. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1225. break;
  1226. default:
  1227. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1228. event);
  1229. break;
  1230. }
  1231. return 0;
  1232. }
  1233. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1234. int event)
  1235. {
  1236. struct snd_soc_component *component =
  1237. snd_soc_dapm_to_component(w->dapm);
  1238. int micb_num;
  1239. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1240. __func__, w->name, event);
  1241. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1242. micb_num = MIC_BIAS_1;
  1243. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1244. micb_num = MIC_BIAS_2;
  1245. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1246. micb_num = MIC_BIAS_3;
  1247. else
  1248. return -EINVAL;
  1249. switch (event) {
  1250. case SND_SOC_DAPM_PRE_PMU:
  1251. /* Micbias LD0 enable not supported for MicBias 3*/
  1252. if (micb_num == MIC_BIAS_3)
  1253. rouleur_micbias_control(component, micb_num,
  1254. MICB_PULLUP_ENABLE, true);
  1255. else
  1256. rouleur_micbias_control(component, micb_num,
  1257. MICB_ENABLE, true);
  1258. break;
  1259. case SND_SOC_DAPM_POST_PMU:
  1260. usleep_range(1000, 1100);
  1261. break;
  1262. case SND_SOC_DAPM_POST_PMD:
  1263. if (micb_num == MIC_BIAS_3)
  1264. rouleur_micbias_control(component, micb_num,
  1265. MICB_PULLUP_DISABLE, true);
  1266. else
  1267. rouleur_micbias_control(component, micb_num,
  1268. MICB_DISABLE, true);
  1269. break;
  1270. };
  1271. return 0;
  1272. }
  1273. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1274. struct snd_kcontrol *kcontrol,
  1275. int event)
  1276. {
  1277. return __rouleur_codec_enable_micbias(w, event);
  1278. }
  1279. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1280. int event)
  1281. {
  1282. struct snd_soc_component *component =
  1283. snd_soc_dapm_to_component(w->dapm);
  1284. int micb_num;
  1285. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1286. __func__, w->name, event);
  1287. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1288. micb_num = MIC_BIAS_1;
  1289. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1290. micb_num = MIC_BIAS_2;
  1291. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1292. micb_num = MIC_BIAS_3;
  1293. else
  1294. return -EINVAL;
  1295. switch (event) {
  1296. case SND_SOC_DAPM_PRE_PMU:
  1297. rouleur_micbias_control(component, micb_num,
  1298. MICB_PULLUP_ENABLE, true);
  1299. break;
  1300. case SND_SOC_DAPM_POST_PMU:
  1301. /* 1 msec delay as per HW requirement */
  1302. usleep_range(1000, 1100);
  1303. break;
  1304. case SND_SOC_DAPM_POST_PMD:
  1305. rouleur_micbias_control(component, micb_num,
  1306. MICB_PULLUP_DISABLE, true);
  1307. break;
  1308. };
  1309. return 0;
  1310. }
  1311. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1312. struct snd_kcontrol *kcontrol,
  1313. int event)
  1314. {
  1315. return __rouleur_codec_enable_micbias_pullup(w, event);
  1316. }
  1317. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1318. struct snd_ctl_elem_value *ucontrol)
  1319. {
  1320. struct snd_soc_component *component =
  1321. snd_soc_kcontrol_component(kcontrol);
  1322. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1323. bool hphr;
  1324. struct soc_multi_mixer_control *mc;
  1325. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1326. hphr = mc->shift;
  1327. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1328. rouleur->comp1_enable;
  1329. return 0;
  1330. }
  1331. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1332. struct snd_ctl_elem_value *ucontrol)
  1333. {
  1334. struct snd_soc_component *component =
  1335. snd_soc_kcontrol_component(kcontrol);
  1336. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1337. int value = ucontrol->value.integer.value[0];
  1338. bool hphr;
  1339. struct soc_multi_mixer_control *mc;
  1340. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1341. hphr = mc->shift;
  1342. if (hphr)
  1343. rouleur->comp2_enable = value;
  1344. else
  1345. rouleur->comp1_enable = value;
  1346. return 0;
  1347. }
  1348. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1349. struct snd_kcontrol *kcontrol,
  1350. int event)
  1351. {
  1352. struct snd_soc_component *component =
  1353. snd_soc_dapm_to_component(w->dapm);
  1354. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1355. struct rouleur_pdata *pdata = NULL;
  1356. int ret = 0;
  1357. pdata = dev_get_platdata(rouleur->dev);
  1358. if (!pdata) {
  1359. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1360. return -EINVAL;
  1361. }
  1362. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1363. w->name, event);
  1364. switch (event) {
  1365. case SND_SOC_DAPM_PRE_PMU:
  1366. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1367. dev_dbg(component->dev,
  1368. "%s: vpos already in enabled state\n",
  1369. __func__);
  1370. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1371. return 0;
  1372. }
  1373. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1374. rouleur->supplies,
  1375. pdata->regulator,
  1376. pdata->num_supplies,
  1377. "cdc-pa-vpos");
  1378. if (ret == -EINVAL) {
  1379. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1380. __func__);
  1381. return ret;
  1382. }
  1383. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1384. /*
  1385. * 200us sleep is required after LDO15 is enabled as per
  1386. * HW requirement
  1387. */
  1388. usleep_range(200, 250);
  1389. break;
  1390. case SND_SOC_DAPM_POST_PMD:
  1391. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1392. break;
  1393. }
  1394. return 0;
  1395. }
  1396. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1397. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1398. rouleur_get_compander, rouleur_set_compander),
  1399. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1400. rouleur_get_compander, rouleur_set_compander),
  1401. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1402. line_gain),
  1403. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1404. line_gain),
  1405. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1406. analog_gain),
  1407. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1408. analog_gain),
  1409. };
  1410. static const struct snd_kcontrol_new adc1_switch[] = {
  1411. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1412. };
  1413. static const struct snd_kcontrol_new adc2_switch[] = {
  1414. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1415. };
  1416. static const struct snd_kcontrol_new dmic1_switch[] = {
  1417. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1418. };
  1419. static const struct snd_kcontrol_new dmic2_switch[] = {
  1420. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1421. };
  1422. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1423. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1424. };
  1425. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1426. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1427. };
  1428. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1429. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1430. };
  1431. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1432. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1433. };
  1434. static const char * const adc2_mux_text[] = {
  1435. "INP2", "INP3"
  1436. };
  1437. static const struct soc_enum adc2_enum =
  1438. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1439. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1440. static const struct snd_kcontrol_new tx_adc2_mux =
  1441. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1442. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1443. /*input widgets*/
  1444. SND_SOC_DAPM_INPUT("AMIC1"),
  1445. SND_SOC_DAPM_INPUT("AMIC2"),
  1446. SND_SOC_DAPM_INPUT("AMIC3"),
  1447. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1448. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1449. /*tx widgets*/
  1450. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1451. rouleur_codec_enable_adc,
  1452. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1453. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1454. rouleur_codec_enable_adc,
  1455. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1456. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1457. &tx_adc2_mux),
  1458. /*tx mixers*/
  1459. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1460. adc1_switch, ARRAY_SIZE(adc1_switch),
  1461. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1462. SND_SOC_DAPM_POST_PMD),
  1463. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1464. adc2_switch, ARRAY_SIZE(adc2_switch),
  1465. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1466. SND_SOC_DAPM_POST_PMD),
  1467. /* micbias widgets*/
  1468. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1469. rouleur_codec_enable_micbias,
  1470. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1471. SND_SOC_DAPM_POST_PMD),
  1472. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1473. rouleur_codec_enable_micbias,
  1474. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1475. SND_SOC_DAPM_POST_PMD),
  1476. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1477. rouleur_codec_enable_micbias,
  1478. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1479. SND_SOC_DAPM_POST_PMD),
  1480. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1481. rouleur_codec_enable_pa_vpos,
  1482. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1483. /*rx widgets*/
  1484. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1485. rouleur_codec_enable_ear_pa,
  1486. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1487. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1488. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1489. rouleur_codec_enable_lo_pa,
  1490. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1491. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1492. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1493. 0, rouleur_codec_enable_hphl_pa,
  1494. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1495. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1496. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1497. 0, rouleur_codec_enable_hphr_pa,
  1498. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1499. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1500. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1501. rouleur_codec_hphl_dac_event,
  1502. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1503. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1504. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1505. rouleur_codec_hphr_dac_event,
  1506. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1507. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1508. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1509. rouleur_codec_ear_lo_dac_event,
  1510. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1511. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1512. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1513. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1514. SND_SOC_DAPM_POST_PMD),
  1515. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1516. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1517. SND_SOC_DAPM_POST_PMD),
  1518. /* rx mixer widgets*/
  1519. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1520. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1521. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1522. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1523. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1524. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1525. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1526. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1527. /*output widgets tx*/
  1528. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1529. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1530. /*output widgets rx*/
  1531. SND_SOC_DAPM_OUTPUT("EAR"),
  1532. SND_SOC_DAPM_OUTPUT("LO"),
  1533. SND_SOC_DAPM_OUTPUT("HPHL"),
  1534. SND_SOC_DAPM_OUTPUT("HPHR"),
  1535. /* micbias pull up widgets*/
  1536. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1537. rouleur_codec_enable_micbias_pullup,
  1538. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1539. SND_SOC_DAPM_POST_PMD),
  1540. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1541. rouleur_codec_enable_micbias_pullup,
  1542. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1543. SND_SOC_DAPM_POST_PMD),
  1544. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1545. rouleur_codec_enable_micbias_pullup,
  1546. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1547. SND_SOC_DAPM_POST_PMD),
  1548. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1549. rouleur_codec_enable_dmic,
  1550. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1551. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1552. rouleur_codec_enable_dmic,
  1553. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1554. /*tx mixer widgets*/
  1555. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1556. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1557. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1558. SND_SOC_DAPM_POST_PMD),
  1559. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1560. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1561. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1562. SND_SOC_DAPM_POST_PMD),
  1563. /*output widgets*/
  1564. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1565. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1566. };
  1567. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1568. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1569. {"ADC1_MIXER", "Switch", "ADC1"},
  1570. {"ADC1", NULL, "AMIC1"},
  1571. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1572. {"ADC2_MIXER", "Switch", "ADC2"},
  1573. {"ADC2", NULL, "ADC2 MUX"},
  1574. {"ADC2 MUX", "INP3", "AMIC3"},
  1575. {"ADC2 MUX", "INP2", "AMIC2"},
  1576. {"IN1_HPHL", NULL, "PA_VPOS"},
  1577. {"RX1", NULL, "IN1_HPHL"},
  1578. {"RDAC1", NULL, "RX1"},
  1579. {"HPHL_RDAC", "Switch", "RDAC1"},
  1580. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1581. {"HPHL", NULL, "HPHL PGA"},
  1582. {"IN2_HPHR", NULL, "PA_VPOS"},
  1583. {"RX2", NULL, "IN2_HPHR"},
  1584. {"RDAC2", NULL, "RX2"},
  1585. {"HPHR_RDAC", "Switch", "RDAC2"},
  1586. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1587. {"HPHR", NULL, "HPHR PGA"},
  1588. {"RDAC3", NULL, "RX1"},
  1589. {"EAR_RDAC", "Switch", "RDAC3"},
  1590. {"EAR PGA", NULL, "EAR_RDAC"},
  1591. {"EAR", NULL, "EAR PGA"},
  1592. {"RDAC3", NULL, "RX1"},
  1593. {"LO_RDAC", "Switch", "RDAC3"},
  1594. {"LO PGA", NULL, "LO_RDAC"},
  1595. {"LO", NULL, "LO PGA"},
  1596. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1597. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1598. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1599. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1600. };
  1601. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1602. void *file_private_data,
  1603. struct file *file,
  1604. char __user *buf, size_t count,
  1605. loff_t pos)
  1606. {
  1607. struct rouleur_priv *priv;
  1608. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1609. int len = 0;
  1610. priv = (struct rouleur_priv *) entry->private_data;
  1611. if (!priv) {
  1612. pr_err("%s: rouleur priv is null\n", __func__);
  1613. return -EINVAL;
  1614. }
  1615. switch (priv->version) {
  1616. case ROULEUR_VERSION_1_0:
  1617. len = snprintf(buffer, sizeof(buffer), "rouleur_1_0\n");
  1618. break;
  1619. default:
  1620. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1621. }
  1622. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1623. }
  1624. static struct snd_info_entry_ops rouleur_info_ops = {
  1625. .read = rouleur_version_read,
  1626. };
  1627. /*
  1628. * rouleur_info_create_codec_entry - creates rouleur module
  1629. * @codec_root: The parent directory
  1630. * @component: component instance
  1631. *
  1632. * Creates rouleur module and version entry under the given
  1633. * parent directory.
  1634. *
  1635. * Return: 0 on success or negative error code on failure.
  1636. */
  1637. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1638. struct snd_soc_component *component)
  1639. {
  1640. struct snd_info_entry *version_entry;
  1641. struct rouleur_priv *priv;
  1642. struct snd_soc_card *card;
  1643. if (!codec_root || !component)
  1644. return -EINVAL;
  1645. priv = snd_soc_component_get_drvdata(component);
  1646. if (priv->entry) {
  1647. dev_dbg(priv->dev,
  1648. "%s:rouleur module already created\n", __func__);
  1649. return 0;
  1650. }
  1651. card = component->card;
  1652. priv->entry = snd_info_create_subdir(codec_root->module,
  1653. "rouleur", codec_root);
  1654. if (!priv->entry) {
  1655. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1656. __func__);
  1657. return -ENOMEM;
  1658. }
  1659. version_entry = snd_info_create_card_entry(card->snd_card,
  1660. "version",
  1661. priv->entry);
  1662. if (!version_entry) {
  1663. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1664. __func__);
  1665. return -ENOMEM;
  1666. }
  1667. version_entry->private_data = priv;
  1668. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1669. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1670. version_entry->c.ops = &rouleur_info_ops;
  1671. if (snd_info_register(version_entry) < 0) {
  1672. snd_info_free_entry(version_entry);
  1673. return -ENOMEM;
  1674. }
  1675. priv->version_entry = version_entry;
  1676. return 0;
  1677. }
  1678. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1679. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1680. struct rouleur_pdata *pdata)
  1681. {
  1682. int vout_ctl = 0;
  1683. int rc = 0;
  1684. if (!pdata) {
  1685. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1686. return -ENODEV;
  1687. }
  1688. /* set micbias voltage */
  1689. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1690. if (vout_ctl < 0) {
  1691. rc = -EINVAL;
  1692. goto done;
  1693. }
  1694. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1695. 0xF8, vout_ctl);
  1696. done:
  1697. return rc;
  1698. }
  1699. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1700. {
  1701. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1702. struct snd_soc_dapm_context *dapm =
  1703. snd_soc_component_get_dapm(component);
  1704. int ret = -EINVAL;
  1705. dev_info(component->dev, "%s()\n", __func__);
  1706. rouleur = snd_soc_component_get_drvdata(component);
  1707. if (!rouleur)
  1708. return -EINVAL;
  1709. rouleur->component = component;
  1710. snd_soc_component_init_regmap(component, rouleur->regmap);
  1711. rouleur->fw_data = devm_kzalloc(component->dev,
  1712. sizeof(*(rouleur->fw_data)),
  1713. GFP_KERNEL);
  1714. if (!rouleur->fw_data) {
  1715. dev_err(component->dev, "Failed to allocate fw_data\n");
  1716. ret = -ENOMEM;
  1717. goto done;
  1718. }
  1719. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1720. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1721. WCD9XXX_CODEC_HWDEP_NODE, component);
  1722. if (ret < 0) {
  1723. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1724. goto done;
  1725. }
  1726. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1727. if (ret) {
  1728. pr_err("%s: mbhc initialization failed\n", __func__);
  1729. goto done;
  1730. }
  1731. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1732. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1733. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1734. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1735. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1736. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1737. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1738. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1739. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1740. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1741. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1742. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1743. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1744. snd_soc_dapm_sync(dapm);
  1745. rouleur_init_reg(component);
  1746. rouleur->version = ROULEUR_VERSION_1_0;
  1747. /* Register event notifier */
  1748. rouleur->nblock.notifier_call = rouleur_event_notify;
  1749. if (rouleur->register_notifier) {
  1750. ret = rouleur->register_notifier(rouleur->handle,
  1751. &rouleur->nblock,
  1752. true);
  1753. if (ret) {
  1754. dev_err(component->dev,
  1755. "%s: Failed to register notifier %d\n",
  1756. __func__, ret);
  1757. return ret;
  1758. }
  1759. }
  1760. done:
  1761. return ret;
  1762. }
  1763. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1764. {
  1765. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1766. if (!rouleur)
  1767. return;
  1768. if (rouleur->register_notifier)
  1769. rouleur->register_notifier(rouleur->handle,
  1770. &rouleur->nblock,
  1771. false);
  1772. }
  1773. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  1774. .name = DRV_NAME,
  1775. .probe = rouleur_soc_codec_probe,
  1776. .remove = rouleur_soc_codec_remove,
  1777. .controls = rouleur_snd_controls,
  1778. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  1779. .dapm_widgets = rouleur_dapm_widgets,
  1780. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  1781. .dapm_routes = rouleur_audio_map,
  1782. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  1783. };
  1784. #ifdef CONFIG_PM_SLEEP
  1785. static int rouleur_suspend(struct device *dev)
  1786. {
  1787. struct rouleur_priv *rouleur = NULL;
  1788. int ret = 0;
  1789. struct rouleur_pdata *pdata = NULL;
  1790. if (!dev)
  1791. return -ENODEV;
  1792. rouleur = dev_get_drvdata(dev);
  1793. if (!rouleur)
  1794. return -EINVAL;
  1795. pdata = dev_get_platdata(rouleur->dev);
  1796. if (!pdata) {
  1797. dev_err(dev, "%s: pdata is NULL\n", __func__);
  1798. return -EINVAL;
  1799. }
  1800. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1801. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  1802. rouleur->supplies,
  1803. pdata->regulator,
  1804. pdata->num_supplies,
  1805. "cdc-pa-vpos");
  1806. if (ret == -EINVAL) {
  1807. dev_err(dev, "%s: pa vpos is not disabled\n",
  1808. __func__);
  1809. return 0;
  1810. }
  1811. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1812. }
  1813. return 0;
  1814. }
  1815. static int rouleur_resume(struct device *dev)
  1816. {
  1817. return 0;
  1818. }
  1819. #endif
  1820. static int rouleur_reset(struct device *dev, int reset_val)
  1821. {
  1822. struct rouleur_priv *rouleur = NULL;
  1823. if (!dev)
  1824. return -ENODEV;
  1825. rouleur = dev_get_drvdata(dev);
  1826. if (!rouleur)
  1827. return -EINVAL;
  1828. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  1829. return 0;
  1830. }
  1831. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  1832. u32 *val)
  1833. {
  1834. int rc = 0;
  1835. rc = of_property_read_u32(dev->of_node, name, val);
  1836. if (rc)
  1837. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1838. __func__, name, dev->of_node->full_name);
  1839. return rc;
  1840. }
  1841. static void rouleur_dt_parse_micbias_info(struct device *dev,
  1842. struct rouleur_micbias_setting *mb)
  1843. {
  1844. u32 prop_val = 0;
  1845. int rc = 0;
  1846. /* MB1 */
  1847. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  1848. NULL)) {
  1849. rc = rouleur_read_of_property_u32(dev,
  1850. "qcom,cdc-micbias1-mv",
  1851. &prop_val);
  1852. if (!rc)
  1853. mb->micb1_mv = prop_val;
  1854. } else {
  1855. dev_info(dev, "%s: Micbias1 DT property not found\n",
  1856. __func__);
  1857. }
  1858. /* MB2 */
  1859. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  1860. NULL)) {
  1861. rc = rouleur_read_of_property_u32(dev,
  1862. "qcom,cdc-micbias2-mv",
  1863. &prop_val);
  1864. if (!rc)
  1865. mb->micb2_mv = prop_val;
  1866. } else {
  1867. dev_info(dev, "%s: Micbias2 DT property not found\n",
  1868. __func__);
  1869. }
  1870. /* MB3 */
  1871. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  1872. NULL)) {
  1873. rc = rouleur_read_of_property_u32(dev,
  1874. "qcom,cdc-micbias3-mv",
  1875. &prop_val);
  1876. if (!rc)
  1877. mb->micb3_mv = prop_val;
  1878. } else {
  1879. dev_info(dev, "%s: Micbias3 DT property not found\n",
  1880. __func__);
  1881. }
  1882. }
  1883. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  1884. {
  1885. struct rouleur_pdata *pdata = NULL;
  1886. u32 reg;
  1887. int ret = 0;
  1888. pdata = kzalloc(sizeof(struct rouleur_pdata),
  1889. GFP_KERNEL);
  1890. if (!pdata)
  1891. return NULL;
  1892. pdata->spmi_np = of_parse_phandle(dev->of_node,
  1893. "qcom,pmic-spmi-node", 0);
  1894. if (!pdata->spmi_np) {
  1895. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1896. __func__, "qcom,pmic-spmi-node",
  1897. dev->of_node->full_name);
  1898. kfree(pdata);
  1899. return NULL;
  1900. }
  1901. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  1902. if (ret) {
  1903. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  1904. __func__, ret);
  1905. kfree(pdata);
  1906. return NULL;
  1907. }
  1908. pdata->reset_reg = reg;
  1909. /* Parse power supplies */
  1910. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  1911. &pdata->num_supplies);
  1912. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  1913. dev_err(dev, "%s: no power supplies defined for codec\n",
  1914. __func__);
  1915. kfree(pdata);
  1916. return NULL;
  1917. }
  1918. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1919. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1920. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  1921. return pdata;
  1922. }
  1923. static int rouleur_wakeup(void *handle, bool enable)
  1924. {
  1925. struct rouleur_priv *priv;
  1926. if (!handle) {
  1927. pr_err("%s: NULL handle\n", __func__);
  1928. return -EINVAL;
  1929. }
  1930. priv = (struct rouleur_priv *)handle;
  1931. if (!priv->tx_swr_dev) {
  1932. pr_err("%s: tx swr dev is NULL\n", __func__);
  1933. return -EINVAL;
  1934. }
  1935. if (enable)
  1936. return swr_device_wakeup_vote(priv->tx_swr_dev);
  1937. else
  1938. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  1939. }
  1940. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  1941. {
  1942. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  1943. __func__, irq);
  1944. return IRQ_HANDLED;
  1945. }
  1946. static int rouleur_bind(struct device *dev)
  1947. {
  1948. int ret = 0, i = 0;
  1949. struct rouleur_priv *rouleur = NULL;
  1950. struct rouleur_pdata *pdata = NULL;
  1951. struct wcd_ctrl_platform_data *plat_data = NULL;
  1952. struct platform_device *pdev = NULL;
  1953. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  1954. if (!rouleur)
  1955. return -ENOMEM;
  1956. dev_set_drvdata(dev, rouleur);
  1957. pdata = rouleur_populate_dt_data(dev);
  1958. if (!pdata) {
  1959. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1960. kfree(rouleur);
  1961. return -EINVAL;
  1962. }
  1963. rouleur->dev = dev;
  1964. rouleur->dev->platform_data = pdata;
  1965. pdev = of_find_device_by_node(pdata->spmi_np);
  1966. if (!pdev) {
  1967. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  1968. __func__);
  1969. ret = -EINVAL;
  1970. goto err_bind_all;
  1971. }
  1972. rouleur->spmi_dev = &pdev->dev;
  1973. rouleur->reset_reg = pdata->reset_reg;
  1974. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  1975. pdata->regulator, pdata->num_supplies);
  1976. if (!rouleur->supplies) {
  1977. dev_err(dev, "%s: Cannot init wcd supplies\n",
  1978. __func__);
  1979. goto err_bind_all;
  1980. }
  1981. plat_data = dev_get_platdata(dev->parent);
  1982. if (!plat_data) {
  1983. dev_err(dev, "%s: platform data from parent is NULL\n",
  1984. __func__);
  1985. ret = -EINVAL;
  1986. goto err_bind_all;
  1987. }
  1988. rouleur->handle = (void *)plat_data->handle;
  1989. if (!rouleur->handle) {
  1990. dev_err(dev, "%s: handle is NULL\n", __func__);
  1991. ret = -EINVAL;
  1992. goto err_bind_all;
  1993. }
  1994. rouleur->update_wcd_event = plat_data->update_wcd_event;
  1995. if (!rouleur->update_wcd_event) {
  1996. dev_err(dev, "%s: update_wcd_event api is null!\n",
  1997. __func__);
  1998. ret = -EINVAL;
  1999. goto err_bind_all;
  2000. }
  2001. rouleur->register_notifier = plat_data->register_notifier;
  2002. if (!rouleur->register_notifier) {
  2003. dev_err(dev, "%s: register_notifier api is null!\n",
  2004. __func__);
  2005. ret = -EINVAL;
  2006. goto err_bind_all;
  2007. }
  2008. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2009. pdata->regulator,
  2010. pdata->num_supplies);
  2011. if (ret) {
  2012. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2013. __func__);
  2014. goto err_bind_all;
  2015. }
  2016. rouleur_reset(dev, 0x01);
  2017. usleep_range(20, 30);
  2018. rouleur_reset(dev, 0x00);
  2019. /*
  2020. * Add 5msec delay to provide sufficient time for
  2021. * soundwire auto enumeration of slave devices as
  2022. * as per HW requirement.
  2023. */
  2024. usleep_range(5000, 5010);
  2025. rouleur->wakeup = rouleur_wakeup;
  2026. ret = component_bind_all(dev, rouleur);
  2027. if (ret) {
  2028. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2029. __func__, ret);
  2030. goto err_bind_all;
  2031. }
  2032. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2033. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2034. if (ret) {
  2035. dev_err(dev, "Failed to read port mapping\n");
  2036. goto err;
  2037. }
  2038. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2039. if (!rouleur->rx_swr_dev) {
  2040. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2041. __func__);
  2042. ret = -ENODEV;
  2043. goto err;
  2044. }
  2045. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2046. if (!rouleur->tx_swr_dev) {
  2047. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2048. __func__);
  2049. ret = -ENODEV;
  2050. goto err;
  2051. }
  2052. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2053. &rouleur_regmap_config);
  2054. if (!rouleur->regmap) {
  2055. dev_err(dev, "%s: Regmap init failed\n",
  2056. __func__);
  2057. goto err;
  2058. }
  2059. /* Set all interupts as edge triggered */
  2060. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2061. regmap_write(rouleur->regmap,
  2062. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2063. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2064. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2065. rouleur->irq_info.codec_name = "rouleur";
  2066. rouleur->irq_info.regmap = rouleur->regmap;
  2067. rouleur->irq_info.dev = dev;
  2068. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2069. if (ret) {
  2070. dev_err(dev, "%s: IRQ init failed: %d\n",
  2071. __func__, ret);
  2072. goto err;
  2073. }
  2074. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2075. mutex_init(&rouleur->micb_lock);
  2076. mutex_init(&rouleur->main_bias_lock);
  2077. mutex_init(&rouleur->rx_clk_lock);
  2078. ret = rouleur_set_micbias_data(rouleur, pdata);
  2079. if (ret < 0) {
  2080. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2081. goto err_irq;
  2082. }
  2083. /* Request for watchdog interrupt */
  2084. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2085. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2086. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2087. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2088. /* Disable watchdog interrupt for HPH */
  2089. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2090. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2091. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2092. NULL, 0);
  2093. if (ret) {
  2094. dev_err(dev, "%s: Codec registration failed\n",
  2095. __func__);
  2096. goto err_irq;
  2097. }
  2098. return ret;
  2099. err_irq:
  2100. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2101. mutex_destroy(&rouleur->micb_lock);
  2102. mutex_destroy(&rouleur->main_bias_lock);
  2103. mutex_destroy(&rouleur->rx_clk_lock);
  2104. err:
  2105. component_unbind_all(dev, rouleur);
  2106. err_bind_all:
  2107. dev_set_drvdata(dev, NULL);
  2108. kfree(pdata);
  2109. kfree(rouleur);
  2110. return ret;
  2111. }
  2112. static void rouleur_unbind(struct device *dev)
  2113. {
  2114. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2115. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2116. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2117. snd_soc_unregister_component(dev);
  2118. component_unbind_all(dev, rouleur);
  2119. mutex_destroy(&rouleur->micb_lock);
  2120. mutex_destroy(&rouleur->main_bias_lock);
  2121. mutex_destroy(&rouleur->rx_clk_lock);
  2122. dev_set_drvdata(dev, NULL);
  2123. kfree(pdata);
  2124. kfree(rouleur);
  2125. }
  2126. static const struct of_device_id rouleur_dt_match[] = {
  2127. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2128. {}
  2129. };
  2130. static const struct component_master_ops rouleur_comp_ops = {
  2131. .bind = rouleur_bind,
  2132. .unbind = rouleur_unbind,
  2133. };
  2134. static int rouleur_compare_of(struct device *dev, void *data)
  2135. {
  2136. return dev->of_node == data;
  2137. }
  2138. static void rouleur_release_of(struct device *dev, void *data)
  2139. {
  2140. of_node_put(data);
  2141. }
  2142. static int rouleur_add_slave_components(struct device *dev,
  2143. struct component_match **matchptr)
  2144. {
  2145. struct device_node *np, *rx_node, *tx_node;
  2146. np = dev->of_node;
  2147. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2148. if (!rx_node) {
  2149. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2150. return -ENODEV;
  2151. }
  2152. of_node_get(rx_node);
  2153. component_match_add_release(dev, matchptr,
  2154. rouleur_release_of,
  2155. rouleur_compare_of,
  2156. rx_node);
  2157. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2158. if (!tx_node) {
  2159. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2160. return -ENODEV;
  2161. }
  2162. of_node_get(tx_node);
  2163. component_match_add_release(dev, matchptr,
  2164. rouleur_release_of,
  2165. rouleur_compare_of,
  2166. tx_node);
  2167. return 0;
  2168. }
  2169. static int rouleur_probe(struct platform_device *pdev)
  2170. {
  2171. struct component_match *match = NULL;
  2172. int ret;
  2173. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2174. if (ret)
  2175. return ret;
  2176. return component_master_add_with_match(&pdev->dev,
  2177. &rouleur_comp_ops, match);
  2178. }
  2179. static int rouleur_remove(struct platform_device *pdev)
  2180. {
  2181. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2182. dev_set_drvdata(&pdev->dev, NULL);
  2183. return 0;
  2184. }
  2185. #ifdef CONFIG_PM_SLEEP
  2186. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2187. SET_SYSTEM_SLEEP_PM_OPS(
  2188. rouleur_suspend,
  2189. rouleur_resume
  2190. )
  2191. };
  2192. #endif
  2193. static struct platform_driver rouleur_codec_driver = {
  2194. .probe = rouleur_probe,
  2195. .remove = rouleur_remove,
  2196. .driver = {
  2197. .name = "rouleur_codec",
  2198. .owner = THIS_MODULE,
  2199. .of_match_table = of_match_ptr(rouleur_dt_match),
  2200. #ifdef CONFIG_PM_SLEEP
  2201. .pm = &rouleur_dev_pm_ops,
  2202. #endif
  2203. .suppress_bind_attrs = true,
  2204. },
  2205. };
  2206. module_platform_driver(rouleur_codec_driver);
  2207. MODULE_DESCRIPTION("Rouleur Codec driver");
  2208. MODULE_LICENSE("GPL v2");