cvp_hfi.c 117 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/iommu.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/soc/qcom/llcc-qcom.h>
  21. #include <linux/qcom_scm.h>
  22. #include <linux/soc/qcom/smem.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/reset.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #define FIRMWARE_SIZE 0X00A00000
  32. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  33. #define QDSS_IOVA_START 0x80001000
  34. #define MIN_PAYLOAD_SIZE 3
  35. const struct msm_cvp_hfi_defs cvp_hfi_defs[] = {
  36. {
  37. .size = HFI_DFS_CONFIG_CMD_SIZE,
  38. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  39. .buf_offset = 0,
  40. .buf_num = 0,
  41. .resp = HAL_SESSION_DFS_CONFIG_CMD_DONE,
  42. },
  43. {
  44. .size = HFI_DFS_FRAME_CMD_SIZE,
  45. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  46. .buf_offset = HFI_DFS_FRAME_BUFFERS_OFFSET,
  47. .buf_num = HFI_DFS_BUF_NUM,
  48. .resp = HAL_NO_RESP,
  49. },
  50. {
  51. .size = 0xFFFFFFFF,
  52. .type = HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG,
  53. .buf_offset = 0,
  54. .buf_num = 0,
  55. .resp = HAL_SESSION_WARP_NCC_CONFIG_CMD_DONE,
  56. },
  57. {
  58. .size = 0xFFFFFFFF,
  59. .type = HFI_CMD_SESSION_CVP_WARP_NCC_FRAME,
  60. .buf_offset = 0,
  61. .buf_num = 0,
  62. .resp = HAL_NO_RESP,
  63. },
  64. {
  65. .size = 0xFFFFFFFF,
  66. .type = HFI_CMD_SESSION_CVP_WARP_CONFIG,
  67. .buf_offset = 0,
  68. .buf_num = 0,
  69. .resp = HAL_SESSION_WARP_CONFIG_CMD_DONE,
  70. },
  71. {
  72. .size = 0xFFFFFFFF,
  73. .type = HFI_CMD_SESSION_CVP_WARP_DS_PARAMS,
  74. .buf_offset = 0,
  75. .buf_num = 0,
  76. .resp = HAL_SESSION_WARP_DS_PARAMS_CMD_DONE,
  77. },
  78. {
  79. .size = 0xFFFFFFFF,
  80. .type = HFI_CMD_SESSION_CVP_WARP_FRAME,
  81. .buf_offset = 0,
  82. .buf_num = 0,
  83. .resp = HAL_NO_RESP,
  84. },
  85. {
  86. .size = HFI_DMM_CONFIG_CMD_SIZE,
  87. .type = HFI_CMD_SESSION_CVP_DMM_CONFIG,
  88. .buf_offset = 0,
  89. .buf_num = 0,
  90. .resp = HAL_SESSION_DMM_CONFIG_CMD_DONE,
  91. },
  92. {
  93. .size = 0xFFFFFFFF,
  94. .type = HFI_CMD_SESSION_CVP_DMM_PARAMS,
  95. .buf_offset = 0,
  96. .buf_num = 0,
  97. .resp = HAL_SESSION_DMM_PARAMS_CMD_DONE,
  98. },
  99. {
  100. .size = HFI_DMM_FRAME_CMD_SIZE,
  101. .type = HFI_CMD_SESSION_CVP_DMM_FRAME,
  102. .buf_offset = HFI_DMM_FRAME_BUFFERS_OFFSET,
  103. .buf_num = HFI_DMM_BUF_NUM,
  104. .resp = HAL_NO_RESP,
  105. },
  106. {
  107. .size = HFI_PERSIST_CMD_SIZE,
  108. .type = HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  109. .buf_offset = HFI_PERSIST_BUFFERS_OFFSET,
  110. .buf_num = HFI_PERSIST_BUF_NUM,
  111. .resp = HAL_SESSION_PERSIST_SET_DONE,
  112. },
  113. {
  114. .size = 0xffffffff,
  115. .type = HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  116. .buf_offset = 0,
  117. .buf_num = 0,
  118. .resp = HAL_SESSION_PERSIST_REL_DONE,
  119. },
  120. {
  121. .size = HFI_DS_CMD_SIZE,
  122. .type = HFI_CMD_SESSION_CVP_DS,
  123. .buf_offset = HFI_DS_BUFFERS_OFFSET,
  124. .buf_num = HFI_DS_BUF_NUM,
  125. .resp = HAL_NO_RESP,
  126. },
  127. {
  128. .size = HFI_OF_CONFIG_CMD_SIZE,
  129. .type = HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  130. .buf_offset = 0,
  131. .buf_num = 0,
  132. .resp = HAL_SESSION_TME_CONFIG_CMD_DONE,
  133. },
  134. {
  135. .size = HFI_OF_FRAME_CMD_SIZE,
  136. .type = HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  137. .buf_offset = HFI_OF_BUFFERS_OFFSET,
  138. .buf_num = HFI_OF_BUF_NUM,
  139. .resp = HAL_NO_RESP,
  140. },
  141. {
  142. .size = HFI_ODT_CONFIG_CMD_SIZE,
  143. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  144. .buf_offset = 0,
  145. .buf_num = 0,
  146. .resp = HAL_SESSION_ODT_CONFIG_CMD_DONE,
  147. },
  148. {
  149. .size = HFI_ODT_FRAME_CMD_SIZE,
  150. .type = HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  151. .buf_offset = HFI_ODT_BUFFERS_OFFSET,
  152. .buf_num = HFI_ODT_BUF_NUM,
  153. .resp = HAL_NO_RESP,
  154. },
  155. {
  156. .size = HFI_OD_CONFIG_CMD_SIZE,
  157. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  158. .buf_offset = 0,
  159. .buf_num = 0,
  160. .resp = HAL_SESSION_OD_CONFIG_CMD_DONE,
  161. },
  162. {
  163. .size = HFI_OD_FRAME_CMD_SIZE,
  164. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  165. .buf_offset = HFI_OD_BUFFERS_OFFSET,
  166. .buf_num = HFI_OD_BUF_NUM,
  167. .resp = HAL_NO_RESP,
  168. },
  169. {
  170. .size = HFI_NCC_CONFIG_CMD_SIZE,
  171. .type = HFI_CMD_SESSION_CVP_NCC_CONFIG,
  172. .buf_offset = 0,
  173. .buf_num = 0,
  174. .resp = HAL_SESSION_NCC_CONFIG_CMD_DONE,
  175. },
  176. {
  177. .size = HFI_NCC_FRAME_CMD_SIZE,
  178. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  179. .buf_offset = HFI_NCC_BUFFERS_OFFSET,
  180. .buf_num = HFI_NCC_BUF_NUM,
  181. .resp = HAL_NO_RESP,
  182. },
  183. {
  184. .size = HFI_ICA_CONFIG_CMD_SIZE,
  185. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  186. .buf_offset = 0,
  187. .buf_num = 0,
  188. .resp = HAL_SESSION_ICA_CONFIG_CMD_DONE,
  189. },
  190. {
  191. .size = HFI_ICA_FRAME_CMD_SIZE,
  192. .type = HFI_CMD_SESSION_CVP_ICA_FRAME,
  193. .buf_offset = HFI_ICA_BUFFERS_OFFSET,
  194. .buf_num = HFI_ICA_BUF_NUM,
  195. .resp = HAL_NO_RESP,
  196. },
  197. {
  198. .size = HFI_HCD_CONFIG_CMD_SIZE,
  199. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  200. .buf_offset = 0,
  201. .buf_num = 0,
  202. .resp = HAL_SESSION_HCD_CONFIG_CMD_DONE,
  203. },
  204. {
  205. .size = HFI_HCD_FRAME_CMD_SIZE,
  206. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  207. .buf_offset = HFI_HCD_BUFFERS_OFFSET,
  208. .buf_num = HFI_HCD_BUF_NUM,
  209. .resp = HAL_NO_RESP,
  210. },
  211. {
  212. .size = HFI_DCM_CONFIG_CMD_SIZE,
  213. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  214. .buf_offset = 0,
  215. .buf_num = 0,
  216. .resp = HAL_SESSION_DC_CONFIG_CMD_DONE,
  217. },
  218. {
  219. .size = HFI_DCM_FRAME_CMD_SIZE,
  220. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  221. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  222. .buf_num = HFI_DCM_BUF_NUM,
  223. .resp = HAL_NO_RESP,
  224. },
  225. {
  226. .size = HFI_DCM_CONFIG_CMD_SIZE,
  227. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  228. .buf_offset = 0,
  229. .buf_num = 0,
  230. .resp = HAL_SESSION_DCM_CONFIG_CMD_DONE,
  231. },
  232. {
  233. .size = HFI_DCM_FRAME_CMD_SIZE,
  234. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  235. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  236. .buf_num = HFI_DCM_BUF_NUM,
  237. .resp = HAL_NO_RESP,
  238. },
  239. {
  240. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  241. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  242. .buf_offset = 0,
  243. .buf_num = 0,
  244. .resp = HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE,
  245. },
  246. {
  247. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  248. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  249. .buf_offset = HFI_PYS_HCD_BUFFERS_OFFSET,
  250. .buf_num = HFI_PYS_HCD_BUF_NUM,
  251. .resp = HAL_NO_RESP,
  252. },
  253. {
  254. .size = 0xFFFFFFFF,
  255. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  256. .buf_offset = 0,
  257. .buf_num = 0,
  258. .resp = HAL_SESSION_MODEL_BUF_CMD_DONE,
  259. },
  260. {
  261. .size = 0xFFFFFFFF,
  262. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  263. .buf_offset = 0,
  264. .buf_num = 0,
  265. .resp = HAL_SESSION_FD_CONFIG_CMD_DONE,
  266. },
  267. {
  268. .size = 0xFFFFFFFF,
  269. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  270. .buf_offset = 0,
  271. .buf_num = 0,
  272. .resp = HAL_NO_RESP,
  273. },
  274. };
  275. struct cvp_tzbsp_memprot {
  276. u32 cp_start;
  277. u32 cp_size;
  278. u32 cp_nonpixel_start;
  279. u32 cp_nonpixel_size;
  280. };
  281. #define TZBSP_PIL_SET_STATE 0xA
  282. #define TZBSP_CVP_PAS_ID 26
  283. /* Poll interval in uS */
  284. #define POLL_INTERVAL_US 50
  285. enum tzbsp_subsys_state {
  286. TZ_SUBSYS_STATE_SUSPEND = 0,
  287. TZ_SUBSYS_STATE_RESUME = 1,
  288. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  289. };
  290. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  291. .data = NULL,
  292. .data_count = 0,
  293. };
  294. const int cvp_max_packets = 32;
  295. static void iris_hfi_pm_handler(struct work_struct *work);
  296. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  297. static inline int __resume(struct iris_hfi_device *device);
  298. static inline int __suspend(struct iris_hfi_device *device);
  299. static int __disable_regulators(struct iris_hfi_device *device);
  300. static int __enable_regulators(struct iris_hfi_device *device);
  301. static inline int __prepare_enable_clks(struct iris_hfi_device *device);
  302. static inline void __disable_unprepare_clks(struct iris_hfi_device *device);
  303. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  304. static int __initialize_packetization(struct iris_hfi_device *device);
  305. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  306. u32 session_id);
  307. static bool __is_session_valid(struct iris_hfi_device *device,
  308. struct cvp_hal_session *session, const char *func);
  309. static int __set_clocks(struct iris_hfi_device *device, u32 freq);
  310. static int __iface_cmdq_write(struct iris_hfi_device *device,
  311. void *pkt);
  312. static int __load_fw(struct iris_hfi_device *device);
  313. static void __unload_fw(struct iris_hfi_device *device);
  314. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  315. static int __enable_subcaches(struct iris_hfi_device *device);
  316. static int __set_subcaches(struct iris_hfi_device *device);
  317. static int __release_subcaches(struct iris_hfi_device *device);
  318. static int __disable_subcaches(struct iris_hfi_device *device);
  319. static int __power_collapse(struct iris_hfi_device *device, bool force);
  320. static int iris_hfi_noc_error_info(void *dev);
  321. static void interrupt_init_iris2(struct iris_hfi_device *device);
  322. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  323. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  324. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  325. static void power_off_iris2(struct iris_hfi_device *device);
  326. static int __set_ubwc_config(struct iris_hfi_device *device);
  327. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  328. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  329. static struct iris_hfi_vpu_ops iris2_ops = {
  330. .interrupt_init = interrupt_init_iris2,
  331. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  332. .clock_config_on_enable = clock_config_on_enable_vpu5,
  333. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  334. .power_off = power_off_iris2,
  335. .noc_error_info = __noc_error_info_iris2,
  336. };
  337. /**
  338. * Utility function to enforce some of our assumptions. Spam calls to this
  339. * in hotspots in code to double check some of the assumptions that we hold.
  340. */
  341. static inline void __strict_check(struct iris_hfi_device *device)
  342. {
  343. msm_cvp_res_handle_fatal_hw_error(device->res,
  344. !mutex_is_locked(&device->lock));
  345. }
  346. static inline void __set_state(struct iris_hfi_device *device,
  347. enum iris_hfi_state state)
  348. {
  349. device->state = state;
  350. }
  351. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  352. {
  353. return device->state != IRIS_STATE_DEINIT;
  354. }
  355. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  356. {
  357. return device->res->sys_cache_present;
  358. }
  359. #define ROW_SIZE 32
  360. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  361. {
  362. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  363. for (i = 0; i < pkt_num; i++)
  364. if (cvp_hfi_defs[i].type == hdr->packet_type)
  365. return i;
  366. return -EINVAL;
  367. }
  368. int get_hfi_version(void)
  369. {
  370. struct msm_cvp_core *core;
  371. struct iris_hfi_device *hfi;
  372. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  373. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  374. return hfi->version;
  375. }
  376. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  377. {
  378. struct msm_cvp_core *core;
  379. struct iris_hfi_device *device;
  380. u32 minor_ver;
  381. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  382. if (core)
  383. device = core->device->hfi_device_data;
  384. else
  385. return 0;
  386. if (!device) {
  387. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  388. return 0;
  389. }
  390. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  391. HFI_VERSION_MINOR_SHIFT;
  392. if (minor_ver < 2)
  393. return sizeof(struct cvp_hfi_msg_session_hdr);
  394. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  395. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  396. else
  397. return sizeof(struct cvp_hfi_msg_session_hdr);
  398. }
  399. unsigned int get_msg_session_id(void *msg)
  400. {
  401. struct cvp_hfi_msg_session_hdr *hdr =
  402. (struct cvp_hfi_msg_session_hdr *)msg;
  403. return hdr->session_id;
  404. }
  405. unsigned int get_msg_errorcode(void *msg)
  406. {
  407. struct cvp_hfi_msg_session_hdr *hdr =
  408. (struct cvp_hfi_msg_session_hdr *)msg;
  409. return hdr->error_type;
  410. }
  411. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  412. unsigned int *error_type, unsigned int *config_id)
  413. {
  414. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  415. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  416. *session_id = cfg->session_id;
  417. *error_type = cfg->error_type;
  418. *config_id = cfg->op_conf_id;
  419. return 0;
  420. }
  421. int get_signal_from_pkt_type(unsigned int type)
  422. {
  423. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  424. for (i = 0; i < pkt_num; i++)
  425. if (cvp_hfi_defs[i].type == type)
  426. return cvp_hfi_defs[i].resp;
  427. return -EINVAL;
  428. }
  429. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  430. {
  431. u32 c = 0, packet_size = *(u32 *)packet;
  432. /*
  433. * row must contain enough for 0xdeadbaad * 8 to be converted into
  434. * "de ad ba ab " * 8 + '\0'
  435. */
  436. char row[3 * ROW_SIZE];
  437. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  438. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  439. packet_size % ROW_SIZE : ROW_SIZE;
  440. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  441. ROW_SIZE, 4, row, sizeof(row), false);
  442. dprintk(log_level, "%s\n", row);
  443. }
  444. }
  445. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  446. {
  447. int rc;
  448. struct cvp_hal_session *temp;
  449. if (msm_cvp_dsp_disable)
  450. return 0;
  451. list_for_each_entry(temp, &device->sess_head, list) {
  452. /* if forceful suspend, don't check session pause info */
  453. if (force)
  454. continue;
  455. /* don't suspend if cvp session is not paused */
  456. if (!(temp->flags & SESSION_PAUSE)) {
  457. dprintk(CVP_DSP,
  458. "%s: cvp session %x not paused\n",
  459. __func__, hash32_ptr(temp));
  460. return -EBUSY;
  461. }
  462. }
  463. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  464. rc = cvp_dsp_suspend(flags);
  465. if (rc) {
  466. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  467. __func__, rc);
  468. return -EINVAL;
  469. }
  470. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  471. return 0;
  472. }
  473. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  474. {
  475. int rc;
  476. if (msm_cvp_dsp_disable)
  477. return 0;
  478. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  479. rc = cvp_dsp_resume(flags);
  480. if (rc) {
  481. dprintk(CVP_ERR,
  482. "%s: dsp resume failed with error %d\n",
  483. __func__, rc);
  484. return rc;
  485. }
  486. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  487. return rc;
  488. }
  489. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  490. {
  491. int rc;
  492. if (msm_cvp_dsp_disable)
  493. return 0;
  494. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  495. rc = cvp_dsp_shutdown(flags);
  496. if (rc) {
  497. dprintk(CVP_ERR,
  498. "%s: dsp shutdown failed with error %d\n",
  499. __func__, rc);
  500. WARN_ON(1);
  501. }
  502. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  503. return rc;
  504. }
  505. static int __acquire_regulator(struct regulator_info *rinfo,
  506. struct iris_hfi_device *device)
  507. {
  508. int rc = 0;
  509. if (rinfo->has_hw_power_collapse) {
  510. rc = regulator_set_mode(rinfo->regulator,
  511. REGULATOR_MODE_NORMAL);
  512. if (rc) {
  513. /*
  514. * This is somewhat fatal, but nothing we can do
  515. * about it. We can't disable the regulator w/o
  516. * getting it back under s/w control
  517. */
  518. dprintk(CVP_WARN,
  519. "Failed to acquire regulator control: %s\n",
  520. rinfo->name);
  521. } else {
  522. dprintk(CVP_PWR,
  523. "Acquire regulator control from HW: %s\n",
  524. rinfo->name);
  525. }
  526. }
  527. if (!regulator_is_enabled(rinfo->regulator)) {
  528. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  529. rinfo->name);
  530. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  531. }
  532. return rc;
  533. }
  534. static int __hand_off_regulator(struct regulator_info *rinfo)
  535. {
  536. int rc = 0;
  537. if (rinfo->has_hw_power_collapse) {
  538. rc = regulator_set_mode(rinfo->regulator,
  539. REGULATOR_MODE_FAST);
  540. if (rc) {
  541. dprintk(CVP_WARN,
  542. "Failed to hand off regulator control: %s\n",
  543. rinfo->name);
  544. } else {
  545. dprintk(CVP_PWR,
  546. "Hand off regulator control to HW: %s\n",
  547. rinfo->name);
  548. }
  549. }
  550. return rc;
  551. }
  552. static int __hand_off_regulators(struct iris_hfi_device *device)
  553. {
  554. struct regulator_info *rinfo;
  555. int rc = 0, c = 0;
  556. iris_hfi_for_each_regulator(device, rinfo) {
  557. rc = __hand_off_regulator(rinfo);
  558. /*
  559. * If one regulator hand off failed, driver should take
  560. * the control for other regulators back.
  561. */
  562. if (rc)
  563. goto err_reg_handoff_failed;
  564. c++;
  565. }
  566. return rc;
  567. err_reg_handoff_failed:
  568. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  569. __acquire_regulator(rinfo, device);
  570. return rc;
  571. }
  572. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  573. bool *rx_req_is_set)
  574. {
  575. struct cvp_hfi_queue_header *queue;
  576. u32 packet_size_in_words, new_write_idx;
  577. u32 empty_space, read_idx, write_idx;
  578. u32 *write_ptr;
  579. if (!qinfo || !packet) {
  580. dprintk(CVP_ERR, "Invalid Params\n");
  581. return -EINVAL;
  582. } else if (!qinfo->q_array.align_virtual_addr) {
  583. dprintk(CVP_WARN, "Queues have already been freed\n");
  584. return -EINVAL;
  585. }
  586. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  587. if (!queue) {
  588. dprintk(CVP_ERR, "queue not present\n");
  589. return -ENOENT;
  590. }
  591. if (msm_cvp_debug & CVP_PKT) {
  592. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  593. __dump_packet(packet, CVP_PKT);
  594. }
  595. packet_size_in_words = (*(u32 *)packet) >> 2;
  596. if (!packet_size_in_words || packet_size_in_words >
  597. qinfo->q_array.mem_size>>2) {
  598. dprintk(CVP_ERR, "Invalid packet size\n");
  599. return -ENODATA;
  600. }
  601. spin_lock(&qinfo->hfi_lock);
  602. read_idx = queue->qhdr_read_idx;
  603. write_idx = queue->qhdr_write_idx;
  604. empty_space = (write_idx >= read_idx) ?
  605. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  606. (read_idx - write_idx);
  607. if (empty_space <= packet_size_in_words) {
  608. queue->qhdr_tx_req = 1;
  609. spin_unlock(&qinfo->hfi_lock);
  610. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  611. empty_space, packet_size_in_words);
  612. return -ENOTEMPTY;
  613. }
  614. queue->qhdr_tx_req = 0;
  615. new_write_idx = write_idx + packet_size_in_words;
  616. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  617. (write_idx << 2));
  618. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  619. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  620. qinfo->q_array.mem_size)) {
  621. spin_unlock(&qinfo->hfi_lock);
  622. dprintk(CVP_ERR, "Invalid write index\n");
  623. return -ENODATA;
  624. }
  625. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  626. memcpy(write_ptr, packet, packet_size_in_words << 2);
  627. } else {
  628. new_write_idx -= qinfo->q_array.mem_size >> 2;
  629. memcpy(write_ptr, packet, (packet_size_in_words -
  630. new_write_idx) << 2);
  631. memcpy((void *)qinfo->q_array.align_virtual_addr,
  632. packet + ((packet_size_in_words - new_write_idx) << 2),
  633. new_write_idx << 2);
  634. }
  635. /*
  636. * Memory barrier to make sure packet is written before updating the
  637. * write index
  638. */
  639. mb();
  640. queue->qhdr_write_idx = new_write_idx;
  641. if (rx_req_is_set)
  642. *rx_req_is_set = queue->qhdr_rx_req == 1;
  643. /*
  644. * Memory barrier to make sure write index is updated before an
  645. * interrupt is raised.
  646. */
  647. mb();
  648. spin_unlock(&qinfo->hfi_lock);
  649. return 0;
  650. }
  651. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  652. u32 *pb_tx_req_is_set)
  653. {
  654. struct cvp_hfi_queue_header *queue;
  655. u32 packet_size_in_words, new_read_idx;
  656. u32 *read_ptr;
  657. u32 receive_request = 0;
  658. u32 read_idx, write_idx;
  659. int rc = 0;
  660. if (!qinfo || !packet || !pb_tx_req_is_set) {
  661. dprintk(CVP_ERR, "Invalid Params\n");
  662. return -EINVAL;
  663. } else if (!qinfo->q_array.align_virtual_addr) {
  664. dprintk(CVP_WARN, "Queues have already been freed\n");
  665. return -EINVAL;
  666. }
  667. /*
  668. * Memory barrier to make sure data is valid before
  669. *reading it
  670. */
  671. mb();
  672. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  673. if (!queue) {
  674. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  675. return -ENOMEM;
  676. }
  677. /*
  678. * Do not set receive request for debug queue, if set,
  679. * Iris generates interrupt for debug messages even
  680. * when there is no response message available.
  681. * In general debug queue will not become full as it
  682. * is being emptied out for every interrupt from Iris.
  683. * Iris will anyway generates interrupt if it is full.
  684. */
  685. spin_lock(&qinfo->hfi_lock);
  686. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  687. receive_request = 1;
  688. read_idx = queue->qhdr_read_idx;
  689. write_idx = queue->qhdr_write_idx;
  690. if (read_idx == write_idx) {
  691. queue->qhdr_rx_req = receive_request;
  692. /*
  693. * mb() to ensure qhdr is updated in main memory
  694. * so that iris reads the updated header values
  695. */
  696. mb();
  697. *pb_tx_req_is_set = 0;
  698. if (write_idx != queue->qhdr_write_idx) {
  699. queue->qhdr_rx_req = 0;
  700. } else {
  701. spin_unlock(&qinfo->hfi_lock);
  702. dprintk(CVP_HFI,
  703. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  704. receive_request ? "message" : "debug",
  705. queue->qhdr_rx_req, queue->qhdr_tx_req,
  706. queue->qhdr_read_idx);
  707. return -ENODATA;
  708. }
  709. }
  710. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  711. (read_idx << 2));
  712. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  713. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  714. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  715. spin_unlock(&qinfo->hfi_lock);
  716. dprintk(CVP_ERR, "Invalid read index\n");
  717. return -ENODATA;
  718. }
  719. packet_size_in_words = (*read_ptr) >> 2;
  720. if (!packet_size_in_words) {
  721. spin_unlock(&qinfo->hfi_lock);
  722. dprintk(CVP_ERR, "Zero packet size\n");
  723. return -ENODATA;
  724. }
  725. new_read_idx = read_idx + packet_size_in_words;
  726. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  727. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  728. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  729. memcpy(packet, read_ptr,
  730. packet_size_in_words << 2);
  731. } else {
  732. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  733. memcpy(packet, read_ptr,
  734. (packet_size_in_words - new_read_idx) << 2);
  735. memcpy(packet + ((packet_size_in_words -
  736. new_read_idx) << 2),
  737. (u8 *)qinfo->q_array.align_virtual_addr,
  738. new_read_idx << 2);
  739. }
  740. } else {
  741. dprintk(CVP_WARN,
  742. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  743. read_idx, packet_size_in_words << 2);
  744. dprintk(CVP_WARN, "Dropping this packet\n");
  745. new_read_idx = write_idx;
  746. rc = -ENODATA;
  747. }
  748. if (new_read_idx != queue->qhdr_write_idx)
  749. queue->qhdr_rx_req = 0;
  750. else
  751. queue->qhdr_rx_req = receive_request;
  752. queue->qhdr_read_idx = new_read_idx;
  753. /*
  754. * mb() to ensure qhdr is updated in main memory
  755. * so that iris reads the updated header values
  756. */
  757. mb();
  758. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  759. spin_unlock(&qinfo->hfi_lock);
  760. if ((msm_cvp_debug & CVP_PKT) &&
  761. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  762. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  763. __dump_packet(packet, CVP_PKT);
  764. }
  765. return rc;
  766. }
  767. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  768. u32 size, u32 align, u32 flags)
  769. {
  770. struct msm_cvp_smem *alloc = &mem->mem_data;
  771. int rc = 0;
  772. if (!dev || !mem || !size) {
  773. dprintk(CVP_ERR, "Invalid Params\n");
  774. return -EINVAL;
  775. }
  776. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  777. rc = msm_cvp_smem_alloc(size, align, flags, 1, (void *)dev->res, alloc);
  778. if (rc) {
  779. dprintk(CVP_ERR, "Alloc failed\n");
  780. rc = -ENOMEM;
  781. goto fail_smem_alloc;
  782. }
  783. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  784. alloc->kvaddr, size);
  785. mem->mem_size = alloc->size;
  786. mem->align_virtual_addr = alloc->kvaddr;
  787. mem->align_device_addr = alloc->device_addr;
  788. return rc;
  789. fail_smem_alloc:
  790. return rc;
  791. }
  792. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  793. {
  794. if (!dev || !mem) {
  795. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  796. return;
  797. }
  798. msm_cvp_smem_free(mem);
  799. }
  800. static void __write_register(struct iris_hfi_device *device,
  801. u32 reg, u32 value)
  802. {
  803. u32 hwiosymaddr = reg;
  804. u8 *base_addr;
  805. if (!device) {
  806. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  807. return;
  808. }
  809. __strict_check(device);
  810. if (!device->power_enabled) {
  811. dprintk(CVP_WARN,
  812. "HFI Write register failed : Power is OFF\n");
  813. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  814. return;
  815. }
  816. base_addr = device->cvp_hal_data->register_base;
  817. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  818. base_addr, hwiosymaddr, value);
  819. base_addr += hwiosymaddr;
  820. writel_relaxed(value, base_addr);
  821. /*
  822. * Memory barrier to make sure value is written into the register.
  823. */
  824. wmb();
  825. }
  826. static int __read_register(struct iris_hfi_device *device, u32 reg)
  827. {
  828. int rc = 0;
  829. u8 *base_addr;
  830. if (!device) {
  831. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  832. return -EINVAL;
  833. }
  834. __strict_check(device);
  835. if (!device->power_enabled) {
  836. dprintk(CVP_WARN,
  837. "HFI Read register failed : Power is OFF\n");
  838. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  839. return -EINVAL;
  840. }
  841. base_addr = device->cvp_hal_data->register_base;
  842. rc = readl_relaxed(base_addr + reg);
  843. /*
  844. * Memory barrier to make sure value is read correctly from the
  845. * register.
  846. */
  847. rmb();
  848. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  849. base_addr, reg, rc);
  850. return rc;
  851. }
  852. static void __set_registers(struct iris_hfi_device *device)
  853. {
  854. struct reg_set *reg_set;
  855. int i;
  856. if (!device->res) {
  857. dprintk(CVP_ERR,
  858. "device resources null, cannot set registers\n");
  859. return;
  860. }
  861. reg_set = &device->res->reg_set;
  862. for (i = 0; i < reg_set->count; i++) {
  863. __write_register(device, reg_set->reg_tbl[i].reg,
  864. reg_set->reg_tbl[i].value);
  865. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  866. reg_set->reg_tbl[i].reg,
  867. reg_set->reg_tbl[i].value);
  868. }
  869. }
  870. /*
  871. * The existence of this function is a hack for 8996 (or certain Iris versions)
  872. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  873. * (after calling __hand_off_regulators()), the values of the threshold
  874. * registers (typically programmed by TZ) are incorrectly reset. As a result
  875. * reprogram these registers at certain agreed upon points.
  876. */
  877. static void __set_threshold_registers(struct iris_hfi_device *device)
  878. {
  879. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  880. version &= ~GENMASK(15, 0);
  881. if (version != (0x3 << 28 | 0x43 << 16))
  882. return;
  883. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  884. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  885. }
  886. static int __unvote_buses(struct iris_hfi_device *device)
  887. {
  888. int rc = 0;
  889. struct bus_info *bus = NULL;
  890. kfree(device->bus_vote.data);
  891. device->bus_vote.data = NULL;
  892. device->bus_vote.data_count = 0;
  893. iris_hfi_for_each_bus(device, bus) {
  894. rc = icc_set_bw(bus->client, 0, 0);
  895. if (rc) {
  896. dprintk(CVP_ERR,
  897. "%s: Failed unvoting bus\n", __func__);
  898. goto err_unknown_device;
  899. }
  900. }
  901. err_unknown_device:
  902. return rc;
  903. }
  904. static int __vote_buses(struct iris_hfi_device *device,
  905. struct cvp_bus_vote_data *data, int num_data)
  906. {
  907. int rc = 0;
  908. struct bus_info *bus = NULL;
  909. struct cvp_bus_vote_data *new_data = NULL;
  910. if (!num_data) {
  911. dprintk(CVP_PWR, "No vote data available\n");
  912. goto no_data_count;
  913. } else if (!data) {
  914. dprintk(CVP_ERR, "Invalid voting data\n");
  915. return -EINVAL;
  916. }
  917. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  918. if (!new_data) {
  919. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  920. rc = -ENOMEM;
  921. goto err_no_mem;
  922. }
  923. no_data_count:
  924. kfree(device->bus_vote.data);
  925. device->bus_vote.data = new_data;
  926. device->bus_vote.data_count = num_data;
  927. iris_hfi_for_each_bus(device, bus) {
  928. if (bus) {
  929. rc = icc_set_bw(bus->client, bus->range[1], 0);
  930. if (rc)
  931. dprintk(CVP_ERR,
  932. "Failed voting bus %s to ab %u\n",
  933. bus->name, bus->range[1]*1000);
  934. }
  935. }
  936. err_no_mem:
  937. return rc;
  938. }
  939. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  940. {
  941. int rc = 0;
  942. struct iris_hfi_device *device = dev;
  943. if (!device)
  944. return -EINVAL;
  945. mutex_lock(&device->lock);
  946. rc = __vote_buses(device, d, n);
  947. mutex_unlock(&device->lock);
  948. return rc;
  949. }
  950. static int __core_set_resource(struct iris_hfi_device *device,
  951. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  952. {
  953. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  954. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  955. int rc = 0;
  956. if (!device || !resource_hdr || !resource_value) {
  957. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  958. return -EINVAL;
  959. }
  960. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  961. rc = call_hfi_pkt_op(device, sys_set_resource,
  962. pkt, resource_hdr, resource_value);
  963. if (rc) {
  964. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  965. goto err_create_pkt;
  966. }
  967. rc = __iface_cmdq_write(device, pkt);
  968. if (rc)
  969. rc = -ENOTEMPTY;
  970. err_create_pkt:
  971. return rc;
  972. }
  973. static int __core_release_resource(struct iris_hfi_device *device,
  974. struct cvp_resource_hdr *resource_hdr)
  975. {
  976. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  977. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  978. int rc = 0;
  979. if (!device || !resource_hdr) {
  980. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  981. return -EINVAL;
  982. }
  983. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  984. rc = call_hfi_pkt_op(device, sys_release_resource,
  985. pkt, resource_hdr);
  986. if (rc) {
  987. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  988. goto err_create_pkt;
  989. }
  990. rc = __iface_cmdq_write(device, pkt);
  991. if (rc)
  992. rc = -ENOTEMPTY;
  993. err_create_pkt:
  994. return rc;
  995. }
  996. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  997. {
  998. int rc = 0;
  999. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  1000. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  1001. if (rc) {
  1002. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  1003. return rc;
  1004. }
  1005. return 0;
  1006. }
  1007. static inline int __boot_firmware(struct iris_hfi_device *device)
  1008. {
  1009. int rc = 0, loop = 10;
  1010. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  1011. u32 reg_gdsc;
  1012. /*
  1013. * Hand off control of regulators to h/w _after_ enabling clocks.
  1014. * Note that the GDSC will turn off when switching from normal
  1015. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  1016. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  1017. */
  1018. if (__enable_hw_power_collapse(device))
  1019. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  1020. while (loop) {
  1021. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  1022. if (reg_gdsc & 0x80000000) {
  1023. usleep_range(100, 200);
  1024. loop--;
  1025. } else {
  1026. break;
  1027. }
  1028. }
  1029. if (!loop)
  1030. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  1031. ctrl_init_val = BIT(0);
  1032. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  1033. while (!ctrl_status && count < max_tries) {
  1034. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  1035. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  1036. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  1037. rc = -ENODATA;
  1038. break;
  1039. }
  1040. /* Reduce to 1/100th and x100 of max_tries */
  1041. usleep_range(500, 1000);
  1042. count++;
  1043. }
  1044. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  1045. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  1046. ctrl_status);
  1047. rc = -ENODEV;
  1048. }
  1049. /* Enable interrupt before sending commands to tensilica */
  1050. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  1051. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  1052. return rc;
  1053. }
  1054. static int iris_hfi_resume(void *dev)
  1055. {
  1056. int rc = 0;
  1057. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1058. if (!device) {
  1059. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1060. return -EINVAL;
  1061. }
  1062. dprintk(CVP_CORE, "Resuming Iris\n");
  1063. mutex_lock(&device->lock);
  1064. rc = __resume(device);
  1065. mutex_unlock(&device->lock);
  1066. return rc;
  1067. }
  1068. static int iris_hfi_suspend(void *dev)
  1069. {
  1070. int rc = 0;
  1071. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1072. if (!device) {
  1073. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1074. return -EINVAL;
  1075. } else if (!device->res->sw_power_collapsible) {
  1076. return -ENOTSUPP;
  1077. }
  1078. dprintk(CVP_CORE, "Suspending Iris\n");
  1079. mutex_lock(&device->lock);
  1080. rc = __power_collapse(device, true);
  1081. if (rc) {
  1082. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  1083. rc = -EBUSY;
  1084. }
  1085. mutex_unlock(&device->lock);
  1086. /* Cancel pending delayed works if any */
  1087. if (!rc)
  1088. cancel_delayed_work(&iris_hfi_pm_work);
  1089. return rc;
  1090. }
  1091. static void cvp_dump_csr(struct iris_hfi_device *dev)
  1092. {
  1093. u32 reg;
  1094. if (!dev)
  1095. return;
  1096. if (!dev->power_enabled || dev->reg_dumped)
  1097. return;
  1098. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  1099. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  1100. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  1101. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  1102. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  1103. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  1104. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  1105. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  1106. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  1107. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  1108. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  1109. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  1110. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  1111. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  1112. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  1113. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  1114. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  1115. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  1116. dev->reg_dumped = true;
  1117. }
  1118. static int iris_hfi_flush_debug_queue(void *dev)
  1119. {
  1120. int rc = 0;
  1121. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1122. if (!device) {
  1123. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1124. return -EINVAL;
  1125. }
  1126. cvp_dump_csr(device);
  1127. mutex_lock(&device->lock);
  1128. if (!device->power_enabled) {
  1129. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  1130. rc = -EINVAL;
  1131. goto exit;
  1132. }
  1133. __flush_debug_queue(device, NULL);
  1134. exit:
  1135. mutex_unlock(&device->lock);
  1136. return rc;
  1137. }
  1138. static int __set_clocks(struct iris_hfi_device *device, u32 freq)
  1139. {
  1140. struct clock_info *cl;
  1141. int rc = 0;
  1142. int factorsrc2clk = 3; // ratio factor for clock source : clk
  1143. dprintk(CVP_PWR, "%s: entering with freq : %ld\n", __func__, freq);
  1144. iris_hfi_for_each_clock(device, cl) {
  1145. if (cl->has_scaling) {/* has_scaling */
  1146. device->clk_freq = freq;
  1147. if (msm_cvp_clock_voting)
  1148. freq = msm_cvp_clock_voting;
  1149. freq = freq * factorsrc2clk;
  1150. dprintk(CVP_PWR, "%s: clock source rate set to: %ld\n", __func__, freq);
  1151. rc = clk_set_rate(cl->clk, freq);
  1152. if (rc) {
  1153. dprintk(CVP_ERR,
  1154. "Failed to set clock rate %u %s: %d %s\n",
  1155. freq, cl->name, rc, __func__);
  1156. return rc;
  1157. }
  1158. dprintk(CVP_PWR, "Scaling clock %s to %u\n",
  1159. cl->name, freq);
  1160. }
  1161. }
  1162. return 0;
  1163. }
  1164. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  1165. {
  1166. int rc = 0;
  1167. struct iris_hfi_device *device = dev;
  1168. if (!device) {
  1169. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  1170. return -EINVAL;
  1171. }
  1172. mutex_lock(&device->lock);
  1173. if (__resume(device)) {
  1174. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  1175. rc = -ENODEV;
  1176. goto exit;
  1177. }
  1178. rc = __set_clocks(device, freq);
  1179. exit:
  1180. mutex_unlock(&device->lock);
  1181. return rc;
  1182. }
  1183. static int __scale_clocks(struct iris_hfi_device *device)
  1184. {
  1185. int rc = 0;
  1186. struct allowed_clock_rates_table *allowed_clks_tbl = NULL;
  1187. u32 rate = 0;
  1188. allowed_clks_tbl = device->res->allowed_clks_tbl;
  1189. rate = device->clk_freq ? device->clk_freq :
  1190. allowed_clks_tbl[0].clock_rate;
  1191. dprintk(CVP_PWR, "%s: scale clock rate %d\n", __func__, rate);
  1192. rc = __set_clocks(device, rate);
  1193. return rc;
  1194. }
  1195. /* Writes into cmdq without raising an interrupt */
  1196. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  1197. void *pkt, bool *requires_interrupt)
  1198. {
  1199. struct cvp_iface_q_info *q_info;
  1200. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  1201. int result = -E2BIG;
  1202. if (!device || !pkt) {
  1203. dprintk(CVP_ERR, "Invalid Params\n");
  1204. return -EINVAL;
  1205. }
  1206. __strict_check(device);
  1207. if (!__core_in_valid_state(device)) {
  1208. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  1209. result = -EINVAL;
  1210. goto err_q_null;
  1211. }
  1212. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  1213. device->last_packet_type = cmd_packet->packet_type;
  1214. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1215. if (!q_info) {
  1216. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  1217. goto err_q_null;
  1218. }
  1219. if (!q_info->q_array.align_virtual_addr) {
  1220. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  1221. result = -ENODATA;
  1222. goto err_q_null;
  1223. }
  1224. if (__resume(device)) {
  1225. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  1226. goto err_q_write;
  1227. }
  1228. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  1229. if (device->res->sw_power_collapsible) {
  1230. cancel_delayed_work(&iris_hfi_pm_work);
  1231. if (!queue_delayed_work(device->iris_pm_workq,
  1232. &iris_hfi_pm_work,
  1233. msecs_to_jiffies(
  1234. device->res->msm_cvp_pwr_collapse_delay))) {
  1235. dprintk(CVP_PWR,
  1236. "PM work already scheduled\n");
  1237. }
  1238. }
  1239. result = 0;
  1240. } else {
  1241. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  1242. }
  1243. err_q_write:
  1244. err_q_null:
  1245. return result;
  1246. }
  1247. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1248. {
  1249. bool needs_interrupt = false;
  1250. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1251. if (!rc && needs_interrupt) {
  1252. /* Consumer of cmdq prefers that we raise an interrupt */
  1253. rc = 0;
  1254. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1255. }
  1256. return rc;
  1257. }
  1258. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1259. {
  1260. u32 tx_req_is_set = 0;
  1261. int rc = 0;
  1262. struct cvp_iface_q_info *q_info;
  1263. if (!pkt) {
  1264. dprintk(CVP_ERR, "Invalid Params\n");
  1265. return -EINVAL;
  1266. }
  1267. __strict_check(device);
  1268. if (!__core_in_valid_state(device)) {
  1269. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1270. rc = -EINVAL;
  1271. goto read_error_null;
  1272. }
  1273. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1274. if (q_info->q_array.align_virtual_addr == NULL) {
  1275. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1276. rc = -ENODATA;
  1277. goto read_error_null;
  1278. }
  1279. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1280. if (tx_req_is_set)
  1281. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1282. rc = 0;
  1283. } else
  1284. rc = -ENODATA;
  1285. read_error_null:
  1286. return rc;
  1287. }
  1288. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1289. {
  1290. u32 tx_req_is_set = 0;
  1291. int rc = 0;
  1292. struct cvp_iface_q_info *q_info;
  1293. if (!pkt) {
  1294. dprintk(CVP_ERR, "Invalid Params\n");
  1295. return -EINVAL;
  1296. }
  1297. __strict_check(device);
  1298. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1299. if (q_info->q_array.align_virtual_addr == NULL) {
  1300. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1301. rc = -ENODATA;
  1302. goto dbg_error_null;
  1303. }
  1304. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1305. if (tx_req_is_set)
  1306. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1307. rc = 0;
  1308. } else
  1309. rc = -ENODATA;
  1310. dbg_error_null:
  1311. return rc;
  1312. }
  1313. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1314. {
  1315. q_hdr->qhdr_status = 0x1;
  1316. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1317. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1318. q_hdr->qhdr_pkt_size = 0;
  1319. q_hdr->qhdr_rx_wm = 0x1;
  1320. q_hdr->qhdr_tx_wm = 0x1;
  1321. q_hdr->qhdr_rx_req = 0x1;
  1322. q_hdr->qhdr_tx_req = 0x0;
  1323. q_hdr->qhdr_rx_irq_status = 0x0;
  1324. q_hdr->qhdr_tx_irq_status = 0x0;
  1325. q_hdr->qhdr_read_idx = 0x0;
  1326. q_hdr->qhdr_write_idx = 0x0;
  1327. }
  1328. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1329. {
  1330. int i;
  1331. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1332. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1333. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1334. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1335. return;
  1336. }
  1337. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1338. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1339. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1340. mem_data->kvaddr, mem_data->dma_handle);
  1341. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1342. device->dsp_iface_queues[i].q_hdr = NULL;
  1343. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1344. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1345. }
  1346. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1347. device->dsp_iface_q_table.align_device_addr = 0;
  1348. }
  1349. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1350. {
  1351. int rc = 0;
  1352. u32 i;
  1353. struct cvp_iface_q_info *iface_q;
  1354. int offset = 0;
  1355. phys_addr_t fw_bias = 0;
  1356. size_t q_size;
  1357. struct msm_cvp_smem *mem_data;
  1358. void *kvaddr;
  1359. dma_addr_t dma_handle;
  1360. dma_addr_t iova;
  1361. struct context_bank_info *cb;
  1362. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1363. mem_data = &dev->dsp_iface_q_table.mem_data;
  1364. /* Allocate dsp queues from CDSP device memory */
  1365. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1366. &dma_handle, GFP_KERNEL);
  1367. if (IS_ERR_OR_NULL(kvaddr)) {
  1368. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1369. goto fail_dma_alloc;
  1370. }
  1371. cb = msm_cvp_smem_get_context_bank(0, dev->res, 0);
  1372. if (!cb) {
  1373. dprintk(CVP_ERR,
  1374. "%s: failed to get context bank\n", __func__);
  1375. goto fail_dma_map;
  1376. }
  1377. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1378. q_size, DMA_BIDIRECTIONAL, 0);
  1379. if (dma_mapping_error(cb->dev, iova)) {
  1380. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1381. goto fail_dma_map;
  1382. }
  1383. dprintk(CVP_DSP,
  1384. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1385. __func__, kvaddr, dma_handle, iova, q_size);
  1386. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1387. mem_data->kvaddr = kvaddr;
  1388. mem_data->device_addr = iova;
  1389. mem_data->dma_handle = dma_handle;
  1390. mem_data->size = q_size;
  1391. mem_data->ion_flags = 0;
  1392. mem_data->mapping_info.cb_info = cb;
  1393. if (!is_iommu_present(dev->res))
  1394. fw_bias = dev->cvp_hal_data->firmware_base;
  1395. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1396. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1397. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1398. offset = dev->dsp_iface_q_table.mem_size;
  1399. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1400. iface_q = &dev->dsp_iface_queues[i];
  1401. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1402. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1403. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1404. offset += iface_q->q_array.mem_size;
  1405. spin_lock_init(&iface_q->hfi_lock);
  1406. }
  1407. cvp_dsp_init_hfi_queue_hdr(dev);
  1408. return rc;
  1409. fail_dma_map:
  1410. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1411. fail_dma_alloc:
  1412. return -ENOMEM;
  1413. }
  1414. static void __interface_queues_release(struct iris_hfi_device *device)
  1415. {
  1416. int i;
  1417. struct cvp_hfi_mem_map_table *qdss;
  1418. struct cvp_hfi_mem_map *mem_map;
  1419. int num_entries = device->res->qdss_addr_set.count;
  1420. unsigned long mem_map_table_base_addr;
  1421. struct context_bank_info *cb;
  1422. if (device->qdss.align_virtual_addr) {
  1423. qdss = (struct cvp_hfi_mem_map_table *)
  1424. device->qdss.align_virtual_addr;
  1425. qdss->mem_map_num_entries = num_entries;
  1426. mem_map_table_base_addr =
  1427. device->qdss.align_device_addr +
  1428. sizeof(struct cvp_hfi_mem_map_table);
  1429. qdss->mem_map_table_base_addr =
  1430. (u32)mem_map_table_base_addr;
  1431. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1432. mem_map_table_base_addr) {
  1433. dprintk(CVP_ERR,
  1434. "Invalid mem_map_table_base_addr %#lx",
  1435. mem_map_table_base_addr);
  1436. }
  1437. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1438. cb = msm_cvp_smem_get_context_bank(false, device->res, 0);
  1439. for (i = 0; cb && i < num_entries; i++) {
  1440. iommu_unmap(cb->domain,
  1441. mem_map[i].virtual_addr,
  1442. mem_map[i].size);
  1443. }
  1444. __smem_free(device, &device->qdss.mem_data);
  1445. }
  1446. __smem_free(device, &device->iface_q_table.mem_data);
  1447. __smem_free(device, &device->sfr.mem_data);
  1448. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1449. device->iface_queues[i].q_hdr = NULL;
  1450. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1451. device->iface_queues[i].q_array.align_device_addr = 0;
  1452. }
  1453. device->iface_q_table.align_virtual_addr = NULL;
  1454. device->iface_q_table.align_device_addr = 0;
  1455. device->qdss.align_virtual_addr = NULL;
  1456. device->qdss.align_device_addr = 0;
  1457. device->sfr.align_virtual_addr = NULL;
  1458. device->sfr.align_device_addr = 0;
  1459. device->mem_addr.align_virtual_addr = NULL;
  1460. device->mem_addr.align_device_addr = 0;
  1461. __interface_dsp_queues_release(device);
  1462. }
  1463. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1464. struct cvp_hfi_mem_map *mem_map,
  1465. struct iommu_domain *domain)
  1466. {
  1467. int i;
  1468. int rc = 0;
  1469. dma_addr_t iova = QDSS_IOVA_START;
  1470. int num_entries = dev->res->qdss_addr_set.count;
  1471. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1472. if (!num_entries)
  1473. return -ENODATA;
  1474. for (i = 0; i < num_entries; i++) {
  1475. if (domain) {
  1476. rc = iommu_map(domain, iova,
  1477. qdss_addr_tbl[i].start,
  1478. qdss_addr_tbl[i].size,
  1479. IOMMU_READ | IOMMU_WRITE);
  1480. if (rc) {
  1481. dprintk(CVP_ERR,
  1482. "IOMMU QDSS mapping failed for addr %#x\n",
  1483. qdss_addr_tbl[i].start);
  1484. rc = -ENOMEM;
  1485. break;
  1486. }
  1487. } else {
  1488. iova = qdss_addr_tbl[i].start;
  1489. }
  1490. mem_map[i].virtual_addr = (u32)iova;
  1491. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1492. mem_map[i].size = qdss_addr_tbl[i].size;
  1493. mem_map[i].attr = 0x0;
  1494. iova += mem_map[i].size;
  1495. }
  1496. if (i < num_entries) {
  1497. dprintk(CVP_ERR,
  1498. "QDSS mapping failed, Freeing other entries %d\n", i);
  1499. for (--i; domain && i >= 0; i--) {
  1500. iommu_unmap(domain,
  1501. mem_map[i].virtual_addr,
  1502. mem_map[i].size);
  1503. }
  1504. }
  1505. return rc;
  1506. }
  1507. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1508. {
  1509. __write_register(device, CVP_UC_REGION_ADDR,
  1510. (u32)device->iface_q_table.align_device_addr);
  1511. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1512. __write_register(device, CVP_QTBL_ADDR,
  1513. (u32)device->iface_q_table.align_device_addr);
  1514. __write_register(device, CVP_QTBL_INFO, 0x01);
  1515. if (device->sfr.align_device_addr)
  1516. __write_register(device, CVP_SFR_ADDR,
  1517. (u32)device->sfr.align_device_addr);
  1518. if (device->qdss.align_device_addr)
  1519. __write_register(device, CVP_MMAP_ADDR,
  1520. (u32)device->qdss.align_device_addr);
  1521. call_iris_op(device, setup_dsp_uc_memmap, device);
  1522. }
  1523. static int __interface_queues_init(struct iris_hfi_device *dev)
  1524. {
  1525. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1526. struct cvp_hfi_queue_header *q_hdr;
  1527. u32 i;
  1528. int rc = 0;
  1529. struct cvp_hfi_mem_map_table *qdss;
  1530. struct cvp_hfi_mem_map *mem_map;
  1531. struct cvp_iface_q_info *iface_q;
  1532. struct cvp_hfi_sfr_struct *vsfr;
  1533. struct cvp_mem_addr *mem_addr;
  1534. int offset = 0;
  1535. int num_entries = dev->res->qdss_addr_set.count;
  1536. phys_addr_t fw_bias = 0;
  1537. size_t q_size;
  1538. unsigned long mem_map_table_base_addr;
  1539. struct context_bank_info *cb;
  1540. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1541. mem_addr = &dev->mem_addr;
  1542. if (!is_iommu_present(dev->res))
  1543. fw_bias = dev->cvp_hal_data->firmware_base;
  1544. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1545. if (rc) {
  1546. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1547. goto fail_alloc_queue;
  1548. }
  1549. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1550. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1551. fw_bias;
  1552. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1553. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1554. offset += dev->iface_q_table.mem_size;
  1555. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1556. iface_q = &dev->iface_queues[i];
  1557. iface_q->q_array.align_device_addr = mem_addr->align_device_addr
  1558. + offset - fw_bias;
  1559. iface_q->q_array.align_virtual_addr =
  1560. mem_addr->align_virtual_addr + offset;
  1561. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1562. offset += iface_q->q_array.mem_size;
  1563. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1564. dev->iface_q_table.align_virtual_addr, i);
  1565. __set_queue_hdr_defaults(iface_q->q_hdr);
  1566. spin_lock_init(&iface_q->hfi_lock);
  1567. }
  1568. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1569. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1570. SMEM_UNCACHED);
  1571. if (rc) {
  1572. dprintk(CVP_WARN,
  1573. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1574. dev->qdss.align_device_addr = 0;
  1575. } else {
  1576. dev->qdss.align_device_addr =
  1577. mem_addr->align_device_addr - fw_bias;
  1578. dev->qdss.align_virtual_addr =
  1579. mem_addr->align_virtual_addr;
  1580. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1581. dev->qdss.mem_data = mem_addr->mem_data;
  1582. }
  1583. }
  1584. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1585. if (rc) {
  1586. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1587. dev->sfr.align_device_addr = 0;
  1588. } else {
  1589. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1590. fw_bias;
  1591. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1592. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1593. dev->sfr.mem_data = mem_addr->mem_data;
  1594. }
  1595. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1596. dev->iface_q_table.align_virtual_addr;
  1597. q_tbl_hdr->qtbl_version = 0;
  1598. q_tbl_hdr->device_addr = (void *)dev;
  1599. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1600. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1601. q_tbl_hdr->qtbl_qhdr0_offset =
  1602. sizeof(struct cvp_hfi_queue_table_header);
  1603. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1604. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1605. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1606. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1607. q_hdr = iface_q->q_hdr;
  1608. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1609. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1610. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1611. q_hdr = iface_q->q_hdr;
  1612. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1613. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1614. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1615. q_hdr = iface_q->q_hdr;
  1616. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1617. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1618. /*
  1619. * Set receive request to zero on debug queue as there is no
  1620. * need of interrupt from cvp hardware for debug messages
  1621. */
  1622. q_hdr->qhdr_rx_req = 0;
  1623. if (dev->qdss.align_virtual_addr) {
  1624. qdss =
  1625. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1626. qdss->mem_map_num_entries = num_entries;
  1627. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1628. sizeof(struct cvp_hfi_mem_map_table);
  1629. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1630. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1631. cb = msm_cvp_smem_get_context_bank(false, dev->res, 0);
  1632. if (!cb) {
  1633. dprintk(CVP_ERR,
  1634. "%s: failed to get context bank\n", __func__);
  1635. return -EINVAL;
  1636. }
  1637. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1638. if (rc) {
  1639. dprintk(CVP_ERR,
  1640. "IOMMU mapping failed, Freeing qdss memdata\n");
  1641. __smem_free(dev, &dev->qdss.mem_data);
  1642. dev->qdss.align_virtual_addr = NULL;
  1643. dev->qdss.align_device_addr = 0;
  1644. }
  1645. }
  1646. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1647. if (vsfr)
  1648. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1649. rc = __interface_dsp_queues_init(dev);
  1650. if (rc) {
  1651. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1652. goto fail_alloc_queue;
  1653. }
  1654. __setup_ucregion_memory_map(dev);
  1655. return 0;
  1656. fail_alloc_queue:
  1657. return -ENOMEM;
  1658. }
  1659. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1660. {
  1661. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1662. int rc = 0;
  1663. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1664. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1665. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1666. if (rc) {
  1667. dprintk(CVP_WARN,
  1668. "Debug mode setting to FW failed\n");
  1669. return -ENOTEMPTY;
  1670. }
  1671. if (__iface_cmdq_write(device, pkt))
  1672. return -ENOTEMPTY;
  1673. return 0;
  1674. }
  1675. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1676. bool enable)
  1677. {
  1678. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1679. int rc = 0;
  1680. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1681. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1682. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1683. if (__iface_cmdq_write(device, pkt))
  1684. return -ENOTEMPTY;
  1685. return 0;
  1686. }
  1687. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1688. {
  1689. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1690. int rc = 0;
  1691. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1692. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1693. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1694. pkt, mode);
  1695. if (rc) {
  1696. dprintk(CVP_WARN,
  1697. "Coverage mode setting to FW failed\n");
  1698. return -ENOTEMPTY;
  1699. }
  1700. if (__iface_cmdq_write(device, pkt)) {
  1701. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1702. return -ENOTEMPTY;
  1703. }
  1704. return 0;
  1705. }
  1706. static int __sys_set_power_control(struct iris_hfi_device *device,
  1707. bool enable)
  1708. {
  1709. struct regulator_info *rinfo;
  1710. bool supported = false;
  1711. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1712. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1713. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1714. iris_hfi_for_each_regulator(device, rinfo) {
  1715. if (rinfo->has_hw_power_collapse) {
  1716. supported = true;
  1717. break;
  1718. }
  1719. }
  1720. if (!supported)
  1721. return 0;
  1722. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1723. if (__iface_cmdq_write(device, pkt))
  1724. return -ENOTEMPTY;
  1725. return 0;
  1726. }
  1727. static int iris_hfi_core_init(void *device)
  1728. {
  1729. int rc = 0;
  1730. u32 ipcc_iova;
  1731. struct cvp_hfi_cmd_sys_init_packet pkt;
  1732. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1733. struct iris_hfi_device *dev;
  1734. if (!device) {
  1735. dprintk(CVP_ERR, "Invalid device\n");
  1736. return -ENODEV;
  1737. }
  1738. dev = device;
  1739. dprintk(CVP_CORE, "Core initializing\n");
  1740. mutex_lock(&dev->lock);
  1741. dev->bus_vote.data =
  1742. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1743. if (!dev->bus_vote.data) {
  1744. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1745. rc = -ENOMEM;
  1746. goto err_no_mem;
  1747. }
  1748. dev->bus_vote.data_count = 1;
  1749. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1750. rc = __load_fw(dev);
  1751. if (rc) {
  1752. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1753. goto err_load_fw;
  1754. }
  1755. __set_state(dev, IRIS_STATE_INIT);
  1756. dev->reg_dumped = false;
  1757. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1758. &dev->cvp_hal_data->firmware_base,
  1759. dev->cvp_hal_data->register_base);
  1760. rc = __interface_queues_init(dev);
  1761. if (rc) {
  1762. dprintk(CVP_ERR, "failed to init queues\n");
  1763. rc = -ENOMEM;
  1764. goto err_core_init;
  1765. }
  1766. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1767. if (!rc) {
  1768. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1769. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1770. }
  1771. rc = __boot_firmware(dev);
  1772. if (rc) {
  1773. dprintk(CVP_ERR, "Failed to start core\n");
  1774. rc = -ENODEV;
  1775. goto err_core_init;
  1776. }
  1777. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1778. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1779. if (rc) {
  1780. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1781. goto err_core_init;
  1782. }
  1783. if (__iface_cmdq_write(dev, &pkt)) {
  1784. rc = -ENOTEMPTY;
  1785. goto err_core_init;
  1786. }
  1787. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1788. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1789. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1790. __sys_set_debug(device, msm_cvp_fw_debug);
  1791. __enable_subcaches(device);
  1792. __set_subcaches(device);
  1793. __set_ubwc_config(device);
  1794. __sys_set_idle_indicator(device, true);
  1795. if (dev->res->pm_qos_latency_us)
  1796. cpu_latency_qos_add_request(&dev->qos,
  1797. dev->res->pm_qos_latency_us);
  1798. mutex_unlock(&dev->lock);
  1799. cvp_dsp_send_hfi_queue();
  1800. dprintk(CVP_CORE, "Core inited successfully\n");
  1801. return 0;
  1802. err_core_init:
  1803. __set_state(dev, IRIS_STATE_DEINIT);
  1804. __unload_fw(dev);
  1805. err_load_fw:
  1806. err_no_mem:
  1807. dprintk(CVP_ERR, "Core init failed\n");
  1808. mutex_unlock(&dev->lock);
  1809. return rc;
  1810. }
  1811. static int iris_hfi_core_release(void *dev)
  1812. {
  1813. int rc = 0;
  1814. struct iris_hfi_device *device = dev;
  1815. struct cvp_hal_session *session, *next;
  1816. if (!device) {
  1817. dprintk(CVP_ERR, "invalid device\n");
  1818. return -ENODEV;
  1819. }
  1820. mutex_lock(&device->lock);
  1821. dprintk(CVP_WARN, "Core releasing\n");
  1822. if (device->res->pm_qos_latency_us &&
  1823. cpu_latency_qos_request_active(&device->qos))
  1824. cpu_latency_qos_remove_request(&device->qos);
  1825. __resume(device);
  1826. __set_state(device, IRIS_STATE_DEINIT);
  1827. __dsp_shutdown(device, 0);
  1828. __unload_fw(device);
  1829. /* unlink all sessions from device */
  1830. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1831. list_del(&session->list);
  1832. session->device = NULL;
  1833. }
  1834. dprintk(CVP_CORE, "Core released successfully\n");
  1835. mutex_unlock(&device->lock);
  1836. return rc;
  1837. }
  1838. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1839. {
  1840. u32 intr_status = 0, mask = 0;
  1841. if (!device) {
  1842. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1843. return;
  1844. }
  1845. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1846. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1847. if (intr_status & mask) {
  1848. device->intr_status |= intr_status;
  1849. device->reg_count++;
  1850. dprintk(CVP_CORE,
  1851. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1852. device, device->reg_count, intr_status);
  1853. } else {
  1854. device->spur_count++;
  1855. }
  1856. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1857. }
  1858. static int iris_hfi_core_trigger_ssr(void *device,
  1859. enum hal_ssr_trigger_type type)
  1860. {
  1861. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1862. int rc = 0;
  1863. struct iris_hfi_device *dev;
  1864. if (!device) {
  1865. dprintk(CVP_ERR, "invalid device\n");
  1866. return -ENODEV;
  1867. }
  1868. dev = device;
  1869. if (mutex_trylock(&dev->lock)) {
  1870. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1871. if (rc) {
  1872. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1873. __func__);
  1874. goto err_create_pkt;
  1875. }
  1876. if (__iface_cmdq_write(dev, &pkt))
  1877. rc = -ENOTEMPTY;
  1878. } else {
  1879. return -EAGAIN;
  1880. }
  1881. err_create_pkt:
  1882. mutex_unlock(&dev->lock);
  1883. return rc;
  1884. }
  1885. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1886. {
  1887. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1888. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1889. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1890. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1891. }
  1892. static void __session_clean(struct cvp_hal_session *session)
  1893. {
  1894. struct cvp_hal_session *temp, *next;
  1895. struct iris_hfi_device *device;
  1896. if (!session || !session->device) {
  1897. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1898. return;
  1899. }
  1900. device = session->device;
  1901. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1902. /*
  1903. * session might have been removed from the device list in
  1904. * core_release, so check and remove if it is in the list
  1905. */
  1906. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1907. if (session == temp) {
  1908. list_del(&session->list);
  1909. break;
  1910. }
  1911. }
  1912. /* Poison the session handle with zeros */
  1913. *session = (struct cvp_hal_session){ {0} };
  1914. kfree(session);
  1915. }
  1916. static int iris_hfi_session_clean(void *session)
  1917. {
  1918. struct cvp_hal_session *sess_close;
  1919. struct iris_hfi_device *device;
  1920. if (!session) {
  1921. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1922. return -EINVAL;
  1923. }
  1924. sess_close = session;
  1925. device = sess_close->device;
  1926. if (!device) {
  1927. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1928. return -EINVAL;
  1929. }
  1930. mutex_lock(&device->lock);
  1931. __session_clean(sess_close);
  1932. mutex_unlock(&device->lock);
  1933. return 0;
  1934. }
  1935. static int iris_hfi_session_init(void *device, void *session_id,
  1936. void **new_session)
  1937. {
  1938. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1939. struct iris_hfi_device *dev;
  1940. struct cvp_hal_session *s;
  1941. if (!device || !new_session) {
  1942. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1943. return -EINVAL;
  1944. }
  1945. dev = device;
  1946. mutex_lock(&dev->lock);
  1947. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1948. if (!s) {
  1949. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1950. goto err_session_init_fail;
  1951. }
  1952. s->session_id = session_id;
  1953. s->device = dev;
  1954. dprintk(CVP_SESS,
  1955. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1956. list_add_tail(&s->list, &dev->sess_head);
  1957. __set_default_sys_properties(device);
  1958. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1959. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1960. goto err_session_init_fail;
  1961. }
  1962. *new_session = s;
  1963. if (__iface_cmdq_write(dev, &pkt))
  1964. goto err_session_init_fail;
  1965. mutex_unlock(&dev->lock);
  1966. return 0;
  1967. err_session_init_fail:
  1968. if (s)
  1969. __session_clean(s);
  1970. *new_session = NULL;
  1971. mutex_unlock(&dev->lock);
  1972. return -EINVAL;
  1973. }
  1974. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1975. {
  1976. struct cvp_hal_session_cmd_pkt pkt;
  1977. int rc = 0;
  1978. struct iris_hfi_device *device = session->device;
  1979. if (!__is_session_valid(device, session, __func__))
  1980. return -ECONNRESET;
  1981. rc = call_hfi_pkt_op(device, session_cmd,
  1982. &pkt, pkt_type, session);
  1983. if (rc == -EPERM)
  1984. return 0;
  1985. if (rc) {
  1986. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1987. goto err_create_pkt;
  1988. }
  1989. if (__iface_cmdq_write(session->device, &pkt))
  1990. rc = -ENOTEMPTY;
  1991. err_create_pkt:
  1992. return rc;
  1993. }
  1994. static int iris_hfi_session_end(void *session)
  1995. {
  1996. struct cvp_hal_session *sess;
  1997. struct iris_hfi_device *device;
  1998. int rc = 0;
  1999. if (!session) {
  2000. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2001. return -EINVAL;
  2002. }
  2003. sess = session;
  2004. device = sess->device;
  2005. if (!device) {
  2006. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  2007. return -EINVAL;
  2008. }
  2009. mutex_lock(&device->lock);
  2010. if (msm_cvp_fw_coverage) {
  2011. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  2012. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  2013. }
  2014. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  2015. mutex_unlock(&device->lock);
  2016. return rc;
  2017. }
  2018. static int iris_hfi_session_abort(void *sess)
  2019. {
  2020. struct cvp_hal_session *session = sess;
  2021. struct iris_hfi_device *device;
  2022. int rc = 0;
  2023. if (!session || !session->device) {
  2024. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2025. return -EINVAL;
  2026. }
  2027. device = session->device;
  2028. mutex_lock(&device->lock);
  2029. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  2030. mutex_unlock(&device->lock);
  2031. return rc;
  2032. }
  2033. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  2034. {
  2035. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  2036. int rc = 0;
  2037. struct cvp_hal_session *session = sess;
  2038. struct iris_hfi_device *device;
  2039. if (!session || !session->device || !iova || !size) {
  2040. dprintk(CVP_ERR, "Invalid Params\n");
  2041. return -EINVAL;
  2042. }
  2043. device = session->device;
  2044. mutex_lock(&device->lock);
  2045. if (!__is_session_valid(device, session, __func__)) {
  2046. rc = -ECONNRESET;
  2047. goto err_create_pkt;
  2048. }
  2049. rc = call_hfi_pkt_op(device, session_set_buffers,
  2050. &pkt, session, iova, size);
  2051. if (rc) {
  2052. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  2053. goto err_create_pkt;
  2054. }
  2055. if (__iface_cmdq_write(session->device, &pkt))
  2056. rc = -ENOTEMPTY;
  2057. err_create_pkt:
  2058. mutex_unlock(&device->lock);
  2059. return rc;
  2060. }
  2061. static int iris_hfi_session_release_buffers(void *sess)
  2062. {
  2063. struct cvp_session_release_buffers_packet pkt;
  2064. int rc = 0;
  2065. struct cvp_hal_session *session = sess;
  2066. struct iris_hfi_device *device;
  2067. if (!session || !session->device) {
  2068. dprintk(CVP_ERR, "Invalid Params\n");
  2069. return -EINVAL;
  2070. }
  2071. device = session->device;
  2072. mutex_lock(&device->lock);
  2073. if (!__is_session_valid(device, session, __func__)) {
  2074. rc = -ECONNRESET;
  2075. goto err_create_pkt;
  2076. }
  2077. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  2078. if (rc) {
  2079. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  2080. goto err_create_pkt;
  2081. }
  2082. if (__iface_cmdq_write(session->device, &pkt))
  2083. rc = -ENOTEMPTY;
  2084. err_create_pkt:
  2085. mutex_unlock(&device->lock);
  2086. return rc;
  2087. }
  2088. static int iris_hfi_session_send(void *sess,
  2089. struct eva_kmd_hfi_packet *in_pkt)
  2090. {
  2091. int rc = 0;
  2092. struct eva_kmd_hfi_packet pkt;
  2093. struct cvp_hal_session *session = sess;
  2094. struct iris_hfi_device *device;
  2095. if (!session || !session->device) {
  2096. dprintk(CVP_ERR, "invalid session");
  2097. return -ENODEV;
  2098. }
  2099. device = session->device;
  2100. mutex_lock(&device->lock);
  2101. if (!__is_session_valid(device, session, __func__)) {
  2102. rc = -ECONNRESET;
  2103. goto err_send_pkt;
  2104. }
  2105. rc = call_hfi_pkt_op(device, session_send,
  2106. &pkt, session, in_pkt);
  2107. if (rc) {
  2108. dprintk(CVP_ERR,
  2109. "failed to create pkt\n");
  2110. goto err_send_pkt;
  2111. }
  2112. if (__iface_cmdq_write(session->device, &pkt))
  2113. rc = -ENOTEMPTY;
  2114. err_send_pkt:
  2115. mutex_unlock(&device->lock);
  2116. return rc;
  2117. return rc;
  2118. }
  2119. static int iris_hfi_session_flush(void *sess)
  2120. {
  2121. struct cvp_hal_session *session = sess;
  2122. struct iris_hfi_device *device;
  2123. int rc = 0;
  2124. if (!session || !session->device) {
  2125. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2126. return -EINVAL;
  2127. }
  2128. device = session->device;
  2129. mutex_lock(&device->lock);
  2130. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2131. mutex_unlock(&device->lock);
  2132. return rc;
  2133. }
  2134. static int __check_core_registered(struct iris_hfi_device *device,
  2135. phys_addr_t fw_addr, u8 *reg_addr, u32 reg_size,
  2136. phys_addr_t irq)
  2137. {
  2138. struct cvp_hal_data *cvp_hal_data;
  2139. if (!device) {
  2140. dprintk(CVP_INFO, "no device Registered\n");
  2141. return -EINVAL;
  2142. }
  2143. cvp_hal_data = device->cvp_hal_data;
  2144. if (!cvp_hal_data)
  2145. return -EINVAL;
  2146. if (cvp_hal_data->irq == irq &&
  2147. (CONTAINS(cvp_hal_data->firmware_base,
  2148. FIRMWARE_SIZE, fw_addr) ||
  2149. CONTAINS(fw_addr, FIRMWARE_SIZE,
  2150. cvp_hal_data->firmware_base) ||
  2151. CONTAINS(cvp_hal_data->register_base,
  2152. reg_size, reg_addr) ||
  2153. CONTAINS(reg_addr, reg_size,
  2154. cvp_hal_data->register_base) ||
  2155. OVERLAPS(cvp_hal_data->register_base,
  2156. reg_size, reg_addr, reg_size) ||
  2157. OVERLAPS(reg_addr, reg_size,
  2158. cvp_hal_data->register_base,
  2159. reg_size) ||
  2160. OVERLAPS(cvp_hal_data->firmware_base,
  2161. FIRMWARE_SIZE, fw_addr,
  2162. FIRMWARE_SIZE) ||
  2163. OVERLAPS(fw_addr, FIRMWARE_SIZE,
  2164. cvp_hal_data->firmware_base,
  2165. FIRMWARE_SIZE))) {
  2166. return 0;
  2167. }
  2168. dprintk(CVP_INFO, "Device not registered\n");
  2169. return -EINVAL;
  2170. }
  2171. static void __process_fatal_error(
  2172. struct iris_hfi_device *device)
  2173. {
  2174. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2175. cmd_done.device_id = device->device_id;
  2176. device->callback(HAL_SYS_ERROR, &cmd_done);
  2177. }
  2178. static int __prepare_pc(struct iris_hfi_device *device)
  2179. {
  2180. int rc = 0;
  2181. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2182. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2183. if (rc) {
  2184. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2185. goto err_pc_prep;
  2186. }
  2187. if (__iface_cmdq_write(device, &pkt))
  2188. rc = -ENOTEMPTY;
  2189. if (rc)
  2190. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2191. err_pc_prep:
  2192. return rc;
  2193. }
  2194. static void iris_hfi_pm_handler(struct work_struct *work)
  2195. {
  2196. int rc = 0;
  2197. struct msm_cvp_core *core;
  2198. struct iris_hfi_device *device;
  2199. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2200. if (core)
  2201. device = core->device->hfi_device_data;
  2202. else
  2203. return;
  2204. if (!device) {
  2205. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2206. return;
  2207. }
  2208. dprintk(CVP_PWR,
  2209. "Entering %s\n", __func__);
  2210. /*
  2211. * It is ok to check this variable outside the lock since
  2212. * it is being updated in this context only
  2213. */
  2214. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2215. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2216. device->skip_pc_count);
  2217. device->skip_pc_count = 0;
  2218. __process_fatal_error(device);
  2219. return;
  2220. }
  2221. mutex_lock(&device->lock);
  2222. if (gfa_cv.state == DSP_SUSPEND)
  2223. rc = __power_collapse(device, true);
  2224. else
  2225. rc = __power_collapse(device, false);
  2226. mutex_unlock(&device->lock);
  2227. switch (rc) {
  2228. case 0:
  2229. device->skip_pc_count = 0;
  2230. /* Cancel pending delayed works if any */
  2231. cancel_delayed_work(&iris_hfi_pm_work);
  2232. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2233. __func__);
  2234. break;
  2235. case -EBUSY:
  2236. device->skip_pc_count = 0;
  2237. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2238. queue_delayed_work(device->iris_pm_workq,
  2239. &iris_hfi_pm_work, msecs_to_jiffies(
  2240. device->res->msm_cvp_pwr_collapse_delay));
  2241. break;
  2242. case -EAGAIN:
  2243. device->skip_pc_count++;
  2244. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2245. __func__, device->skip_pc_count);
  2246. queue_delayed_work(device->iris_pm_workq,
  2247. &iris_hfi_pm_work, msecs_to_jiffies(
  2248. device->res->msm_cvp_pwr_collapse_delay));
  2249. break;
  2250. default:
  2251. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2252. break;
  2253. }
  2254. }
  2255. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2256. {
  2257. int rc = 0;
  2258. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2259. u32 flags = 0;
  2260. int count = 0;
  2261. const int max_tries = 150;
  2262. if (!device) {
  2263. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2264. return -EINVAL;
  2265. }
  2266. if (!device->power_enabled) {
  2267. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2268. __func__);
  2269. goto exit;
  2270. }
  2271. rc = __core_in_valid_state(device);
  2272. if (!rc) {
  2273. dprintk(CVP_WARN,
  2274. "Core is in bad state, Skipping power collapse\n");
  2275. return -EINVAL;
  2276. }
  2277. rc = __dsp_suspend(device, force, flags);
  2278. if (rc == -EBUSY)
  2279. goto exit;
  2280. else if (rc)
  2281. goto skip_power_off;
  2282. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2283. CVP_CTRL_STATUS_PC_READY;
  2284. if (!pc_ready) {
  2285. wfi_status = __read_register(device,
  2286. CVP_WRAPPER_CPU_STATUS);
  2287. idle_status = __read_register(device,
  2288. CVP_CTRL_STATUS);
  2289. if (!(wfi_status & BIT(0))) {
  2290. dprintk(CVP_WARN,
  2291. "Skipping PC as wfi_status (%#x) bit not set\n",
  2292. wfi_status);
  2293. goto skip_power_off;
  2294. }
  2295. if (!(idle_status & BIT(30))) {
  2296. dprintk(CVP_WARN,
  2297. "Skipping PC as idle_status (%#x) bit not set\n",
  2298. idle_status);
  2299. goto skip_power_off;
  2300. }
  2301. rc = __prepare_pc(device);
  2302. if (rc) {
  2303. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2304. goto skip_power_off;
  2305. }
  2306. while (count < max_tries) {
  2307. wfi_status = __read_register(device,
  2308. CVP_WRAPPER_CPU_STATUS);
  2309. pc_ready = __read_register(device,
  2310. CVP_CTRL_STATUS);
  2311. if ((wfi_status & BIT(0)) && (pc_ready &
  2312. CVP_CTRL_STATUS_PC_READY))
  2313. break;
  2314. usleep_range(150, 250);
  2315. count++;
  2316. }
  2317. if (count == max_tries) {
  2318. dprintk(CVP_ERR,
  2319. "Skip PC. Core is not in right state (%#x, %#x)\n",
  2320. wfi_status, pc_ready);
  2321. goto skip_power_off;
  2322. }
  2323. }
  2324. __flush_debug_queue(device, device->raw_packet);
  2325. rc = __suspend(device);
  2326. if (rc)
  2327. dprintk(CVP_ERR, "Failed __suspend\n");
  2328. exit:
  2329. return rc;
  2330. skip_power_off:
  2331. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2332. wfi_status, idle_status, pc_ready);
  2333. __flush_debug_queue(device, device->raw_packet);
  2334. return -EAGAIN;
  2335. }
  2336. static void __process_sys_error(struct iris_hfi_device *device)
  2337. {
  2338. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2339. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2340. if (vsfr) {
  2341. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2342. /*
  2343. * SFR isn't guaranteed to be NULL terminated
  2344. * since SYS_ERROR indicates that Iris is in the
  2345. * process of crashing.
  2346. */
  2347. if (p == NULL)
  2348. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2349. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2350. vsfr->rg_data);
  2351. }
  2352. }
  2353. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2354. {
  2355. bool local_packet = false;
  2356. enum cvp_msg_prio log_level = CVP_FW;
  2357. if (!device) {
  2358. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2359. return;
  2360. }
  2361. if (!packet) {
  2362. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2363. if (!packet) {
  2364. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2365. __func__);
  2366. return;
  2367. }
  2368. local_packet = true;
  2369. /*
  2370. * Local packek is used when something FATAL occurred.
  2371. * It is good to print these logs by default.
  2372. */
  2373. log_level = CVP_ERR;
  2374. }
  2375. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2376. if (pkt_size < pkt_hdr_size || \
  2377. payload_size < MIN_PAYLOAD_SIZE || \
  2378. payload_size > \
  2379. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2380. dprintk(CVP_ERR, \
  2381. "%s: invalid msg size - %d\n", \
  2382. __func__, pkt->msg_size); \
  2383. continue; \
  2384. } \
  2385. })
  2386. while (!__iface_dbgq_read(device, packet)) {
  2387. struct cvp_hfi_packet_header *pkt =
  2388. (struct cvp_hfi_packet_header *) packet;
  2389. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2390. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2391. __func__);
  2392. continue;
  2393. }
  2394. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2395. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2396. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2397. SKIP_INVALID_PKT(pkt->size,
  2398. pkt->msg_size, sizeof(*pkt));
  2399. /*
  2400. * All fw messages starts with new line character. This
  2401. * causes dprintk to print this message in two lines
  2402. * in the kernel log. Ignoring the first character
  2403. * from the message fixes this to print it in a single
  2404. * line.
  2405. */
  2406. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2407. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2408. }
  2409. }
  2410. #undef SKIP_INVALID_PKT
  2411. if (local_packet)
  2412. kfree(packet);
  2413. }
  2414. static bool __is_session_valid(struct iris_hfi_device *device,
  2415. struct cvp_hal_session *session, const char *func)
  2416. {
  2417. struct cvp_hal_session *temp = NULL;
  2418. if (!device || !session)
  2419. goto invalid;
  2420. list_for_each_entry(temp, &device->sess_head, list)
  2421. if (session == temp)
  2422. return true;
  2423. invalid:
  2424. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2425. func, device, session);
  2426. return false;
  2427. }
  2428. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2429. u32 session_id)
  2430. {
  2431. struct cvp_hal_session *temp = NULL;
  2432. list_for_each_entry(temp, &device->sess_head, list) {
  2433. if (session_id == hash32_ptr(temp))
  2434. return temp;
  2435. }
  2436. return NULL;
  2437. }
  2438. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2439. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2440. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2441. static void process_system_msg(struct msm_cvp_cb_info *info,
  2442. struct iris_hfi_device *device,
  2443. void *raw_packet)
  2444. {
  2445. struct cvp_hal_sys_init_done sys_init_done = {0};
  2446. switch (info->response_type) {
  2447. case HAL_SYS_ERROR:
  2448. __process_sys_error(device);
  2449. break;
  2450. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2451. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2452. break;
  2453. case HAL_SYS_INIT_DONE:
  2454. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2455. sys_init_done.capabilities =
  2456. device->sys_init_capabilities;
  2457. cvp_hfi_process_sys_init_done_prop_read(
  2458. (struct cvp_hfi_msg_sys_init_done_packet *)
  2459. raw_packet, &sys_init_done);
  2460. info->response.cmd.data.sys_init_done = sys_init_done;
  2461. break;
  2462. default:
  2463. break;
  2464. }
  2465. }
  2466. static void **get_session_id(struct msm_cvp_cb_info *info)
  2467. {
  2468. void **session_id = NULL;
  2469. /* For session-related packets, validate session */
  2470. switch (info->response_type) {
  2471. case HAL_SESSION_INIT_DONE:
  2472. case HAL_SESSION_END_DONE:
  2473. case HAL_SESSION_ABORT_DONE:
  2474. case HAL_SESSION_STOP_DONE:
  2475. case HAL_SESSION_FLUSH_DONE:
  2476. case HAL_SESSION_SET_BUFFER_DONE:
  2477. case HAL_SESSION_SUSPEND_DONE:
  2478. case HAL_SESSION_RESUME_DONE:
  2479. case HAL_SESSION_SET_PROP_DONE:
  2480. case HAL_SESSION_GET_PROP_DONE:
  2481. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2482. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2483. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2484. case HAL_SESSION_DFS_CONFIG_CMD_DONE:
  2485. case HAL_SESSION_DMM_CONFIG_CMD_DONE:
  2486. case HAL_SESSION_WARP_CONFIG_CMD_DONE:
  2487. case HAL_SESSION_WARP_NCC_CONFIG_CMD_DONE:
  2488. case HAL_SESSION_TME_CONFIG_CMD_DONE:
  2489. case HAL_SESSION_ODT_CONFIG_CMD_DONE:
  2490. case HAL_SESSION_OD_CONFIG_CMD_DONE:
  2491. case HAL_SESSION_NCC_CONFIG_CMD_DONE:
  2492. case HAL_SESSION_ICA_CONFIG_CMD_DONE:
  2493. case HAL_SESSION_HCD_CONFIG_CMD_DONE:
  2494. case HAL_SESSION_DCM_CONFIG_CMD_DONE:
  2495. case HAL_SESSION_DC_CONFIG_CMD_DONE:
  2496. case HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE:
  2497. case HAL_SESSION_DMM_PARAMS_CMD_DONE:
  2498. case HAL_SESSION_WARP_DS_PARAMS_CMD_DONE:
  2499. case HAL_SESSION_DFS_FRAME_CMD_DONE:
  2500. case HAL_SESSION_DMM_FRAME_CMD_DONE:
  2501. case HAL_SESSION_WARP_FRAME_CMD_DONE:
  2502. case HAL_SESSION_WARP_NCC_FRAME_CMD_DONE:
  2503. case HAL_SESSION_ICA_FRAME_CMD_DONE:
  2504. case HAL_SESSION_FD_FRAME_CMD_DONE:
  2505. case HAL_SESSION_PERSIST_SET_DONE:
  2506. case HAL_SESSION_PERSIST_REL_DONE:
  2507. case HAL_SESSION_FD_CONFIG_CMD_DONE:
  2508. case HAL_SESSION_MODEL_BUF_CMD_DONE:
  2509. case HAL_SESSION_PROPERTY_INFO:
  2510. case HAL_SESSION_EVENT_CHANGE:
  2511. session_id = &info->response.cmd.session_id;
  2512. break;
  2513. case HAL_SESSION_ERROR:
  2514. session_id = &info->response.data.session_id;
  2515. break;
  2516. case HAL_RESPONSE_UNUSED:
  2517. default:
  2518. session_id = NULL;
  2519. break;
  2520. }
  2521. return session_id;
  2522. }
  2523. static void print_msg_hdr(void *hdr)
  2524. {
  2525. struct cvp_hfi_msg_session_hdr *new_hdr =
  2526. (struct cvp_hfi_msg_session_hdr *)hdr;
  2527. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2528. new_hdr->size, new_hdr->packet_type,
  2529. new_hdr->session_id,
  2530. new_hdr->client_data.transaction_id,
  2531. new_hdr->client_data.data1,
  2532. new_hdr->client_data.data2,
  2533. new_hdr->error_type);
  2534. }
  2535. static int __response_handler(struct iris_hfi_device *device)
  2536. {
  2537. struct msm_cvp_cb_info *packets;
  2538. int packet_count = 0;
  2539. u8 *raw_packet = NULL;
  2540. bool requeue_pm_work = true;
  2541. if (!device || device->state != IRIS_STATE_INIT)
  2542. return 0;
  2543. packets = device->response_pkt;
  2544. raw_packet = device->raw_packet;
  2545. if (!raw_packet || !packets) {
  2546. dprintk(CVP_ERR,
  2547. "%s: Invalid args : Res packet = %p, Raw packet = %p\n",
  2548. __func__, packets, raw_packet);
  2549. return 0;
  2550. }
  2551. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2552. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2553. device->sfr.align_virtual_addr;
  2554. struct msm_cvp_cb_info info = {
  2555. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2556. .response.cmd = {
  2557. .device_id = device->device_id,
  2558. }
  2559. };
  2560. if (vsfr)
  2561. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2562. vsfr->rg_data);
  2563. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2564. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2565. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2566. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2567. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2568. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2569. packets[packet_count++] = info;
  2570. goto exit;
  2571. }
  2572. /* Bleed the msg queue dry of packets */
  2573. while (!__iface_msgq_read(device, raw_packet)) {
  2574. void **session_id = NULL;
  2575. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2576. struct cvp_hfi_msg_session_hdr *hdr =
  2577. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2578. int rc = 0;
  2579. print_msg_hdr(hdr);
  2580. rc = cvp_hfi_process_msg_packet(device->device_id,
  2581. raw_packet, info);
  2582. if (rc) {
  2583. dprintk(CVP_WARN,
  2584. "Corrupt/unknown packet found, discarding\n");
  2585. --packet_count;
  2586. continue;
  2587. } else if (info->response_type == HAL_NO_RESP) {
  2588. --packet_count;
  2589. continue;
  2590. }
  2591. /* Process the packet types that we're interested in */
  2592. process_system_msg(info, device, raw_packet);
  2593. session_id = get_session_id(info);
  2594. /*
  2595. * hfi_process_msg_packet provides a session_id that's a hashed
  2596. * value of struct cvp_hal_session, we need to coerce the hashed
  2597. * value back to pointer that we can use. Ideally, hfi_process\
  2598. * _msg_packet should take care of this, but it doesn't have
  2599. * required information for it
  2600. */
  2601. if (session_id) {
  2602. struct cvp_hal_session *session = NULL;
  2603. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2604. dprintk(CVP_ERR,
  2605. "Upper 32-bits != 0 for sess_id=%pK\n",
  2606. *session_id);
  2607. }
  2608. session = __get_session(device,
  2609. (u32)(uintptr_t)*session_id);
  2610. if (!session) {
  2611. dprintk(CVP_ERR, _INVALID_MSG_,
  2612. info->response_type,
  2613. *session_id);
  2614. --packet_count;
  2615. continue;
  2616. }
  2617. *session_id = session->session_id;
  2618. }
  2619. if (packet_count >= cvp_max_packets) {
  2620. dprintk(CVP_WARN,
  2621. "Too many packets in message queue!\n");
  2622. break;
  2623. }
  2624. /* do not read packets after sys error packet */
  2625. if (info->response_type == HAL_SYS_ERROR)
  2626. break;
  2627. }
  2628. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2629. cancel_delayed_work(&iris_hfi_pm_work);
  2630. if (!queue_delayed_work(device->iris_pm_workq,
  2631. &iris_hfi_pm_work,
  2632. msecs_to_jiffies(
  2633. device->res->msm_cvp_pwr_collapse_delay))) {
  2634. dprintk(CVP_ERR, "PM work already scheduled\n");
  2635. }
  2636. }
  2637. exit:
  2638. __flush_debug_queue(device, raw_packet);
  2639. return packet_count;
  2640. }
  2641. static void iris_hfi_core_work_handler(struct work_struct *work)
  2642. {
  2643. struct msm_cvp_core *core;
  2644. struct iris_hfi_device *device;
  2645. int num_responses = 0, i = 0;
  2646. u32 intr_status;
  2647. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2648. if (core)
  2649. device = core->device->hfi_device_data;
  2650. else
  2651. return;
  2652. mutex_lock(&device->lock);
  2653. if (!__core_in_valid_state(device)) {
  2654. dprintk(CVP_WARN, "%s - Core not in init state\n", __func__);
  2655. goto err_no_work;
  2656. }
  2657. if (!device->callback) {
  2658. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2659. device);
  2660. goto err_no_work;
  2661. }
  2662. if (__resume(device)) {
  2663. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2664. goto err_no_work;
  2665. }
  2666. __core_clear_interrupt(device);
  2667. num_responses = __response_handler(device);
  2668. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2669. __func__, num_responses);
  2670. err_no_work:
  2671. /* Keep the interrupt status before releasing device lock */
  2672. intr_status = device->intr_status;
  2673. mutex_unlock(&device->lock);
  2674. /*
  2675. * Issue the callbacks outside of the locked contex to preserve
  2676. * re-entrancy.
  2677. */
  2678. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2679. i < num_responses; ++i) {
  2680. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2681. void *rsp = (void *)&r->response;
  2682. if (!__core_in_valid_state(device)) {
  2683. dprintk(CVP_ERR,
  2684. _INVALID_STATE_, (i + 1), num_responses);
  2685. break;
  2686. }
  2687. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2688. (i + 1), num_responses, r->response_type);
  2689. device->callback(r->response_type, rsp);
  2690. }
  2691. /* We need re-enable the irq which was disabled in ISR handler */
  2692. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2693. enable_irq(device->cvp_hal_data->irq);
  2694. /*
  2695. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2696. * it above doesn't guarantee the atomicity that we're aiming for.
  2697. */
  2698. }
  2699. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2700. static irqreturn_t iris_hfi_isr(int irq, void *dev)
  2701. {
  2702. struct iris_hfi_device *device = dev;
  2703. disable_irq_nosync(irq);
  2704. queue_work(device->cvp_workq, &iris_hfi_work);
  2705. return IRQ_HANDLED;
  2706. }
  2707. static int __init_regs_and_interrupts(struct iris_hfi_device *device,
  2708. struct msm_cvp_platform_resources *res)
  2709. {
  2710. struct cvp_hal_data *hal = NULL;
  2711. int rc = 0;
  2712. rc = __check_core_registered(device, res->firmware_base,
  2713. (u8 *)(uintptr_t)res->register_base,
  2714. res->register_size, res->irq);
  2715. if (!rc) {
  2716. dprintk(CVP_ERR, "Core present/Already added\n");
  2717. rc = -EEXIST;
  2718. goto err_core_init;
  2719. }
  2720. hal = kzalloc(sizeof(*hal), GFP_KERNEL);
  2721. if (!hal) {
  2722. dprintk(CVP_ERR, "Failed to alloc\n");
  2723. rc = -ENOMEM;
  2724. goto err_core_init;
  2725. }
  2726. hal->irq = res->irq;
  2727. hal->firmware_base = res->firmware_base;
  2728. hal->register_base = devm_ioremap(&res->pdev->dev,
  2729. res->register_base, res->register_size);
  2730. hal->register_size = res->register_size;
  2731. if (!hal->register_base) {
  2732. dprintk(CVP_ERR,
  2733. "could not map reg addr %pa of size %d\n",
  2734. &res->register_base, res->register_size);
  2735. goto error_irq_fail;
  2736. }
  2737. device->cvp_hal_data = hal;
  2738. rc = request_irq(res->irq, iris_hfi_isr, IRQF_TRIGGER_HIGH,
  2739. "msm_cvp", device);
  2740. if (unlikely(rc)) {
  2741. dprintk(CVP_ERR, "() :request_irq failed\n");
  2742. goto error_irq_fail;
  2743. }
  2744. disable_irq_nosync(res->irq);
  2745. dprintk(CVP_INFO,
  2746. "firmware_base = %pa, register_base = %pa, register_size = %d\n",
  2747. &res->firmware_base, &res->register_base,
  2748. res->register_size);
  2749. return rc;
  2750. error_irq_fail:
  2751. kfree(hal);
  2752. err_core_init:
  2753. return rc;
  2754. }
  2755. static inline void __deinit_clocks(struct iris_hfi_device *device)
  2756. {
  2757. struct clock_info *cl;
  2758. device->clk_freq = 0;
  2759. iris_hfi_for_each_clock_reverse(device, cl) {
  2760. if (cl->clk) {
  2761. clk_put(cl->clk);
  2762. cl->clk = NULL;
  2763. }
  2764. }
  2765. }
  2766. static inline int __init_clocks(struct iris_hfi_device *device)
  2767. {
  2768. int rc = 0;
  2769. struct clock_info *cl = NULL;
  2770. if (!device) {
  2771. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2772. return -EINVAL;
  2773. }
  2774. iris_hfi_for_each_clock(device, cl) {
  2775. dprintk(CVP_PWR, "%s: scalable? %d, count %d\n",
  2776. cl->name, cl->has_scaling, cl->count);
  2777. }
  2778. iris_hfi_for_each_clock(device, cl) {
  2779. if (!cl->clk) {
  2780. cl->clk = clk_get(&device->res->pdev->dev, cl->name);
  2781. if (IS_ERR_OR_NULL(cl->clk)) {
  2782. dprintk(CVP_ERR,
  2783. "Failed to get clock: %s\n", cl->name);
  2784. rc = PTR_ERR(cl->clk) ?: -EINVAL;
  2785. cl->clk = NULL;
  2786. goto err_clk_get;
  2787. }
  2788. }
  2789. }
  2790. device->clk_freq = 0;
  2791. return 0;
  2792. err_clk_get:
  2793. __deinit_clocks(device);
  2794. return rc;
  2795. }
  2796. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2797. int reset_index, enum reset_state state,
  2798. enum power_state pwr_state)
  2799. {
  2800. int rc = 0;
  2801. struct reset_control *rst;
  2802. struct reset_info rst_info;
  2803. struct reset_set *rst_set = &res->reset_set;
  2804. if (!rst_set->reset_tbl)
  2805. return 0;
  2806. rst_info = rst_set->reset_tbl[reset_index];
  2807. rst = rst_info.rst;
  2808. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2809. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2810. switch (state) {
  2811. case INIT:
  2812. if (rst)
  2813. goto skip_reset_init;
  2814. rst = devm_reset_control_get(&res->pdev->dev,
  2815. rst_set->reset_tbl[reset_index].name);
  2816. if (IS_ERR(rst))
  2817. rc = PTR_ERR(rst);
  2818. rst_set->reset_tbl[reset_index].rst = rst;
  2819. break;
  2820. case ASSERT:
  2821. if (!rst) {
  2822. rc = PTR_ERR(rst);
  2823. goto failed_to_reset;
  2824. }
  2825. if (pwr_state != rst_info.required_state)
  2826. break;
  2827. rc = reset_control_assert(rst);
  2828. break;
  2829. case DEASSERT:
  2830. if (!rst) {
  2831. rc = PTR_ERR(rst);
  2832. goto failed_to_reset;
  2833. }
  2834. if (pwr_state != rst_info.required_state)
  2835. break;
  2836. rc = reset_control_deassert(rst);
  2837. break;
  2838. default:
  2839. dprintk(CVP_ERR, "Invalid reset request\n");
  2840. if (rc)
  2841. goto failed_to_reset;
  2842. }
  2843. return 0;
  2844. skip_reset_init:
  2845. failed_to_reset:
  2846. return rc;
  2847. }
  2848. static inline void __disable_unprepare_clks(struct iris_hfi_device *device)
  2849. {
  2850. struct clock_info *cl;
  2851. if (!device) {
  2852. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2853. return;
  2854. }
  2855. iris_hfi_for_each_clock_reverse(device, cl) {
  2856. dprintk(CVP_PWR, "Clock: %s disable and unprepare\n",
  2857. cl->name);
  2858. clk_disable_unprepare(cl->clk);
  2859. }
  2860. }
  2861. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2862. {
  2863. int rc, i;
  2864. enum power_state s;
  2865. if (!device) {
  2866. dprintk(CVP_ERR, "NULL device\n");
  2867. rc = -EINVAL;
  2868. goto failed_to_reset;
  2869. }
  2870. if (device->power_enabled)
  2871. s = CVP_POWER_ON;
  2872. else
  2873. s = CVP_POWER_OFF;
  2874. for (i = 0; i < device->res->reset_set.count; i++) {
  2875. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2876. if (rc) {
  2877. dprintk(CVP_ERR,
  2878. "failed to assert reset clocks\n");
  2879. goto failed_to_reset;
  2880. }
  2881. /* wait for deassert */
  2882. usleep_range(1000, 1050);
  2883. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2884. if (rc) {
  2885. dprintk(CVP_ERR,
  2886. "failed to deassert reset clocks\n");
  2887. goto failed_to_reset;
  2888. }
  2889. }
  2890. return 0;
  2891. failed_to_reset:
  2892. return rc;
  2893. }
  2894. static inline int __prepare_enable_clks(struct iris_hfi_device *device)
  2895. {
  2896. struct clock_info *cl = NULL, *cl_fail = NULL;
  2897. int rc = 0, c = 0;
  2898. if (!device) {
  2899. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2900. return -EINVAL;
  2901. }
  2902. iris_hfi_for_each_clock(device, cl) {
  2903. /*
  2904. * For the clocks we control, set the rate prior to preparing
  2905. * them. Since we don't really have a load at this point, scale
  2906. * it to the lowest frequency possible
  2907. */
  2908. if (cl->has_scaling)
  2909. clk_set_rate(cl->clk, clk_round_rate(cl->clk, 0));
  2910. rc = clk_prepare_enable(cl->clk);
  2911. if (rc) {
  2912. dprintk(CVP_ERR, "Failed to enable clocks\n");
  2913. cl_fail = cl;
  2914. goto fail_clk_enable;
  2915. }
  2916. c++;
  2917. dprintk(CVP_PWR, "Clock: %s prepared and enabled\n", cl->name);
  2918. }
  2919. return rc;
  2920. fail_clk_enable:
  2921. iris_hfi_for_each_clock_reverse_continue(device, cl, c) {
  2922. dprintk(CVP_ERR, "Clock: %s disable and unprepare\n",
  2923. cl->name);
  2924. clk_disable_unprepare(cl->clk);
  2925. }
  2926. return rc;
  2927. }
  2928. static void __deinit_bus(struct iris_hfi_device *device)
  2929. {
  2930. struct bus_info *bus = NULL;
  2931. if (!device)
  2932. return;
  2933. kfree(device->bus_vote.data);
  2934. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2935. iris_hfi_for_each_bus_reverse(device, bus) {
  2936. dev_set_drvdata(bus->dev, NULL);
  2937. icc_put(bus->client);
  2938. bus->client = NULL;
  2939. }
  2940. }
  2941. static int __init_bus(struct iris_hfi_device *device)
  2942. {
  2943. struct bus_info *bus = NULL;
  2944. int rc = 0;
  2945. if (!device)
  2946. return -EINVAL;
  2947. iris_hfi_for_each_bus(device, bus) {
  2948. /*
  2949. * This is stupid, but there's no other easy way to ahold
  2950. * of struct bus_info in iris_hfi_devfreq_*()
  2951. */
  2952. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2953. dev_name(bus->dev));
  2954. dev_set_drvdata(bus->dev, device);
  2955. bus->client = icc_get(&device->res->pdev->dev,
  2956. bus->master, bus->slave);
  2957. if (IS_ERR_OR_NULL(bus->client)) {
  2958. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2959. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2960. bus->name, rc);
  2961. bus->client = NULL;
  2962. goto err_add_dev;
  2963. }
  2964. }
  2965. return 0;
  2966. err_add_dev:
  2967. __deinit_bus(device);
  2968. return rc;
  2969. }
  2970. static void __deinit_regulators(struct iris_hfi_device *device)
  2971. {
  2972. struct regulator_info *rinfo = NULL;
  2973. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2974. if (rinfo->regulator) {
  2975. regulator_put(rinfo->regulator);
  2976. rinfo->regulator = NULL;
  2977. }
  2978. }
  2979. }
  2980. static int __init_regulators(struct iris_hfi_device *device)
  2981. {
  2982. int rc = 0;
  2983. struct regulator_info *rinfo = NULL;
  2984. iris_hfi_for_each_regulator(device, rinfo) {
  2985. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2986. rinfo->name);
  2987. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2988. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2989. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2990. rinfo->name);
  2991. rinfo->regulator = NULL;
  2992. goto err_reg_get;
  2993. }
  2994. }
  2995. return 0;
  2996. err_reg_get:
  2997. __deinit_regulators(device);
  2998. return rc;
  2999. }
  3000. static void __deinit_subcaches(struct iris_hfi_device *device)
  3001. {
  3002. struct subcache_info *sinfo = NULL;
  3003. if (!device) {
  3004. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  3005. device);
  3006. goto exit;
  3007. }
  3008. if (!is_sys_cache_present(device))
  3009. goto exit;
  3010. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3011. if (sinfo->subcache) {
  3012. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  3013. sinfo->name);
  3014. llcc_slice_putd(sinfo->subcache);
  3015. sinfo->subcache = NULL;
  3016. }
  3017. }
  3018. exit:
  3019. return;
  3020. }
  3021. static int __init_subcaches(struct iris_hfi_device *device)
  3022. {
  3023. int rc = 0;
  3024. struct subcache_info *sinfo = NULL;
  3025. if (!device) {
  3026. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  3027. device);
  3028. return -EINVAL;
  3029. }
  3030. if (!is_sys_cache_present(device))
  3031. return 0;
  3032. iris_hfi_for_each_subcache(device, sinfo) {
  3033. if (!strcmp("cvp", sinfo->name)) {
  3034. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  3035. } else if (!strcmp("cvpfw", sinfo->name)) {
  3036. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  3037. } else {
  3038. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  3039. sinfo->name);
  3040. }
  3041. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  3042. rc = PTR_ERR(sinfo->subcache) ?
  3043. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  3044. dprintk(CVP_ERR,
  3045. "init_subcaches: invalid subcache: %s rc %d\n",
  3046. sinfo->name, rc);
  3047. sinfo->subcache = NULL;
  3048. goto err_subcache_get;
  3049. }
  3050. dprintk(CVP_CORE, "init_subcaches: %s\n",
  3051. sinfo->name);
  3052. }
  3053. return 0;
  3054. err_subcache_get:
  3055. __deinit_subcaches(device);
  3056. return rc;
  3057. }
  3058. static int __init_resources(struct iris_hfi_device *device,
  3059. struct msm_cvp_platform_resources *res)
  3060. {
  3061. int i, rc = 0;
  3062. rc = __init_regulators(device);
  3063. if (rc) {
  3064. dprintk(CVP_ERR, "Failed to get all regulators\n");
  3065. return -ENODEV;
  3066. }
  3067. rc = __init_clocks(device);
  3068. if (rc) {
  3069. dprintk(CVP_ERR, "Failed to init clocks\n");
  3070. rc = -ENODEV;
  3071. goto err_init_clocks;
  3072. }
  3073. for (i = 0; i < device->res->reset_set.count; i++) {
  3074. rc = __handle_reset_clk(res, i, INIT, 0);
  3075. if (rc) {
  3076. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  3077. rc = -ENODEV;
  3078. goto err_init_reset_clk;
  3079. }
  3080. }
  3081. rc = __init_bus(device);
  3082. if (rc) {
  3083. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  3084. goto err_init_bus;
  3085. }
  3086. rc = __init_subcaches(device);
  3087. if (rc)
  3088. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  3089. device->sys_init_capabilities =
  3090. kzalloc(sizeof(struct msm_cvp_capability)
  3091. * CVP_MAX_SESSIONS, GFP_KERNEL);
  3092. return rc;
  3093. err_init_reset_clk:
  3094. err_init_bus:
  3095. __deinit_clocks(device);
  3096. err_init_clocks:
  3097. __deinit_regulators(device);
  3098. return rc;
  3099. }
  3100. static void __deinit_resources(struct iris_hfi_device *device)
  3101. {
  3102. __deinit_subcaches(device);
  3103. __deinit_bus(device);
  3104. __deinit_clocks(device);
  3105. __deinit_regulators(device);
  3106. kfree(device->sys_init_capabilities);
  3107. device->sys_init_capabilities = NULL;
  3108. }
  3109. static int __disable_regulator(struct regulator_info *rinfo,
  3110. struct iris_hfi_device *device)
  3111. {
  3112. int rc = 0;
  3113. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  3114. /*
  3115. * This call is needed. Driver needs to acquire the control back
  3116. * from HW in order to disable the regualtor. Else the behavior
  3117. * is unknown.
  3118. */
  3119. rc = __acquire_regulator(rinfo, device);
  3120. if (rc) {
  3121. /*
  3122. * This is somewhat fatal, but nothing we can do
  3123. * about it. We can't disable the regulator w/o
  3124. * getting it back under s/w control
  3125. */
  3126. dprintk(CVP_WARN,
  3127. "Failed to acquire control on %s\n",
  3128. rinfo->name);
  3129. goto disable_regulator_failed;
  3130. }
  3131. rc = regulator_disable(rinfo->regulator);
  3132. if (rc) {
  3133. dprintk(CVP_WARN,
  3134. "Failed to disable %s: %d\n",
  3135. rinfo->name, rc);
  3136. goto disable_regulator_failed;
  3137. }
  3138. return 0;
  3139. disable_regulator_failed:
  3140. /* Bring attention to this issue */
  3141. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3142. return rc;
  3143. }
  3144. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  3145. {
  3146. int rc = 0;
  3147. if (!msm_cvp_fw_low_power_mode) {
  3148. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  3149. return 0;
  3150. }
  3151. rc = __hand_off_regulators(device);
  3152. if (rc)
  3153. dprintk(CVP_WARN,
  3154. "%s : Failed to enable HW power collapse %d\n",
  3155. __func__, rc);
  3156. return rc;
  3157. }
  3158. static int __enable_regulators(struct iris_hfi_device *device)
  3159. {
  3160. int rc = 0, c = 0;
  3161. struct regulator_info *rinfo;
  3162. dprintk(CVP_PWR, "Enabling regulators\n");
  3163. iris_hfi_for_each_regulator(device, rinfo) {
  3164. rc = regulator_enable(rinfo->regulator);
  3165. if (rc) {
  3166. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  3167. rinfo->name, rc);
  3168. goto err_reg_enable_failed;
  3169. }
  3170. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  3171. c++;
  3172. }
  3173. return 0;
  3174. err_reg_enable_failed:
  3175. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  3176. __disable_regulator(rinfo, device);
  3177. return rc;
  3178. }
  3179. static int __disable_regulators(struct iris_hfi_device *device)
  3180. {
  3181. struct regulator_info *rinfo;
  3182. dprintk(CVP_PWR, "Disabling regulators\n");
  3183. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  3184. __disable_regulator(rinfo, device);
  3185. if (rinfo->has_hw_power_collapse)
  3186. regulator_set_mode(rinfo->regulator,
  3187. REGULATOR_MODE_NORMAL);
  3188. }
  3189. return 0;
  3190. }
  3191. static int __enable_subcaches(struct iris_hfi_device *device)
  3192. {
  3193. int rc = 0;
  3194. u32 c = 0;
  3195. struct subcache_info *sinfo;
  3196. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3197. return 0;
  3198. /* Activate subcaches */
  3199. iris_hfi_for_each_subcache(device, sinfo) {
  3200. rc = llcc_slice_activate(sinfo->subcache);
  3201. if (rc) {
  3202. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  3203. sinfo->name, rc);
  3204. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3205. goto err_activate_fail;
  3206. }
  3207. sinfo->isactive = true;
  3208. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  3209. c++;
  3210. }
  3211. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  3212. return 0;
  3213. err_activate_fail:
  3214. __release_subcaches(device);
  3215. __disable_subcaches(device);
  3216. return 0;
  3217. }
  3218. static int __set_subcaches(struct iris_hfi_device *device)
  3219. {
  3220. int rc = 0;
  3221. u32 c = 0;
  3222. struct subcache_info *sinfo;
  3223. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3224. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3225. struct cvp_hfi_resource_subcache_type *sc_res;
  3226. struct cvp_resource_hdr rhdr;
  3227. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  3228. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  3229. return 0;
  3230. }
  3231. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3232. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3233. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3234. iris_hfi_for_each_subcache(device, sinfo) {
  3235. if (sinfo->isactive) {
  3236. sc_res[c].size = sinfo->subcache->slice_size;
  3237. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3238. c++;
  3239. }
  3240. }
  3241. /* Set resource to CVP for activated subcaches */
  3242. if (c) {
  3243. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  3244. rhdr.resource_handle = sc_res_info; /* cookie */
  3245. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3246. sc_res_info->num_entries = c;
  3247. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  3248. if (rc) {
  3249. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  3250. goto err_fail_set_subacaches;
  3251. }
  3252. iris_hfi_for_each_subcache(device, sinfo) {
  3253. if (sinfo->isactive)
  3254. sinfo->isset = true;
  3255. }
  3256. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  3257. device->res->sys_cache_res_set = true;
  3258. }
  3259. return 0;
  3260. err_fail_set_subacaches:
  3261. __disable_subcaches(device);
  3262. return 0;
  3263. }
  3264. static int __release_subcaches(struct iris_hfi_device *device)
  3265. {
  3266. struct subcache_info *sinfo;
  3267. int rc = 0;
  3268. u32 c = 0;
  3269. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3270. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3271. struct cvp_hfi_resource_subcache_type *sc_res;
  3272. struct cvp_resource_hdr rhdr;
  3273. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3274. return 0;
  3275. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3276. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3277. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3278. /* Release resource command to Iris */
  3279. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3280. if (sinfo->isset) {
  3281. /* Update the entry */
  3282. sc_res[c].size = sinfo->subcache->slice_size;
  3283. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3284. c++;
  3285. sinfo->isset = false;
  3286. }
  3287. }
  3288. if (c > 0) {
  3289. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3290. rhdr.resource_handle = sc_res_info; /* cookie */
  3291. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3292. rc = __core_release_resource(device, &rhdr);
  3293. if (rc)
  3294. dprintk(CVP_WARN,
  3295. "Failed to release %d subcaches\n", c);
  3296. }
  3297. device->res->sys_cache_res_set = false;
  3298. return 0;
  3299. }
  3300. static int __disable_subcaches(struct iris_hfi_device *device)
  3301. {
  3302. struct subcache_info *sinfo;
  3303. int rc = 0;
  3304. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3305. return 0;
  3306. /* De-activate subcaches */
  3307. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3308. if (sinfo->isactive) {
  3309. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3310. sinfo->name);
  3311. rc = llcc_slice_deactivate(sinfo->subcache);
  3312. if (rc) {
  3313. dprintk(CVP_WARN,
  3314. "Failed to de-activate %s: %d\n",
  3315. sinfo->name, rc);
  3316. }
  3317. sinfo->isactive = false;
  3318. }
  3319. }
  3320. return 0;
  3321. }
  3322. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3323. {
  3324. u32 mask_val = 0;
  3325. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3326. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3327. /* Write 0 to unmask CPU and WD interrupts */
  3328. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3329. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3330. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3331. CVP_WRAPPER_INTR_MASK, mask_val);
  3332. }
  3333. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3334. {
  3335. /* initialize DSP QTBL & UCREGION with CPU queues */
  3336. __write_register(device, HFI_DSP_QTBL_ADDR,
  3337. (u32)device->dsp_iface_q_table.align_device_addr);
  3338. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3339. (u32)device->dsp_iface_q_table.align_device_addr);
  3340. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3341. device->dsp_iface_q_table.mem_data.size);
  3342. }
  3343. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3344. {
  3345. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3346. }
  3347. static int __set_ubwc_config(struct iris_hfi_device *device)
  3348. {
  3349. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3350. int rc = 0;
  3351. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3352. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3353. if (!device->res->ubwc_config)
  3354. return 0;
  3355. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3356. device->res->ubwc_config);
  3357. if (rc) {
  3358. dprintk(CVP_WARN,
  3359. "ubwc config setting to FW failed\n");
  3360. rc = -ENOTEMPTY;
  3361. goto fail_to_set_ubwc_config;
  3362. }
  3363. if (__iface_cmdq_write(device, pkt)) {
  3364. rc = -ENOTEMPTY;
  3365. goto fail_to_set_ubwc_config;
  3366. }
  3367. fail_to_set_ubwc_config:
  3368. return rc;
  3369. }
  3370. static int __iris_power_on(struct iris_hfi_device *device)
  3371. {
  3372. int rc = 0;
  3373. if (device->power_enabled)
  3374. return 0;
  3375. /* Vote for all hardware resources */
  3376. rc = __vote_buses(device, device->bus_vote.data,
  3377. device->bus_vote.data_count);
  3378. if (rc) {
  3379. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3380. goto fail_vote_buses;
  3381. }
  3382. rc = __enable_regulators(device);
  3383. if (rc) {
  3384. dprintk(CVP_ERR, "Failed to enable GDSC, err = %d\n", rc);
  3385. goto fail_enable_gdsc;
  3386. }
  3387. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3388. if (rc) {
  3389. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3390. goto fail_enable_clks;
  3391. }
  3392. rc = __prepare_enable_clks(device);
  3393. if (rc) {
  3394. dprintk(CVP_ERR, "Failed to enable clocks: %d\n", rc);
  3395. goto fail_enable_clks;
  3396. }
  3397. rc = __scale_clocks(device);
  3398. if (rc) {
  3399. dprintk(CVP_WARN,
  3400. "Failed to scale clocks, perf may regress\n");
  3401. rc = 0;
  3402. }
  3403. /*Do not access registers before this point!*/
  3404. device->power_enabled = true;
  3405. dprintk(CVP_PWR, "Done with scaling\n");
  3406. /*
  3407. * Re-program all of the registers that get reset as a result of
  3408. * regulator_disable() and _enable()
  3409. */
  3410. __set_registers(device);
  3411. dprintk(CVP_CORE, "Done with register set\n");
  3412. call_iris_op(device, interrupt_init, device);
  3413. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3414. device->intr_status = 0;
  3415. enable_irq(device->cvp_hal_data->irq);
  3416. return rc;
  3417. fail_enable_clks:
  3418. __disable_regulators(device);
  3419. fail_enable_gdsc:
  3420. __unvote_buses(device);
  3421. fail_vote_buses:
  3422. device->power_enabled = false;
  3423. return rc;
  3424. }
  3425. void power_off_common(struct iris_hfi_device *device)
  3426. {
  3427. if (!device->power_enabled)
  3428. return;
  3429. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3430. disable_irq_nosync(device->cvp_hal_data->irq);
  3431. device->intr_status = 0;
  3432. __disable_unprepare_clks(device);
  3433. if (__disable_regulators(device))
  3434. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3435. if (__unvote_buses(device))
  3436. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3437. device->power_enabled = false;
  3438. }
  3439. static inline int __suspend(struct iris_hfi_device *device)
  3440. {
  3441. int rc = 0;
  3442. if (!device) {
  3443. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3444. return -EINVAL;
  3445. } else if (!device->power_enabled) {
  3446. dprintk(CVP_PWR, "Power already disabled\n");
  3447. return 0;
  3448. }
  3449. dprintk(CVP_PWR, "Entering suspend\n");
  3450. if (device->res->pm_qos_latency_us &&
  3451. cpu_latency_qos_request_active(&device->qos))
  3452. cpu_latency_qos_remove_request(&device->qos);
  3453. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3454. if (rc) {
  3455. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3456. goto err_tzbsp_suspend;
  3457. }
  3458. __disable_subcaches(device);
  3459. call_iris_op(device, power_off, device);
  3460. dprintk(CVP_PWR, "Iris power off\n");
  3461. return rc;
  3462. err_tzbsp_suspend:
  3463. return rc;
  3464. }
  3465. static void power_off_iris2(struct iris_hfi_device *device)
  3466. {
  3467. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3468. u32 pc_ready, wfi_status, sbm_ln0_low;
  3469. u32 main_sbm_ln0_low, main_sbm_ln1_high;
  3470. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3471. return;
  3472. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3473. disable_irq_nosync(device->cvp_hal_data->irq);
  3474. device->intr_status = 0;
  3475. /* HPG 6.1.2 Step 1 */
  3476. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3477. /* HPG 6.1.2 Step 2, noc to low power */
  3478. __write_register(device, CVP_AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1);
  3479. while (!reg_status && count < max_count) {
  3480. lpi_status =
  3481. __read_register(device,
  3482. CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
  3483. reg_status = lpi_status & BIT(0);
  3484. /* Wait for noc lpi status to be set */
  3485. usleep_range(50, 100);
  3486. count++;
  3487. }
  3488. dprintk(CVP_PWR,
  3489. "Noc: lpi_status %x noc_status %x (count %d)\n",
  3490. lpi_status, reg_status, count);
  3491. if (count == max_count) {
  3492. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3493. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3494. sbm_ln0_low =
  3495. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3496. main_sbm_ln0_low = __read_register(device,
  3497. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3498. main_sbm_ln1_high = __read_register(device,
  3499. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3500. dprintk(CVP_WARN,
  3501. "NOC not in qaccept status %x %x %x %x %x %x %x\n",
  3502. reg_status, lpi_status, wfi_status, pc_ready,
  3503. sbm_ln0_low, main_sbm_ln0_low, main_sbm_ln1_high);
  3504. }
  3505. /* HPG 6.1.2 Step 3, debug bridge to low power */
  3506. __write_register(device,
  3507. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x7);
  3508. reg_status = 0;
  3509. count = 0;
  3510. while ((reg_status != 0x7) && count < max_count) {
  3511. lpi_status = __read_register(device,
  3512. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3513. reg_status = lpi_status & 0x7;
  3514. /* Wait for debug bridge lpi status to be set */
  3515. usleep_range(50, 100);
  3516. count++;
  3517. }
  3518. dprintk(CVP_PWR,
  3519. "DBLP Set : lpi_status %d reg_status %d (count %d)\n",
  3520. lpi_status, reg_status, count);
  3521. if (count == max_count) {
  3522. dprintk(CVP_WARN,
  3523. "DBLP Set: status %x %x\n", reg_status, lpi_status);
  3524. }
  3525. /* HPG 6.1.2 Step 4, debug bridge to lpi release */
  3526. __write_register(device,
  3527. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3528. lpi_status = 0x1;
  3529. count = 0;
  3530. while (lpi_status && count < max_count) {
  3531. lpi_status = __read_register(device,
  3532. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3533. usleep_range(50, 100);
  3534. count++;
  3535. }
  3536. dprintk(CVP_PWR,
  3537. "DBLP Release: lpi_status %d(count %d)\n",
  3538. lpi_status, count);
  3539. if (count == max_count) {
  3540. dprintk(CVP_WARN,
  3541. "DBLP Release: lpi_status %x\n", lpi_status);
  3542. }
  3543. /* HPG 6.1.2 Step 6 */
  3544. __disable_unprepare_clks(device);
  3545. /*
  3546. * HPG 6.1.2 Step 7 & 8
  3547. * per new HPG update, core clock reset will be unnecessary
  3548. */
  3549. if (__unvote_buses(device))
  3550. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3551. /* HPG 6.1.2 Step 5 */
  3552. if (__disable_regulators(device))
  3553. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3554. /*Do not access registers after this point!*/
  3555. device->power_enabled = false;
  3556. }
  3557. static inline int __resume(struct iris_hfi_device *device)
  3558. {
  3559. int rc = 0;
  3560. u32 flags = 0, reg_gdsc, reg_cbcr;
  3561. if (!device) {
  3562. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3563. return -EINVAL;
  3564. } else if (device->power_enabled) {
  3565. goto exit;
  3566. } else if (!__core_in_valid_state(device)) {
  3567. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3568. return -EINVAL;
  3569. }
  3570. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3571. rc = __iris_power_on(device);
  3572. if (rc) {
  3573. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3574. goto err_iris_power_on;
  3575. }
  3576. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3577. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3578. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3579. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3580. reg_gdsc, reg_cbcr);
  3581. /* Reboot the firmware */
  3582. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3583. if (rc) {
  3584. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3585. goto err_set_cvp_state;
  3586. }
  3587. __setup_ucregion_memory_map(device);
  3588. /* Wait for boot completion */
  3589. rc = __boot_firmware(device);
  3590. if (rc) {
  3591. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3592. goto err_reset_core;
  3593. }
  3594. /*
  3595. * Work around for H/W bug, need to reprogram these registers once
  3596. * firmware is out reset
  3597. */
  3598. __set_threshold_registers(device);
  3599. if (device->res->pm_qos_latency_us)
  3600. cpu_latency_qos_add_request(&device->qos,
  3601. device->res->pm_qos_latency_us);
  3602. __sys_set_debug(device, msm_cvp_fw_debug);
  3603. __enable_subcaches(device);
  3604. __set_subcaches(device);
  3605. __dsp_resume(device, flags);
  3606. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3607. exit:
  3608. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3609. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3610. device->skip_pc_count = 0;
  3611. return rc;
  3612. err_reset_core:
  3613. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3614. err_set_cvp_state:
  3615. call_iris_op(device, power_off, device);
  3616. err_iris_power_on:
  3617. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3618. return rc;
  3619. }
  3620. static int __load_fw(struct iris_hfi_device *device)
  3621. {
  3622. int rc = 0;
  3623. /* Initialize resources */
  3624. rc = __init_resources(device, device->res);
  3625. if (rc) {
  3626. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3627. goto fail_init_res;
  3628. }
  3629. rc = __initialize_packetization(device);
  3630. if (rc) {
  3631. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3632. goto fail_init_pkt;
  3633. }
  3634. rc = __iris_power_on(device);
  3635. if (rc) {
  3636. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3637. goto fail_iris_power_on;
  3638. }
  3639. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3640. || device->res->use_non_secure_pil) {
  3641. rc = load_cvp_fw_impl(device);
  3642. if (rc)
  3643. goto fail_load_fw;
  3644. }
  3645. return rc;
  3646. fail_load_fw:
  3647. call_iris_op(device, power_off, device);
  3648. fail_iris_power_on:
  3649. fail_init_pkt:
  3650. __deinit_resources(device);
  3651. fail_init_res:
  3652. return rc;
  3653. }
  3654. static void __unload_fw(struct iris_hfi_device *device)
  3655. {
  3656. if (!device->resources.fw.cookie)
  3657. return;
  3658. cancel_delayed_work(&iris_hfi_pm_work);
  3659. if (device->state != IRIS_STATE_DEINIT)
  3660. flush_workqueue(device->iris_pm_workq);
  3661. unload_cvp_fw_impl(device);
  3662. __interface_queues_release(device);
  3663. call_iris_op(device, power_off, device);
  3664. __deinit_resources(device);
  3665. dprintk(CVP_WARN, "Firmware unloaded\n");
  3666. }
  3667. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3668. {
  3669. int i = 0;
  3670. struct iris_hfi_device *device = dev;
  3671. if (!device || !fw_info) {
  3672. dprintk(CVP_ERR,
  3673. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3674. __func__, device, fw_info);
  3675. return -EINVAL;
  3676. }
  3677. mutex_lock(&device->lock);
  3678. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3679. ;
  3680. if (i == CVP_VERSION_LENGTH - 1) {
  3681. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3682. fw_info->version[0] = '\0';
  3683. goto fail_version_string;
  3684. }
  3685. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3686. CVP_VERSION_LENGTH);
  3687. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3688. fail_version_string:
  3689. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3690. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3691. fw_info->register_base = device->res->register_base;
  3692. fw_info->register_size = device->cvp_hal_data->register_size;
  3693. fw_info->irq = device->cvp_hal_data->irq;
  3694. mutex_unlock(&device->lock);
  3695. return 0;
  3696. }
  3697. static int iris_hfi_get_core_capabilities(void *dev)
  3698. {
  3699. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3700. return 0;
  3701. }
  3702. static u32 cvp_arp_test_regs[16];
  3703. static u32 cvp_dma_test_regs[512];
  3704. static const char * const mid_names[16] = {
  3705. "CVP_FW",
  3706. "ARP_DATA",
  3707. "CVP_OD_NON_PIXEL",
  3708. "CVP_OD_ORIG_PIXEL",
  3709. "CVP_OD_WR_PIXEL",
  3710. "CVP_MPU_ORIG_PIXEL",
  3711. "CVP_MPU_REF_PIXEL",
  3712. "CVP_MPU_NON_PIXEL",
  3713. "CVP_MPU_DFS",
  3714. "CVP_FDU_NON_PIXEL",
  3715. "CVP_FDU_PIXEL",
  3716. "CVP_ICA_PIXEL",
  3717. "Invalid",
  3718. "Invalid",
  3719. "Invalid",
  3720. "Invalid"
  3721. };
  3722. static void __print_reg_details(u32 val)
  3723. {
  3724. u32 mid, sid;
  3725. mid = (val >> 5) & 0xF;
  3726. sid = (val >> 2) & 0x7;
  3727. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3728. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3729. }
  3730. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3731. {
  3732. u32 val = 0, regi, i;
  3733. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3734. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_LOW: %#x\n", val);
  3735. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3736. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3737. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3738. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3739. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3740. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3741. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3742. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3743. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3744. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3745. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3746. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3747. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3748. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3749. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3750. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3751. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3752. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3753. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3754. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3755. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3756. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3757. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3758. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3759. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3760. dprintk(CVP_ERR, "CVP_NOC__CORE_ERL_MAIN_SWID_LOW: %#x\n", val);
  3761. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3762. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3763. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3764. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3765. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3766. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3767. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3768. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3769. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3770. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3771. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3772. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3773. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3774. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3775. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3776. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3777. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3778. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3779. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3780. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3781. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3782. __print_reg_details(val);
  3783. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3784. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3785. #define CVP_SS_CLK_HALT 0x8
  3786. #define CVP_SS_CLK_EN 0xC
  3787. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3788. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3789. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3790. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3791. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3792. __write_register(device, CVP_SS_CLK_HALT, 0);
  3793. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3794. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3795. for (i = 0; i < 15; i++) {
  3796. regi = 0xC0000000 + i;
  3797. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3798. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3799. cvp_arp_test_regs[i] = val;
  3800. dprintk(CVP_ERR, "ARP_CTL:%x - %x\n", regi, val);
  3801. }
  3802. for (i = 0; i < 512; i++) {
  3803. regi = 0x40000000 + i;
  3804. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3805. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3806. cvp_dma_test_regs[i] = val;
  3807. dprintk(CVP_ERR, "DMA_CTL:%x - %x\n", regi, val);
  3808. }
  3809. }
  3810. static int iris_hfi_noc_error_info(void *dev)
  3811. {
  3812. struct iris_hfi_device *device;
  3813. if (!dev) {
  3814. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3815. return -EINVAL;
  3816. }
  3817. device = dev;
  3818. mutex_lock(&device->lock);
  3819. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3820. call_iris_op(device, noc_error_info, device);
  3821. mutex_unlock(&device->lock);
  3822. return 0;
  3823. }
  3824. static int __initialize_packetization(struct iris_hfi_device *device)
  3825. {
  3826. int rc = 0;
  3827. if (!device || !device->res) {
  3828. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3829. return -EINVAL;
  3830. }
  3831. device->packetization_type = HFI_PACKETIZATION_4XX;
  3832. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3833. device->packetization_type);
  3834. if (!device->pkt_ops) {
  3835. rc = -EINVAL;
  3836. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3837. }
  3838. return rc;
  3839. }
  3840. void __init_cvp_ops(struct iris_hfi_device *device)
  3841. {
  3842. device->vpu_ops = &iris2_ops;
  3843. }
  3844. static struct iris_hfi_device *__add_device(u32 device_id,
  3845. struct msm_cvp_platform_resources *res,
  3846. hfi_cmd_response_callback callback)
  3847. {
  3848. struct iris_hfi_device *hdevice = NULL;
  3849. int rc = 0;
  3850. if (!res || !callback) {
  3851. dprintk(CVP_ERR, "Invalid Parameters\n");
  3852. return NULL;
  3853. }
  3854. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3855. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3856. if (!hdevice) {
  3857. dprintk(CVP_ERR, "failed to allocate new device\n");
  3858. goto exit;
  3859. }
  3860. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3861. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3862. if (!hdevice->response_pkt) {
  3863. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3864. goto err_cleanup;
  3865. }
  3866. hdevice->raw_packet =
  3867. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3868. if (!hdevice->raw_packet) {
  3869. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3870. goto err_cleanup;
  3871. }
  3872. rc = __init_regs_and_interrupts(hdevice, res);
  3873. if (rc)
  3874. goto err_cleanup;
  3875. hdevice->res = res;
  3876. hdevice->device_id = device_id;
  3877. hdevice->callback = callback;
  3878. __init_cvp_ops(hdevice);
  3879. hdevice->cvp_workq = create_singlethread_workqueue(
  3880. "msm_cvp_workerq_iris");
  3881. if (!hdevice->cvp_workq) {
  3882. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3883. goto err_cleanup;
  3884. }
  3885. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3886. "pm_workerq_iris");
  3887. if (!hdevice->iris_pm_workq) {
  3888. dprintk(CVP_ERR, ": create pm workq failed\n");
  3889. goto err_cleanup;
  3890. }
  3891. mutex_init(&hdevice->lock);
  3892. INIT_LIST_HEAD(&hdevice->sess_head);
  3893. return hdevice;
  3894. err_cleanup:
  3895. if (hdevice->iris_pm_workq)
  3896. destroy_workqueue(hdevice->iris_pm_workq);
  3897. if (hdevice->cvp_workq)
  3898. destroy_workqueue(hdevice->cvp_workq);
  3899. kfree(hdevice->response_pkt);
  3900. kfree(hdevice->raw_packet);
  3901. kfree(hdevice);
  3902. exit:
  3903. return NULL;
  3904. }
  3905. static struct iris_hfi_device *__get_device(u32 device_id,
  3906. struct msm_cvp_platform_resources *res,
  3907. hfi_cmd_response_callback callback)
  3908. {
  3909. if (!res || !callback) {
  3910. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3911. return NULL;
  3912. }
  3913. return __add_device(device_id, res, callback);
  3914. }
  3915. void cvp_iris_hfi_delete_device(void *device)
  3916. {
  3917. struct msm_cvp_core *core;
  3918. struct iris_hfi_device *dev = NULL;
  3919. if (!device)
  3920. return;
  3921. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3922. if (core)
  3923. dev = core->device->hfi_device_data;
  3924. if (!dev)
  3925. return;
  3926. mutex_destroy(&dev->lock);
  3927. destroy_workqueue(dev->cvp_workq);
  3928. destroy_workqueue(dev->iris_pm_workq);
  3929. free_irq(dev->cvp_hal_data->irq, dev);
  3930. iounmap(dev->cvp_hal_data->register_base);
  3931. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3932. kfree(dev->cvp_hal_data);
  3933. kfree(dev->response_pkt);
  3934. kfree(dev->raw_packet);
  3935. kfree(dev);
  3936. }
  3937. static int iris_hfi_validate_session(void *sess, const char *func)
  3938. {
  3939. struct cvp_hal_session *session = sess;
  3940. int rc = 0;
  3941. struct iris_hfi_device *device;
  3942. if (!session || !session->device) {
  3943. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3944. return -EINVAL;
  3945. }
  3946. device = session->device;
  3947. mutex_lock(&device->lock);
  3948. if (!__is_session_valid(device, session, func))
  3949. rc = -ECONNRESET;
  3950. mutex_unlock(&device->lock);
  3951. return rc;
  3952. }
  3953. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3954. {
  3955. hdev->core_init = iris_hfi_core_init;
  3956. hdev->core_release = iris_hfi_core_release;
  3957. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3958. hdev->session_init = iris_hfi_session_init;
  3959. hdev->session_end = iris_hfi_session_end;
  3960. hdev->session_abort = iris_hfi_session_abort;
  3961. hdev->session_clean = iris_hfi_session_clean;
  3962. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3963. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3964. hdev->session_send = iris_hfi_session_send;
  3965. hdev->session_flush = iris_hfi_session_flush;
  3966. hdev->scale_clocks = iris_hfi_scale_clocks;
  3967. hdev->vote_bus = iris_hfi_vote_buses;
  3968. hdev->get_fw_info = iris_hfi_get_fw_info;
  3969. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3970. hdev->suspend = iris_hfi_suspend;
  3971. hdev->resume = iris_hfi_resume;
  3972. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3973. hdev->noc_error_info = iris_hfi_noc_error_info;
  3974. hdev->validate_session = iris_hfi_validate_session;
  3975. }
  3976. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3977. struct msm_cvp_platform_resources *res,
  3978. hfi_cmd_response_callback callback)
  3979. {
  3980. int rc = 0;
  3981. if (!hdev || !res || !callback) {
  3982. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3983. hdev, res, callback);
  3984. rc = -EINVAL;
  3985. goto err_iris_hfi_init;
  3986. }
  3987. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3988. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3989. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3990. goto err_iris_hfi_init;
  3991. }
  3992. iris_init_hfi_callbacks(hdev);
  3993. err_iris_hfi_init:
  3994. return rc;
  3995. }