dp_rx.c 23 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_nbuf.h"
  24. #include <ieee80211.h>
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. /*
  30. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  31. * called during dp rx initialization
  32. * and at the end of dp_rx_process.
  33. *
  34. * @soc: core txrx main context
  35. * @mac_id: mac_id which is one of 3 mac_ids
  36. * @desc_list: list of descs if called from dp_rx_process
  37. * or NULL during dp rx initialization or out of buffer
  38. * interrupt.
  39. * @owner: who owns the nbuf (host, NSS etc...)
  40. * Return: return success or failure
  41. */
  42. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  43. uint32_t num_req_buffers,
  44. union dp_rx_desc_list_elem_t **desc_list,
  45. union dp_rx_desc_list_elem_t **tail,
  46. uint8_t owner)
  47. {
  48. uint32_t num_alloc_desc;
  49. uint16_t num_desc_to_free = 0;
  50. struct dp_pdev *dp_pdev = dp_soc->pdev_list[mac_id];
  51. uint32_t num_entries_avail;
  52. uint32_t count;
  53. int sync_hw_ptr = 1;
  54. qdf_dma_addr_t paddr;
  55. qdf_nbuf_t rx_netbuf;
  56. void *rxdma_ring_entry;
  57. union dp_rx_desc_list_elem_t *next;
  58. struct dp_srng *dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  59. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  60. int32_t ret;
  61. if (!rxdma_srng) {
  62. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  63. "rxdma srng not initialized");
  64. DP_STATS_INC(dp_pdev, err.rxdma_unitialized, 1);
  65. return QDF_STATUS_E_FAILURE;
  66. }
  67. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  68. "requested %d buffers for replenish", num_req_buffers);
  69. /*
  70. * if desc_list is NULL, allocate the descs from freelist
  71. */
  72. if (!(*desc_list)) {
  73. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  74. num_req_buffers,
  75. desc_list,
  76. tail);
  77. if (!num_alloc_desc) {
  78. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  79. "no free rx_descs in freelist");
  80. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  81. num_alloc_desc);
  82. return QDF_STATUS_E_NOMEM;
  83. }
  84. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  85. "%d rx desc allocated", num_alloc_desc);
  86. num_req_buffers = num_alloc_desc;
  87. }
  88. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  89. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  90. rxdma_srng,
  91. sync_hw_ptr);
  92. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  93. "no of availble entries in rxdma ring: %d",
  94. num_entries_avail);
  95. if (num_entries_avail < num_req_buffers) {
  96. num_desc_to_free = num_req_buffers - num_entries_avail;
  97. num_req_buffers = num_entries_avail;
  98. }
  99. count = 0;
  100. while (count < num_req_buffers) {
  101. rx_netbuf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  102. RX_BUFFER_SIZE,
  103. RX_BUFFER_RESERVATION,
  104. RX_BUFFER_ALIGNMENT,
  105. FALSE);
  106. if (rx_netbuf == NULL)
  107. continue;
  108. qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  109. QDF_DMA_BIDIRECTIONAL);
  110. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  111. /*
  112. * check if the physical address of nbuf->data is
  113. * less then 0x50000000 then free the nbuf and try
  114. * allocating new nbuf. We can try for 100 times.
  115. * this is a temp WAR till we fix it properly.
  116. */
  117. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  118. if (ret == QDF_STATUS_E_FAILURE)
  119. break;
  120. count++;
  121. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  122. rxdma_srng);
  123. next = (*desc_list)->next;
  124. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  125. DP_STATS_INC_PKT(dp_pdev, replenished, 1,
  126. qdf_nbuf_len(rx_netbuf));
  127. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  128. (*desc_list)->rx_desc.cookie,
  129. owner);
  130. *desc_list = next;
  131. }
  132. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  134. "successfully replenished %d buffers", num_req_buffers);
  135. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  136. "%d rx desc added back to free list", num_desc_to_free);
  137. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  138. /*
  139. * add any available free desc back to the free list
  140. */
  141. if (*desc_list)
  142. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list,
  143. tail, mac_id);
  144. return QDF_STATUS_SUCCESS;
  145. }
  146. /*
  147. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  148. * pkts to RAW mode simulation to
  149. * decapsulate the pkt.
  150. *
  151. * @vdev: vdev on which RAW mode is enabled
  152. * @nbuf_list: list of RAW pkts to process
  153. *
  154. * Return: void
  155. */
  156. static void
  157. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list)
  158. {
  159. qdf_nbuf_t deliver_list_head = NULL;
  160. qdf_nbuf_t deliver_list_tail = NULL;
  161. qdf_nbuf_t nbuf;
  162. nbuf = nbuf_list;
  163. while (nbuf) {
  164. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  165. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  166. /*
  167. * reset the chfrag_start and chfrag_end bits in nbuf cb
  168. * as this is a non-amsdu pkt and RAW mode simulation expects
  169. * these bit s to be 0 for non-amsdu pkt.
  170. */
  171. if (qdf_nbuf_is_chfrag_start(nbuf) &&
  172. qdf_nbuf_is_chfrag_end(nbuf)) {
  173. qdf_nbuf_set_chfrag_start(nbuf, 0);
  174. qdf_nbuf_set_chfrag_end(nbuf, 0);
  175. }
  176. nbuf = next;
  177. }
  178. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  179. &deliver_list_tail);
  180. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  181. }
  182. #ifdef DP_LFR
  183. /*
  184. * In case of LFR, data of a new peer might be sent up
  185. * even before peer is added.
  186. */
  187. static inline struct dp_vdev *
  188. dp_get_vdev_from_peer(struct dp_soc *soc,
  189. uint16_t peer_id,
  190. struct dp_peer *peer,
  191. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  192. {
  193. struct dp_vdev *vdev;
  194. uint8_t vdev_id;
  195. if (unlikely(!peer)) {
  196. if (peer_id != HTT_INVALID_PEER) {
  197. vdev_id = DP_PEER_METADATA_ID_GET(
  198. mpdu_desc_info.peer_meta_data);
  199. QDF_TRACE(QDF_MODULE_ID_DP,
  200. QDF_TRACE_LEVEL_ERROR,
  201. FL("PeerID %d not found use vdevID %d"),
  202. peer_id, vdev_id);
  203. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  204. vdev_id);
  205. } else {
  206. QDF_TRACE(QDF_MODULE_ID_DP,
  207. QDF_TRACE_LEVEL_ERROR,
  208. FL("Invalid PeerID %d"),
  209. peer_id);
  210. return NULL;
  211. }
  212. } else {
  213. vdev = peer->vdev;
  214. }
  215. return vdev;
  216. }
  217. #else
  218. static inline struct dp_vdev *
  219. dp_get_vdev_from_peer(struct dp_soc *soc,
  220. uint16_t peer_id,
  221. struct dp_peer *peer,
  222. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  223. {
  224. if (unlikely(!peer)) {
  225. QDF_TRACE(QDF_MODULE_ID_DP,
  226. QDF_TRACE_LEVEL_ERROR,
  227. FL("Peer not found for peerID %d"),
  228. peer_id);
  229. return NULL;
  230. } else {
  231. return peer->vdev;
  232. }
  233. }
  234. #endif
  235. /**
  236. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  237. *
  238. * @soc: core txrx main context
  239. * @sa_peer : source peer entry
  240. * @rx_tlv_hdr : start address of rx tlvs
  241. * @nbuf : nbuf that has to be intrabss forwarded
  242. *
  243. * Return: bool: true if it is forwarded else false
  244. */
  245. static bool
  246. dp_rx_intrabss_fwd(struct dp_soc *soc,
  247. struct dp_peer *sa_peer,
  248. uint8_t *rx_tlv_hdr,
  249. qdf_nbuf_t nbuf)
  250. {
  251. DP_STATS_INC_PKT(sa_peer, rx.intra_bss, 1,
  252. qdf_nbuf_len(nbuf));
  253. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  254. FL("Intra-BSS forwarding not implemented"));
  255. return false;
  256. }
  257. #ifdef MESH_MODE_SUPPORT
  258. /**
  259. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  260. *
  261. * @vdev: DP Virtual device handle
  262. * @nbuf: Buffer pointer
  263. *
  264. * This function allocated memory for mesh receive stats and fill the
  265. * required stats. Stores the memory address in skb cb.
  266. *
  267. * Return: void
  268. */
  269. static
  270. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  271. {
  272. struct mesh_recv_hdr_s *rx_info = NULL;
  273. uint32_t pkt_type;
  274. uint32_t nss;
  275. uint32_t rate_mcs;
  276. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  277. /* fill recv mesh stats */
  278. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  279. /* upper layers are resposible to free this memory */
  280. if (rx_info == NULL) {
  281. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  282. "Memory allocation failed for mesh rx stats");
  283. return;
  284. }
  285. if (qdf_nbuf_is_chfrag_start(nbuf))
  286. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  287. if (qdf_nbuf_is_chfrag_end(nbuf))
  288. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  289. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  290. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  291. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  292. rx_info->rs_flags |= MESH_KEY_NOTFILLED;
  293. }
  294. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  295. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  296. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  297. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  298. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  299. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x4) | (pkt_type << 6);
  300. qdf_nbuf_set_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  301. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  302. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  303. rx_info->rs_flags,
  304. rx_info->rs_rssi,
  305. rx_info->rs_channel,
  306. rx_info->rs_ratephy1,
  307. rx_info->rs_keyix);
  308. }
  309. /**
  310. * dp_rx_fill_mesh_stats() - Filters mesh unwanted packets
  311. *
  312. * @vdev: DP Virtual device handle
  313. * @nbuf: Buffer pointer
  314. *
  315. * This checks if the received packet is matching any filter out
  316. * catogery and and drop the packet if it matches.
  317. *
  318. * Return: status(0 indicates drop, 1 indicate to no drop)
  319. */
  320. static inline
  321. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  322. {
  323. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  324. union dp_align_mac_addr mac_addr;
  325. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  326. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  327. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  328. return QDF_STATUS_SUCCESS;
  329. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  330. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  331. return QDF_STATUS_SUCCESS;
  332. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  333. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  334. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  335. return QDF_STATUS_SUCCESS;
  336. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  337. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  338. &mac_addr.raw[0]))
  339. return QDF_STATUS_E_FAILURE;
  340. if (!qdf_mem_cmp(&mac_addr.raw[0],
  341. &vdev->mac_addr.raw[0],
  342. DP_MAC_ADDR_LEN))
  343. return QDF_STATUS_SUCCESS;
  344. }
  345. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  346. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  347. &mac_addr.raw[0]))
  348. return QDF_STATUS_E_FAILURE;
  349. if (!qdf_mem_cmp(&mac_addr.raw[0],
  350. &vdev->mac_addr.raw[0],
  351. DP_MAC_ADDR_LEN))
  352. return QDF_STATUS_SUCCESS;
  353. }
  354. }
  355. return QDF_STATUS_E_FAILURE;
  356. }
  357. #else
  358. static
  359. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  360. {
  361. }
  362. static inline
  363. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  364. {
  365. return QDF_STATUS_E_FAILURE;
  366. }
  367. #endif
  368. /**
  369. * dp_rx_process() - Brain of the Rx processing functionality
  370. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  371. * @soc: core txrx main context
  372. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  373. * @quota: No. of units (packets) that can be serviced in one shot.
  374. *
  375. * This function implements the core of Rx functionality. This is
  376. * expected to handle only non-error frames.
  377. *
  378. * Return: uint32_t: No. of elements processed
  379. */
  380. uint32_t
  381. dp_rx_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  382. {
  383. void *hal_soc;
  384. void *ring_desc;
  385. struct dp_rx_desc *rx_desc;
  386. qdf_nbuf_t nbuf;
  387. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  388. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  389. uint32_t rx_bufs_used = 0, rx_buf_cookie, l2_hdr_offset;
  390. uint16_t msdu_len;
  391. uint16_t peer_id;
  392. struct dp_peer *peer = NULL;
  393. struct dp_vdev *vdev = NULL;
  394. struct dp_vdev *vdev_list[WLAN_UMAC_PSOC_MAX_VDEVS] = { NULL };
  395. uint32_t pkt_len;
  396. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  397. struct hal_rx_msdu_desc_info msdu_desc_info;
  398. enum hal_reo_error_status error;
  399. static uint32_t peer_mdata;
  400. uint8_t *rx_tlv_hdr;
  401. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  402. uint32_t sgi, rate_mcs, tid, nss, bw, reception_type;
  403. uint64_t vdev_map = 0;
  404. uint8_t mac_id;
  405. uint16_t i, vdev_cnt = 0;
  406. uint32_t ampdu_flag, amsdu_flag;
  407. struct ether_header *eh;
  408. /* Debug -- Remove later */
  409. qdf_assert(soc && hal_ring);
  410. hal_soc = soc->hal_soc;
  411. /* Debug -- Remove later */
  412. qdf_assert(hal_soc);
  413. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  414. /*
  415. * Need API to convert from hal_ring pointer to
  416. * Ring Type / Ring Id combo
  417. */
  418. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  419. FL("HAL RING Access Failed -- %p"), hal_ring);
  420. hal_srng_access_end(hal_soc, hal_ring);
  421. goto done;
  422. }
  423. /*
  424. * start reaping the buffers from reo ring and queue
  425. * them in per vdev queue.
  426. * Process the received pkts in a different per vdev loop.
  427. */
  428. while (qdf_likely((ring_desc =
  429. hal_srng_dst_get_next(hal_soc, hal_ring))
  430. && quota--)) {
  431. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  432. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  433. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  434. FL("HAL RING 0x%p:error %d"), hal_ring, error);
  435. /* Don't know how to deal with this -- assert */
  436. qdf_assert(0);
  437. }
  438. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  439. rx_desc = dp_rx_cookie_2_va(soc, rx_buf_cookie);
  440. qdf_assert(rx_desc);
  441. rx_bufs_reaped[rx_desc->pool_id]++;
  442. /* TODO */
  443. /*
  444. * Need a separate API for unmapping based on
  445. * phyiscal address
  446. */
  447. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  448. QDF_DMA_BIDIRECTIONAL);
  449. /* Get MPDU DESC info */
  450. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  451. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  452. mpdu_desc_info.peer_meta_data);
  453. peer = dp_peer_find_by_id(soc, peer_id);
  454. vdev = dp_get_vdev_from_peer(soc, peer_id, peer,
  455. mpdu_desc_info);
  456. if (!vdev) {
  457. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  458. FL("vdev is NULL"));
  459. qdf_nbuf_free(rx_desc->nbuf);
  460. goto fail;
  461. }
  462. if (!((vdev_map >> vdev->vdev_id) & 1)) {
  463. vdev_map |= 1 << vdev->vdev_id;
  464. vdev_list[vdev_cnt] = vdev;
  465. vdev_cnt++;
  466. }
  467. /* Get MSDU DESC info */
  468. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  469. /*
  470. * save msdu flags first, last and continuation msdu in
  471. * nbuf->cb
  472. */
  473. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  474. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  475. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  476. qdf_nbuf_set_chfrag_cont(rx_desc->nbuf, 1);
  477. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  478. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  479. DP_STATS_INC_PKT(peer, rx.rcvd_reo, 1,
  480. qdf_nbuf_len(rx_desc->nbuf));
  481. ampdu_flag = (mpdu_desc_info.mpdu_flags &
  482. HAL_MPDU_F_AMPDU_FLAG);
  483. DP_STATS_INCC(vdev->pdev, rx.ampdu_cnt, 1, ampdu_flag);
  484. DP_STATS_INCC(vdev->pdev, rx.non_ampdu_cnt, 1, !(ampdu_flag));
  485. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  486. amsdu_flag = ((msdu_desc_info.msdu_flags &
  487. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) &&
  488. (msdu_desc_info.msdu_flags &
  489. HAL_MSDU_F_LAST_MSDU_IN_MPDU));
  490. DP_STATS_INCC(vdev->pdev, rx.non_amsdu_cnt, 1,
  491. amsdu_flag);
  492. DP_STATS_INCC(vdev->pdev, rx.amsdu_cnt, 1,
  493. !(amsdu_flag));
  494. qdf_nbuf_queue_add(&vdev->rxq, rx_desc->nbuf);
  495. fail:
  496. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  497. &tail[rx_desc->pool_id],
  498. rx_desc);
  499. }
  500. done:
  501. hal_srng_access_end(hal_soc, hal_ring);
  502. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  503. /*
  504. * continue with next mac_id if no pkts were reaped
  505. * from that pool
  506. */
  507. if (!rx_bufs_reaped[mac_id])
  508. continue;
  509. dp_rx_buffers_replenish(soc, mac_id,
  510. rx_bufs_reaped[mac_id],
  511. &head[mac_id],
  512. &tail[mac_id],
  513. HAL_RX_BUF_RBM_SW3_BM);
  514. }
  515. for (i = 0; i < vdev_cnt; i++) {
  516. qdf_nbuf_t deliver_list_head = NULL;
  517. qdf_nbuf_t deliver_list_tail = NULL;
  518. vdev = vdev_list[i];
  519. while ((nbuf = qdf_nbuf_queue_remove(&vdev->rxq))) {
  520. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  521. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  522. /*
  523. * Check if DMA completed -- msdu_done is the last bit
  524. * to be written
  525. */
  526. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  527. QDF_TRACE(QDF_MODULE_ID_DP,
  528. QDF_TRACE_LEVEL_ERROR,
  529. FL("MSDU DONE failure"));
  530. hal_rx_dump_pkt_tlvs(rx_tlv_hdr,
  531. QDF_TRACE_LEVEL_INFO);
  532. qdf_assert(0);
  533. }
  534. if (qdf_nbuf_is_chfrag_start(nbuf))
  535. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  536. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  537. peer = dp_peer_find_by_id(soc, peer_id);
  538. /* TODO */
  539. /*
  540. * In case of roaming peer object may not be
  541. * immediately available -- need to handle this
  542. * Cannot drop these packets right away.
  543. */
  544. /* Peer lookup failed */
  545. if (!peer && !vdev) {
  546. /* Drop & free packet */
  547. qdf_nbuf_free(nbuf);
  548. /* Statistics */
  549. continue;
  550. }
  551. if (peer && qdf_unlikely(peer->bss_peer)) {
  552. QDF_TRACE(QDF_MODULE_ID_DP,
  553. QDF_TRACE_LEVEL_INFO,
  554. FL("received pkt with same src MAC"));
  555. /* Drop & free packet */
  556. qdf_nbuf_free(nbuf);
  557. /* Statistics */
  558. continue;
  559. }
  560. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  561. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  562. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  564. "%s: %d, SGI: %d, rate_mcs: %d, tid: %d",
  565. __func__, __LINE__, sgi, rate_mcs, tid);
  566. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  567. reception_type = hal_rx_msdu_start_reception_type_get(
  568. rx_tlv_hdr);
  569. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  570. DP_STATS_INC(vdev->pdev, rx.bw[bw], 1);
  571. DP_STATS_INC(vdev->pdev,
  572. rx.reception_type[reception_type], 1);
  573. DP_STATS_INCC(vdev->pdev, rx.nss[nss], 1,
  574. ((reception_type == REPT_MU_MIMO) ||
  575. (reception_type == REPT_MU_OFDMA_MIMO))
  576. );
  577. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  578. DP_STATS_INC(peer, rx.mcs_count[rate_mcs], 1);
  579. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  580. hal_rx_mpdu_end_mic_err_get(
  581. rx_tlv_hdr));
  582. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  583. hal_rx_mpdu_end_decrypt_err_get(
  584. rx_tlv_hdr));
  585. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)],
  586. 1);
  587. DP_STATS_INC(peer, rx.bw[bw], 1);
  588. DP_STATS_INC(peer, rx.reception_type[reception_type],
  589. 1);
  590. /*
  591. * HW structures call this L3 header padding --
  592. * even though this is actually the offset from
  593. * the buffer beginning where the L2 header
  594. * begins.
  595. */
  596. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  597. FL("rxhash: flow id toeplitz: 0x%x\n"),
  598. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  599. l2_hdr_offset =
  600. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  601. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  602. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  603. /* Set length in nbuf */
  604. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  605. if (qdf_unlikely(vdev->mesh_vdev)) {
  606. if (dp_rx_filter_mesh_packets(vdev, nbuf)
  607. == QDF_STATUS_SUCCESS) {
  608. QDF_TRACE(QDF_MODULE_ID_DP,
  609. QDF_TRACE_LEVEL_INFO_MED,
  610. FL("mesh pkt filtered"));
  611. qdf_nbuf_free(nbuf);
  612. continue;
  613. }
  614. dp_rx_fill_mesh_stats(vdev, nbuf);
  615. }
  616. /*
  617. * Advance the packet start pointer by total size of
  618. * pre-header TLV's
  619. */
  620. qdf_nbuf_pull_head(nbuf,
  621. RX_PKT_TLVS_LEN + l2_hdr_offset);
  622. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  623. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  624. "p_id %d msdu_len %d hdr_off %d",
  625. peer_id, msdu_len, l2_hdr_offset);
  626. print_hex_dump(KERN_ERR,
  627. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  628. qdf_nbuf_data(nbuf), 128, false);
  629. #endif /* NAPIER_EMULATION */
  630. /* WDS Source Port Learning */
  631. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf);
  632. /* Intrabss-fwd */
  633. if (peer &&
  634. dp_rx_intrabss_fwd(soc, peer, rx_tlv_hdr, nbuf))
  635. continue; /* Get next descriptor */
  636. rx_bufs_used++;
  637. DP_RX_LIST_APPEND(deliver_list_head,
  638. deliver_list_tail,
  639. nbuf);
  640. DP_STATS_INCC_PKT(peer, rx.multicast, 1, pkt_len,
  641. DP_FRAME_IS_MULTICAST((eh)->ether_dhost
  642. ));
  643. DP_STATS_INCC_PKT(peer, rx.unicast, 1, pkt_len,
  644. !(DP_FRAME_IS_MULTICAST(
  645. (eh)->ether_dhost)));
  646. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  647. pkt_len);
  648. if (hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  649. if (soc->cdp_soc.ol_ops->update_dp_stats)
  650. soc->cdp_soc.ol_ops->update_dp_stats(
  651. vdev->pdev->osif_pdev,
  652. &peer->stats,
  653. peer_id,
  654. UPDATE_PEER_STATS);
  655. dp_aggregate_vdev_stats(peer->vdev);
  656. if (soc->cdp_soc.ol_ops->update_dp_stats)
  657. soc->cdp_soc.ol_ops->update_dp_stats(
  658. vdev->pdev->osif_pdev,
  659. &peer->vdev->stats,
  660. peer->vdev->vdev_id,
  661. UPDATE_VDEV_STATS);
  662. }
  663. }
  664. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw))
  665. dp_rx_deliver_raw(vdev, deliver_list_head);
  666. else if (qdf_likely(vdev->osif_rx) && deliver_list_head)
  667. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  668. }
  669. return rx_bufs_used; /* Assume no scale factor for now */
  670. }
  671. /**
  672. * dp_rx_detach() - detach dp rx
  673. * @soc: core txrx main context
  674. *
  675. * This function will detach DP RX into main device context
  676. * will free DP Rx resources.
  677. *
  678. * Return: void
  679. */
  680. void
  681. dp_rx_pdev_detach(struct dp_pdev *pdev)
  682. {
  683. uint8_t pdev_id = pdev->pdev_id;
  684. struct dp_soc *soc = pdev->soc;
  685. dp_rx_desc_pool_free(soc, pdev_id);
  686. qdf_spinlock_destroy(&soc->rx_desc_mutex[pdev_id]);
  687. return;
  688. }
  689. /**
  690. * dp_rx_attach() - attach DP RX
  691. * @soc: core txrx main context
  692. *
  693. * This function will attach a DP RX instance into the main
  694. * device (SOC) context. Will allocate dp rx resource and
  695. * initialize resources.
  696. *
  697. * Return: QDF_STATUS_SUCCESS: success
  698. * QDF_STATUS_E_RESOURCES: Error return
  699. */
  700. QDF_STATUS
  701. dp_rx_pdev_attach(struct dp_pdev *pdev)
  702. {
  703. uint8_t pdev_id = pdev->pdev_id;
  704. struct dp_soc *soc = pdev->soc;
  705. struct dp_srng rxdma_srng;
  706. uint32_t rxdma_entries;
  707. union dp_rx_desc_list_elem_t *desc_list = NULL;
  708. union dp_rx_desc_list_elem_t *tail = NULL;
  709. qdf_spinlock_create(&soc->rx_desc_mutex[pdev_id]);
  710. pdev = soc->pdev_list[pdev_id];
  711. rxdma_srng = pdev->rx_refill_buf_ring;
  712. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  713. soc->hal_soc, RXDMA_BUF);
  714. dp_rx_desc_pool_alloc(soc, pdev_id);
  715. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  716. dp_rx_buffers_replenish(soc, pdev_id, rxdma_entries,
  717. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  718. return QDF_STATUS_SUCCESS;
  719. }