cvp_hfi.c 117 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/io.h>
  11. #include <linux/iommu.h>
  12. #include <linux/iopoll.h>
  13. #include <linux/of.h>
  14. #include <linux/pm_qos.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/slab.h>
  17. #include <linux/workqueue.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/soc/qcom/llcc-qcom.h>
  20. #include <linux/qcom_scm.h>
  21. #include <linux/soc/qcom/smem.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/reset.h>
  24. #include <linux/pm_wakeup.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #include "msm_cvp_clocks.h"
  32. #include "vm/cvp_vm.h"
  33. #include "cvp_dump.h"
  34. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  35. #define QDSS_IOVA_START 0x80001000
  36. #define MIN_PAYLOAD_SIZE 3
  37. struct cvp_tzbsp_memprot {
  38. u32 cp_start;
  39. u32 cp_size;
  40. u32 cp_nonpixel_start;
  41. u32 cp_nonpixel_size;
  42. };
  43. #define TZBSP_PIL_SET_STATE 0xA
  44. #define TZBSP_CVP_PAS_ID 26
  45. /* Poll interval in uS */
  46. #define POLL_INTERVAL_US 50
  47. enum tzbsp_subsys_state {
  48. TZ_SUBSYS_STATE_SUSPEND = 0,
  49. TZ_SUBSYS_STATE_RESUME = 1,
  50. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  51. };
  52. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  53. .data = NULL,
  54. .data_count = 0,
  55. };
  56. const int cvp_max_packets = 32;
  57. static void iris_hfi_pm_handler(struct work_struct *work);
  58. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  59. static inline int __resume(struct iris_hfi_device *device);
  60. static inline int __suspend(struct iris_hfi_device *device);
  61. static int __disable_regulator(struct iris_hfi_device *device,
  62. const char *name);
  63. static int __enable_regulator(struct iris_hfi_device *device,
  64. const char *name);
  65. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  66. static int __initialize_packetization(struct iris_hfi_device *device);
  67. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  68. u32 session_id);
  69. static bool __is_session_valid(struct iris_hfi_device *device,
  70. struct cvp_hal_session *session, const char *func);
  71. static int __iface_cmdq_write(struct iris_hfi_device *device,
  72. void *pkt);
  73. static int __load_fw(struct iris_hfi_device *device);
  74. static void __unload_fw(struct iris_hfi_device *device);
  75. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  76. static int __enable_subcaches(struct iris_hfi_device *device);
  77. static int __set_subcaches(struct iris_hfi_device *device);
  78. static int __release_subcaches(struct iris_hfi_device *device);
  79. static int __disable_subcaches(struct iris_hfi_device *device);
  80. static int __power_collapse(struct iris_hfi_device *device, bool force);
  81. static int iris_hfi_noc_error_info(void *dev);
  82. static void interrupt_init_iris2(struct iris_hfi_device *device);
  83. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  84. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  85. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  86. static void power_off_iris2(struct iris_hfi_device *device);
  87. static int __set_ubwc_config(struct iris_hfi_device *device);
  88. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  89. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  90. static int __power_off_controller(struct iris_hfi_device *device);
  91. static struct iris_hfi_vpu_ops iris2_ops = {
  92. .interrupt_init = interrupt_init_iris2,
  93. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  94. .clock_config_on_enable = clock_config_on_enable_vpu5,
  95. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  96. .power_off = power_off_iris2,
  97. .noc_error_info = __noc_error_info_iris2,
  98. };
  99. /**
  100. * Utility function to enforce some of our assumptions. Spam calls to this
  101. * in hotspots in code to double check some of the assumptions that we hold.
  102. */
  103. static inline void __strict_check(struct iris_hfi_device *device)
  104. {
  105. msm_cvp_res_handle_fatal_hw_error(device->res,
  106. !mutex_is_locked(&device->lock));
  107. }
  108. static inline void __set_state(struct iris_hfi_device *device,
  109. enum iris_hfi_state state)
  110. {
  111. device->state = state;
  112. }
  113. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  114. {
  115. return device->state != IRIS_STATE_DEINIT;
  116. }
  117. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  118. {
  119. return device->res->sys_cache_present;
  120. }
  121. #define ROW_SIZE 32
  122. int get_hfi_version(void)
  123. {
  124. struct msm_cvp_core *core;
  125. struct iris_hfi_device *hfi;
  126. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  127. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  128. return hfi->version;
  129. }
  130. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  131. {
  132. struct msm_cvp_core *core;
  133. struct iris_hfi_device *device;
  134. u32 minor_ver;
  135. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  136. if (core)
  137. device = core->device->hfi_device_data;
  138. else
  139. return 0;
  140. if (!device) {
  141. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  142. return 0;
  143. }
  144. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  145. HFI_VERSION_MINOR_SHIFT;
  146. if (minor_ver < 2)
  147. return sizeof(struct cvp_hfi_msg_session_hdr);
  148. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  149. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  150. else
  151. return sizeof(struct cvp_hfi_msg_session_hdr);
  152. }
  153. unsigned int get_msg_session_id(void *msg)
  154. {
  155. struct cvp_hfi_msg_session_hdr *hdr =
  156. (struct cvp_hfi_msg_session_hdr *)msg;
  157. return hdr->session_id;
  158. }
  159. unsigned int get_msg_errorcode(void *msg)
  160. {
  161. struct cvp_hfi_msg_session_hdr *hdr =
  162. (struct cvp_hfi_msg_session_hdr *)msg;
  163. return hdr->error_type;
  164. }
  165. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  166. unsigned int *error_type, unsigned int *config_id)
  167. {
  168. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  169. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  170. *session_id = cfg->session_id;
  171. *error_type = cfg->error_type;
  172. *config_id = cfg->op_conf_id;
  173. return 0;
  174. }
  175. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  176. {
  177. u32 c = 0, packet_size = *(u32 *)packet;
  178. /*
  179. * row must contain enough for 0xdeadbaad * 8 to be converted into
  180. * "de ad ba ab " * 8 + '\0'
  181. */
  182. char row[3 * ROW_SIZE];
  183. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  184. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  185. packet_size % ROW_SIZE : ROW_SIZE;
  186. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  187. ROW_SIZE, 4, row, sizeof(row), false);
  188. dprintk(log_level, "%s\n", row);
  189. }
  190. }
  191. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  192. {
  193. int rc;
  194. struct cvp_hal_session *temp;
  195. if (msm_cvp_dsp_disable)
  196. return 0;
  197. list_for_each_entry(temp, &device->sess_head, list) {
  198. /* if forceful suspend, don't check session pause info */
  199. if (force)
  200. continue;
  201. /* don't suspend if cvp session is not paused */
  202. if (!(temp->flags & SESSION_PAUSE)) {
  203. dprintk(CVP_DSP,
  204. "%s: cvp session %x not paused\n",
  205. __func__, hash32_ptr(temp));
  206. return -EBUSY;
  207. }
  208. }
  209. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  210. rc = cvp_dsp_suspend(flags);
  211. if (rc) {
  212. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  213. __func__, rc);
  214. return -EINVAL;
  215. }
  216. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  217. return 0;
  218. }
  219. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  220. {
  221. int rc;
  222. if (msm_cvp_dsp_disable)
  223. return 0;
  224. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  225. rc = cvp_dsp_resume(flags);
  226. if (rc) {
  227. dprintk(CVP_ERR,
  228. "%s: dsp resume failed with error %d\n",
  229. __func__, rc);
  230. return rc;
  231. }
  232. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  233. return rc;
  234. }
  235. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  236. {
  237. int rc;
  238. if (msm_cvp_dsp_disable)
  239. return 0;
  240. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  241. rc = cvp_dsp_shutdown(flags);
  242. if (rc) {
  243. dprintk(CVP_ERR,
  244. "%s: dsp shutdown failed with error %d\n",
  245. __func__, rc);
  246. WARN_ON(1);
  247. }
  248. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  249. return rc;
  250. }
  251. static int __acquire_regulator(struct regulator_info *rinfo,
  252. struct iris_hfi_device *device)
  253. {
  254. int rc = 0;
  255. if (rinfo->has_hw_power_collapse) {
  256. rc = regulator_set_mode(rinfo->regulator,
  257. REGULATOR_MODE_NORMAL);
  258. if (rc) {
  259. /*
  260. * This is somewhat fatal, but nothing we can do
  261. * about it. We can't disable the regulator w/o
  262. * getting it back under s/w control
  263. */
  264. dprintk(CVP_WARN,
  265. "Failed to acquire regulator control: %s\n",
  266. rinfo->name);
  267. } else {
  268. dprintk(CVP_PWR,
  269. "Acquire regulator control from HW: %s\n",
  270. rinfo->name);
  271. }
  272. }
  273. if (!regulator_is_enabled(rinfo->regulator)) {
  274. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  275. rinfo->name);
  276. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  277. }
  278. return rc;
  279. }
  280. static int __hand_off_regulator(struct regulator_info *rinfo)
  281. {
  282. int rc = 0;
  283. if (rinfo->has_hw_power_collapse) {
  284. rc = regulator_set_mode(rinfo->regulator,
  285. REGULATOR_MODE_FAST);
  286. if (rc) {
  287. dprintk(CVP_WARN,
  288. "Failed to hand off regulator control: %s\n",
  289. rinfo->name);
  290. } else {
  291. dprintk(CVP_PWR,
  292. "Hand off regulator control to HW: %s\n",
  293. rinfo->name);
  294. }
  295. }
  296. return rc;
  297. }
  298. static int __hand_off_regulators(struct iris_hfi_device *device)
  299. {
  300. struct regulator_info *rinfo;
  301. int rc = 0, c = 0;
  302. iris_hfi_for_each_regulator(device, rinfo) {
  303. rc = __hand_off_regulator(rinfo);
  304. /*
  305. * If one regulator hand off failed, driver should take
  306. * the control for other regulators back.
  307. */
  308. if (rc)
  309. goto err_reg_handoff_failed;
  310. c++;
  311. }
  312. return rc;
  313. err_reg_handoff_failed:
  314. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  315. __acquire_regulator(rinfo, device);
  316. return rc;
  317. }
  318. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  319. bool *rx_req_is_set)
  320. {
  321. struct cvp_hfi_queue_header *queue;
  322. u32 packet_size_in_words, new_write_idx;
  323. u32 empty_space, read_idx, write_idx;
  324. u32 *write_ptr;
  325. if (!qinfo || !packet) {
  326. dprintk(CVP_ERR, "Invalid Params\n");
  327. return -EINVAL;
  328. } else if (!qinfo->q_array.align_virtual_addr) {
  329. dprintk(CVP_WARN, "Queues have already been freed\n");
  330. return -EINVAL;
  331. }
  332. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  333. if (!queue) {
  334. dprintk(CVP_ERR, "queue not present\n");
  335. return -ENOENT;
  336. }
  337. if (msm_cvp_debug & CVP_PKT) {
  338. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  339. __dump_packet(packet, CVP_PKT);
  340. }
  341. packet_size_in_words = (*(u32 *)packet) >> 2;
  342. if (!packet_size_in_words || packet_size_in_words >
  343. qinfo->q_array.mem_size>>2) {
  344. dprintk(CVP_ERR, "Invalid packet size\n");
  345. return -ENODATA;
  346. }
  347. spin_lock(&qinfo->hfi_lock);
  348. read_idx = queue->qhdr_read_idx;
  349. write_idx = queue->qhdr_write_idx;
  350. empty_space = (write_idx >= read_idx) ?
  351. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  352. (read_idx - write_idx);
  353. if (empty_space <= packet_size_in_words) {
  354. queue->qhdr_tx_req = 1;
  355. spin_unlock(&qinfo->hfi_lock);
  356. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  357. empty_space, packet_size_in_words);
  358. return -ENOTEMPTY;
  359. }
  360. queue->qhdr_tx_req = 0;
  361. new_write_idx = write_idx + packet_size_in_words;
  362. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  363. (write_idx << 2));
  364. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  365. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  366. qinfo->q_array.mem_size)) {
  367. spin_unlock(&qinfo->hfi_lock);
  368. dprintk(CVP_ERR, "Invalid write index\n");
  369. return -ENODATA;
  370. }
  371. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  372. memcpy(write_ptr, packet, packet_size_in_words << 2);
  373. } else {
  374. new_write_idx -= qinfo->q_array.mem_size >> 2;
  375. memcpy(write_ptr, packet, (packet_size_in_words -
  376. new_write_idx) << 2);
  377. memcpy((void *)qinfo->q_array.align_virtual_addr,
  378. packet + ((packet_size_in_words - new_write_idx) << 2),
  379. new_write_idx << 2);
  380. }
  381. /*
  382. * Memory barrier to make sure packet is written before updating the
  383. * write index
  384. */
  385. mb();
  386. queue->qhdr_write_idx = new_write_idx;
  387. if (rx_req_is_set)
  388. *rx_req_is_set = queue->qhdr_rx_req == 1;
  389. /*
  390. * Memory barrier to make sure write index is updated before an
  391. * interrupt is raised.
  392. */
  393. mb();
  394. spin_unlock(&qinfo->hfi_lock);
  395. return 0;
  396. }
  397. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  398. u32 *pb_tx_req_is_set)
  399. {
  400. struct cvp_hfi_queue_header *queue;
  401. u32 packet_size_in_words, new_read_idx;
  402. u32 *read_ptr;
  403. u32 receive_request = 0;
  404. u32 read_idx, write_idx;
  405. int rc = 0;
  406. if (!qinfo || !packet || !pb_tx_req_is_set) {
  407. dprintk(CVP_ERR, "Invalid Params\n");
  408. return -EINVAL;
  409. } else if (!qinfo->q_array.align_virtual_addr) {
  410. dprintk(CVP_WARN, "Queues have already been freed\n");
  411. return -EINVAL;
  412. }
  413. /*
  414. * Memory barrier to make sure data is valid before
  415. *reading it
  416. */
  417. mb();
  418. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  419. if (!queue) {
  420. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  421. return -ENOMEM;
  422. }
  423. /*
  424. * Do not set receive request for debug queue, if set,
  425. * Iris generates interrupt for debug messages even
  426. * when there is no response message available.
  427. * In general debug queue will not become full as it
  428. * is being emptied out for every interrupt from Iris.
  429. * Iris will anyway generates interrupt if it is full.
  430. */
  431. spin_lock(&qinfo->hfi_lock);
  432. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  433. receive_request = 1;
  434. read_idx = queue->qhdr_read_idx;
  435. write_idx = queue->qhdr_write_idx;
  436. if (read_idx == write_idx) {
  437. queue->qhdr_rx_req = receive_request;
  438. /*
  439. * mb() to ensure qhdr is updated in main memory
  440. * so that iris reads the updated header values
  441. */
  442. mb();
  443. *pb_tx_req_is_set = 0;
  444. if (write_idx != queue->qhdr_write_idx) {
  445. queue->qhdr_rx_req = 0;
  446. } else {
  447. spin_unlock(&qinfo->hfi_lock);
  448. dprintk(CVP_HFI,
  449. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  450. receive_request ? "message" : "debug",
  451. queue->qhdr_rx_req, queue->qhdr_tx_req,
  452. queue->qhdr_read_idx);
  453. return -ENODATA;
  454. }
  455. }
  456. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  457. (read_idx << 2));
  458. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  459. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  460. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  461. spin_unlock(&qinfo->hfi_lock);
  462. dprintk(CVP_ERR, "Invalid read index\n");
  463. return -ENODATA;
  464. }
  465. packet_size_in_words = (*read_ptr) >> 2;
  466. if (!packet_size_in_words) {
  467. spin_unlock(&qinfo->hfi_lock);
  468. dprintk(CVP_ERR, "Zero packet size\n");
  469. return -ENODATA;
  470. }
  471. new_read_idx = read_idx + packet_size_in_words;
  472. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  473. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  474. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  475. memcpy(packet, read_ptr,
  476. packet_size_in_words << 2);
  477. } else {
  478. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  479. memcpy(packet, read_ptr,
  480. (packet_size_in_words - new_read_idx) << 2);
  481. memcpy(packet + ((packet_size_in_words -
  482. new_read_idx) << 2),
  483. (u8 *)qinfo->q_array.align_virtual_addr,
  484. new_read_idx << 2);
  485. }
  486. } else {
  487. dprintk(CVP_WARN,
  488. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  489. read_idx, packet_size_in_words << 2);
  490. dprintk(CVP_WARN, "Dropping this packet\n");
  491. new_read_idx = write_idx;
  492. rc = -ENODATA;
  493. }
  494. if (new_read_idx != queue->qhdr_write_idx)
  495. queue->qhdr_rx_req = 0;
  496. else
  497. queue->qhdr_rx_req = receive_request;
  498. queue->qhdr_read_idx = new_read_idx;
  499. /*
  500. * mb() to ensure qhdr is updated in main memory
  501. * so that iris reads the updated header values
  502. */
  503. mb();
  504. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  505. spin_unlock(&qinfo->hfi_lock);
  506. if ((msm_cvp_debug & CVP_PKT) &&
  507. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  508. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  509. __dump_packet(packet, CVP_PKT);
  510. }
  511. return rc;
  512. }
  513. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  514. u32 size, u32 align, u32 flags)
  515. {
  516. struct msm_cvp_smem *alloc = &mem->mem_data;
  517. int rc = 0;
  518. if (!dev || !mem || !size) {
  519. dprintk(CVP_ERR, "Invalid Params\n");
  520. return -EINVAL;
  521. }
  522. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  523. alloc->flags = flags;
  524. rc = msm_cvp_smem_alloc(size, align, 1, (void *)dev->res, alloc);
  525. if (rc) {
  526. dprintk(CVP_ERR, "Alloc failed\n");
  527. rc = -ENOMEM;
  528. goto fail_smem_alloc;
  529. }
  530. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  531. alloc->kvaddr, size);
  532. mem->mem_size = alloc->size;
  533. mem->align_virtual_addr = alloc->kvaddr;
  534. mem->align_device_addr = alloc->device_addr;
  535. return rc;
  536. fail_smem_alloc:
  537. return rc;
  538. }
  539. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  540. {
  541. if (!dev || !mem) {
  542. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  543. return;
  544. }
  545. msm_cvp_smem_free(mem);
  546. }
  547. static void __write_register(struct iris_hfi_device *device,
  548. u32 reg, u32 value)
  549. {
  550. u32 hwiosymaddr = reg;
  551. u8 *base_addr;
  552. if (!device) {
  553. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  554. return;
  555. }
  556. __strict_check(device);
  557. if (!device->power_enabled) {
  558. dprintk(CVP_WARN,
  559. "HFI Write register failed : Power is OFF\n");
  560. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  561. return;
  562. }
  563. base_addr = device->cvp_hal_data->register_base;
  564. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  565. base_addr, hwiosymaddr, value);
  566. base_addr += hwiosymaddr;
  567. writel_relaxed(value, base_addr);
  568. /*
  569. * Memory barrier to make sure value is written into the register.
  570. */
  571. wmb();
  572. }
  573. static int __read_gcc_register(struct iris_hfi_device *device, u32 reg)
  574. {
  575. int rc = 0;
  576. u8 *base_addr;
  577. if (!device) {
  578. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  579. return -EINVAL;
  580. }
  581. __strict_check(device);
  582. if (!device->power_enabled) {
  583. dprintk(CVP_WARN,
  584. "%s HFI Read register failed : Power is OFF\n",
  585. __func__);
  586. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  587. return -EINVAL;
  588. }
  589. base_addr = device->cvp_hal_data->gcc_reg_base;
  590. rc = readl_relaxed(base_addr + reg);
  591. /*
  592. * Memory barrier to make sure value is read correctly from the
  593. * register.
  594. */
  595. rmb();
  596. dprintk(CVP_REG,
  597. "GCC Base addr: %pK, read from: %#x, value: %#x...\n",
  598. base_addr, reg, rc);
  599. return rc;
  600. }
  601. static int __read_register(struct iris_hfi_device *device, u32 reg)
  602. {
  603. int rc = 0;
  604. u8 *base_addr;
  605. if (!device) {
  606. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  607. return -EINVAL;
  608. }
  609. __strict_check(device);
  610. if (!device->power_enabled) {
  611. dprintk(CVP_WARN,
  612. "HFI Read register failed : Power is OFF\n");
  613. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  614. return -EINVAL;
  615. }
  616. base_addr = device->cvp_hal_data->register_base;
  617. rc = readl_relaxed(base_addr + reg);
  618. /*
  619. * Memory barrier to make sure value is read correctly from the
  620. * register.
  621. */
  622. rmb();
  623. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  624. base_addr, reg, rc);
  625. return rc;
  626. }
  627. static void __set_registers(struct iris_hfi_device *device)
  628. {
  629. struct msm_cvp_core *core;
  630. struct msm_cvp_platform_data *pdata;
  631. struct reg_set *reg_set;
  632. int i;
  633. if (!device->res) {
  634. dprintk(CVP_ERR,
  635. "device resources null, cannot set registers\n");
  636. return;
  637. }
  638. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  639. pdata = core->platform_data;
  640. reg_set = &device->res->reg_set;
  641. for (i = 0; i < reg_set->count; i++) {
  642. __write_register(device, reg_set->reg_tbl[i].reg,
  643. reg_set->reg_tbl[i].value);
  644. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  645. reg_set->reg_tbl[i].reg,
  646. reg_set->reg_tbl[i].value);
  647. }
  648. __write_register(device, CVP_CPU_CS_AXI4_QOS,
  649. pdata->noc_qos->axi_qos);
  650. __write_register(device, CVP_NOC_PRIORITYLUT_LOW,
  651. pdata->noc_qos->prioritylut_low);
  652. __write_register(device, CVP_NOC_PRIORITYLUT_HIGH,
  653. pdata->noc_qos->prioritylut_high);
  654. __write_register(device, CVP_NOC_URGENCY_LOW,
  655. pdata->noc_qos->urgency_low);
  656. __write_register(device, CVP_NOC_DANGERLUT_LOW,
  657. pdata->noc_qos->dangerlut_low);
  658. __write_register(device, CVP_NOC_SAFELUT_LOW,
  659. pdata->noc_qos->safelut_low);
  660. }
  661. /*
  662. * The existence of this function is a hack for 8996 (or certain Iris versions)
  663. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  664. * (after calling __hand_off_regulators()), the values of the threshold
  665. * registers (typically programmed by TZ) are incorrectly reset. As a result
  666. * reprogram these registers at certain agreed upon points.
  667. */
  668. static void __set_threshold_registers(struct iris_hfi_device *device)
  669. {
  670. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  671. version &= ~GENMASK(15, 0);
  672. if (version != (0x3 << 28 | 0x43 << 16))
  673. return;
  674. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  675. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  676. }
  677. static int __unvote_buses(struct iris_hfi_device *device)
  678. {
  679. int rc = 0;
  680. struct bus_info *bus = NULL;
  681. kfree(device->bus_vote.data);
  682. device->bus_vote.data = NULL;
  683. device->bus_vote.data_count = 0;
  684. iris_hfi_for_each_bus(device, bus) {
  685. rc = msm_cvp_set_bw(bus, 0);
  686. if (rc) {
  687. dprintk(CVP_ERR,
  688. "%s: Failed unvoting bus\n", __func__);
  689. goto err_unknown_device;
  690. }
  691. }
  692. err_unknown_device:
  693. return rc;
  694. }
  695. static int __vote_buses(struct iris_hfi_device *device,
  696. struct cvp_bus_vote_data *data, int num_data)
  697. {
  698. int rc = 0;
  699. struct bus_info *bus = NULL;
  700. struct cvp_bus_vote_data *new_data = NULL;
  701. if (!num_data) {
  702. dprintk(CVP_PWR, "No vote data available\n");
  703. goto no_data_count;
  704. } else if (!data) {
  705. dprintk(CVP_ERR, "Invalid voting data\n");
  706. return -EINVAL;
  707. }
  708. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  709. if (!new_data) {
  710. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  711. rc = -ENOMEM;
  712. goto err_no_mem;
  713. }
  714. no_data_count:
  715. kfree(device->bus_vote.data);
  716. device->bus_vote.data = new_data;
  717. device->bus_vote.data_count = num_data;
  718. iris_hfi_for_each_bus(device, bus) {
  719. if (bus) {
  720. rc = msm_cvp_set_bw(bus, bus->range[1]);
  721. if (rc)
  722. dprintk(CVP_ERR,
  723. "Failed voting bus %s to ab %u\n",
  724. bus->name, bus->range[1]*1000);
  725. }
  726. }
  727. err_no_mem:
  728. return rc;
  729. }
  730. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  731. {
  732. int rc = 0;
  733. struct iris_hfi_device *device = dev;
  734. if (!device)
  735. return -EINVAL;
  736. mutex_lock(&device->lock);
  737. rc = __vote_buses(device, d, n);
  738. mutex_unlock(&device->lock);
  739. return rc;
  740. }
  741. static int __core_set_resource(struct iris_hfi_device *device,
  742. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  743. {
  744. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  745. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  746. int rc = 0;
  747. if (!device || !resource_hdr || !resource_value) {
  748. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  749. return -EINVAL;
  750. }
  751. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  752. rc = call_hfi_pkt_op(device, sys_set_resource,
  753. pkt, resource_hdr, resource_value);
  754. if (rc) {
  755. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  756. goto err_create_pkt;
  757. }
  758. rc = __iface_cmdq_write(device, pkt);
  759. if (rc)
  760. rc = -ENOTEMPTY;
  761. err_create_pkt:
  762. return rc;
  763. }
  764. static int __core_release_resource(struct iris_hfi_device *device,
  765. struct cvp_resource_hdr *resource_hdr)
  766. {
  767. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  768. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  769. int rc = 0;
  770. if (!device || !resource_hdr) {
  771. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  772. return -EINVAL;
  773. }
  774. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  775. rc = call_hfi_pkt_op(device, sys_release_resource,
  776. pkt, resource_hdr);
  777. if (rc) {
  778. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  779. goto err_create_pkt;
  780. }
  781. rc = __iface_cmdq_write(device, pkt);
  782. if (rc)
  783. rc = -ENOTEMPTY;
  784. err_create_pkt:
  785. return rc;
  786. }
  787. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  788. {
  789. int rc = 0;
  790. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  791. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  792. if (rc) {
  793. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  794. return rc;
  795. }
  796. return 0;
  797. }
  798. static inline int __boot_firmware(struct iris_hfi_device *device)
  799. {
  800. int rc = 0, loop = 10;
  801. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  802. u32 reg_gdsc;
  803. /*
  804. * Hand off control of regulators to h/w _after_ enabling clocks.
  805. * Note that the GDSC will turn off when switching from normal
  806. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  807. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  808. */
  809. if (__enable_hw_power_collapse(device))
  810. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  811. while (loop) {
  812. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  813. if (reg_gdsc & 0x80000000) {
  814. usleep_range(100, 200);
  815. loop--;
  816. } else {
  817. break;
  818. }
  819. }
  820. if (!loop)
  821. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  822. ctrl_init_val = BIT(0);
  823. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  824. while (!ctrl_status && count < max_tries) {
  825. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  826. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  827. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  828. rc = -ENODATA;
  829. break;
  830. }
  831. /* Reduce to 500, 1000 on silicon */
  832. usleep_range(500, 1000);
  833. count++;
  834. }
  835. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  836. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  837. ctrl_status);
  838. rc = -ENODEV;
  839. }
  840. /* Enable interrupt before sending commands to tensilica */
  841. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  842. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  843. return rc;
  844. }
  845. static int iris_hfi_resume(void *dev)
  846. {
  847. int rc = 0;
  848. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  849. if (!device) {
  850. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  851. return -EINVAL;
  852. }
  853. dprintk(CVP_CORE, "Resuming Iris\n");
  854. mutex_lock(&device->lock);
  855. rc = __resume(device);
  856. mutex_unlock(&device->lock);
  857. return rc;
  858. }
  859. static int iris_hfi_suspend(void *dev)
  860. {
  861. int rc = 0;
  862. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  863. if (!device) {
  864. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  865. return -EINVAL;
  866. } else if (!device->res->sw_power_collapsible) {
  867. return -ENOTSUPP;
  868. }
  869. dprintk(CVP_CORE, "Suspending Iris\n");
  870. mutex_lock(&device->lock);
  871. rc = __power_collapse(device, true);
  872. if (rc) {
  873. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  874. rc = -EBUSY;
  875. }
  876. mutex_unlock(&device->lock);
  877. /* Cancel pending delayed works if any */
  878. if (!rc)
  879. cancel_delayed_work(&iris_hfi_pm_work);
  880. return rc;
  881. }
  882. static void cvp_dump_csr(struct iris_hfi_device *dev)
  883. {
  884. u32 reg;
  885. if (!dev)
  886. return;
  887. if (!dev->power_enabled || dev->reg_dumped)
  888. return;
  889. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  890. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  891. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  892. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  893. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  894. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  895. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  896. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  897. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  898. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  899. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  900. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  901. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  902. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  903. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  904. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  905. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  906. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  907. dev->reg_dumped = true;
  908. }
  909. static int iris_hfi_flush_debug_queue(void *dev)
  910. {
  911. int rc = 0;
  912. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  913. if (!device) {
  914. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  915. return -EINVAL;
  916. }
  917. cvp_dump_csr(device);
  918. mutex_lock(&device->lock);
  919. if (!device->power_enabled) {
  920. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  921. rc = -EINVAL;
  922. goto exit;
  923. }
  924. __flush_debug_queue(device, NULL);
  925. exit:
  926. mutex_unlock(&device->lock);
  927. return rc;
  928. }
  929. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  930. {
  931. int rc = 0;
  932. struct iris_hfi_device *device = dev;
  933. if (!device) {
  934. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  935. return -EINVAL;
  936. }
  937. mutex_lock(&device->lock);
  938. if (__resume(device)) {
  939. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  940. rc = -ENODEV;
  941. goto exit;
  942. }
  943. rc = msm_cvp_set_clocks_impl(device, freq);
  944. exit:
  945. mutex_unlock(&device->lock);
  946. return rc;
  947. }
  948. /* Writes into cmdq without raising an interrupt */
  949. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  950. void *pkt, bool *requires_interrupt)
  951. {
  952. struct cvp_iface_q_info *q_info;
  953. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  954. int result = -E2BIG;
  955. if (!device || !pkt) {
  956. dprintk(CVP_ERR, "Invalid Params\n");
  957. return -EINVAL;
  958. }
  959. __strict_check(device);
  960. if (!__core_in_valid_state(device)) {
  961. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  962. result = -EINVAL;
  963. goto err_q_null;
  964. }
  965. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  966. device->last_packet_type = cmd_packet->packet_type;
  967. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  968. if (!q_info) {
  969. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  970. goto err_q_null;
  971. }
  972. if (!q_info->q_array.align_virtual_addr) {
  973. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  974. result = -ENODATA;
  975. goto err_q_null;
  976. }
  977. if (__resume(device)) {
  978. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  979. goto err_q_write;
  980. }
  981. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  982. if (device->res->sw_power_collapsible) {
  983. cancel_delayed_work(&iris_hfi_pm_work);
  984. if (!queue_delayed_work(device->iris_pm_workq,
  985. &iris_hfi_pm_work,
  986. msecs_to_jiffies(
  987. device->res->msm_cvp_pwr_collapse_delay))) {
  988. dprintk(CVP_PWR,
  989. "PM work already scheduled\n");
  990. }
  991. }
  992. result = 0;
  993. } else {
  994. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  995. }
  996. err_q_write:
  997. err_q_null:
  998. return result;
  999. }
  1000. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1001. {
  1002. bool needs_interrupt = false;
  1003. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1004. if (!rc && needs_interrupt) {
  1005. /* Consumer of cmdq prefers that we raise an interrupt */
  1006. rc = 0;
  1007. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1008. }
  1009. return rc;
  1010. }
  1011. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1012. {
  1013. u32 tx_req_is_set = 0;
  1014. int rc = 0;
  1015. struct cvp_iface_q_info *q_info;
  1016. if (!pkt) {
  1017. dprintk(CVP_ERR, "Invalid Params\n");
  1018. return -EINVAL;
  1019. }
  1020. __strict_check(device);
  1021. if (!__core_in_valid_state(device)) {
  1022. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1023. rc = -EINVAL;
  1024. goto read_error_null;
  1025. }
  1026. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1027. if (q_info->q_array.align_virtual_addr == NULL) {
  1028. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1029. rc = -ENODATA;
  1030. goto read_error_null;
  1031. }
  1032. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1033. if (tx_req_is_set)
  1034. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1035. rc = 0;
  1036. } else
  1037. rc = -ENODATA;
  1038. read_error_null:
  1039. return rc;
  1040. }
  1041. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1042. {
  1043. u32 tx_req_is_set = 0;
  1044. int rc = 0;
  1045. struct cvp_iface_q_info *q_info;
  1046. if (!pkt) {
  1047. dprintk(CVP_ERR, "Invalid Params\n");
  1048. return -EINVAL;
  1049. }
  1050. __strict_check(device);
  1051. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1052. if (q_info->q_array.align_virtual_addr == NULL) {
  1053. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1054. rc = -ENODATA;
  1055. goto dbg_error_null;
  1056. }
  1057. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1058. if (tx_req_is_set)
  1059. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1060. rc = 0;
  1061. } else
  1062. rc = -ENODATA;
  1063. dbg_error_null:
  1064. return rc;
  1065. }
  1066. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1067. {
  1068. q_hdr->qhdr_status = 0x1;
  1069. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1070. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1071. q_hdr->qhdr_pkt_size = 0;
  1072. q_hdr->qhdr_rx_wm = 0x1;
  1073. q_hdr->qhdr_tx_wm = 0x1;
  1074. q_hdr->qhdr_rx_req = 0x1;
  1075. q_hdr->qhdr_tx_req = 0x0;
  1076. q_hdr->qhdr_rx_irq_status = 0x0;
  1077. q_hdr->qhdr_tx_irq_status = 0x0;
  1078. q_hdr->qhdr_read_idx = 0x0;
  1079. q_hdr->qhdr_write_idx = 0x0;
  1080. }
  1081. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1082. {
  1083. int i;
  1084. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1085. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1086. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1087. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1088. return;
  1089. }
  1090. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1091. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1092. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1093. mem_data->kvaddr, mem_data->dma_handle);
  1094. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1095. device->dsp_iface_queues[i].q_hdr = NULL;
  1096. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1097. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1098. }
  1099. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1100. device->dsp_iface_q_table.align_device_addr = 0;
  1101. }
  1102. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1103. {
  1104. int rc = 0;
  1105. u32 i;
  1106. struct cvp_iface_q_info *iface_q;
  1107. int offset = 0;
  1108. phys_addr_t fw_bias = 0;
  1109. size_t q_size;
  1110. struct msm_cvp_smem *mem_data;
  1111. void *kvaddr;
  1112. dma_addr_t dma_handle;
  1113. dma_addr_t iova;
  1114. struct context_bank_info *cb;
  1115. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1116. mem_data = &dev->dsp_iface_q_table.mem_data;
  1117. /* Allocate dsp queues from CDSP device memory */
  1118. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1119. &dma_handle, GFP_KERNEL);
  1120. if (IS_ERR_OR_NULL(kvaddr)) {
  1121. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1122. goto fail_dma_alloc;
  1123. }
  1124. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1125. if (!cb) {
  1126. dprintk(CVP_ERR,
  1127. "%s: failed to get context bank\n", __func__);
  1128. goto fail_dma_map;
  1129. }
  1130. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1131. q_size, DMA_BIDIRECTIONAL, 0);
  1132. if (dma_mapping_error(cb->dev, iova)) {
  1133. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1134. goto fail_dma_map;
  1135. }
  1136. dprintk(CVP_DSP,
  1137. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1138. __func__, kvaddr, dma_handle, iova, q_size);
  1139. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1140. mem_data->kvaddr = kvaddr;
  1141. mem_data->device_addr = iova;
  1142. mem_data->dma_handle = dma_handle;
  1143. mem_data->size = q_size;
  1144. mem_data->mapping_info.cb_info = cb;
  1145. if (!is_iommu_present(dev->res))
  1146. fw_bias = dev->cvp_hal_data->firmware_base;
  1147. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1148. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1149. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1150. offset = dev->dsp_iface_q_table.mem_size;
  1151. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1152. iface_q = &dev->dsp_iface_queues[i];
  1153. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1154. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1155. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1156. offset += iface_q->q_array.mem_size;
  1157. spin_lock_init(&iface_q->hfi_lock);
  1158. }
  1159. cvp_dsp_init_hfi_queue_hdr(dev);
  1160. return rc;
  1161. fail_dma_map:
  1162. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1163. fail_dma_alloc:
  1164. return -ENOMEM;
  1165. }
  1166. static void __interface_queues_release(struct iris_hfi_device *device)
  1167. {
  1168. #ifdef CONFIG_EVA_TVM
  1169. int i;
  1170. struct cvp_hfi_mem_map_table *qdss;
  1171. struct cvp_hfi_mem_map *mem_map;
  1172. int num_entries = device->res->qdss_addr_set.count;
  1173. unsigned long mem_map_table_base_addr;
  1174. struct context_bank_info *cb;
  1175. if (device->qdss.align_virtual_addr) {
  1176. qdss = (struct cvp_hfi_mem_map_table *)
  1177. device->qdss.align_virtual_addr;
  1178. qdss->mem_map_num_entries = num_entries;
  1179. mem_map_table_base_addr =
  1180. device->qdss.align_device_addr +
  1181. sizeof(struct cvp_hfi_mem_map_table);
  1182. qdss->mem_map_table_base_addr =
  1183. (u32)mem_map_table_base_addr;
  1184. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1185. mem_map_table_base_addr) {
  1186. dprintk(CVP_ERR,
  1187. "Invalid mem_map_table_base_addr %#lx",
  1188. mem_map_table_base_addr);
  1189. }
  1190. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1191. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1192. for (i = 0; cb && i < num_entries; i++) {
  1193. iommu_unmap(cb->domain,
  1194. mem_map[i].virtual_addr,
  1195. mem_map[i].size);
  1196. }
  1197. __smem_free(device, &device->qdss.mem_data);
  1198. }
  1199. __smem_free(device, &device->iface_q_table.mem_data);
  1200. __smem_free(device, &device->sfr.mem_data);
  1201. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1202. device->iface_queues[i].q_hdr = NULL;
  1203. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1204. device->iface_queues[i].q_array.align_device_addr = 0;
  1205. }
  1206. device->iface_q_table.align_virtual_addr = NULL;
  1207. device->iface_q_table.align_device_addr = 0;
  1208. device->qdss.align_virtual_addr = NULL;
  1209. device->qdss.align_device_addr = 0;
  1210. device->sfr.align_virtual_addr = NULL;
  1211. device->sfr.align_device_addr = 0;
  1212. device->mem_addr.align_virtual_addr = NULL;
  1213. device->mem_addr.align_device_addr = 0;
  1214. #endif
  1215. __interface_dsp_queues_release(device);
  1216. }
  1217. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1218. struct cvp_hfi_mem_map *mem_map,
  1219. struct iommu_domain *domain)
  1220. {
  1221. int i;
  1222. int rc = 0;
  1223. dma_addr_t iova = QDSS_IOVA_START;
  1224. int num_entries = dev->res->qdss_addr_set.count;
  1225. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1226. if (!num_entries)
  1227. return -ENODATA;
  1228. for (i = 0; i < num_entries; i++) {
  1229. if (domain) {
  1230. rc = iommu_map(domain, iova,
  1231. qdss_addr_tbl[i].start,
  1232. qdss_addr_tbl[i].size,
  1233. IOMMU_READ | IOMMU_WRITE);
  1234. if (rc) {
  1235. dprintk(CVP_ERR,
  1236. "IOMMU QDSS mapping failed for addr %#x\n",
  1237. qdss_addr_tbl[i].start);
  1238. rc = -ENOMEM;
  1239. break;
  1240. }
  1241. } else {
  1242. iova = qdss_addr_tbl[i].start;
  1243. }
  1244. mem_map[i].virtual_addr = (u32)iova;
  1245. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1246. mem_map[i].size = qdss_addr_tbl[i].size;
  1247. mem_map[i].attr = 0x0;
  1248. iova += mem_map[i].size;
  1249. }
  1250. if (i < num_entries) {
  1251. dprintk(CVP_ERR,
  1252. "QDSS mapping failed, Freeing other entries %d\n", i);
  1253. for (--i; domain && i >= 0; i--) {
  1254. iommu_unmap(domain,
  1255. mem_map[i].virtual_addr,
  1256. mem_map[i].size);
  1257. }
  1258. }
  1259. return rc;
  1260. }
  1261. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1262. {
  1263. __write_register(device, CVP_UC_REGION_ADDR,
  1264. (u32)device->iface_q_table.align_device_addr);
  1265. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1266. __write_register(device, CVP_QTBL_ADDR,
  1267. (u32)device->iface_q_table.align_device_addr);
  1268. __write_register(device, CVP_QTBL_INFO, 0x01);
  1269. if (device->sfr.align_device_addr)
  1270. __write_register(device, CVP_SFR_ADDR,
  1271. (u32)device->sfr.align_device_addr);
  1272. if (device->qdss.align_device_addr)
  1273. __write_register(device, CVP_MMAP_ADDR,
  1274. (u32)device->qdss.align_device_addr);
  1275. call_iris_op(device, setup_dsp_uc_memmap, device);
  1276. }
  1277. static void __hfi_queue_init(struct iris_hfi_device *dev)
  1278. {
  1279. int i, offset = 0;
  1280. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1281. struct cvp_iface_q_info *iface_q;
  1282. struct cvp_hfi_queue_header *q_hdr;
  1283. if (!dev)
  1284. return;
  1285. offset += dev->iface_q_table.mem_size;
  1286. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1287. iface_q = &dev->iface_queues[i];
  1288. iface_q->q_array.align_device_addr =
  1289. dev->iface_q_table.align_device_addr + offset;
  1290. iface_q->q_array.align_virtual_addr =
  1291. dev->iface_q_table.align_virtual_addr + offset;
  1292. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1293. offset += iface_q->q_array.mem_size;
  1294. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1295. dev->iface_q_table.align_virtual_addr, i);
  1296. __set_queue_hdr_defaults(iface_q->q_hdr);
  1297. spin_lock_init(&iface_q->hfi_lock);
  1298. }
  1299. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1300. dev->iface_q_table.align_virtual_addr;
  1301. q_tbl_hdr->qtbl_version = 0;
  1302. q_tbl_hdr->device_addr = (void *)dev;
  1303. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1304. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1305. q_tbl_hdr->qtbl_qhdr0_offset =
  1306. sizeof(struct cvp_hfi_queue_table_header);
  1307. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1308. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1309. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1310. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1311. q_hdr = iface_q->q_hdr;
  1312. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1313. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1314. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1315. q_hdr = iface_q->q_hdr;
  1316. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1317. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1318. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1319. q_hdr = iface_q->q_hdr;
  1320. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1321. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1322. /*
  1323. * Set receive request to zero on debug queue as there is no
  1324. * need of interrupt from cvp hardware for debug messages
  1325. */
  1326. q_hdr->qhdr_rx_req = 0;
  1327. }
  1328. static void __sfr_init(struct iris_hfi_device *dev)
  1329. {
  1330. struct cvp_hfi_sfr_struct *vsfr;
  1331. if (!dev)
  1332. return;
  1333. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1334. if (vsfr)
  1335. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1336. }
  1337. static int __interface_queues_init(struct iris_hfi_device *dev)
  1338. {
  1339. int rc = 0;
  1340. struct cvp_hfi_mem_map_table *qdss;
  1341. struct cvp_hfi_mem_map *mem_map;
  1342. struct cvp_mem_addr *mem_addr;
  1343. int num_entries = dev->res->qdss_addr_set.count;
  1344. phys_addr_t fw_bias = 0;
  1345. size_t q_size;
  1346. unsigned long mem_map_table_base_addr;
  1347. struct context_bank_info *cb;
  1348. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1349. mem_addr = &dev->mem_addr;
  1350. if (!is_iommu_present(dev->res))
  1351. fw_bias = dev->cvp_hal_data->firmware_base;
  1352. if (dev->iface_q_table.align_virtual_addr) {
  1353. memset((void *)dev->iface_q_table.align_virtual_addr,
  1354. 0, q_size);
  1355. goto hfi_queue_init;
  1356. }
  1357. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1358. if (rc) {
  1359. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1360. goto fail_alloc_queue;
  1361. }
  1362. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1363. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1364. fw_bias;
  1365. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1366. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1367. hfi_queue_init:
  1368. __hfi_queue_init(dev);
  1369. if (dev->sfr.align_virtual_addr) {
  1370. memset((void *)dev->sfr.align_virtual_addr,
  1371. 0, ALIGNED_SFR_SIZE);
  1372. goto sfr_init;
  1373. }
  1374. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1375. if (rc) {
  1376. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1377. dev->sfr.align_device_addr = 0;
  1378. } else {
  1379. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1380. fw_bias;
  1381. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1382. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1383. dev->sfr.mem_data = mem_addr->mem_data;
  1384. }
  1385. sfr_init:
  1386. __sfr_init(dev);
  1387. if (dev->qdss.align_virtual_addr)
  1388. goto dsp_hfi_queue_init;
  1389. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1390. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1391. SMEM_UNCACHED);
  1392. if (rc) {
  1393. dprintk(CVP_WARN,
  1394. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1395. dev->qdss.align_device_addr = 0;
  1396. } else {
  1397. dev->qdss.align_device_addr =
  1398. mem_addr->align_device_addr - fw_bias;
  1399. dev->qdss.align_virtual_addr =
  1400. mem_addr->align_virtual_addr;
  1401. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1402. dev->qdss.mem_data = mem_addr->mem_data;
  1403. }
  1404. }
  1405. if (dev->qdss.align_virtual_addr) {
  1406. qdss =
  1407. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1408. qdss->mem_map_num_entries = num_entries;
  1409. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1410. sizeof(struct cvp_hfi_mem_map_table);
  1411. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1412. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1413. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1414. if (!cb) {
  1415. dprintk(CVP_ERR,
  1416. "%s: failed to get context bank\n", __func__);
  1417. return -EINVAL;
  1418. }
  1419. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1420. if (rc) {
  1421. dprintk(CVP_ERR,
  1422. "IOMMU mapping failed, Freeing qdss memdata\n");
  1423. __smem_free(dev, &dev->qdss.mem_data);
  1424. dev->qdss.align_virtual_addr = NULL;
  1425. dev->qdss.align_device_addr = 0;
  1426. }
  1427. }
  1428. dsp_hfi_queue_init:
  1429. rc = __interface_dsp_queues_init(dev);
  1430. if (rc) {
  1431. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1432. goto fail_alloc_queue;
  1433. }
  1434. __setup_ucregion_memory_map(dev);
  1435. return 0;
  1436. fail_alloc_queue:
  1437. return -ENOMEM;
  1438. }
  1439. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1440. {
  1441. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1442. int rc = 0;
  1443. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1444. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1445. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1446. if (rc) {
  1447. dprintk(CVP_WARN,
  1448. "Debug mode setting to FW failed\n");
  1449. return -ENOTEMPTY;
  1450. }
  1451. if (__iface_cmdq_write(device, pkt))
  1452. return -ENOTEMPTY;
  1453. return 0;
  1454. }
  1455. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1456. bool enable)
  1457. {
  1458. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1459. int rc = 0;
  1460. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1461. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1462. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1463. if (__iface_cmdq_write(device, pkt))
  1464. return -ENOTEMPTY;
  1465. return 0;
  1466. }
  1467. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1468. {
  1469. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1470. int rc = 0;
  1471. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1472. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1473. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1474. pkt, mode);
  1475. if (rc) {
  1476. dprintk(CVP_WARN,
  1477. "Coverage mode setting to FW failed\n");
  1478. return -ENOTEMPTY;
  1479. }
  1480. if (__iface_cmdq_write(device, pkt)) {
  1481. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1482. return -ENOTEMPTY;
  1483. }
  1484. return 0;
  1485. }
  1486. static int __sys_set_power_control(struct iris_hfi_device *device,
  1487. bool enable)
  1488. {
  1489. struct regulator_info *rinfo;
  1490. bool supported = false;
  1491. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1492. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1493. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1494. iris_hfi_for_each_regulator(device, rinfo) {
  1495. if (rinfo->has_hw_power_collapse) {
  1496. supported = true;
  1497. break;
  1498. }
  1499. }
  1500. if (!supported)
  1501. return 0;
  1502. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1503. if (__iface_cmdq_write(device, pkt))
  1504. return -ENOTEMPTY;
  1505. return 0;
  1506. }
  1507. static void cvp_pm_qos_update(struct iris_hfi_device *device, bool vote_on)
  1508. {
  1509. u32 latency, off_vote_cnt;
  1510. int i, err = 0;
  1511. spin_lock(&device->res->pm_qos.lock);
  1512. off_vote_cnt = device->res->pm_qos.off_vote_cnt;
  1513. spin_unlock(&device->res->pm_qos.lock);
  1514. if (vote_on && off_vote_cnt)
  1515. return;
  1516. latency = vote_on ? device->res->pm_qos.latency_us :
  1517. PM_QOS_RESUME_LATENCY_DEFAULT_VALUE;
  1518. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  1519. for (i = 0; i < device->res->pm_qos.silver_count; i++) {
  1520. err = dev_pm_qos_update_request(
  1521. &device->res->pm_qos.pm_qos_hdls[i],
  1522. latency);
  1523. if (err < 0) {
  1524. if (vote_on) {
  1525. dprintk(CVP_WARN,
  1526. "pm qos on failed %d\n", err);
  1527. } else {
  1528. dprintk(CVP_WARN,
  1529. "pm qos off failed %d\n", err);
  1530. }
  1531. }
  1532. }
  1533. }
  1534. static int iris_pm_qos_update(void *device)
  1535. {
  1536. struct iris_hfi_device *dev;
  1537. if (!device) {
  1538. dprintk(CVP_ERR, "%s Invalid device\n", __func__);
  1539. return -ENODEV;
  1540. }
  1541. dev = device;
  1542. mutex_lock(&dev->lock);
  1543. cvp_pm_qos_update(dev, true);
  1544. mutex_unlock(&dev->lock);
  1545. return 0;
  1546. }
  1547. static int iris_hfi_core_init(void *device)
  1548. {
  1549. int rc = 0;
  1550. u32 ipcc_iova;
  1551. struct cvp_hfi_cmd_sys_init_packet pkt;
  1552. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1553. struct iris_hfi_device *dev;
  1554. if (!device) {
  1555. dprintk(CVP_ERR, "Invalid device\n");
  1556. return -ENODEV;
  1557. }
  1558. dev = device;
  1559. dprintk(CVP_CORE, "Core initializing\n");
  1560. pm_stay_awake(dev->res->pdev->dev.parent);
  1561. mutex_lock(&dev->lock);
  1562. dev->bus_vote.data =
  1563. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1564. if (!dev->bus_vote.data) {
  1565. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1566. rc = -ENOMEM;
  1567. goto err_no_mem;
  1568. }
  1569. dev->bus_vote.data_count = 1;
  1570. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1571. rc = __load_fw(dev);
  1572. if (rc) {
  1573. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1574. goto err_load_fw;
  1575. }
  1576. /* mmrm registration */
  1577. if (msm_cvp_mmrm_enabled) {
  1578. rc = msm_cvp_mmrm_register(device);
  1579. if (rc) {
  1580. dprintk(CVP_ERR, "Failed to register mmrm client\n");
  1581. goto err_core_init;
  1582. }
  1583. }
  1584. __set_state(dev, IRIS_STATE_INIT);
  1585. dev->reg_dumped = false;
  1586. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1587. &dev->cvp_hal_data->firmware_base,
  1588. dev->cvp_hal_data->register_base);
  1589. rc = __interface_queues_init(dev);
  1590. if (rc) {
  1591. dprintk(CVP_ERR, "failed to init queues\n");
  1592. rc = -ENOMEM;
  1593. goto err_core_init;
  1594. }
  1595. cvp_register_va_md_region();
  1596. // Add node for dev struct
  1597. add_va_node_to_list(CVP_QUEUE_DUMP, dev,
  1598. sizeof(struct iris_hfi_device),
  1599. "iris_hfi_device-dev", false);
  1600. add_queue_header_to_va_md_list((void*)dev);
  1601. add_hfi_queue_to_va_md_list((void*)dev);
  1602. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1603. if (!rc) {
  1604. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1605. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1606. }
  1607. rc = __boot_firmware(dev);
  1608. if (rc) {
  1609. dprintk(CVP_ERR, "Failed to start core\n");
  1610. rc = -ENODEV;
  1611. goto err_core_init;
  1612. }
  1613. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1614. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1615. if (rc) {
  1616. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1617. goto err_core_init;
  1618. }
  1619. if (__iface_cmdq_write(dev, &pkt)) {
  1620. rc = -ENOTEMPTY;
  1621. goto err_core_init;
  1622. }
  1623. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1624. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1625. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1626. __sys_set_debug(device, msm_cvp_fw_debug);
  1627. __enable_subcaches(device);
  1628. __set_subcaches(device);
  1629. __set_ubwc_config(device);
  1630. __sys_set_idle_indicator(device, true);
  1631. if (dev->res->pm_qos.latency_us) {
  1632. int err = 0;
  1633. u32 i, cpu;
  1634. dev->res->pm_qos.pm_qos_hdls = kcalloc(
  1635. dev->res->pm_qos.silver_count,
  1636. sizeof(struct dev_pm_qos_request),
  1637. GFP_KERNEL);
  1638. if (!dev->res->pm_qos.pm_qos_hdls) {
  1639. dprintk(CVP_WARN, "Failed allocate pm_qos_hdls\n");
  1640. goto pm_qos_bail;
  1641. }
  1642. for (i = 0; i < dev->res->pm_qos.silver_count; i++) {
  1643. cpu = dev->res->pm_qos.silver_cores[i];
  1644. err = dev_pm_qos_add_request(
  1645. get_cpu_device(cpu),
  1646. &dev->res->pm_qos.pm_qos_hdls[i],
  1647. DEV_PM_QOS_RESUME_LATENCY,
  1648. dev->res->pm_qos.latency_us);
  1649. if (err < 0)
  1650. dprintk(CVP_WARN,
  1651. "%s pm_qos_add_req %d failed\n",
  1652. __func__, i);
  1653. }
  1654. }
  1655. pm_qos_bail:
  1656. mutex_unlock(&dev->lock);
  1657. cvp_dsp_send_hfi_queue();
  1658. pm_relax(dev->res->pdev->dev.parent);
  1659. dprintk(CVP_CORE, "Core inited successfully\n");
  1660. return 0;
  1661. err_core_init:
  1662. __set_state(dev, IRIS_STATE_DEINIT);
  1663. __unload_fw(dev);
  1664. if (dev->mmrm_cvp)
  1665. {
  1666. msm_cvp_mmrm_deregister(dev);
  1667. }
  1668. err_load_fw:
  1669. err_no_mem:
  1670. dprintk(CVP_ERR, "Core init failed\n");
  1671. mutex_unlock(&dev->lock);
  1672. pm_relax(dev->res->pdev->dev.parent);
  1673. return rc;
  1674. }
  1675. static int iris_hfi_core_release(void *dev)
  1676. {
  1677. int rc = 0, i;
  1678. struct iris_hfi_device *device = dev;
  1679. struct cvp_hal_session *session, *next;
  1680. struct dev_pm_qos_request *qos_hdl;
  1681. if (!device) {
  1682. dprintk(CVP_ERR, "invalid device\n");
  1683. return -ENODEV;
  1684. }
  1685. mutex_lock(&device->lock);
  1686. dprintk(CVP_WARN, "Core releasing\n");
  1687. if (device->res->pm_qos.latency_us &&
  1688. device->res->pm_qos.pm_qos_hdls) {
  1689. for (i = 0; i < device->res->pm_qos.silver_count; i++) {
  1690. qos_hdl = &device->res->pm_qos.pm_qos_hdls[i];
  1691. if ((qos_hdl != NULL) && dev_pm_qos_request_active(qos_hdl))
  1692. dev_pm_qos_remove_request(qos_hdl);
  1693. }
  1694. kfree(device->res->pm_qos.pm_qos_hdls);
  1695. device->res->pm_qos.pm_qos_hdls = NULL;
  1696. }
  1697. __resume(device);
  1698. __set_state(device, IRIS_STATE_DEINIT);
  1699. __dsp_shutdown(device, 0);
  1700. __disable_subcaches(device);
  1701. __unload_fw(device);
  1702. if (msm_cvp_mmrm_enabled) {
  1703. rc = msm_cvp_mmrm_deregister(device);
  1704. if (rc) {
  1705. dprintk(CVP_ERR,
  1706. "%s: Failed msm_cvp_mmrm_deregister:%d\n",
  1707. __func__, rc);
  1708. }
  1709. }
  1710. /* unlink all sessions from device */
  1711. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1712. list_del(&session->list);
  1713. session->device = NULL;
  1714. }
  1715. dprintk(CVP_CORE, "Core released successfully\n");
  1716. mutex_unlock(&device->lock);
  1717. return rc;
  1718. }
  1719. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1720. {
  1721. u32 intr_status = 0, mask = 0;
  1722. if (!device) {
  1723. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1724. return;
  1725. }
  1726. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1727. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1728. if (intr_status & mask) {
  1729. device->intr_status |= intr_status;
  1730. device->reg_count++;
  1731. dprintk(CVP_CORE,
  1732. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1733. device, device->reg_count, intr_status);
  1734. } else {
  1735. device->spur_count++;
  1736. }
  1737. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1738. }
  1739. static int iris_hfi_core_trigger_ssr(void *device,
  1740. enum hal_ssr_trigger_type type)
  1741. {
  1742. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1743. int rc = 0;
  1744. struct iris_hfi_device *dev;
  1745. cvp_free_va_md_list();
  1746. if (!device) {
  1747. dprintk(CVP_ERR, "invalid device\n");
  1748. return -ENODEV;
  1749. }
  1750. dev = device;
  1751. if (mutex_trylock(&dev->lock)) {
  1752. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1753. if (rc) {
  1754. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1755. __func__);
  1756. goto err_create_pkt;
  1757. }
  1758. if (__iface_cmdq_write(dev, &pkt))
  1759. rc = -ENOTEMPTY;
  1760. } else {
  1761. return -EAGAIN;
  1762. }
  1763. err_create_pkt:
  1764. mutex_unlock(&dev->lock);
  1765. return rc;
  1766. }
  1767. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1768. {
  1769. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1770. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1771. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1772. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1773. }
  1774. static void __session_clean(struct cvp_hal_session *session)
  1775. {
  1776. struct cvp_hal_session *temp, *next;
  1777. struct iris_hfi_device *device;
  1778. if (!session || !session->device) {
  1779. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1780. return;
  1781. }
  1782. device = session->device;
  1783. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1784. /*
  1785. * session might have been removed from the device list in
  1786. * core_release, so check and remove if it is in the list
  1787. */
  1788. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1789. if (session == temp) {
  1790. list_del(&session->list);
  1791. break;
  1792. }
  1793. }
  1794. /* Poison the session handle with zeros */
  1795. *session = (struct cvp_hal_session){ {0} };
  1796. kfree(session);
  1797. }
  1798. static int iris_hfi_session_clean(void *session)
  1799. {
  1800. struct cvp_hal_session *sess_close;
  1801. struct iris_hfi_device *device;
  1802. if (!session) {
  1803. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1804. return -EINVAL;
  1805. }
  1806. sess_close = session;
  1807. device = sess_close->device;
  1808. if (!device) {
  1809. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1810. return -EINVAL;
  1811. }
  1812. mutex_lock(&device->lock);
  1813. __session_clean(sess_close);
  1814. mutex_unlock(&device->lock);
  1815. return 0;
  1816. }
  1817. static int iris_hfi_session_init(void *device, void *session_id,
  1818. void **new_session)
  1819. {
  1820. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1821. struct iris_hfi_device *dev;
  1822. struct cvp_hal_session *s;
  1823. if (!device || !new_session) {
  1824. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1825. return -EINVAL;
  1826. }
  1827. dev = device;
  1828. mutex_lock(&dev->lock);
  1829. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1830. if (!s) {
  1831. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1832. goto err_session_init_fail;
  1833. }
  1834. s->session_id = session_id;
  1835. s->device = dev;
  1836. dprintk(CVP_SESS,
  1837. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1838. list_add_tail(&s->list, &dev->sess_head);
  1839. __set_default_sys_properties(device);
  1840. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1841. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1842. goto err_session_init_fail;
  1843. }
  1844. *new_session = s;
  1845. if (__iface_cmdq_write(dev, &pkt))
  1846. goto err_session_init_fail;
  1847. mutex_unlock(&dev->lock);
  1848. return 0;
  1849. err_session_init_fail:
  1850. if (s)
  1851. __session_clean(s);
  1852. *new_session = NULL;
  1853. mutex_unlock(&dev->lock);
  1854. return -EINVAL;
  1855. }
  1856. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1857. {
  1858. struct cvp_hal_session_cmd_pkt pkt;
  1859. int rc = 0;
  1860. struct iris_hfi_device *device = session->device;
  1861. if (!__is_session_valid(device, session, __func__))
  1862. return -ECONNRESET;
  1863. rc = call_hfi_pkt_op(device, session_cmd,
  1864. &pkt, pkt_type, session);
  1865. if (rc == -EPERM)
  1866. return 0;
  1867. if (rc) {
  1868. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1869. goto err_create_pkt;
  1870. }
  1871. if (__iface_cmdq_write(session->device, &pkt))
  1872. rc = -ENOTEMPTY;
  1873. err_create_pkt:
  1874. return rc;
  1875. }
  1876. static int iris_hfi_session_end(void *session)
  1877. {
  1878. struct cvp_hal_session *sess;
  1879. struct iris_hfi_device *device;
  1880. int rc = 0;
  1881. if (!session) {
  1882. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1883. return -EINVAL;
  1884. }
  1885. sess = session;
  1886. device = sess->device;
  1887. if (!device) {
  1888. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  1889. return -EINVAL;
  1890. }
  1891. mutex_lock(&device->lock);
  1892. if (msm_cvp_fw_coverage) {
  1893. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  1894. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  1895. }
  1896. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  1897. mutex_unlock(&device->lock);
  1898. return rc;
  1899. }
  1900. static int iris_hfi_session_abort(void *sess)
  1901. {
  1902. struct cvp_hal_session *session = sess;
  1903. struct iris_hfi_device *device;
  1904. int rc = 0;
  1905. if (!session || !session->device) {
  1906. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1907. return -EINVAL;
  1908. }
  1909. device = session->device;
  1910. mutex_lock(&device->lock);
  1911. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  1912. mutex_unlock(&device->lock);
  1913. return rc;
  1914. }
  1915. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  1916. {
  1917. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  1918. int rc = 0;
  1919. struct cvp_hal_session *session = sess;
  1920. struct iris_hfi_device *device;
  1921. if (!session || !session->device || !iova || !size) {
  1922. dprintk(CVP_ERR, "Invalid Params\n");
  1923. return -EINVAL;
  1924. }
  1925. device = session->device;
  1926. mutex_lock(&device->lock);
  1927. if (!__is_session_valid(device, session, __func__)) {
  1928. rc = -ECONNRESET;
  1929. goto err_create_pkt;
  1930. }
  1931. rc = call_hfi_pkt_op(device, session_set_buffers,
  1932. &pkt, session, iova, size);
  1933. if (rc) {
  1934. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  1935. goto err_create_pkt;
  1936. }
  1937. if (__iface_cmdq_write(session->device, &pkt))
  1938. rc = -ENOTEMPTY;
  1939. err_create_pkt:
  1940. mutex_unlock(&device->lock);
  1941. return rc;
  1942. }
  1943. static int iris_hfi_session_release_buffers(void *sess)
  1944. {
  1945. struct cvp_session_release_buffers_packet pkt;
  1946. int rc = 0;
  1947. struct cvp_hal_session *session = sess;
  1948. struct iris_hfi_device *device;
  1949. if (!session || !session->device) {
  1950. dprintk(CVP_ERR, "Invalid Params\n");
  1951. return -EINVAL;
  1952. }
  1953. device = session->device;
  1954. mutex_lock(&device->lock);
  1955. if (!__is_session_valid(device, session, __func__)) {
  1956. rc = -ECONNRESET;
  1957. goto err_create_pkt;
  1958. }
  1959. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  1960. if (rc) {
  1961. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  1962. goto err_create_pkt;
  1963. }
  1964. if (__iface_cmdq_write(session->device, &pkt))
  1965. rc = -ENOTEMPTY;
  1966. err_create_pkt:
  1967. mutex_unlock(&device->lock);
  1968. return rc;
  1969. }
  1970. static int iris_hfi_session_send(void *sess,
  1971. struct eva_kmd_hfi_packet *in_pkt)
  1972. {
  1973. int rc = 0;
  1974. struct eva_kmd_hfi_packet pkt;
  1975. struct cvp_hal_session *session = sess;
  1976. struct iris_hfi_device *device;
  1977. if (!session || !session->device) {
  1978. dprintk(CVP_ERR, "invalid session");
  1979. return -ENODEV;
  1980. }
  1981. device = session->device;
  1982. mutex_lock(&device->lock);
  1983. if (!__is_session_valid(device, session, __func__)) {
  1984. rc = -ECONNRESET;
  1985. goto err_send_pkt;
  1986. }
  1987. rc = call_hfi_pkt_op(device, session_send,
  1988. &pkt, session, in_pkt);
  1989. if (rc) {
  1990. dprintk(CVP_ERR,
  1991. "failed to create pkt\n");
  1992. goto err_send_pkt;
  1993. }
  1994. if (__iface_cmdq_write(session->device, &pkt))
  1995. rc = -ENOTEMPTY;
  1996. err_send_pkt:
  1997. mutex_unlock(&device->lock);
  1998. return rc;
  1999. return rc;
  2000. }
  2001. static int iris_hfi_session_flush(void *sess)
  2002. {
  2003. struct cvp_hal_session *session = sess;
  2004. struct iris_hfi_device *device;
  2005. int rc = 0;
  2006. if (!session || !session->device) {
  2007. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2008. return -EINVAL;
  2009. }
  2010. device = session->device;
  2011. mutex_lock(&device->lock);
  2012. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2013. mutex_unlock(&device->lock);
  2014. return rc;
  2015. }
  2016. static void __process_fatal_error(
  2017. struct iris_hfi_device *device)
  2018. {
  2019. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2020. cmd_done.device_id = device->device_id;
  2021. device->callback(HAL_SYS_ERROR, &cmd_done);
  2022. }
  2023. static int __prepare_pc(struct iris_hfi_device *device)
  2024. {
  2025. int rc = 0;
  2026. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2027. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2028. if (rc) {
  2029. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2030. goto err_pc_prep;
  2031. }
  2032. if (__iface_cmdq_write(device, &pkt))
  2033. rc = -ENOTEMPTY;
  2034. if (rc)
  2035. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2036. err_pc_prep:
  2037. return rc;
  2038. }
  2039. static void iris_hfi_pm_handler(struct work_struct *work)
  2040. {
  2041. int rc = 0;
  2042. struct msm_cvp_core *core;
  2043. struct iris_hfi_device *device;
  2044. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2045. if (core)
  2046. device = core->device->hfi_device_data;
  2047. else
  2048. return;
  2049. if (!device) {
  2050. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2051. return;
  2052. }
  2053. dprintk(CVP_PWR,
  2054. "Entering %s\n", __func__);
  2055. /*
  2056. * It is ok to check this variable outside the lock since
  2057. * it is being updated in this context only
  2058. */
  2059. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2060. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2061. device->skip_pc_count);
  2062. device->skip_pc_count = 0;
  2063. __process_fatal_error(device);
  2064. return;
  2065. }
  2066. mutex_lock(&device->lock);
  2067. if (gfa_cv.state == DSP_SUSPEND)
  2068. rc = __power_collapse(device, true);
  2069. else
  2070. rc = __power_collapse(device, false);
  2071. mutex_unlock(&device->lock);
  2072. switch (rc) {
  2073. case 0:
  2074. device->skip_pc_count = 0;
  2075. /* Cancel pending delayed works if any */
  2076. cancel_delayed_work(&iris_hfi_pm_work);
  2077. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2078. __func__);
  2079. break;
  2080. case -EBUSY:
  2081. device->skip_pc_count = 0;
  2082. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2083. queue_delayed_work(device->iris_pm_workq,
  2084. &iris_hfi_pm_work, msecs_to_jiffies(
  2085. device->res->msm_cvp_pwr_collapse_delay));
  2086. break;
  2087. case -EAGAIN:
  2088. device->skip_pc_count++;
  2089. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2090. __func__, device->skip_pc_count);
  2091. queue_delayed_work(device->iris_pm_workq,
  2092. &iris_hfi_pm_work, msecs_to_jiffies(
  2093. device->res->msm_cvp_pwr_collapse_delay));
  2094. break;
  2095. default:
  2096. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2097. break;
  2098. }
  2099. }
  2100. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2101. {
  2102. int rc = 0;
  2103. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2104. u32 flags = 0;
  2105. int count = 0;
  2106. const int max_tries = 150;
  2107. if (!device) {
  2108. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2109. return -EINVAL;
  2110. }
  2111. if (!device->power_enabled) {
  2112. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2113. __func__);
  2114. goto exit;
  2115. }
  2116. rc = __core_in_valid_state(device);
  2117. if (!rc) {
  2118. dprintk(CVP_WARN,
  2119. "Core is in bad state, Skipping power collapse\n");
  2120. return -EINVAL;
  2121. }
  2122. rc = __dsp_suspend(device, force, flags);
  2123. if (rc == -EBUSY)
  2124. goto exit;
  2125. else if (rc)
  2126. goto skip_power_off;
  2127. __flush_debug_queue(device, device->raw_packet);
  2128. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2129. CVP_CTRL_STATUS_PC_READY;
  2130. if (!pc_ready) {
  2131. wfi_status = __read_register(device,
  2132. CVP_WRAPPER_CPU_STATUS);
  2133. idle_status = __read_register(device,
  2134. CVP_CTRL_STATUS);
  2135. if (!(wfi_status & BIT(0))) {
  2136. dprintk(CVP_WARN,
  2137. "Skipping PC as wfi_status (%#x) bit not set\n",
  2138. wfi_status);
  2139. goto skip_power_off;
  2140. }
  2141. if (!(idle_status & BIT(30))) {
  2142. dprintk(CVP_WARN,
  2143. "Skipping PC as idle_status (%#x) bit not set\n",
  2144. idle_status);
  2145. goto skip_power_off;
  2146. }
  2147. rc = __prepare_pc(device);
  2148. if (rc) {
  2149. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2150. goto skip_power_off;
  2151. }
  2152. while (count < max_tries) {
  2153. wfi_status = __read_register(device,
  2154. CVP_WRAPPER_CPU_STATUS);
  2155. pc_ready = __read_register(device,
  2156. CVP_CTRL_STATUS);
  2157. if ((wfi_status & BIT(0)) && (pc_ready &
  2158. CVP_CTRL_STATUS_PC_READY))
  2159. break;
  2160. usleep_range(150, 250);
  2161. count++;
  2162. }
  2163. if (count == max_tries) {
  2164. dprintk(CVP_ERR,
  2165. "Skip PC. Core is not ready (%#x, %#x)\n",
  2166. wfi_status, pc_ready);
  2167. goto skip_power_off;
  2168. }
  2169. } else {
  2170. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  2171. if (!(wfi_status & BIT(0))) {
  2172. dprintk(CVP_WARN,
  2173. "Skip PC as wfi_status (%#x) bit not set\n",
  2174. wfi_status);
  2175. goto skip_power_off;
  2176. }
  2177. }
  2178. rc = __suspend(device);
  2179. if (rc)
  2180. dprintk(CVP_ERR, "Failed __suspend\n");
  2181. exit:
  2182. return rc;
  2183. skip_power_off:
  2184. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2185. wfi_status, idle_status, pc_ready);
  2186. __flush_debug_queue(device, device->raw_packet);
  2187. return -EAGAIN;
  2188. }
  2189. static void __process_sys_error(struct iris_hfi_device *device)
  2190. {
  2191. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2192. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2193. if (vsfr) {
  2194. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2195. /*
  2196. * SFR isn't guaranteed to be NULL terminated
  2197. * since SYS_ERROR indicates that Iris is in the
  2198. * process of crashing.
  2199. */
  2200. if (p == NULL)
  2201. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2202. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2203. vsfr->rg_data);
  2204. }
  2205. }
  2206. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2207. {
  2208. bool local_packet = false;
  2209. enum cvp_msg_prio log_level = CVP_FW;
  2210. if (!device) {
  2211. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2212. return;
  2213. }
  2214. if (!packet) {
  2215. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2216. if (!packet) {
  2217. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2218. __func__);
  2219. return;
  2220. }
  2221. local_packet = true;
  2222. /*
  2223. * Local packek is used when something FATAL occurred.
  2224. * It is good to print these logs by default.
  2225. */
  2226. log_level = CVP_ERR;
  2227. }
  2228. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2229. if (pkt_size < pkt_hdr_size || \
  2230. payload_size < MIN_PAYLOAD_SIZE || \
  2231. payload_size > \
  2232. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2233. dprintk(CVP_ERR, \
  2234. "%s: invalid msg size - %d\n", \
  2235. __func__, pkt->msg_size); \
  2236. continue; \
  2237. } \
  2238. })
  2239. while (!__iface_dbgq_read(device, packet)) {
  2240. struct cvp_hfi_packet_header *pkt =
  2241. (struct cvp_hfi_packet_header *) packet;
  2242. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2243. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2244. __func__);
  2245. continue;
  2246. }
  2247. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2248. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2249. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2250. SKIP_INVALID_PKT(pkt->size,
  2251. pkt->msg_size, sizeof(*pkt));
  2252. /*
  2253. * All fw messages starts with new line character. This
  2254. * causes dprintk to print this message in two lines
  2255. * in the kernel log. Ignoring the first character
  2256. * from the message fixes this to print it in a single
  2257. * line.
  2258. */
  2259. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2260. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2261. }
  2262. }
  2263. #undef SKIP_INVALID_PKT
  2264. if (local_packet)
  2265. kfree(packet);
  2266. }
  2267. static bool __is_session_valid(struct iris_hfi_device *device,
  2268. struct cvp_hal_session *session, const char *func)
  2269. {
  2270. struct cvp_hal_session *temp = NULL;
  2271. if (!device || !session)
  2272. goto invalid;
  2273. list_for_each_entry(temp, &device->sess_head, list)
  2274. if (session == temp)
  2275. return true;
  2276. invalid:
  2277. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2278. func, device, session);
  2279. return false;
  2280. }
  2281. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2282. u32 session_id)
  2283. {
  2284. struct cvp_hal_session *temp = NULL;
  2285. list_for_each_entry(temp, &device->sess_head, list) {
  2286. if (session_id == hash32_ptr(temp))
  2287. return temp;
  2288. }
  2289. return NULL;
  2290. }
  2291. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2292. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2293. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2294. static void process_system_msg(struct msm_cvp_cb_info *info,
  2295. struct iris_hfi_device *device,
  2296. void *raw_packet)
  2297. {
  2298. struct cvp_hal_sys_init_done sys_init_done = {0};
  2299. switch (info->response_type) {
  2300. case HAL_SYS_ERROR:
  2301. __process_sys_error(device);
  2302. break;
  2303. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2304. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2305. break;
  2306. case HAL_SYS_INIT_DONE:
  2307. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2308. sys_init_done.capabilities =
  2309. device->sys_init_capabilities;
  2310. cvp_hfi_process_sys_init_done_prop_read(
  2311. (struct cvp_hfi_msg_sys_init_done_packet *)
  2312. raw_packet, &sys_init_done);
  2313. info->response.cmd.data.sys_init_done = sys_init_done;
  2314. break;
  2315. default:
  2316. break;
  2317. }
  2318. }
  2319. static void **get_session_id(struct msm_cvp_cb_info *info)
  2320. {
  2321. void **session_id = NULL;
  2322. /* For session-related packets, validate session */
  2323. switch (info->response_type) {
  2324. case HAL_SESSION_INIT_DONE:
  2325. case HAL_SESSION_END_DONE:
  2326. case HAL_SESSION_ABORT_DONE:
  2327. case HAL_SESSION_STOP_DONE:
  2328. case HAL_SESSION_FLUSH_DONE:
  2329. case HAL_SESSION_SET_BUFFER_DONE:
  2330. case HAL_SESSION_SUSPEND_DONE:
  2331. case HAL_SESSION_RESUME_DONE:
  2332. case HAL_SESSION_SET_PROP_DONE:
  2333. case HAL_SESSION_GET_PROP_DONE:
  2334. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2335. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2336. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2337. case HAL_SESSION_PROPERTY_INFO:
  2338. case HAL_SESSION_EVENT_CHANGE:
  2339. case HAL_SESSION_DUMP_NOTIFY:
  2340. session_id = &info->response.cmd.session_id;
  2341. break;
  2342. case HAL_SESSION_ERROR:
  2343. session_id = &info->response.data.session_id;
  2344. break;
  2345. case HAL_RESPONSE_UNUSED:
  2346. default:
  2347. session_id = NULL;
  2348. break;
  2349. }
  2350. return session_id;
  2351. }
  2352. static void print_msg_hdr(void *hdr)
  2353. {
  2354. struct cvp_hfi_msg_session_hdr *new_hdr =
  2355. (struct cvp_hfi_msg_session_hdr *)hdr;
  2356. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2357. new_hdr->size, new_hdr->packet_type,
  2358. new_hdr->session_id,
  2359. new_hdr->client_data.transaction_id,
  2360. new_hdr->client_data.data1,
  2361. new_hdr->client_data.data2,
  2362. new_hdr->error_type);
  2363. }
  2364. static int __response_handler(struct iris_hfi_device *device)
  2365. {
  2366. struct msm_cvp_cb_info *packets;
  2367. int packet_count = 0;
  2368. u8 *raw_packet = NULL;
  2369. bool requeue_pm_work = true;
  2370. if (!device || device->state != IRIS_STATE_INIT)
  2371. return 0;
  2372. packets = device->response_pkt;
  2373. raw_packet = device->raw_packet;
  2374. if (!raw_packet || !packets) {
  2375. dprintk(CVP_ERR,
  2376. "%s: Invalid args : Res pkt = %pK, Raw pkt = %pK\n",
  2377. __func__, packets, raw_packet);
  2378. return 0;
  2379. }
  2380. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2381. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2382. device->sfr.align_virtual_addr;
  2383. struct msm_cvp_cb_info info = {
  2384. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2385. .response.cmd = {
  2386. .device_id = device->device_id,
  2387. }
  2388. };
  2389. if (vsfr)
  2390. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2391. vsfr->rg_data);
  2392. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2393. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2394. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2395. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2396. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2397. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2398. packets[packet_count++] = info;
  2399. goto exit;
  2400. }
  2401. /* Bleed the msg queue dry of packets */
  2402. while (!__iface_msgq_read(device, raw_packet)) {
  2403. void **session_id = NULL;
  2404. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2405. struct cvp_hfi_msg_session_hdr *hdr =
  2406. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2407. int rc = 0;
  2408. print_msg_hdr(hdr);
  2409. rc = cvp_hfi_process_msg_packet(device->device_id,
  2410. raw_packet, info);
  2411. if (rc) {
  2412. dprintk(CVP_WARN,
  2413. "Corrupt/unknown packet found, discarding\n");
  2414. --packet_count;
  2415. continue;
  2416. } else if (info->response_type == HAL_NO_RESP) {
  2417. --packet_count;
  2418. continue;
  2419. }
  2420. /* Process the packet types that we're interested in */
  2421. process_system_msg(info, device, raw_packet);
  2422. session_id = get_session_id(info);
  2423. /*
  2424. * hfi_process_msg_packet provides a session_id that's a hashed
  2425. * value of struct cvp_hal_session, we need to coerce the hashed
  2426. * value back to pointer that we can use. Ideally, hfi_process\
  2427. * _msg_packet should take care of this, but it doesn't have
  2428. * required information for it
  2429. */
  2430. if (session_id) {
  2431. struct cvp_hal_session *session = NULL;
  2432. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2433. dprintk(CVP_ERR,
  2434. "Upper 32-bits != 0 for sess_id=%pK\n",
  2435. *session_id);
  2436. }
  2437. session = __get_session(device,
  2438. (u32)(uintptr_t)*session_id);
  2439. if (!session) {
  2440. dprintk(CVP_ERR, _INVALID_MSG_,
  2441. info->response_type,
  2442. *session_id);
  2443. --packet_count;
  2444. continue;
  2445. }
  2446. *session_id = session->session_id;
  2447. }
  2448. if (packet_count >= cvp_max_packets) {
  2449. dprintk(CVP_WARN,
  2450. "Too many packets in message queue!\n");
  2451. break;
  2452. }
  2453. /* do not read packets after sys error packet */
  2454. if (info->response_type == HAL_SYS_ERROR)
  2455. break;
  2456. }
  2457. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2458. cancel_delayed_work(&iris_hfi_pm_work);
  2459. if (!queue_delayed_work(device->iris_pm_workq,
  2460. &iris_hfi_pm_work,
  2461. msecs_to_jiffies(
  2462. device->res->msm_cvp_pwr_collapse_delay))) {
  2463. dprintk(CVP_ERR, "PM work already scheduled\n");
  2464. }
  2465. }
  2466. exit:
  2467. __flush_debug_queue(device, raw_packet);
  2468. return packet_count;
  2469. }
  2470. static void iris_hfi_core_work_handler(struct work_struct *work)
  2471. {
  2472. struct msm_cvp_core *core;
  2473. struct iris_hfi_device *device;
  2474. int num_responses = 0, i = 0;
  2475. u32 intr_status;
  2476. static bool warning_on = true;
  2477. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2478. if (core)
  2479. device = core->device->hfi_device_data;
  2480. else
  2481. return;
  2482. mutex_lock(&device->lock);
  2483. if (!__core_in_valid_state(device)) {
  2484. if (warning_on) {
  2485. dprintk(CVP_WARN, "%s Core not in init state\n",
  2486. __func__);
  2487. warning_on = false;
  2488. }
  2489. goto err_no_work;
  2490. }
  2491. warning_on = true;
  2492. if (!device->callback) {
  2493. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2494. device);
  2495. goto err_no_work;
  2496. }
  2497. if (__resume(device)) {
  2498. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2499. goto err_no_work;
  2500. }
  2501. __core_clear_interrupt(device);
  2502. num_responses = __response_handler(device);
  2503. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2504. __func__, num_responses);
  2505. err_no_work:
  2506. /* Keep the interrupt status before releasing device lock */
  2507. intr_status = device->intr_status;
  2508. mutex_unlock(&device->lock);
  2509. /*
  2510. * Issue the callbacks outside of the locked contex to preserve
  2511. * re-entrancy.
  2512. */
  2513. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2514. i < num_responses; ++i) {
  2515. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2516. void *rsp = (void *)&r->response;
  2517. if (!__core_in_valid_state(device)) {
  2518. dprintk(CVP_ERR,
  2519. _INVALID_STATE_, (i + 1), num_responses);
  2520. break;
  2521. }
  2522. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2523. (i + 1), num_responses, r->response_type);
  2524. device->callback(r->response_type, rsp);
  2525. }
  2526. /* We need re-enable the irq which was disabled in ISR handler */
  2527. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2528. enable_irq(device->cvp_hal_data->irq);
  2529. /*
  2530. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2531. * it above doesn't guarantee the atomicity that we're aiming for.
  2532. */
  2533. }
  2534. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2535. irqreturn_t cvp_hfi_isr(int irq, void *dev)
  2536. {
  2537. struct iris_hfi_device *device = dev;
  2538. disable_irq_nosync(irq);
  2539. queue_work(device->cvp_workq, &iris_hfi_work);
  2540. return IRQ_HANDLED;
  2541. }
  2542. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2543. int reset_index, enum reset_state state,
  2544. enum power_state pwr_state)
  2545. {
  2546. int rc = 0;
  2547. struct reset_control *rst;
  2548. struct reset_info rst_info;
  2549. struct reset_set *rst_set = &res->reset_set;
  2550. if (!rst_set->reset_tbl)
  2551. return 0;
  2552. rst_info = rst_set->reset_tbl[reset_index];
  2553. rst = rst_info.rst;
  2554. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2555. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2556. switch (state) {
  2557. case INIT:
  2558. if (rst)
  2559. goto skip_reset_init;
  2560. rst = devm_reset_control_get(&res->pdev->dev,
  2561. rst_set->reset_tbl[reset_index].name);
  2562. if (IS_ERR(rst))
  2563. rc = PTR_ERR(rst);
  2564. rst_set->reset_tbl[reset_index].rst = rst;
  2565. break;
  2566. case ASSERT:
  2567. if (!rst) {
  2568. rc = PTR_ERR(rst);
  2569. goto failed_to_reset;
  2570. }
  2571. if (pwr_state != CVP_POWER_IGNORED &&
  2572. pwr_state != rst_info.required_state)
  2573. break;
  2574. rc = reset_control_assert(rst);
  2575. break;
  2576. case DEASSERT:
  2577. if (!rst) {
  2578. rc = PTR_ERR(rst);
  2579. goto failed_to_reset;
  2580. }
  2581. if (pwr_state != CVP_POWER_IGNORED &&
  2582. pwr_state != rst_info.required_state)
  2583. break;
  2584. rc = reset_control_deassert(rst);
  2585. break;
  2586. default:
  2587. dprintk(CVP_ERR, "Invalid reset request\n");
  2588. if (rc)
  2589. goto failed_to_reset;
  2590. }
  2591. return 0;
  2592. skip_reset_init:
  2593. failed_to_reset:
  2594. return rc;
  2595. }
  2596. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2597. {
  2598. int rc, i;
  2599. enum power_state s;
  2600. if (!device) {
  2601. dprintk(CVP_ERR, "NULL device\n");
  2602. rc = -EINVAL;
  2603. goto failed_to_reset;
  2604. }
  2605. if (device->power_enabled)
  2606. s = CVP_POWER_ON;
  2607. else
  2608. s = CVP_POWER_OFF;
  2609. #ifdef CONFIG_EVA_WAIPIO
  2610. s = CVP_POWER_IGNORED;
  2611. #endif
  2612. for (i = 0; i < device->res->reset_set.count; i++) {
  2613. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2614. if (rc) {
  2615. dprintk(CVP_ERR,
  2616. "failed to assert reset clocks\n");
  2617. goto failed_to_reset;
  2618. }
  2619. }
  2620. /* wait for deassert */
  2621. usleep_range(1000, 1050);
  2622. for (i = 0; i < device->res->reset_set.count; i++) {
  2623. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2624. if (rc) {
  2625. dprintk(CVP_ERR,
  2626. "failed to deassert reset clocks\n");
  2627. goto failed_to_reset;
  2628. }
  2629. }
  2630. return 0;
  2631. failed_to_reset:
  2632. return rc;
  2633. }
  2634. static void __deinit_bus(struct iris_hfi_device *device)
  2635. {
  2636. struct bus_info *bus = NULL;
  2637. if (!device)
  2638. return;
  2639. kfree(device->bus_vote.data);
  2640. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2641. iris_hfi_for_each_bus_reverse(device, bus) {
  2642. dev_set_drvdata(bus->dev, NULL);
  2643. icc_put(bus->client);
  2644. bus->client = NULL;
  2645. }
  2646. }
  2647. static int __init_bus(struct iris_hfi_device *device)
  2648. {
  2649. struct bus_info *bus = NULL;
  2650. int rc = 0;
  2651. if (!device)
  2652. return -EINVAL;
  2653. iris_hfi_for_each_bus(device, bus) {
  2654. /*
  2655. * This is stupid, but there's no other easy way to ahold
  2656. * of struct bus_info in iris_hfi_devfreq_*()
  2657. */
  2658. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2659. dev_name(bus->dev));
  2660. dev_set_drvdata(bus->dev, device);
  2661. bus->client = icc_get(&device->res->pdev->dev,
  2662. bus->master, bus->slave);
  2663. if (IS_ERR_OR_NULL(bus->client)) {
  2664. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2665. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2666. bus->name, rc);
  2667. bus->client = NULL;
  2668. goto err_add_dev;
  2669. }
  2670. }
  2671. return 0;
  2672. err_add_dev:
  2673. __deinit_bus(device);
  2674. return rc;
  2675. }
  2676. static void __deinit_regulators(struct iris_hfi_device *device)
  2677. {
  2678. struct regulator_info *rinfo = NULL;
  2679. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2680. if (rinfo->regulator) {
  2681. regulator_put(rinfo->regulator);
  2682. rinfo->regulator = NULL;
  2683. }
  2684. }
  2685. }
  2686. static int __init_regulators(struct iris_hfi_device *device)
  2687. {
  2688. int rc = 0;
  2689. struct regulator_info *rinfo = NULL;
  2690. iris_hfi_for_each_regulator(device, rinfo) {
  2691. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2692. rinfo->name);
  2693. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2694. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2695. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2696. rinfo->name);
  2697. rinfo->regulator = NULL;
  2698. goto err_reg_get;
  2699. }
  2700. }
  2701. return 0;
  2702. err_reg_get:
  2703. __deinit_regulators(device);
  2704. return rc;
  2705. }
  2706. static void __deinit_subcaches(struct iris_hfi_device *device)
  2707. {
  2708. struct subcache_info *sinfo = NULL;
  2709. if (!device) {
  2710. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2711. device);
  2712. goto exit;
  2713. }
  2714. if (!is_sys_cache_present(device))
  2715. goto exit;
  2716. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2717. if (sinfo->subcache) {
  2718. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2719. sinfo->name);
  2720. llcc_slice_putd(sinfo->subcache);
  2721. sinfo->subcache = NULL;
  2722. }
  2723. }
  2724. exit:
  2725. return;
  2726. }
  2727. static int __init_subcaches(struct iris_hfi_device *device)
  2728. {
  2729. int rc = 0;
  2730. struct subcache_info *sinfo = NULL;
  2731. if (!device) {
  2732. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2733. device);
  2734. return -EINVAL;
  2735. }
  2736. if (!is_sys_cache_present(device))
  2737. return 0;
  2738. iris_hfi_for_each_subcache(device, sinfo) {
  2739. if (!strcmp("cvp", sinfo->name)) {
  2740. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2741. } else if (!strcmp("cvpfw", sinfo->name)) {
  2742. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2743. } else {
  2744. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2745. sinfo->name);
  2746. }
  2747. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2748. rc = PTR_ERR(sinfo->subcache) ?
  2749. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  2750. dprintk(CVP_ERR,
  2751. "init_subcaches: invalid subcache: %s rc %d\n",
  2752. sinfo->name, rc);
  2753. sinfo->subcache = NULL;
  2754. goto err_subcache_get;
  2755. }
  2756. dprintk(CVP_CORE, "init_subcaches: %s\n",
  2757. sinfo->name);
  2758. }
  2759. return 0;
  2760. err_subcache_get:
  2761. __deinit_subcaches(device);
  2762. return rc;
  2763. }
  2764. static int __init_resources(struct iris_hfi_device *device,
  2765. struct msm_cvp_platform_resources *res)
  2766. {
  2767. int i, rc = 0;
  2768. rc = __init_regulators(device);
  2769. if (rc) {
  2770. dprintk(CVP_ERR, "Failed to get all regulators\n");
  2771. return -ENODEV;
  2772. }
  2773. rc = msm_cvp_init_clocks(device);
  2774. if (rc) {
  2775. dprintk(CVP_ERR, "Failed to init clocks\n");
  2776. rc = -ENODEV;
  2777. goto err_init_clocks;
  2778. }
  2779. for (i = 0; i < device->res->reset_set.count; i++) {
  2780. rc = __handle_reset_clk(res, i, INIT, 0);
  2781. if (rc) {
  2782. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  2783. rc = -ENODEV;
  2784. goto err_init_reset_clk;
  2785. }
  2786. }
  2787. rc = __init_bus(device);
  2788. if (rc) {
  2789. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  2790. goto err_init_bus;
  2791. }
  2792. rc = __init_subcaches(device);
  2793. if (rc)
  2794. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  2795. device->sys_init_capabilities =
  2796. kzalloc(sizeof(struct msm_cvp_capability)
  2797. * CVP_MAX_SESSIONS, GFP_KERNEL);
  2798. return rc;
  2799. err_init_reset_clk:
  2800. err_init_bus:
  2801. msm_cvp_deinit_clocks(device);
  2802. err_init_clocks:
  2803. __deinit_regulators(device);
  2804. return rc;
  2805. }
  2806. static void __deinit_resources(struct iris_hfi_device *device)
  2807. {
  2808. __deinit_subcaches(device);
  2809. __deinit_bus(device);
  2810. msm_cvp_deinit_clocks(device);
  2811. __deinit_regulators(device);
  2812. kfree(device->sys_init_capabilities);
  2813. device->sys_init_capabilities = NULL;
  2814. }
  2815. static int __disable_regulator_impl(struct regulator_info *rinfo,
  2816. struct iris_hfi_device *device)
  2817. {
  2818. int rc = 0;
  2819. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  2820. /*
  2821. * This call is needed. Driver needs to acquire the control back
  2822. * from HW in order to disable the regualtor. Else the behavior
  2823. * is unknown.
  2824. */
  2825. rc = __acquire_regulator(rinfo, device);
  2826. if (rc) {
  2827. /*
  2828. * This is somewhat fatal, but nothing we can do
  2829. * about it. We can't disable the regulator w/o
  2830. * getting it back under s/w control
  2831. */
  2832. dprintk(CVP_WARN,
  2833. "Failed to acquire control on %s\n",
  2834. rinfo->name);
  2835. goto disable_regulator_failed;
  2836. }
  2837. rc = regulator_disable(rinfo->regulator);
  2838. if (rc) {
  2839. dprintk(CVP_WARN,
  2840. "Failed to disable %s: %d\n",
  2841. rinfo->name, rc);
  2842. goto disable_regulator_failed;
  2843. }
  2844. return 0;
  2845. disable_regulator_failed:
  2846. /* Bring attention to this issue */
  2847. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2848. return rc;
  2849. }
  2850. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  2851. {
  2852. int rc = 0;
  2853. if (!msm_cvp_fw_low_power_mode) {
  2854. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  2855. return 0;
  2856. }
  2857. rc = __hand_off_regulators(device);
  2858. if (rc)
  2859. dprintk(CVP_WARN,
  2860. "%s : Failed to enable HW power collapse %d\n",
  2861. __func__, rc);
  2862. return rc;
  2863. }
  2864. static int __enable_regulator(struct iris_hfi_device *device,
  2865. const char *name)
  2866. {
  2867. int rc = 0;
  2868. struct regulator_info *rinfo;
  2869. iris_hfi_for_each_regulator(device, rinfo) {
  2870. if (strcmp(rinfo->name, name))
  2871. continue;
  2872. rc = regulator_enable(rinfo->regulator);
  2873. if (rc) {
  2874. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  2875. rinfo->name, rc);
  2876. return rc;
  2877. }
  2878. if (!regulator_is_enabled(rinfo->regulator)) {
  2879. dprintk(CVP_ERR,"%s: regulator %s not enabled\n",
  2880. __func__, rinfo->name);
  2881. regulator_disable(rinfo->regulator);
  2882. return -EINVAL;
  2883. }
  2884. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  2885. return 0;
  2886. }
  2887. dprintk(CVP_ERR, "regulator %s not found\n");
  2888. return -EINVAL;
  2889. }
  2890. static int __disable_regulator(struct iris_hfi_device *device,
  2891. const char *name)
  2892. {
  2893. struct regulator_info *rinfo;
  2894. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2895. if (strcmp(rinfo->name, name))
  2896. continue;
  2897. __disable_regulator_impl(rinfo, device);
  2898. dprintk(CVP_PWR, "%s Disabled regulator %s\n", __func__, name);
  2899. return 0;
  2900. }
  2901. dprintk(CVP_ERR, "%s regulator %s not found\n", __func__, name);
  2902. return -EINVAL;
  2903. }
  2904. static int __enable_subcaches(struct iris_hfi_device *device)
  2905. {
  2906. int rc = 0;
  2907. u32 c = 0;
  2908. struct subcache_info *sinfo;
  2909. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2910. return 0;
  2911. /* Activate subcaches */
  2912. iris_hfi_for_each_subcache(device, sinfo) {
  2913. rc = llcc_slice_activate(sinfo->subcache);
  2914. if (rc) {
  2915. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  2916. sinfo->name, rc);
  2917. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2918. goto err_activate_fail;
  2919. }
  2920. sinfo->isactive = true;
  2921. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  2922. c++;
  2923. }
  2924. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  2925. return 0;
  2926. err_activate_fail:
  2927. __release_subcaches(device);
  2928. __disable_subcaches(device);
  2929. return 0;
  2930. }
  2931. static int __set_subcaches(struct iris_hfi_device *device)
  2932. {
  2933. int rc = 0;
  2934. u32 c = 0;
  2935. struct subcache_info *sinfo;
  2936. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2937. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2938. struct cvp_hfi_resource_subcache_type *sc_res;
  2939. struct cvp_resource_hdr rhdr;
  2940. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  2941. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  2942. return 0;
  2943. }
  2944. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  2945. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  2946. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  2947. iris_hfi_for_each_subcache(device, sinfo) {
  2948. if (sinfo->isactive) {
  2949. sc_res[c].size = sinfo->subcache->slice_size;
  2950. sc_res[c].sc_id = sinfo->subcache->slice_id;
  2951. c++;
  2952. }
  2953. }
  2954. /* Set resource to CVP for activated subcaches */
  2955. if (c) {
  2956. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  2957. rhdr.resource_handle = sc_res_info; /* cookie */
  2958. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  2959. sc_res_info->num_entries = c;
  2960. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  2961. if (rc) {
  2962. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  2963. goto err_fail_set_subacaches;
  2964. }
  2965. iris_hfi_for_each_subcache(device, sinfo) {
  2966. if (sinfo->isactive)
  2967. sinfo->isset = true;
  2968. }
  2969. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  2970. device->res->sys_cache_res_set = true;
  2971. }
  2972. return 0;
  2973. err_fail_set_subacaches:
  2974. __disable_subcaches(device);
  2975. return 0;
  2976. }
  2977. static int __release_subcaches(struct iris_hfi_device *device)
  2978. {
  2979. struct subcache_info *sinfo;
  2980. int rc = 0;
  2981. u32 c = 0;
  2982. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  2983. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  2984. struct cvp_hfi_resource_subcache_type *sc_res;
  2985. struct cvp_resource_hdr rhdr;
  2986. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  2987. return 0;
  2988. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  2989. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  2990. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  2991. /* Release resource command to Iris */
  2992. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2993. if (sinfo->isset) {
  2994. /* Update the entry */
  2995. sc_res[c].size = sinfo->subcache->slice_size;
  2996. sc_res[c].sc_id = sinfo->subcache->slice_id;
  2997. c++;
  2998. sinfo->isset = false;
  2999. }
  3000. }
  3001. if (c > 0) {
  3002. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3003. rhdr.resource_handle = sc_res_info; /* cookie */
  3004. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3005. rc = __core_release_resource(device, &rhdr);
  3006. if (rc)
  3007. dprintk(CVP_WARN,
  3008. "Failed to release %d subcaches\n", c);
  3009. }
  3010. device->res->sys_cache_res_set = false;
  3011. return 0;
  3012. }
  3013. static int __disable_subcaches(struct iris_hfi_device *device)
  3014. {
  3015. struct subcache_info *sinfo;
  3016. int rc = 0;
  3017. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3018. return 0;
  3019. /* De-activate subcaches */
  3020. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3021. if (sinfo->isactive) {
  3022. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3023. sinfo->name);
  3024. rc = llcc_slice_deactivate(sinfo->subcache);
  3025. if (rc) {
  3026. dprintk(CVP_WARN,
  3027. "Failed to de-activate %s: %d\n",
  3028. sinfo->name, rc);
  3029. }
  3030. sinfo->isactive = false;
  3031. }
  3032. }
  3033. return 0;
  3034. }
  3035. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3036. {
  3037. u32 mask_val = 0;
  3038. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3039. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3040. /* Write 0 to unmask CPU and WD interrupts */
  3041. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3042. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3043. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3044. CVP_WRAPPER_INTR_MASK, mask_val);
  3045. }
  3046. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3047. {
  3048. /* initialize DSP QTBL & UCREGION with CPU queues */
  3049. __write_register(device, HFI_DSP_QTBL_ADDR,
  3050. (u32)device->dsp_iface_q_table.align_device_addr);
  3051. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3052. (u32)device->dsp_iface_q_table.align_device_addr);
  3053. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3054. device->dsp_iface_q_table.mem_data.size);
  3055. }
  3056. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3057. {
  3058. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3059. }
  3060. static int __set_ubwc_config(struct iris_hfi_device *device)
  3061. {
  3062. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3063. int rc = 0;
  3064. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3065. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3066. if (!device->res->ubwc_config)
  3067. return 0;
  3068. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3069. device->res->ubwc_config);
  3070. if (rc) {
  3071. dprintk(CVP_WARN,
  3072. "ubwc config setting to FW failed\n");
  3073. rc = -ENOTEMPTY;
  3074. goto fail_to_set_ubwc_config;
  3075. }
  3076. if (__iface_cmdq_write(device, pkt)) {
  3077. rc = -ENOTEMPTY;
  3078. goto fail_to_set_ubwc_config;
  3079. }
  3080. fail_to_set_ubwc_config:
  3081. return rc;
  3082. }
  3083. static int __power_on_controller(struct iris_hfi_device *device)
  3084. {
  3085. int rc = 0;
  3086. rc = __enable_regulator(device, "cvp");
  3087. if (rc) {
  3088. dprintk(CVP_ERR, "Failed to enable ctrler: %d\n", rc);
  3089. return rc;
  3090. }
  3091. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3092. if (rc) {
  3093. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3094. goto fail_reset_clks;
  3095. }
  3096. rc = msm_cvp_prepare_enable_clk(device, "gcc_video_axi1");
  3097. if (rc) {
  3098. dprintk(CVP_ERR, "Failed to enable axi1 clk: %d\n", rc);
  3099. goto fail_reset_clks;
  3100. }
  3101. rc = msm_cvp_prepare_enable_clk(device, "cvp_clk");
  3102. if (rc) {
  3103. dprintk(CVP_ERR, "Failed to enable cvp_clk: %d\n", rc);
  3104. goto fail_enable_clk;
  3105. }
  3106. dprintk(CVP_PWR, "EVA controller powered on\n");
  3107. return 0;
  3108. fail_enable_clk:
  3109. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3110. fail_reset_clks:
  3111. __disable_regulator(device, "cvp");
  3112. return rc;
  3113. }
  3114. static int __power_on_core(struct iris_hfi_device *device)
  3115. {
  3116. int rc = 0;
  3117. rc = __enable_regulator(device, "cvp-core");
  3118. if (rc) {
  3119. dprintk(CVP_ERR, "Failed to enable core: %d\n", rc);
  3120. return rc;
  3121. }
  3122. rc = msm_cvp_prepare_enable_clk(device, "video_cc_mvs1_clk_src");
  3123. if (rc) {
  3124. dprintk(CVP_ERR, "Failed to enable video_cc_mvs1_clk_src:%d\n",
  3125. rc);
  3126. __disable_regulator(device, "cvp-core");
  3127. return rc;
  3128. }
  3129. rc = msm_cvp_prepare_enable_clk(device, "core_clk");
  3130. if (rc) {
  3131. dprintk(CVP_ERR, "Failed to enable core_clk: %d\n", rc);
  3132. __disable_regulator(device, "cvp-core");
  3133. return rc;
  3134. }
  3135. dprintk(CVP_PWR, "EVA core powered on\n");
  3136. return 0;
  3137. }
  3138. static int __iris_power_on(struct iris_hfi_device *device)
  3139. {
  3140. int rc = 0;
  3141. if (device->power_enabled)
  3142. return 0;
  3143. /* Vote for all hardware resources */
  3144. rc = __vote_buses(device, device->bus_vote.data,
  3145. device->bus_vote.data_count);
  3146. if (rc) {
  3147. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3148. goto fail_vote_buses;
  3149. }
  3150. rc = __power_on_controller(device);
  3151. if (rc)
  3152. goto fail_enable_controller;
  3153. rc = __power_on_core(device);
  3154. if (rc)
  3155. goto fail_enable_core;
  3156. rc = msm_cvp_scale_clocks(device);
  3157. if (rc) {
  3158. dprintk(CVP_WARN,
  3159. "Failed to scale clocks, perf may regress\n");
  3160. rc = 0;
  3161. } else {
  3162. dprintk(CVP_PWR, "Done with scaling\n");
  3163. }
  3164. /*Do not access registers before this point!*/
  3165. device->power_enabled = true;
  3166. /*
  3167. * Re-program all of the registers that get reset as a result of
  3168. * regulator_disable() and _enable()
  3169. */
  3170. __set_registers(device);
  3171. dprintk(CVP_CORE, "Done with register set\n");
  3172. call_iris_op(device, interrupt_init, device);
  3173. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3174. device->intr_status = 0;
  3175. enable_irq(device->cvp_hal_data->irq);
  3176. __write_register(device,
  3177. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x7);
  3178. pr_info_ratelimited(CVP_DBG_TAG "cvp (eva) powered on\n", "pwr");
  3179. return 0;
  3180. fail_enable_core:
  3181. __power_off_controller(device);
  3182. fail_enable_controller:
  3183. __unvote_buses(device);
  3184. fail_vote_buses:
  3185. device->power_enabled = false;
  3186. return rc;
  3187. }
  3188. static inline int __suspend(struct iris_hfi_device *device)
  3189. {
  3190. int rc = 0;
  3191. if (!device) {
  3192. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3193. return -EINVAL;
  3194. } else if (!device->power_enabled) {
  3195. dprintk(CVP_PWR, "Power already disabled\n");
  3196. return 0;
  3197. }
  3198. dprintk(CVP_PWR, "Entering suspend\n");
  3199. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3200. if (rc) {
  3201. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3202. goto err_tzbsp_suspend;
  3203. }
  3204. __disable_subcaches(device);
  3205. call_iris_op(device, power_off, device);
  3206. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  3207. cvp_pm_qos_update(device, false);
  3208. return rc;
  3209. err_tzbsp_suspend:
  3210. return rc;
  3211. }
  3212. static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
  3213. {
  3214. u32 sbm_ln0_low, axi_cbcr;
  3215. u32 main_sbm_ln0_low = 0xdeadbeef, main_sbm_ln0_high = 0xdeadbeef;
  3216. u32 main_sbm_ln1_high = 0xdeadbeef, cpu_cs_x2rpmh;
  3217. sbm_ln0_low =
  3218. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3219. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3220. __write_register(device, CVP_CPU_CS_X2RPMh,
  3221. (cpu_cs_x2rpmh | CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK));
  3222. usleep_range(500, 1000);
  3223. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3224. if (!(cpu_cs_x2rpmh & CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK)) {
  3225. dprintk(CVP_WARN,
  3226. "failed set CVP_CPU_CS_X2RPMH mask %x\n",
  3227. cpu_cs_x2rpmh);
  3228. goto exit;
  3229. }
  3230. axi_cbcr = __read_gcc_register(device, CVP_GCC_VIDEO_AXI1_CBCR);
  3231. if (axi_cbcr & 0x80000000) {
  3232. dprintk(CVP_WARN, "failed to turn on AXI clock %x\n",
  3233. axi_cbcr);
  3234. goto exit;
  3235. }
  3236. main_sbm_ln0_low = __read_register(device,
  3237. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3238. main_sbm_ln0_high = __read_register(device,
  3239. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_HIGH);
  3240. main_sbm_ln1_high = __read_register(device,
  3241. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3242. exit:
  3243. cpu_cs_x2rpmh = cpu_cs_x2rpmh & (~CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK);
  3244. __write_register(device, CVP_CPU_CS_X2RPMh, cpu_cs_x2rpmh);
  3245. dprintk(CVP_WARN, "Sidebandmanager regs %x %x %x %x %x\n",
  3246. sbm_ln0_low, main_sbm_ln0_low,
  3247. main_sbm_ln0_high, main_sbm_ln1_high,
  3248. cpu_cs_x2rpmh);
  3249. }
  3250. static int __power_off_controller(struct iris_hfi_device *device)
  3251. {
  3252. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3253. u32 sbm_ln0_low;
  3254. int rc;
  3255. /* HPG 6.2.2 Step 1 */
  3256. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3257. /* HPG 6.2.2 Step 2, noc to low power */
  3258. __write_register(device, CVP_AON_WRAPPER_CVP_NOC_LPI_CONTROL, 0x1);
  3259. while (!reg_status && count < max_count) {
  3260. lpi_status =
  3261. __read_register(device,
  3262. CVP_AON_WRAPPER_CVP_NOC_LPI_STATUS);
  3263. reg_status = lpi_status & BIT(0);
  3264. /* Wait for Core noc lpi status to be set */
  3265. usleep_range(50, 100);
  3266. count++;
  3267. }
  3268. dprintk(CVP_PWR,
  3269. "Core Noc: lpi_status %x noc_status %x (count %d)\n",
  3270. lpi_status, reg_status, count);
  3271. if (count == max_count) {
  3272. u32 pc_ready, wfi_status;
  3273. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3274. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3275. dprintk(CVP_WARN,
  3276. "Core NOC not in qaccept status %x %x %x %x\n",
  3277. reg_status, lpi_status, wfi_status, pc_ready);
  3278. __print_sidebandmanager_regs(device);
  3279. }
  3280. /* New addition to put CPU/Tensilica to low power */
  3281. reg_status = 0;
  3282. count = 0;
  3283. __write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x1);
  3284. while (!reg_status && count < max_count) {
  3285. lpi_status =
  3286. __read_register(device,
  3287. CVP_WRAPPER_CPU_NOC_LPI_STATUS);
  3288. reg_status = lpi_status & BIT(0);
  3289. /* Wait for CPU noc lpi status to be set */
  3290. usleep_range(50, 100);
  3291. count++;
  3292. }
  3293. sbm_ln0_low = __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3294. dprintk(CVP_PWR,
  3295. "CPU Noc: lpi_status %x noc_status %x (count %d) 0x%x\n",
  3296. lpi_status, reg_status, count, sbm_ln0_low);
  3297. if (count == max_count) {
  3298. u32 pc_ready, wfi_status;
  3299. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3300. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3301. dprintk(CVP_WARN,
  3302. "CPU NOC not in qaccept status %x %x %x %x\n",
  3303. reg_status, lpi_status, wfi_status, pc_ready);
  3304. __print_sidebandmanager_regs(device);
  3305. }
  3306. /* HPG 6.2.2 Step 3, debug bridge to low power BYPASSED */
  3307. /* HPG 6.2.2 Step 4, debug bridge to lpi release */
  3308. __write_register(device,
  3309. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3310. lpi_status = 0x1;
  3311. count = 0;
  3312. while (lpi_status && count < max_count) {
  3313. lpi_status = __read_register(device,
  3314. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3315. usleep_range(50, 100);
  3316. count++;
  3317. }
  3318. dprintk(CVP_PWR,
  3319. "DBLP Release: lpi_status %d(count %d)\n",
  3320. lpi_status, count);
  3321. if (count == max_count) {
  3322. dprintk(CVP_WARN,
  3323. "DBLP Release: lpi_status %x\n", lpi_status);
  3324. }
  3325. /* PDXFIFO reset: addition for Kailua */
  3326. #ifdef CONFIG_EVA_KALAMA
  3327. __write_register(device, CVP_WRAPPER_AXI_CLOCK_CONFIG, 0x3);
  3328. __write_register(device, CVP_WRAPPER_QNS4PDXFIFO_RESET, 0x1);
  3329. __write_register(device, CVP_WRAPPER_QNS4PDXFIFO_RESET, 0x0);
  3330. __write_register(device, CVP_WRAPPER_AXI_CLOCK_CONFIG, 0x0);
  3331. #endif
  3332. /* HPG 6.2.2 Step 5 */
  3333. msm_cvp_disable_unprepare_clk(device, "cvp_clk");
  3334. /* HPG 6.2.2 Step 7 */
  3335. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3336. /* Added to avoid pending transaction after power off */
  3337. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3338. if (rc)
  3339. dprintk(CVP_ERR, "Off: Failed to reset ahb2axi: %d\n", rc);
  3340. /* HPG 6.2.2 Step 6 */
  3341. __disable_regulator(device, "cvp");
  3342. return 0;
  3343. }
  3344. static int __power_off_core(struct iris_hfi_device *device)
  3345. {
  3346. u32 config, value = 0, count = 0, warn_flag = 0;
  3347. const u32 max_count = 10;
  3348. value = __read_register(device, CVP_CC_MVS1_GDSCR);
  3349. if (!(value & 0x80000000)) {
  3350. /*
  3351. * Core has been powered off by f/w.
  3352. * Check NOC reset registers to ensure
  3353. * NO outstanding NoC transactions
  3354. */
  3355. value = __read_register(device, CVP_NOC_RESET_ACK);
  3356. if (value) {
  3357. dprintk(CVP_WARN,
  3358. "Core off with NOC RESET ACK non-zero %x\n",
  3359. value);
  3360. __print_sidebandmanager_regs(device);
  3361. }
  3362. __disable_regulator(device, "cvp-core");
  3363. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3364. msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
  3365. return 0;
  3366. }
  3367. dprintk(CVP_PWR, "Driver controls Core power off now\n");
  3368. /*
  3369. * check to make sure core clock branch enabled else
  3370. * we cannot read core idle register
  3371. */
  3372. config = __read_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  3373. if (config) {
  3374. dprintk(CVP_PWR,
  3375. "core clock config not enabled, enable it to access core\n");
  3376. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, 0);
  3377. }
  3378. /*
  3379. * add MNoC idle check before collapsing MVS1 per HPG update
  3380. * poll for NoC DMA idle -> HPG 6.2.1
  3381. *
  3382. */
  3383. do {
  3384. value = __read_register(device, CVP_SS_IDLE_STATUS);
  3385. if (value & 0x400000)
  3386. break;
  3387. else
  3388. usleep_range(1000, 2000);
  3389. count++;
  3390. } while (count < max_count);
  3391. if (count == max_count) {
  3392. dprintk(CVP_WARN, "Core fail to go idle %x\n", value);
  3393. warn_flag = 1;
  3394. }
  3395. /* Apply partial reset on MSF interface and wait for ACK */
  3396. __write_register(device, CVP_NOC_RESET_REQ, 0x7);
  3397. count = 0;
  3398. do {
  3399. value = __read_register(device, CVP_NOC_RESET_ACK);
  3400. if ((value & 0x7) == 0x7)
  3401. break;
  3402. else
  3403. usleep_range(100, 200);
  3404. count++;
  3405. } while (count < max_count);
  3406. if (count == max_count) {
  3407. dprintk(CVP_WARN, "Core NoC reset assert failed %x\n", value);
  3408. warn_flag = 1;
  3409. }
  3410. /* De-assert partial reset on MSF interface and wait for ACK */
  3411. __write_register(device, CVP_NOC_RESET_REQ, 0x0);
  3412. count = 0;
  3413. do {
  3414. value = __read_register(device, CVP_NOC_RESET_ACK);
  3415. if ((value & 0x1) == 0x0)
  3416. break;
  3417. else
  3418. usleep_range(100, 200);
  3419. count++;
  3420. } while (count < max_count);
  3421. if (count == max_count) {
  3422. dprintk(CVP_WARN, "Core NoC reset de-assert failed\n");
  3423. warn_flag = 1;
  3424. }
  3425. if (warn_flag)
  3426. __print_sidebandmanager_regs(device);
  3427. /* Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) */
  3428. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x3);
  3429. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x2);
  3430. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x0);
  3431. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, config);
  3432. __disable_regulator(device, "cvp-core");
  3433. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3434. msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
  3435. return 0;
  3436. }
  3437. static void power_off_iris2(struct iris_hfi_device *device)
  3438. {
  3439. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3440. return;
  3441. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3442. disable_irq_nosync(device->cvp_hal_data->irq);
  3443. device->intr_status = 0;
  3444. __power_off_core(device);
  3445. __power_off_controller(device);
  3446. if (__unvote_buses(device))
  3447. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3448. /*Do not access registers after this point!*/
  3449. device->power_enabled = false;
  3450. pr_info_ratelimited(CVP_DBG_TAG "cvp (eva) power collapsed\n", "pwr");
  3451. }
  3452. static inline int __resume(struct iris_hfi_device *device)
  3453. {
  3454. int rc = 0;
  3455. u32 flags = 0, reg_gdsc, reg_cbcr;
  3456. struct msm_cvp_core *core;
  3457. if (!device) {
  3458. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3459. return -EINVAL;
  3460. } else if (device->power_enabled) {
  3461. goto exit;
  3462. } else if (!__core_in_valid_state(device)) {
  3463. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3464. return -EINVAL;
  3465. }
  3466. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3467. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3468. rc = __iris_power_on(device);
  3469. if (rc) {
  3470. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3471. goto err_iris_power_on;
  3472. }
  3473. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3474. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3475. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3476. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3477. reg_gdsc, reg_cbcr);
  3478. /* Reboot the firmware */
  3479. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3480. if (rc) {
  3481. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3482. goto err_set_cvp_state;
  3483. }
  3484. __setup_ucregion_memory_map(device);
  3485. /* Wait for boot completion */
  3486. rc = __boot_firmware(device);
  3487. if (rc) {
  3488. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3489. msm_cvp_trigger_ssr(core, SSR_ERR_FATAL);
  3490. goto err_reset_core;
  3491. }
  3492. /*
  3493. * Work around for H/W bug, need to reprogram these registers once
  3494. * firmware is out reset
  3495. */
  3496. __set_threshold_registers(device);
  3497. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  3498. cvp_pm_qos_update(device, true);
  3499. __sys_set_debug(device, msm_cvp_fw_debug);
  3500. __enable_subcaches(device);
  3501. __set_subcaches(device);
  3502. __dsp_resume(device, flags);
  3503. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3504. exit:
  3505. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3506. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3507. device->skip_pc_count = 0;
  3508. return rc;
  3509. err_reset_core:
  3510. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3511. err_set_cvp_state:
  3512. call_iris_op(device, power_off, device);
  3513. err_iris_power_on:
  3514. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3515. return rc;
  3516. }
  3517. static int __load_fw(struct iris_hfi_device *device)
  3518. {
  3519. int rc = 0;
  3520. /* Initialize resources */
  3521. rc = __init_resources(device, device->res);
  3522. if (rc) {
  3523. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3524. goto fail_init_res;
  3525. }
  3526. rc = __initialize_packetization(device);
  3527. if (rc) {
  3528. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3529. goto fail_init_pkt;
  3530. }
  3531. rc = __iris_power_on(device);
  3532. if (rc) {
  3533. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3534. goto fail_iris_power_on;
  3535. }
  3536. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3537. || device->res->use_non_secure_pil) {
  3538. rc = load_cvp_fw_impl(device);
  3539. if (rc)
  3540. goto fail_load_fw;
  3541. }
  3542. return rc;
  3543. fail_load_fw:
  3544. call_iris_op(device, power_off, device);
  3545. fail_iris_power_on:
  3546. fail_init_pkt:
  3547. __deinit_resources(device);
  3548. fail_init_res:
  3549. return rc;
  3550. }
  3551. static void __unload_fw(struct iris_hfi_device *device)
  3552. {
  3553. if (!device->resources.fw.cookie)
  3554. return;
  3555. cancel_delayed_work(&iris_hfi_pm_work);
  3556. if (device->state != IRIS_STATE_DEINIT)
  3557. flush_workqueue(device->iris_pm_workq);
  3558. unload_cvp_fw_impl(device);
  3559. __interface_queues_release(device);
  3560. call_iris_op(device, power_off, device);
  3561. __deinit_resources(device);
  3562. dprintk(CVP_WARN, "Firmware unloaded\n");
  3563. }
  3564. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3565. {
  3566. int i = 0;
  3567. struct iris_hfi_device *device = dev;
  3568. if (!device || !fw_info) {
  3569. dprintk(CVP_ERR,
  3570. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3571. __func__, device, fw_info);
  3572. return -EINVAL;
  3573. }
  3574. mutex_lock(&device->lock);
  3575. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3576. ;
  3577. if (i == CVP_VERSION_LENGTH - 1) {
  3578. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3579. fw_info->version[0] = '\0';
  3580. goto fail_version_string;
  3581. }
  3582. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3583. CVP_VERSION_LENGTH);
  3584. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3585. fail_version_string:
  3586. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3587. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3588. fw_info->register_base = device->res->register_base;
  3589. fw_info->register_size = device->cvp_hal_data->register_size;
  3590. fw_info->irq = device->cvp_hal_data->irq;
  3591. mutex_unlock(&device->lock);
  3592. return 0;
  3593. }
  3594. static int iris_hfi_get_core_capabilities(void *dev)
  3595. {
  3596. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3597. return 0;
  3598. }
  3599. static const char * const mid_names[16] = {
  3600. "CVP_FW",
  3601. "ARP_DATA",
  3602. "CVP_OD_NON_PIXEL",
  3603. "CVP_OD_ORIG_PIXEL",
  3604. "CVP_OD_WR_PIXEL",
  3605. "CVP_MPU_ORIG_PIXEL",
  3606. "CVP_MPU_REF_PIXEL",
  3607. "CVP_MPU_NON_PIXEL",
  3608. "CVP_MPU_DFS",
  3609. "CVP_FDU_NON_PIXEL",
  3610. "CVP_FDU_PIXEL",
  3611. "CVP_ICA_PIXEL",
  3612. "Invalid",
  3613. "Invalid",
  3614. "Invalid",
  3615. "Invalid"
  3616. };
  3617. static void __print_reg_details(u32 val)
  3618. {
  3619. u32 mid, sid;
  3620. mid = (val >> 5) & 0xF;
  3621. sid = (val >> 2) & 0x7;
  3622. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3623. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3624. }
  3625. static void __err_log(bool logging, u32 *data, const char *name, u32 val)
  3626. {
  3627. if (logging)
  3628. *data = val;
  3629. dprintk(CVP_ERR, "%s: %#x\n", name, val);
  3630. }
  3631. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3632. {
  3633. struct msm_cvp_core *core;
  3634. struct cvp_noc_log *noc_log;
  3635. u32 val = 0, regi, i;
  3636. bool log_required = false;
  3637. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3638. if (!core->ssr_count && core->resources.max_ssr_allowed > 1)
  3639. log_required = true;
  3640. noc_log = &core->log.noc_log;
  3641. if (noc_log->used) {
  3642. dprintk(CVP_WARN, "Data already in NoC log, skip logging\n");
  3643. return;
  3644. }
  3645. noc_log->used = 1;
  3646. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3647. __err_log(log_required, &noc_log->err_ctrl_swid_low,
  3648. "CVP_NOC_ERL_MAIN_SWID_LOW", val);
  3649. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3650. __err_log(log_required, &noc_log->err_ctrl_swid_high,
  3651. "CVP_NOC_ERL_MAIN_SWID_HIGH", val);
  3652. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3653. __err_log(log_required, &noc_log->err_ctrl_mainctl_low,
  3654. "CVP_NOC_ERL_MAIN_MAINCTL_LOW", val);
  3655. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3656. __err_log(log_required, &noc_log->err_ctrl_errvld_low,
  3657. "CVP_NOC_ERL_MAIN_ERRVLD_LOW", val);
  3658. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3659. __err_log(log_required, &noc_log->err_ctrl_errclr_low,
  3660. "CVP_NOC_ERL_MAIN_ERRCLR_LOW", val);
  3661. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3662. __err_log(log_required, &noc_log->err_ctrl_errlog0_low,
  3663. "CVP_NOC_ERL_MAIN_ERRLOG0_LOW", val);
  3664. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3665. __err_log(log_required, &noc_log->err_ctrl_errlog0_high,
  3666. "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH", val);
  3667. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3668. __err_log(log_required, &noc_log->err_ctrl_errlog1_low,
  3669. "CVP_NOC_ERL_MAIN_ERRLOG1_LOW", val);
  3670. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3671. __err_log(log_required, &noc_log->err_ctrl_errlog1_high,
  3672. "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH", val);
  3673. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3674. __err_log(log_required, &noc_log->err_ctrl_errlog2_low,
  3675. "CVP_NOC_ERL_MAIN_ERRLOG2_LOW", val);
  3676. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3677. __err_log(log_required, &noc_log->err_ctrl_errlog2_high,
  3678. "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH", val);
  3679. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3680. __err_log(log_required, &noc_log->err_ctrl_errlog3_low,
  3681. "CVP_NOC_ERL_MAIN_ERRLOG3_LOW", val);
  3682. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3683. __err_log(log_required, &noc_log->err_ctrl_errlog3_high,
  3684. "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH", val);
  3685. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3686. __err_log(log_required, &noc_log->err_core_swid_low,
  3687. "CVP_NOC__CORE_ERL_MAIN_SWID_LOW", val);
  3688. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3689. __err_log(log_required, &noc_log->err_core_swid_high,
  3690. "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH", val);
  3691. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3692. __err_log(log_required, &noc_log->err_core_mainctl_low,
  3693. "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW", val);
  3694. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3695. __err_log(log_required, &noc_log->err_core_errvld_low,
  3696. "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW", val);
  3697. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3698. __err_log(log_required, &noc_log->err_core_errclr_low,
  3699. "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW", val);
  3700. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3701. __err_log(log_required, &noc_log->err_core_errlog0_low,
  3702. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW", val);
  3703. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3704. __err_log(log_required, &noc_log->err_core_errlog0_high,
  3705. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH", val);
  3706. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3707. __err_log(log_required, &noc_log->err_core_errlog1_low,
  3708. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW", val);
  3709. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3710. __err_log(log_required, &noc_log->err_core_errlog1_high,
  3711. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH", val);
  3712. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3713. __err_log(log_required, &noc_log->err_core_errlog2_low,
  3714. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW", val);
  3715. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3716. __err_log(log_required, &noc_log->err_core_errlog2_high,
  3717. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH", val);
  3718. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3719. __err_log(log_required, &noc_log->err_core_errlog3_low,
  3720. "CORE ERRLOG3_LOW, below details", val);
  3721. __print_reg_details(val);
  3722. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3723. __err_log(log_required, &noc_log->err_core_errlog3_high,
  3724. "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH", val);
  3725. #define CVP_SS_CLK_HALT 0x8
  3726. #define CVP_SS_CLK_EN 0xC
  3727. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3728. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3729. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3730. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3731. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3732. __write_register(device, CVP_SS_CLK_HALT, 0);
  3733. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3734. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3735. for (i = 0; i < 15; i++) {
  3736. regi = 0xC0000000 + i;
  3737. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3738. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3739. noc_log->arp_test_bus[i] = val;
  3740. }
  3741. for (i = 0; i < 512; i++) {
  3742. regi = 0x40000000 + i;
  3743. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3744. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3745. noc_log->dma_test_bus[i] = val;
  3746. }
  3747. }
  3748. static int iris_hfi_noc_error_info(void *dev)
  3749. {
  3750. struct iris_hfi_device *device;
  3751. if (!dev) {
  3752. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3753. return -EINVAL;
  3754. }
  3755. device = dev;
  3756. mutex_lock(&device->lock);
  3757. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3758. call_iris_op(device, noc_error_info, device);
  3759. mutex_unlock(&device->lock);
  3760. return 0;
  3761. }
  3762. static int __initialize_packetization(struct iris_hfi_device *device)
  3763. {
  3764. int rc = 0;
  3765. if (!device || !device->res) {
  3766. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3767. return -EINVAL;
  3768. }
  3769. device->packetization_type = HFI_PACKETIZATION_4XX;
  3770. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3771. device->packetization_type);
  3772. if (!device->pkt_ops) {
  3773. rc = -EINVAL;
  3774. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3775. }
  3776. return rc;
  3777. }
  3778. void __init_cvp_ops(struct iris_hfi_device *device)
  3779. {
  3780. device->vpu_ops = &iris2_ops;
  3781. }
  3782. static struct iris_hfi_device *__add_device(u32 device_id,
  3783. struct msm_cvp_platform_resources *res,
  3784. hfi_cmd_response_callback callback)
  3785. {
  3786. struct iris_hfi_device *hdevice = NULL;
  3787. int rc = 0;
  3788. if (!res || !callback) {
  3789. dprintk(CVP_ERR, "Invalid Parameters\n");
  3790. return NULL;
  3791. }
  3792. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3793. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3794. if (!hdevice) {
  3795. dprintk(CVP_ERR, "failed to allocate new device\n");
  3796. goto exit;
  3797. }
  3798. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3799. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3800. if (!hdevice->response_pkt) {
  3801. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3802. goto err_cleanup;
  3803. }
  3804. hdevice->raw_packet =
  3805. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3806. if (!hdevice->raw_packet) {
  3807. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3808. goto err_cleanup;
  3809. }
  3810. rc = vm_manager.vm_ops->vm_init_reg_and_irq(hdevice, res);
  3811. if (rc)
  3812. goto err_cleanup;
  3813. hdevice->res = res;
  3814. hdevice->device_id = device_id;
  3815. hdevice->callback = callback;
  3816. __init_cvp_ops(hdevice);
  3817. hdevice->cvp_workq = create_singlethread_workqueue(
  3818. "msm_cvp_workerq_iris");
  3819. if (!hdevice->cvp_workq) {
  3820. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3821. goto err_cleanup;
  3822. }
  3823. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3824. "pm_workerq_iris");
  3825. if (!hdevice->iris_pm_workq) {
  3826. dprintk(CVP_ERR, ": create pm workq failed\n");
  3827. goto err_cleanup;
  3828. }
  3829. mutex_init(&hdevice->lock);
  3830. INIT_LIST_HEAD(&hdevice->sess_head);
  3831. return hdevice;
  3832. err_cleanup:
  3833. if (hdevice->iris_pm_workq)
  3834. destroy_workqueue(hdevice->iris_pm_workq);
  3835. if (hdevice->cvp_workq)
  3836. destroy_workqueue(hdevice->cvp_workq);
  3837. kfree(hdevice->response_pkt);
  3838. kfree(hdevice->raw_packet);
  3839. kfree(hdevice);
  3840. exit:
  3841. return NULL;
  3842. }
  3843. static struct iris_hfi_device *__get_device(u32 device_id,
  3844. struct msm_cvp_platform_resources *res,
  3845. hfi_cmd_response_callback callback)
  3846. {
  3847. if (!res || !callback) {
  3848. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3849. return NULL;
  3850. }
  3851. return __add_device(device_id, res, callback);
  3852. }
  3853. void cvp_iris_hfi_delete_device(void *device)
  3854. {
  3855. struct msm_cvp_core *core;
  3856. struct iris_hfi_device *dev = NULL;
  3857. if (!device)
  3858. return;
  3859. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3860. if (core)
  3861. dev = core->device->hfi_device_data;
  3862. if (!dev)
  3863. return;
  3864. mutex_destroy(&dev->lock);
  3865. destroy_workqueue(dev->cvp_workq);
  3866. destroy_workqueue(dev->iris_pm_workq);
  3867. free_irq(dev->cvp_hal_data->irq, dev);
  3868. iounmap(dev->cvp_hal_data->register_base);
  3869. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3870. kfree(dev->cvp_hal_data);
  3871. kfree(dev->response_pkt);
  3872. kfree(dev->raw_packet);
  3873. kfree(dev);
  3874. }
  3875. static int iris_hfi_validate_session(void *sess, const char *func)
  3876. {
  3877. struct cvp_hal_session *session = sess;
  3878. int rc = 0;
  3879. struct iris_hfi_device *device;
  3880. if (!session || !session->device) {
  3881. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3882. return -EINVAL;
  3883. }
  3884. device = session->device;
  3885. mutex_lock(&device->lock);
  3886. if (!__is_session_valid(device, session, func))
  3887. rc = -ECONNRESET;
  3888. mutex_unlock(&device->lock);
  3889. return rc;
  3890. }
  3891. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3892. {
  3893. hdev->core_init = iris_hfi_core_init;
  3894. hdev->core_release = iris_hfi_core_release;
  3895. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3896. hdev->session_init = iris_hfi_session_init;
  3897. hdev->session_end = iris_hfi_session_end;
  3898. hdev->session_abort = iris_hfi_session_abort;
  3899. hdev->session_clean = iris_hfi_session_clean;
  3900. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3901. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3902. hdev->session_send = iris_hfi_session_send;
  3903. hdev->session_flush = iris_hfi_session_flush;
  3904. hdev->scale_clocks = iris_hfi_scale_clocks;
  3905. hdev->vote_bus = iris_hfi_vote_buses;
  3906. hdev->get_fw_info = iris_hfi_get_fw_info;
  3907. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3908. hdev->suspend = iris_hfi_suspend;
  3909. hdev->resume = iris_hfi_resume;
  3910. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3911. hdev->noc_error_info = iris_hfi_noc_error_info;
  3912. hdev->validate_session = iris_hfi_validate_session;
  3913. hdev->pm_qos_update = iris_pm_qos_update;
  3914. }
  3915. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3916. struct msm_cvp_platform_resources *res,
  3917. hfi_cmd_response_callback callback)
  3918. {
  3919. int rc = 0;
  3920. if (!hdev || !res || !callback) {
  3921. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3922. hdev, res, callback);
  3923. rc = -EINVAL;
  3924. goto err_iris_hfi_init;
  3925. }
  3926. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3927. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3928. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3929. goto err_iris_hfi_init;
  3930. }
  3931. iris_init_hfi_callbacks(hdev);
  3932. err_iris_hfi_init:
  3933. return rc;
  3934. }